X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/826fb21bbf425410a07970e381de2eb2e5a75417..0840c2ef25cbbe1634b050ba5c8bc1b036129d83:/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h diff --git a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h index a0fc1e44e..eb06bfa60 100644 --- a/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h +++ b/target/linux/adm5120-2.6/files/include/asm-mips/mach-adm5120/adm5120_switch.h @@ -5,7 +5,7 @@ * built-in Ethernet switch. * * Copyright (C) 2007 OpenWrt.org - * Copyright (C) 2007 Gabor Juhos + * Copyright (C) 2007 Gabor Juhos * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -85,6 +85,24 @@ #define CODE_PK_BGA 0 /* BGA package */ #define CODE_PK_PQFP 1 /* PQFP package */ +/* MEMCTRL register bits */ +#define MEMCTRL_SDRS_MASK BITMASK(3) /* SDRAM bank size */ +#define MEMCTRL_SDRS_4M 0x01 +#define MEMCTRL_SDRS_8M 0x02 +#define MEMCTRL_SDRS_16M 0x03 +#define MEMCTRL_SDRS_64M 0x04 +#define MEMCTRL_SDRS_128M 0x05 +#define MEMCTRL_SDR1_ENABLE ONEBIT(5) /* enable SDRAM bank 1 */ + +#define MEMCTRL_SRS0_SHIFT 8 /* shift for SRAM0 size */ +#define MEMCTRL_SRS1_SHIFT 16 /* shift for SRAM1 size */ +#define MEMCTRL_SRS_MASK BITMASK(3) /* SRAM size mask */ +#define MEMCTRL_SRS_DISABLED 0x00 /* Disabled */ +#define MEMCTRL_SRS_512K 0x01 /* 512KB*/ +#define MEMCTRL_SRS_1M 0x02 /* 1MB */ +#define MEMCTRL_SRS_2M 0x03 /* 2MB */ +#define MEMCTRL_SRS_4M 0x04 /* 4MB */ + /* GPIO_CONF0 register bits */ #define GPIO_CONF0_MASK BITMASK(8) #define GPIO_CONF0_IM_SHIFT 0 @@ -96,6 +114,15 @@ #define GPIO_CONF0_OE_MASK (0xFF << GPIO_CONF0_OE_SHIFT) #define GPIO_CONF0_OV_MASK (0xFF << GPIO_CONF0_OV_SHIFT) +/* TIMER_INT register bits */ +#define TIMER_INT_TOS ONEBIT(1) /* time-out status */ +#define TIMER_INT_TOM ONEBIT(16) /* mask time-out interrupt */ + +/* TIMER register bits */ +#define TIMER_PERIOD_MASK BITMASK(16) /* mask for timer period */ +#define TIMER_PERIOD_DEFAULT 0xFFFF /* default timer period */ +#define TIMER_TE ONEBIT(16) /* timer enable bit */ + /* PORTx_LED register bits */ #define LED_MODE_MASK BITMASK(4) #define LED_MODE_INPUT 0