X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/9394e4a065ca6036acc0ec73edf88226c3efe135..1130aa078f6e1a877345d6e78fcd1a97e75a6a0c:/target/linux/generic/files/drivers/net/phy/ar8216.c?ds=sidebyside

diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index c79a92a0a..8e84e9d70 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -48,6 +48,8 @@ struct ar8216_priv {
 	bool port4_phy;
 	char buf[80];
 
+	bool init;
+
 	/* all fields below are cleared on reset */
 	bool vlan;
 	u16 vlan_id[AR8X16_MAX_VLANS];
@@ -75,14 +77,20 @@ static u32
 ar8216_mii_read(struct ar8216_priv *priv, int reg)
 {
 	struct phy_device *phy = priv->phy;
+	struct mii_bus *bus = phy->bus;
 	u16 r1, r2, page;
 	u16 lo, hi;
 
 	split_addr((u32) reg, &r1, &r2, &page);
-	mdiobus_write(phy->bus, 0x18, 0, page);
+
+	mutex_lock(&bus->mdio_lock);
+
+	bus->write(bus, 0x18, 0, page);
 	msleep(1); /* wait for the page switch to propagate */
-	lo = mdiobus_read(phy->bus, 0x10 | r2, r1);
-	hi = mdiobus_read(phy->bus, 0x10 | r2, r1 + 1);
+	lo = bus->read(bus, 0x10 | r2, r1);
+	hi = bus->read(bus, 0x10 | r2, r1 + 1);
+
+	mutex_unlock(&bus->mdio_lock);
 
 	return (hi << 16) | lo;
 }
@@ -91,17 +99,22 @@ static void
 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 {
 	struct phy_device *phy = priv->phy;
+	struct mii_bus *bus = phy->bus;
 	u16 r1, r2, r3;
 	u16 lo, hi;
 
 	split_addr((u32) reg, &r1, &r2, &r3);
-	mdiobus_write(phy->bus, 0x18, 0, r3);
-	msleep(1); /* wait for the page switch to propagate */
-
 	lo = val & 0xffff;
 	hi = (u16) (val >> 16);
-	mdiobus_write(phy->bus, 0x10 | r2, r1 + 1, hi);
-	mdiobus_write(phy->bus, 0x10 | r2, r1, lo);
+
+	mutex_lock(&bus->mdio_lock);
+
+	bus->write(bus, 0x18, 0, r3);
+	msleep(1); /* wait for the page switch to propagate */
+	bus->write(bus, 0x10 | r2, r1 + 1, hi);
+	bus->write(bus, 0x10 | r2, r1, lo);
+
+	mutex_unlock(&bus->mdio_lock);
 }
 
 static u32
@@ -161,6 +174,49 @@ ar8216_id_chip(struct ar8216_priv *priv)
 	}
 }
 
+static void
+ar8216_read_port_link(struct ar8216_priv *priv, int port,
+		      struct switch_port_link *link)
+{
+	u32 status;
+	u32 speed;
+
+	memset(link, '\0', sizeof(*link));
+
+	status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
+
+	link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
+	if (link->aneg) {
+		link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
+		if (!link->link)
+			return;
+	} else {
+		link->link = true;
+	}
+
+	link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
+	link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
+	link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
+
+	speed = (status & AR8216_PORT_STATUS_SPEED) >>
+		 AR8216_PORT_STATUS_SPEED_S;
+
+	switch (speed) {
+	case AR8216_PORT_SPEED_10M:
+		link->speed = SWITCH_PORT_SPEED_10;
+		break;
+	case AR8216_PORT_SPEED_100M:
+		link->speed = SWITCH_PORT_SPEED_100;
+		break;
+	case AR8216_PORT_SPEED_1000M:
+		link->speed = SWITCH_PORT_SPEED_1000;
+		break;
+	default:
+		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
+		break;
+	}
+}
+
 static int
 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
                 struct switch_val *val)
@@ -220,57 +276,13 @@ ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 	return 0;
 }
 
-static const char *ar8216_speed_str(unsigned speed)
-{
-	switch (speed) {
-	case AR8216_PORT_SPEED_10M:
-		return "10baseT";
-	case AR8216_PORT_SPEED_100M:
-		return "100baseT";
-	case AR8216_PORT_SPEED_1000M:
-		return "1000baseT";
-	}
-
-	return "unknown";
-}
-
-static int ar8216_port_get_link(struct switch_dev *dev,
-				const struct switch_attr *attr,
-				struct switch_val *val)
+static int
+ar8216_get_port_link(struct switch_dev *dev, int port,
+		     struct switch_port_link *link)
 {
 	struct ar8216_priv *priv = to_ar8216(dev);
-	u32 len;
-	u32 status;
-	int port;
-
-	port = val->port_vlan;
-
-	memset(priv->buf, '\0', sizeof(priv->buf));
-	status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
-
-	if (status & AR8216_PORT_STATUS_LINK_UP) {
-		len = snprintf(priv->buf, sizeof(priv->buf),
-				"port:%d link:up speed:%s %s-duplex %s%s%s",
-				port,
-				ar8216_speed_str((status &
-						  AR8216_PORT_STATUS_SPEED) >>
-						 AR8216_PORT_STATUS_SPEED_S),
-				(status & AR8216_PORT_STATUS_DUPLEX) ?
-					"full" : "half",
-				(status & AR8216_PORT_STATUS_TXFLOW) ?
-					"txflow ": "",
-				(status & AR8216_PORT_STATUS_RXFLOW) ?
-					"rxflow " : "",
-				(status & AR8216_PORT_STATUS_LINK_AUTO) ?
-					"auto ": "");
-	} else {
-		len = snprintf(priv->buf, sizeof(priv->buf), "port:%d link:down",
-				port);
-	}
-
-	val->value.s = priv->buf;
-	val->len = len;
 
+	ar8216_read_port_link(priv, port, link);
 	return 0;
 }
 
@@ -383,14 +395,6 @@ static struct switch_attr ar8216_globals[] = {
 };
 
 static struct switch_attr ar8216_port[] = {
-	{
-		.type = SWITCH_TYPE_STRING,
-		.name = "link",
-		.description = "Get port link information",
-		.max = 1,
-		.set = NULL,
-		.get = ar8216_port_get_link,
-	},
 };
 
 static struct switch_attr ar8216_vlan[] = {
@@ -464,14 +468,22 @@ static int
 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 {
 	int timeout = 20;
+	u32 t = 0;
 
-	while ((priv->read(priv, reg) & mask) != val) {
-		if (timeout-- <= 0) {
-			printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
-			return 1;
-		}
+	while (1) {
+		t = priv->read(priv, reg);
+		if ((t & mask) == val)
+			return 0;
+
+		if (timeout-- <= 0)
+			break;
+
+		udelay(10);
 	}
-	return 0;
+
+	pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
+	       (unsigned int) reg, t, mask, val);
+	return -ETIMEDOUT;
 }
 
 static void
@@ -550,7 +562,7 @@ ar8216_hw_apply(struct switch_dev *dev)
 	ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 
 	memset(portmask, 0, sizeof(portmask));
-	if (priv->vlan) {
+	if (!priv->init) {
 		/* calculate the port destination masks and load vlans
 		 * into the vlan translation unit */
 		for (j = 0; j < AR8X16_MAX_VLANS; j++) {
@@ -593,10 +605,13 @@ ar8216_hw_apply(struct switch_dev *dev)
 			pvid = i;
 		}
 
-		if (priv->vlan && (priv->vlan_tagged & (1 << i))) {
-			egress = AR8216_OUT_ADD_VLAN;
+		if (priv->vlan) {
+			if (priv->vlan_tagged & (1 << i))
+				egress = AR8216_OUT_ADD_VLAN;
+			else
+				egress = AR8216_OUT_STRIP_VLAN;
 		} else {
-			egress = AR8216_OUT_STRIP_VLAN;
+			egress = AR8216_OUT_KEEP;
 		}
 		if (priv->vlan) {
 			ingress = AR8216_IN_SECURE;
@@ -627,10 +642,10 @@ ar8236_hw_init(struct ar8216_priv *priv) {
 	/* Initialize the PHYs */
 	bus = priv->phy->bus;
 	for (i = 0; i < 5; i++) {
-		bus->write(bus, i, MII_ADVERTISE,
-			   ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
-			   ADVERTISE_PAUSE_ASYM);
-		bus->write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
+		mdiobus_write(bus, i, MII_ADVERTISE,
+			      ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
+			      ADVERTISE_PAUSE_ASYM);
+		mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 	}
 	msleep(1000);
 
@@ -703,6 +718,32 @@ out:
 	return 0;
 }
 
+static void
+ar8216_init_port(struct ar8216_priv *priv, int port)
+{
+	/* Enable port learning and tx */
+	priv->write(priv, AR8216_REG_PORT_CTRL(port),
+		AR8216_PORT_CTRL_LEARN |
+		(4 << AR8216_PORT_CTRL_STATE_S));
+
+	priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
+
+	if (port == AR8216_PORT_CPU) {
+		priv->write(priv, AR8216_REG_PORT_STATUS(port),
+			AR8216_PORT_STATUS_LINK_UP |
+			((priv->chip == AR8316) ?
+				AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
+			AR8216_PORT_STATUS_TXMAC |
+			AR8216_PORT_STATUS_RXMAC |
+			((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
+			((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
+			AR8216_PORT_STATUS_DUPLEX);
+	} else {
+		priv->write(priv, AR8216_REG_PORT_STATUS(port),
+			AR8216_PORT_STATUS_LINK_AUTO);
+	}
+}
+
 static int
 ar8216_reset_switch(struct switch_dev *dev)
 {
@@ -715,30 +756,11 @@ ar8216_reset_switch(struct switch_dev *dev)
 	for (i = 0; i < AR8X16_MAX_VLANS; i++) {
 		priv->vlan_id[i] = i;
 	}
-	for (i = 0; i < AR8216_NUM_PORTS; i++) {
-		/* Enable port learning and tx */
-		priv->write(priv, AR8216_REG_PORT_CTRL(i),
-			AR8216_PORT_CTRL_LEARN |
-			(4 << AR8216_PORT_CTRL_STATE_S));
-
-		priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
-
-		/* Configure all PHYs */
-		if (i == AR8216_PORT_CPU) {
-			priv->write(priv, AR8216_REG_PORT_STATUS(i),
-				AR8216_PORT_STATUS_LINK_UP |
-				((priv->chip == AR8316) ?
-					AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
-				AR8216_PORT_STATUS_TXMAC |
-				AR8216_PORT_STATUS_RXMAC |
-				((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
-				((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
-				AR8216_PORT_STATUS_DUPLEX);
-		} else {
-			priv->write(priv, AR8216_REG_PORT_STATUS(i),
-				AR8216_PORT_STATUS_LINK_AUTO);
-		}
-	}
+
+	/* Configure all ports */
+	for (i = 0; i < AR8216_NUM_PORTS; i++)
+		ar8216_init_port(priv, i);
+
 	/* XXX: undocumented magic from atheros, required! */
 	priv->write(priv, 0x38, 0xc000050e);
 
@@ -780,6 +802,7 @@ static const struct switch_dev_ops ar8216_ops = {
 	.set_vlan_ports = ar8216_set_ports,
 	.apply_config = ar8216_hw_apply,
 	.reset_switch = ar8216_reset_switch,
+	.get_port_link = ar8216_get_port_link,
 };
 
 static int
@@ -869,32 +892,24 @@ ar8216_config_init(struct phy_device *pdev)
 		swdev->vlans = AR8216_NUM_VLANS;
 	}
 
-	if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
-		kfree(priv);
-		goto done;
-	}
+	ret = register_switch(&priv->dev, pdev->attached_dev);
+	if (ret)
+		goto err_free_priv;
 
-	if (priv->chip == AR8316) {
-		ret = ar8316_hw_init(priv);
-		if (ret) {
-			kfree(priv);
-			goto done;
-		}
-	}
+	priv->init = true;
 
-	if (priv->chip == AR8236) {
+	ret = 0;
+	if (priv->chip == AR8236)
 		ret = ar8236_hw_init(priv);
-		if (ret) {
-			kfree(priv);
-			goto done;
-		}
-	}
+	else if (priv->chip == AR8316)
+		ret = ar8316_hw_init(priv);
+
+	if (ret)
+		goto err_free_priv;
 
 	ret = ar8216_reset_switch(&priv->dev);
-	if (ret) {
-		kfree(priv);
-		goto done;
-	}
+	if (ret)
+		goto err_free_priv;
 
 	dev->phy_ptr = priv;
 
@@ -909,7 +924,12 @@ ar8216_config_init(struct phy_device *pdev)
 		dev->netdev_ops = &priv->ndo;
 	}
 
-done:
+	priv->init = false;
+
+	return 0;
+
+err_free_priv:
+	kfree(priv);
 	return ret;
 }
 
@@ -917,23 +937,37 @@ static int
 ar8216_read_status(struct phy_device *phydev)
 {
 	struct ar8216_priv *priv = phydev->priv;
+	struct switch_port_link link;
 	int ret;
 	if (phydev->addr != 0) {
 		return genphy_read_status(phydev);
 	}
 
-	phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
-	phydev->duplex = DUPLEX_FULL;
-	phydev->link = 1;
+	ar8216_read_port_link(priv, phydev->addr, &link);
+	phydev->link = !!link.link;
+	if (!phydev->link)
+		return 0;
+
+	switch (link.speed) {
+	case SWITCH_PORT_SPEED_10:
+	    	phydev->speed = SPEED_10;
+		break;
+	case SWITCH_PORT_SPEED_100:
+	    	phydev->speed = SPEED_100;
+		break;
+	case SWITCH_PORT_SPEED_1000:
+	    	phydev->speed = SPEED_1000;
+		break;
+	default:
+		phydev->speed = 0;
+	}
+	phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
 
 	/* flush the address translation unit */
 	mutex_lock(&priv->reg_mutex);
 	ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
-
 	if (!ret)
 		priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
-	else
-		ret = -ETIMEDOUT;
 	mutex_unlock(&priv->reg_mutex);
 
 	phydev->state = PHY_RUNNING;
@@ -984,7 +1018,7 @@ ar8216_remove(struct phy_device *pdev)
 
 static struct phy_driver ar8216_driver = {
 	.phy_id		= 0x004d0000,
-	.name		= "Atheros AR8216/AR8316/AR8326",
+	.name		= "Atheros AR8216/AR8236/AR8316",
 	.phy_id_mask	= 0xffff0000,
 	.features	= PHY_BASIC_FEATURES,
 	.probe		= ar8216_probe,