X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/9b433b090a57ca648ca0e3eeb3ddc68136a7ccc7..4cca99b95fc7be5f90a94b5b41b45c5c32360a38:/target/linux/x86/patches-3.2/902-8139cp_config_rx_mode.patch?ds=sidebyside

diff --git a/target/linux/x86/patches-3.2/902-8139cp_config_rx_mode.patch b/target/linux/x86/patches-3.2/902-8139cp_config_rx_mode.patch
new file mode 100644
index 000000000..e5c17d16f
--- /dev/null
+++ b/target/linux/x86/patches-3.2/902-8139cp_config_rx_mode.patch
@@ -0,0 +1,45 @@
+From f872b237c1750221932e715da2552225afe4a95c Mon Sep 17 00:00:00 2001
+From: Jason Wang <jasowang@redhat.com>
+Date: Fri, 30 Dec 2011 23:44:42 +0000
+Subject: [PATCH] 8139cp: properly config rx mode after resuming
+
+Rx mode should be reset after resming, so unconditionally updating rx
+mode rather than conditionally updating based on the value we
+remembered, otherwise unexpected value may be used by the nic after
+resuming.
+
+btw. I find and test this when debugging guest hibernation in qemu, as
+I did not have a 8139cp card in hand, this patch is untested in a
+physical 8139cp card, plase review it carefully.
+
+Signed-off-by: Jason Wang <jasowang@redhat.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/realtek/8139cp.c |    9 +++------
+ 1 files changed, 3 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/ethernet/realtek/8139cp.c
++++ b/drivers/net/ethernet/realtek/8139cp.c
+@@ -860,7 +860,6 @@ static void __cp_set_rx_mode (struct net
+ 	struct cp_private *cp = netdev_priv(dev);
+ 	u32 mc_filter[2];	/* Multicast hash filter */
+ 	int rx_mode;
+-	u32 tmp;
+ 
+ 	/* Note: do not reorder, GCC is clever about common statements. */
+ 	if (dev->flags & IFF_PROMISC) {
+@@ -887,11 +886,9 @@ static void __cp_set_rx_mode (struct net
+ 	}
+ 
+ 	/* We can safely update without stopping the chip. */
+-	tmp = cp_rx_config | rx_mode;
+-	if (cp->rx_config != tmp) {
+-		cpw32_f (RxConfig, tmp);
+-		cp->rx_config = tmp;
+-	}
++	cp->rx_config = cp_rx_config | rx_mode;
++	cpw32_f(RxConfig, cp->rx_config);
++
+ 	cpw32_f (MAR0 + 0, mc_filter[0]);
+ 	cpw32_f (MAR0 + 4, mc_filter[1]);
+ }