X-Git-Url: http://git.rohieb.name/openwrt.git/blobdiff_plain/b33e4d9b561f07d9925a202c10bccc519ff86d8f..ac42d58d7c974b42dd434a2f7f327b390c929c63:/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c index 086de2229..6fe4d407e 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c @@ -1,7 +1,7 @@ /* * Atheros AR71xx built-in ethernet mac driver * - * Copyright (C) 2008 Gabor Juhos + * Copyright (C) 2008-2009 Gabor Juhos * Copyright (C) 2008 Imre Kaloz * * Based on Atheros' AG7100 driver @@ -13,46 +13,6 @@ #include "ag71xx.h" -#define PLL_SEC_CONFIG 0x18050004 -#define PLL_ETH0_INT_CLOCK 0x18050010 -#define PLL_ETH1_INT_CLOCK 0x18050014 -#define PLL_ETH_EXT_CLOCK 0x18050018 - -#define ag71xx_pll_shift(_ag) (((_ag)->pdev->id) ? 19 : 17) -#define ag71xx_pll_offset(_ag) (((_ag)->pdev->id) ? PLL_ETH1_INT_CLOCK \ - : PLL_ETH0_INT_CLOCK) - -static void ag71xx_set_pll(struct ag71xx *ag, u32 pll_val) -{ - void __iomem *pll_reg = ioremap_nocache(ag71xx_pll_offset(ag), 4); - void __iomem *pll_cfg = ioremap_nocache(PLL_SEC_CONFIG, 4); - u32 s; - u32 t; - - s = ag71xx_pll_shift(ag); - - t = __raw_readl(pll_cfg); - t &= ~(3 << s); - t |= (2 << s); - __raw_writel(t, pll_cfg); - udelay(100); - - __raw_writel(pll_val, pll_reg); - - t |= (3 << s); - __raw_writel(t, pll_cfg); - udelay(100); - - t &= ~(3 << s); - __raw_writel(t, pll_cfg); - udelay(100); - DBG("%s: pll_reg %#x: %#x\n", ag->dev->name, - (unsigned int)pll_reg, __raw_readl(pll_reg)); - - iounmap(pll_cfg); - iounmap(pll_reg); -} - static unsigned char *ag71xx_speed_str(struct ag71xx *ag) { switch (ag->speed) { @@ -67,21 +27,11 @@ static unsigned char *ag71xx_speed_str(struct ag71xx *ag) return "?"; } -#if 1 -#define PLL_VAL_1000 0x00110000 -#define PLL_VAL_100 0x00001099 -#define PLL_VAL_10 0x00991099 -#else -#define PLL_VAL_1000 0x01111000 -#define PLL_VAL_100 0x09991000 -#define PLL_VAL_10 0x09991999 -#endif - static void ag71xx_phy_link_update(struct ag71xx *ag) { + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); u32 cfg2; u32 ifctl; - u32 pll; u32 fifo5; u32 mii_speed; @@ -100,33 +50,34 @@ static void ag71xx_phy_link_update(struct ag71xx *ag) ifctl &= ~(MAC_IFCTL_SPEED); fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); - fifo5 &= ~FIFO_CFG5_BYTE_PER_CLK; + fifo5 &= ~FIFO_CFG5_BM; switch (ag->speed) { case SPEED_1000: mii_speed = MII_CTRL_SPEED_1000; cfg2 |= MAC_CFG2_IF_1000; - pll = PLL_VAL_1000; - fifo5 |= FIFO_CFG5_BYTE_PER_CLK; + fifo5 |= FIFO_CFG5_BM; break; case SPEED_100: mii_speed = MII_CTRL_SPEED_100; cfg2 |= MAC_CFG2_IF_10_100; ifctl |= MAC_IFCTL_SPEED; - pll = PLL_VAL_100; break; case SPEED_10: mii_speed = MII_CTRL_SPEED_10; cfg2 |= MAC_CFG2_IF_10_100; - pll = PLL_VAL_10; break; default: BUG(); return; } - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff); - ag71xx_set_pll(ag, pll); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, + pdata->is_ar91xx ? 0x780fff : 0x008001ff); + + if (pdata->set_pll) + pdata->set_pll(ag->speed); + ag71xx_mii_ctrl_set_speed(ag, mii_speed); ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); @@ -140,15 +91,19 @@ static void ag71xx_phy_link_update(struct ag71xx *ag) ag71xx_speed_str(ag), (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); - DBG("%s: fifo1=%#x, fifo2=%#x, fifo3=%#x, fifo4=%#x, fifo5=%#x\n", + DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); + + DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", + ag->dev->name, ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); - DBG("%s: mac_cfg2=%#x, ifctl=%#x, mii_ctrl=%#x\n", + DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n", ag->dev->name, ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), @@ -171,12 +126,8 @@ static void ag71xx_phy_link_adjust(struct net_device *dev) } } - if (phydev->link != ag->link) { - if (phydev->link) - netif_schedule(dev); - + if (phydev->link != ag->link) status_change = 1; - } ag->link = phydev->link; ag->duplex = phydev->duplex; @@ -193,8 +144,10 @@ void ag71xx_phy_start(struct ag71xx *ag) if (ag->phy_dev) { phy_start(ag->phy_dev); } else { - ag->duplex = DUPLEX_FULL; - ag->speed = SPEED_100; + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + + ag->duplex = pdata->duplex; + ag->speed = pdata->speed; ag->link = 1; ag71xx_phy_link_update(ag); } @@ -212,77 +165,107 @@ void ag71xx_phy_stop(struct ag71xx *ag) } } -int ag71xx_phy_connect(struct ag71xx *ag) +static int ag71xx_phy_connect_fixed(struct ag71xx *ag) +{ + struct net_device *dev = ag->dev; + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + int ret = 0; + + /* use fixed settings */ + switch (pdata->speed) { + case SPEED_10: + case SPEED_100: + case SPEED_1000: + break; + default: + printk(KERN_ERR "%s: invalid speed specified\n", + dev->name); + ret = -EINVAL; + break; + } + + return ret; +} + +static int ag71xx_phy_connect_multi(struct ag71xx *ag) { struct net_device *dev = ag->dev; struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); struct phy_device *phydev = NULL; int phy_count = 0; int phy_addr; + int ret = 0; - if (ag->mii_bus) { - /* TODO: use mutex of the mdio bus */ - for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { - if (!(pdata->phy_mask & (1 << phy_addr))) - continue; + for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { + if (!(pdata->phy_mask & (1 << phy_addr))) + continue; - if (ag->mii_bus->phy_map[phy_addr] == NULL) - continue; + if (ag->mii_bus->phy_map[phy_addr] == NULL) + continue; - DBG("%s: PHY found at %s, uid=%08x\n", - dev->name, - ag->mii_bus->phy_map[phy_addr]->dev.bus_id, - ag->mii_bus->phy_map[phy_addr]->phy_id); + DBG("%s: PHY found at %s, uid=%08x\n", + dev->name, + dev_name(&ag->mii_bus->phy_map[phy_addr]->dev), + ag->mii_bus->phy_map[phy_addr]->phy_id); - if (phydev == NULL) - phydev = ag->mii_bus->phy_map[phy_addr]; + if (phydev == NULL) + phydev = ag->mii_bus->phy_map[phy_addr]; - phy_count++; - } + phy_count++; } switch (phy_count) { case 0: - printk(KERN_ERR "%s: no PHY found\n", dev->name); - return -ENODEV; + printk(KERN_ERR "%s: no PHY found with phy_mask=%08x\n", + dev->name, pdata->phy_mask); + ret = -ENODEV; + break; case 1: - ag->phy_dev = phy_connect(dev, phydev->dev.bus_id, + ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev), &ag71xx_phy_link_adjust, 0, pdata->phy_if_mode); if (IS_ERR(ag->phy_dev)) { printk(KERN_ERR "%s: could not connect to PHY at %s\n", - dev->name, phydev->dev.bus_id); + dev->name, dev_name(&phydev->dev)); return PTR_ERR(ag->phy_dev); } /* mask with MAC supported features */ - phydev->supported &= (SUPPORTED_10baseT_Half - | SUPPORTED_10baseT_Full - | SUPPORTED_100baseT_Half - | SUPPORTED_100baseT_Full - | SUPPORTED_Autoneg - | SUPPORTED_MII - | SUPPORTED_TP); + if (pdata->has_gbit) + phydev->supported &= PHY_GBIT_FEATURES; + else + phydev->supported &= PHY_BASIC_FEATURES; phydev->advertising = phydev->supported; printk(KERN_DEBUG "%s: connected to PHY at %s " "[uid=%08x, driver=%s]\n", - dev->name, phydev->dev.bus_id, + dev->name, dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); ag->link = 0; ag->speed = 0; ag->duplex = -1; break; + default: - ag->phy_dev = NULL; - printk(KERN_DEBUG "%s: connected to multiple PHYs (%d)\n", + printk(KERN_DEBUG "%s: connected to %d PHYs\n", dev->name, phy_count); + ret = ag71xx_phy_connect_fixed(ag); break; } - return 0; + return ret; +} + +int ag71xx_phy_connect(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + + if (pdata->phy_mask) + return ag71xx_phy_connect_multi(ag); + + return ag71xx_phy_connect_fixed(ag); } void ag71xx_phy_disconnect(struct ag71xx *ag)