drivers/displays/tft/hw/ssd1331.h

   1 /**************************************************************************/
   2 /*!
   3     @file     ssd1331.h
   4     @author   K. Townsend (microBuilder.eu)
   5
   6     @section LICENSE
   7
   8     Software License Agreement (BSD License)
   9
  10     Copyright (c) 2010, microBuilder SARL
  11     All rights reserved.
  12
  13     Redistribution and use in source and binary forms, with or without
  14     modification, are permitted provided that the following conditions are met:
  15     1. Redistributions of source code must retain the above copyright
  16     notice, this list of conditions and the following disclaimer.
  17     2. Redistributions in binary form must reproduce the above copyright
  18     notice, this list of conditions and the following disclaimer in the
  19     documentation and/or other materials provided with the distribution.
  20     3. Neither the name of the copyright holders nor the
  21     names of its contributors may be used to endorse or promote products
  22     derived from this software without specific prior written permission.
  23
  24     THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ''AS IS'' AND ANY
  25     EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  26     WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27     DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
  28     DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  29     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  30     LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  31     ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  32     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  33     SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34 */
  35 /**************************************************************************/
  36 #ifndef __SSD1331_H__
  37 #define __SSD1331_H__
  38
  39 #include "projectconfig.h"
  40
  41 #include "drivers/displays/tft/lcd.h"
  42 #include "core/gpio/gpio.h"
  43
  44 // Select one of these defines to set the pixel color order
  45 #define SSD1331_COLORORDER_RGB
  46 // #define SSD1331_COLORORDER_BGR
  47
  48 #if defined SSD1331_COLORORDER_RGB && defined SSD1331_COLORORDER_BGR
  49   #error "RGB and BGR can not both be defined for SSD1331_COLORODER."
  50 #endif
  51
  52 // Control pins
  53 #define SSD1331_SID_PORT          2     // DAT
  54 #define SSD1331_SID_PIN           1
  55 #define SSD1331_SCK_PORT          2     // SCK
  56 #define SSD1331_SCK_PIN           2
  57 #define SSD1331_DC_PORT           2     // D/C
  58 #define SSD1331_DC_PIN            3
  59 #define SSD1331_RST_PORT          2     // RST
  60 #define SSD1331_RST_PIN           4
  61 #define SSD1331_CS_PORT           2     // OLEDCS
  62 #define SSD1331_CS_PIN            5
  63
  64 // Placed here to try to keep all pin specific values in header file
  65 #define SSD1331_DISABLEPULLUPS() do { gpioSetPullup(&IOCON_PIO2_1, gpioPullupMode_Inactive); \
  66                                       gpioSetPullup(&IOCON_PIO2_2, gpioPullupMode_Inactive); \
  67                                       gpioSetPullup(&IOCON_PIO2_3, gpioPullupMode_Inactive); \
  68                                       gpioSetPullup(&IOCON_PIO2_4, gpioPullupMode_Inactive); \
  69                                       gpioSetPullup(&IOCON_PIO2_5, gpioPullupMode_Inactive); } while (0)
  70
  71 // These registers allow fast single operation clear+set of bits (see section 8.5.1 of LPC1343 UM)
  72 #define SSD1331_GPIO2DATA_SID         (*(pREG32 (GPIO_GPIO2_BASE + ((1 << SSD1331_SID_PIN) << 2))))
  73 #define SSD1331_GPIO2DATA_SCK         (*(pREG32 (GPIO_GPIO2_BASE + ((1 << SSD1331_SCK_PIN) << 2))))
  74 #define SSD1331_GPIO2DATA_DC          (*(pREG32 (GPIO_GPIO2_BASE + ((1 << SSD1331_DC_PIN) << 2))))
  75 #define SSD1331_GPIO2DATA_RST         (*(pREG32 (GPIO_GPIO2_BASE + ((1 << SSD1331_RST_PIN) << 2))))
  76 #define SSD1331_GPIO2DATA_CS          (*(pREG32 (GPIO_GPIO2_BASE + ((1 << SSD1331_CS_PIN) << 2))))
  77
  78 // Macros for control line state
  79 #define CLR_DC          SSD1331_GPIO2DATA_DC = (0)
  80 #define SET_DC          SSD1331_GPIO2DATA_DC = (1 << SSD1331_DC_PIN)
  81 #define CLR_RST         SSD1331_GPIO2DATA_RST = (0)
  82 #define SET_RST         SSD1331_GPIO2DATA_RST = (1 << SSD1331_RST_PIN)
  83 #define CLR_CS          SSD1331_GPIO2DATA_CS = (0)
  84 #define SET_CS          SSD1331_GPIO2DATA_CS = (1 << SSD1331_CS_PIN)
  85 #define CLR_SCK         SSD1331_GPIO2DATA_SCK = (0)
  86 #define SET_SCK         SSD1331_GPIO2DATA_SCK = (1 << SSD1331_SCK_PIN)
  87 #define CLR_SID         SSD1331_GPIO2DATA_SID = (0)
  88 #define SET_SID         SSD1331_GPIO2DATA_SID = (1 << SSD1331_SID_PIN)
  89
  90 enum
  91 {
  92   SSD1331_CMD_DRAWLINE          = 0x21,
  93   SSD1331_CMD_DRAWRECT          = 0x22,
  94   SSD1331_CMD_FILL              = 0x26,
  95   SSD1331_CMD_SETCOLUMN         = 0x15,
  96   SSD1331_CMD_SETROW            = 0x75,
  97   SSD1331_CMD_CONTRASTA         = 0x81,
  98   SSD1331_CMD_CONTRASTB         = 0x82,
  99   SSD1331_CMD_CONTRASTC         = 0x83,
 100   SSD1331_CMD_MASTERCURRENT     = 0x87,
 101   SSD1331_CMD_SETREMAP          = 0xA0,
 102   SSD1331_CMD_STARTLINE         = 0xA1,
 103   SSD1331_CMD_DISPLAYOFFSET     = 0xA2,
 104   SSD1331_CMD_NORMALDISPLAY     = 0xA4,
 105   SSD1331_CMD_DISPLAYALLON      = 0xA5,
 106   SSD1331_CMD_DISPLAYALLOFF     = 0xA6,
 107   SSD1331_CMD_INVERTDISPLAY     = 0xA7,
 108   SSD1331_CMD_SETMULTIPLEX      = 0xA8,
 109   SSD1331_CMD_SETMASTER         = 0xAD,
 110   SSD1331_CMD_DISPLAYOFF        = 0xAE,
 111   SSD1331_CMD_DISPLAYON         = 0xAF,
 112   SSD1331_CMD_POWERMODE         = 0xB0,
 113   SSD1331_CMD_PRECHARGE         = 0xB1,
 114   SSD1331_CMD_CLOCKDIV          = 0xB3,
 115   SSD1331_CMD_PRECHARGEA        = 0x8A,
 116   SSD1331_CMD_PRECHARGEB        = 0x8B,
 117   SSD1331_CMD_PRECHARGEC        = 0x8C,
 118   SSD1331_CMD_PRECHARGELEVEL    = 0xBB,
 119   SSD1331_CMD_VCOMH             = 0xBE
 120 };
 121
 122 #endif