X-Git-Url: https://git.rohieb.name/hackover2013-badge-firmware.git/blobdiff_plain/217c3a59a0fd96a9bce3e2bd5ca58e83fd090664..2fb9f70df407a731f55952a7e70eea641ad275d9:/lpc134x.h

diff --git a/lpc134x.h b/lpc134x.h
index cb41088..002f7cd 100644
--- a/lpc134x.h
+++ b/lpc134x.h
@@ -2770,7 +2770,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn)
 #define TMR_TMR16B0TCR_COUNTERENABLE_DISABLED     ((unsigned int) 0x00000000)
 #define TMR_TMR16B0TCR_COUNTERRESET_MASK          ((unsigned int) 0x00000002)
 #define TMR_TMR16B0TCR_COUNTERRESET_ENABLED       ((unsigned int) 0x00000002)
-#define TMR_TMR16B0TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000002)
+#define TMR_TMR16B0TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000000)
 
 #define TMR_TMR16B0MCR_MR0_INT_MASK               ((unsigned int) 0x00000001) // Interrupt on MRO
 #define TMR_TMR16B0MCR_MR0_INT_ENABLED            ((unsigned int) 0x00000001)
@@ -2904,7 +2904,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn)
 #define TMR_TMR16B1TCR_COUNTERENABLE_DISABLED     ((unsigned int) 0x00000000)
 #define TMR_TMR16B1TCR_COUNTERRESET_MASK          ((unsigned int) 0x00000002)
 #define TMR_TMR16B1TCR_COUNTERRESET_ENABLED       ((unsigned int) 0x00000002)
-#define TMR_TMR16B1TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000002)
+#define TMR_TMR16B1TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000000)
 
 #define TMR_TMR16B1MCR_MR0_INT_MASK               ((unsigned int) 0x00000001) // Interrupt on MRO
 #define TMR_TMR16B1MCR_MR0_INT_ENABLED            ((unsigned int) 0x00000001)
@@ -3042,7 +3042,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn)
 #define TMR_TMR32B0TCR_COUNTERENABLE_DISABLED     ((unsigned int) 0x00000000)
 #define TMR_TMR32B0TCR_COUNTERRESET_MASK          ((unsigned int) 0x00000002)
 #define TMR_TMR32B0TCR_COUNTERRESET_ENABLED       ((unsigned int) 0x00000002)
-#define TMR_TMR32B0TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000002)
+#define TMR_TMR32B0TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000000)
 
 #define TMR_TMR32B0MCR_MR0_INT_MASK               ((unsigned int) 0x00000001)   // Interrupt on MRO
 #define TMR_TMR32B0MCR_MR0_INT_ENABLED            ((unsigned int) 0x00000001)
@@ -3176,7 +3176,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn)
 #define TMR_TMR32B1TCR_COUNTERENABLE_DISABLED     ((unsigned int) 0x00000000)
 #define TMR_TMR32B1TCR_COUNTERRESET_MASK          ((unsigned int) 0x00000002)
 #define TMR_TMR32B1TCR_COUNTERRESET_ENABLED       ((unsigned int) 0x00000002)
-#define TMR_TMR32B1TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000002)
+#define TMR_TMR32B1TCR_COUNTERRESET_DISABLED      ((unsigned int) 0x00000000)
 
 #define TMR_TMR32B1MCR_MR0_INT_MASK               ((unsigned int) 0x00000001)   // Interrupt on MRO
 #define TMR_TMR32B1MCR_MR0_INT_ENABLED            ((unsigned int) 0x00000001)