X-Git-Url: https://git.rohieb.name/hackover2013-badge-firmware.git/blobdiff_plain/9d18e10afb2439a6a9ba6978a799259746a837b7..7aeb2288ae07778b92b3c9224cbc149cb08282a8:/core/gpio/gpio.c diff --git a/core/gpio/gpio.c b/core/gpio/gpio.c index 3809a5e..a7154e1 100644 --- a/core/gpio/gpio.c +++ b/core/gpio/gpio.c @@ -43,17 +43,27 @@ #include "gpio.h" #ifdef CFG_CHIBI -#include "drivers/chibi/chb_drvr.h" +#include "drivers/rf/chibi/chb_drvr.h" volatile uint32_t chibi_counter = 0; #endif +#ifdef CFG_ALTRESET +#include "core/cpu/cpu.h" +#endif + static bool _gpioInitialised = false; /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 0 (currently checks pin 0.1) + + @note By default, this IRQ handler is probably disabled in + projectconfig.h (see GPIO_ENABLE_IRQ0), but you can use + the code below as a model to implement this interrupt + handler in an appropriate place in your project. */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ0 void PIOINT0_IRQHandler(void) { uint32_t regVal; @@ -65,16 +75,27 @@ void PIOINT0_IRQHandler(void) } return; } +#endif /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 1 (currently checks pin 1.1) */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ1 void PIOINT1_IRQHandler(void) { uint32_t regVal; +#if defined CFG_ALTRESET && CFG_ALTRESET_PORT == 1 + regVal = gpioIntStatus(CFG_ALTRESET_PORT, CFG_ALTRESET_PIN); + if (regVal) + { + // Cause a reset and wait + cpuReset(); + } +#endif + #ifdef CFG_CHIBI // Check for interrupt on 1.8 regVal = gpioIntStatus(1, 8); @@ -94,12 +115,19 @@ void PIOINT1_IRQHandler(void) return; } +#endif /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 2 (currently checks pin 2.1) + + @note By default, this IRQ handler is probably disabled in + projectconfig.h (see GPIO_ENABLE_IRQ2), but you can use + the code below as a model to implement this interrupt + handler in an appropriate place in your project. */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ2 void PIOINT2_IRQHandler(void) { uint32_t regVal; @@ -111,12 +139,19 @@ void PIOINT2_IRQHandler(void) } return; } +#endif /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 3 (currently checks pin 3.1) + + @note By default, this IRQ handler is probably disabled in + projectconfig.h (see GPIO_ENABLE_IRQ3), but you can use + the code below as a model to implement this interrupt + handler in an appropriate place in your project. */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ3 void PIOINT3_IRQHandler(void) { uint32_t regVal; @@ -128,6 +163,7 @@ void PIOINT3_IRQHandler(void) } return; } +#endif /**************************************************************************/ /*! @@ -312,9 +348,9 @@ void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t s if (!_gpioInitialised) gpioInit(); // Get the appropriate register (handled this way to optimise code size) - REG32 *gpiois = &GPIO_GPIO0IS; - REG32 *gpioibe = &GPIO_GPIO0IBE; - REG32 *gpioiev = &GPIO_GPIO0IEV; + REG32 *gpiois = &GPIO_GPIO0IS; // Interrupt sense (edge or level sensitive) + REG32 *gpioibe = &GPIO_GPIO0IBE; // Interrupt both edges (0 = int controlled by GPIOIEV, 1 = both edges trigger interrupt) + REG32 *gpioiev = &GPIO_GPIO0IEV; // 0 = falling edge or low, 1 = rising edge or high (depending on GPIOIS) switch (portNum) { case 0: @@ -339,18 +375,17 @@ void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t s break; } - if (gpioInterruptSense_Edge) + if (sense == gpioInterruptSense_Edge) { *gpiois &= ~(0x1<