X-Git-Url: https://git.rohieb.name/hackover2013-badge-firmware.git/blobdiff_plain/d537298fdd7d39e4cb0e74e8e6d227245d638afe..1c66f1dc6d3dc43e39760c505ac5d08a9f8aeda4:/core/gpio/gpio.c diff --git a/core/gpio/gpio.c b/core/gpio/gpio.c index 9c84655..e13f72e 100644 --- a/core/gpio/gpio.c +++ b/core/gpio/gpio.c @@ -43,7 +43,7 @@ #include "gpio.h" #ifdef CFG_CHIBI -#include "drivers/chibi/chb_drvr.h" +#include "drivers/rf/chibi/chb_drvr.h" volatile uint32_t chibi_counter = 0; #endif @@ -56,8 +56,14 @@ static bool _gpioInitialised = false; /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 0 (currently checks pin 0.1) + + @note By default, this IRQ handler is probably disabled in + projectconfig.h (see GPIO_ENABLE_IRQ0), but you can use + the code below as a model to implement this interrupt + handler in an appropriate place in your project. */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ0 void PIOINT0_IRQHandler(void) { uint32_t regVal; @@ -69,12 +75,14 @@ void PIOINT0_IRQHandler(void) } return; } +#endif /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 1 (currently checks pin 1.1) */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ1 void PIOINT1_IRQHandler(void) { uint32_t regVal; @@ -107,12 +115,19 @@ void PIOINT1_IRQHandler(void) return; } +#endif /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 2 (currently checks pin 2.1) + + @note By default, this IRQ handler is probably disabled in + projectconfig.h (see GPIO_ENABLE_IRQ2), but you can use + the code below as a model to implement this interrupt + handler in an appropriate place in your project. */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ2 void PIOINT2_IRQHandler(void) { uint32_t regVal; @@ -124,12 +139,19 @@ void PIOINT2_IRQHandler(void) } return; } +#endif /**************************************************************************/ /*! @brief IRQ Handler for GPIO port 3 (currently checks pin 3.1) + + @note By default, this IRQ handler is probably disabled in + projectconfig.h (see GPIO_ENABLE_IRQ3), but you can use + the code below as a model to implement this interrupt + handler in an appropriate place in your project. */ /**************************************************************************/ +#if defined GPIO_ENABLE_IRQ3 void PIOINT3_IRQHandler(void) { uint32_t regVal; @@ -141,6 +163,7 @@ void PIOINT3_IRQHandler(void) } return; } +#endif /**************************************************************************/ /*! @@ -257,30 +280,12 @@ uint32_t gpioGetValue (uint32_t portNum, uint32_t bitPos) the pin low and 1 will set the pin high. */ /**************************************************************************/ -void gpioSetValue (uint32_t portNum, uint32_t bitPos, uint32_t bitVal) +inline void gpioSetValue (const uint32_t portNum, const uint32_t bitPos, const uint32_t bitVal) { if (!_gpioInitialised) gpioInit(); - // Get the appropriate register (handled this way to optimise code size) - REG32 *gpiodata = &GPIO_GPIO0DATA; - switch (portNum) - { - case 0: - gpiodata = &GPIO_GPIO0DATA; - break; - case 1: - gpiodata = &GPIO_GPIO1DATA; - break; - case 2: - gpiodata = &GPIO_GPIO2DATA; - break; - case 3: - gpiodata = &GPIO_GPIO3DATA; - break; - } - - // Toggle value - bitVal == 1 ? (*gpiodata |= (1 << bitPos)) : (*gpiodata &= ~(1 << bitPos)); + // Take advantage of the fact the GPIO registers are bit-banded + (*(pREG32 ((GPIO_GPIO0_BASE + (portNum << 16)) + ((1 << bitPos) << 2)))) = bitVal ? 0xFFF : 0; } /**************************************************************************/ @@ -352,7 +357,6 @@ void gpioSetInterrupt (uint32_t portNum, uint32_t bitPos, gpioInterruptSense_t s break; } - if (sense == gpioInterruptSense_Edge) { *gpiois &= ~(0x1<<bitPos);