From 749ee97a8fa1ca6eebc851a7551b13a6ef87b001 Mon Sep 17 00:00:00 2001 From: Kevin Townsend Date: Fri, 29 Jun 2012 02:32:20 +0200 Subject: [PATCH] Fixed COUNTERRESET_DISABLED --- lpc134x.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/lpc134x.h b/lpc134x.h index cb41088..002f7cd 100644 --- a/lpc134x.h +++ b/lpc134x.h @@ -2770,7 +2770,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn) #define TMR_TMR16B0TCR_COUNTERENABLE_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR16B0TCR_COUNTERRESET_MASK ((unsigned int) 0x00000002) #define TMR_TMR16B0TCR_COUNTERRESET_ENABLED ((unsigned int) 0x00000002) -#define TMR_TMR16B0TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000002) +#define TMR_TMR16B0TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR16B0MCR_MR0_INT_MASK ((unsigned int) 0x00000001) // Interrupt on MRO #define TMR_TMR16B0MCR_MR0_INT_ENABLED ((unsigned int) 0x00000001) @@ -2904,7 +2904,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn) #define TMR_TMR16B1TCR_COUNTERENABLE_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR16B1TCR_COUNTERRESET_MASK ((unsigned int) 0x00000002) #define TMR_TMR16B1TCR_COUNTERRESET_ENABLED ((unsigned int) 0x00000002) -#define TMR_TMR16B1TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000002) +#define TMR_TMR16B1TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR16B1MCR_MR0_INT_MASK ((unsigned int) 0x00000001) // Interrupt on MRO #define TMR_TMR16B1MCR_MR0_INT_ENABLED ((unsigned int) 0x00000001) @@ -3042,7 +3042,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn) #define TMR_TMR32B0TCR_COUNTERENABLE_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR32B0TCR_COUNTERRESET_MASK ((unsigned int) 0x00000002) #define TMR_TMR32B0TCR_COUNTERRESET_ENABLED ((unsigned int) 0x00000002) -#define TMR_TMR32B0TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000002) +#define TMR_TMR32B0TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR32B0MCR_MR0_INT_MASK ((unsigned int) 0x00000001) // Interrupt on MRO #define TMR_TMR32B0MCR_MR0_INT_ENABLED ((unsigned int) 0x00000001) @@ -3176,7 +3176,7 @@ static inline void NVIC_DisableIRQ(IRQn_t IRQn) #define TMR_TMR32B1TCR_COUNTERENABLE_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR32B1TCR_COUNTERRESET_MASK ((unsigned int) 0x00000002) #define TMR_TMR32B1TCR_COUNTERRESET_ENABLED ((unsigned int) 0x00000002) -#define TMR_TMR32B1TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000002) +#define TMR_TMR32B1TCR_COUNTERRESET_DISABLED ((unsigned int) 0x00000000) #define TMR_TMR32B1MCR_MR0_INT_MASK ((unsigned int) 0x00000001) // Interrupt on MRO #define TMR_TMR32B1MCR_MR0_INT_ENABLED ((unsigned int) 0x00000001) -- 2.20.1