target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch

   1 When building with a toolchain that is configured to produce 32-bits executable
   2 by default, we will produce __lshrti3 in sched_clock() which is never resolved
   3 so the kernel fails to link. Unconditionally use the inline assemble version
   4 as suggested by David Daney, which works around the issue.
   5
   6 CC: David Daney <ddaney@caviumnetworks.com>
   7 Signed-off-by: Florian Fainelli <florian@openwrt.org>
   8 ---
   9  arch/mips/cavium-octeon/csrc-octeon.c |    8 --------
  10  1 files changed, 0 insertions(+), 8 deletions(-)
  11
  12 diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
  13 index 0bf4bbe..36400d2 100644
  14 --- a/arch/mips/cavium-octeon/csrc-octeon.c
  15 +++ b/arch/mips/cavium-octeon/csrc-octeon.c
  16 @@ -53,7 +53,6 @@ static struct clocksource clocksource_mips = {
  17  unsigned long long notrace sched_clock(void)
  18  {
  19         /* 64-bit arithmatic can overflow, so use 128-bit.  */
  20 -#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
  21         u64 t1, t2, t3;
  22         unsigned long long rv;
  23         u64 mult = clocksource_mips.mult;
  24 @@ -73,13 +72,6 @@ unsigned long long notrace sched_clock(void)
  25                 : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
  26                 : "hi", "lo");
  27         return rv;
  28 -#else
  29 -       /* GCC > 4.3 do it the easy way.  */
  30 -       unsigned int __attribute__((mode(TI))) t;
  31 -       t = read_c0_cvmcount();
  32 -       t = t * clocksource_mips.mult;
  33 -       return (unsigned long long)(t >> clocksource_mips.shift);
  34 -#endif
  35  }
  36
  37  void __init plat_time_init(void)
  38 --
  39 1.7.1
  40