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[openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include "ar8216.h"
33
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
37
38 struct ar8216_priv {
39 struct switch_dev dev;
40 struct phy_device *phy;
41 u32 (*read)(struct ar8216_priv *priv, int reg);
42 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43 const struct net_device_ops *ndo_old;
44 struct net_device_ops ndo;
45 struct mutex reg_mutex;
46 int chip;
47 bool initialized;
48 bool port4_phy;
49 char buf[80];
50
51 bool init;
52
53 /* all fields below are cleared on reset */
54 bool vlan;
55 u16 vlan_id[AR8X16_MAX_VLANS];
56 u8 vlan_table[AR8X16_MAX_VLANS];
57 u8 vlan_tagged;
58 u16 pvid[AR8216_NUM_PORTS];
59 };
60
61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
62
63 static inline void
64 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
65 {
66 regaddr >>= 1;
67 *r1 = regaddr & 0x1e;
68
69 regaddr >>= 5;
70 *r2 = regaddr & 0x7;
71
72 regaddr >>= 3;
73 *page = regaddr & 0x1ff;
74 }
75
76 static u32
77 ar8216_mii_read(struct ar8216_priv *priv, int reg)
78 {
79 struct phy_device *phy = priv->phy;
80 u16 r1, r2, page;
81 u16 lo, hi;
82
83 split_addr((u32) reg, &r1, &r2, &page);
84 mdiobus_write(phy->bus, 0x18, 0, page);
85 msleep(1); /* wait for the page switch to propagate */
86 lo = mdiobus_read(phy->bus, 0x10 | r2, r1);
87 hi = mdiobus_read(phy->bus, 0x10 | r2, r1 + 1);
88
89 return (hi << 16) | lo;
90 }
91
92 static void
93 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
94 {
95 struct phy_device *phy = priv->phy;
96 u16 r1, r2, r3;
97 u16 lo, hi;
98
99 split_addr((u32) reg, &r1, &r2, &r3);
100 mdiobus_write(phy->bus, 0x18, 0, r3);
101 msleep(1); /* wait for the page switch to propagate */
102
103 lo = val & 0xffff;
104 hi = (u16) (val >> 16);
105 mdiobus_write(phy->bus, 0x10 | r2, r1 + 1, hi);
106 mdiobus_write(phy->bus, 0x10 | r2, r1, lo);
107 }
108
109 static u32
110 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
111 {
112 u32 v;
113
114 v = priv->read(priv, reg);
115 v &= ~mask;
116 v |= val;
117 priv->write(priv, reg, v);
118
119 return v;
120 }
121
122 static inline int
123 ar8216_id_chip(struct ar8216_priv *priv)
124 {
125 u32 val;
126 u16 id;
127 int i;
128
129 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
130 if (val == ~0)
131 return UNKNOWN;
132
133 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
134 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
135 u16 t;
136
137 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
138 if (val == ~0)
139 return UNKNOWN;
140
141 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
142 if (t != id)
143 return UNKNOWN;
144 }
145
146 switch (id) {
147 case 0x0101:
148 return AR8216;
149 case 0x0301:
150 return AR8236;
151 case 0x1000:
152 case 0x1001:
153 return AR8316;
154 default:
155 printk(KERN_DEBUG
156 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
157 (int)(id >> AR8216_CTRL_VERSION_S),
158 (int)(id & AR8216_CTRL_REVISION),
159 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
160 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
161
162 return UNKNOWN;
163 }
164 }
165
166 static int
167 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
168 struct switch_val *val)
169 {
170 struct ar8216_priv *priv = to_ar8216(dev);
171 priv->vlan = !!val->value.i;
172 return 0;
173 }
174
175 static int
176 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
177 struct switch_val *val)
178 {
179 struct ar8216_priv *priv = to_ar8216(dev);
180 val->value.i = priv->vlan;
181 return 0;
182 }
183
184
185 static int
186 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
187 {
188 struct ar8216_priv *priv = to_ar8216(dev);
189
190 /* make sure no invalid PVIDs get set */
191
192 if (vlan >= dev->vlans)
193 return -EINVAL;
194
195 priv->pvid[port] = vlan;
196 return 0;
197 }
198
199 static int
200 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
201 {
202 struct ar8216_priv *priv = to_ar8216(dev);
203 *vlan = priv->pvid[port];
204 return 0;
205 }
206
207 static int
208 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
209 struct switch_val *val)
210 {
211 struct ar8216_priv *priv = to_ar8216(dev);
212 priv->vlan_id[val->port_vlan] = val->value.i;
213 return 0;
214 }
215
216 static int
217 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
218 struct switch_val *val)
219 {
220 struct ar8216_priv *priv = to_ar8216(dev);
221 val->value.i = priv->vlan_id[val->port_vlan];
222 return 0;
223 }
224
225 static const char *ar8216_speed_str(unsigned speed)
226 {
227 switch (speed) {
228 case AR8216_PORT_SPEED_10M:
229 return "10baseT";
230 case AR8216_PORT_SPEED_100M:
231 return "100baseT";
232 case AR8216_PORT_SPEED_1000M:
233 return "1000baseT";
234 }
235
236 return "unknown";
237 }
238
239 static int ar8216_port_get_link(struct switch_dev *dev,
240 const struct switch_attr *attr,
241 struct switch_val *val)
242 {
243 struct ar8216_priv *priv = to_ar8216(dev);
244 u32 len;
245 u32 status;
246 int port;
247
248 port = val->port_vlan;
249
250 memset(priv->buf, '\0', sizeof(priv->buf));
251 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
252
253 if (status & AR8216_PORT_STATUS_LINK_UP) {
254 len = snprintf(priv->buf, sizeof(priv->buf),
255 "port:%d link:up speed:%s %s-duplex %s%s%s",
256 port,
257 ar8216_speed_str((status &
258 AR8216_PORT_STATUS_SPEED) >>
259 AR8216_PORT_STATUS_SPEED_S),
260 (status & AR8216_PORT_STATUS_DUPLEX) ?
261 "full" : "half",
262 (status & AR8216_PORT_STATUS_TXFLOW) ?
263 "txflow ": "",
264 (status & AR8216_PORT_STATUS_RXFLOW) ?
265 "rxflow " : "",
266 (status & AR8216_PORT_STATUS_LINK_AUTO) ?
267 "auto ": "");
268 } else {
269 len = snprintf(priv->buf, sizeof(priv->buf), "port:%d link:down",
270 port);
271 }
272
273 val->value.s = priv->buf;
274 val->len = len;
275
276 return 0;
277 }
278
279 static int
280 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
281 {
282 struct ar8216_priv *priv = dev->phy_ptr;
283 unsigned char *buf;
284
285 if (unlikely(!priv))
286 goto error;
287
288 if (!priv->vlan)
289 goto send;
290
291 if (unlikely(skb_headroom(skb) < 2)) {
292 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
293 goto error;
294 }
295
296 buf = skb_push(skb, 2);
297 buf[0] = 0x10;
298 buf[1] = 0x80;
299
300 send:
301 return priv->ndo_old->ndo_start_xmit(skb, dev);
302
303 error:
304 dev_kfree_skb_any(skb);
305 return 0;
306 }
307
308 static int
309 ar8216_mangle_rx(struct sk_buff *skb, int napi)
310 {
311 struct ar8216_priv *priv;
312 struct net_device *dev;
313 unsigned char *buf;
314 int port, vlan;
315
316 dev = skb->dev;
317 if (!dev)
318 goto error;
319
320 priv = dev->phy_ptr;
321 if (!priv)
322 goto error;
323
324 /* don't strip the header if vlan mode is disabled */
325 if (!priv->vlan)
326 goto recv;
327
328 /* strip header, get vlan id */
329 buf = skb->data;
330 skb_pull(skb, 2);
331
332 /* check for vlan header presence */
333 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
334 goto recv;
335
336 port = buf[0] & 0xf;
337
338 /* no need to fix up packets coming from a tagged source */
339 if (priv->vlan_tagged & (1 << port))
340 goto recv;
341
342 /* lookup port vid from local table, the switch passes an invalid vlan id */
343 vlan = priv->vlan_id[priv->pvid[port]];
344
345 buf[14 + 2] &= 0xf0;
346 buf[14 + 2] |= vlan >> 8;
347 buf[15 + 2] = vlan & 0xff;
348
349 recv:
350 skb->protocol = eth_type_trans(skb, skb->dev);
351
352 if (napi)
353 return netif_receive_skb(skb);
354 else
355 return netif_rx(skb);
356
357 error:
358 /* no vlan? eat the packet! */
359 dev_kfree_skb_any(skb);
360 return NET_RX_DROP;
361 }
362
363 static int
364 ar8216_netif_rx(struct sk_buff *skb)
365 {
366 return ar8216_mangle_rx(skb, 0);
367 }
368
369 static int
370 ar8216_netif_receive_skb(struct sk_buff *skb)
371 {
372 return ar8216_mangle_rx(skb, 1);
373 }
374
375
376 static struct switch_attr ar8216_globals[] = {
377 {
378 .type = SWITCH_TYPE_INT,
379 .name = "enable_vlan",
380 .description = "Enable VLAN mode",
381 .set = ar8216_set_vlan,
382 .get = ar8216_get_vlan,
383 .max = 1
384 },
385 };
386
387 static struct switch_attr ar8216_port[] = {
388 {
389 .type = SWITCH_TYPE_STRING,
390 .name = "link",
391 .description = "Get port link information",
392 .max = 1,
393 .set = NULL,
394 .get = ar8216_port_get_link,
395 },
396 };
397
398 static struct switch_attr ar8216_vlan[] = {
399 {
400 .type = SWITCH_TYPE_INT,
401 .name = "vid",
402 .description = "VLAN ID (0-4094)",
403 .set = ar8216_set_vid,
404 .get = ar8216_get_vid,
405 .max = 4094,
406 },
407 };
408
409
410 static int
411 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
412 {
413 struct ar8216_priv *priv = to_ar8216(dev);
414 u8 ports = priv->vlan_table[val->port_vlan];
415 int i;
416
417 val->len = 0;
418 for (i = 0; i < AR8216_NUM_PORTS; i++) {
419 struct switch_port *p;
420
421 if (!(ports & (1 << i)))
422 continue;
423
424 p = &val->value.ports[val->len++];
425 p->id = i;
426 if (priv->vlan_tagged & (1 << i))
427 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
428 else
429 p->flags = 0;
430 }
431 return 0;
432 }
433
434 static int
435 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
436 {
437 struct ar8216_priv *priv = to_ar8216(dev);
438 u8 *vt = &priv->vlan_table[val->port_vlan];
439 int i, j;
440
441 *vt = 0;
442 for (i = 0; i < val->len; i++) {
443 struct switch_port *p = &val->value.ports[i];
444
445 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
446 priv->vlan_tagged |= (1 << p->id);
447 else {
448 priv->vlan_tagged &= ~(1 << p->id);
449 priv->pvid[p->id] = val->port_vlan;
450
451 /* make sure that an untagged port does not
452 * appear in other vlans */
453 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
454 if (j == val->port_vlan)
455 continue;
456 priv->vlan_table[j] &= ~(1 << p->id);
457 }
458 }
459
460 *vt |= 1 << p->id;
461 }
462 return 0;
463 }
464
465 static int
466 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
467 {
468 int timeout = 20;
469
470 while ((priv->read(priv, reg) & mask) != val) {
471 if (timeout-- <= 0) {
472 printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
473 return 1;
474 }
475 }
476 return 0;
477 }
478
479 static void
480 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
481 {
482 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
483 return;
484 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
485 val &= AR8216_VTUDATA_MEMBER;
486 val |= AR8216_VTUDATA_VALID;
487 priv->write(priv, AR8216_REG_VTU_DATA, val);
488 }
489 op |= AR8216_VTU_ACTIVE;
490 priv->write(priv, AR8216_REG_VTU, op);
491 }
492
493 static void
494 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
495 u32 members, u32 pvid)
496 {
497 u32 header;
498
499 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
500 header = AR8216_PORT_CTRL_HEADER;
501 else
502 header = 0;
503
504 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
505 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
506 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
507 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
508 AR8216_PORT_CTRL_LEARN | header |
509 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
510 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
511
512 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
513 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
514 AR8216_PORT_VLAN_DEFAULT_ID,
515 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
516 (ingress << AR8216_PORT_VLAN_MODE_S) |
517 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
518 }
519
520 static void
521 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
522 u32 members, u32 pvid)
523 {
524 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
525 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
526 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
527 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
528 AR8216_PORT_CTRL_LEARN |
529 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
530 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
531
532 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
533 AR8236_PORT_VLAN_DEFAULT_ID,
534 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
535
536 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
537 AR8236_PORT_VLAN2_VLAN_MODE |
538 AR8236_PORT_VLAN2_MEMBER,
539 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
540 (members << AR8236_PORT_VLAN2_MEMBER_S));
541 }
542
543 static int
544 ar8216_hw_apply(struct switch_dev *dev)
545 {
546 struct ar8216_priv *priv = to_ar8216(dev);
547 u8 portmask[AR8216_NUM_PORTS];
548 int i, j;
549
550 mutex_lock(&priv->reg_mutex);
551 /* flush all vlan translation unit entries */
552 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
553
554 memset(portmask, 0, sizeof(portmask));
555 if (!priv->init) {
556 /* calculate the port destination masks and load vlans
557 * into the vlan translation unit */
558 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
559 u8 vp = priv->vlan_table[j];
560
561 if (!vp)
562 continue;
563
564 for (i = 0; i < AR8216_NUM_PORTS; i++) {
565 u8 mask = (1 << i);
566 if (vp & mask)
567 portmask[i] |= vp & ~mask;
568 }
569
570 ar8216_vtu_op(priv,
571 AR8216_VTU_OP_LOAD |
572 (priv->vlan_id[j] << AR8216_VTU_VID_S),
573 priv->vlan_table[j]);
574 }
575 } else {
576 /* vlan disabled:
577 * isolate all ports, but connect them to the cpu port */
578 for (i = 0; i < AR8216_NUM_PORTS; i++) {
579 if (i == AR8216_PORT_CPU)
580 continue;
581
582 portmask[i] = 1 << AR8216_PORT_CPU;
583 portmask[AR8216_PORT_CPU] |= (1 << i);
584 }
585 }
586
587 /* update the port destination mask registers and tag settings */
588 for (i = 0; i < AR8216_NUM_PORTS; i++) {
589 int egress, ingress;
590 int pvid;
591
592 if (priv->vlan) {
593 pvid = priv->vlan_id[priv->pvid[i]];
594 } else {
595 pvid = i;
596 }
597
598 if (priv->vlan) {
599 if (priv->vlan_tagged & (1 << i))
600 egress = AR8216_OUT_ADD_VLAN;
601 else
602 egress = AR8216_OUT_STRIP_VLAN;
603 } else {
604 egress = AR8216_OUT_KEEP;
605 }
606 if (priv->vlan) {
607 ingress = AR8216_IN_SECURE;
608 } else {
609 ingress = AR8216_IN_PORT_ONLY;
610 }
611
612 if (priv->chip == AR8236)
613 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
614 pvid);
615 else
616 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
617 pvid);
618 }
619 mutex_unlock(&priv->reg_mutex);
620 return 0;
621 }
622
623 static int
624 ar8236_hw_init(struct ar8216_priv *priv) {
625 static int initialized;
626 int i;
627 struct mii_bus *bus;
628
629 if (initialized)
630 return 0;
631
632 /* Initialize the PHYs */
633 bus = priv->phy->bus;
634 for (i = 0; i < 5; i++) {
635 bus->write(bus, i, MII_ADVERTISE,
636 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
637 ADVERTISE_PAUSE_ASYM);
638 bus->write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
639 }
640 msleep(1000);
641
642 initialized = true;
643 return 0;
644 }
645
646 static int
647 ar8316_hw_init(struct ar8216_priv *priv) {
648 int i;
649 u32 val, newval;
650 struct mii_bus *bus;
651
652 val = priv->read(priv, 0x8);
653
654 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
655 if (priv->port4_phy) {
656 /* value taken from Ubiquiti RouterStation Pro */
657 newval = 0x81461bea;
658 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
659 } else {
660 newval = 0x01261be2;
661 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
662 }
663 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
664 /* value taken from AVM Fritz!Box 7390 sources */
665 newval = 0x010e5b71;
666 } else {
667 /* no known value for phy interface */
668 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
669 priv->phy->interface);
670 return -EINVAL;
671 }
672
673 if (val == newval)
674 goto out;
675
676 priv->write(priv, 0x8, newval);
677
678 /* standard atheros magic */
679 priv->write(priv, 0x38, 0xc000050e);
680
681 /* Initialize the ports */
682 bus = priv->phy->bus;
683 for (i = 0; i < 5; i++) {
684 if ((i == 4) && priv->port4_phy &&
685 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
686 /* work around for phy4 rgmii mode */
687 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
688 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
689 /* rx delay */
690 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
691 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
692 /* tx delay */
693 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
694 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
695 msleep(1000);
696 }
697
698 /* initialize the port itself */
699 mdiobus_write(bus, i, MII_ADVERTISE,
700 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
701 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
702 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
703 msleep(1000);
704 }
705
706 out:
707 priv->initialized = true;
708 return 0;
709 }
710
711 static int
712 ar8216_reset_switch(struct switch_dev *dev)
713 {
714 struct ar8216_priv *priv = to_ar8216(dev);
715 int i;
716
717 mutex_lock(&priv->reg_mutex);
718 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
719 offsetof(struct ar8216_priv, vlan));
720 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
721 priv->vlan_id[i] = i;
722 }
723 for (i = 0; i < AR8216_NUM_PORTS; i++) {
724 /* Enable port learning and tx */
725 priv->write(priv, AR8216_REG_PORT_CTRL(i),
726 AR8216_PORT_CTRL_LEARN |
727 (4 << AR8216_PORT_CTRL_STATE_S));
728
729 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
730
731 /* Configure all PHYs */
732 if (i == AR8216_PORT_CPU) {
733 priv->write(priv, AR8216_REG_PORT_STATUS(i),
734 AR8216_PORT_STATUS_LINK_UP |
735 ((priv->chip == AR8316) ?
736 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
737 AR8216_PORT_STATUS_TXMAC |
738 AR8216_PORT_STATUS_RXMAC |
739 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
740 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
741 AR8216_PORT_STATUS_DUPLEX);
742 } else {
743 priv->write(priv, AR8216_REG_PORT_STATUS(i),
744 AR8216_PORT_STATUS_LINK_AUTO);
745 }
746 }
747 /* XXX: undocumented magic from atheros, required! */
748 priv->write(priv, 0x38, 0xc000050e);
749
750 if (priv->chip == AR8216) {
751 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
752 AR8216_GCTRL_MTU, 1518 + 8 + 2);
753 } else if (priv->chip == AR8316 ||
754 priv->chip == AR8236) {
755 /* enable jumbo frames */
756 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
757 AR8316_GCTRL_MTU, 9018 + 8 + 2);
758 }
759
760 if (priv->chip == AR8316) {
761 /* enable cpu port to receive multicast and broadcast frames */
762 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
763 }
764 mutex_unlock(&priv->reg_mutex);
765 return ar8216_hw_apply(dev);
766 }
767
768
769 static const struct switch_dev_ops ar8216_ops = {
770 .attr_global = {
771 .attr = ar8216_globals,
772 .n_attr = ARRAY_SIZE(ar8216_globals),
773 },
774 .attr_port = {
775 .attr = ar8216_port,
776 .n_attr = ARRAY_SIZE(ar8216_port),
777 },
778 .attr_vlan = {
779 .attr = ar8216_vlan,
780 .n_attr = ARRAY_SIZE(ar8216_vlan),
781 },
782 .get_port_pvid = ar8216_get_pvid,
783 .set_port_pvid = ar8216_set_pvid,
784 .get_vlan_ports = ar8216_get_ports,
785 .set_vlan_ports = ar8216_set_ports,
786 .apply_config = ar8216_hw_apply,
787 .reset_switch = ar8216_reset_switch,
788 };
789
790 static int
791 ar8216_config_init(struct phy_device *pdev)
792 {
793 struct ar8216_priv *priv = pdev->priv;
794 struct net_device *dev = pdev->attached_dev;
795 struct switch_dev *swdev;
796 int ret;
797
798 if (!priv) {
799 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
800 if (priv == NULL)
801 return -ENOMEM;
802 }
803
804 priv->phy = pdev;
805
806 priv->chip = ar8216_id_chip(priv);
807
808 if (pdev->addr != 0) {
809 if (priv->chip == AR8316) {
810 pdev->supported |= SUPPORTED_1000baseT_Full;
811 pdev->advertising |= ADVERTISED_1000baseT_Full;
812
813 /* check if we're attaching to the switch twice */
814 pdev = pdev->bus->phy_map[0];
815 if (!pdev) {
816 kfree(priv);
817 return 0;
818 }
819
820 /* switch device has not been initialized, reuse priv */
821 if (!pdev->priv) {
822 priv->port4_phy = true;
823 pdev->priv = priv;
824 return 0;
825 }
826
827 kfree(priv);
828
829 /* switch device has been initialized, reinit */
830 priv = pdev->priv;
831 priv->dev.ports = (AR8216_NUM_PORTS - 1);
832 priv->initialized = false;
833 priv->port4_phy = true;
834 ar8316_hw_init(priv);
835 return 0;
836 }
837
838 kfree(priv);
839 return 0;
840 }
841
842 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
843 pdev->attached_dev->name, priv->chip);
844
845 pdev->supported = priv->chip == AR8316 ?
846 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
847 pdev->advertising = pdev->supported;
848
849 mutex_init(&priv->reg_mutex);
850 priv->read = ar8216_mii_read;
851 priv->write = ar8216_mii_write;
852
853 pdev->priv = priv;
854
855 swdev = &priv->dev;
856 swdev->cpu_port = AR8216_PORT_CPU;
857 swdev->ops = &ar8216_ops;
858 swdev->ports = AR8216_NUM_PORTS;
859
860 if (priv->chip == AR8316) {
861 swdev->name = "Atheros AR8316";
862 swdev->vlans = AR8X16_MAX_VLANS;
863
864 if (priv->port4_phy) {
865 /* port 5 connected to the other mac, therefore unusable */
866 swdev->ports = (AR8216_NUM_PORTS - 1);
867 }
868 } else if (priv->chip == AR8236) {
869 swdev->name = "Atheros AR8236";
870 swdev->vlans = AR8216_NUM_VLANS;
871 swdev->ports = AR8216_NUM_PORTS;
872 } else {
873 swdev->name = "Atheros AR8216";
874 swdev->vlans = AR8216_NUM_VLANS;
875 }
876
877 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
878 kfree(priv);
879 goto done;
880 }
881
882 priv->init = true;
883
884 if (priv->chip == AR8316) {
885 ret = ar8316_hw_init(priv);
886 if (ret) {
887 kfree(priv);
888 goto done;
889 }
890 }
891
892 if (priv->chip == AR8236) {
893 ret = ar8236_hw_init(priv);
894 if (ret) {
895 kfree(priv);
896 goto done;
897 }
898 }
899
900 ret = ar8216_reset_switch(&priv->dev);
901 if (ret) {
902 kfree(priv);
903 goto done;
904 }
905
906 dev->phy_ptr = priv;
907
908 /* VID fixup only needed on ar8216 */
909 if (pdev->addr == 0 && priv->chip == AR8216) {
910 pdev->pkt_align = 2;
911 pdev->netif_receive_skb = ar8216_netif_receive_skb;
912 pdev->netif_rx = ar8216_netif_rx;
913 priv->ndo_old = dev->netdev_ops;
914 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
915 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
916 dev->netdev_ops = &priv->ndo;
917 }
918
919 priv->init = false;
920
921 done:
922 return ret;
923 }
924
925 static int
926 ar8216_read_status(struct phy_device *phydev)
927 {
928 struct ar8216_priv *priv = phydev->priv;
929 int ret;
930 if (phydev->addr != 0) {
931 return genphy_read_status(phydev);
932 }
933
934 phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
935 phydev->duplex = DUPLEX_FULL;
936 phydev->link = 1;
937
938 /* flush the address translation unit */
939 mutex_lock(&priv->reg_mutex);
940 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
941
942 if (!ret)
943 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
944 else
945 ret = -ETIMEDOUT;
946 mutex_unlock(&priv->reg_mutex);
947
948 phydev->state = PHY_RUNNING;
949 netif_carrier_on(phydev->attached_dev);
950 phydev->adjust_link(phydev->attached_dev);
951
952 return ret;
953 }
954
955 static int
956 ar8216_config_aneg(struct phy_device *phydev)
957 {
958 if (phydev->addr == 0)
959 return 0;
960
961 return genphy_config_aneg(phydev);
962 }
963
964 static int
965 ar8216_probe(struct phy_device *pdev)
966 {
967 struct ar8216_priv priv;
968 u16 chip;
969
970 priv.phy = pdev;
971 chip = ar8216_id_chip(&priv);
972 if (chip == UNKNOWN)
973 return -ENODEV;
974
975 return 0;
976 }
977
978 static void
979 ar8216_remove(struct phy_device *pdev)
980 {
981 struct ar8216_priv *priv = pdev->priv;
982 struct net_device *dev = pdev->attached_dev;
983
984 if (!priv)
985 return;
986
987 if (priv->ndo_old && dev)
988 dev->netdev_ops = priv->ndo_old;
989 if (pdev->addr == 0)
990 unregister_switch(&priv->dev);
991 kfree(priv);
992 }
993
994 static struct phy_driver ar8216_driver = {
995 .phy_id = 0x004d0000,
996 .name = "Atheros AR8216/AR8236/AR8316",
997 .phy_id_mask = 0xffff0000,
998 .features = PHY_BASIC_FEATURES,
999 .probe = ar8216_probe,
1000 .remove = ar8216_remove,
1001 .config_init = &ar8216_config_init,
1002 .config_aneg = &ar8216_config_aneg,
1003 .read_status = &ar8216_read_status,
1004 .driver = { .owner = THIS_MODULE },
1005 };
1006
1007 int __init
1008 ar8216_init(void)
1009 {
1010 return phy_driver_register(&ar8216_driver);
1011 }
1012
1013 void __exit
1014 ar8216_exit(void)
1015 {
1016 phy_driver_unregister(&ar8216_driver);
1017 }
1018
1019 module_init(ar8216_init);
1020 module_exit(ar8216_exit);
1021 MODULE_LICENSE("GPL");
1022
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