update Sidewinder patch, add support for the ethernet interfaces
[openwrt.git] / target / linux / brcm63xx / patches-2.6.25 / 001-bcm963xx.patch
1 From 2b2b8e163d28646cbbfde81c900fbb57d6572a11 Mon Sep 17 00:00:00 2001
2 From: Axel Gembe <ago@bastart.eu.org>
3 Date: Thu, 15 May 2008 11:00:43 +0200
4 Subject: [PATCH] bcm963xx: board support
5
6
7 Signed-off-by: Axel Gembe <ago@bastart.eu.org>
8 ---
9 arch/mips/Kconfig | 11 +++++++++++
10 arch/mips/Makefile | 4 ++++
11 arch/mips/kernel/cpu-probe.c | 16 ++++++++++++++++
12 arch/mips/mm/c-r4k.c | 7 +++++++
13 arch/mips/mm/tlbex.c | 4 ++++
14 arch/mips/pci/Makefile | 1 +
15 include/asm-mips/bootinfo.h | 12 ++++++++++++
16 include/asm-mips/cpu.h | 7 ++++++-
17 8 files changed, 61 insertions(+), 1 deletions(-)
18
19 --- a/arch/mips/Kconfig
20 +++ b/arch/mips/Kconfig
21 @@ -59,6 +59,17 @@
22 help
23 Support for BCM47XX based boards
24
25 +config BCM963XX
26 + bool "Support for Broadcom BCM963xx SoC"
27 + select SYS_SUPPORTS_32BIT_KERNEL
28 + select SYS_SUPPORTS_BIG_ENDIAN
29 + select SYS_HAS_CPU_MIPS32_R1
30 + select HW_HAS_PCI
31 + select DMA_NONCOHERENT
32 + select IRQ_CPU
33 + help
34 + This is a fmaily of boards based on the Broadcom MIPS32
35 +
36 config MIPS_COBALT
37 bool "Cobalt Server"
38 select CEVT_R4K
39 --- a/arch/mips/Makefile
40 +++ b/arch/mips/Makefile
41 @@ -560,6 +560,10 @@
42 cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx
43 load-$(CONFIG_BCM47XX) := 0xffffffff80001000
44
45 +core-$(CONFIG_BCM963XX) += arch/mips/bcm963xx/
46 +cflags-$(CONFIG_BCM963XX) += -Iinclude/asm-mips/mach-bcm963xx
47 +load-$(CONFIG_BCM963XX) := 0xffffffff8001000
48 +
49 #
50 # SNI RM
51 #
52 --- a/arch/mips/kernel/cpu-probe.c
53 +++ b/arch/mips/kernel/cpu-probe.c
54 @@ -803,6 +803,21 @@
55 case PRID_IMP_BCM4710:
56 c->cputype = CPU_BCM4710;
57 break;
58 +// case PRID_IMP_BCM6338:
59 +// c->cputype = CPU_BCM6338;
60 +// break;
61 + case PRID_IMP_BCM6345:
62 + c->cputype = CPU_BCM6345;
63 + break;
64 + case PRID_IMP_BCM6348:
65 + c->cputype = CPU_BCM6348;
66 + break;
67 + case PRID_IMP_BCM6358:
68 + c->cputype = CPU_BCM6358;
69 + break;
70 + case PRID_IMP_BCM3350:
71 + c->cputype = CPU_BCM3350;
72 + break;
73 default:
74 c->cputype = CPU_UNKNOWN;
75 break;
76 @@ -887,6 +902,11 @@
77 case CPU_SR71000: name = "Sandcraft SR71000"; break;
78 case CPU_BCM3302: name = "Broadcom BCM3302"; break;
79 case CPU_BCM4710: name = "Broadcom BCM4710"; break;
80 + case CPU_BCM6338: name = "Broadcom BCM6338"; break;
81 + case CPU_BCM6345: name = "Broadcom BCM6345"; break;
82 + case CPU_BCM6348: name = "Broadcom BCM6348"; break;
83 + case CPU_BCM6358: name = "Broadcom BCM6358"; break;
84 + case CPU_BCM3350: name = "Broadcom BCM3350"; break;
85 case CPU_PR4450: name = "Philips PR4450"; break;
86 case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
87 default:
88 --- a/arch/mips/mm/c-r4k.c
89 +++ b/arch/mips/mm/c-r4k.c
90 @@ -882,6 +882,13 @@
91 if (!(config & MIPS_CONF_M))
92 panic("Don't know how to probe P-caches on this cpu.");
93
94 + if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348 || c->cputype == CPU_BCM6358 || c->cputype == CPU_BCM3350)
95 + {
96 + printk("bcm963xx: enabling icache and dcache...\n");
97 + /* Enable caches */
98 + write_c0_diag(read_c0_diag() | 0xC0000000);
99 + }
100 +
101 /*
102 * So we seem to be a MIPS32 or MIPS64 CPU
103 * So let's probe the I-cache ...
104 --- a/arch/mips/mm/tlbex.c
105 +++ b/arch/mips/mm/tlbex.c
106 @@ -315,6 +315,11 @@
107 case CPU_25KF:
108 case CPU_BCM3302:
109 case CPU_BCM4710:
110 +// case CPU_BCM6338:
111 + case CPU_BCM6345:
112 + case CPU_BCM6348:
113 + case CPU_BCM6358:
114 + case CPU_BCM3350:
115 case CPU_LOONGSON2:
116 if (m4kc_tlbp_war())
117 uasm_i_nop(p);
118 --- a/arch/mips/pci/Makefile
119 +++ b/arch/mips/pci/Makefile
120 @@ -48,3 +48,4 @@
121 obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
122 obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
123 obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
124 +obj-$(CONFIG_BCM963XX) += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
125 --- a/include/asm-mips/bootinfo.h
126 +++ b/include/asm-mips/bootinfo.h
127 @@ -94,6 +94,19 @@
128 #define MACH_MSP7120_FPGA 5 /* PMC-Sierra MSP7120 Emulation */
129 #define MACH_MSP_OTHER 255 /* PMC-Sierra unknown board type */
130
131 +#define MACH_WRPPMC 1
132 +
133 +/*
134 + * Valid machtype for group Broadcom
135 + */
136 +#define MACH_GROUP_BRCM 23 /* Broadcom */
137 +#define MACH_BCM47XX 1 /* Broadcom BCM47XX */
138 +#define MACH_BCM96338 2
139 +#define MACH_BCM96345 3
140 +#define MACH_BCM96348 4
141 +#define MACH_BCM96358 5
142 +#define MACH_BCM3350 6
143 +
144 #define CL_SIZE COMMAND_LINE_SIZE
145
146 extern char *system_type;
147 --- a/include/asm-mips/cpu.h
148 +++ b/include/asm-mips/cpu.h
149 @@ -111,6 +111,11 @@
150
151 #define PRID_IMP_BCM4710 0x4000
152 #define PRID_IMP_BCM3302 0x9000
153 +//#define PRID_IMP_BCM6338 0x9000
154 +#define PRID_IMP_BCM6345 0x8000
155 +#define PRID_IMP_BCM6348 0x9100
156 +#define PRID_IMP_BCM6358 0xA000
157 +#define PRID_IMP_BCM3350 0x28000
158
159 /*
160 * Definitions for 7:0 on legacy processors
161 @@ -196,7 +201,8 @@
162 */
163 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_74K, CPU_AU1000,
164 CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500, CPU_AU1550,
165 - CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
166 + CPU_PR4450, CPU_BCM3302, CPU_BCM4710, CPU_BCM6338, CPU_BCM6345, CPU_BCM6348,
167 + CPU_BCM6358, CPU_BCM3350,
168
169 /*
170 * MIPS64 class processors
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