add lcd4version. compiles now, but i have no clue if it will work with some lcd displays
[openwrt.git] / openwrt / package / linux / kernel-source / include / bcmdevs.h
1 /*
2 * Broadcom device-specific manifest constants.
3 *
4 * Copyright 2004, Broadcom Corporation
5 * All Rights Reserved.
6 *
7 * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
8 * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
9 * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
10 * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
11 * $Id$
12 */
13
14 #ifndef _BCMDEVS_H
15 #define _BCMDEVS_H
16
17
18 /* Known PCI vendor Id's */
19 #define VENDOR_EPIGRAM 0xfeda
20 #define VENDOR_BROADCOM 0x14e4
21 #define VENDOR_3COM 0x10b7
22 #define VENDOR_NETGEAR 0x1385
23 #define VENDOR_DIAMOND 0x1092
24 #define VENDOR_DELL 0x1028
25 #define VENDOR_HP 0x0e11
26 #define VENDOR_APPLE 0x106b
27
28 /* PCI Device Id's */
29 #define BCM4210_DEVICE_ID 0x1072 /* never used */
30 #define BCM4211_DEVICE_ID 0x4211
31 #define BCM4230_DEVICE_ID 0x1086 /* never used */
32 #define BCM4231_DEVICE_ID 0x4231
33
34 #define BCM4410_DEVICE_ID 0x4410 /* bcm44xx family pci iline */
35 #define BCM4430_DEVICE_ID 0x4430 /* bcm44xx family cardbus iline */
36 #define BCM4412_DEVICE_ID 0x4412 /* bcm44xx family pci enet */
37 #define BCM4432_DEVICE_ID 0x4432 /* bcm44xx family cardbus enet */
38
39 #define BCM3352_DEVICE_ID 0x3352 /* bcm3352 device id */
40 #define BCM3360_DEVICE_ID 0x3360 /* bcm3360 device id */
41
42 #define EPI41210_DEVICE_ID 0xa0fa /* bcm4210 */
43 #define EPI41230_DEVICE_ID 0xa10e /* bcm4230 */
44
45 #define BCM47XX_ILINE_ID 0x4711 /* 47xx iline20 */
46 #define BCM47XX_V90_ID 0x4712 /* 47xx v90 codec */
47 #define BCM47XX_ENET_ID 0x4713 /* 47xx enet */
48 #define BCM47XX_EXT_ID 0x4714 /* 47xx external i/f */
49 #define BCM47XX_USB_ID 0x4715 /* 47xx usb */
50 #define BCM47XX_USBH_ID 0x4716 /* 47xx usb host */
51 #define BCM47XX_USBD_ID 0x4717 /* 47xx usb device */
52 #define BCM47XX_IPSEC_ID 0x4718 /* 47xx ipsec */
53
54 #define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */
55
56 #define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */
57 #define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */
58 #define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */
59 #define BCM4610_ENET_ID 0x4613 /* 4610 enet */
60 #define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */
61 #define BCM4610_USB_ID 0x4615 /* 4610 usb */
62
63 #define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */
64 #define BCM4402_ENET_ID 0x4402 /* 4402 enet */
65 #define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */
66
67 #define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */
68 #define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */
69
70 #define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */
71 #define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */
72 #define BCM4307_ENET_ID 0x4306 /* 4307 enet */
73 #define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */
74
75 #define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */
76 #define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */
77 #define BCM4306_D11G_ID2 0x4325
78 #define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */
79 #define BCM4306_UART_ID 0x4322 /* 4306 uart */
80 #define BCM4306_V90_ID 0x4323 /* 4306 v90 codec */
81 #define BCM4306_D11DUAL_ID 0x4324 /* 4306 dual A+B */
82
83 #define BCM4309_PKG_ID 1 /* 4309 package id */
84
85 #define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */
86 #define BCM4303_PKG_ID 2 /* 4303 package id */
87
88 #define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */
89 #define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */
90 #define BCM4310_UART_ID 0x4312 /* 4310 uart */
91 #define BCM4310_ENET_ID 0x4313 /* 4310 enet */
92 #define BCM4310_USB_ID 0x4315 /* 4310 usb */
93
94 #define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */
95 #define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */
96
97 #define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */
98
99 #define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */
100 #define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */
101 #define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */
102
103 #define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */
104
105 #define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */
106
107
108 /* PCMCIA vendor Id's */
109
110 #define VENDOR_BROADCOM_PCMCIA 0x02d0
111
112 /* SDIO vendor Id's */
113 #define VENDOR_BROADCOM_SDIO 0x00BF
114
115
116 /* boardflags */
117 #define BFL_BTCOEXIST 0x0001 /* This board implements Bluetooth coexistance */
118 #define BFL_PACTRL 0x0002 /* This board has gpio 9 controlling the PA */
119 #define BFL_AIRLINEMODE 0x0004 /* This board implements gpio13 radio disable indication */
120 #define BFL_ENETSPI 0x0010 /* This board has ephy roboswitch spi */
121 #define BFL_CCKHIPWR 0x0040 /* Can do high-power CCK transmission */
122 #define BFL_ENETADM 0x0080 /* This board has ADMtek switch */
123 #define BFL_ENETVLAN 0x0100 /* This board can do vlan */
124 #define BFL_AFTERBURNER 0x0200 /* This board supports Afterburner mode */
125 #define BFL_NOPCI 0x0400 /* This board leaves PCI floating */
126 #define BFL_FEM 0x0800 /* This board supports the Front End Module */
127
128 /* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
129 #define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */
130 #define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */
131 #define BOARD_GPIO_BTC_OUT 0x100 /* bit 8 is BT Coexistance Out */
132 #define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */
133 #define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
134 #define PCI_CFG_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
135 #define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
136 #define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
137
138 /* Bus types */
139 #define SB_BUS 0 /* Silicon Backplane */
140 #define PCI_BUS 1 /* PCI target */
141 #define PCMCIA_BUS 2 /* PCMCIA target */
142 #define SDIO_BUS 3 /* SDIO target */
143
144 /* power control defines */
145 #define PLL_DELAY 150 /* 150us pll on delay */
146 #define FREF_DELAY 200 /* 200us fref change delay */
147 #define MIN_SLOW_CLK 32 /* 32us Slow clock period */
148
149 /* Reference Board Types */
150
151 #define BU4710_BOARD 0x0400
152 #define VSIM4710_BOARD 0x0401
153 #define QT4710_BOARD 0x0402
154
155 #define BU4610_BOARD 0x0403
156 #define VSIM4610_BOARD 0x0404
157
158 #define BU4307_BOARD 0x0405
159 #define BCM94301CB_BOARD 0x0406
160 #define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */
161 #define BCM94301MP_BOARD 0x0407
162 #define BCM94307MP_BOARD 0x0408
163 #define BCMAP4307_BOARD 0x0409
164
165 #define BU4309_BOARD 0x040a
166 #define BCM94309CB_BOARD 0x040b
167 #define BCM94309MP_BOARD 0x040c
168 #define BCM4309AP_BOARD 0x040d
169
170 #define BCM94302MP_BOARD 0x040e
171
172 #define VSIM4310_BOARD 0x040f
173 #define BU4711_BOARD 0x0410
174 #define BCM94310U_BOARD 0x0411
175 #define BCM94310AP_BOARD 0x0412
176 #define BCM94310MP_BOARD 0x0414
177
178 #define BU4306_BOARD 0x0416
179 #define BCM94306CB_BOARD 0x0417
180 #define BCM94306MP_BOARD 0x0418
181
182 #define BCM94710D_BOARD 0x041a
183 #define BCM94710R1_BOARD 0x041b
184 #define BCM94710R4_BOARD 0x041c
185 #define BCM94710AP_BOARD 0x041d
186
187
188 #define BU2050_BOARD 0x041f
189
190
191 #define BCM94309G_BOARD 0x0421
192
193 #define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */
194
195 #define BU4704_BOARD 0x0423
196 #define BU4702_BOARD 0x0424
197
198 #define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */
199
200 #define BU4317_BOARD 0x0426
201
202
203 #define BCM94702MN_BOARD 0x0428
204
205 /* BCM4702 1U CompactPCI Board */
206 #define BCM94702CPCI_BOARD 0x0429
207
208 /* BCM4702 with BCM95380 VLAN Router */
209 #define BCM95380RR_BOARD 0x042a
210
211 /* cb4306 with SiGe PA */
212 #define BCM94306CBSG_BOARD 0x042b
213
214 /* mp4301 with 2050 radio */
215 #define BCM94301MPL_BOARD 0x042c
216
217 /* cb4306 with SiGe PA */
218 #define PCSG94306_BOARD 0x042d
219
220 /* bu4704 with sdram */
221 #define BU4704SD_BOARD 0x042e
222
223 /* Dual 11a/11g Router */
224 #define BCM94704AGR_BOARD 0x042f
225
226 /* 11a-only minipci */
227 #define BCM94308MP_BOARD 0x0430
228
229
230
231 /* BCM94317 boards */
232 #define BCM94317CB_BOARD 0x0440
233 #define BCM94317MP_BOARD 0x0441
234 #define BCM94317PCMCIA_BOARD 0x0442
235 #define BCM94317SDIO_BOARD 0x0443
236
237 #define BU4712_BOARD 0x0444
238
239 /* BCM4712 boards */
240 #define BCM94712AGR_BOARD 0x0445
241 #define BCM94712AP_BOARD 0x0446
242
243 /* BCM4702 boards */
244 #define CT4702AP_BOARD 0x0447
245
246 /* BRCM 4306 w/ Front End Modules */
247 #define BCM94306MPM 0x0450
248 #define BCM94306MPL 0x0453
249
250
251 #endif /* _BCMDEVS_H */
This page took 0.060092 seconds and 5 git commands to generate.