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[openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include "ar8216.h"
33
34 /* size of the vlan table */
35 #define AR8X16_MAX_VLANS 128
36 #define AR8X16_PROBE_RETRIES 10
37
38 struct ar8216_priv {
39 struct switch_dev dev;
40 struct phy_device *phy;
41 u32 (*read)(struct ar8216_priv *priv, int reg);
42 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
43 const struct net_device_ops *ndo_old;
44 struct net_device_ops ndo;
45 struct mutex reg_mutex;
46 int chip;
47 bool initialized;
48 bool port4_phy;
49 char buf[80];
50
51 bool init;
52
53 /* all fields below are cleared on reset */
54 bool vlan;
55 u16 vlan_id[AR8X16_MAX_VLANS];
56 u8 vlan_table[AR8X16_MAX_VLANS];
57 u8 vlan_tagged;
58 u16 pvid[AR8216_NUM_PORTS];
59 };
60
61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
62
63 static inline void
64 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
65 {
66 regaddr >>= 1;
67 *r1 = regaddr & 0x1e;
68
69 regaddr >>= 5;
70 *r2 = regaddr & 0x7;
71
72 regaddr >>= 3;
73 *page = regaddr & 0x1ff;
74 }
75
76 static u32
77 ar8216_mii_read(struct ar8216_priv *priv, int reg)
78 {
79 struct phy_device *phy = priv->phy;
80 struct mii_bus *bus = phy->bus;
81 u16 r1, r2, page;
82 u16 lo, hi;
83
84 split_addr((u32) reg, &r1, &r2, &page);
85
86 mutex_lock(&bus->mdio_lock);
87
88 bus->write(bus, 0x18, 0, page);
89 msleep(1); /* wait for the page switch to propagate */
90 lo = bus->read(bus, 0x10 | r2, r1);
91 hi = bus->read(bus, 0x10 | r2, r1 + 1);
92
93 mutex_unlock(&bus->mdio_lock);
94
95 return (hi << 16) | lo;
96 }
97
98 static void
99 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
100 {
101 struct phy_device *phy = priv->phy;
102 struct mii_bus *bus = phy->bus;
103 u16 r1, r2, r3;
104 u16 lo, hi;
105
106 split_addr((u32) reg, &r1, &r2, &r3);
107 lo = val & 0xffff;
108 hi = (u16) (val >> 16);
109
110 mutex_lock(&bus->mdio_lock);
111
112 bus->write(bus, 0x18, 0, r3);
113 msleep(1); /* wait for the page switch to propagate */
114 bus->write(bus, 0x10 | r2, r1 + 1, hi);
115 bus->write(bus, 0x10 | r2, r1, lo);
116
117 mutex_unlock(&bus->mdio_lock);
118 }
119
120 static u32
121 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
122 {
123 u32 v;
124
125 v = priv->read(priv, reg);
126 v &= ~mask;
127 v |= val;
128 priv->write(priv, reg, v);
129
130 return v;
131 }
132
133 static inline int
134 ar8216_id_chip(struct ar8216_priv *priv)
135 {
136 u32 val;
137 u16 id;
138 int i;
139
140 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
141 if (val == ~0)
142 return UNKNOWN;
143
144 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
145 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
146 u16 t;
147
148 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
149 if (val == ~0)
150 return UNKNOWN;
151
152 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
153 if (t != id)
154 return UNKNOWN;
155 }
156
157 switch (id) {
158 case 0x0101:
159 return AR8216;
160 case 0x0301:
161 return AR8236;
162 case 0x1000:
163 case 0x1001:
164 return AR8316;
165 default:
166 printk(KERN_DEBUG
167 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
168 (int)(id >> AR8216_CTRL_VERSION_S),
169 (int)(id & AR8216_CTRL_REVISION),
170 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
171 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
172
173 return UNKNOWN;
174 }
175 }
176
177 static void
178 ar8216_read_port_link(struct ar8216_priv *priv, int port,
179 struct switch_port_link *link)
180 {
181 u32 status;
182 u32 speed;
183
184 memset(link, '\0', sizeof(*link));
185
186 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
187
188 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
189 if (link->aneg) {
190 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
191 if (!link->link)
192 return;
193 } else {
194 link->link = true;
195 }
196
197 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
198 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
199 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
200
201 speed = (status & AR8216_PORT_STATUS_SPEED) >>
202 AR8216_PORT_STATUS_SPEED_S;
203
204 switch (speed) {
205 case AR8216_PORT_SPEED_10M:
206 link->speed = SWITCH_PORT_SPEED_10;
207 break;
208 case AR8216_PORT_SPEED_100M:
209 link->speed = SWITCH_PORT_SPEED_100;
210 break;
211 case AR8216_PORT_SPEED_1000M:
212 link->speed = SWITCH_PORT_SPEED_1000;
213 break;
214 default:
215 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
216 break;
217 }
218 }
219
220 static int
221 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
222 struct switch_val *val)
223 {
224 struct ar8216_priv *priv = to_ar8216(dev);
225 priv->vlan = !!val->value.i;
226 return 0;
227 }
228
229 static int
230 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
231 struct switch_val *val)
232 {
233 struct ar8216_priv *priv = to_ar8216(dev);
234 val->value.i = priv->vlan;
235 return 0;
236 }
237
238
239 static int
240 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
241 {
242 struct ar8216_priv *priv = to_ar8216(dev);
243
244 /* make sure no invalid PVIDs get set */
245
246 if (vlan >= dev->vlans)
247 return -EINVAL;
248
249 priv->pvid[port] = vlan;
250 return 0;
251 }
252
253 static int
254 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
255 {
256 struct ar8216_priv *priv = to_ar8216(dev);
257 *vlan = priv->pvid[port];
258 return 0;
259 }
260
261 static int
262 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
263 struct switch_val *val)
264 {
265 struct ar8216_priv *priv = to_ar8216(dev);
266 priv->vlan_id[val->port_vlan] = val->value.i;
267 return 0;
268 }
269
270 static int
271 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
272 struct switch_val *val)
273 {
274 struct ar8216_priv *priv = to_ar8216(dev);
275 val->value.i = priv->vlan_id[val->port_vlan];
276 return 0;
277 }
278
279 static int
280 ar8216_get_port_link(struct switch_dev *dev, int port,
281 struct switch_port_link *link)
282 {
283 struct ar8216_priv *priv = to_ar8216(dev);
284
285 ar8216_read_port_link(priv, port, link);
286 return 0;
287 }
288
289 static int
290 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
291 {
292 struct ar8216_priv *priv = dev->phy_ptr;
293 unsigned char *buf;
294
295 if (unlikely(!priv))
296 goto error;
297
298 if (!priv->vlan)
299 goto send;
300
301 if (unlikely(skb_headroom(skb) < 2)) {
302 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
303 goto error;
304 }
305
306 buf = skb_push(skb, 2);
307 buf[0] = 0x10;
308 buf[1] = 0x80;
309
310 send:
311 return priv->ndo_old->ndo_start_xmit(skb, dev);
312
313 error:
314 dev_kfree_skb_any(skb);
315 return 0;
316 }
317
318 static int
319 ar8216_mangle_rx(struct sk_buff *skb, int napi)
320 {
321 struct ar8216_priv *priv;
322 struct net_device *dev;
323 unsigned char *buf;
324 int port, vlan;
325
326 dev = skb->dev;
327 if (!dev)
328 goto error;
329
330 priv = dev->phy_ptr;
331 if (!priv)
332 goto error;
333
334 /* don't strip the header if vlan mode is disabled */
335 if (!priv->vlan)
336 goto recv;
337
338 /* strip header, get vlan id */
339 buf = skb->data;
340 skb_pull(skb, 2);
341
342 /* check for vlan header presence */
343 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
344 goto recv;
345
346 port = buf[0] & 0xf;
347
348 /* no need to fix up packets coming from a tagged source */
349 if (priv->vlan_tagged & (1 << port))
350 goto recv;
351
352 /* lookup port vid from local table, the switch passes an invalid vlan id */
353 vlan = priv->vlan_id[priv->pvid[port]];
354
355 buf[14 + 2] &= 0xf0;
356 buf[14 + 2] |= vlan >> 8;
357 buf[15 + 2] = vlan & 0xff;
358
359 recv:
360 skb->protocol = eth_type_trans(skb, skb->dev);
361
362 if (napi)
363 return netif_receive_skb(skb);
364 else
365 return netif_rx(skb);
366
367 error:
368 /* no vlan? eat the packet! */
369 dev_kfree_skb_any(skb);
370 return NET_RX_DROP;
371 }
372
373 static int
374 ar8216_netif_rx(struct sk_buff *skb)
375 {
376 return ar8216_mangle_rx(skb, 0);
377 }
378
379 static int
380 ar8216_netif_receive_skb(struct sk_buff *skb)
381 {
382 return ar8216_mangle_rx(skb, 1);
383 }
384
385
386 static struct switch_attr ar8216_globals[] = {
387 {
388 .type = SWITCH_TYPE_INT,
389 .name = "enable_vlan",
390 .description = "Enable VLAN mode",
391 .set = ar8216_set_vlan,
392 .get = ar8216_get_vlan,
393 .max = 1
394 },
395 };
396
397 static struct switch_attr ar8216_port[] = {
398 };
399
400 static struct switch_attr ar8216_vlan[] = {
401 {
402 .type = SWITCH_TYPE_INT,
403 .name = "vid",
404 .description = "VLAN ID (0-4094)",
405 .set = ar8216_set_vid,
406 .get = ar8216_get_vid,
407 .max = 4094,
408 },
409 };
410
411
412 static int
413 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
414 {
415 struct ar8216_priv *priv = to_ar8216(dev);
416 u8 ports = priv->vlan_table[val->port_vlan];
417 int i;
418
419 val->len = 0;
420 for (i = 0; i < AR8216_NUM_PORTS; i++) {
421 struct switch_port *p;
422
423 if (!(ports & (1 << i)))
424 continue;
425
426 p = &val->value.ports[val->len++];
427 p->id = i;
428 if (priv->vlan_tagged & (1 << i))
429 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
430 else
431 p->flags = 0;
432 }
433 return 0;
434 }
435
436 static int
437 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
438 {
439 struct ar8216_priv *priv = to_ar8216(dev);
440 u8 *vt = &priv->vlan_table[val->port_vlan];
441 int i, j;
442
443 *vt = 0;
444 for (i = 0; i < val->len; i++) {
445 struct switch_port *p = &val->value.ports[i];
446
447 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
448 priv->vlan_tagged |= (1 << p->id);
449 else {
450 priv->vlan_tagged &= ~(1 << p->id);
451 priv->pvid[p->id] = val->port_vlan;
452
453 /* make sure that an untagged port does not
454 * appear in other vlans */
455 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
456 if (j == val->port_vlan)
457 continue;
458 priv->vlan_table[j] &= ~(1 << p->id);
459 }
460 }
461
462 *vt |= 1 << p->id;
463 }
464 return 0;
465 }
466
467 static int
468 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
469 {
470 int timeout = 20;
471
472 while ((priv->read(priv, reg) & mask) != val) {
473 if (timeout-- <= 0) {
474 printk(KERN_ERR "ar8216: timeout waiting for operation to complete\n");
475 return 1;
476 }
477 }
478 return 0;
479 }
480
481 static void
482 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
483 {
484 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
485 return;
486 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
487 val &= AR8216_VTUDATA_MEMBER;
488 val |= AR8216_VTUDATA_VALID;
489 priv->write(priv, AR8216_REG_VTU_DATA, val);
490 }
491 op |= AR8216_VTU_ACTIVE;
492 priv->write(priv, AR8216_REG_VTU, op);
493 }
494
495 static void
496 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
497 u32 members, u32 pvid)
498 {
499 u32 header;
500
501 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
502 header = AR8216_PORT_CTRL_HEADER;
503 else
504 header = 0;
505
506 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
507 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
508 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
509 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
510 AR8216_PORT_CTRL_LEARN | header |
511 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
512 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
513
514 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
515 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
516 AR8216_PORT_VLAN_DEFAULT_ID,
517 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
518 (ingress << AR8216_PORT_VLAN_MODE_S) |
519 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
520 }
521
522 static void
523 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
524 u32 members, u32 pvid)
525 {
526 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
527 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
528 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
529 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
530 AR8216_PORT_CTRL_LEARN |
531 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
532 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
533
534 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
535 AR8236_PORT_VLAN_DEFAULT_ID,
536 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
537
538 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
539 AR8236_PORT_VLAN2_VLAN_MODE |
540 AR8236_PORT_VLAN2_MEMBER,
541 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
542 (members << AR8236_PORT_VLAN2_MEMBER_S));
543 }
544
545 static int
546 ar8216_hw_apply(struct switch_dev *dev)
547 {
548 struct ar8216_priv *priv = to_ar8216(dev);
549 u8 portmask[AR8216_NUM_PORTS];
550 int i, j;
551
552 mutex_lock(&priv->reg_mutex);
553 /* flush all vlan translation unit entries */
554 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
555
556 memset(portmask, 0, sizeof(portmask));
557 if (!priv->init) {
558 /* calculate the port destination masks and load vlans
559 * into the vlan translation unit */
560 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
561 u8 vp = priv->vlan_table[j];
562
563 if (!vp)
564 continue;
565
566 for (i = 0; i < AR8216_NUM_PORTS; i++) {
567 u8 mask = (1 << i);
568 if (vp & mask)
569 portmask[i] |= vp & ~mask;
570 }
571
572 ar8216_vtu_op(priv,
573 AR8216_VTU_OP_LOAD |
574 (priv->vlan_id[j] << AR8216_VTU_VID_S),
575 priv->vlan_table[j]);
576 }
577 } else {
578 /* vlan disabled:
579 * isolate all ports, but connect them to the cpu port */
580 for (i = 0; i < AR8216_NUM_PORTS; i++) {
581 if (i == AR8216_PORT_CPU)
582 continue;
583
584 portmask[i] = 1 << AR8216_PORT_CPU;
585 portmask[AR8216_PORT_CPU] |= (1 << i);
586 }
587 }
588
589 /* update the port destination mask registers and tag settings */
590 for (i = 0; i < AR8216_NUM_PORTS; i++) {
591 int egress, ingress;
592 int pvid;
593
594 if (priv->vlan) {
595 pvid = priv->vlan_id[priv->pvid[i]];
596 } else {
597 pvid = i;
598 }
599
600 if (priv->vlan) {
601 if (priv->vlan_tagged & (1 << i))
602 egress = AR8216_OUT_ADD_VLAN;
603 else
604 egress = AR8216_OUT_STRIP_VLAN;
605 } else {
606 egress = AR8216_OUT_KEEP;
607 }
608 if (priv->vlan) {
609 ingress = AR8216_IN_SECURE;
610 } else {
611 ingress = AR8216_IN_PORT_ONLY;
612 }
613
614 if (priv->chip == AR8236)
615 ar8236_setup_port(priv, i, egress, ingress, portmask[i],
616 pvid);
617 else
618 ar8216_setup_port(priv, i, egress, ingress, portmask[i],
619 pvid);
620 }
621 mutex_unlock(&priv->reg_mutex);
622 return 0;
623 }
624
625 static int
626 ar8236_hw_init(struct ar8216_priv *priv) {
627 static int initialized;
628 int i;
629 struct mii_bus *bus;
630
631 if (initialized)
632 return 0;
633
634 /* Initialize the PHYs */
635 bus = priv->phy->bus;
636 for (i = 0; i < 5; i++) {
637 mdiobus_write(bus, i, MII_ADVERTISE,
638 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
639 ADVERTISE_PAUSE_ASYM);
640 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
641 }
642 msleep(1000);
643
644 initialized = true;
645 return 0;
646 }
647
648 static int
649 ar8316_hw_init(struct ar8216_priv *priv) {
650 int i;
651 u32 val, newval;
652 struct mii_bus *bus;
653
654 val = priv->read(priv, 0x8);
655
656 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
657 if (priv->port4_phy) {
658 /* value taken from Ubiquiti RouterStation Pro */
659 newval = 0x81461bea;
660 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
661 } else {
662 newval = 0x01261be2;
663 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
664 }
665 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
666 /* value taken from AVM Fritz!Box 7390 sources */
667 newval = 0x010e5b71;
668 } else {
669 /* no known value for phy interface */
670 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
671 priv->phy->interface);
672 return -EINVAL;
673 }
674
675 if (val == newval)
676 goto out;
677
678 priv->write(priv, 0x8, newval);
679
680 /* standard atheros magic */
681 priv->write(priv, 0x38, 0xc000050e);
682
683 /* Initialize the ports */
684 bus = priv->phy->bus;
685 for (i = 0; i < 5; i++) {
686 if ((i == 4) && priv->port4_phy &&
687 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
688 /* work around for phy4 rgmii mode */
689 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
690 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
691 /* rx delay */
692 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
693 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
694 /* tx delay */
695 mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
696 mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
697 msleep(1000);
698 }
699
700 /* initialize the port itself */
701 mdiobus_write(bus, i, MII_ADVERTISE,
702 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
703 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
704 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
705 msleep(1000);
706 }
707
708 out:
709 priv->initialized = true;
710 return 0;
711 }
712
713 static int
714 ar8216_reset_switch(struct switch_dev *dev)
715 {
716 struct ar8216_priv *priv = to_ar8216(dev);
717 int i;
718
719 mutex_lock(&priv->reg_mutex);
720 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
721 offsetof(struct ar8216_priv, vlan));
722 for (i = 0; i < AR8X16_MAX_VLANS; i++) {
723 priv->vlan_id[i] = i;
724 }
725 for (i = 0; i < AR8216_NUM_PORTS; i++) {
726 /* Enable port learning and tx */
727 priv->write(priv, AR8216_REG_PORT_CTRL(i),
728 AR8216_PORT_CTRL_LEARN |
729 (4 << AR8216_PORT_CTRL_STATE_S));
730
731 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
732
733 /* Configure all PHYs */
734 if (i == AR8216_PORT_CPU) {
735 priv->write(priv, AR8216_REG_PORT_STATUS(i),
736 AR8216_PORT_STATUS_LINK_UP |
737 ((priv->chip == AR8316) ?
738 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
739 AR8216_PORT_STATUS_TXMAC |
740 AR8216_PORT_STATUS_RXMAC |
741 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
742 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
743 AR8216_PORT_STATUS_DUPLEX);
744 } else {
745 priv->write(priv, AR8216_REG_PORT_STATUS(i),
746 AR8216_PORT_STATUS_LINK_AUTO);
747 }
748 }
749 /* XXX: undocumented magic from atheros, required! */
750 priv->write(priv, 0x38, 0xc000050e);
751
752 if (priv->chip == AR8216) {
753 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
754 AR8216_GCTRL_MTU, 1518 + 8 + 2);
755 } else if (priv->chip == AR8316 ||
756 priv->chip == AR8236) {
757 /* enable jumbo frames */
758 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
759 AR8316_GCTRL_MTU, 9018 + 8 + 2);
760 }
761
762 if (priv->chip == AR8316) {
763 /* enable cpu port to receive multicast and broadcast frames */
764 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
765 }
766 mutex_unlock(&priv->reg_mutex);
767 return ar8216_hw_apply(dev);
768 }
769
770
771 static const struct switch_dev_ops ar8216_ops = {
772 .attr_global = {
773 .attr = ar8216_globals,
774 .n_attr = ARRAY_SIZE(ar8216_globals),
775 },
776 .attr_port = {
777 .attr = ar8216_port,
778 .n_attr = ARRAY_SIZE(ar8216_port),
779 },
780 .attr_vlan = {
781 .attr = ar8216_vlan,
782 .n_attr = ARRAY_SIZE(ar8216_vlan),
783 },
784 .get_port_pvid = ar8216_get_pvid,
785 .set_port_pvid = ar8216_set_pvid,
786 .get_vlan_ports = ar8216_get_ports,
787 .set_vlan_ports = ar8216_set_ports,
788 .apply_config = ar8216_hw_apply,
789 .reset_switch = ar8216_reset_switch,
790 .get_port_link = ar8216_get_port_link,
791 };
792
793 static int
794 ar8216_config_init(struct phy_device *pdev)
795 {
796 struct ar8216_priv *priv = pdev->priv;
797 struct net_device *dev = pdev->attached_dev;
798 struct switch_dev *swdev;
799 int ret;
800
801 if (!priv) {
802 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
803 if (priv == NULL)
804 return -ENOMEM;
805 }
806
807 priv->phy = pdev;
808
809 priv->chip = ar8216_id_chip(priv);
810
811 if (pdev->addr != 0) {
812 if (priv->chip == AR8316) {
813 pdev->supported |= SUPPORTED_1000baseT_Full;
814 pdev->advertising |= ADVERTISED_1000baseT_Full;
815
816 /* check if we're attaching to the switch twice */
817 pdev = pdev->bus->phy_map[0];
818 if (!pdev) {
819 kfree(priv);
820 return 0;
821 }
822
823 /* switch device has not been initialized, reuse priv */
824 if (!pdev->priv) {
825 priv->port4_phy = true;
826 pdev->priv = priv;
827 return 0;
828 }
829
830 kfree(priv);
831
832 /* switch device has been initialized, reinit */
833 priv = pdev->priv;
834 priv->dev.ports = (AR8216_NUM_PORTS - 1);
835 priv->initialized = false;
836 priv->port4_phy = true;
837 ar8316_hw_init(priv);
838 return 0;
839 }
840
841 kfree(priv);
842 return 0;
843 }
844
845 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
846 pdev->attached_dev->name, priv->chip);
847
848 pdev->supported = priv->chip == AR8316 ?
849 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
850 pdev->advertising = pdev->supported;
851
852 mutex_init(&priv->reg_mutex);
853 priv->read = ar8216_mii_read;
854 priv->write = ar8216_mii_write;
855
856 pdev->priv = priv;
857
858 swdev = &priv->dev;
859 swdev->cpu_port = AR8216_PORT_CPU;
860 swdev->ops = &ar8216_ops;
861 swdev->ports = AR8216_NUM_PORTS;
862
863 if (priv->chip == AR8316) {
864 swdev->name = "Atheros AR8316";
865 swdev->vlans = AR8X16_MAX_VLANS;
866
867 if (priv->port4_phy) {
868 /* port 5 connected to the other mac, therefore unusable */
869 swdev->ports = (AR8216_NUM_PORTS - 1);
870 }
871 } else if (priv->chip == AR8236) {
872 swdev->name = "Atheros AR8236";
873 swdev->vlans = AR8216_NUM_VLANS;
874 swdev->ports = AR8216_NUM_PORTS;
875 } else {
876 swdev->name = "Atheros AR8216";
877 swdev->vlans = AR8216_NUM_VLANS;
878 }
879
880 if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
881 kfree(priv);
882 goto done;
883 }
884
885 priv->init = true;
886
887 if (priv->chip == AR8316) {
888 ret = ar8316_hw_init(priv);
889 if (ret) {
890 kfree(priv);
891 goto done;
892 }
893 }
894
895 if (priv->chip == AR8236) {
896 ret = ar8236_hw_init(priv);
897 if (ret) {
898 kfree(priv);
899 goto done;
900 }
901 }
902
903 ret = ar8216_reset_switch(&priv->dev);
904 if (ret) {
905 kfree(priv);
906 goto done;
907 }
908
909 dev->phy_ptr = priv;
910
911 /* VID fixup only needed on ar8216 */
912 if (pdev->addr == 0 && priv->chip == AR8216) {
913 pdev->pkt_align = 2;
914 pdev->netif_receive_skb = ar8216_netif_receive_skb;
915 pdev->netif_rx = ar8216_netif_rx;
916 priv->ndo_old = dev->netdev_ops;
917 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
918 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
919 dev->netdev_ops = &priv->ndo;
920 }
921
922 priv->init = false;
923
924 done:
925 return ret;
926 }
927
928 static int
929 ar8216_read_status(struct phy_device *phydev)
930 {
931 struct ar8216_priv *priv = phydev->priv;
932 int ret;
933 if (phydev->addr != 0) {
934 return genphy_read_status(phydev);
935 }
936
937 phydev->speed = priv->chip == AR8316 ? SPEED_1000 : SPEED_100;
938 phydev->duplex = DUPLEX_FULL;
939 phydev->link = 1;
940
941 /* flush the address translation unit */
942 mutex_lock(&priv->reg_mutex);
943 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
944
945 if (!ret)
946 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
947 else
948 ret = -ETIMEDOUT;
949 mutex_unlock(&priv->reg_mutex);
950
951 phydev->state = PHY_RUNNING;
952 netif_carrier_on(phydev->attached_dev);
953 phydev->adjust_link(phydev->attached_dev);
954
955 return ret;
956 }
957
958 static int
959 ar8216_config_aneg(struct phy_device *phydev)
960 {
961 if (phydev->addr == 0)
962 return 0;
963
964 return genphy_config_aneg(phydev);
965 }
966
967 static int
968 ar8216_probe(struct phy_device *pdev)
969 {
970 struct ar8216_priv priv;
971 u16 chip;
972
973 priv.phy = pdev;
974 chip = ar8216_id_chip(&priv);
975 if (chip == UNKNOWN)
976 return -ENODEV;
977
978 return 0;
979 }
980
981 static void
982 ar8216_remove(struct phy_device *pdev)
983 {
984 struct ar8216_priv *priv = pdev->priv;
985 struct net_device *dev = pdev->attached_dev;
986
987 if (!priv)
988 return;
989
990 if (priv->ndo_old && dev)
991 dev->netdev_ops = priv->ndo_old;
992 if (pdev->addr == 0)
993 unregister_switch(&priv->dev);
994 kfree(priv);
995 }
996
997 static struct phy_driver ar8216_driver = {
998 .phy_id = 0x004d0000,
999 .name = "Atheros AR8216/AR8236/AR8316",
1000 .phy_id_mask = 0xffff0000,
1001 .features = PHY_BASIC_FEATURES,
1002 .probe = ar8216_probe,
1003 .remove = ar8216_remove,
1004 .config_init = &ar8216_config_init,
1005 .config_aneg = &ar8216_config_aneg,
1006 .read_status = &ar8216_read_status,
1007 .driver = { .owner = THIS_MODULE },
1008 };
1009
1010 int __init
1011 ar8216_init(void)
1012 {
1013 return phy_driver_register(&ar8216_driver);
1014 }
1015
1016 void __exit
1017 ar8216_exit(void)
1018 {
1019 phy_driver_unregister(&ar8216_driver);
1020 }
1021
1022 module_init(ar8216_init);
1023 module_exit(ar8216_exit);
1024 MODULE_LICENSE("GPL");
1025
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