3b39b0653c6cd95f7a943c72292e27a809ad00e6
[openwrt.git] / target / linux / ar71xx / files-2.6.39 / arch / mips / ar71xx / mach-dir-600-a1.c
1 /*
2 * D-Link DIR-600 rev. A1 board support
3 *
4 * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14
15 #include <asm/mach-ar71xx/ar71xx.h>
16
17 #include "machtype.h"
18 #include "devices.h"
19 #include "dev-m25p80.h"
20 #include "dev-ap91-pci.h"
21 #include "dev-gpio-buttons.h"
22 #include "dev-leds-gpio.h"
23 #include "nvram.h"
24
25 #define DIR_600_A1_GPIO_LED_WPS 0
26 #define DIR_600_A1_GPIO_LED_POWER_AMBER 1
27 #define DIR_600_A1_GPIO_LED_POWER_GREEN 6
28 #define DIR_600_A1_GPIO_LED_LAN1 13
29 #define DIR_600_A1_GPIO_LED_LAN2 14
30 #define DIR_600_A1_GPIO_LED_LAN3 15
31 #define DIR_600_A1_GPIO_LED_LAN4 16
32 #define DIR_600_A1_GPIO_LED_WAN_AMBER 7
33 #define DIR_600_A1_GPIO_LED_WAN_GREEN 17
34
35 #define DIR_600_A1_GPIO_BTN_RESET 8
36 #define DIR_600_A1_GPIO_BTN_WPS 12
37
38 #define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */
39 #define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL)
40
41 #define DIR_600_A1_NVRAM_ADDR 0x1f030000
42 #define DIR_600_A1_NVRAM_SIZE 0x10000
43
44 #ifdef CONFIG_MTD_PARTITIONS
45 static struct mtd_partition dir_600_a1_partitions[] = {
46 {
47 .name = "u-boot",
48 .offset = 0,
49 .size = 0x030000,
50 .mask_flags = MTD_WRITEABLE,
51 }, {
52 .name = "nvram",
53 .offset = 0x030000,
54 .size = 0x010000,
55 }, {
56 .name = "kernel",
57 .offset = 0x040000,
58 .size = 0x0e0000,
59 }, {
60 .name = "rootfs",
61 .offset = 0x120000,
62 .size = 0x2c0000,
63 }, {
64 .name = "mac",
65 .offset = 0x3e0000,
66 .size = 0x010000,
67 .mask_flags = MTD_WRITEABLE,
68 }, {
69 .name = "art",
70 .offset = 0x3f0000,
71 .size = 0x010000,
72 .mask_flags = MTD_WRITEABLE,
73 }, {
74 .name = "firmware",
75 .offset = 0x040000,
76 .size = 0x3a0000,
77 }
78 };
79 #endif /* CONFIG_MTD_PARTITIONS */
80
81 static struct flash_platform_data dir_600_a1_flash_data = {
82 #ifdef CONFIG_MTD_PARTITIONS
83 .parts = dir_600_a1_partitions,
84 .nr_parts = ARRAY_SIZE(dir_600_a1_partitions),
85 #endif
86 };
87
88 static struct gpio_led dir_600_a1_leds_gpio[] __initdata = {
89 {
90 .name = "d-link:green:power",
91 .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN,
92 }, {
93 .name = "d-link:amber:power",
94 .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER,
95 }, {
96 .name = "d-link:amber:wan",
97 .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER,
98 }, {
99 .name = "d-link:green:wan",
100 .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN,
101 .active_low = 1,
102 }, {
103 .name = "d-link:green:lan1",
104 .gpio = DIR_600_A1_GPIO_LED_LAN1,
105 .active_low = 1,
106 }, {
107 .name = "d-link:green:lan2",
108 .gpio = DIR_600_A1_GPIO_LED_LAN2,
109 .active_low = 1,
110 }, {
111 .name = "d-link:green:lan3",
112 .gpio = DIR_600_A1_GPIO_LED_LAN3,
113 .active_low = 1,
114 }, {
115 .name = "d-link:green:lan4",
116 .gpio = DIR_600_A1_GPIO_LED_LAN4,
117 .active_low = 1,
118 }, {
119 .name = "d-link:blue:wps",
120 .gpio = DIR_600_A1_GPIO_LED_WPS,
121 .active_low = 1,
122 }
123 };
124
125 static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = {
126 {
127 .desc = "reset",
128 .type = EV_KEY,
129 .code = KEY_RESTART,
130 .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
131 .gpio = DIR_600_A1_GPIO_BTN_RESET,
132 .active_low = 1,
133 }, {
134 .desc = "wps",
135 .type = EV_KEY,
136 .code = KEY_WPS_BUTTON,
137 .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL,
138 .gpio = DIR_600_A1_GPIO_BTN_WPS,
139 .active_low = 1,
140 }
141 };
142
143 static void __init dir_600_a1_setup(void)
144 {
145 const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR);
146 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
147 u8 mac_buff[6];
148 u8 *mac = NULL;
149
150 if (nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE,
151 "lan_mac=", mac_buff) == 0) {
152 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_buff, 0);
153 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_buff, 1);
154 mac = mac_buff;
155 }
156
157 ar71xx_add_device_m25p80(&dir_600_a1_flash_data);
158
159 ar71xx_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
160 AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
161 AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
162 AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
163 AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
164
165 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio),
166 dir_600_a1_leds_gpio);
167
168 ar71xx_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL,
169 ARRAY_SIZE(dir_600_a1_gpio_keys),
170 dir_600_a1_gpio_keys);
171
172 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
173 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
174
175 ar71xx_add_device_mdio(0, 0x0);
176
177 /* LAN ports */
178 ar71xx_add_device_eth(1);
179
180 /* WAN port */
181 ar71xx_add_device_eth(0);
182
183 ap91_pci_init(ee, mac);
184 }
185
186 MIPS_MACHINE(AR71XX_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1",
187 dir_600_a1_setup);
188
189 static void __init dir_615_e4_setup(void)
190 {
191 dir_600_a1_setup();
192 ap91_pci_setup_wmac_led_pin(1);
193 }
194
195 MIPS_MACHINE(AR71XX_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
196 dir_615_e4_setup);
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