target/linux/ar71xx/files-2.6.39/arch/mips/ar71xx/mach-dir-615-e4.c

   1 /*
   2  *  D-Link DIR-615 rev. E4 board support
   3  *
   4  *  Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14
  15 #include <asm/mach-ar71xx/ar71xx.h>
  16
  17 #include "machtype.h"
  18 #include "devices.h"
  19 #include "dev-m25p80.h"
  20 #include "dev-ap91-pci.h"
  21 #include "dev-gpio-buttons.h"
  22 #include "dev-leds-gpio.h"
  23 #include "nvram.h"
  24
  25 #define DIR_615_E4_GPIO_LED_WPS                 0
  26 #define DIR_615_E4_GPIO_LED_POWER_AMBER         1
  27 #define DIR_615_E4_GPIO_LED_POWER_GREEN         6
  28 #define DIR_615_E4_GPIO_LED_WAN_AMBER           7
  29 #define DIR_615_E4_GPIO_LED_WAN_GREEN           17
  30 #define DIR_615_E4_GPIO_LED_LAN1_GREEN          13
  31 #define DIR_615_E4_GPIO_LED_LAN2_GREEN          14
  32 #define DIR_615_E4_GPIO_LED_LAN3_GREEN          15
  33 #define DIR_615_E4_GPIO_LED_LAN4_GREEN          16
  34
  35 #define DIR_615_E4_GPIO_BTN_RESET               8
  36 #define DIR_615_E4_GPIO_BTN_WPS                 12
  37
  38 #define DIR_615_E4_KEYS_POLL_INTERVAL   20
  39 #define DIR_615_E4_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615_E4_KEYS_POLL_INTERVAL)
  40
  41 #define DIR_615_E4_NVRAM_ADDR   0x1f030000
  42 #define DIR_615_E4_NVRAM_SIZE   0x10000
  43
  44 #ifdef CONFIG_MTD_PARTITIONS
  45 static struct mtd_partition dir_615_e4_partitions[] = {
  46         {
  47                 .name           = "u-boot",
  48                 .offset         = 0,
  49                 .size           = 0x030000,
  50                 .mask_flags     = MTD_WRITEABLE,
  51         }, {
  52                 .name           = "nvram",
  53                 .offset         = 0x030000,
  54                 .size           = 0x010000,
  55         }, {
  56                 .name           = "kernel",
  57                 .offset         = 0x040000,
  58                 .size           = 0x0e0000,
  59         }, {
  60                 .name           = "rootfs",
  61                 .offset         = 0x120000,
  62                 .size           = 0x2c0000,
  63         }, {
  64                 .name           = "mac",
  65                 .offset         = 0x3e0000,
  66                 .size           = 0x010000,
  67                 .mask_flags     = MTD_WRITEABLE,
  68         }, {
  69                 .name           = "art",
  70                 .offset         = 0x3f0000,
  71                 .size           = 0x010000,
  72                 .mask_flags     = MTD_WRITEABLE,
  73         }, {
  74                 .name           = "firmware",
  75                 .offset         = 0x040000,
  76                 .size           = 0x3a0000,
  77         }
  78 };
  79 #endif /* CONFIG_MTD_PARTITIONS */
  80
  81 static struct flash_platform_data dir_615_e4_flash_data = {
  82 #ifdef CONFIG_MTD_PARTITIONS
  83         .parts          = dir_615_e4_partitions,
  84         .nr_parts       = ARRAY_SIZE(dir_615_e4_partitions),
  85 #endif
  86 };
  87
  88
  89 static struct gpio_led dir_615_e4_leds_gpio[] __initdata = {
  90         {
  91                 .name           = "d-link:green:power",
  92                 .gpio           = DIR_615_E4_GPIO_LED_POWER_GREEN,
  93         }, {
  94                 .name           = "d-link:amber:power",
  95                 .gpio           = DIR_615_E4_GPIO_LED_POWER_AMBER,
  96         }, {
  97                 .name           = "d-link:green:wan",
  98                 .gpio           = DIR_615_E4_GPIO_LED_WAN_GREEN,
  99                 .active_low     = 1,
 100         }, {
 101                 .name           = "d-link:amber:wan",
 102                 .gpio           = DIR_615_E4_GPIO_LED_WAN_AMBER,
 103         }, {
 104                 .name           = "d-link:green:lan1",
 105                 .gpio           = DIR_615_E4_GPIO_LED_LAN1_GREEN,
 106                 .active_low     = 1,
 107         }, {
 108                 .name           = "d-link:green:lan2",
 109                 .gpio           = DIR_615_E4_GPIO_LED_LAN2_GREEN,
 110                 .active_low     = 1,
 111         }, {
 112                 .name           = "d-link:green:lan3",
 113                 .gpio           = DIR_615_E4_GPIO_LED_LAN3_GREEN,
 114                 .active_low     = 1,
 115         }, {
 116                 .name           = "d-link:green:lan4",
 117                 .gpio           = DIR_615_E4_GPIO_LED_LAN4_GREEN,
 118                 .active_low     = 1,
 119         }, {
 120                 .name           = "d-link:blue:wps",
 121                 .gpio           = DIR_615_E4_GPIO_LED_WPS,
 122                 .active_low     = 1,
 123         }
 124 };
 125
 126 static struct gpio_keys_button dir_615_e4_gpio_keys[] __initdata = {
 127         {
 128                 .desc           = "reset",
 129                 .type           = EV_KEY,
 130                 .code           = KEY_RESTART,
 131                 .debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
 132                 .gpio           = DIR_615_E4_GPIO_BTN_RESET,
 133                 .active_low     = 1,
 134         }, {
 135                 .desc           = "wps",
 136                 .type           = EV_KEY,
 137                 .code           = KEY_WPS_BUTTON,
 138                 .debounce_interval = DIR_615_E4_KEYS_DEBOUNCE_INTERVAL,
 139                 .gpio           = DIR_615_E4_GPIO_BTN_WPS,
 140                 .active_low     = 1,
 141         }
 142 };
 143
 144 static void __init dir_615_e4_setup(void)
 145 {
 146         const char *nvram = (char *) KSEG1ADDR(DIR_615_E4_NVRAM_ADDR);
 147         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 148         u8 mac_buff[6];
 149         u8 *mac = NULL;
 150
 151         if (nvram_parse_mac_addr(nvram, DIR_615_E4_NVRAM_SIZE,
 152                                 "lan_mac=", mac_buff) == 0) {
 153                 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac_buff, 0);
 154                 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac_buff, 1);
 155                 mac = mac_buff;
 156         }
 157
 158         ar71xx_add_device_m25p80(&dir_615_e4_flash_data);
 159
 160         ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir_615_e4_leds_gpio),
 161                                         dir_615_e4_leds_gpio);
 162
 163         ar71xx_register_gpio_keys_polled(-1, DIR_615_E4_KEYS_POLL_INTERVAL,
 164                                          ARRAY_SIZE(dir_615_e4_gpio_keys),
 165                                          dir_615_e4_gpio_keys);
 166
 167         ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 0);
 168         ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 1);
 169
 170         ar71xx_add_device_mdio(0, 0x0);
 171
 172         /* LAN ports */
 173         ar71xx_add_device_eth(1);
 174
 175         /* WAN port */
 176         ar71xx_add_device_eth(0);
 177
 178         ap91_pci_setup_wmac_led_pin(1);
 179         ap91_pci_init(ee, mac);
 180 }
 181
 182 MIPS_MACHINE(AR71XX_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4",
 183              dir_615_e4_setup);