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[openwrt.git] / package / ath9k / src / drivers / net / wireless / ath9k / main.c
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 /* mac80211 and PCI callbacks */
18
19 #include <linux/nl80211.h>
20 #include "core.h"
21
22 #define ATH_PCI_VERSION "0.1"
23
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25 #define IEEE80211_ACTION_CAT_HT 7
26 #define IEEE80211_ACTION_HT_TXCHWIDTH 0
27
28 static char *dev_info = "ath9k";
29
30 MODULE_AUTHOR("Atheros Communications");
31 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33 MODULE_LICENSE("Dual BSD/GPL");
34
35 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
36 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
41 { 0 }
42 };
43
44 static int test_update_chan(enum ieee80211_band band,
45 const struct hal_channel *chan,
46 struct ath_softc *sc)
47 {
48 int i;
49
50 for (i = 0; i < sc->sbands[band].n_channels; i++) {
51 if (sc->channels[band][i].center_freq == chan->channel)
52 return 1;
53 }
54
55 return 0;
56 }
57
58 static int ath_check_chanflags(struct ieee80211_channel *chan,
59 u_int32_t mode,
60 struct ath_softc *sc)
61 {
62 struct ieee80211_hw *hw = sc->hw;
63 struct ieee80211_supported_band *band;
64 struct ieee80211_channel *band_channel;
65 int i;
66
67 band = hw->wiphy->bands[chan->band];
68
69 for (i = 0; i < band->n_channels; i++) {
70 band_channel = &band->channels[i];
71
72 if ((band_channel->center_freq == chan->center_freq) &&
73 ((band_channel->hw_value & mode) == mode))
74 return 1;
75 }
76 return 0;
77 }
78
79 static int ath_setkey_tkip(struct ath_softc *sc,
80 struct ieee80211_key_conf *key,
81 struct hal_keyval *hk,
82 const u8 *addr)
83 {
84 u8 *key_rxmic = NULL;
85 u8 *key_txmic = NULL;
86
87 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
88 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
89
90 if (addr == NULL) {
91 /* Group key installation */
92 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
93 return ath_keyset(sc, key->keyidx, hk, addr);
94 }
95 if (!sc->sc_splitmic) {
96 /*
97 * data key goes at first index,
98 * the hal handles the MIC keys at index+64.
99 */
100 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
101 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
102 return ath_keyset(sc, key->keyidx, hk, addr);
103 }
104 /*
105 * TX key goes at first index, RX key at +32.
106 * The hal handles the MIC keys at index+64.
107 */
108 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
109 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
110 /* Txmic entry failed. No need to proceed further */
111 DPRINTF(sc, ATH_DEBUG_KEYCACHE,
112 "%s Setting TX MIC Key Failed\n", __func__);
113 return 0;
114 }
115
116 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
117 /* XXX delete tx key on failure? */
118 return ath_keyset(sc, key->keyidx+32, hk, addr);
119 }
120
121 static int ath_key_config(struct ath_softc *sc,
122 const u8 *addr,
123 struct ieee80211_key_conf *key)
124 {
125 struct ieee80211_vif *vif;
126 struct hal_keyval hk;
127 const u8 *mac = NULL;
128 int ret = 0;
129 enum ieee80211_if_types opmode;
130
131 memset(&hk, 0, sizeof(hk));
132
133 switch (key->alg) {
134 case ALG_WEP:
135 hk.kv_type = HAL_CIPHER_WEP;
136 break;
137 case ALG_TKIP:
138 hk.kv_type = HAL_CIPHER_TKIP;
139 break;
140 case ALG_CCMP:
141 hk.kv_type = HAL_CIPHER_AES_CCM;
142 break;
143 default:
144 return -EINVAL;
145 }
146
147 hk.kv_len = key->keylen;
148 memcpy(hk.kv_val, key->key, key->keylen);
149
150 if (!sc->sc_vaps[0])
151 return -EIO;
152
153 vif = sc->sc_vaps[0]->av_if_data;
154 opmode = vif->type;
155
156 /*
157 * Strategy:
158 * For _M_STA mc tx, we will not setup a key at all since we never
159 * tx mc.
160 * _M_STA mc rx, we will use the keyID.
161 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
162 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
163 * peer node. BUT we will plumb a cleartext key so that we can do
164 * perSta default key table lookup in software.
165 */
166 if (is_broadcast_ether_addr(addr)) {
167 switch (opmode) {
168 case IEEE80211_IF_TYPE_STA:
169 /* default key: could be group WPA key
170 * or could be static WEP key */
171 mac = NULL;
172 break;
173 case IEEE80211_IF_TYPE_IBSS:
174 break;
175 case IEEE80211_IF_TYPE_AP:
176 break;
177 default:
178 ASSERT(0);
179 break;
180 }
181 } else {
182 mac = addr;
183 }
184
185 if (key->alg == ALG_TKIP)
186 ret = ath_setkey_tkip(sc, key, &hk, mac);
187 else
188 ret = ath_keyset(sc, key->keyidx, &hk, mac);
189
190 if (!ret)
191 return -EIO;
192
193 sc->sc_keytype = hk.kv_type;
194 return 0;
195 }
196
197 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
198 {
199 #define ATH_MAX_NUM_KEYS 4
200 int freeslot;
201
202 freeslot = (key->keyidx >= ATH_MAX_NUM_KEYS) ? 1 : 0;
203 ath_key_reset(sc, key->keyidx, freeslot);
204 #undef ATH_MAX_NUM_KEYS
205 }
206
207 static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
208 {
209 /* Until mac80211 includes these fields */
210
211 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
212 #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
213 #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
214
215 ht_info->ht_supported = 1;
216 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
217 |(u16)IEEE80211_HT_CAP_MIMO_PS
218 |(u16)IEEE80211_HT_CAP_SGI_40
219 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
220
221 ht_info->ampdu_factor = IEEE80211_HT_CAP_MAXRXAMPDU_65536;
222 ht_info->ampdu_density = IEEE80211_HT_CAP_MPDUDENSITY_8;
223 /* setup supported mcs set */
224 memset(ht_info->supp_mcs_set, 0, 16);
225 ht_info->supp_mcs_set[0] = 0xff;
226 ht_info->supp_mcs_set[1] = 0xff;
227 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
228 }
229
230 static int ath_rate2idx(struct ath_softc *sc, int rate)
231 {
232 int i = 0, cur_band, n_rates;
233 struct ieee80211_hw *hw = sc->hw;
234
235 cur_band = hw->conf.channel->band;
236 n_rates = sc->sbands[cur_band].n_bitrates;
237
238 for (i = 0; i < n_rates; i++) {
239 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
240 break;
241 }
242
243 /*
244 * NB:mac80211 validates rx rate index against the supported legacy rate
245 * index only (should be done against ht rates also), return the highest
246 * legacy rate index for rx rate which does not match any one of the
247 * supported basic and extended rates to make mac80211 happy.
248 * The following hack will be cleaned up once the issue with
249 * the rx rate index validation in mac80211 is fixed.
250 */
251 if (i == n_rates)
252 return n_rates - 1;
253 return i;
254 }
255
256 static void ath9k_rx_prepare(struct ath_softc *sc,
257 struct sk_buff *skb,
258 struct ath_recv_status *status,
259 struct ieee80211_rx_status *rx_status)
260 {
261 struct ieee80211_hw *hw = sc->hw;
262 struct ieee80211_channel *curchan = hw->conf.channel;
263
264 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
265
266 rx_status->mactime = status->tsf;
267 rx_status->band = curchan->band;
268 rx_status->freq = curchan->center_freq;
269 rx_status->signal = (status->rssi * 64) / 100;
270 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
271 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
272 rx_status->antenna = status->antenna;
273
274 if (status->flags & ATH_RX_MIC_ERROR)
275 rx_status->flag |= RX_FLAG_MMIC_ERROR;
276 if (status->flags & ATH_RX_FCS_ERROR)
277 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
278
279 rx_status->flag |= RX_FLAG_TSFT;
280 }
281
282 /*
283 * Update all associated nodes and VAPs
284 *
285 * Called when local channel width changed. e.g. if AP mode,
286 * update all associated STAs when the AP's channel width changes.
287 */
288 static void cwm_rate_updateallnodes(struct ath_softc *sc)
289 {
290 int flags = 0, error;
291 struct ieee80211_vif *vif;
292 enum ieee80211_if_types opmode;
293 struct ieee80211_hw *hw = sc->hw;
294
295 if (sc->sc_vaps[0]) {
296 vif = sc->sc_vaps[0]->av_if_data;
297 opmode = vif->type;
298 switch (opmode) {
299 case IEEE80211_IF_TYPE_STA:
300 /* sync with next received beacon */
301 flags |= ATH_IF_BEACON_SYNC;
302 if (hw->conf.ht_conf.ht_supported)
303 flags |= ATH_IF_HT;
304 error = ath_vap_up(sc, 0,
305 /* sc->sc_vaps[i]->av_btxctl->if_id, FIX ME if_id */
306 /* sc->sc_vaps[i]->bssid, FIX ME bssid */
307 sc->sc_curbssid,
308 sc->sc_curaid,
309 flags);
310 if (error)/* FIX ME if_id */
311 DPRINTF(sc, ATH_DEBUG_CWM,
312 "%s: Unable to up vap: "
313 "%d\n", __func__, 0);
314 else
315 DPRINTF(sc, ATH_DEBUG_CWM,
316 "%s: VAP up for id: "
317 "%d\n", __func__, 0);
318 break;
319 case IEEE80211_IF_TYPE_IBSS:
320 case IEEE80211_IF_TYPE_AP:
321 /* FIXME */
322 break;
323 default:
324 break;
325 }
326 }
327 }
328
329 /* Action: switch MAC from 40 to 20 (OR) 20 to 40 based on ch_width arg */
330 static void cwm_action_mac_change_chwidth(struct ath_softc *sc,
331 enum hal_ht_macmode ch_width)
332 {
333 ath_set_macmode(sc, ch_width);
334
335 /* notify rate control of new mode (select new rate table) */
336 cwm_rate_updateallnodes(sc);
337
338 /* XXX: all virtual APs - send ch width action management frame */
339 }
340
341 static u_int8_t parse_mpdudensity(u_int8_t mpdudensity)
342 {
343 /*
344 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
345 * 0 for no restriction
346 * 1 for 1/4 us
347 * 2 for 1/2 us
348 * 3 for 1 us
349 * 4 for 2 us
350 * 5 for 4 us
351 * 6 for 8 us
352 * 7 for 16 us
353 */
354 switch (mpdudensity) {
355 case 0:
356 return 0;
357 case 1:
358 case 2:
359 case 3:
360 /* Our lower layer calculations limit our precision to
361 1 microsecond */
362 return 1;
363 case 4:
364 return 2;
365 case 5:
366 return 4;
367 case 6:
368 return 8;
369 case 7:
370 return 16;
371 default:
372 return 0;
373 }
374 }
375
376 static int ath9k_start(struct ieee80211_hw *hw)
377 {
378 struct ath_softc *sc = hw->priv;
379 struct ieee80211_channel *curchan = hw->conf.channel;
380 struct hal_channel hchan;
381 int error = 0;
382
383 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Starting driver with "
384 "initial channel: %d MHz\n", __func__, curchan->center_freq);
385
386 /* setup initial channel */
387
388 hchan.channel = curchan->center_freq;
389 hchan.channelFlags = ath_chan2flags(curchan, sc);
390
391 /* open ath_dev */
392 error = ath_open(sc, &hchan);
393 if (error) {
394 DPRINTF(sc, ATH_DEBUG_FATAL,
395 "%s: Unable to complete ath_open\n", __func__);
396 return error;
397 }
398
399 ieee80211_wake_queues(hw);
400 return 0;
401 }
402
403 static int ath9k_tx(struct ieee80211_hw *hw,
404 struct sk_buff *skb)
405 {
406 struct ath_softc *sc = hw->priv;
407 int hdrlen, padsize;
408
409 /* Add the padding after the header if this is not already done */
410 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
411 if (hdrlen & 3) {
412 padsize = hdrlen % 4;
413 if (skb_headroom(skb) < padsize)
414 return -1;
415 skb_push(skb, padsize);
416 memmove(skb->data, skb->data + padsize, hdrlen);
417 }
418
419 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: transmitting packet, skb: %p\n",
420 __func__,
421 skb);
422
423 if (ath_tx_start(sc, skb) != 0) {
424 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: TX failed\n", __func__);
425 dev_kfree_skb_any(skb);
426 /* FIXME: Check for proper return value from ATH_DEV */
427 return 0;
428 }
429
430 return 0;
431 }
432
433 static int ath9k_beacon_update(struct ieee80211_hw *hw,
434 struct sk_buff *skb)
435
436 {
437 struct ath_softc *sc = hw->priv;
438
439 DPRINTF(sc, ATH_DEBUG_BEACON, "%s: Update Beacon\n", __func__);
440 return ath9k_tx(hw, skb);
441 }
442
443 static void ath9k_stop(struct ieee80211_hw *hw)
444 {
445 struct ath_softc *sc = hw->priv;
446 int error;
447
448 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Driver halt\n", __func__);
449
450 error = ath_suspend(sc);
451 if (error)
452 DPRINTF(sc, ATH_DEBUG_CONFIG,
453 "%s: Device is no longer present\n", __func__);
454
455 ieee80211_stop_queues(hw);
456 }
457
458 static int ath9k_add_interface(struct ieee80211_hw *hw,
459 struct ieee80211_if_init_conf *conf)
460 {
461 struct ath_softc *sc = hw->priv;
462 int error, ic_opmode = 0;
463
464 /* Support only vap for now */
465
466 if (sc->sc_nvaps)
467 return -1;
468
469 switch (conf->type) {
470 case IEEE80211_IF_TYPE_STA:
471 ic_opmode = HAL_M_STA;
472 default:
473 break;
474 }
475
476 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Attach a VAP of type: %d\n",
477 __func__,
478 ic_opmode);
479
480 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode, ic_opmode, 0);
481 if (error) {
482 DPRINTF(sc, ATH_DEBUG_FATAL,
483 "%s: Unable to attach vap, error: %d\n",
484 __func__, error);
485 goto bad;
486 }
487
488 return 0;
489 bad:
490 return -1;
491 }
492
493 static void ath9k_remove_interface(struct ieee80211_hw *hw,
494 struct ieee80211_if_init_conf *conf)
495 {
496 struct ath_softc *sc = hw->priv;
497 int error, flags = 0;
498
499 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Detach VAP\n", __func__);
500
501 flags |= ATH_IF_HW_OFF;
502
503 error = ath_vap_down(sc, 0, flags);
504 if (error)
505 DPRINTF(sc, ATH_DEBUG_FATAL,
506 "%s: Unable to down vap, error: %d\n", __func__, error);
507
508 error = ath_vap_detach(sc, 0);
509 if (error)
510 DPRINTF(sc, ATH_DEBUG_FATAL,
511 "%s: Unable to detach vap, error: %d\n",
512 __func__, error);
513 }
514
515 static int ath9k_config(struct ieee80211_hw *hw,
516 struct ieee80211_conf *conf)
517 {
518 struct ath_softc *sc = hw->priv;
519 struct ieee80211_channel *curchan = hw->conf.channel;
520 struct hal_channel hchan;
521
522 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Set channel: %d MHz\n",
523 __func__,
524 curchan->center_freq);
525
526 hchan.channel = curchan->center_freq;
527 hchan.channelFlags = ath_chan2flags(curchan, sc);
528
529 /* set h/w channel */
530 if (ath_set_channel(sc, &hchan) < 0)
531 DPRINTF(sc, ATH_DEBUG_FATAL, "%s: Unable to set channel\n",
532 __func__);
533
534 return 0;
535 }
536
537 static int ath9k_config_interface(struct ieee80211_hw *hw,
538 struct ieee80211_vif *vif,
539 struct ieee80211_if_conf *conf)
540 {
541 struct ath_softc *sc = hw->priv;
542 int error = 0, flags = 0;
543 struct sk_buff *beacon;
544
545 if (!conf->bssid)
546 return 0;
547
548 switch (vif->type) {
549 case IEEE80211_IF_TYPE_STA:
550 /* XXX: Handle (conf->changed & IEEE80211_IFCC_SSID) */
551 flags |= ATH_IF_HW_ON;
552 /* sync with next received beacon */
553 flags |= ATH_IF_BEACON_SYNC;
554
555 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Bring up VAP: %d\n",
556 __func__, 0);
557
558 error = ath_vap_up(sc, 0, conf->bssid, 0, flags);
559 if (error) {
560 DPRINTF(sc, ATH_DEBUG_FATAL,
561 "%s: Unable to bring up VAP: %d, error: %d\n",
562 __func__, 0, error);
563 return -1;
564 }
565
566 break;
567 case IEEE80211_IF_TYPE_IBSS:
568 if (!(conf->changed & IEEE80211_IFCC_BEACON))
569 break;
570 beacon = ieee80211_beacon_get(hw, vif);
571 if (!beacon)
572 return -ENOMEM;
573 ath9k_beacon_update(hw, beacon);
574 default:
575 break;
576 }
577
578 return 0;
579 }
580
581 #define SUPPORTED_FILTERS \
582 (FIF_PROMISC_IN_BSS | \
583 FIF_ALLMULTI | \
584 FIF_CONTROL | \
585 FIF_OTHER_BSS | \
586 FIF_BCN_PRBRESP_PROMISC | \
587 FIF_FCSFAIL)
588
589 /* Accept unicast, bcast and mcast frames */
590
591 static void ath9k_configure_filter(struct ieee80211_hw *hw,
592 unsigned int changed_flags,
593 unsigned int *total_flags,
594 int mc_count,
595 struct dev_mc_list *mclist)
596 {
597 struct ath_softc *sc = hw->priv;
598
599 changed_flags &= SUPPORTED_FILTERS;
600 *total_flags &= SUPPORTED_FILTERS;
601
602 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
603 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
604 ath_scan_start(sc);
605 else
606 ath_scan_end(sc);
607 }
608 }
609
610 static void ath9k_sta_notify(struct ieee80211_hw *hw,
611 struct ieee80211_vif *vif,
612 enum sta_notify_cmd cmd,
613 const u8 *addr)
614 {
615 struct ath_softc *sc = hw->priv;
616 struct ath_node *an;
617 unsigned long flags;
618 DECLARE_MAC_BUF(mac);
619
620 spin_lock_irqsave(&sc->node_lock, flags);
621 an = ath_node_find(sc, (u8 *) addr);
622 spin_unlock_irqrestore(&sc->node_lock, flags);
623
624 switch (cmd) {
625 case STA_NOTIFY_ADD:
626 spin_lock_irqsave(&sc->node_lock, flags);
627 if (!an) {
628 ath_node_attach(sc, (u8 *)addr, 0);
629 DPRINTF(sc, ATH_DEBUG_NODE, "%s: Attach a node: %s\n",
630 __func__,
631 print_mac(mac, addr));
632 } else {
633 ath_node_get(sc, (u8 *)addr);
634 }
635 spin_unlock_irqrestore(&sc->node_lock, flags);
636 break;
637 case STA_NOTIFY_REMOVE:
638 if (!an)
639 DPRINTF(sc, ATH_DEBUG_FATAL,
640 "%s: Removal of a non-existent node\n",
641 __func__);
642 else {
643 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
644 DPRINTF(sc, ATH_DEBUG_NODE, "%s: Put a node: %s\n",
645 __func__,
646 print_mac(mac, addr));
647 }
648 break;
649 default:
650 break;
651 }
652 }
653
654 static int ath9k_conf_tx(struct ieee80211_hw *hw,
655 u16 queue,
656 const struct ieee80211_tx_queue_params *params)
657 {
658 struct ath_softc *sc = hw->priv;
659 struct hal_txq_info qi;
660 int ret = 0, qnum;
661
662 if (queue >= WME_NUM_AC)
663 return 0;
664
665 qi.tqi_aifs = params->aifs;
666 qi.tqi_cwmin = params->cw_min;
667 qi.tqi_cwmax = params->cw_max;
668 qi.tqi_burstTime = params->txop;
669 qnum = ath_get_hal_qnum(queue, sc);
670
671 DPRINTF(sc, ATH_DEBUG_CONFIG,
672 "%s: Configure tx [queue/halq] [%d/%d], "
673 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
674 __func__,
675 queue,
676 qnum,
677 params->aifs,
678 params->cw_min,
679 params->cw_max,
680 params->txop);
681
682 ret = ath_txq_update(sc, qnum, &qi);
683 if (ret)
684 DPRINTF(sc, ATH_DEBUG_FATAL,
685 "%s: TXQ Update failed\n", __func__);
686
687 return ret;
688 }
689
690 static int ath9k_set_key(struct ieee80211_hw *hw,
691 enum set_key_cmd cmd,
692 const u8 *local_addr,
693 const u8 *addr,
694 struct ieee80211_key_conf *key)
695 {
696 struct ath_softc *sc = hw->priv;
697 int ret = 0;
698
699 DPRINTF(sc, ATH_DEBUG_KEYCACHE, " %s: Set HW Key\n", __func__);
700
701 switch (cmd) {
702 case SET_KEY:
703 ret = ath_key_config(sc, addr, key);
704 if (!ret) {
705 set_bit(key->keyidx, sc->sc_keymap);
706 key->hw_key_idx = key->keyidx;
707 /* push IV and Michael MIC generation to stack */
708 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
709 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
710 }
711 break;
712 case DISABLE_KEY:
713 ath_key_delete(sc, key);
714 clear_bit(key->keyidx, sc->sc_keymap);
715 sc->sc_keytype = HAL_CIPHER_CLR;
716 break;
717 default:
718 ret = -EINVAL;
719 }
720
721 return ret;
722 }
723
724 static void ath9k_ht_conf(struct ath_softc *sc,
725 struct ieee80211_bss_conf *bss_conf)
726 {
727 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
728 struct ath_ht_info *ht_info = &sc->sc_ht_info;
729
730 if (bss_conf->assoc_ht) {
731 ht_info->ext_chan_offset =
732 bss_conf->ht_bss_conf->bss_cap &
733 IEEE80211_HT_IE_CHA_SEC_OFFSET;
734
735 if (!(bss_conf->ht_conf->cap &
736 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
737 (bss_conf->ht_bss_conf->bss_cap &
738 IEEE80211_HT_IE_CHA_WIDTH))
739 ht_info->tx_chan_width = HAL_HT_MACMODE_2040;
740 else
741 ht_info->tx_chan_width = HAL_HT_MACMODE_20;
742
743 cwm_action_mac_change_chwidth(sc, ht_info->tx_chan_width);
744 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
745 bss_conf->ht_conf->ampdu_factor);
746 ht_info->mpdudensity =
747 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
748
749 }
750
751 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
752 }
753
754 static void ath9k_bss_assoc_info(struct ath_softc *sc,
755 struct ieee80211_bss_conf *bss_conf)
756 {
757 struct ieee80211_hw *hw = sc->hw;
758 struct ieee80211_channel *curchan = hw->conf.channel;
759 struct hal_channel hchan;
760
761 if (bss_conf->assoc) {
762 /* FIXME : Do we need any other info
763 * which is part of association */
764 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Bss Info ASSOC %d\n",
765 __func__,
766 bss_conf->aid);
767 sc->sc_curaid = bss_conf->aid;
768
769 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Set channel: %d MHz\n",
770 __func__,
771 curchan->center_freq);
772
773 hchan.channel = curchan->center_freq;
774 hchan.channelFlags = ath_chan2flags(curchan, sc);
775
776 /* set h/w channel */
777 if (ath_set_channel(sc, &hchan) < 0)
778 DPRINTF(sc, ATH_DEBUG_FATAL,
779 "%s: Unable to set channel\n",
780 __func__);
781 } else {
782 DPRINTF(sc, ATH_DEBUG_CONFIG,
783 "%s: Bss Info DISSOC\n", __func__);
784 sc->sc_curaid = 0;
785 }
786 }
787
788 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
789 struct ieee80211_vif *vif,
790 struct ieee80211_bss_conf *bss_conf,
791 u32 changed)
792 {
793 struct ath_softc *sc = hw->priv;
794
795 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
796 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
797 __func__,
798 bss_conf->use_short_preamble);
799 if (bss_conf->use_short_preamble)
800 sc->sc_flags |= ATH_PREAMBLE_SHORT;
801 else
802 sc->sc_flags &= ~ATH_PREAMBLE_SHORT;
803 }
804
805 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
806 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
807 __func__,
808 bss_conf->use_cts_prot);
809 if (bss_conf->use_cts_prot &&
810 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
811 sc->sc_flags |= ATH_PROTECT_ENABLE;
812 else
813 sc->sc_flags &= ~ATH_PROTECT_ENABLE;
814 }
815
816 if (changed & BSS_CHANGED_HT) {
817 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed HT %d\n",
818 __func__,
819 bss_conf->assoc_ht);
820 ath9k_ht_conf(sc, bss_conf);
821 }
822
823 if (changed & BSS_CHANGED_ASSOC) {
824 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: BSS Changed ASSOC %d\n",
825 __func__,
826 bss_conf->assoc);
827 ath9k_bss_assoc_info(sc, bss_conf);
828 }
829 }
830
831 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
832 {
833 u_int64_t tsf;
834 struct ath_softc *sc = hw->priv;
835 struct ath_hal *ah = sc->sc_ah;
836
837 tsf = ath9k_hw_gettsf64(ah);
838
839 return tsf;
840 }
841
842 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
843 {
844 struct ath_softc *sc = hw->priv;
845 struct ath_hal *ah = sc->sc_ah;
846
847 ath9k_hw_reset_tsf(ah);
848 }
849
850 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
851 enum ieee80211_ampdu_mlme_action action,
852 const u8 *addr,
853 u16 tid,
854 u16 *ssn)
855 {
856 struct ath_softc *sc = hw->priv;
857 int ret = 0;
858
859 switch (action) {
860 case IEEE80211_AMPDU_RX_START:
861 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
862 if (ret < 0)
863 DPRINTF(sc, ATH_DEBUG_FATAL,
864 "%s: Unable to start RX aggregation\n",
865 __func__);
866 break;
867 case IEEE80211_AMPDU_RX_STOP:
868 ret = ath_rx_aggr_stop(sc, addr, tid);
869 if (ret < 0)
870 DPRINTF(sc, ATH_DEBUG_FATAL,
871 "%s: Unable to stop RX aggregation\n",
872 __func__);
873 break;
874 case IEEE80211_AMPDU_TX_START:
875 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
876 if (ret < 0)
877 DPRINTF(sc, ATH_DEBUG_FATAL,
878 "%s: Unable to start TX aggregation\n",
879 __func__);
880 else
881 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
882 break;
883 case IEEE80211_AMPDU_TX_STOP:
884 ret = ath_tx_aggr_stop(sc, addr, tid);
885 if (ret < 0)
886 DPRINTF(sc, ATH_DEBUG_FATAL,
887 "%s: Unable to stop TX aggregation\n",
888 __func__);
889
890 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
891 break;
892 default:
893 DPRINTF(sc, ATH_DEBUG_FATAL,
894 "%s: Unknown AMPDU action\n", __func__);
895 }
896
897 return ret;
898 }
899
900 static struct ieee80211_ops ath9k_ops = {
901 .tx = ath9k_tx,
902 .start = ath9k_start,
903 .stop = ath9k_stop,
904 .add_interface = ath9k_add_interface,
905 .remove_interface = ath9k_remove_interface,
906 .config = ath9k_config,
907 .config_interface = ath9k_config_interface,
908 .configure_filter = ath9k_configure_filter,
909 .get_stats = NULL,
910 .sta_notify = ath9k_sta_notify,
911 .conf_tx = ath9k_conf_tx,
912 .get_tx_stats = NULL,
913 .bss_info_changed = ath9k_bss_info_changed,
914 .set_tim = NULL,
915 .set_key = ath9k_set_key,
916 .hw_scan = NULL,
917 .get_tkip_seq = NULL,
918 .set_rts_threshold = NULL,
919 .set_frag_threshold = NULL,
920 .set_retry_limit = NULL,
921 .get_tsf = ath9k_get_tsf,
922 .reset_tsf = ath9k_reset_tsf,
923 .tx_last_beacon = NULL,
924 .ampdu_action = ath9k_ampdu_action
925 };
926
927 u_int32_t ath_chan2flags(struct ieee80211_channel *chan,
928 struct ath_softc *sc)
929 {
930 struct ieee80211_hw *hw = sc->hw;
931 struct ath_ht_info *ht_info = &sc->sc_ht_info;
932
933 if (sc->sc_scanning) {
934 if (chan->band == IEEE80211_BAND_5GHZ) {
935 if (ath_check_chanflags(chan, CHANNEL_A_HT20, sc))
936 return CHANNEL_A_HT20;
937 else
938 return CHANNEL_A;
939 } else {
940 if (ath_check_chanflags(chan, CHANNEL_G_HT20, sc))
941 return CHANNEL_G_HT20;
942 else if (ath_check_chanflags(chan, CHANNEL_G, sc))
943 return CHANNEL_G;
944 else
945 return CHANNEL_B;
946 }
947 } else {
948 if (chan->band == IEEE80211_BAND_2GHZ) {
949 if (!hw->conf.ht_conf.ht_supported) {
950 if (ath_check_chanflags(chan, CHANNEL_G, sc))
951 return CHANNEL_G;
952 else
953 return CHANNEL_B;
954 }
955 if ((ht_info->ext_chan_offset ==
956 IEEE80211_HT_IE_CHA_SEC_NONE) &&
957 (ht_info->tx_chan_width == HAL_HT_MACMODE_20))
958 return CHANNEL_G_HT20;
959 if ((ht_info->ext_chan_offset ==
960 IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
961 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
962 return CHANNEL_G_HT40PLUS;
963 if ((ht_info->ext_chan_offset ==
964 IEEE80211_HT_IE_CHA_SEC_BELOW) &&
965 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
966 return CHANNEL_G_HT40MINUS;
967 return CHANNEL_B;
968 } else {
969 if (!hw->conf.ht_conf.ht_supported)
970 return CHANNEL_A;
971 if ((ht_info->ext_chan_offset ==
972 IEEE80211_HT_IE_CHA_SEC_NONE) &&
973 (ht_info->tx_chan_width == HAL_HT_MACMODE_20))
974 return CHANNEL_A_HT20;
975 if ((ht_info->ext_chan_offset ==
976 IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
977 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
978 return CHANNEL_A_HT40PLUS;
979 if ((ht_info->ext_chan_offset ==
980 IEEE80211_HT_IE_CHA_SEC_BELOW) &&
981 (ht_info->tx_chan_width == HAL_HT_MACMODE_2040))
982 return CHANNEL_A_HT40MINUS;
983 return CHANNEL_A;
984 }
985 }
986 }
987
988 void ath_setup_channel_list(struct ath_softc *sc,
989 enum ieee80211_clist_cmd cmd,
990 const struct hal_channel *chans,
991 int nchan,
992 const u_int8_t *regclassids,
993 u_int nregclass,
994 int countrycode)
995 {
996 const struct hal_channel *c;
997 int i, a = 0, b = 0, flags;
998
999 if (countrycode == CTRY_DEFAULT) {
1000 for (i = 0; i < nchan; i++) {
1001 c = &chans[i];
1002 flags = 0;
1003 /* XXX: Ah! make more readable, and
1004 * idententation friendly */
1005 if (IS_CHAN_2GHZ(c) &&
1006 !test_update_chan(IEEE80211_BAND_2GHZ, c, sc)) {
1007 sc->channels[IEEE80211_BAND_2GHZ][a].band =
1008 IEEE80211_BAND_2GHZ;
1009 sc->channels[IEEE80211_BAND_2GHZ][a].
1010 center_freq =
1011 c->channel;
1012 sc->channels[IEEE80211_BAND_2GHZ][a].max_power =
1013 c->maxTxPower;
1014 sc->channels[IEEE80211_BAND_2GHZ][a].hw_value =
1015 c->channelFlags;
1016
1017 if (c->privFlags & CHANNEL_DISALLOW_ADHOC)
1018 flags |= IEEE80211_CHAN_NO_IBSS;
1019 if (IS_CHAN_PASSIVE(c))
1020 flags |= IEEE80211_CHAN_PASSIVE_SCAN;
1021
1022 sc->channels[IEEE80211_BAND_2GHZ][a].flags =
1023 flags;
1024 sc->sbands[IEEE80211_BAND_2GHZ].n_channels++;
1025 a++;
1026 DPRINTF(sc, ATH_DEBUG_CONFIG,
1027 "%s: 2MHz channel: %d, "
1028 "channelFlags: 0x%x\n",
1029 __func__,
1030 c->channel,
1031 c->channelFlags);
1032 } else if (IS_CHAN_5GHZ(c) &&
1033 !test_update_chan(IEEE80211_BAND_5GHZ, c, sc)) {
1034 sc->channels[IEEE80211_BAND_5GHZ][b].band =
1035 IEEE80211_BAND_5GHZ;
1036 sc->channels[IEEE80211_BAND_5GHZ][b].
1037 center_freq =
1038 c->channel;
1039 sc->channels[IEEE80211_BAND_5GHZ][b].max_power =
1040 c->maxTxPower;
1041 sc->channels[IEEE80211_BAND_5GHZ][b].hw_value =
1042 c->channelFlags;
1043
1044 if (c->privFlags & CHANNEL_DISALLOW_ADHOC)
1045 flags |= IEEE80211_CHAN_NO_IBSS;
1046 if (IS_CHAN_PASSIVE(c))
1047 flags |= IEEE80211_CHAN_PASSIVE_SCAN;
1048
1049 sc->channels[IEEE80211_BAND_5GHZ][b].
1050 flags = flags;
1051 sc->sbands[IEEE80211_BAND_5GHZ].n_channels++;
1052 b++;
1053 DPRINTF(sc, ATH_DEBUG_CONFIG,
1054 "%s: 5MHz channel: %d, "
1055 "channelFlags: 0x%x\n",
1056 __func__,
1057 c->channel,
1058 c->channelFlags);
1059 }
1060 }
1061 }
1062 }
1063
1064 void ath__update_txpow(struct ath_softc *sc,
1065 u_int16_t txpowlimit,
1066 u_int16_t txpowlevel)
1067 {
1068
1069 }
1070
1071 void ath_get_beaconconfig(struct ath_softc *sc,
1072 int if_id,
1073 struct ath_beacon_config *conf)
1074 {
1075 struct ieee80211_hw *hw = sc->hw;
1076
1077 /* fill in beacon config data */
1078
1079 conf->beacon_interval = hw->conf.beacon_int;
1080 conf->listen_interval = 100;
1081 conf->dtim_count = 1;
1082 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
1083 }
1084
1085 struct sk_buff *ath_get_beacon(struct ath_softc *sc,
1086 int if_id,
1087 struct ath_beacon_offset *bo,
1088 struct ath_tx_control *txctl)
1089 {
1090 return NULL;
1091 }
1092
1093 int ath_update_beacon(struct ath_softc *sc,
1094 int if_id,
1095 struct ath_beacon_offset *bo,
1096 struct sk_buff *skb,
1097 int mcast)
1098 {
1099 return 0;
1100 }
1101
1102 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1103 struct ath_xmit_status *tx_status, struct ath_node *an)
1104 {
1105 struct ieee80211_hw *hw = sc->hw;
1106 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1107
1108 DPRINTF(sc, ATH_DEBUG_XMIT,
1109 "%s: TX complete: skb: %p\n", __func__, skb);
1110
1111 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
1112 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
1113 /* free driver's private data area of tx_info */
1114 if (tx_info->driver_data[0] != NULL)
1115 kfree(tx_info->driver_data[0]);
1116 tx_info->driver_data[0] = NULL;
1117 }
1118
1119 if (tx_status->flags & ATH_TX_BAR) {
1120 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
1121 tx_status->flags &= ~ATH_TX_BAR;
1122 }
1123 if (tx_status->flags)
1124 tx_info->status.excessive_retries = 1;
1125
1126 tx_info->status.retry_count = tx_status->retries;
1127
1128 ieee80211_tx_status(hw, skb);
1129 if (an)
1130 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
1131 }
1132
1133 int ath__rx_indicate(struct ath_softc *sc,
1134 struct sk_buff *skb,
1135 struct ath_recv_status *status,
1136 u_int16_t keyix)
1137 {
1138 struct ieee80211_hw *hw = sc->hw;
1139 struct ath_node *an = NULL;
1140 struct ieee80211_rx_status rx_status;
1141 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1142 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1143 int padsize;
1144 enum ATH_RX_TYPE st;
1145
1146 /* see if any padding is done by the hw and remove it */
1147 if (hdrlen & 3) {
1148 padsize = hdrlen % 4;
1149 memmove(skb->data + padsize, skb->data, hdrlen);
1150 skb_pull(skb, padsize);
1151 }
1152
1153 /* remove FCS before passing up to protocol stack */
1154 skb_trim(skb, (skb->len - FCS_LEN));
1155
1156 /* Prepare rx status */
1157 ath9k_rx_prepare(sc, skb, status, &rx_status);
1158
1159 if (!(keyix == HAL_RXKEYIX_INVALID) &&
1160 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
1161 rx_status.flag |= RX_FLAG_DECRYPTED;
1162 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
1163 && !(status->flags & ATH_RX_DECRYPT_ERROR)
1164 && skb->len >= hdrlen + 4) {
1165 keyix = skb->data[hdrlen + 3] >> 6;
1166
1167 if (test_bit(keyix, sc->sc_keymap))
1168 rx_status.flag |= RX_FLAG_DECRYPTED;
1169 }
1170
1171 spin_lock_bh(&sc->node_lock);
1172 an = ath_node_find(sc, hdr->addr2);
1173 spin_unlock_bh(&sc->node_lock);
1174
1175 if (an) {
1176 ath_rx_input(sc, an,
1177 hw->conf.ht_conf.ht_supported,
1178 skb, status, &st);
1179 }
1180 if (!an || (st != ATH_RX_CONSUMED))
1181 __ieee80211_rx(hw, skb, &rx_status);
1182
1183 return 0;
1184 }
1185
1186 int ath_rx_subframe(struct ath_node *an,
1187 struct sk_buff *skb,
1188 struct ath_recv_status *status)
1189 {
1190 struct ath_softc *sc = an->an_sc;
1191 struct ieee80211_hw *hw = sc->hw;
1192 struct ieee80211_rx_status rx_status;
1193
1194 /* Prepare rx status */
1195 ath9k_rx_prepare(sc, skb, status, &rx_status);
1196 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
1197 rx_status.flag |= RX_FLAG_DECRYPTED;
1198
1199 __ieee80211_rx(hw, skb, &rx_status);
1200
1201 return 0;
1202 }
1203
1204 enum hal_ht_macmode ath_cwm_macmode(struct ath_softc *sc)
1205 {
1206 return sc->sc_ht_info.tx_chan_width;
1207 }
1208
1209 void ath_setup_rate(struct ath_softc *sc,
1210 enum wireless_mode wMode,
1211 enum RATE_TYPE type,
1212 const struct hal_rate_table *rt)
1213 {
1214 int i, maxrates, a = 0, b = 0;
1215 struct ieee80211_supported_band *band_2ghz;
1216 struct ieee80211_supported_band *band_5ghz;
1217 struct ieee80211_rate *rates_2ghz;
1218 struct ieee80211_rate *rates_5ghz;
1219
1220 if ((wMode >= WIRELESS_MODE_MAX) || (type != NORMAL_RATE))
1221 return;
1222
1223 band_2ghz = &sc->sbands[IEEE80211_BAND_2GHZ];
1224 band_5ghz = &sc->sbands[IEEE80211_BAND_5GHZ];
1225 rates_2ghz = sc->rates[IEEE80211_BAND_2GHZ];
1226 rates_5ghz = sc->rates[IEEE80211_BAND_5GHZ];
1227
1228 if (rt->rateCount > ATH_RATE_MAX)
1229 maxrates = ATH_RATE_MAX;
1230 else
1231 maxrates = rt->rateCount;
1232
1233 if ((band_2ghz->n_bitrates != 0) && (band_5ghz->n_bitrates != 0)) {
1234 DPRINTF(sc, ATH_DEBUG_CONFIG,
1235 "%s: Rates already setup\n", __func__);
1236 return;
1237 }
1238
1239 for (i = 0; i < maxrates; i++) {
1240 switch (wMode) {
1241 case WIRELESS_MODE_11b:
1242 case WIRELESS_MODE_11g:
1243 rates_2ghz[a].bitrate = rt->info[i].rateKbps / 100;
1244 rates_2ghz[a].hw_value = rt->info[i].rateCode;
1245 a++;
1246 band_2ghz->n_bitrates = a;
1247 break;
1248 case WIRELESS_MODE_11a:
1249 rates_5ghz[b].bitrate = rt->info[i].rateKbps / 100;
1250 rates_5ghz[b].hw_value = rt->info[i].rateCode;
1251 b++;
1252 band_5ghz->n_bitrates = b;
1253 break;
1254 default:
1255 break;
1256 }
1257 }
1258
1259 if (band_2ghz->n_bitrates) {
1260 for (i = 0; i < band_2ghz->n_bitrates; i++) {
1261 DPRINTF(sc, ATH_DEBUG_CONFIG,
1262 "%s: 2GHz Rate: %2dMbps, ratecode: %2d\n",
1263 __func__,
1264 rates_2ghz[i].bitrate / 10,
1265 rates_2ghz[i].hw_value);
1266 }
1267 } else if (band_5ghz->n_bitrates) {
1268 for (i = 0; i < band_5ghz->n_bitrates; i++) {
1269 DPRINTF(sc, ATH_DEBUG_CONFIG,
1270 "%s: 5Ghz Rate: %2dMbps, ratecode: %2d\n",
1271 __func__,
1272 rates_5ghz[i].bitrate / 10,
1273 rates_5ghz[i].hw_value);
1274 }
1275 }
1276 }
1277
1278 static int ath_detach(struct ath_softc *sc)
1279 {
1280 struct ieee80211_hw *hw = sc->hw;
1281
1282 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Detach ATH hw\n", __func__);
1283
1284 /* Unregister hw */
1285
1286 ieee80211_unregister_hw(hw);
1287
1288 /* unregister Rate control */
1289 ath_rate_control_unregister();
1290
1291 /* tx/rx cleanup */
1292
1293 ath_rx_cleanup(sc);
1294 ath_tx_cleanup(sc);
1295
1296 /* Deinit */
1297
1298 ath_deinit(sc);
1299
1300 return 0;
1301 }
1302
1303 static int ath_attach(u_int16_t devid,
1304 struct ath_softc *sc)
1305 {
1306 struct ieee80211_hw *hw = sc->hw;
1307 int error = 0;
1308
1309 DPRINTF(sc, ATH_DEBUG_CONFIG, "%s: Attach ATH hw\n", __func__);
1310
1311 error = ath_init(devid, sc);
1312 if (error != 0)
1313 return error;
1314
1315 /* Init nodes */
1316
1317 INIT_LIST_HEAD(&sc->node_list);
1318 spin_lock_init(&sc->node_lock);
1319
1320 /* get mac address from hardware and set in mac80211 */
1321
1322 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
1323
1324 /* setup channels and rates */
1325
1326 sc->sbands[IEEE80211_BAND_2GHZ].channels =
1327 sc->channels[IEEE80211_BAND_2GHZ];
1328 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1329 sc->rates[IEEE80211_BAND_2GHZ];
1330 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1331
1332 if (sc->sc_hashtsupport)
1333 /* Setup HT capabilities for 2.4Ghz*/
1334 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
1335
1336 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1337 &sc->sbands[IEEE80211_BAND_2GHZ];
1338
1339 if (sc->sc_ah->ah_caps.halWirelessModes & ATH9K_MODE_SEL_11A) {
1340 sc->sbands[IEEE80211_BAND_5GHZ].channels =
1341 sc->channels[IEEE80211_BAND_5GHZ];
1342 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1343 sc->rates[IEEE80211_BAND_5GHZ];
1344 sc->sbands[IEEE80211_BAND_5GHZ].band =
1345 IEEE80211_BAND_5GHZ;
1346
1347 if (sc->sc_hashtsupport)
1348 /* Setup HT capabilities for 5Ghz*/
1349 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
1350
1351 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1352 &sc->sbands[IEEE80211_BAND_5GHZ];
1353 }
1354
1355 /* FIXME: Have to figure out proper hw init values later */
1356
1357 hw->queues = 4;
1358 hw->ampdu_queues = 1;
1359
1360 /* Register rate control */
1361 hw->rate_control_algorithm = "ath9k_rate_control";
1362 error = ath_rate_control_register();
1363 if (error != 0) {
1364 DPRINTF(sc, ATH_DEBUG_FATAL,
1365 "%s: Unable to register rate control "
1366 "algorithm:%d\n", __func__, error);
1367 ath_rate_control_unregister();
1368 goto bad;
1369 }
1370
1371 error = ieee80211_register_hw(hw);
1372 if (error != 0) {
1373 ath_rate_control_unregister();
1374 goto bad;
1375 }
1376
1377 /* initialize tx/rx engine */
1378
1379 error = ath_tx_init(sc, ATH_TXBUF);
1380 if (error != 0)
1381 goto bad1;
1382
1383 error = ath_rx_init(sc, ATH_RXBUF);
1384 if (error != 0)
1385 goto bad1;
1386
1387 return 0;
1388 bad1:
1389 ath_detach(sc);
1390 bad:
1391 return error;
1392 }
1393
1394 static irqreturn_t ath_isr(int irq, void *dev_id)
1395 {
1396 struct ath_softc *sc = dev_id;
1397 int sched;
1398
1399 /* always acknowledge the interrupt */
1400 sched = ath_intr(sc);
1401
1402 switch (sched) {
1403 case ATH_ISR_NOSCHED:
1404 return IRQ_HANDLED;
1405 case ATH_ISR_NOTMINE:
1406 return IRQ_NONE;
1407 default:
1408 tasklet_schedule(&sc->intr_tq);
1409 return IRQ_HANDLED;
1410
1411 }
1412 }
1413
1414 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1415 {
1416 void __iomem *mem;
1417 struct ath_softc *sc;
1418 struct ieee80211_hw *hw;
1419 const char *athname;
1420 u_int8_t csz;
1421 u32 val;
1422 int ret = 0;
1423
1424 if (pci_enable_device(pdev))
1425 return -EIO;
1426
1427 /* XXX 32-bit addressing only */
1428 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1429 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1430 ret = -ENODEV;
1431 goto bad;
1432 }
1433
1434 /*
1435 * Cache line size is used to size and align various
1436 * structures used to communicate with the hardware.
1437 */
1438 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1439 if (csz == 0) {
1440 /*
1441 * Linux 2.4.18 (at least) writes the cache line size
1442 * register as a 16-bit wide register which is wrong.
1443 * We must have this setup properly for rx buffer
1444 * DMA to work so force a reasonable value here if it
1445 * comes up zero.
1446 */
1447 csz = L1_CACHE_BYTES / sizeof(u_int32_t);
1448 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1449 }
1450 /*
1451 * The default setting of latency timer yields poor results,
1452 * set it to the value used by other systems. It may be worth
1453 * tweaking this setting more.
1454 */
1455 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1456
1457 pci_set_master(pdev);
1458
1459 /*
1460 * Disable the RETRY_TIMEOUT register (0x41) to keep
1461 * PCI Tx retries from interfering with C3 CPU state.
1462 */
1463 pci_read_config_dword(pdev, 0x40, &val);
1464 if ((val & 0x0000ff00) != 0)
1465 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1466
1467 ret = pci_request_region(pdev, 0, "ath9k");
1468 if (ret) {
1469 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1470 ret = -ENODEV;
1471 goto bad;
1472 }
1473
1474 mem = pci_iomap(pdev, 0, 0);
1475 if (!mem) {
1476 printk(KERN_ERR "PCI memory map error\n") ;
1477 ret = -EIO;
1478 goto bad1;
1479 }
1480
1481 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1482 if (hw == NULL) {
1483 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1484 goto bad2;
1485 }
1486
1487 SET_IEEE80211_DEV(hw, &pdev->dev);
1488 pci_set_drvdata(pdev, hw);
1489
1490 sc = hw->priv;
1491 sc->hw = hw;
1492 sc->pdev = pdev;
1493 sc->mem = mem;
1494
1495 if (ath_attach(id->device, sc) != 0) {
1496 ret = -ENODEV;
1497 goto bad3;
1498 }
1499
1500 /* setup interrupt service routine */
1501
1502 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1503 printk(KERN_ERR "%s: request_irq failed\n",
1504 wiphy_name(hw->wiphy));
1505 ret = -EIO;
1506 goto bad4;
1507 }
1508
1509 athname = ath9k_hw_probe(id->vendor, id->device);
1510
1511 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1512 wiphy_name(hw->wiphy),
1513 athname ? athname : "Atheros ???",
1514 (unsigned long)mem, pdev->irq);
1515
1516 return 0;
1517 bad4:
1518 ath_detach(sc);
1519 bad3:
1520 ieee80211_free_hw(hw);
1521 bad2:
1522 pci_iounmap(pdev, mem);
1523 bad1:
1524 pci_release_region(pdev, 0);
1525 bad:
1526 pci_disable_device(pdev);
1527 return ret;
1528 }
1529
1530 static void ath_pci_remove(struct pci_dev *pdev)
1531 {
1532 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1533 struct ath_softc *sc = hw->priv;
1534
1535 if (pdev->irq)
1536 free_irq(pdev->irq, sc);
1537 ath_detach(sc);
1538 pci_iounmap(pdev, sc->mem);
1539 pci_release_region(pdev, 0);
1540 pci_disable_device(pdev);
1541 ieee80211_free_hw(hw);
1542 }
1543
1544 #ifdef CONFIG_PM
1545
1546 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1547 {
1548 pci_save_state(pdev);
1549 pci_disable_device(pdev);
1550 pci_set_power_state(pdev, 3);
1551
1552 return 0;
1553 }
1554
1555 static int ath_pci_resume(struct pci_dev *pdev)
1556 {
1557 u32 val;
1558 int err;
1559
1560 err = pci_enable_device(pdev);
1561 if (err)
1562 return err;
1563 pci_restore_state(pdev);
1564 /*
1565 * Suspend/Resume resets the PCI configuration space, so we have to
1566 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1567 * PCI Tx retries from interfering with C3 CPU state
1568 */
1569 pci_read_config_dword(pdev, 0x40, &val);
1570 if ((val & 0x0000ff00) != 0)
1571 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1572
1573 return 0;
1574 }
1575
1576 #endif /* CONFIG_PM */
1577
1578 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1579
1580 static struct pci_driver ath_pci_driver = {
1581 .name = "ath9k",
1582 .id_table = ath_pci_id_table,
1583 .probe = ath_pci_probe,
1584 .remove = ath_pci_remove,
1585 #ifdef CONFIG_PM
1586 .suspend = ath_pci_suspend,
1587 .resume = ath_pci_resume,
1588 #endif /* CONFIG_PM */
1589 };
1590
1591 static int __init init_ath_pci(void)
1592 {
1593 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1594
1595 if (pci_register_driver(&ath_pci_driver) < 0) {
1596 printk(KERN_ERR
1597 "ath_pci: No devices found, driver not installed.\n");
1598 pci_unregister_driver(&ath_pci_driver);
1599 return -ENODEV;
1600 }
1601
1602 return 0;
1603 }
1604 module_init(init_ath_pci);
1605
1606 static void __exit exit_ath_pci(void)
1607 {
1608 pci_unregister_driver(&ath_pci_driver);
1609 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1610 }
1611 module_exit(exit_ath_pci);
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