toolchain/gcc/patches/3.4.6/arm-softfloat.patch.conditional

   1 Note... modified my mjn3 to not conflict with the big endian arm patch.
   2 Warning!!!  Only the linux target is aware of TARGET_ENDIAN_DEFAULT.
   3 Also changed
   4   #define SUBTARGET_EXTRA_ASM_SPEC "\
   5   %{!mcpu=*:-mcpu=xscale} \
   6   %{mhard-float:-mfpu=fpa} \
   7   %{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
   8 to
   9   #define SUBTARGET_EXTRA_ASM_SPEC "\
  10   %{mhard-float:-mfpu=fpa} \
  11   %{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
  12 in gcc/config/arm/linux-elf.h.
  13 #
  14 # Submitted:
  15 #
  16 # Dimitry Andric <dimitry@andric.com>, 2004-05-01
  17 #
  18 # Description:
  19 #
  20 # Nicholas Pitre released this patch for gcc soft-float support here:
  21 # http://lists.arm.linux.org.uk/pipermail/linux-arm/2003-October/006436.html
  22 #
  23 # This version has been adapted to work with gcc 3.4.0.
  24 #
  25 # The original patch doesn't distinguish between softfpa and softvfp modes
  26 # in the way Nicholas Pitre probably meant.  His description is:
  27 #
  28 # "Default is to use APCS-32 mode with soft-vfp.  The old Linux default for
  29 # floats can be achieved with -mhard-float or with the configure
  30 # --with-float=hard option.  If -msoft-float or --with-float=soft is used then
  31 # software float support will be used just like the default but with the legacy
  32 # big endian word ordering for double float representation instead."
  33 #
  34 # Which means the following:
  35 #
  36 # * If you compile without -mhard-float or -msoft-float, you should get
  37 #   software floating point, using the VFP format.  The produced object file
  38 #   should have these flags in its header:
  39 #
  40 #     private flags = 600: [APCS-32] [VFP float format] [software FP]
  41 #
  42 # * If you compile with -mhard-float, you should get hardware floating point,
  43 #   which always uses the FPA format.  Object file header flags should be:
  44 #
  45 #     private flags = 0: [APCS-32] [FPA float format]
  46 #
  47 # * If you compile with -msoft-float, you should get software floating point,
  48 #   using the FPA format.  This is done for compatibility reasons with many
  49 #   existing distributions.  Object file header flags should be:
  50 #
  51 #     private flags = 200: [APCS-32] [FPA float format] [software FP]
  52 #
  53 # The original patch from Nicholas Pitre contained the following constructs:
  54 #
  55 #   #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
  56 #     %{mhard-float:-mfpu=fpa} \
  57 #     %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
  58 #
  59 # However, gcc doesn't accept this ";:" notation, used in the 3rd line.  This
  60 # is probably the reason Robert Schwebel modified it to:
  61 #
  62 #   #define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
  63 #     %{mhard-float:-mfpu=fpa} \
  64 #     %{!mhard-float: %{msoft-float:-mfpu=softfpa -mfpu=softvfp}}"
  65 #
  66 # But this causes the following behaviour:
  67 #
  68 # * If you compile without -mhard-float or -msoft-float, the compiler generates
  69 #   software floating point instructions, but *nothing* is passed to the
  70 #   assembler, which results in an object file which has flags:
  71 #
  72 #     private flags = 0: [APCS-32] [FPA float format]
  73 #
  74 #   This is not correct!
  75 #
  76 # * If you compile with -mhard-float, the compiler generates hardware floating
  77 #   point instructions, and passes "-mfpu=fpa" to the assembler, which results
  78 #   in an object file which has the same flags as in the previous item, but now
  79 #   those *are* correct.
  80 #
  81 # * If you compile with -msoft-float, the compiler generates software floating
  82 #   point instructions, and passes "-mfpu=softfpa -mfpu=softvfp" (in that
  83 #   order) to the assembler, which results in an object file with flags:
  84 #
  85 #   private flags = 600: [APCS-32] [VFP float format] [software FP]
  86 #
  87 #   This is not correct, because the last "-mfpu=" option on the assembler
  88 #   command line determines the actual FPU convention used (which should be FPA
  89 #   in this case).
  90 #
  91 # Therefore, I modified this patch to get the desired behaviour.  Every
  92 # instance of the notation:
  93 #
  94 #   %{msoft-float:-mfpu=softfpa -mfpu=softvfp}
  95 #
  96 # was changed to:
  97 #
  98 #   %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}
  99 #
 100 # I also did the following:
 101 #
 102 # * Modified all TARGET_DEFAULT macros I could find to include ARM_FLAG_VFP, to
 103 #   be consistent with Nicholas' original patch.
 104 # * Removed any "msoft-float" or "mhard-float" from all MULTILIB_DEFAULTS
 105 #   macros I could find.  I think that if you compile without any options, you
 106 #   would like to get the defaults. :)
 107 # * Removed the extra -lfloat option from LIBGCC_SPEC, since it isn't needed
 108 #   anymore.  (The required functions are now in libgcc.)
 109
 110 diff -urN gcc-3.4.1-old/gcc/config/arm/coff.h gcc-3.4.1/gcc/config/arm/coff.h
 111 --- gcc-3.4.1-old/gcc/config/arm/coff.h 2004-02-24 08:25:22.000000000 -0600
 112 +++ gcc-3.4.1/gcc/config/arm/coff.h     2004-09-02 21:51:15.000000000 -0500
 113 @@ -31,11 +31,16 @@
 114  #define TARGET_VERSION fputs (" (ARM/coff)", stderr)
 115
 116  #undef  TARGET_DEFAULT
 117 -#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
 118 +#define TARGET_DEFAULT         \
 119 +       ( ARM_FLAG_SOFT_FLOAT   \
 120 +       | ARM_FLAG_VFP          \
 121 +       | ARM_FLAG_APCS_32      \
 122 +       | ARM_FLAG_APCS_FRAME   \
 123 +       | ARM_FLAG_MMU_TRAPS )
 124
 125  #ifndef MULTILIB_DEFAULTS
 126  #define MULTILIB_DEFAULTS \
 127 -  { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork" }
 128 +  { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork" }
 129  #endif
 130  \f
 131  /* This is COFF, but prefer stabs.  */
 132 diff -urN gcc-3.4.1-old/gcc/config/arm/elf.h gcc-3.4.1/gcc/config/arm/elf.h
 133 --- gcc-3.4.1-old/gcc/config/arm/elf.h  2004-02-24 08:25:22.000000000 -0600
 134 +++ gcc-3.4.1/gcc/config/arm/elf.h      2004-09-02 21:51:15.000000000 -0500
 135 @@ -46,7 +46,9 @@
 136
 137  #ifndef SUBTARGET_ASM_FLOAT_SPEC
 138  #define SUBTARGET_ASM_FLOAT_SPEC "\
 139 -%{mapcs-float:-mfloat} %{msoft-float:-mfpu=softfpa}"
 140 +%{mapcs-float:-mfloat} \
 141 +%{mhard-float:-mfpu=fpa} \
 142 +%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
 143  #endif
 144
 145  #ifndef ASM_SPEC
 146 @@ -106,12 +108,17 @@
 147  #endif
 148
 149  #ifndef TARGET_DEFAULT
 150 -#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
 151 +#define TARGET_DEFAULT         \
 152 +       ( ARM_FLAG_SOFT_FLOAT   \
 153 +       | ARM_FLAG_VFP          \
 154 +       | ARM_FLAG_APCS_32      \
 155 +       | ARM_FLAG_APCS_FRAME   \
 156 +       | ARM_FLAG_MMU_TRAPS )
 157  #endif
 158
 159  #ifndef MULTILIB_DEFAULTS
 160  #define MULTILIB_DEFAULTS \
 161 -  { "marm", "mlittle-endian", "msoft-float", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
 162 +  { "marm", "mlittle-endian", "mapcs-32", "mno-thumb-interwork", "fno-leading-underscore" }
 163  #endif
 164  \f
 165  #define TARGET_ASM_FILE_START_APP_OFF true
 166 diff -urN gcc-3.4.1-old/gcc/config/arm/linux-elf.h gcc-3.4.1/gcc/config/arm/linux-elf.h
 167 --- gcc-3.4.1-old/gcc/config/arm/linux-elf.h    2004-09-02 21:50:52.000000000 -0500
 168 +++ gcc-3.4.1/gcc/config/arm/linux-elf.h        2004-09-02 22:00:49.000000000 -0500
 169 @@ -44,12 +44,26 @@
 170  #define TARGET_LINKER_EMULATION "armelf_linux"
 171  #endif
 172
 173 -/* Default is to use APCS-32 mode.  */
 174 +/*
 175 + * Default is to use APCS-32 mode with soft-vfp.
 176 + * The old Linux default for floats can be achieved with -mhard-float
 177 + * or with the configure --with-float=hard option.
 178 + * If -msoft-float or --with-float=soft is used then software float
 179 + * support will be used just like the default but with the legacy
 180 + * big endian word ordering for double float representation instead.
 181 + */
 182  #undef  TARGET_DEFAULT
 183 -#define TARGET_DEFAULT \
 184 -               ( ARM_FLAG_APCS_32 | \
 185 -                 ARM_FLAG_MMU_TRAPS | \
 186 -                 TARGET_ENDIAN_DEFAULT )
 187 +#define TARGET_DEFAULT         \
 188 +       ( ARM_FLAG_APCS_32      \
 189 +       | ARM_FLAG_SOFT_FLOAT   \
 190 +       | TARGET_ENDIAN_DEFAULT \
 191 +       | ARM_FLAG_VFP          \
 192 +       | ARM_FLAG_MMU_TRAPS )
 193 +
 194 +#undef  SUBTARGET_EXTRA_ASM_SPEC
 195 +#define SUBTARGET_EXTRA_ASM_SPEC "\
 196 +%{mhard-float:-mfpu=fpa} \
 197 +%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
 198
 199  #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
 200
 201 @@ -57,7 +71,7 @@
 202
 203  #undef  MULTILIB_DEFAULTS
 204  #define MULTILIB_DEFAULTS \
 205 -       { "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mapcs-32", "mno-thumb-interwork" }
 206 +       { "marm", TARGET_ENDIAN_OPTION, "mapcs-32", "mno-thumb-interwork" }
 207
 208  #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
 209
 210 @@ -72,7 +86,7 @@
 211     %{shared:-lc} \
 212     %{!shared:%{profile:-lc_p}%{!profile:-lc}}"
 213
 214 -#define LIBGCC_SPEC "%{msoft-float:-lfloat} -lgcc"
 215 +#define LIBGCC_SPEC "-lgcc"
 216
 217  /* Provide a STARTFILE_SPEC appropriate for GNU/Linux.  Here we add
 218     the GNU/Linux magical crtbegin.o file (see crtstuff.c) which
 219 diff -urN gcc-3.4.1-old/gcc/config/arm/t-linux gcc-3.4.1/gcc/config/arm/t-linux
 220 --- gcc-3.4.1-old/gcc/config/arm/t-linux        2003-09-20 16:09:07.000000000 -0500
 221 +++ gcc-3.4.1/gcc/config/arm/t-linux    2004-09-02 21:51:15.000000000 -0500
 222 @@ -4,7 +4,10 @@
 223  LIBGCC2_DEBUG_CFLAGS = -g0
 224
 225  LIB1ASMSRC = arm/lib1funcs.asm
 226 -LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx
 227 +LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx \
 228 +       _negdf2 _addsubdf3 _muldivdf3 _cmpdf2 _unorddf2 _fixdfsi _fixunsdfsi \
 229 +       _truncdfsf2 _negsf2 _addsubsf3 _muldivsf3 _cmpsf2 _unordsf2 \
 230 +       _fixsfsi _fixunssfsi
 231
 232  # MULTILIB_OPTIONS = mhard-float/msoft-float
 233  # MULTILIB_DIRNAMES = hard-float soft-float
 234 diff -urN gcc-3.4.1-old/gcc/config/arm/unknown-elf.h gcc-3.4.1/gcc/config/arm/unknown-elf.h
 235 --- gcc-3.4.1-old/gcc/config/arm/unknown-elf.h  2004-02-24 08:25:22.000000000 -0600
 236 +++ gcc-3.4.1/gcc/config/arm/unknown-elf.h      2004-09-02 21:51:15.000000000 -0500
 237 @@ -30,7 +30,12 @@
 238
 239  /* Default to using APCS-32 and software floating point.  */
 240  #ifndef TARGET_DEFAULT
 241 -#define TARGET_DEFAULT (ARM_FLAG_SOFT_FLOAT | ARM_FLAG_APCS_32 | ARM_FLAG_APCS_FRAME | ARM_FLAG_MMU_TRAPS)
 242 +#define TARGET_DEFAULT         \
 243 +       ( ARM_FLAG_SOFT_FLOAT   \
 244 +       | ARM_FLAG_VFP          \
 245 +       | ARM_FLAG_APCS_32      \
 246 +       | ARM_FLAG_APCS_FRAME   \
 247 +       | ARM_FLAG_MMU_TRAPS )
 248  #endif
 249
 250  /* Now we define the strings used to build the spec file.  */
 251 diff -urN gcc-3.4.1-old/gcc/config/arm/xscale-elf.h gcc-3.4.1/gcc/config/arm/xscale-elf.h
 252 --- gcc-3.4.1-old/gcc/config/arm/xscale-elf.h   2003-07-01 18:26:43.000000000 -0500
 253 +++ gcc-3.4.1/gcc/config/arm/xscale-elf.h       2004-09-02 21:51:15.000000000 -0500
 254 @@ -49,11 +49,12 @@
 255                      endian, regardless of the endian-ness of the memory
 256                      system.  */
 257
 258 -#define SUBTARGET_EXTRA_ASM_SPEC "%{!mcpu=*:-mcpu=xscale} \
 259 -  %{mhard-float:-mfpu=fpa} \
 260 -  %{!mhard-float: %{msoft-float:-mfpu=softfpa;:-mfpu=softvfp}}"
 261 +#define SUBTARGET_EXTRA_ASM_SPEC "\
 262 +%{!mcpu=*:-mcpu=xscale} \
 263 +%{mhard-float:-mfpu=fpa} \
 264 +%{!mhard-float: %{msoft-float:-mfpu=softfpa} %{!msoft-float:-mfpu=softvfp}}"
 265
 266  #ifndef MULTILIB_DEFAULTS
 267  #define MULTILIB_DEFAULTS \
 268 -  { "mlittle-endian", "mno-thumb-interwork", "marm", "msoft-float" }
 269 +  { "mlittle-endian", "mno-thumb-interwork", "marm" }
 270  #endif