target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include <linux/lockdep.h>
  33 #include "ar8216.h"
  34
  35 /* size of the vlan table */
  36 #define AR8X16_MAX_VLANS        128
  37 #define AR8X16_PROBE_RETRIES    10
  38
  39 struct ar8216_priv;
  40
  41 struct ar8xxx_chip {
  42         int (*hw_init)(struct ar8216_priv *priv);
  43         void (*init_port)(struct ar8216_priv *priv, int port);
  44         void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
  45                            u32 ingress, u32 members, u32 pvid);
  46         int (*atu_flush)(struct ar8216_priv *priv);
  47 };
  48
  49 struct ar8216_priv {
  50         struct switch_dev dev;
  51         struct phy_device *phy;
  52         u32 (*read)(struct ar8216_priv *priv, int reg);
  53         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  54         const struct net_device_ops *ndo_old;
  55         struct net_device_ops ndo;
  56         struct mutex reg_mutex;
  57         int chip_type;
  58         const struct ar8xxx_chip *chip;
  59         bool initialized;
  60         bool port4_phy;
  61         char buf[80];
  62
  63         bool init;
  64
  65         /* all fields below are cleared on reset */
  66         bool vlan;
  67         u16 vlan_id[AR8X16_MAX_VLANS];
  68         u8 vlan_table[AR8X16_MAX_VLANS];
  69         u8 vlan_tagged;
  70         u16 pvid[AR8216_NUM_PORTS];
  71 };
  72
  73 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  74
  75 static inline void
  76 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  77 {
  78         regaddr >>= 1;
  79         *r1 = regaddr & 0x1e;
  80
  81         regaddr >>= 5;
  82         *r2 = regaddr & 0x7;
  83
  84         regaddr >>= 3;
  85         *page = regaddr & 0x1ff;
  86 }
  87
  88 static u32
  89 ar8216_mii_read(struct ar8216_priv *priv, int reg)
  90 {
  91         struct phy_device *phy = priv->phy;
  92         struct mii_bus *bus = phy->bus;
  93         u16 r1, r2, page;
  94         u16 lo, hi;
  95
  96         split_addr((u32) reg, &r1, &r2, &page);
  97
  98         mutex_lock(&bus->mdio_lock);
  99
 100         bus->write(bus, 0x18, 0, page);
 101         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 102         lo = bus->read(bus, 0x10 | r2, r1);
 103         hi = bus->read(bus, 0x10 | r2, r1 + 1);
 104
 105         mutex_unlock(&bus->mdio_lock);
 106
 107         return (hi << 16) | lo;
 108 }
 109
 110 static void
 111 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 112 {
 113         struct phy_device *phy = priv->phy;
 114         struct mii_bus *bus = phy->bus;
 115         u16 r1, r2, r3;
 116         u16 lo, hi;
 117
 118         split_addr((u32) reg, &r1, &r2, &r3);
 119         lo = val & 0xffff;
 120         hi = (u16) (val >> 16);
 121
 122         mutex_lock(&bus->mdio_lock);
 123
 124         bus->write(bus, 0x18, 0, r3);
 125         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 126         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 127         bus->write(bus, 0x10 | r2, r1, lo);
 128
 129         mutex_unlock(&bus->mdio_lock);
 130 }
 131
 132 static void
 133 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
 134                      u16 dbg_addr, u16 dbg_data)
 135 {
 136         struct mii_bus *bus = priv->phy->bus;
 137
 138         mutex_lock(&bus->mdio_lock);
 139         bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
 140         bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
 141         mutex_unlock(&bus->mdio_lock);
 142 }
 143
 144 static u32
 145 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 146 {
 147         u32 v;
 148
 149         lockdep_assert_held(&priv->reg_mutex);
 150
 151         v = priv->read(priv, reg);
 152         v &= ~mask;
 153         v |= val;
 154         priv->write(priv, reg, v);
 155
 156         return v;
 157 }
 158
 159 static void
 160 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 161                       struct switch_port_link *link)
 162 {
 163         u32 status;
 164         u32 speed;
 165
 166         memset(link, '\0', sizeof(*link));
 167
 168         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 169
 170         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 171         if (link->aneg) {
 172                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 173                 if (!link->link)
 174                         return;
 175         } else {
 176                 link->link = true;
 177         }
 178
 179         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 180         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 181         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 182
 183         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 184                  AR8216_PORT_STATUS_SPEED_S;
 185
 186         switch (speed) {
 187         case AR8216_PORT_SPEED_10M:
 188                 link->speed = SWITCH_PORT_SPEED_10;
 189                 break;
 190         case AR8216_PORT_SPEED_100M:
 191                 link->speed = SWITCH_PORT_SPEED_100;
 192                 break;
 193         case AR8216_PORT_SPEED_1000M:
 194                 link->speed = SWITCH_PORT_SPEED_1000;
 195                 break;
 196         default:
 197                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 198                 break;
 199         }
 200 }
 201
 202 static int
 203 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 204                 struct switch_val *val)
 205 {
 206         struct ar8216_priv *priv = to_ar8216(dev);
 207         priv->vlan = !!val->value.i;
 208         return 0;
 209 }
 210
 211 static int
 212 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 213                 struct switch_val *val)
 214 {
 215         struct ar8216_priv *priv = to_ar8216(dev);
 216         val->value.i = priv->vlan;
 217         return 0;
 218 }
 219
 220
 221 static int
 222 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 223 {
 224         struct ar8216_priv *priv = to_ar8216(dev);
 225
 226         /* make sure no invalid PVIDs get set */
 227
 228         if (vlan >= dev->vlans)
 229                 return -EINVAL;
 230
 231         priv->pvid[port] = vlan;
 232         return 0;
 233 }
 234
 235 static int
 236 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 237 {
 238         struct ar8216_priv *priv = to_ar8216(dev);
 239         *vlan = priv->pvid[port];
 240         return 0;
 241 }
 242
 243 static int
 244 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 245                struct switch_val *val)
 246 {
 247         struct ar8216_priv *priv = to_ar8216(dev);
 248         priv->vlan_id[val->port_vlan] = val->value.i;
 249         return 0;
 250 }
 251
 252 static int
 253 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 254                struct switch_val *val)
 255 {
 256         struct ar8216_priv *priv = to_ar8216(dev);
 257         val->value.i = priv->vlan_id[val->port_vlan];
 258         return 0;
 259 }
 260
 261 static int
 262 ar8216_get_port_link(struct switch_dev *dev, int port,
 263                      struct switch_port_link *link)
 264 {
 265         struct ar8216_priv *priv = to_ar8216(dev);
 266
 267         ar8216_read_port_link(priv, port, link);
 268         return 0;
 269 }
 270
 271 static int
 272 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 273 {
 274         struct ar8216_priv *priv = dev->phy_ptr;
 275         unsigned char *buf;
 276
 277         if (unlikely(!priv))
 278                 goto error;
 279
 280         if (!priv->vlan)
 281                 goto send;
 282
 283         if (unlikely(skb_headroom(skb) < 2)) {
 284                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 285                         goto error;
 286         }
 287
 288         buf = skb_push(skb, 2);
 289         buf[0] = 0x10;
 290         buf[1] = 0x80;
 291
 292 send:
 293         return priv->ndo_old->ndo_start_xmit(skb, dev);
 294
 295 error:
 296         dev_kfree_skb_any(skb);
 297         return 0;
 298 }
 299
 300 static int
 301 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 302 {
 303         struct ar8216_priv *priv;
 304         struct net_device *dev;
 305         unsigned char *buf;
 306         int port, vlan;
 307
 308         dev = skb->dev;
 309         if (!dev)
 310                 goto error;
 311
 312         priv = dev->phy_ptr;
 313         if (!priv)
 314                 goto error;
 315
 316         /* don't strip the header if vlan mode is disabled */
 317         if (!priv->vlan)
 318                 goto recv;
 319
 320         /* strip header, get vlan id */
 321         buf = skb->data;
 322         skb_pull(skb, 2);
 323
 324         /* check for vlan header presence */
 325         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 326                 goto recv;
 327
 328         port = buf[0] & 0xf;
 329
 330         /* no need to fix up packets coming from a tagged source */
 331         if (priv->vlan_tagged & (1 << port))
 332                 goto recv;
 333
 334         /* lookup port vid from local table, the switch passes an invalid vlan id */
 335         vlan = priv->vlan_id[priv->pvid[port]];
 336
 337         buf[14 + 2] &= 0xf0;
 338         buf[14 + 2] |= vlan >> 8;
 339         buf[15 + 2] = vlan & 0xff;
 340
 341 recv:
 342         skb->protocol = eth_type_trans(skb, skb->dev);
 343
 344         if (napi)
 345                 return netif_receive_skb(skb);
 346         else
 347                 return netif_rx(skb);
 348
 349 error:
 350         /* no vlan? eat the packet! */
 351         dev_kfree_skb_any(skb);
 352         return NET_RX_DROP;
 353 }
 354
 355 static int
 356 ar8216_netif_rx(struct sk_buff *skb)
 357 {
 358         return ar8216_mangle_rx(skb, 0);
 359 }
 360
 361 static int
 362 ar8216_netif_receive_skb(struct sk_buff *skb)
 363 {
 364         return ar8216_mangle_rx(skb, 1);
 365 }
 366
 367
 368 static struct switch_attr ar8216_globals[] = {
 369         {
 370                 .type = SWITCH_TYPE_INT,
 371                 .name = "enable_vlan",
 372                 .description = "Enable VLAN mode",
 373                 .set = ar8216_set_vlan,
 374                 .get = ar8216_get_vlan,
 375                 .max = 1
 376         },
 377 };
 378
 379 static struct switch_attr ar8216_port[] = {
 380 };
 381
 382 static struct switch_attr ar8216_vlan[] = {
 383         {
 384                 .type = SWITCH_TYPE_INT,
 385                 .name = "vid",
 386                 .description = "VLAN ID (0-4094)",
 387                 .set = ar8216_set_vid,
 388                 .get = ar8216_get_vid,
 389                 .max = 4094,
 390         },
 391 };
 392
 393
 394 static int
 395 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 396 {
 397         struct ar8216_priv *priv = to_ar8216(dev);
 398         u8 ports = priv->vlan_table[val->port_vlan];
 399         int i;
 400
 401         val->len = 0;
 402         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 403                 struct switch_port *p;
 404
 405                 if (!(ports & (1 << i)))
 406                         continue;
 407
 408                 p = &val->value.ports[val->len++];
 409                 p->id = i;
 410                 if (priv->vlan_tagged & (1 << i))
 411                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 412                 else
 413                         p->flags = 0;
 414         }
 415         return 0;
 416 }
 417
 418 static int
 419 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 420 {
 421         struct ar8216_priv *priv = to_ar8216(dev);
 422         u8 *vt = &priv->vlan_table[val->port_vlan];
 423         int i, j;
 424
 425         *vt = 0;
 426         for (i = 0; i < val->len; i++) {
 427                 struct switch_port *p = &val->value.ports[i];
 428
 429                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
 430                         priv->vlan_tagged |= (1 << p->id);
 431                 } else {
 432                         priv->vlan_tagged &= ~(1 << p->id);
 433                         priv->pvid[p->id] = val->port_vlan;
 434
 435                         /* make sure that an untagged port does not
 436                          * appear in other vlans */
 437                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 438                                 if (j == val->port_vlan)
 439                                         continue;
 440                                 priv->vlan_table[j] &= ~(1 << p->id);
 441                         }
 442                 }
 443
 444                 *vt |= 1 << p->id;
 445         }
 446         return 0;
 447 }
 448
 449 static int
 450 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 451 {
 452         int timeout = 20;
 453         u32 t = 0;
 454
 455         while (1) {
 456                 t = priv->read(priv, reg);
 457                 if ((t & mask) == val)
 458                         return 0;
 459
 460                 if (timeout-- <= 0)
 461                         break;
 462
 463                 udelay(10);
 464         }
 465
 466         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 467                (unsigned int) reg, t, mask, val);
 468         return -ETIMEDOUT;
 469 }
 470
 471 static void
 472 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 473 {
 474         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 475                 return;
 476         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 477                 val &= AR8216_VTUDATA_MEMBER;
 478                 val |= AR8216_VTUDATA_VALID;
 479                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 480         }
 481         op |= AR8216_VTU_ACTIVE;
 482         priv->write(priv, AR8216_REG_VTU, op);
 483 }
 484
 485 static int
 486 ar8216_atu_flush(struct ar8216_priv *priv)
 487 {
 488         int ret;
 489
 490         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
 491         if (!ret)
 492                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
 493
 494         return ret;
 495 }
 496
 497 static void
 498 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 499                   u32 members, u32 pvid)
 500 {
 501         u32 header;
 502
 503         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
 504                 header = AR8216_PORT_CTRL_HEADER;
 505         else
 506                 header = 0;
 507
 508         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 509                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 510                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 511                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 512                    AR8216_PORT_CTRL_LEARN | header |
 513                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 514                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 515
 516         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 517                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 518                    AR8216_PORT_VLAN_DEFAULT_ID,
 519                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 520                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 521                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 522 }
 523
 524 static void
 525 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 526                   u32 members, u32 pvid)
 527 {
 528         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 529                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 530                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 531                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 532                    AR8216_PORT_CTRL_LEARN |
 533                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 534                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 535
 536         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 537                    AR8236_PORT_VLAN_DEFAULT_ID,
 538                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 539
 540         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 541                    AR8236_PORT_VLAN2_VLAN_MODE |
 542                    AR8236_PORT_VLAN2_MEMBER,
 543                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 544                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 545 }
 546
 547 static int
 548 ar8216_hw_apply(struct switch_dev *dev)
 549 {
 550         struct ar8216_priv *priv = to_ar8216(dev);
 551         u8 portmask[AR8216_NUM_PORTS];
 552         int i, j;
 553
 554         mutex_lock(&priv->reg_mutex);
 555         /* flush all vlan translation unit entries */
 556         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 557
 558         memset(portmask, 0, sizeof(portmask));
 559         if (!priv->init) {
 560                 /* calculate the port destination masks and load vlans
 561                  * into the vlan translation unit */
 562                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 563                         u8 vp = priv->vlan_table[j];
 564
 565                         if (!vp)
 566                                 continue;
 567
 568                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 569                                 u8 mask = (1 << i);
 570                                 if (vp & mask)
 571                                         portmask[i] |= vp & ~mask;
 572                         }
 573
 574                         ar8216_vtu_op(priv,
 575                                 AR8216_VTU_OP_LOAD |
 576                                 (priv->vlan_id[j] << AR8216_VTU_VID_S),
 577                                 priv->vlan_table[j]);
 578                 }
 579         } else {
 580                 /* vlan disabled:
 581                  * isolate all ports, but connect them to the cpu port */
 582                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 583                         if (i == AR8216_PORT_CPU)
 584                                 continue;
 585
 586                         portmask[i] = 1 << AR8216_PORT_CPU;
 587                         portmask[AR8216_PORT_CPU] |= (1 << i);
 588                 }
 589         }
 590
 591         /* update the port destination mask registers and tag settings */
 592         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 593                 int egress, ingress;
 594                 int pvid;
 595
 596                 if (priv->vlan) {
 597                         pvid = priv->vlan_id[priv->pvid[i]];
 598                         if (priv->vlan_tagged & (1 << i))
 599                                 egress = AR8216_OUT_ADD_VLAN;
 600                         else
 601                                 egress = AR8216_OUT_STRIP_VLAN;
 602                         ingress = AR8216_IN_SECURE;
 603                 } else {
 604                         pvid = i;
 605                         egress = AR8216_OUT_KEEP;
 606                         ingress = AR8216_IN_PORT_ONLY;
 607                 }
 608
 609                 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
 610                                        pvid);
 611         }
 612         mutex_unlock(&priv->reg_mutex);
 613         return 0;
 614 }
 615
 616 static int
 617 ar8216_hw_init(struct ar8216_priv *priv)
 618 {
 619         return 0;
 620 }
 621
 622 static int
 623 ar8236_hw_init(struct ar8216_priv *priv)
 624 {
 625         int i;
 626         struct mii_bus *bus;
 627
 628         if (priv->initialized)
 629                 return 0;
 630
 631         /* Initialize the PHYs */
 632         bus = priv->phy->bus;
 633         for (i = 0; i < 5; i++) {
 634                 mdiobus_write(bus, i, MII_ADVERTISE,
 635                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 636                               ADVERTISE_PAUSE_ASYM);
 637                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 638         }
 639         msleep(1000);
 640
 641         priv->initialized = true;
 642         return 0;
 643 }
 644
 645 static int
 646 ar8316_hw_init(struct ar8216_priv *priv)
 647 {
 648         int i;
 649         u32 val, newval;
 650         struct mii_bus *bus;
 651
 652         val = priv->read(priv, 0x8);
 653
 654         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 655                 if (priv->port4_phy) {
 656                         /* value taken from Ubiquiti RouterStation Pro */
 657                         newval = 0x81461bea;
 658                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 659                 } else {
 660                         newval = 0x01261be2;
 661                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 662                 }
 663         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 664                 /* value taken from AVM Fritz!Box 7390 sources */
 665                 newval = 0x010e5b71;
 666         } else {
 667                 /* no known value for phy interface */
 668                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 669                         priv->phy->interface);
 670                 return -EINVAL;
 671         }
 672
 673         if (val == newval)
 674                 goto out;
 675
 676         priv->write(priv, 0x8, newval);
 677
 678         /* Initialize the ports */
 679         bus = priv->phy->bus;
 680         for (i = 0; i < 5; i++) {
 681                 if ((i == 4) && priv->port4_phy &&
 682                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 683                         /* work around for phy4 rgmii mode */
 684                         ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
 685                         /* rx delay */
 686                         ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
 687                         /* tx delay */
 688                         ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
 689                         msleep(1000);
 690                 }
 691
 692                 /* initialize the port itself */
 693                 mdiobus_write(bus, i, MII_ADVERTISE,
 694                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 695                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 696                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 697                 msleep(1000);
 698         }
 699
 700 out:
 701         priv->initialized = true;
 702         return 0;
 703 }
 704
 705 static void
 706 ar8216_init_globals(struct ar8216_priv *priv)
 707 {
 708         switch (priv->chip_type) {
 709         case AR8216:
 710                 /* standard atheros magic */
 711                 priv->write(priv, 0x38, 0xc000050e);
 712
 713                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 714                            AR8216_GCTRL_MTU, 1518 + 8 + 2);
 715                 break;
 716         case AR8316:
 717                 /* standard atheros magic */
 718                 priv->write(priv, 0x38, 0xc000050e);
 719
 720                 /* enable cpu port to receive multicast and broadcast frames */
 721                 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 722
 723                 /* fall through */
 724         case AR8236:
 725                 /* enable jumbo frames */
 726                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 727                            AR8316_GCTRL_MTU, 9018 + 8 + 2);
 728                 break;
 729         }
 730 }
 731
 732 static void
 733 ar8216_init_port(struct ar8216_priv *priv, int port)
 734 {
 735         /* Enable port learning and tx */
 736         priv->write(priv, AR8216_REG_PORT_CTRL(port),
 737                 AR8216_PORT_CTRL_LEARN |
 738                 (4 << AR8216_PORT_CTRL_STATE_S));
 739
 740         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
 741
 742         if (port == AR8216_PORT_CPU) {
 743                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 744                         AR8216_PORT_STATUS_LINK_UP |
 745                         ((priv->chip_type == AR8316) ?
 746                                 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
 747                         AR8216_PORT_STATUS_TXMAC |
 748                         AR8216_PORT_STATUS_RXMAC |
 749                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 750                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 751                         AR8216_PORT_STATUS_DUPLEX);
 752         } else {
 753                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 754                         AR8216_PORT_STATUS_LINK_AUTO);
 755         }
 756 }
 757
 758 static const struct ar8xxx_chip ar8216_chip = {
 759         .hw_init = ar8216_hw_init,
 760         .init_port = ar8216_init_port,
 761         .setup_port = ar8216_setup_port,
 762         .atu_flush = ar8216_atu_flush,
 763 };
 764
 765 static const struct ar8xxx_chip ar8236_chip = {
 766         .hw_init = ar8236_hw_init,
 767         .init_port = ar8216_init_port,
 768         .setup_port = ar8236_setup_port,
 769         .atu_flush = ar8216_atu_flush,
 770 };
 771
 772 static const struct ar8xxx_chip ar8316_chip = {
 773         .hw_init = ar8316_hw_init,
 774         .init_port = ar8216_init_port,
 775         .setup_port = ar8216_setup_port,
 776         .atu_flush = ar8216_atu_flush,
 777 };
 778
 779 static int
 780 ar8216_reset_switch(struct switch_dev *dev)
 781 {
 782         struct ar8216_priv *priv = to_ar8216(dev);
 783         int i;
 784
 785         mutex_lock(&priv->reg_mutex);
 786         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 787                 offsetof(struct ar8216_priv, vlan));
 788
 789         for (i = 0; i < AR8X16_MAX_VLANS; i++)
 790                 priv->vlan_id[i] = i;
 791
 792         /* Configure all ports */
 793         for (i = 0; i < AR8216_NUM_PORTS; i++)
 794                 priv->chip->init_port(priv, i);
 795
 796         ar8216_init_globals(priv);
 797         mutex_unlock(&priv->reg_mutex);
 798
 799         return ar8216_hw_apply(dev);
 800 }
 801
 802 static const struct switch_dev_ops ar8216_sw_ops = {
 803         .attr_global = {
 804                 .attr = ar8216_globals,
 805                 .n_attr = ARRAY_SIZE(ar8216_globals),
 806         },
 807         .attr_port = {
 808                 .attr = ar8216_port,
 809                 .n_attr = ARRAY_SIZE(ar8216_port),
 810         },
 811         .attr_vlan = {
 812                 .attr = ar8216_vlan,
 813                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 814         },
 815         .get_port_pvid = ar8216_get_pvid,
 816         .set_port_pvid = ar8216_set_pvid,
 817         .get_vlan_ports = ar8216_get_ports,
 818         .set_vlan_ports = ar8216_set_ports,
 819         .apply_config = ar8216_hw_apply,
 820         .reset_switch = ar8216_reset_switch,
 821         .get_port_link = ar8216_get_port_link,
 822 };
 823
 824 static int
 825 ar8216_id_chip(struct ar8216_priv *priv)
 826 {
 827         u32 val;
 828         u16 id;
 829         int i;
 830
 831         priv->chip_type = UNKNOWN;
 832
 833         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 834         if (val == ~0)
 835                 return -ENODEV;
 836
 837         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 838         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 839                 u16 t;
 840
 841                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 842                 if (val == ~0)
 843                         return -ENODEV;
 844
 845                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 846                 if (t != id)
 847                         return -ENODEV;
 848         }
 849
 850         switch (id) {
 851         case 0x0101:
 852                 priv->chip_type = AR8216;
 853                 priv->chip = &ar8216_chip;
 854                 break;
 855         case 0x0301:
 856                 priv->chip_type = AR8236;
 857                 priv->chip = &ar8236_chip;
 858                 break;
 859         case 0x1000:
 860         case 0x1001:
 861                 priv->chip_type = AR8316;
 862                 priv->chip = &ar8316_chip;
 863                 break;
 864         default:
 865                 printk(KERN_DEBUG
 866                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 867                         (int)(id >> AR8216_CTRL_VERSION_S),
 868                         (int)(id & AR8216_CTRL_REVISION),
 869                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 870                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 871
 872                 return -ENODEV;
 873         }
 874
 875         return 0;
 876 }
 877
 878 static int
 879 ar8216_config_init(struct phy_device *pdev)
 880 {
 881         struct ar8216_priv *priv = pdev->priv;
 882         struct net_device *dev = pdev->attached_dev;
 883         struct switch_dev *swdev;
 884         int ret;
 885
 886         if (!priv) {
 887                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 888                 if (priv == NULL)
 889                         return -ENOMEM;
 890         }
 891
 892         priv->phy = pdev;
 893
 894         ret = ar8216_id_chip(priv);
 895         if (ret)
 896                 goto err_free_priv;
 897
 898         if (pdev->addr != 0) {
 899                 if (priv->chip_type == AR8316) {
 900                         pdev->supported |= SUPPORTED_1000baseT_Full;
 901                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 902
 903                         /* check if we're attaching to the switch twice */
 904                         pdev = pdev->bus->phy_map[0];
 905                         if (!pdev) {
 906                                 kfree(priv);
 907                                 return 0;
 908                         }
 909
 910                         /* switch device has not been initialized, reuse priv */
 911                         if (!pdev->priv) {
 912                                 priv->port4_phy = true;
 913                                 pdev->priv = priv;
 914                                 return 0;
 915                         }
 916
 917                         kfree(priv);
 918
 919                         /* switch device has been initialized, reinit */
 920                         priv = pdev->priv;
 921                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 922                         priv->initialized = false;
 923                         priv->port4_phy = true;
 924                         ar8316_hw_init(priv);
 925                         return 0;
 926                 }
 927
 928                 kfree(priv);
 929                 return 0;
 930         }
 931
 932         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 933                 pdev->attached_dev->name, priv->chip_type);
 934
 935         pdev->supported = priv->chip_type == AR8316 ?
 936                 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
 937         pdev->advertising = pdev->supported;
 938
 939         mutex_init(&priv->reg_mutex);
 940         priv->read = ar8216_mii_read;
 941         priv->write = ar8216_mii_write;
 942
 943         pdev->priv = priv;
 944
 945         swdev = &priv->dev;
 946         swdev->cpu_port = AR8216_PORT_CPU;
 947         swdev->ops = &ar8216_sw_ops;
 948         swdev->ports = AR8216_NUM_PORTS;
 949
 950         if (priv->chip_type == AR8316) {
 951                 swdev->name = "Atheros AR8316";
 952                 swdev->vlans = AR8X16_MAX_VLANS;
 953
 954                 if (priv->port4_phy) {
 955                         /* port 5 connected to the other mac, therefore unusable */
 956                         swdev->ports = (AR8216_NUM_PORTS - 1);
 957                 }
 958         } else if (priv->chip_type == AR8236) {
 959                 swdev->name = "Atheros AR8236";
 960                 swdev->vlans = AR8216_NUM_VLANS;
 961                 swdev->ports = AR8216_NUM_PORTS;
 962         } else {
 963                 swdev->name = "Atheros AR8216";
 964                 swdev->vlans = AR8216_NUM_VLANS;
 965         }
 966
 967         ret = register_switch(&priv->dev, pdev->attached_dev);
 968         if (ret)
 969                 goto err_free_priv;
 970
 971         priv->init = true;
 972
 973         ret = priv->chip->hw_init(priv);
 974         if (ret)
 975                 goto err_free_priv;
 976
 977         ret = ar8216_reset_switch(&priv->dev);
 978         if (ret)
 979                 goto err_free_priv;
 980
 981         dev->phy_ptr = priv;
 982
 983         /* VID fixup only needed on ar8216 */
 984         if (pdev->addr == 0 && priv->chip_type == AR8216) {
 985                 pdev->pkt_align = 2;
 986                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
 987                 pdev->netif_rx = ar8216_netif_rx;
 988                 priv->ndo_old = dev->netdev_ops;
 989                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
 990                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
 991                 dev->netdev_ops = &priv->ndo;
 992         }
 993
 994         priv->init = false;
 995
 996         return 0;
 997
 998 err_free_priv:
 999         kfree(priv);
1000         return ret;
1001 }
1002
1003 static int
1004 ar8216_read_status(struct phy_device *phydev)
1005 {
1006         struct ar8216_priv *priv = phydev->priv;
1007         struct switch_port_link link;
1008         int ret;
1009
1010         if (phydev->addr != 0)
1011                 return genphy_read_status(phydev);
1012
1013         ar8216_read_port_link(priv, phydev->addr, &link);
1014         phydev->link = !!link.link;
1015         if (!phydev->link)
1016                 return 0;
1017
1018         switch (link.speed) {
1019         case SWITCH_PORT_SPEED_10:
1020                 phydev->speed = SPEED_10;
1021                 break;
1022         case SWITCH_PORT_SPEED_100:
1023                 phydev->speed = SPEED_100;
1024                 break;
1025         case SWITCH_PORT_SPEED_1000:
1026                 phydev->speed = SPEED_1000;
1027                 break;
1028         default:
1029                 phydev->speed = 0;
1030         }
1031         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1032
1033         /* flush the address translation unit */
1034         mutex_lock(&priv->reg_mutex);
1035         ret = priv->chip->atu_flush(priv);
1036         mutex_unlock(&priv->reg_mutex);
1037
1038         phydev->state = PHY_RUNNING;
1039         netif_carrier_on(phydev->attached_dev);
1040         phydev->adjust_link(phydev->attached_dev);
1041
1042         return ret;
1043 }
1044
1045 static int
1046 ar8216_config_aneg(struct phy_device *phydev)
1047 {
1048         if (phydev->addr == 0)
1049                 return 0;
1050
1051         return genphy_config_aneg(phydev);
1052 }
1053
1054 static int
1055 ar8216_probe(struct phy_device *pdev)
1056 {
1057         struct ar8216_priv priv;
1058
1059         priv.phy = pdev;
1060         return ar8216_id_chip(&priv);
1061 }
1062
1063 static void
1064 ar8216_remove(struct phy_device *pdev)
1065 {
1066         struct ar8216_priv *priv = pdev->priv;
1067         struct net_device *dev = pdev->attached_dev;
1068
1069         if (!priv)
1070                 return;
1071
1072         if (priv->ndo_old && dev)
1073                 dev->netdev_ops = priv->ndo_old;
1074         if (pdev->addr == 0)
1075                 unregister_switch(&priv->dev);
1076         kfree(priv);
1077 }
1078
1079 static struct phy_driver ar8216_driver = {
1080         .phy_id         = 0x004d0000,
1081         .name           = "Atheros AR8216/AR8236/AR8316",
1082         .phy_id_mask    = 0xffff0000,
1083         .features       = PHY_BASIC_FEATURES,
1084         .probe          = ar8216_probe,
1085         .remove         = ar8216_remove,
1086         .config_init    = &ar8216_config_init,
1087         .config_aneg    = &ar8216_config_aneg,
1088         .read_status    = &ar8216_read_status,
1089         .driver         = { .owner = THIS_MODULE },
1090 };
1091
1092 int __init
1093 ar8216_init(void)
1094 {
1095         return phy_driver_register(&ar8216_driver);
1096 }
1097
1098 void __exit
1099 ar8216_exit(void)
1100 {
1101         phy_driver_unregister(&ar8216_driver);
1102 }
1103
1104 module_init(ar8216_init);
1105 module_exit(ar8216_exit);
1106 MODULE_LICENSE("GPL");
1107