2 * ar8216.c: AR8216 switch driver
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
42 int (*hw_init
)(struct ar8216_priv
*priv
);
43 void (*setup_port
)(struct ar8216_priv
*priv
, int port
, u32 egress
,
44 u32 ingress
, u32 members
, u32 pvid
);
48 struct switch_dev dev
;
49 struct phy_device
*phy
;
50 u32 (*read
)(struct ar8216_priv
*priv
, int reg
);
51 void (*write
)(struct ar8216_priv
*priv
, int reg
, u32 val
);
52 const struct net_device_ops
*ndo_old
;
53 struct net_device_ops ndo
;
54 struct mutex reg_mutex
;
56 const struct ar8xxx_chip
*chip
;
63 /* all fields below are cleared on reset */
65 u16 vlan_id
[AR8X16_MAX_VLANS
];
66 u8 vlan_table
[AR8X16_MAX_VLANS
];
68 u16 pvid
[AR8216_NUM_PORTS
];
71 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
74 split_addr(u32 regaddr
, u16
*r1
, u16
*r2
, u16
*page
)
83 *page
= regaddr
& 0x1ff;
87 ar8216_mii_read(struct ar8216_priv
*priv
, int reg
)
89 struct phy_device
*phy
= priv
->phy
;
90 struct mii_bus
*bus
= phy
->bus
;
94 split_addr((u32
) reg
, &r1
, &r2
, &page
);
96 mutex_lock(&bus
->mdio_lock
);
98 bus
->write(bus
, 0x18, 0, page
);
99 usleep_range(1000, 2000); /* wait for the page switch to propagate */
100 lo
= bus
->read(bus
, 0x10 | r2
, r1
);
101 hi
= bus
->read(bus
, 0x10 | r2
, r1
+ 1);
103 mutex_unlock(&bus
->mdio_lock
);
105 return (hi
<< 16) | lo
;
109 ar8216_mii_write(struct ar8216_priv
*priv
, int reg
, u32 val
)
111 struct phy_device
*phy
= priv
->phy
;
112 struct mii_bus
*bus
= phy
->bus
;
116 split_addr((u32
) reg
, &r1
, &r2
, &r3
);
118 hi
= (u16
) (val
>> 16);
120 mutex_lock(&bus
->mdio_lock
);
122 bus
->write(bus
, 0x18, 0, r3
);
123 usleep_range(1000, 2000); /* wait for the page switch to propagate */
124 bus
->write(bus
, 0x10 | r2
, r1
+ 1, hi
);
125 bus
->write(bus
, 0x10 | r2
, r1
, lo
);
127 mutex_unlock(&bus
->mdio_lock
);
131 ar8216_phy_dbg_write(struct ar8216_priv
*priv
, int phy_addr
,
132 u16 dbg_addr
, u16 dbg_data
)
134 struct mii_bus
*bus
= priv
->phy
->bus
;
136 mutex_lock(&bus
->mdio_lock
);
137 bus
->write(bus
, phy_addr
, MII_ATH_DBG_ADDR
, dbg_addr
);
138 bus
->write(bus
, phy_addr
, MII_ATH_DBG_DATA
, dbg_data
);
139 mutex_unlock(&bus
->mdio_lock
);
143 ar8216_rmw(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
147 lockdep_assert_held(&priv
->reg_mutex
);
149 v
= priv
->read(priv
, reg
);
152 priv
->write(priv
, reg
, v
);
158 ar8216_read_port_link(struct ar8216_priv
*priv
, int port
,
159 struct switch_port_link
*link
)
164 memset(link
, '\0', sizeof(*link
));
166 status
= priv
->read(priv
, AR8216_REG_PORT_STATUS(port
));
168 link
->aneg
= !!(status
& AR8216_PORT_STATUS_LINK_AUTO
);
170 link
->link
= !!(status
& AR8216_PORT_STATUS_LINK_UP
);
177 link
->duplex
= !!(status
& AR8216_PORT_STATUS_DUPLEX
);
178 link
->tx_flow
= !!(status
& AR8216_PORT_STATUS_TXFLOW
);
179 link
->rx_flow
= !!(status
& AR8216_PORT_STATUS_RXFLOW
);
181 speed
= (status
& AR8216_PORT_STATUS_SPEED
) >>
182 AR8216_PORT_STATUS_SPEED_S
;
185 case AR8216_PORT_SPEED_10M
:
186 link
->speed
= SWITCH_PORT_SPEED_10
;
188 case AR8216_PORT_SPEED_100M
:
189 link
->speed
= SWITCH_PORT_SPEED_100
;
191 case AR8216_PORT_SPEED_1000M
:
192 link
->speed
= SWITCH_PORT_SPEED_1000
;
195 link
->speed
= SWITCH_PORT_SPEED_UNKNOWN
;
201 ar8216_set_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
202 struct switch_val
*val
)
204 struct ar8216_priv
*priv
= to_ar8216(dev
);
205 priv
->vlan
= !!val
->value
.i
;
210 ar8216_get_vlan(struct switch_dev
*dev
, const struct switch_attr
*attr
,
211 struct switch_val
*val
)
213 struct ar8216_priv
*priv
= to_ar8216(dev
);
214 val
->value
.i
= priv
->vlan
;
220 ar8216_set_pvid(struct switch_dev
*dev
, int port
, int vlan
)
222 struct ar8216_priv
*priv
= to_ar8216(dev
);
224 /* make sure no invalid PVIDs get set */
226 if (vlan
>= dev
->vlans
)
229 priv
->pvid
[port
] = vlan
;
234 ar8216_get_pvid(struct switch_dev
*dev
, int port
, int *vlan
)
236 struct ar8216_priv
*priv
= to_ar8216(dev
);
237 *vlan
= priv
->pvid
[port
];
242 ar8216_set_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
243 struct switch_val
*val
)
245 struct ar8216_priv
*priv
= to_ar8216(dev
);
246 priv
->vlan_id
[val
->port_vlan
] = val
->value
.i
;
251 ar8216_get_vid(struct switch_dev
*dev
, const struct switch_attr
*attr
,
252 struct switch_val
*val
)
254 struct ar8216_priv
*priv
= to_ar8216(dev
);
255 val
->value
.i
= priv
->vlan_id
[val
->port_vlan
];
260 ar8216_get_port_link(struct switch_dev
*dev
, int port
,
261 struct switch_port_link
*link
)
263 struct ar8216_priv
*priv
= to_ar8216(dev
);
265 ar8216_read_port_link(priv
, port
, link
);
270 ar8216_mangle_tx(struct sk_buff
*skb
, struct net_device
*dev
)
272 struct ar8216_priv
*priv
= dev
->phy_ptr
;
281 if (unlikely(skb_headroom(skb
) < 2)) {
282 if (pskb_expand_head(skb
, 2, 0, GFP_ATOMIC
) < 0)
286 buf
= skb_push(skb
, 2);
291 return priv
->ndo_old
->ndo_start_xmit(skb
, dev
);
294 dev_kfree_skb_any(skb
);
299 ar8216_mangle_rx(struct sk_buff
*skb
, int napi
)
301 struct ar8216_priv
*priv
;
302 struct net_device
*dev
;
314 /* don't strip the header if vlan mode is disabled */
318 /* strip header, get vlan id */
322 /* check for vlan header presence */
323 if ((buf
[12 + 2] != 0x81) || (buf
[13 + 2] != 0x00))
328 /* no need to fix up packets coming from a tagged source */
329 if (priv
->vlan_tagged
& (1 << port
))
332 /* lookup port vid from local table, the switch passes an invalid vlan id */
333 vlan
= priv
->vlan_id
[priv
->pvid
[port
]];
336 buf
[14 + 2] |= vlan
>> 8;
337 buf
[15 + 2] = vlan
& 0xff;
340 skb
->protocol
= eth_type_trans(skb
, skb
->dev
);
343 return netif_receive_skb(skb
);
345 return netif_rx(skb
);
348 /* no vlan? eat the packet! */
349 dev_kfree_skb_any(skb
);
354 ar8216_netif_rx(struct sk_buff
*skb
)
356 return ar8216_mangle_rx(skb
, 0);
360 ar8216_netif_receive_skb(struct sk_buff
*skb
)
362 return ar8216_mangle_rx(skb
, 1);
366 static struct switch_attr ar8216_globals
[] = {
368 .type
= SWITCH_TYPE_INT
,
369 .name
= "enable_vlan",
370 .description
= "Enable VLAN mode",
371 .set
= ar8216_set_vlan
,
372 .get
= ar8216_get_vlan
,
377 static struct switch_attr ar8216_port
[] = {
380 static struct switch_attr ar8216_vlan
[] = {
382 .type
= SWITCH_TYPE_INT
,
384 .description
= "VLAN ID (0-4094)",
385 .set
= ar8216_set_vid
,
386 .get
= ar8216_get_vid
,
393 ar8216_get_ports(struct switch_dev
*dev
, struct switch_val
*val
)
395 struct ar8216_priv
*priv
= to_ar8216(dev
);
396 u8 ports
= priv
->vlan_table
[val
->port_vlan
];
400 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
401 struct switch_port
*p
;
403 if (!(ports
& (1 << i
)))
406 p
= &val
->value
.ports
[val
->len
++];
408 if (priv
->vlan_tagged
& (1 << i
))
409 p
->flags
= (1 << SWITCH_PORT_FLAG_TAGGED
);
417 ar8216_set_ports(struct switch_dev
*dev
, struct switch_val
*val
)
419 struct ar8216_priv
*priv
= to_ar8216(dev
);
420 u8
*vt
= &priv
->vlan_table
[val
->port_vlan
];
424 for (i
= 0; i
< val
->len
; i
++) {
425 struct switch_port
*p
= &val
->value
.ports
[i
];
427 if (p
->flags
& (1 << SWITCH_PORT_FLAG_TAGGED
)) {
428 priv
->vlan_tagged
|= (1 << p
->id
);
430 priv
->vlan_tagged
&= ~(1 << p
->id
);
431 priv
->pvid
[p
->id
] = val
->port_vlan
;
433 /* make sure that an untagged port does not
434 * appear in other vlans */
435 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
436 if (j
== val
->port_vlan
)
438 priv
->vlan_table
[j
] &= ~(1 << p
->id
);
448 ar8216_wait_bit(struct ar8216_priv
*priv
, int reg
, u32 mask
, u32 val
)
454 t
= priv
->read(priv
, reg
);
455 if ((t
& mask
) == val
)
464 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
465 (unsigned int) reg
, t
, mask
, val
);
470 ar8216_vtu_op(struct ar8216_priv
*priv
, u32 op
, u32 val
)
472 if (ar8216_wait_bit(priv
, AR8216_REG_VTU
, AR8216_VTU_ACTIVE
, 0))
474 if ((op
& AR8216_VTU_OP
) == AR8216_VTU_OP_LOAD
) {
475 val
&= AR8216_VTUDATA_MEMBER
;
476 val
|= AR8216_VTUDATA_VALID
;
477 priv
->write(priv
, AR8216_REG_VTU_DATA
, val
);
479 op
|= AR8216_VTU_ACTIVE
;
480 priv
->write(priv
, AR8216_REG_VTU
, op
);
484 ar8216_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
485 u32 members
, u32 pvid
)
489 if (priv
->vlan
&& port
== AR8216_PORT_CPU
&& priv
->chip_type
== AR8216
)
490 header
= AR8216_PORT_CTRL_HEADER
;
494 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
495 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
496 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
497 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
498 AR8216_PORT_CTRL_LEARN
| header
|
499 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
500 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
502 ar8216_rmw(priv
, AR8216_REG_PORT_VLAN(port
),
503 AR8216_PORT_VLAN_DEST_PORTS
| AR8216_PORT_VLAN_MODE
|
504 AR8216_PORT_VLAN_DEFAULT_ID
,
505 (members
<< AR8216_PORT_VLAN_DEST_PORTS_S
) |
506 (ingress
<< AR8216_PORT_VLAN_MODE_S
) |
507 (pvid
<< AR8216_PORT_VLAN_DEFAULT_ID_S
));
511 ar8236_setup_port(struct ar8216_priv
*priv
, int port
, u32 egress
, u32 ingress
,
512 u32 members
, u32 pvid
)
514 ar8216_rmw(priv
, AR8216_REG_PORT_CTRL(port
),
515 AR8216_PORT_CTRL_LEARN
| AR8216_PORT_CTRL_VLAN_MODE
|
516 AR8216_PORT_CTRL_SINGLE_VLAN
| AR8216_PORT_CTRL_STATE
|
517 AR8216_PORT_CTRL_HEADER
| AR8216_PORT_CTRL_LEARN_LOCK
,
518 AR8216_PORT_CTRL_LEARN
|
519 (egress
<< AR8216_PORT_CTRL_VLAN_MODE_S
) |
520 (AR8216_PORT_STATE_FORWARD
<< AR8216_PORT_CTRL_STATE_S
));
522 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN(port
),
523 AR8236_PORT_VLAN_DEFAULT_ID
,
524 (pvid
<< AR8236_PORT_VLAN_DEFAULT_ID_S
));
526 ar8216_rmw(priv
, AR8236_REG_PORT_VLAN2(port
),
527 AR8236_PORT_VLAN2_VLAN_MODE
|
528 AR8236_PORT_VLAN2_MEMBER
,
529 (ingress
<< AR8236_PORT_VLAN2_VLAN_MODE_S
) |
530 (members
<< AR8236_PORT_VLAN2_MEMBER_S
));
534 ar8216_hw_apply(struct switch_dev
*dev
)
536 struct ar8216_priv
*priv
= to_ar8216(dev
);
537 u8 portmask
[AR8216_NUM_PORTS
];
540 mutex_lock(&priv
->reg_mutex
);
541 /* flush all vlan translation unit entries */
542 ar8216_vtu_op(priv
, AR8216_VTU_OP_FLUSH
, 0);
544 memset(portmask
, 0, sizeof(portmask
));
546 /* calculate the port destination masks and load vlans
547 * into the vlan translation unit */
548 for (j
= 0; j
< AR8X16_MAX_VLANS
; j
++) {
549 u8 vp
= priv
->vlan_table
[j
];
554 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
557 portmask
[i
] |= vp
& ~mask
;
562 (priv
->vlan_id
[j
] << AR8216_VTU_VID_S
),
563 priv
->vlan_table
[j
]);
567 * isolate all ports, but connect them to the cpu port */
568 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
569 if (i
== AR8216_PORT_CPU
)
572 portmask
[i
] = 1 << AR8216_PORT_CPU
;
573 portmask
[AR8216_PORT_CPU
] |= (1 << i
);
577 /* update the port destination mask registers and tag settings */
578 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++) {
583 pvid
= priv
->vlan_id
[priv
->pvid
[i
]];
584 if (priv
->vlan_tagged
& (1 << i
))
585 egress
= AR8216_OUT_ADD_VLAN
;
587 egress
= AR8216_OUT_STRIP_VLAN
;
588 ingress
= AR8216_IN_SECURE
;
591 egress
= AR8216_OUT_KEEP
;
592 ingress
= AR8216_IN_PORT_ONLY
;
595 priv
->chip
->setup_port(priv
, i
, egress
, ingress
, portmask
[i
],
598 mutex_unlock(&priv
->reg_mutex
);
603 ar8216_hw_init(struct ar8216_priv
*priv
)
609 ar8236_hw_init(struct ar8216_priv
*priv
)
614 if (priv
->initialized
)
617 /* Initialize the PHYs */
618 bus
= priv
->phy
->bus
;
619 for (i
= 0; i
< 5; i
++) {
620 mdiobus_write(bus
, i
, MII_ADVERTISE
,
621 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
|
622 ADVERTISE_PAUSE_ASYM
);
623 mdiobus_write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
627 priv
->initialized
= true;
632 ar8316_hw_init(struct ar8216_priv
*priv
)
638 val
= priv
->read(priv
, 0x8);
640 if (priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
641 if (priv
->port4_phy
) {
642 /* value taken from Ubiquiti RouterStation Pro */
644 printk(KERN_INFO
"ar8316: Using port 4 as PHY\n");
647 printk(KERN_INFO
"ar8316: Using port 4 as switch port\n");
649 } else if (priv
->phy
->interface
== PHY_INTERFACE_MODE_GMII
) {
650 /* value taken from AVM Fritz!Box 7390 sources */
653 /* no known value for phy interface */
654 printk(KERN_ERR
"ar8316: unsupported mii mode: %d.\n",
655 priv
->phy
->interface
);
662 priv
->write(priv
, 0x8, newval
);
664 /* Initialize the ports */
665 bus
= priv
->phy
->bus
;
666 for (i
= 0; i
< 5; i
++) {
667 if ((i
== 4) && priv
->port4_phy
&&
668 priv
->phy
->interface
== PHY_INTERFACE_MODE_RGMII
) {
669 /* work around for phy4 rgmii mode */
670 ar8216_phy_dbg_write(priv
, i
, 0x12, 0x480c);
672 ar8216_phy_dbg_write(priv
, i
, 0x0, 0x824e);
674 ar8216_phy_dbg_write(priv
, i
, 0x5, 0x3d47);
678 /* initialize the port itself */
679 mdiobus_write(bus
, i
, MII_ADVERTISE
,
680 ADVERTISE_ALL
| ADVERTISE_PAUSE_CAP
| ADVERTISE_PAUSE_ASYM
);
681 mdiobus_write(bus
, i
, MII_CTRL1000
, ADVERTISE_1000FULL
);
682 mdiobus_write(bus
, i
, MII_BMCR
, BMCR_RESET
| BMCR_ANENABLE
);
687 priv
->initialized
= true;
692 ar8216_init_globals(struct ar8216_priv
*priv
)
694 switch (priv
->chip_type
) {
696 /* standard atheros magic */
697 priv
->write(priv
, 0x38, 0xc000050e);
699 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
700 AR8216_GCTRL_MTU
, 1518 + 8 + 2);
703 /* standard atheros magic */
704 priv
->write(priv
, 0x38, 0xc000050e);
706 /* enable cpu port to receive multicast and broadcast frames */
707 priv
->write(priv
, AR8216_REG_FLOOD_MASK
, 0x003f003f);
711 /* enable jumbo frames */
712 ar8216_rmw(priv
, AR8216_REG_GLOBAL_CTRL
,
713 AR8316_GCTRL_MTU
, 9018 + 8 + 2);
719 ar8216_init_port(struct ar8216_priv
*priv
, int port
)
721 /* Enable port learning and tx */
722 priv
->write(priv
, AR8216_REG_PORT_CTRL(port
),
723 AR8216_PORT_CTRL_LEARN
|
724 (4 << AR8216_PORT_CTRL_STATE_S
));
726 priv
->write(priv
, AR8216_REG_PORT_VLAN(port
), 0);
728 if (port
== AR8216_PORT_CPU
) {
729 priv
->write(priv
, AR8216_REG_PORT_STATUS(port
),
730 AR8216_PORT_STATUS_LINK_UP
|
731 ((priv
->chip_type
== AR8316
) ?
732 AR8216_PORT_SPEED_1000M
: AR8216_PORT_SPEED_100M
) |
733 AR8216_PORT_STATUS_TXMAC
|
734 AR8216_PORT_STATUS_RXMAC
|
735 ((priv
->chip_type
== AR8316
) ? AR8216_PORT_STATUS_RXFLOW
: 0) |
736 ((priv
->chip_type
== AR8316
) ? AR8216_PORT_STATUS_TXFLOW
: 0) |
737 AR8216_PORT_STATUS_DUPLEX
);
739 priv
->write(priv
, AR8216_REG_PORT_STATUS(port
),
740 AR8216_PORT_STATUS_LINK_AUTO
);
744 static const struct ar8xxx_chip ar8216_chip
= {
745 .hw_init
= ar8216_hw_init
,
746 .setup_port
= ar8216_setup_port
,
749 static const struct ar8xxx_chip ar8236_chip
= {
750 .hw_init
= ar8236_hw_init
,
751 .setup_port
= ar8236_setup_port
,
754 static const struct ar8xxx_chip ar8316_chip
= {
755 .hw_init
= ar8316_hw_init
,
756 .setup_port
= ar8216_setup_port
,
760 ar8216_reset_switch(struct switch_dev
*dev
)
762 struct ar8216_priv
*priv
= to_ar8216(dev
);
765 mutex_lock(&priv
->reg_mutex
);
766 memset(&priv
->vlan
, 0, sizeof(struct ar8216_priv
) -
767 offsetof(struct ar8216_priv
, vlan
));
769 for (i
= 0; i
< AR8X16_MAX_VLANS
; i
++)
770 priv
->vlan_id
[i
] = i
;
772 /* Configure all ports */
773 for (i
= 0; i
< AR8216_NUM_PORTS
; i
++)
774 ar8216_init_port(priv
, i
);
776 ar8216_init_globals(priv
);
777 mutex_unlock(&priv
->reg_mutex
);
779 return ar8216_hw_apply(dev
);
782 static const struct switch_dev_ops ar8216_sw_ops
= {
784 .attr
= ar8216_globals
,
785 .n_attr
= ARRAY_SIZE(ar8216_globals
),
789 .n_attr
= ARRAY_SIZE(ar8216_port
),
793 .n_attr
= ARRAY_SIZE(ar8216_vlan
),
795 .get_port_pvid
= ar8216_get_pvid
,
796 .set_port_pvid
= ar8216_set_pvid
,
797 .get_vlan_ports
= ar8216_get_ports
,
798 .set_vlan_ports
= ar8216_set_ports
,
799 .apply_config
= ar8216_hw_apply
,
800 .reset_switch
= ar8216_reset_switch
,
801 .get_port_link
= ar8216_get_port_link
,
805 ar8216_id_chip(struct ar8216_priv
*priv
)
811 priv
->chip_type
= UNKNOWN
;
813 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
817 id
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
818 for (i
= 0; i
< AR8X16_PROBE_RETRIES
; i
++) {
821 val
= ar8216_mii_read(priv
, AR8216_REG_CTRL
);
825 t
= val
& (AR8216_CTRL_REVISION
| AR8216_CTRL_VERSION
);
832 priv
->chip_type
= AR8216
;
833 priv
->chip
= &ar8216_chip
;
836 priv
->chip_type
= AR8236
;
837 priv
->chip
= &ar8236_chip
;
841 priv
->chip_type
= AR8316
;
842 priv
->chip
= &ar8316_chip
;
846 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
847 (int)(id
>> AR8216_CTRL_VERSION_S
),
848 (int)(id
& AR8216_CTRL_REVISION
),
849 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 2),
850 mdiobus_read(priv
->phy
->bus
, priv
->phy
->addr
, 3));
859 ar8216_config_init(struct phy_device
*pdev
)
861 struct ar8216_priv
*priv
= pdev
->priv
;
862 struct net_device
*dev
= pdev
->attached_dev
;
863 struct switch_dev
*swdev
;
867 priv
= kzalloc(sizeof(struct ar8216_priv
), GFP_KERNEL
);
874 ret
= ar8216_id_chip(priv
);
878 if (pdev
->addr
!= 0) {
879 if (priv
->chip_type
== AR8316
) {
880 pdev
->supported
|= SUPPORTED_1000baseT_Full
;
881 pdev
->advertising
|= ADVERTISED_1000baseT_Full
;
883 /* check if we're attaching to the switch twice */
884 pdev
= pdev
->bus
->phy_map
[0];
890 /* switch device has not been initialized, reuse priv */
892 priv
->port4_phy
= true;
899 /* switch device has been initialized, reinit */
901 priv
->dev
.ports
= (AR8216_NUM_PORTS
- 1);
902 priv
->initialized
= false;
903 priv
->port4_phy
= true;
904 ar8316_hw_init(priv
);
912 printk(KERN_INFO
"%s: AR%d switch driver attached.\n",
913 pdev
->attached_dev
->name
, priv
->chip_type
);
915 pdev
->supported
= priv
->chip_type
== AR8316
?
916 SUPPORTED_1000baseT_Full
: SUPPORTED_100baseT_Full
;
917 pdev
->advertising
= pdev
->supported
;
919 mutex_init(&priv
->reg_mutex
);
920 priv
->read
= ar8216_mii_read
;
921 priv
->write
= ar8216_mii_write
;
926 swdev
->cpu_port
= AR8216_PORT_CPU
;
927 swdev
->ops
= &ar8216_sw_ops
;
928 swdev
->ports
= AR8216_NUM_PORTS
;
930 if (priv
->chip_type
== AR8316
) {
931 swdev
->name
= "Atheros AR8316";
932 swdev
->vlans
= AR8X16_MAX_VLANS
;
934 if (priv
->port4_phy
) {
935 /* port 5 connected to the other mac, therefore unusable */
936 swdev
->ports
= (AR8216_NUM_PORTS
- 1);
938 } else if (priv
->chip_type
== AR8236
) {
939 swdev
->name
= "Atheros AR8236";
940 swdev
->vlans
= AR8216_NUM_VLANS
;
941 swdev
->ports
= AR8216_NUM_PORTS
;
943 swdev
->name
= "Atheros AR8216";
944 swdev
->vlans
= AR8216_NUM_VLANS
;
947 ret
= register_switch(&priv
->dev
, pdev
->attached_dev
);
953 ret
= priv
->chip
->hw_init(priv
);
957 ret
= ar8216_reset_switch(&priv
->dev
);
963 /* VID fixup only needed on ar8216 */
964 if (pdev
->addr
== 0 && priv
->chip_type
== AR8216
) {
966 pdev
->netif_receive_skb
= ar8216_netif_receive_skb
;
967 pdev
->netif_rx
= ar8216_netif_rx
;
968 priv
->ndo_old
= dev
->netdev_ops
;
969 memcpy(&priv
->ndo
, priv
->ndo_old
, sizeof(struct net_device_ops
));
970 priv
->ndo
.ndo_start_xmit
= ar8216_mangle_tx
;
971 dev
->netdev_ops
= &priv
->ndo
;
984 ar8216_read_status(struct phy_device
*phydev
)
986 struct ar8216_priv
*priv
= phydev
->priv
;
987 struct switch_port_link link
;
990 if (phydev
->addr
!= 0)
991 return genphy_read_status(phydev
);
993 ar8216_read_port_link(priv
, phydev
->addr
, &link
);
994 phydev
->link
= !!link
.link
;
998 switch (link
.speed
) {
999 case SWITCH_PORT_SPEED_10
:
1000 phydev
->speed
= SPEED_10
;
1002 case SWITCH_PORT_SPEED_100
:
1003 phydev
->speed
= SPEED_100
;
1005 case SWITCH_PORT_SPEED_1000
:
1006 phydev
->speed
= SPEED_1000
;
1011 phydev
->duplex
= link
.duplex
? DUPLEX_FULL
: DUPLEX_HALF
;
1013 /* flush the address translation unit */
1014 mutex_lock(&priv
->reg_mutex
);
1015 ret
= ar8216_wait_bit(priv
, AR8216_REG_ATU
, AR8216_ATU_ACTIVE
, 0);
1017 priv
->write(priv
, AR8216_REG_ATU
, AR8216_ATU_OP_FLUSH
);
1018 mutex_unlock(&priv
->reg_mutex
);
1020 phydev
->state
= PHY_RUNNING
;
1021 netif_carrier_on(phydev
->attached_dev
);
1022 phydev
->adjust_link(phydev
->attached_dev
);
1028 ar8216_config_aneg(struct phy_device
*phydev
)
1030 if (phydev
->addr
== 0)
1033 return genphy_config_aneg(phydev
);
1037 ar8216_probe(struct phy_device
*pdev
)
1039 struct ar8216_priv priv
;
1042 return ar8216_id_chip(&priv
);
1046 ar8216_remove(struct phy_device
*pdev
)
1048 struct ar8216_priv
*priv
= pdev
->priv
;
1049 struct net_device
*dev
= pdev
->attached_dev
;
1054 if (priv
->ndo_old
&& dev
)
1055 dev
->netdev_ops
= priv
->ndo_old
;
1056 if (pdev
->addr
== 0)
1057 unregister_switch(&priv
->dev
);
1061 static struct phy_driver ar8216_driver
= {
1062 .phy_id
= 0x004d0000,
1063 .name
= "Atheros AR8216/AR8236/AR8316",
1064 .phy_id_mask
= 0xffff0000,
1065 .features
= PHY_BASIC_FEATURES
,
1066 .probe
= ar8216_probe
,
1067 .remove
= ar8216_remove
,
1068 .config_init
= &ar8216_config_init
,
1069 .config_aneg
= &ar8216_config_aneg
,
1070 .read_status
= &ar8216_read_status
,
1071 .driver
= { .owner
= THIS_MODULE
},
1077 return phy_driver_register(&ar8216_driver
);
1083 phy_driver_unregister(&ar8216_driver
);
1086 module_init(ar8216_init
);
1087 module_exit(ar8216_exit
);
1088 MODULE_LICENSE("GPL");