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[openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
33 #include "ar8216.h"
34
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
38
39 struct ar8216_priv;
40
41 struct ar8xxx_chip {
42 int (*hw_init)(struct ar8216_priv *priv);
43 void (*init_port)(struct ar8216_priv *priv, int port);
44 void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
45 u32 ingress, u32 members, u32 pvid);
46 int (*atu_flush)(struct ar8216_priv *priv);
47 void (*vtu_flush)(struct ar8216_priv *priv);
48 };
49
50 struct ar8216_priv {
51 struct switch_dev dev;
52 struct phy_device *phy;
53 u32 (*read)(struct ar8216_priv *priv, int reg);
54 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
55 const struct net_device_ops *ndo_old;
56 struct net_device_ops ndo;
57 struct mutex reg_mutex;
58 int chip_type;
59 const struct ar8xxx_chip *chip;
60 bool initialized;
61 bool port4_phy;
62 char buf[80];
63
64 bool init;
65
66 /* all fields below are cleared on reset */
67 bool vlan;
68 u16 vlan_id[AR8X16_MAX_VLANS];
69 u8 vlan_table[AR8X16_MAX_VLANS];
70 u8 vlan_tagged;
71 u16 pvid[AR8216_NUM_PORTS];
72 };
73
74 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
75
76 static inline void
77 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
78 {
79 regaddr >>= 1;
80 *r1 = regaddr & 0x1e;
81
82 regaddr >>= 5;
83 *r2 = regaddr & 0x7;
84
85 regaddr >>= 3;
86 *page = regaddr & 0x1ff;
87 }
88
89 static u32
90 ar8216_mii_read(struct ar8216_priv *priv, int reg)
91 {
92 struct phy_device *phy = priv->phy;
93 struct mii_bus *bus = phy->bus;
94 u16 r1, r2, page;
95 u16 lo, hi;
96
97 split_addr((u32) reg, &r1, &r2, &page);
98
99 mutex_lock(&bus->mdio_lock);
100
101 bus->write(bus, 0x18, 0, page);
102 usleep_range(1000, 2000); /* wait for the page switch to propagate */
103 lo = bus->read(bus, 0x10 | r2, r1);
104 hi = bus->read(bus, 0x10 | r2, r1 + 1);
105
106 mutex_unlock(&bus->mdio_lock);
107
108 return (hi << 16) | lo;
109 }
110
111 static void
112 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
113 {
114 struct phy_device *phy = priv->phy;
115 struct mii_bus *bus = phy->bus;
116 u16 r1, r2, r3;
117 u16 lo, hi;
118
119 split_addr((u32) reg, &r1, &r2, &r3);
120 lo = val & 0xffff;
121 hi = (u16) (val >> 16);
122
123 mutex_lock(&bus->mdio_lock);
124
125 bus->write(bus, 0x18, 0, r3);
126 usleep_range(1000, 2000); /* wait for the page switch to propagate */
127 bus->write(bus, 0x10 | r2, r1 + 1, hi);
128 bus->write(bus, 0x10 | r2, r1, lo);
129
130 mutex_unlock(&bus->mdio_lock);
131 }
132
133 static void
134 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
135 u16 dbg_addr, u16 dbg_data)
136 {
137 struct mii_bus *bus = priv->phy->bus;
138
139 mutex_lock(&bus->mdio_lock);
140 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
141 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
142 mutex_unlock(&bus->mdio_lock);
143 }
144
145 static u32
146 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
147 {
148 u32 v;
149
150 lockdep_assert_held(&priv->reg_mutex);
151
152 v = priv->read(priv, reg);
153 v &= ~mask;
154 v |= val;
155 priv->write(priv, reg, v);
156
157 return v;
158 }
159
160 static void
161 ar8216_read_port_link(struct ar8216_priv *priv, int port,
162 struct switch_port_link *link)
163 {
164 u32 status;
165 u32 speed;
166
167 memset(link, '\0', sizeof(*link));
168
169 status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
170
171 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
172 if (link->aneg) {
173 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
174 if (!link->link)
175 return;
176 } else {
177 link->link = true;
178 }
179
180 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
181 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
182 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
183
184 speed = (status & AR8216_PORT_STATUS_SPEED) >>
185 AR8216_PORT_STATUS_SPEED_S;
186
187 switch (speed) {
188 case AR8216_PORT_SPEED_10M:
189 link->speed = SWITCH_PORT_SPEED_10;
190 break;
191 case AR8216_PORT_SPEED_100M:
192 link->speed = SWITCH_PORT_SPEED_100;
193 break;
194 case AR8216_PORT_SPEED_1000M:
195 link->speed = SWITCH_PORT_SPEED_1000;
196 break;
197 default:
198 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
199 break;
200 }
201 }
202
203 static int
204 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
205 struct switch_val *val)
206 {
207 struct ar8216_priv *priv = to_ar8216(dev);
208 priv->vlan = !!val->value.i;
209 return 0;
210 }
211
212 static int
213 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
214 struct switch_val *val)
215 {
216 struct ar8216_priv *priv = to_ar8216(dev);
217 val->value.i = priv->vlan;
218 return 0;
219 }
220
221
222 static int
223 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
224 {
225 struct ar8216_priv *priv = to_ar8216(dev);
226
227 /* make sure no invalid PVIDs get set */
228
229 if (vlan >= dev->vlans)
230 return -EINVAL;
231
232 priv->pvid[port] = vlan;
233 return 0;
234 }
235
236 static int
237 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
238 {
239 struct ar8216_priv *priv = to_ar8216(dev);
240 *vlan = priv->pvid[port];
241 return 0;
242 }
243
244 static int
245 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
246 struct switch_val *val)
247 {
248 struct ar8216_priv *priv = to_ar8216(dev);
249 priv->vlan_id[val->port_vlan] = val->value.i;
250 return 0;
251 }
252
253 static int
254 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
255 struct switch_val *val)
256 {
257 struct ar8216_priv *priv = to_ar8216(dev);
258 val->value.i = priv->vlan_id[val->port_vlan];
259 return 0;
260 }
261
262 static int
263 ar8216_get_port_link(struct switch_dev *dev, int port,
264 struct switch_port_link *link)
265 {
266 struct ar8216_priv *priv = to_ar8216(dev);
267
268 ar8216_read_port_link(priv, port, link);
269 return 0;
270 }
271
272 static int
273 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
274 {
275 struct ar8216_priv *priv = dev->phy_ptr;
276 unsigned char *buf;
277
278 if (unlikely(!priv))
279 goto error;
280
281 if (!priv->vlan)
282 goto send;
283
284 if (unlikely(skb_headroom(skb) < 2)) {
285 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
286 goto error;
287 }
288
289 buf = skb_push(skb, 2);
290 buf[0] = 0x10;
291 buf[1] = 0x80;
292
293 send:
294 return priv->ndo_old->ndo_start_xmit(skb, dev);
295
296 error:
297 dev_kfree_skb_any(skb);
298 return 0;
299 }
300
301 static int
302 ar8216_mangle_rx(struct sk_buff *skb, int napi)
303 {
304 struct ar8216_priv *priv;
305 struct net_device *dev;
306 unsigned char *buf;
307 int port, vlan;
308
309 dev = skb->dev;
310 if (!dev)
311 goto error;
312
313 priv = dev->phy_ptr;
314 if (!priv)
315 goto error;
316
317 /* don't strip the header if vlan mode is disabled */
318 if (!priv->vlan)
319 goto recv;
320
321 /* strip header, get vlan id */
322 buf = skb->data;
323 skb_pull(skb, 2);
324
325 /* check for vlan header presence */
326 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
327 goto recv;
328
329 port = buf[0] & 0xf;
330
331 /* no need to fix up packets coming from a tagged source */
332 if (priv->vlan_tagged & (1 << port))
333 goto recv;
334
335 /* lookup port vid from local table, the switch passes an invalid vlan id */
336 vlan = priv->vlan_id[priv->pvid[port]];
337
338 buf[14 + 2] &= 0xf0;
339 buf[14 + 2] |= vlan >> 8;
340 buf[15 + 2] = vlan & 0xff;
341
342 recv:
343 skb->protocol = eth_type_trans(skb, skb->dev);
344
345 if (napi)
346 return netif_receive_skb(skb);
347 else
348 return netif_rx(skb);
349
350 error:
351 /* no vlan? eat the packet! */
352 dev_kfree_skb_any(skb);
353 return NET_RX_DROP;
354 }
355
356 static int
357 ar8216_netif_rx(struct sk_buff *skb)
358 {
359 return ar8216_mangle_rx(skb, 0);
360 }
361
362 static int
363 ar8216_netif_receive_skb(struct sk_buff *skb)
364 {
365 return ar8216_mangle_rx(skb, 1);
366 }
367
368
369 static struct switch_attr ar8216_globals[] = {
370 {
371 .type = SWITCH_TYPE_INT,
372 .name = "enable_vlan",
373 .description = "Enable VLAN mode",
374 .set = ar8216_set_vlan,
375 .get = ar8216_get_vlan,
376 .max = 1
377 },
378 };
379
380 static struct switch_attr ar8216_port[] = {
381 };
382
383 static struct switch_attr ar8216_vlan[] = {
384 {
385 .type = SWITCH_TYPE_INT,
386 .name = "vid",
387 .description = "VLAN ID (0-4094)",
388 .set = ar8216_set_vid,
389 .get = ar8216_get_vid,
390 .max = 4094,
391 },
392 };
393
394
395 static int
396 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
397 {
398 struct ar8216_priv *priv = to_ar8216(dev);
399 u8 ports = priv->vlan_table[val->port_vlan];
400 int i;
401
402 val->len = 0;
403 for (i = 0; i < AR8216_NUM_PORTS; i++) {
404 struct switch_port *p;
405
406 if (!(ports & (1 << i)))
407 continue;
408
409 p = &val->value.ports[val->len++];
410 p->id = i;
411 if (priv->vlan_tagged & (1 << i))
412 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
413 else
414 p->flags = 0;
415 }
416 return 0;
417 }
418
419 static int
420 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
421 {
422 struct ar8216_priv *priv = to_ar8216(dev);
423 u8 *vt = &priv->vlan_table[val->port_vlan];
424 int i, j;
425
426 *vt = 0;
427 for (i = 0; i < val->len; i++) {
428 struct switch_port *p = &val->value.ports[i];
429
430 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
431 priv->vlan_tagged |= (1 << p->id);
432 } else {
433 priv->vlan_tagged &= ~(1 << p->id);
434 priv->pvid[p->id] = val->port_vlan;
435
436 /* make sure that an untagged port does not
437 * appear in other vlans */
438 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
439 if (j == val->port_vlan)
440 continue;
441 priv->vlan_table[j] &= ~(1 << p->id);
442 }
443 }
444
445 *vt |= 1 << p->id;
446 }
447 return 0;
448 }
449
450 static int
451 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
452 {
453 int timeout = 20;
454 u32 t = 0;
455
456 while (1) {
457 t = priv->read(priv, reg);
458 if ((t & mask) == val)
459 return 0;
460
461 if (timeout-- <= 0)
462 break;
463
464 udelay(10);
465 }
466
467 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
468 (unsigned int) reg, t, mask, val);
469 return -ETIMEDOUT;
470 }
471
472 static void
473 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
474 {
475 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
476 return;
477 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
478 val &= AR8216_VTUDATA_MEMBER;
479 val |= AR8216_VTUDATA_VALID;
480 priv->write(priv, AR8216_REG_VTU_DATA, val);
481 }
482 op |= AR8216_VTU_ACTIVE;
483 priv->write(priv, AR8216_REG_VTU, op);
484 }
485
486 static void
487 ar8216_vtu_flush(struct ar8216_priv *priv)
488 {
489 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
490 }
491
492 static int
493 ar8216_atu_flush(struct ar8216_priv *priv)
494 {
495 int ret;
496
497 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
498 if (!ret)
499 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
500
501 return ret;
502 }
503
504 static void
505 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
506 u32 members, u32 pvid)
507 {
508 u32 header;
509
510 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
511 header = AR8216_PORT_CTRL_HEADER;
512 else
513 header = 0;
514
515 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
516 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
517 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
518 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
519 AR8216_PORT_CTRL_LEARN | header |
520 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
521 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
522
523 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
524 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
525 AR8216_PORT_VLAN_DEFAULT_ID,
526 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
527 (ingress << AR8216_PORT_VLAN_MODE_S) |
528 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
529 }
530
531 static void
532 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
533 u32 members, u32 pvid)
534 {
535 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
536 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
537 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
538 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
539 AR8216_PORT_CTRL_LEARN |
540 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
541 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
542
543 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
544 AR8236_PORT_VLAN_DEFAULT_ID,
545 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
546
547 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
548 AR8236_PORT_VLAN2_VLAN_MODE |
549 AR8236_PORT_VLAN2_MEMBER,
550 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
551 (members << AR8236_PORT_VLAN2_MEMBER_S));
552 }
553
554 static int
555 ar8216_hw_apply(struct switch_dev *dev)
556 {
557 struct ar8216_priv *priv = to_ar8216(dev);
558 u8 portmask[AR8216_NUM_PORTS];
559 int i, j;
560
561 mutex_lock(&priv->reg_mutex);
562 /* flush all vlan translation unit entries */
563 priv->chip->vtu_flush(priv);
564
565 memset(portmask, 0, sizeof(portmask));
566 if (!priv->init) {
567 /* calculate the port destination masks and load vlans
568 * into the vlan translation unit */
569 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
570 u8 vp = priv->vlan_table[j];
571
572 if (!vp)
573 continue;
574
575 for (i = 0; i < AR8216_NUM_PORTS; i++) {
576 u8 mask = (1 << i);
577 if (vp & mask)
578 portmask[i] |= vp & ~mask;
579 }
580
581 ar8216_vtu_op(priv,
582 AR8216_VTU_OP_LOAD |
583 (priv->vlan_id[j] << AR8216_VTU_VID_S),
584 priv->vlan_table[j]);
585 }
586 } else {
587 /* vlan disabled:
588 * isolate all ports, but connect them to the cpu port */
589 for (i = 0; i < AR8216_NUM_PORTS; i++) {
590 if (i == AR8216_PORT_CPU)
591 continue;
592
593 portmask[i] = 1 << AR8216_PORT_CPU;
594 portmask[AR8216_PORT_CPU] |= (1 << i);
595 }
596 }
597
598 /* update the port destination mask registers and tag settings */
599 for (i = 0; i < AR8216_NUM_PORTS; i++) {
600 int egress, ingress;
601 int pvid;
602
603 if (priv->vlan) {
604 pvid = priv->vlan_id[priv->pvid[i]];
605 if (priv->vlan_tagged & (1 << i))
606 egress = AR8216_OUT_ADD_VLAN;
607 else
608 egress = AR8216_OUT_STRIP_VLAN;
609 ingress = AR8216_IN_SECURE;
610 } else {
611 pvid = i;
612 egress = AR8216_OUT_KEEP;
613 ingress = AR8216_IN_PORT_ONLY;
614 }
615
616 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
617 pvid);
618 }
619 mutex_unlock(&priv->reg_mutex);
620 return 0;
621 }
622
623 static int
624 ar8216_hw_init(struct ar8216_priv *priv)
625 {
626 return 0;
627 }
628
629 static int
630 ar8236_hw_init(struct ar8216_priv *priv)
631 {
632 int i;
633 struct mii_bus *bus;
634
635 if (priv->initialized)
636 return 0;
637
638 /* Initialize the PHYs */
639 bus = priv->phy->bus;
640 for (i = 0; i < 5; i++) {
641 mdiobus_write(bus, i, MII_ADVERTISE,
642 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
643 ADVERTISE_PAUSE_ASYM);
644 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
645 }
646 msleep(1000);
647
648 priv->initialized = true;
649 return 0;
650 }
651
652 static int
653 ar8316_hw_init(struct ar8216_priv *priv)
654 {
655 int i;
656 u32 val, newval;
657 struct mii_bus *bus;
658
659 val = priv->read(priv, 0x8);
660
661 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
662 if (priv->port4_phy) {
663 /* value taken from Ubiquiti RouterStation Pro */
664 newval = 0x81461bea;
665 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
666 } else {
667 newval = 0x01261be2;
668 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
669 }
670 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
671 /* value taken from AVM Fritz!Box 7390 sources */
672 newval = 0x010e5b71;
673 } else {
674 /* no known value for phy interface */
675 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
676 priv->phy->interface);
677 return -EINVAL;
678 }
679
680 if (val == newval)
681 goto out;
682
683 priv->write(priv, 0x8, newval);
684
685 /* Initialize the ports */
686 bus = priv->phy->bus;
687 for (i = 0; i < 5; i++) {
688 if ((i == 4) && priv->port4_phy &&
689 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
690 /* work around for phy4 rgmii mode */
691 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
692 /* rx delay */
693 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
694 /* tx delay */
695 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
696 msleep(1000);
697 }
698
699 /* initialize the port itself */
700 mdiobus_write(bus, i, MII_ADVERTISE,
701 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
702 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
703 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
704 msleep(1000);
705 }
706
707 out:
708 priv->initialized = true;
709 return 0;
710 }
711
712 static void
713 ar8216_init_globals(struct ar8216_priv *priv)
714 {
715 switch (priv->chip_type) {
716 case AR8216:
717 /* standard atheros magic */
718 priv->write(priv, 0x38, 0xc000050e);
719
720 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
721 AR8216_GCTRL_MTU, 1518 + 8 + 2);
722 break;
723 case AR8316:
724 /* standard atheros magic */
725 priv->write(priv, 0x38, 0xc000050e);
726
727 /* enable cpu port to receive multicast and broadcast frames */
728 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
729
730 /* fall through */
731 case AR8236:
732 /* enable jumbo frames */
733 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
734 AR8316_GCTRL_MTU, 9018 + 8 + 2);
735 break;
736 }
737 }
738
739 static void
740 ar8216_init_port(struct ar8216_priv *priv, int port)
741 {
742 /* Enable port learning and tx */
743 priv->write(priv, AR8216_REG_PORT_CTRL(port),
744 AR8216_PORT_CTRL_LEARN |
745 (4 << AR8216_PORT_CTRL_STATE_S));
746
747 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
748
749 if (port == AR8216_PORT_CPU) {
750 priv->write(priv, AR8216_REG_PORT_STATUS(port),
751 AR8216_PORT_STATUS_LINK_UP |
752 ((priv->chip_type == AR8316) ?
753 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
754 AR8216_PORT_STATUS_TXMAC |
755 AR8216_PORT_STATUS_RXMAC |
756 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
757 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
758 AR8216_PORT_STATUS_DUPLEX);
759 } else {
760 priv->write(priv, AR8216_REG_PORT_STATUS(port),
761 AR8216_PORT_STATUS_LINK_AUTO);
762 }
763 }
764
765 static const struct ar8xxx_chip ar8216_chip = {
766 .hw_init = ar8216_hw_init,
767 .init_port = ar8216_init_port,
768 .setup_port = ar8216_setup_port,
769 .atu_flush = ar8216_atu_flush,
770 .vtu_flush = ar8216_vtu_flush,
771 };
772
773 static const struct ar8xxx_chip ar8236_chip = {
774 .hw_init = ar8236_hw_init,
775 .init_port = ar8216_init_port,
776 .setup_port = ar8236_setup_port,
777 .atu_flush = ar8216_atu_flush,
778 .vtu_flush = ar8216_vtu_flush,
779 };
780
781 static const struct ar8xxx_chip ar8316_chip = {
782 .hw_init = ar8316_hw_init,
783 .init_port = ar8216_init_port,
784 .setup_port = ar8216_setup_port,
785 .atu_flush = ar8216_atu_flush,
786 .vtu_flush = ar8216_vtu_flush,
787 };
788
789 static int
790 ar8216_reset_switch(struct switch_dev *dev)
791 {
792 struct ar8216_priv *priv = to_ar8216(dev);
793 int i;
794
795 mutex_lock(&priv->reg_mutex);
796 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
797 offsetof(struct ar8216_priv, vlan));
798
799 for (i = 0; i < AR8X16_MAX_VLANS; i++)
800 priv->vlan_id[i] = i;
801
802 /* Configure all ports */
803 for (i = 0; i < AR8216_NUM_PORTS; i++)
804 priv->chip->init_port(priv, i);
805
806 ar8216_init_globals(priv);
807 mutex_unlock(&priv->reg_mutex);
808
809 return ar8216_hw_apply(dev);
810 }
811
812 static const struct switch_dev_ops ar8216_sw_ops = {
813 .attr_global = {
814 .attr = ar8216_globals,
815 .n_attr = ARRAY_SIZE(ar8216_globals),
816 },
817 .attr_port = {
818 .attr = ar8216_port,
819 .n_attr = ARRAY_SIZE(ar8216_port),
820 },
821 .attr_vlan = {
822 .attr = ar8216_vlan,
823 .n_attr = ARRAY_SIZE(ar8216_vlan),
824 },
825 .get_port_pvid = ar8216_get_pvid,
826 .set_port_pvid = ar8216_set_pvid,
827 .get_vlan_ports = ar8216_get_ports,
828 .set_vlan_ports = ar8216_set_ports,
829 .apply_config = ar8216_hw_apply,
830 .reset_switch = ar8216_reset_switch,
831 .get_port_link = ar8216_get_port_link,
832 };
833
834 static int
835 ar8216_id_chip(struct ar8216_priv *priv)
836 {
837 u32 val;
838 u16 id;
839 int i;
840
841 priv->chip_type = UNKNOWN;
842
843 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
844 if (val == ~0)
845 return -ENODEV;
846
847 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
848 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
849 u16 t;
850
851 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
852 if (val == ~0)
853 return -ENODEV;
854
855 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
856 if (t != id)
857 return -ENODEV;
858 }
859
860 switch (id) {
861 case 0x0101:
862 priv->chip_type = AR8216;
863 priv->chip = &ar8216_chip;
864 break;
865 case 0x0301:
866 priv->chip_type = AR8236;
867 priv->chip = &ar8236_chip;
868 break;
869 case 0x1000:
870 case 0x1001:
871 priv->chip_type = AR8316;
872 priv->chip = &ar8316_chip;
873 break;
874 default:
875 printk(KERN_DEBUG
876 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
877 (int)(id >> AR8216_CTRL_VERSION_S),
878 (int)(id & AR8216_CTRL_REVISION),
879 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
880 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
881
882 return -ENODEV;
883 }
884
885 return 0;
886 }
887
888 static int
889 ar8216_config_init(struct phy_device *pdev)
890 {
891 struct ar8216_priv *priv = pdev->priv;
892 struct net_device *dev = pdev->attached_dev;
893 struct switch_dev *swdev;
894 int ret;
895
896 if (!priv) {
897 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
898 if (priv == NULL)
899 return -ENOMEM;
900 }
901
902 priv->phy = pdev;
903
904 ret = ar8216_id_chip(priv);
905 if (ret)
906 goto err_free_priv;
907
908 if (pdev->addr != 0) {
909 if (priv->chip_type == AR8316) {
910 pdev->supported |= SUPPORTED_1000baseT_Full;
911 pdev->advertising |= ADVERTISED_1000baseT_Full;
912
913 /* check if we're attaching to the switch twice */
914 pdev = pdev->bus->phy_map[0];
915 if (!pdev) {
916 kfree(priv);
917 return 0;
918 }
919
920 /* switch device has not been initialized, reuse priv */
921 if (!pdev->priv) {
922 priv->port4_phy = true;
923 pdev->priv = priv;
924 return 0;
925 }
926
927 kfree(priv);
928
929 /* switch device has been initialized, reinit */
930 priv = pdev->priv;
931 priv->dev.ports = (AR8216_NUM_PORTS - 1);
932 priv->initialized = false;
933 priv->port4_phy = true;
934 ar8316_hw_init(priv);
935 return 0;
936 }
937
938 kfree(priv);
939 return 0;
940 }
941
942 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
943 pdev->attached_dev->name, priv->chip_type);
944
945 pdev->supported = priv->chip_type == AR8316 ?
946 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
947 pdev->advertising = pdev->supported;
948
949 mutex_init(&priv->reg_mutex);
950 priv->read = ar8216_mii_read;
951 priv->write = ar8216_mii_write;
952
953 pdev->priv = priv;
954
955 swdev = &priv->dev;
956 swdev->cpu_port = AR8216_PORT_CPU;
957 swdev->ops = &ar8216_sw_ops;
958 swdev->ports = AR8216_NUM_PORTS;
959
960 if (priv->chip_type == AR8316) {
961 swdev->name = "Atheros AR8316";
962 swdev->vlans = AR8X16_MAX_VLANS;
963
964 if (priv->port4_phy) {
965 /* port 5 connected to the other mac, therefore unusable */
966 swdev->ports = (AR8216_NUM_PORTS - 1);
967 }
968 } else if (priv->chip_type == AR8236) {
969 swdev->name = "Atheros AR8236";
970 swdev->vlans = AR8216_NUM_VLANS;
971 swdev->ports = AR8216_NUM_PORTS;
972 } else {
973 swdev->name = "Atheros AR8216";
974 swdev->vlans = AR8216_NUM_VLANS;
975 }
976
977 ret = register_switch(&priv->dev, pdev->attached_dev);
978 if (ret)
979 goto err_free_priv;
980
981 priv->init = true;
982
983 ret = priv->chip->hw_init(priv);
984 if (ret)
985 goto err_free_priv;
986
987 ret = ar8216_reset_switch(&priv->dev);
988 if (ret)
989 goto err_free_priv;
990
991 dev->phy_ptr = priv;
992
993 /* VID fixup only needed on ar8216 */
994 if (pdev->addr == 0 && priv->chip_type == AR8216) {
995 pdev->pkt_align = 2;
996 pdev->netif_receive_skb = ar8216_netif_receive_skb;
997 pdev->netif_rx = ar8216_netif_rx;
998 priv->ndo_old = dev->netdev_ops;
999 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
1000 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
1001 dev->netdev_ops = &priv->ndo;
1002 }
1003
1004 priv->init = false;
1005
1006 return 0;
1007
1008 err_free_priv:
1009 kfree(priv);
1010 return ret;
1011 }
1012
1013 static int
1014 ar8216_read_status(struct phy_device *phydev)
1015 {
1016 struct ar8216_priv *priv = phydev->priv;
1017 struct switch_port_link link;
1018 int ret;
1019
1020 if (phydev->addr != 0)
1021 return genphy_read_status(phydev);
1022
1023 ar8216_read_port_link(priv, phydev->addr, &link);
1024 phydev->link = !!link.link;
1025 if (!phydev->link)
1026 return 0;
1027
1028 switch (link.speed) {
1029 case SWITCH_PORT_SPEED_10:
1030 phydev->speed = SPEED_10;
1031 break;
1032 case SWITCH_PORT_SPEED_100:
1033 phydev->speed = SPEED_100;
1034 break;
1035 case SWITCH_PORT_SPEED_1000:
1036 phydev->speed = SPEED_1000;
1037 break;
1038 default:
1039 phydev->speed = 0;
1040 }
1041 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1042
1043 /* flush the address translation unit */
1044 mutex_lock(&priv->reg_mutex);
1045 ret = priv->chip->atu_flush(priv);
1046 mutex_unlock(&priv->reg_mutex);
1047
1048 phydev->state = PHY_RUNNING;
1049 netif_carrier_on(phydev->attached_dev);
1050 phydev->adjust_link(phydev->attached_dev);
1051
1052 return ret;
1053 }
1054
1055 static int
1056 ar8216_config_aneg(struct phy_device *phydev)
1057 {
1058 if (phydev->addr == 0)
1059 return 0;
1060
1061 return genphy_config_aneg(phydev);
1062 }
1063
1064 static int
1065 ar8216_probe(struct phy_device *pdev)
1066 {
1067 struct ar8216_priv priv;
1068
1069 priv.phy = pdev;
1070 return ar8216_id_chip(&priv);
1071 }
1072
1073 static void
1074 ar8216_remove(struct phy_device *pdev)
1075 {
1076 struct ar8216_priv *priv = pdev->priv;
1077 struct net_device *dev = pdev->attached_dev;
1078
1079 if (!priv)
1080 return;
1081
1082 if (priv->ndo_old && dev)
1083 dev->netdev_ops = priv->ndo_old;
1084 if (pdev->addr == 0)
1085 unregister_switch(&priv->dev);
1086 kfree(priv);
1087 }
1088
1089 static struct phy_driver ar8216_driver = {
1090 .phy_id = 0x004d0000,
1091 .name = "Atheros AR8216/AR8236/AR8316",
1092 .phy_id_mask = 0xffff0000,
1093 .features = PHY_BASIC_FEATURES,
1094 .probe = ar8216_probe,
1095 .remove = ar8216_remove,
1096 .config_init = &ar8216_config_init,
1097 .config_aneg = &ar8216_config_aneg,
1098 .read_status = &ar8216_read_status,
1099 .driver = { .owner = THIS_MODULE },
1100 };
1101
1102 int __init
1103 ar8216_init(void)
1104 {
1105 return phy_driver_register(&ar8216_driver);
1106 }
1107
1108 void __exit
1109 ar8216_exit(void)
1110 {
1111 phy_driver_unregister(&ar8216_driver);
1112 }
1113
1114 module_init(ar8216_init);
1115 module_exit(ar8216_exit);
1116 MODULE_LICENSE("GPL");
1117
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