package/uboot-lantiq/files/include/configs/easy50812.h

   1 /*
   2  * (C) Copyright 2003-2005
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * This file contains the configuration parameters for the Danube reference board.
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /* #define DEBUG */
  32
  33 #define CONFIG_MIPS32           1               /* MIPS32 CPU compatible */
  34 #define CONFIG_MIPS34KC         1               /* MIPS 34Kc CPU core */
  35 #define CONFIG_AR9              1               /* an AR9 device */
  36 #define CONFIG_EASY50812        1               /* on the AR9 reference board */
  37 #define CONFIG_SYS_MAX_RAM      32*1024*1024    /* 32 MB */
  38 #define CONFIG_FLASH_CFI_DRIVER 1               /* using CFI flash driver */
  39
  40 #define CONFIG_SYS_INIT_RAM_LOCK_MIPS
  41
  42 /* use PPL1 and fixed values for CPU / DDR and bus speed */
  43 #define CONFIG_USE_PLL1
  44 #define CONFIG_CPU_333M_RAM_166M
  45 #define CONFIG_CLASS_II_DDR_PAD
  46
  47 #ifdef CONFIG_SYS_RAMBOOT
  48         #define CONFIG_SKIP_LOWLEVEL_INIT       /* no cache */
  49 #else
  50         #define CONFIG_SYS_EBU_BOOT
  51         #define INFINEON_EBU_BOOTCFG    0x688C688C      /* CMULT = 8 for 150 MHz */
  52 #endif
  53
  54 #ifndef CPU_CLOCK_RATE
  55 #define CPU_CLOCK_RATE          (ifx_get_cpuclk())
  56 #endif
  57
  58 #define CONFIG_SYS_PROMPT       "AR9 => "       /* Monitor Command Prompt */
  59 #undef CONFIG_SYS_HUSH_PARSER                   /* Use the HUSH parser          */
  60
  61 /*
  62  * Include common defines/options for all Lantiq boards
  63  */
  64 #include "ifx-common.h"
  65
  66 /*
  67  * Cache Configuration (cpu/chip specific, ar9)
  68  */
  69 #define CONFIG_SYS_DCACHE_SIZE          (16384)
  70 #define CONFIG_SYS_ICACHE_SIZE          (16384)
  71 #define CONFIG_SYS_CACHELINE_SIZE       (32)
  72 #define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NO_WA
  73
  74 #define CONFIG_NET_MULTI
  75 #if 0
  76 #define CONFIG_M4530_ETH
  77 #define CONFIG_M4530_FPGA
  78 #endif
  79
  80 #define CONFIG_IFX_ETOP                 /* lantiq ethernet cpe interface */
  81 #define CLK_OUT2_25MHZ
  82 #define CONFIG_EXTRA_SWITCH             /* search for external switches like tantos */
  83 #define CONFIG_RMII                     /*  use interface in RMII mode */
  84 #define CONFIG_MII
  85 #define CONFIG_CMD_MII                  /* enable MII command */
  86
  87 #define CONFIG_IFX_ASC                  /* use lantiq ASC driver */
  88 #ifdef CONFIG_USE_ASC0
  89 #define CONFIG_SYS_IFX_ASC_BASE         0x1E100400
  90 #else
  91 #define CONFIG_SYS_IFX_ASC_BASE         0x1E100C00
  92 #endif
  93
  94 #ifdef CONFIG_SYS_RAMBOOT
  95 /* Configuration of EBU: */
  96 /* starting address from 0xb0000000 */
  97 /* make the flash available from RAM boot */
  98 #       define CONFIG_EBU_ADDSEL0               0x10000031
  99 #       define CONFIG_EBU_BUSCON0               0x0001D7FF
 100 #endif
 101
 102 #define CONFIG_CMD_HTTPD                /* enable upgrade via HTTPD */
 103
 104 #endif  /* __CONFIG_H */