[dnsmasq] Update to version 2.49
[openwrt.git] / package / broadcom-57xx / src / lm.h
1 /******************************************************************************/
2 /* */
3 /* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */
4 /* Corporation. */
5 /* All rights reserved. */
6 /* */
7 /* This program is free software; you can redistribute it and/or modify */
8 /* it under the terms of the GNU General Public License as published by */
9 /* the Free Software Foundation, located in the file LICENSE. */
10 /* */
11 /* History: */
12 /* 02/25/00 Hav Khauv Initial version. */
13 /******************************************************************************/
14
15 #ifndef LM_H
16 #define LM_H
17
18 #include "queue.h"
19 #include "bits.h"
20
21
22
23 /******************************************************************************/
24 /* Basic types. */
25 /******************************************************************************/
26
27 typedef char LM_CHAR, *PLM_CHAR;
28 typedef unsigned int LM_UINT, *PLM_UINT;
29 typedef unsigned char LM_UINT8, *PLM_UINT8;
30 typedef unsigned short LM_UINT16, *PLM_UINT16;
31 typedef unsigned int LM_UINT32, *PLM_UINT32;
32 typedef unsigned int LM_COUNTER, *PLM_COUNTER;
33 typedef void LM_VOID, *PLM_VOID;
34 typedef char LM_BOOL, *PLM_BOOL;
35
36 /* 64bit value. */
37 typedef struct {
38 #ifdef BIG_ENDIAN_HOST
39 LM_UINT32 High;
40 LM_UINT32 Low;
41 #else /* BIG_ENDIAN_HOST */
42 LM_UINT32 Low;
43 LM_UINT32 High;
44 #endif /* !BIG_ENDIAN_HOST */
45 } LM_UINT64, *PLM_UINT64;
46
47 typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS;
48
49 /* void LM_INC_PHYSICAL_ADDRESS(PLM_PHYSICAL_ADDRESS pAddr,LM_UINT32 IncSize) */
50 #define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \
51 { \
52 LM_UINT32 OrgLow; \
53 \
54 OrgLow = (pAddr)->Low; \
55 (pAddr)->Low += IncSize; \
56 if((pAddr)->Low < OrgLow) { \
57 (pAddr)->High++; /* Wrap around. */ \
58 } \
59 }
60
61
62 #ifndef TRUE
63 #define TRUE 1
64 #endif /* TRUE */
65
66 #ifndef FALSE
67 #define FALSE 0
68 #endif /* FALSE */
69
70 #ifndef NULL
71 #define NULL ((void *) 0)
72 #endif /* NULL */
73
74 #ifndef OFFSETOF
75 #define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m)))
76 #endif /* OFFSETOF */
77
78
79
80 /******************************************************************************/
81 /* Simple macros. */
82 /******************************************************************************/
83
84 #define IS_ETH_BROADCAST(_pEthAddr) \
85 (((unsigned char *) (_pEthAddr))[0] == ((unsigned char) 0xff))
86
87 #define IS_ETH_MULTICAST(_pEthAddr) \
88 (((unsigned char *) (_pEthAddr))[0] & ((unsigned char) 0x01))
89
90 #define IS_ETH_ADDRESS_EQUAL(_pEtherAddr1, _pEtherAddr2) \
91 ((((unsigned char *) (_pEtherAddr1))[0] == \
92 ((unsigned char *) (_pEtherAddr2))[0]) && \
93 (((unsigned char *) (_pEtherAddr1))[1] == \
94 ((unsigned char *) (_pEtherAddr2))[1]) && \
95 (((unsigned char *) (_pEtherAddr1))[2] == \
96 ((unsigned char *) (_pEtherAddr2))[2]) && \
97 (((unsigned char *) (_pEtherAddr1))[3] == \
98 ((unsigned char *) (_pEtherAddr2))[3]) && \
99 (((unsigned char *) (_pEtherAddr1))[4] == \
100 ((unsigned char *) (_pEtherAddr2))[4]) && \
101 (((unsigned char *) (_pEtherAddr1))[5] == \
102 ((unsigned char *) (_pEtherAddr2))[5]))
103
104 #define COPY_ETH_ADDRESS(_Src, _Dst) \
105 ((unsigned char *) (_Dst))[0] = ((unsigned char *) (_Src))[0]; \
106 ((unsigned char *) (_Dst))[1] = ((unsigned char *) (_Src))[1]; \
107 ((unsigned char *) (_Dst))[2] = ((unsigned char *) (_Src))[2]; \
108 ((unsigned char *) (_Dst))[3] = ((unsigned char *) (_Src))[3]; \
109 ((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \
110 ((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5];
111
112
113
114 /******************************************************************************/
115 /* Constants. */
116 /******************************************************************************/
117
118 #define ETHERNET_ADDRESS_SIZE 6
119 #define ETHERNET_PACKET_HEADER_SIZE 14
120 #define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */
121 #define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */
122 #define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60
123 #define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514
124 #define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */
125 #define MAX_ETHERNET_JUMBO_PACKET_SIZE_NO_CRC 9014
126
127 #ifndef LM_MAX_MC_TABLE_SIZE
128 #define LM_MAX_MC_TABLE_SIZE 32
129 #endif /* LM_MAX_MC_TABLE_SIZE */
130 #define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1)
131 #define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1)
132
133
134 /* Receive filter masks. */
135 #define LM_ACCEPT_UNICAST 0x0001
136 #define LM_ACCEPT_MULTICAST 0x0002
137 #define LM_ACCEPT_ALL_MULTICAST 0x0004
138 #define LM_ACCEPT_BROADCAST 0x0008
139 #define LM_ACCEPT_ERROR_PACKET 0x0010
140 #define LM_KEEP_VLAN_TAG 0x0020
141
142 #define LM_PROMISCUOUS_MODE 0x10000
143
144
145
146 /******************************************************************************/
147 /* PCI registers. */
148 /******************************************************************************/
149
150 #define PCI_VENDOR_ID_REG 0x00
151 #define PCI_DEVICE_ID_REG 0x02
152
153 #define PCI_COMMAND_REG 0x04
154 #define PCI_IO_SPACE_ENABLE 0x0001
155 #define PCI_MEM_SPACE_ENABLE 0x0002
156 #define PCI_BUSMASTER_ENABLE 0x0004
157 #define PCI_MEMORY_WRITE_INVALIDATE 0x0010
158 #define PCI_PARITY_ERROR_ENABLE 0x0040
159 #define PCI_SYSTEM_ERROR_ENABLE 0x0100
160 #define PCI_FAST_BACK_TO_BACK_ENABLE 0x0200
161
162 #define PCI_STATUS_REG 0x06
163 #define PCI_REV_ID_REG 0x08
164
165 #define PCI_CACHE_LINE_SIZE_REG 0x0c
166
167 #define PCI_IO_BASE_ADDR_REG 0x10
168 #define PCI_IO_BASE_ADDR_MASK 0xfffffff0
169
170 #define PCI_MEM_BASE_ADDR_LOW 0x10
171 #define PCI_MEM_BASE_ADDR_HIGH 0x14
172
173 #define PCI_SUBSYSTEM_VENDOR_ID_REG 0x2c
174 #define PCI_SUBSYSTEM_ID_REG 0x2e
175 #define PCI_INT_LINE_REG 0x3c
176
177 #define PCIX_CAP_REG 0x40
178 #define PCIX_ENABLE_RELAXED_ORDERING BIT_17
179
180 /******************************************************************************/
181 /* Fragment structure. */
182 /******************************************************************************/
183
184 typedef struct {
185 LM_UINT32 FragSize;
186 LM_PHYSICAL_ADDRESS FragBuf;
187 } LM_FRAG, *PLM_FRAG;
188
189 typedef struct {
190 /* FragCount is initialized for the caller to the maximum array size, on */
191 /* return FragCount is the number of the actual fragments in the array. */
192 LM_UINT32 FragCount;
193
194 /* Total buffer size. */
195 LM_UINT32 TotalSize;
196
197 /* Fragment array buffer. */
198 LM_FRAG Fragments[1];
199 } LM_FRAG_LIST, *PLM_FRAG_LIST;
200
201 #define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \
202 typedef struct { \
203 LM_FRAG_LIST FragList; \
204 LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \
205 } _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME
206
207
208
209 /******************************************************************************/
210 /* Status codes. */
211 /******************************************************************************/
212
213 #define LM_STATUS_SUCCESS 0
214 #define LM_STATUS_FAILURE 1
215
216 #define LM_STATUS_INTERRUPT_ACTIVE 2
217 #define LM_STATUS_INTERRUPT_NOT_ACTIVE 3
218
219 #define LM_STATUS_LINK_ACTIVE 4
220 #define LM_STATUS_LINK_DOWN 5
221 #define LM_STATUS_LINK_SETTING_MISMATCH 6
222
223 #define LM_STATUS_TOO_MANY_FRAGMENTS 7
224 #define LM_STATUS_TRANSMIT_ABORTED 8
225 #define LM_STATUS_TRANSMIT_ERROR 9
226 #define LM_STATUS_RECEIVE_ABORTED 10
227 #define LM_STATUS_RECEIVE_ERROR 11
228 #define LM_STATUS_INVALID_PACKET_SIZE 12
229 #define LM_STATUS_OUT_OF_MAP_REGISTERS 13
230 #define LM_STATUS_UNKNOWN_ADAPTER 14
231
232 typedef LM_UINT LM_STATUS, *PLM_STATUS;
233
234
235 /******************************************************************************/
236 /* Line speed. */
237 /******************************************************************************/
238
239 #define LM_LINE_SPEED_UNKNOWN 0
240 #define LM_LINE_SPEED_AUTO LM_LINE_SPEED_UNKNOWN
241 #define LM_LINE_SPEED_10MBPS 10
242 #define LM_LINE_SPEED_100MBPS 100
243 #define LM_LINE_SPEED_1000MBPS 1000
244
245 typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED;
246
247
248
249 /******************************************************************************/
250 /* Duplex mode. */
251 /******************************************************************************/
252
253 #define LM_DUPLEX_MODE_UNKNOWN 0
254 #define LM_DUPLEX_MODE_HALF 1
255 #define LM_DUPLEX_MODE_FULL 2
256
257 typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE;
258
259
260
261 /******************************************************************************/
262 /* Power state. */
263 /******************************************************************************/
264
265 #define LM_POWER_STATE_D0 0
266 #define LM_POWER_STATE_D1 1
267 #define LM_POWER_STATE_D2 2
268 #define LM_POWER_STATE_D3 3
269
270 typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE;
271
272
273
274 /******************************************************************************/
275 /* Task offloading. */
276 /******************************************************************************/
277
278 #define LM_TASK_OFFLOAD_NONE 0x0000
279 #define LM_TASK_OFFLOAD_TX_IP_CHECKSUM 0x0001
280 #define LM_TASK_OFFLOAD_RX_IP_CHECKSUM 0x0002
281 #define LM_TASK_OFFLOAD_TX_TCP_CHECKSUM 0x0004
282 #define LM_TASK_OFFLOAD_RX_TCP_CHECKSUM 0x0008
283 #define LM_TASK_OFFLOAD_TX_UDP_CHECKSUM 0x0010
284 #define LM_TASK_OFFLOAD_RX_UDP_CHECKSUM 0x0020
285 #define LM_TASK_OFFLOAD_TCP_SEGMENTATION 0x0040
286
287 typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD;
288
289
290
291 /******************************************************************************/
292 /* Flow control. */
293 /******************************************************************************/
294
295 #define LM_FLOW_CONTROL_NONE 0x00
296 #define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01
297 #define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02
298 #define LM_FLOW_CONTROL_RX_TX_PAUSE (LM_FLOW_CONTROL_RECEIVE_PAUSE | \
299 LM_FLOW_CONTROL_TRANSMIT_PAUSE)
300
301 /* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the */
302 /* auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE */
303 /* bits are set, then flow control is enabled regardless of link partner's */
304 /* flow control capability. */
305 #define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000
306
307 typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL;
308
309
310
311 /******************************************************************************/
312 /* Wake up mode. */
313 /******************************************************************************/
314
315 #define LM_WAKE_UP_MODE_NONE 0
316 #define LM_WAKE_UP_MODE_MAGIC_PACKET 1
317 #define LM_WAKE_UP_MODE_NWUF 2
318 #define LM_WAKE_UP_MODE_LINK_CHANGE 4
319
320 typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE;
321
322
323
324 /******************************************************************************/
325 /* Counters. */
326 /******************************************************************************/
327
328 #define LM_COUNTER_FRAMES_XMITTED_OK 0
329 #define LM_COUNTER_FRAMES_RECEIVED_OK 1
330 #define LM_COUNTER_ERRORED_TRANSMIT_COUNT 2
331 #define LM_COUNTER_ERRORED_RECEIVE_COUNT 3
332 #define LM_COUNTER_RCV_CRC_ERROR 4
333 #define LM_COUNTER_ALIGNMENT_ERROR 5
334 #define LM_COUNTER_SINGLE_COLLISION_FRAMES 6
335 #define LM_COUNTER_MULTIPLE_COLLISION_FRAMES 7
336 #define LM_COUNTER_FRAMES_DEFERRED 8
337 #define LM_COUNTER_MAX_COLLISIONS 9
338 #define LM_COUNTER_RCV_OVERRUN 10
339 #define LM_COUNTER_XMIT_UNDERRUN 11
340 #define LM_COUNTER_UNICAST_FRAMES_XMIT 12
341 #define LM_COUNTER_MULTICAST_FRAMES_XMIT 13
342 #define LM_COUNTER_BROADCAST_FRAMES_XMIT 14
343 #define LM_COUNTER_UNICAST_FRAMES_RCV 15
344 #define LM_COUNTER_MULTICAST_FRAMES_RCV 16
345 #define LM_COUNTER_BROADCAST_FRAMES_RCV 17
346
347 typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE;
348
349
350 typedef LM_UINT32 LM_RESET_TYPE;
351 #define LM_SHUTDOWN_RESET 0
352 #define LM_INIT_RESET 1
353 #define LM_SUSPEND_RESET 2
354
355 /******************************************************************************/
356 /* Forward definition. */
357 /******************************************************************************/
358
359 typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK;
360 typedef struct _LM_PACKET *PLM_PACKET;
361
362
363
364 /******************************************************************************/
365 /* Function prototypes. */
366 /******************************************************************************/
367
368 LM_STATUS LM_GetAdapterInfo(PLM_DEVICE_BLOCK pDevice);
369 LM_STATUS LM_InitializeAdapter(PLM_DEVICE_BLOCK pDevice);
370 LM_STATUS LM_ResetAdapter(PLM_DEVICE_BLOCK pDevice);
371 LM_STATUS LM_DisableInterrupt(PLM_DEVICE_BLOCK pDevice);
372 LM_STATUS LM_EnableInterrupt(PLM_DEVICE_BLOCK pDevice);
373 LM_STATUS LM_SendPacket(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
374 LM_STATUS LM_ServiceInterrupts(PLM_DEVICE_BLOCK pDevice);
375 #ifdef BCM_NAPI_RXPOLL
376 int LM_ServiceRxPoll(PLM_DEVICE_BLOCK pDevice, int limit);
377 #endif
378 LM_STATUS LM_QueueRxPackets(PLM_DEVICE_BLOCK pDevice);
379 LM_STATUS LM_SetReceiveMask(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask);
380 LM_STATUS LM_Halt(PLM_DEVICE_BLOCK pDevice);
381 LM_STATUS LM_Abort(PLM_DEVICE_BLOCK pDevice);
382 LM_STATUS LM_MulticastAdd(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
383 LM_STATUS LM_MulticastDel(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
384 LM_STATUS LM_MulticastClear(PLM_DEVICE_BLOCK pDevice);
385 LM_STATUS LM_SetMacAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMacAddress);
386 LM_STATUS LM_LoopbackAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress);
387
388 LM_UINT32 LM_GetCrcCounter(PLM_DEVICE_BLOCK pDevice);
389
390 LM_WAKE_UP_MODE LM_PMCapabilities(PLM_DEVICE_BLOCK pDevice);
391 LM_STATUS LM_NwufAdd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
392 LM_UINT8 *pByteMask, LM_UINT8 *pPattern);
393 LM_STATUS LM_NwufRemove(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
394 LM_UINT8 *pByteMask, LM_UINT8 *pPattern);
395 LM_STATUS LM_SetPowerState(PLM_DEVICE_BLOCK pDevice, LM_POWER_STATE PowerLevel);
396
397 LM_VOID LM_ReadPhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
398 PLM_UINT32 pData32);
399 LM_VOID LM_WritePhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
400 LM_UINT32 Data32);
401
402 /* MII read/write functions to export to the robo support code */
403 LM_UINT16 robo_miird(void *h, int phyadd, int regoff);
404 void robo_miiwr(void *h, int phyadd, int regoff, LM_UINT16 value);
405
406
407 LM_STATUS LM_EnableMacLoopBack(PLM_DEVICE_BLOCK pDevice);
408 LM_STATUS LM_DisableMacLoopBack(PLM_DEVICE_BLOCK pDevice);
409 LM_STATUS LM_EnablePhyLoopBack(PLM_DEVICE_BLOCK pDevice);
410 LM_STATUS LM_DisablePhyLoopBack(PLM_DEVICE_BLOCK pDevice);
411 LM_STATUS LM_EnableExtLoopBack(PLM_DEVICE_BLOCK pDevice, LM_LINE_SPEED Speed);
412 LM_STATUS LM_DisableExtLoopBack(PLM_DEVICE_BLOCK pDevice);
413
414 LM_STATUS LM_SetupPhy(PLM_DEVICE_BLOCK pDevice);
415 LM_STATUS LM_BlinkLED(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration);
416 LM_STATUS LM_GetStats(PLM_DEVICE_BLOCK pDevice);
417 LM_STATUS LM_NvramRead(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
418 LM_UINT32 *pData);
419 LM_STATUS LM_NvramWriteBlock(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
420 LM_UINT32 *pData, LM_UINT32 Size);
421 LM_VOID LM_ResetPhy(PLM_DEVICE_BLOCK pDevice);
422 LM_STATUS LM_ShutdownChip(PLM_DEVICE_BLOCK pDevice, LM_RESET_TYPE Mode);
423 LM_STATUS LM_HaltCpu(PLM_DEVICE_BLOCK pDevice,LM_UINT32 cpu_number);
424 LM_UINT32 ComputeCrc32(LM_UINT8 *pBuffer, LM_UINT32 BufferSize);
425 LM_STATUS LM_SwitchClocks(PLM_DEVICE_BLOCK pDevice);
426
427 void LM_5714_FamForceFiber( PLM_DEVICE_BLOCK pDevice);
428 void LM_5714_FamGoFiberAutoNeg( PLM_DEVICE_BLOCK pDevice);
429 void LM_5714_FamFiberCheckLink( PLM_DEVICE_BLOCK pDevice);
430
431 /******************************************************************************/
432 /* These are the OS specific functions called by LMAC. */
433 /******************************************************************************/
434
435 LM_STATUS MM_ReadConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
436 LM_UINT16 *pValue16);
437 LM_STATUS MM_WriteConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
438 LM_UINT16 Value16);
439 LM_STATUS MM_ReadConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
440 LM_UINT32 *pValue32);
441 LM_STATUS MM_WriteConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
442 LM_UINT32 Value32);
443 LM_STATUS MM_MapMemBase(PLM_DEVICE_BLOCK pDevice);
444 LM_STATUS MM_MapIoBase(PLM_DEVICE_BLOCK pDevice);
445 LM_STATUS MM_IndicateRxPackets(PLM_DEVICE_BLOCK pDevice);
446 LM_STATUS MM_IndicateTxPackets(PLM_DEVICE_BLOCK pDevice);
447 LM_STATUS MM_StartTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
448 LM_STATUS MM_CompleteTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
449 LM_STATUS MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
450 PLM_VOID *pMemoryBlockVirt);
451 LM_STATUS MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
452 PLM_VOID *pMemoryBlockVirt, PLM_PHYSICAL_ADDRESS pMemoryBlockPhy,
453 LM_BOOL Cached);
454 LM_STATUS MM_GetConfig(PLM_DEVICE_BLOCK pDevice);
455 LM_STATUS MM_IndicateStatus(PLM_DEVICE_BLOCK pDevice, LM_STATUS Status);
456 LM_STATUS MM_InitializeUmPackets(PLM_DEVICE_BLOCK pDevice);
457 LM_STATUS MM_FreeRxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
458 LM_STATUS MM_CoalesceTxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
459 PLM_DEVICE_BLOCK MM_FindPeerDev(PLM_DEVICE_BLOCK pDevice);
460 int MM_FindCapability(PLM_DEVICE_BLOCK pDevice, int capability);
461 LM_VOID MM_UnmapRxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
462 #ifdef BCM_NAPI_RXPOLL
463 LM_STATUS MM_ScheduleRxPoll(PLM_DEVICE_BLOCK pDevice);
464 #endif
465 LM_STATUS MM_Sleep(PLM_DEVICE_BLOCK pDevice, LM_UINT32 msec);
466 LM_STATUS LM_MbufWorkAround(PLM_DEVICE_BLOCK pDevice);
467
468 #ifdef INCLUDE_5703_A0_FIX
469 LM_STATUS LM_Load5703DmaWFirmware(PLM_DEVICE_BLOCK pDevice);
470 #endif
471
472 /* Debugging support */
473
474 extern int b57_msg_level;
475
476 #define B57_ERR_VAL 1
477 #define B57_INFO_VAL 2
478
479 #define B57_ERR(args) do {if (b57_msg_level & B57_ERR_VAL) printf args;} while (0)
480 #define B57_INFO(args) do {if (b57_msg_level & B57_INFO_VAL) printf args;} while (0)
481
482 #endif /* LM_H */
483
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