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[openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / devices.c
1 /*
2 * Atheros AR71xx SoC platform devices
3 *
4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/serial_8250.h>
21 #include <linux/ath9k_platform.h>
22
23 #include <asm/mach-ar71xx/ar71xx.h>
24
25 #include "devices.h"
26
27 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
28
29 /*
30 * OHCI (USB full speed host controller)
31 */
32 static struct resource ar71xx_ohci_resources[] = {
33 [0] = {
34 .start = AR71XX_OHCI_BASE,
35 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
36 .flags = IORESOURCE_MEM,
37 },
38 [1] = {
39 .start = AR71XX_MISC_IRQ_OHCI,
40 .end = AR71XX_MISC_IRQ_OHCI,
41 .flags = IORESOURCE_IRQ,
42 },
43 };
44
45 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
46 static struct platform_device ar71xx_ohci_device = {
47 .name = "ar71xx-ohci",
48 .id = -1,
49 .resource = ar71xx_ohci_resources,
50 .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
51 .dev = {
52 .dma_mask = &ar71xx_ohci_dmamask,
53 .coherent_dma_mask = DMA_BIT_MASK(32),
54 },
55 };
56
57 /*
58 * EHCI (USB full speed host controller)
59 */
60 static struct resource ar71xx_ehci_resources[] = {
61 [0] = {
62 .start = AR71XX_EHCI_BASE,
63 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = AR71XX_CPU_IRQ_USB,
68 .end = AR71XX_CPU_IRQ_USB,
69 .flags = IORESOURCE_IRQ,
70 },
71 };
72
73
74 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
75 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
76
77 static struct platform_device ar71xx_ehci_device = {
78 .name = "ar71xx-ehci",
79 .id = -1,
80 .resource = ar71xx_ehci_resources,
81 .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
82 .dev = {
83 .dma_mask = &ar71xx_ehci_dmamask,
84 .coherent_dma_mask = DMA_BIT_MASK(32),
85 .platform_data = &ar71xx_ehci_data,
86 },
87 };
88
89 #define AR71XX_USB_RESET_MASK \
90 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
91 | RESET_MODULE_USB_OHCI_DLL)
92
93 static void ar71xx_usb_setup(void)
94 {
95 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
96 mdelay(1000);
97 ar71xx_device_start(AR71XX_USB_RESET_MASK);
98
99 /* Turning on the Buff and Desc swap bits */
100 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
101
102 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
103 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
104
105 mdelay(900);
106 }
107
108 static void ar91xx_usb_setup(void)
109 {
110 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
111 mdelay(10);
112
113 ar71xx_device_start(RESET_MODULE_USB_HOST);
114 mdelay(10);
115
116 ar71xx_device_start(RESET_MODULE_USB_PHY);
117 mdelay(10);
118 }
119
120 void __init ar71xx_add_device_usb(void)
121 {
122 switch (ar71xx_soc) {
123 case AR71XX_SOC_AR7130:
124 case AR71XX_SOC_AR7141:
125 case AR71XX_SOC_AR7161:
126 ar71xx_usb_setup();
127 platform_device_register(&ar71xx_ohci_device);
128 platform_device_register(&ar71xx_ehci_device);
129 break;
130
131 case AR71XX_SOC_AR9130:
132 case AR71XX_SOC_AR9132:
133 ar91xx_usb_setup();
134 ar71xx_ehci_data.is_ar91xx = 1;
135 platform_device_register(&ar71xx_ehci_device);
136 break;
137
138 default:
139 BUG();
140 }
141 }
142
143 static struct resource ar71xx_uart_resources[] = {
144 {
145 .start = AR71XX_UART_BASE,
146 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
147 .flags = IORESOURCE_MEM,
148 },
149 };
150
151 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
152 static struct plat_serial8250_port ar71xx_uart_data[] = {
153 {
154 .mapbase = AR71XX_UART_BASE,
155 .irq = AR71XX_MISC_IRQ_UART,
156 .flags = AR71XX_UART_FLAGS,
157 .iotype = UPIO_MEM32,
158 .regshift = 2,
159 }, {
160 /* terminating entry */
161 }
162 };
163
164 static struct platform_device ar71xx_uart_device = {
165 .name = "serial8250",
166 .id = PLAT8250_DEV_PLATFORM,
167 .resource = ar71xx_uart_resources,
168 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
169 .dev = {
170 .platform_data = ar71xx_uart_data
171 },
172 };
173
174 void __init ar71xx_add_device_uart(void)
175 {
176 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
177 platform_device_register(&ar71xx_uart_device);
178 }
179
180 static struct resource ar71xx_mdio_resources[] = {
181 {
182 .name = "mdio_base",
183 .flags = IORESOURCE_MEM,
184 .start = AR71XX_GE0_BASE + 0x20,
185 .end = AR71XX_GE0_BASE + 0x38 - 1,
186 }
187 };
188
189 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
190 .phy_mask = 0xffffffff,
191 };
192
193 static struct platform_device ar71xx_mdio_device = {
194 .name = "ag71xx-mdio",
195 .id = -1,
196 .resource = ar71xx_mdio_resources,
197 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
198 .dev = {
199 .platform_data = &ar71xx_mdio_data,
200 },
201 };
202
203 void __init ar71xx_add_device_mdio(u32 phy_mask)
204 {
205 ar71xx_mdio_data.phy_mask = phy_mask;
206 platform_device_register(&ar71xx_mdio_device);
207 }
208
209 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
210 {
211 void __iomem *base;
212 u32 t;
213
214 base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
215
216 t = __raw_readl(base + cfg_reg);
217 t &= ~(3 << shift);
218 t |= (2 << shift);
219 __raw_writel(t, base + cfg_reg);
220 udelay(100);
221
222 __raw_writel(pll_val, base + pll_reg);
223
224 t |= (3 << shift);
225 __raw_writel(t, base + cfg_reg);
226 udelay(100);
227
228 t &= ~(3 << shift);
229 __raw_writel(t, base + cfg_reg);
230 udelay(100);
231
232 printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
233 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
234
235 iounmap(base);
236 }
237
238 struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
239 struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
240
241 static u32 ar71xx_get_eth_pll(unsigned int mac, int speed)
242 {
243 struct ar71xx_eth_pll_data *pll_data;
244 u32 pll_val;
245
246 switch (mac) {
247 case 0:
248 pll_data = &ar71xx_eth0_pll_data;
249 break;
250 case 1:
251 pll_data = &ar71xx_eth1_pll_data;
252 break;
253 default:
254 BUG();
255 }
256
257 switch (speed) {
258 case SPEED_10:
259 pll_val = pll_data->pll_10;
260 break;
261 case SPEED_100:
262 pll_val = pll_data->pll_100;
263 break;
264 case SPEED_1000:
265 pll_val = pll_data->pll_1000;
266 break;
267 default:
268 BUG();
269 }
270
271 return pll_val;
272 }
273
274 static void ar71xx_set_pll_ge0(int speed)
275 {
276 u32 val = ar71xx_get_eth_pll(0, speed);
277
278 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
279 val, AR71XX_ETH0_PLL_SHIFT);
280 }
281
282 static void ar71xx_set_pll_ge1(int speed)
283 {
284 u32 val = ar71xx_get_eth_pll(1, speed);
285
286 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
287 val, AR71XX_ETH1_PLL_SHIFT);
288 }
289
290 static void ar724x_set_pll_ge0(int speed)
291 {
292 /* TODO */
293 }
294
295 static void ar724x_set_pll_ge1(int speed)
296 {
297 /* TODO */
298 }
299
300 static void ar91xx_set_pll_ge0(int speed)
301 {
302 u32 val = ar71xx_get_eth_pll(0, speed);
303
304 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
305 val, AR91XX_ETH0_PLL_SHIFT);
306 }
307
308 static void ar91xx_set_pll_ge1(int speed)
309 {
310 u32 val = ar71xx_get_eth_pll(1, speed);
311
312 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
313 val, AR91XX_ETH1_PLL_SHIFT);
314 }
315
316 static void ar71xx_ddr_flush_ge0(void)
317 {
318 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
319 }
320
321 static void ar71xx_ddr_flush_ge1(void)
322 {
323 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
324 }
325
326 static void ar724x_ddr_flush_ge0(void)
327 {
328 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
329 }
330
331 static void ar724x_ddr_flush_ge1(void)
332 {
333 ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
334 }
335
336 static void ar91xx_ddr_flush_ge0(void)
337 {
338 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
339 }
340
341 static void ar91xx_ddr_flush_ge1(void)
342 {
343 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
344 }
345
346 static struct resource ar71xx_eth0_resources[] = {
347 {
348 .name = "mac_base",
349 .flags = IORESOURCE_MEM,
350 .start = AR71XX_GE0_BASE,
351 .end = AR71XX_GE0_BASE + 0x20 - 1,
352 }, {
353 .name = "mac_base2",
354 .flags = IORESOURCE_MEM,
355 .start = AR71XX_GE0_BASE + 0x38,
356 .end = AR71XX_GE0_BASE + 0x200 - 1,
357 }, {
358 .name = "mii_ctrl",
359 .flags = IORESOURCE_MEM,
360 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
361 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
362 }, {
363 .name = "mac_irq",
364 .flags = IORESOURCE_IRQ,
365 .start = AR71XX_CPU_IRQ_GE0,
366 .end = AR71XX_CPU_IRQ_GE0,
367 },
368 };
369
370 struct ag71xx_platform_data ar71xx_eth0_data = {
371 .reset_bit = RESET_MODULE_GE0_MAC,
372 };
373
374 static struct platform_device ar71xx_eth0_device = {
375 .name = "ag71xx",
376 .id = 0,
377 .resource = ar71xx_eth0_resources,
378 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
379 .dev = {
380 .platform_data = &ar71xx_eth0_data,
381 },
382 };
383
384 static struct resource ar71xx_eth1_resources[] = {
385 {
386 .name = "mac_base",
387 .flags = IORESOURCE_MEM,
388 .start = AR71XX_GE1_BASE,
389 .end = AR71XX_GE1_BASE + 0x20 - 1,
390 }, {
391 .name = "mac_base2",
392 .flags = IORESOURCE_MEM,
393 .start = AR71XX_GE1_BASE + 0x38,
394 .end = AR71XX_GE1_BASE + 0x200 - 1,
395 }, {
396 .name = "mii_ctrl",
397 .flags = IORESOURCE_MEM,
398 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
399 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
400 }, {
401 .name = "mac_irq",
402 .flags = IORESOURCE_IRQ,
403 .start = AR71XX_CPU_IRQ_GE1,
404 .end = AR71XX_CPU_IRQ_GE1,
405 },
406 };
407
408 struct ag71xx_platform_data ar71xx_eth1_data = {
409 .reset_bit = RESET_MODULE_GE1_MAC,
410 };
411
412 static struct platform_device ar71xx_eth1_device = {
413 .name = "ag71xx",
414 .id = 1,
415 .resource = ar71xx_eth1_resources,
416 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
417 .dev = {
418 .platform_data = &ar71xx_eth1_data,
419 },
420 };
421
422 #define AR71XX_PLL_VAL_1000 0x00110000
423 #define AR71XX_PLL_VAL_100 0x00001099
424 #define AR71XX_PLL_VAL_10 0x00991099
425
426 #define AR724X_PLL_VAL_1000 0x00110000
427 #define AR724X_PLL_VAL_100 0x00001099
428 #define AR724X_PLL_VAL_10 0x00991099
429
430 #define AR91XX_PLL_VAL_1000 0x1a000000
431 #define AR91XX_PLL_VAL_100 0x13000a44
432 #define AR91XX_PLL_VAL_10 0x00441099
433
434 static void __init ar71xx_init_eth_pll_data(unsigned int id)
435 {
436 struct ar71xx_eth_pll_data *pll_data;
437 u32 pll_10, pll_100, pll_1000;
438
439 switch (id) {
440 case 0:
441 pll_data = &ar71xx_eth0_pll_data;
442 break;
443 case 1:
444 pll_data = &ar71xx_eth1_pll_data;
445 break;
446 default:
447 BUG();
448 }
449
450 switch (ar71xx_soc) {
451 case AR71XX_SOC_AR7130:
452 case AR71XX_SOC_AR7141:
453 case AR71XX_SOC_AR7161:
454 pll_10 = AR71XX_PLL_VAL_10;
455 pll_100 = AR71XX_PLL_VAL_100;
456 pll_1000 = AR71XX_PLL_VAL_1000;
457 break;
458
459 case AR71XX_SOC_AR7240:
460 pll_10 = AR724X_PLL_VAL_10;
461 pll_100 = AR724X_PLL_VAL_100;
462 pll_1000 = AR724X_PLL_VAL_1000;
463 break;
464
465 case AR71XX_SOC_AR9130:
466 case AR71XX_SOC_AR9132:
467 pll_10 = AR91XX_PLL_VAL_10;
468 pll_100 = AR91XX_PLL_VAL_100;
469 pll_1000 = AR91XX_PLL_VAL_1000;
470 break;
471 default:
472 BUG();
473 }
474
475 if (!pll_data->pll_10)
476 pll_data->pll_10 = pll_10;
477
478 if (!pll_data->pll_100)
479 pll_data->pll_100 = pll_100;
480
481 if (!pll_data->pll_1000)
482 pll_data->pll_1000 = pll_1000;
483 }
484
485 static int ar71xx_eth_instance __initdata;
486 void __init ar71xx_add_device_eth(unsigned int id)
487 {
488 struct platform_device *pdev;
489 struct ag71xx_platform_data *pdata;
490
491 ar71xx_init_eth_pll_data(id);
492
493 switch (id) {
494 case 0:
495 switch (ar71xx_eth0_data.phy_if_mode) {
496 case PHY_INTERFACE_MODE_MII:
497 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
498 break;
499 case PHY_INTERFACE_MODE_GMII:
500 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
501 break;
502 case PHY_INTERFACE_MODE_RGMII:
503 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
504 break;
505 case PHY_INTERFACE_MODE_RMII:
506 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
507 break;
508 default:
509 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
510 "for eth0\n");
511 return;
512 }
513 pdev = &ar71xx_eth0_device;
514 break;
515 case 1:
516 switch (ar71xx_eth1_data.phy_if_mode) {
517 case PHY_INTERFACE_MODE_RMII:
518 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
519 break;
520 case PHY_INTERFACE_MODE_RGMII:
521 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
522 break;
523 default:
524 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
525 "for eth1\n");
526 return;
527 }
528 pdev = &ar71xx_eth1_device;
529 break;
530 default:
531 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
532 return;
533 }
534
535 pdata = pdev->dev.platform_data;
536
537 switch (ar71xx_soc) {
538 case AR71XX_SOC_AR7130:
539 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
540 : ar71xx_ddr_flush_ge0;
541 pdata->set_pll = id ? ar71xx_set_pll_ge1
542 : ar71xx_set_pll_ge0;
543 break;
544
545 case AR71XX_SOC_AR7141:
546 case AR71XX_SOC_AR7161:
547 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
548 : ar71xx_ddr_flush_ge0;
549 pdata->set_pll = id ? ar71xx_set_pll_ge1
550 : ar71xx_set_pll_ge0;
551 pdata->has_gbit = 1;
552 break;
553
554 case AR71XX_SOC_AR7240:
555 pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
556 : ar724x_ddr_flush_ge0;
557 pdata->set_pll = id ? ar724x_set_pll_ge1
558 : ar724x_set_pll_ge0;
559 pdata->is_ar724x = 1;
560 break;
561
562 case AR71XX_SOC_AR9130:
563 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
564 : ar91xx_ddr_flush_ge0;
565 pdata->set_pll = id ? ar91xx_set_pll_ge1
566 : ar91xx_set_pll_ge0;
567 pdata->is_ar91xx = 1;
568 break;
569
570 case AR71XX_SOC_AR9132:
571 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
572 : ar91xx_ddr_flush_ge0;
573 pdata->set_pll = id ? ar91xx_set_pll_ge1
574 : ar91xx_set_pll_ge0;
575 pdata->is_ar91xx = 1;
576 pdata->has_gbit = 1;
577 break;
578
579 default:
580 BUG();
581 }
582
583 switch (pdata->phy_if_mode) {
584 case PHY_INTERFACE_MODE_GMII:
585 case PHY_INTERFACE_MODE_RGMII:
586 if (!pdata->has_gbit) {
587 printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
588 id);
589 return;
590 }
591 /* fallthrough */
592 default:
593 break;
594 }
595
596 if (is_valid_ether_addr(ar71xx_mac_base)) {
597 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
598 pdata->mac_addr[5] += ar71xx_eth_instance;
599 } else {
600 random_ether_addr(pdata->mac_addr);
601 printk(KERN_DEBUG
602 "ar71xx: using random MAC address for eth%d\n",
603 ar71xx_eth_instance);
604 }
605
606 platform_device_register(pdev);
607 ar71xx_eth_instance++;
608 }
609
610 static struct resource ar71xx_spi_resources[] = {
611 [0] = {
612 .start = AR71XX_SPI_BASE,
613 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
614 .flags = IORESOURCE_MEM,
615 },
616 };
617
618 static struct platform_device ar71xx_spi_device = {
619 .name = "ar71xx-spi",
620 .id = -1,
621 .resource = ar71xx_spi_resources,
622 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
623 };
624
625 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
626 struct spi_board_info const *info,
627 unsigned n)
628 {
629 spi_register_board_info(info, n);
630 ar71xx_spi_device.dev.platform_data = pdata;
631 platform_device_register(&ar71xx_spi_device);
632 }
633
634 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
635 struct gpio_led *leds)
636 {
637 struct platform_device *pdev;
638 struct gpio_led_platform_data pdata;
639 struct gpio_led *p;
640 int err;
641
642 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
643 if (!p)
644 return;
645
646 memcpy(p, leds, num_leds * sizeof(*p));
647
648 pdev = platform_device_alloc("leds-gpio", id);
649 if (!pdev)
650 goto err_free_leds;
651
652 memset(&pdata, 0, sizeof(pdata));
653 pdata.num_leds = num_leds;
654 pdata.leds = p;
655
656 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
657 if (err)
658 goto err_put_pdev;
659
660 err = platform_device_add(pdev);
661 if (err)
662 goto err_put_pdev;
663
664 return;
665
666 err_put_pdev:
667 platform_device_put(pdev);
668
669 err_free_leds:
670 kfree(p);
671 }
672
673 void __init ar71xx_add_device_gpio_buttons(int id,
674 unsigned poll_interval,
675 unsigned nbuttons,
676 struct gpio_button *buttons)
677 {
678 struct platform_device *pdev;
679 struct gpio_buttons_platform_data pdata;
680 struct gpio_button *p;
681 int err;
682
683 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
684 if (!p)
685 return;
686
687 memcpy(p, buttons, nbuttons * sizeof(*p));
688
689 pdev = platform_device_alloc("gpio-buttons", id);
690 if (!pdev)
691 goto err_free_buttons;
692
693 memset(&pdata, 0, sizeof(pdata));
694 pdata.poll_interval = poll_interval;
695 pdata.nbuttons = nbuttons;
696 pdata.buttons = p;
697
698 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
699 if (err)
700 goto err_put_pdev;
701
702
703 err = platform_device_add(pdev);
704 if (err)
705 goto err_put_pdev;
706
707 return;
708
709 err_put_pdev:
710 platform_device_put(pdev);
711
712 err_free_buttons:
713 kfree(p);
714 }
715
716 void __init ar71xx_add_device_wdt(void)
717 {
718 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
719 }
720
721 void __init ar71xx_set_mac_base(unsigned char *mac)
722 {
723 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
724 }
725
726 void __init ar71xx_parse_mac_addr(char *mac_str)
727 {
728 u8 tmp[ETH_ALEN];
729 int t;
730
731 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
732 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
733
734 if (t != ETH_ALEN)
735 t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
736 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
737
738 if (t == ETH_ALEN)
739 ar71xx_set_mac_base(tmp);
740 else
741 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
742 "\"%s\"\n", mac_str);
743 }
744
745 static struct resource ar91xx_wmac_resources[] = {
746 {
747 .start = AR91XX_WMAC_BASE,
748 .end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
749 .flags = IORESOURCE_MEM,
750 }, {
751 .start = AR71XX_CPU_IRQ_WMAC,
752 .end = AR71XX_CPU_IRQ_WMAC,
753 .flags = IORESOURCE_IRQ,
754 },
755 };
756
757 static struct ath9k_platform_data ar91xx_wmac_data;
758
759 static struct platform_device ar91xx_wmac_device = {
760 .name = "ath9k",
761 .id = -1,
762 .resource = ar91xx_wmac_resources,
763 .num_resources = ARRAY_SIZE(ar91xx_wmac_resources),
764 .dev = {
765 .platform_data = &ar91xx_wmac_data,
766 },
767 };
768
769 void __init ar91xx_add_device_wmac(void)
770 {
771 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
772
773 memcpy(ar91xx_wmac_data.eeprom_data, ee,
774 sizeof(ar91xx_wmac_data.eeprom_data));
775
776 ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
777 mdelay(10);
778
779 ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
780 mdelay(10);
781
782 platform_device_register(&ar91xx_wmac_device);
783 }
784
785 static struct platform_device ar71xx_dsa_switch_device = {
786 .name = "dsa",
787 .id = 0,
788 };
789
790 void __init ar71xx_add_device_dsa(unsigned int id,
791 struct dsa_platform_data *d)
792 {
793 switch (id) {
794 case 0:
795 d->netdev = &ar71xx_eth0_device.dev;
796 break;
797 case 1:
798 d->netdev = &ar71xx_eth1_device.dev;
799 break;
800 default:
801 printk(KERN_ERR
802 "ar71xx: invalid ethernet id %d for DSA switch\n",
803 id);
804 return;
805 }
806 d->mii_bus = &ar71xx_mdio_device.dev;
807 ar71xx_dsa_switch_device.dev.platform_data = d;
808
809 platform_device_register(&ar71xx_dsa_switch_device);
810 }
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