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[openwrt.git] / target / linux / brcm47xx / patches-3.0 / 0005-bcma-add-mips-driver.patch
1 From 0a1a5fd8aab864e7b531ab88fd317ff7278d884d Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Mon, 6 Jun 2011 00:07:32 +0200
4 Subject: [PATCH 05/14] bcma: add mips driver
5
6 This adds a mips driver to bcma. This is only found on embedded
7 devices. For now the driver just initializes the irqs used on this
8 system.
9
10 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
11 ---
12 drivers/bcma/Kconfig | 11 ++-
13 drivers/bcma/Makefile | 1 +
14 drivers/bcma/driver_mips.c | 234 +++++++++++++++++++++++++++++++++
15 drivers/bcma/main.c | 19 +++
16 include/linux/bcma/bcma.h | 2 +
17 include/linux/bcma/bcma_driver_mips.h | 49 +++++++
18 6 files changed, 315 insertions(+), 1 deletions(-)
19 create mode 100644 drivers/bcma/driver_mips.c
20 create mode 100644 include/linux/bcma/bcma_driver_mips.h
21
22 --- a/drivers/bcma/Kconfig
23 +++ b/drivers/bcma/Kconfig
24 @@ -29,9 +29,18 @@ config BCMA_HOST_PCI
25
26 config BCMA_HOST_SOC
27 bool
28 - depends on BCMA && MIPS
29 + depends on BCMA_DRIVER_MIPS
30 default n
31
32 +config BCMA_DRIVER_MIPS
33 + bool "BCMA Broadcom MIPS core driver"
34 + depends on BCMA && MIPS
35 + help
36 + Driver for the Broadcom MIPS core attached to Broadcom specific
37 + Advanced Microcontroller Bus.
38 +
39 + If unsure, say N
40 +
41 config BCMA_DEBUG
42 bool "BCMA debugging"
43 depends on BCMA
44 --- a/drivers/bcma/Makefile
45 +++ b/drivers/bcma/Makefile
46 @@ -1,6 +1,7 @@
47 bcma-y += main.o scan.o core.o sprom.o
48 bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o
49 bcma-y += driver_pci.o
50 +bcma-$(CONFIG_BCMA_DRIVER_MIPS) += driver_mips.o
51 bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
52 bcma-$(CONFIG_BCMA_HOST_SOC) += host_soc.o
53 obj-$(CONFIG_BCMA) += bcma.o
54 --- /dev/null
55 +++ b/drivers/bcma/driver_mips.c
56 @@ -0,0 +1,234 @@
57 +/*
58 + * Broadcom specific AMBA
59 + * Broadcom MIPS32 74K core driver
60 + *
61 + * Copyright 2009, Broadcom Corporation
62 + * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
63 + * Copyright 2010, Bernhard Loos <bernhardloos@googlemail.com>
64 + * Copyright 2011, Hauke Mehrtens <hauke@hauke-m.de>
65 + *
66 + * Licensed under the GNU/GPL. See COPYING for details.
67 + */
68 +
69 +#include "bcma_private.h"
70 +
71 +#include <linux/bcma/bcma.h>
72 +
73 +#include <linux/serial.h>
74 +#include <linux/serial_core.h>
75 +#include <linux/serial_reg.h>
76 +#include <linux/time.h>
77 +
78 +/* The 47162a0 hangs when reading its registers */
79 +static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
80 +{
81 + return dev->bus->chipinfo.id == 47162 && dev->bus->chipinfo.rev == 0 &&
82 + dev->id.id == BCMA_CORE_MIPS_74K;
83 +}
84 +
85 +static inline u32 mips_read32(struct bcma_drv_mips *mcore,
86 + u16 offset)
87 +{
88 + return bcma_read32(mcore->core, offset);
89 +}
90 +
91 +static inline void mips_write32(struct bcma_drv_mips *mcore,
92 + u16 offset,
93 + u32 value)
94 +{
95 + bcma_write32(mcore->core, offset, value);
96 +}
97 +
98 +static const u32 ipsflag_irq_mask[] = {
99 + 0,
100 + BCMA_MIPS_IPSFLAG_IRQ1,
101 + BCMA_MIPS_IPSFLAG_IRQ2,
102 + BCMA_MIPS_IPSFLAG_IRQ3,
103 + BCMA_MIPS_IPSFLAG_IRQ4,
104 +};
105 +
106 +static const u32 ipsflag_irq_shift[] = {
107 + 0,
108 + BCMA_MIPS_IPSFLAG_IRQ1_SHIFT,
109 + BCMA_MIPS_IPSFLAG_IRQ2_SHIFT,
110 + BCMA_MIPS_IPSFLAG_IRQ3_SHIFT,
111 + BCMA_MIPS_IPSFLAG_IRQ4_SHIFT,
112 +};
113 +
114 +static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
115 +{
116 + u32 flag;
117 +
118 + if (bcma_core_mips_bcm47162a0_quirk(dev))
119 + return dev->core_index;
120 + flag = bcma_aread32(dev, BCMA_MIPS_OOBSELOUTA30);
121 +
122 + return flag & 0x1F;
123 +}
124 +
125 +
126 +/* Get the MIPS IRQ assignment for a specified device.
127 + * If unassigned, 0 is returned.
128 + * If disabled, 5 is returned.
129 + */
130 +unsigned int bcma_core_mips_irq(struct bcma_device *dev)
131 +{
132 + struct bcma_device *mdev = dev->bus->drv_mips.core;
133 + u32 irqflag;
134 + unsigned int irq;
135 +
136 + irqflag = bcma_core_mips_irqflag(dev);
137 +
138 + for (irq = 1; irq <= 4; irq++)
139 + if (bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq)) &
140 + (1 << irqflag))
141 + return irq;
142 +
143 + return 0;
144 +}
145 +EXPORT_SYMBOL(bcma_core_mips_irq);
146 +
147 +static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
148 +{
149 + unsigned int oldirq = bcma_core_mips_irq(dev);
150 + struct bcma_bus *bus = dev->bus;
151 + struct bcma_device *mdev = bus->drv_mips.core;
152 + u32 irqflag;
153 +
154 + irqflag = bcma_core_mips_irqflag(dev);
155 + BUG_ON(oldirq == 6);
156 +
157 + dev->irq = irq + 2;
158 +
159 + /* clear the old irq */
160 + if (oldirq == 0)
161 + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
162 + bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) &
163 + ~(1 << irqflag));
164 + else
165 + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq), 0);
166 +
167 + /* assign the new one */
168 + if (irq == 0) {
169 + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0),
170 + bcma_read32(mdev, BCMA_MIPS_MIPS74K_INTMASK(0)) |
171 + (1 << irqflag));
172 + } else {
173 + u32 oldirqflag = bcma_read32(mdev,
174 + BCMA_MIPS_MIPS74K_INTMASK(irq));
175 + if (oldirqflag) {
176 + struct bcma_device *core;
177 +
178 + /* backplane irq line is in use, find out who uses
179 + * it and set user to irq 0
180 + */
181 + list_for_each_entry_reverse(core, &bus->cores, list) {
182 + if ((1 << bcma_core_mips_irqflag(core)) ==
183 + oldirqflag) {
184 + bcma_core_mips_set_irq(core, 0);
185 + break;
186 + }
187 + }
188 + }
189 + bcma_write32(mdev, BCMA_MIPS_MIPS74K_INTMASK(irq),
190 + 1 << irqflag);
191 + }
192 +
193 + pr_info("set_irq: core 0x%04x, irq %d => %d\n",
194 + dev->id.id, oldirq + 2, irq + 2);
195 +}
196 +
197 +static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
198 +{
199 + int i;
200 + static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"};
201 + printk(KERN_INFO KBUILD_MODNAME ": core 0x%04x, irq :", dev->id.id);
202 + for (i = 0; i <= 6; i++)
203 + printk(" %s%s", irq_name[i], i == irq ? "*" : " ");
204 + printk("\n");
205 +}
206 +
207 +static void bcma_core_mips_dump_irq(struct bcma_bus *bus)
208 +{
209 + struct bcma_device *core;
210 +
211 + list_for_each_entry_reverse(core, &bus->cores, list) {
212 + bcma_core_mips_print_irq(core, bcma_core_mips_irq(core));
213 + }
214 +}
215 +
216 +static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
217 +{
218 + struct bcma_bus *bus = mcore->core->bus;
219 +
220 + mcore->flash_buswidth = 2;
221 + if (bus->drv_cc.core) {
222 + mcore->flash_window = 0x1c000000;
223 + mcore->flash_window_size = 0x02000000;
224 + switch (bus->drv_cc.capabilities & BCMA_CC_CAP_FLASHT) {
225 + case BCMA_CC_FLASHT_STSER:
226 + case BCMA_CC_FLASHT_ATSER:
227 + pr_err("Serial flash not supported.\n");
228 + break;
229 + case BCMA_CC_FLASHT_PARA:
230 + if ((bcma_read32(bus->drv_cc.core, BCMA_CC_FLASH_CFG) &
231 + BCMA_CC_OTPS) == 0)
232 + mcore->flash_buswidth = 1;
233 + break;
234 + }
235 + } else {
236 + mcore->flash_window = 0x1fc00000;
237 + mcore->flash_window_size = 0x00400000;
238 + }
239 +}
240 +
241 +void bcma_core_mips_init(struct bcma_drv_mips *mcore)
242 +{
243 + struct bcma_bus *bus;
244 + struct bcma_device *core;
245 + bus = mcore->core->bus;
246 +
247 + pr_info("Initializing MIPS core...\n");
248 +
249 + if (!mcore->setup_done)
250 + mcore->assigned_irqs = 1;
251 +
252 + /* Assign IRQs to all cores on the bus */
253 + list_for_each_entry_reverse(core, &bus->cores, list) {
254 + int mips_irq;
255 + if (core->irq)
256 + continue;
257 +
258 + mips_irq = bcma_core_mips_irq(core);
259 + if (mips_irq > 4)
260 + core->irq = 0;
261 + else
262 + core->irq = mips_irq + 2;
263 + if (core->irq > 5)
264 + continue;
265 + switch (core->id.id) {
266 + case BCMA_CORE_PCI:
267 + case BCMA_CORE_PCIE:
268 + case BCMA_CORE_ETHERNET:
269 + case BCMA_CORE_ETHERNET_GBIT:
270 + case BCMA_CORE_MAC_GBIT:
271 + case BCMA_CORE_80211:
272 + case BCMA_CORE_USB20_HOST:
273 + /* These devices get their own IRQ line if available,
274 + * the rest goes on IRQ0
275 + */
276 + if (mcore->assigned_irqs <= 4)
277 + bcma_core_mips_set_irq(core,
278 + mcore->assigned_irqs++);
279 + break;
280 + }
281 + }
282 + pr_info("IRQ reconfiguration done\n");
283 + bcma_core_mips_dump_irq(bus);
284 +
285 + if (mcore->setup_done)
286 + return;
287 +
288 + bcma_core_mips_flash_detect(mcore);
289 + mcore->setup_done = true;
290 +}
291 --- a/drivers/bcma/main.c
292 +++ b/drivers/bcma/main.c
293 @@ -80,6 +80,7 @@ static int bcma_register_cores(struct bc
294 case BCMA_CORE_CHIPCOMMON:
295 case BCMA_CORE_PCI:
296 case BCMA_CORE_PCIE:
297 + case BCMA_CORE_MIPS_74K:
298 continue;
299 }
300
301 @@ -141,6 +142,15 @@ int bcma_bus_register(struct bcma_bus *b
302 bcma_core_chipcommon_init(&bus->drv_cc);
303 }
304
305 +#ifdef CONFIG_BCMA_DRIVER_MIPS
306 + /* Init MIPS core */
307 + core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
308 + if (core) {
309 + bus->drv_mips.core = core;
310 + bcma_core_mips_init(&bus->drv_mips);
311 + }
312 +#endif
313 +
314 /* Init PCIE core */
315 core = bcma_find_core(bus, BCMA_CORE_PCIE);
316 if (core) {
317 @@ -208,6 +218,15 @@ int __init bcma_bus_early_register(struc
318 bcma_core_chipcommon_init(&bus->drv_cc);
319 }
320
321 +#ifdef CONFIG_BCMA_DRIVER_MIPS
322 + /* Init MIPS core */
323 + core = bcma_find_core(bus, BCMA_CORE_MIPS_74K);
324 + if (core) {
325 + bus->drv_mips.core = core;
326 + bcma_core_mips_init(&bus->drv_mips);
327 + }
328 +#endif
329 +
330 pr_info("Early bus registered\n");
331
332 return 0;
333 --- a/include/linux/bcma/bcma.h
334 +++ b/include/linux/bcma/bcma.h
335 @@ -6,6 +6,7 @@
336
337 #include <linux/bcma/bcma_driver_chipcommon.h>
338 #include <linux/bcma/bcma_driver_pci.h>
339 +#include <linux/bcma/bcma_driver_mips.h>
340 #include <linux/ssb/ssb.h> /* SPROM sharing */
341
342 #include "bcma_regs.h"
343 @@ -193,6 +194,7 @@ struct bcma_bus {
344
345 struct bcma_drv_cc drv_cc;
346 struct bcma_drv_pci drv_pci;
347 + struct bcma_drv_mips drv_mips;
348
349 /* We decided to share SPROM struct with SSB as long as we do not need
350 * any hacks for BCMA. This simplifies drivers code. */
351 --- /dev/null
352 +++ b/include/linux/bcma/bcma_driver_mips.h
353 @@ -0,0 +1,49 @@
354 +#ifndef LINUX_BCMA_DRIVER_MIPS_H_
355 +#define LINUX_BCMA_DRIVER_MIPS_H_
356 +
357 +#define BCMA_MIPS_IPSFLAG 0x0F08
358 +/* which sbflags get routed to mips interrupt 1 */
359 +#define BCMA_MIPS_IPSFLAG_IRQ1 0x0000003F
360 +#define BCMA_MIPS_IPSFLAG_IRQ1_SHIFT 0
361 +/* which sbflags get routed to mips interrupt 2 */
362 +#define BCMA_MIPS_IPSFLAG_IRQ2 0x00003F00
363 +#define BCMA_MIPS_IPSFLAG_IRQ2_SHIFT 8
364 +/* which sbflags get routed to mips interrupt 3 */
365 +#define BCMA_MIPS_IPSFLAG_IRQ3 0x003F0000
366 +#define BCMA_MIPS_IPSFLAG_IRQ3_SHIFT 16
367 +/* which sbflags get routed to mips interrupt 4 */
368 +#define BCMA_MIPS_IPSFLAG_IRQ4 0x3F000000
369 +#define BCMA_MIPS_IPSFLAG_IRQ4_SHIFT 24
370 +
371 +/* MIPS 74K core registers */
372 +#define BCMA_MIPS_MIPS74K_CORECTL 0x0000
373 +#define BCMA_MIPS_MIPS74K_EXCEPTBASE 0x0004
374 +#define BCMA_MIPS_MIPS74K_BIST 0x000C
375 +#define BCMA_MIPS_MIPS74K_INTMASK_INT0 0x0014
376 +#define BCMA_MIPS_MIPS74K_INTMASK(int) \
377 + ((int) * 4 + BCMA_MIPS_MIPS74K_INTMASK_INT0)
378 +#define BCMA_MIPS_MIPS74K_NMIMASK 0x002C
379 +#define BCMA_MIPS_MIPS74K_GPIOSEL 0x0040
380 +#define BCMA_MIPS_MIPS74K_GPIOOUT 0x0044
381 +#define BCMA_MIPS_MIPS74K_GPIOEN 0x0048
382 +#define BCMA_MIPS_MIPS74K_CLKCTLST 0x01E0
383 +
384 +#define BCMA_MIPS_OOBSELOUTA30 0x100
385 +
386 +struct bcma_device;
387 +
388 +struct bcma_drv_mips {
389 + struct bcma_device *core;
390 + u8 setup_done:1;
391 + unsigned int assigned_irqs;
392 +
393 + u8 flash_buswidth;
394 + u32 flash_window;
395 + u32 flash_window_size;
396 +};
397 +
398 +extern void bcma_core_mips_init(struct bcma_drv_mips *mcore);
399 +
400 +extern unsigned int bcma_core_mips_irq(struct bcma_device *dev);
401 +
402 +#endif /* LINUX_BCMA_DRIVER_MIPS_H_ */
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