projects / openwrt.git / blob
? search:


685b8548a82919fbeb50f011f871e74e9e85ac53
[openwrt.git] / openwrt / target / linux / au1000-2.6 / patches / 003-zImage.patch
1 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S
2 --- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S 1970-01-01 01:00:00.000000000 +0100
3 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S 2006-05-04 23:08:18.000000000 +0200
4 @@ -0,0 +1,119 @@
5 +/*
6 + * arch/mips/kernel/head.S
7 + *
8 + * This file is subject to the terms and conditions of the GNU General Public
9 + * License. See the file "COPYING" in the main directory of this archive
10 + * for more details.
11 + *
12 + * Copyright (C) 1994, 1995 Waldorf Electronics
13 + * Written by Ralf Baechle and Andreas Busse
14 + * Copyright (C) 1995 - 1999 Ralf Baechle
15 + * Copyright (C) 1996 Paul M. Antoine
16 + * Modified for DECStation and hence R3000 support by Paul M. Antoine
17 + * Further modifications by David S. Miller and Harald Koerfgen
18 + * Copyright (C) 1999 Silicon Graphics, Inc.
19 + *
20 + * Head.S contains the MIPS exception handler and startup code.
21 + *
22 + **************************************************************************
23 + * 9 Nov, 2000.
24 + * Added Cache Error exception handler and SBDDP EJTAG debug exception.
25 + *
26 + * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
27 + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
28 + **************************************************************************
29 + */
30 +#include <linux/config.h>
31 +#include <linux/threads.h>
32 +
33 +#include <asm/asm.h>
34 +#include <asm/cacheops.h>
35 +#include <asm/mipsregs.h>
36 +#include <asm/cachectl.h>
37 +#include <asm/regdef.h>
38 +
39 +#define IndexInvalidate_I 0x00
40 +#define IndexWriteBack_D 0x01
41 +
42 + .set noreorder
43 + .cprestore
44 + LEAF(start)
45 +start:
46 + bal locate
47 + nop
48 +locate:
49 + subu s8, ra, 8 /* Where we were loaded */
50 + la sp, (.stack + 8192)
51 +
52 + move s0, a0 /* Save boot rom start args */
53 + move s1, a1
54 + move s2, a2
55 + move s3, a3
56 +
57 + la a0, start /* Where we were linked to run */
58 +
59 + move a1, s8
60 + la a2, _edata
61 + subu t1, a2, a0
62 + srl t1, t1, 2
63 +
64 + /* copy text section */
65 + li t0, 0
66 +1: lw v0, 0(a1)
67 + nop
68 + sw v0, 0(a0)
69 + xor t0, t0, v0
70 + addu a0, 4
71 + bne a2, a0, 1b
72 + addu a1, 4
73 +
74 + /* Clear BSS */
75 + la a0, _edata
76 + la a2, _end
77 +2: sw zero, 0(a0)
78 + bne a2, a0, 2b
79 + addu a0, 4
80 +
81 + /* push the D-Cache and invalidate I-Cache */
82 + li k0, 0x80000000 # start address
83 + li k1, 0x80004000 # end address (16KB I-Cache)
84 + subu k1, 128
85 +
86 +1:
87 + .set mips3
88 + cache IndexWriteBack_D, 0(k0)
89 + cache IndexWriteBack_D, 32(k0)
90 + cache IndexWriteBack_D, 64(k0)
91 + cache IndexWriteBack_D, 96(k0)
92 + cache IndexInvalidate_I, 0(k0)
93 + cache IndexInvalidate_I, 32(k0)
94 + cache IndexInvalidate_I, 64(k0)
95 + cache IndexInvalidate_I, 96(k0)
96 + .set mips0
97 +
98 + bne k0, k1, 1b
99 + addu k0, k0, 128
100 + /* done */
101 +
102 + move a0, s8 /* load address */
103 + move a1, t1 /* length in words */
104 + move a2, t0 /* checksum */
105 + move a3, sp
106 +
107 + la ra, 1f
108 + la k0, decompress_kernel
109 + jr k0
110 + nop
111 +1:
112 +
113 + move a0, s0
114 + move a1, s1
115 + move a2, s2
116 + move a3, s3
117 + li k0, KERNEL_ENTRY
118 + jr k0
119 + nop
120 +3:
121 + b 3b
122 + END(start)
123 + .comm .stack,4096*2,4
124 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile
125 --- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile 1970-01-01 01:00:00.000000000 +0100
126 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile 2006-05-04 23:08:18.000000000 +0200
127 @@ -0,0 +1,110 @@
128 +# arch/mips/boot/compressed/au1xxx/Makefile
129 +#
130 +# Makefile for AMD Alchemy Semiconductor Au1x based boards.
131 +# All of the boot loader code was derived from the ppc
132 +# boot code.
133 +#
134 +# Copyright 2001,2002 MontaVista Software Inc.
135 +#
136 +# Author: Mark A. Greer
137 +# mgreer@mvista.com
138 +#
139 +# Copyright 2004 Embedded Alley Solutions, Inc
140 +# Ported and modified for mips 2.6 support by
141 +# Pete Popov <ppopov@embeddedalley.com>
142 +#
143 +# This program is free software; you can redistribute it and/or modify it
144 +# under the terms of the GNU General Public License as published by the
145 +# Free Software Foundation; either version 2 of the License, or (at your
146 +# option) any later version.
147 +
148 +boot := arch/mips/boot
149 +compressed := $(boot)/compressed
150 +utils := $(compressed)/utils
151 +lib := $(compressed)/lib
152 +images := $(compressed)/images
153 +common := $(compressed)/common
154 +
155 +#########################################################################
156 +# START BOARD SPECIFIC VARIABLES
157 +
158 +# These two variables control where the zImage is stored
159 +# in flash and loaded in memory. It only controls how the srec
160 +# file is generated, the code is the same.
161 +RAM_RUN_ADDR = 0x81000000
162 +
163 +ifdef CONFIG_MIPS_XXS1500
164 +FLASH_LOAD_ADDR = 0xBF000000
165 +else
166 +FLASH_LOAD_ADDR = 0xBFD00000
167 +endif
168 +
169 +# These two variables specify the free ram region
170 +# that can be used for temporary malloc area
171 +AVAIL_RAM_START=0x80500000
172 +AVAIL_RAM_END=0x80900000
173 +
174 +# This one must match the LOADADDR in arch/mips/Makefile!
175 +LOADADDR=0x80100000
176 +
177 +# WARNING WARNING WARNING
178 +# Note that with a LOADADDR of 0x80100000 and AVAIL_RAM_START of
179 +# 0x80500000, the max decompressed kernel size can be 4MB. Else we
180 +# start overwriting ourselve. You can change these vars as needed;
181 +# it would be much better if we just figured everything out on the fly.
182 +
183 +# END BOARD SPECIFIC VARIABLES
184 +#########################################################################
185 +
186 +OBJECTS := $(obj)/head.o $(common)/misc-common.o $(common)/misc-simple.o \
187 + $(common)/au1k_uart.o
188 +LIBS := $(lib)/lib.a
189 +
190 +ENTRY := $(utils)/entry
191 +OFFSET := $(utils)/offset
192 +SIZE := $(utils)/size
193 +
194 +LD_ARGS := -T $(compressed)/ld.script -Ttext $(RAM_RUN_ADDR) -Bstatic
195 +
196 +ifdef CONFIG_CPU_LITTLE_ENDIAN
197 +OBJCOPY_ARGS = -O elf32-tradlittlemips
198 +else
199 +OBJCOPY_ARGS = -O elf32-tradbigmips
200 +endif
201 +
202 +$(obj)/head.o: $(obj)/head.S $(TOPDIR)/vmlinux
203 + $(CC) -I $(TOPDIR)/include $(AFLAGS) \
204 + -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \
205 + -c -o $*.o $<
206 +
207 +$(common)/misc-simple.o:
208 + $(CC) -I $(TOPDIR)/include $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \
209 + -DAVAIL_RAM_START=$(AVAIL_RAM_START) \
210 + -DAVAIL_RAM_END=$(AVAIL_RAM_END) \
211 + -DLOADADDR=$(LOADADDR) \
212 + -DZIMAGE_SIZE=0 -c -o $@ $*.c
213 +
214 +$(obj)/zvmlinux: $(OBJECTS) $(LIBS) $(srctree)/$(compressed)/ld.script $(images)/vmlinux.gz $(common)/dummy.o
215 + $(OBJCOPY) \
216 + --add-section=.image=$(images)/vmlinux.gz \
217 + --set-section-flags=.image=contents,alloc,load,readonly,data \
218 + $(common)/dummy.o $(common)/image.o
219 + $(LD) $(LD_ARGS) -o $@ $(OBJECTS) $(common)/image.o $(LIBS)
220 + $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R __kcrctab -R __ksymtab_strings \
221 + -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap
222 +
223 +# Here we manipulate the image in order to get it the necessary
224 +# srecord file we need.
225 +zImage: $(obj)/zvmlinux
226 + mv $(obj)/zvmlinux $(images)/zImage
227 + $(OBJCOPY) -O srec $(images)/zImage $(images)/zImage.srec
228 + $(OBJCOPY) -O binary $(images)/zImage $(images)/zImage.bin
229 +
230 +zImage.flash: zImage
231 + ( \
232 + flash=${FLASH_LOAD_ADDR} ; \
233 + ram=${RAM_RUN_ADDR} ; \
234 + adjust=$$[ $$flash - $$ram ] ; \
235 + $(OBJCOPY) -O srec --adjust-vma `printf '0x%08x' $$adjust` \
236 + $(images)/zImage $(images)/zImage.flash.srec ; \
237 + )
238 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c
239 --- linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c 1970-01-01 01:00:00.000000000 +0100
240 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c 2006-05-04 23:08:18.000000000 +0200
241 @@ -0,0 +1,103 @@
242 +/*
243 + * BRIEF MODULE DESCRIPTION
244 + * Simple Au1000 uart routines.
245 + *
246 + * Copyright 2001 MontaVista Software Inc.
247 + * Author: MontaVista Software, Inc.
248 + * ppopov@mvista.com or source@mvista.com
249 + *
250 + * This program is free software; you can redistribute it and/or modify it
251 + * under the terms of the GNU General Public License as published by the
252 + * Free Software Foundation; either version 2 of the License, or (at your
253 + * option) any later version.
254 + *
255 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
256 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
257 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
258 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
259 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
260 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
261 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
262 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
263 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
264 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
265 + *
266 + * You should have received a copy of the GNU General Public License along
267 + * with this program; if not, write to the Free Software Foundation, Inc.,
268 + * 675 Mass Ave, Cambridge, MA 02139, USA.
269 + */
270 +#include <linux/config.h>
271 +#include <asm/io.h>
272 +#include <asm/mach-au1x00/au1000.h>
273 +#include "ns16550.h"
274 +
275 +typedef unsigned char uint8;
276 +typedef unsigned int uint32;
277 +
278 +#define UART16550_BAUD_2400 2400
279 +#define UART16550_BAUD_4800 4800
280 +#define UART16550_BAUD_9600 9600
281 +#define UART16550_BAUD_19200 19200
282 +#define UART16550_BAUD_38400 38400
283 +#define UART16550_BAUD_57600 57600
284 +#define UART16550_BAUD_115200 115200
285 +
286 +#define UART16550_PARITY_NONE 0
287 +#define UART16550_PARITY_ODD 0x08
288 +#define UART16550_PARITY_EVEN 0x18
289 +#define UART16550_PARITY_MARK 0x28
290 +#define UART16550_PARITY_SPACE 0x38
291 +
292 +#define UART16550_DATA_5BIT 0x0
293 +#define UART16550_DATA_6BIT 0x1
294 +#define UART16550_DATA_7BIT 0x2
295 +#define UART16550_DATA_8BIT 0x3
296 +
297 +#define UART16550_STOP_1BIT 0x0
298 +#define UART16550_STOP_2BIT 0x4
299 +
300 +/* It would be nice if we had a better way to do this.
301 + * It could be a variable defined in one of the board specific files.
302 + */
303 +#undef UART_BASE
304 +#ifdef CONFIG_COGENT_CSB250
305 +#define UART_BASE UART3_ADDR
306 +#else
307 +#define UART_BASE UART0_ADDR
308 +#endif
309 +
310 +/* memory-mapped read/write of the port */
311 +#define UART16550_READ(y) (au_readl(UART_BASE + y) & 0xff)
312 +#define UART16550_WRITE(y,z) (au_writel(z&0xff, UART_BASE + y))
313 +
314 +/*
315 + * We use uart 0, which is already initialized by
316 + * yamon.
317 + */
318 +volatile struct NS16550 *
319 +serial_init(int chan)
320 +{
321 + volatile struct NS16550 *com_port;
322 + com_port = (struct NS16550 *) UART_BASE;
323 + return (com_port);
324 +}
325 +
326 +void
327 +serial_putc(volatile struct NS16550 *com_port, unsigned char c)
328 +{
329 + while ((UART16550_READ(UART_LSR)&0x40) == 0);
330 + UART16550_WRITE(UART_TX, c);
331 +}
332 +
333 +unsigned char
334 +serial_getc(volatile struct NS16550 *com_port)
335 +{
336 + while((UART16550_READ(UART_LSR) & 0x1) == 0);
337 + return UART16550_READ(UART_RX);
338 +}
339 +
340 +int
341 +serial_tstc(volatile struct NS16550 *com_port)
342 +{
343 + return((UART16550_READ(UART_LSR) & LSR_DR) != 0);
344 +}
345 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c
346 --- linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c 1970-01-01 01:00:00.000000000 +0100
347 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c 2006-05-04 23:08:18.000000000 +0200
348 @@ -0,0 +1,4 @@
349 +int main(void)
350 +{
351 + return 0;
352 +}
353 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile
354 --- linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile 1970-01-01 01:00:00.000000000 +0100
355 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile 2006-05-04 23:08:18.000000000 +0200
356 @@ -0,0 +1,14 @@
357 +#
358 +# arch/mips/boot/compressed/common/Makefile
359 +#
360 +# This file is subject to the terms and conditions of the GNU General Public
361 +# License. See the file "COPYING" in the main directory of this archive
362 +# for more details.
363 +#
364 +# Tom Rini January 2001
365 +#
366 +# Pete Popov, 2004
367 +#
368 +
369 +lib-y := misc-common.o no_initrd.o dummy.o
370 +lib-$(CONFIG_SOC_AU1X00) += au1k_uart.o
371 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c
372 --- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c 1970-01-01 01:00:00.000000000 +0100
373 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c 2006-05-04 23:08:18.000000000 +0200
374 @@ -0,0 +1,434 @@
375 +/*
376 + * arch/mips/boot/compressed/common/misc-common.c
377 + *
378 + * Misc. bootloader code (almost) all platforms can use
379 + *
380 + * Author: Johnnie Peters <jpeters@mvista.com>
381 + * Editor: Tom Rini <trini@mvista.com>
382 + *
383 + * Derived from arch/ppc/boot/prep/misc.c
384 + *
385 + * Ported by Pete Popov <ppopov@mvista.com> to
386 + * support mips board(s). I also got rid of the vga console
387 + * code.
388 + *
389 + * Copyright 2000-2001 MontaVista Software Inc.
390 + *
391 + * Ported to MIPS 2.6 by Pete Popov, <ppopov@embeddedalley.com>
392 + *
393 + * This program is free software; you can redistribute it and/or modify it
394 + * under the terms of the GNU General Public License as published by the
395 + * Free Software Foundation; either version 2 of the License, or (at your
396 + * option) any later version.
397 + *
398 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
399 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
400 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
401 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
402 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
403 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
404 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
405 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
406 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
407 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
408 + *
409 + * You should have received a copy of the GNU General Public License along
410 + * with this program; if not, write to the Free Software Foundation, Inc.,
411 + * 675 Mass Ave, Cambridge, MA 02139, USA.
412 + */
413 +
414 +#include <stdarg.h> /* for va_ bits */
415 +#include <linux/config.h>
416 +#include <linux/string.h>
417 +#include <linux/zlib.h>
418 +
419 +extern char *avail_ram;
420 +extern char *end_avail;
421 +extern char _end[];
422 +
423 +void puts(const char *);
424 +void putc(const char c);
425 +void puthex(unsigned long val);
426 +void _bcopy(char *src, char *dst, int len);
427 +void gunzip(void *, int, unsigned char *, int *);
428 +static int _cvt(unsigned long val, char *buf, long radix, char *digits);
429 +
430 +void _vprintk(void(*)(const char), const char *, va_list ap);
431 +
432 +struct NS16550 *com_port;
433 +
434 +int serial_tstc(volatile struct NS16550 *);
435 +unsigned char serial_getc(volatile struct NS16550 *);
436 +void serial_putc(volatile struct NS16550 *, unsigned char);
437 +
438 +void pause(void)
439 +{
440 + puts("pause\n");
441 +}
442 +
443 +void exit(void)
444 +{
445 + puts("exit\n");
446 + while(1);
447 +}
448 +
449 +int tstc(void)
450 +{
451 + return (serial_tstc(com_port));
452 +}
453 +
454 +int getc(void)
455 +{
456 + while (1) {
457 + if (serial_tstc(com_port))
458 + return (serial_getc(com_port));
459 + }
460 +}
461 +
462 +void
463 +putc(const char c)
464 +{
465 + serial_putc(com_port, c);
466 + if ( c == '\n' )
467 + serial_putc(com_port, '\r');
468 +}
469 +
470 +void puts(const char *s)
471 +{
472 + char c;
473 + while ( ( c = *s++ ) != '\0' ) {
474 + serial_putc(com_port, c);
475 + if ( c == '\n' ) serial_putc(com_port, '\r');
476 + }
477 +}
478 +
479 +void error(char *x)
480 +{
481 + puts("\n\n");
482 + puts(x);
483 + puts("\n\n -- System halted");
484 +
485 + while(1); /* Halt */
486 +}
487 +
488 +static void *zalloc(unsigned size)
489 +{
490 + void *p = avail_ram;
491 +
492 + size = (size + 7) & -8;
493 + avail_ram += size;
494 + if (avail_ram > end_avail) {
495 + puts("oops... out of memory\n");
496 + pause();
497 + }
498 + return p;
499 +}
500 +
501 +
502 +#define HEAD_CRC 2
503 +#define EXTRA_FIELD 4
504 +#define ORIG_NAME 8
505 +#define COMMENT 0x10
506 +#define RESERVED 0xe0
507 +
508 +#define DEFLATED 8
509 +
510 +void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
511 +{
512 + z_stream s;
513 + int r, i, flags;
514 +
515 + /* skip header */
516 + i = 10;
517 + flags = src[3];
518 + if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
519 + puts("bad gzipped data\n");
520 + exit();
521 + }
522 + if ((flags & EXTRA_FIELD) != 0)
523 + i = 12 + src[10] + (src[11] << 8);
524 + if ((flags & ORIG_NAME) != 0)
525 + while (src[i++] != 0)
526 + ;
527 + if ((flags & COMMENT) != 0)
528 + while (src[i++] != 0)
529 + ;
530 + if ((flags & HEAD_CRC) != 0)
531 + i += 2;
532 + if (i >= *lenp) {
533 + puts("gunzip: ran out of data in header\n");
534 + exit();
535 + }
536 +
537 + /* Initialize ourself. */
538 + s.workspace = zalloc(zlib_inflate_workspacesize());
539 + r = zlib_inflateInit2(&s, -MAX_WBITS);
540 + if (r != Z_OK) {
541 + puts("zlib_inflateInit2 returned "); puthex(r); puts("\n");
542 + exit();
543 + }
544 + s.next_in = src + i;
545 + s.avail_in = *lenp - i;
546 + s.next_out = dst;
547 + s.avail_out = dstlen;
548 + r = zlib_inflate(&s, Z_FINISH);
549 + if (r != Z_OK && r != Z_STREAM_END) {
550 + puts("inflate returned "); puthex(r); puts("\n");
551 + exit();
552 + }
553 + *lenp = s.next_out - (unsigned char *) dst;
554 + zlib_inflateEnd(&s);
555 +}
556 +
557 +void
558 +puthex(unsigned long val)
559 +{
560 +
561 + unsigned char buf[10];
562 + int i;
563 + for (i = 7; i >= 0; i--)
564 + {
565 + buf[i] = "0123456789ABCDEF"[val & 0x0F];
566 + val >>= 4;
567 + }
568 + buf[8] = '\0';
569 + puts(buf);
570 +}
571 +
572 +#define FALSE 0
573 +#define TRUE 1
574 +
575 +void
576 +_printk(char const *fmt, ...)
577 +{
578 + va_list ap;
579 +
580 + va_start(ap, fmt);
581 + _vprintk(putc, fmt, ap);
582 + va_end(ap);
583 + return;
584 +}
585 +
586 +#define is_digit(c) ((c >= '0') && (c <= '9'))
587 +
588 +void
589 +_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
590 +{
591 + char c, sign, *cp = 0;
592 + int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
593 + char buf[32];
594 + long val;
595 + while ((c = *fmt0++))
596 + {
597 + if (c == '%')
598 + {
599 + c = *fmt0++;
600 + left_prec = right_prec = pad_on_right = 0;
601 + if (c == '-')
602 + {
603 + c = *fmt0++;
604 + pad_on_right++;
605 + }
606 + if (c == '0')
607 + {
608 + zero_fill = TRUE;
609 + c = *fmt0++;
610 + } else
611 + {
612 + zero_fill = FALSE;
613 + }
614 + while (is_digit(c))
615 + {
616 + left_prec = (left_prec * 10) + (c - '0');
617 + c = *fmt0++;
618 + }
619 + if (c == '.')
620 + {
621 + c = *fmt0++;
622 + zero_fill++;
623 + while (is_digit(c))
624 + {
625 + right_prec = (right_prec * 10) + (c - '0');
626 + c = *fmt0++;
627 + }
628 + } else
629 + {
630 + right_prec = left_prec;
631 + }
632 + sign = '\0';
633 + switch (c)
634 + {
635 + case 'd':
636 + case 'x':
637 + case 'X':
638 + val = va_arg(ap, long);
639 + switch (c)
640 + {
641 + case 'd':
642 + if (val < 0)
643 + {
644 + sign = '-';
645 + val = -val;
646 + }
647 + length = _cvt(val, buf, 10, "0123456789");
648 + break;
649 + case 'x':
650 + length = _cvt(val, buf, 16, "0123456789abcdef");
651 + break;
652 + case 'X':
653 + length = _cvt(val, buf, 16, "0123456789ABCDEF");
654 + break;
655 + }
656 + cp = buf;
657 + break;
658 + case 's':
659 + cp = va_arg(ap, char *);
660 + length = strlen(cp);
661 + break;
662 + case 'c':
663 + c = va_arg(ap, long /*char*/);
664 + (*putc)(c);
665 + continue;
666 + default:
667 + (*putc)('?');
668 + }
669 + pad = left_prec - length;
670 + if (sign != '\0')
671 + {
672 + pad--;
673 + }
674 + if (zero_fill)
675 + {
676 + c = '0';
677 + if (sign != '\0')
678 + {
679 + (*putc)(sign);
680 + sign = '\0';
681 + }
682 + } else
683 + {
684 + c = ' ';
685 + }
686 + if (!pad_on_right)
687 + {
688 + while (pad-- > 0)
689 + {
690 + (*putc)(c);
691 + }
692 + }
693 + if (sign != '\0')
694 + {
695 + (*putc)(sign);
696 + }
697 + while (length-- > 0)
698 + {
699 + (*putc)(c = *cp++);
700 + if (c == '\n')
701 + {
702 + (*putc)('\r');
703 + }
704 + }
705 + if (pad_on_right)
706 + {
707 + while (pad-- > 0)
708 + {
709 + (*putc)(c);
710 + }
711 + }
712 + } else
713 + {
714 + (*putc)(c);
715 + if (c == '\n')
716 + {
717 + (*putc)('\r');
718 + }
719 + }
720 + }
721 +}
722 +
723 +int
724 +_cvt(unsigned long val, char *buf, long radix, char *digits)
725 +{
726 + char temp[80];
727 + char *cp = temp;
728 + int length = 0;
729 + if (val == 0)
730 + { /* Special case */
731 + *cp++ = '0';
732 + } else
733 + while (val)
734 + {
735 + *cp++ = digits[val % radix];
736 + val /= radix;
737 + }
738 + while (cp != temp)
739 + {
740 + *buf++ = *--cp;
741 + length++;
742 + }
743 + *buf = '\0';
744 + return (length);
745 +}
746 +
747 +void
748 +_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
749 +{
750 + int i, c;
751 + if ((unsigned int)s > (unsigned int)p)
752 + {
753 + s = (unsigned int)s - (unsigned int)p;
754 + }
755 + while (s > 0)
756 + {
757 + if (base)
758 + {
759 + _printk("%06X: ", (int)p - (int)base);
760 + } else
761 + {
762 + _printk("%06X: ", p);
763 + }
764 + for (i = 0; i < 16; i++)
765 + {
766 + if (i < s)
767 + {
768 + _printk("%02X", p[i] & 0xFF);
769 + } else
770 + {
771 + _printk(" ");
772 + }
773 + if ((i % 2) == 1) _printk(" ");
774 + if ((i % 8) == 7) _printk(" ");
775 + }
776 + _printk(" |");
777 + for (i = 0; i < 16; i++)
778 + {
779 + if (i < s)
780 + {
781 + c = p[i] & 0xFF;
782 + if ((c < 0x20) || (c >= 0x7F)) c = '.';
783 + } else
784 + {
785 + c = ' ';
786 + }
787 + _printk("%c", c);
788 + }
789 + _printk("|\n");
790 + s -= 16;
791 + p += 16;
792 + }
793 +}
794 +
795 +void
796 +_dump_buf(unsigned char *p, int s)
797 +{
798 + _printk("\n");
799 + _dump_buf_with_offset(p, s, 0);
800 +}
801 +
802 +/*
803 + * Local variables:
804 + * c-indent-level: 8
805 + * c-basic-offset: 8
806 + * tab-width: 8
807 + * End:
808 + */
809 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c
810 --- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c 1970-01-01 01:00:00.000000000 +0100
811 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c 2006-05-04 23:08:18.000000000 +0200
812 @@ -0,0 +1,122 @@
813 +/*
814 + * arch/mips/zboot/common/misc-simple.c
815 + *
816 + * Misc. bootloader code for many machines. This assumes you have are using
817 + * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory
818 + * below 8MB is free. Finally, it assumes you have a NS16550-style uart for
819 + * your serial console. If a machine meets these requirements, it can quite
820 + * likely use this code during boot.
821 + *
822 + * Author: Matt Porter <mporter@mvista.com>
823 + * Derived from arch/ppc/boot/prep/misc.c
824 + *
825 + * Copyright 2001 MontaVista Software Inc.
826 + *
827 + * This program is free software; you can redistribute it and/or modify it
828 + * under the terms of the GNU General Public License as published by the
829 + * Free Software Foundation; either version 2 of the License, or (at your
830 + * option) any later version.
831 + */
832 +
833 +#include <linux/types.h>
834 +#include <linux/elf.h>
835 +#include <linux/config.h>
836 +
837 +#include <asm/page.h>
838 +
839 +#include "linux/zlib.h"
840 +
841 +extern struct NS16550 *com_port;
842 +
843 +char *avail_ram;
844 +char *end_avail;
845 +extern char _end[];
846 +char *zimage_start;
847 +
848 +#ifdef CONFIG_CMDLINE
849 +#define CMDLINE CONFIG_CMDLINE
850 +#else
851 +#define CMDLINE ""
852 +#endif
853 +char cmd_preset[] = CMDLINE;
854 +char cmd_buf[256];
855 +char *cmd_line = cmd_buf;
856 +
857 +/* The linker tells us where the image is.
858 +*/
859 +extern unsigned char __image_begin, __image_end;
860 +extern unsigned char __ramdisk_begin, __ramdisk_end;
861 +unsigned long initrd_size;
862 +
863 +extern void puts(const char *);
864 +extern void putc(const char c);
865 +extern void puthex(unsigned long val);
866 +extern void *memcpy(void * __dest, __const void * __src,
867 + __kernel_size_t __n);
868 +extern void gunzip(void *, int, unsigned char *, int *);
869 +extern void udelay(long delay);
870 +extern int tstc(void);
871 +extern int getc(void);
872 +extern volatile struct NS16550 *serial_init(int chan);
873 +
874 +void
875 +decompress_kernel(unsigned long load_addr, int num_words,
876 + unsigned long cksum, unsigned long *sp)
877 +{
878 + extern unsigned long start;
879 + int zimage_size;
880 +
881 + com_port = (struct NS16550 *)serial_init(0);
882 +
883 + initrd_size = (unsigned long)(&__ramdisk_end) -
884 + (unsigned long)(&__ramdisk_begin);
885 +
886 + /*
887 + * Reveal where we were loaded at and where we
888 + * were relocated to.
889 + */
890 + puts("loaded at: "); puthex(load_addr);
891 + puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n");
892 + if ( (unsigned long)load_addr != (unsigned long)&start )
893 + {
894 + puts("relocated to: "); puthex((unsigned long)&start);
895 + puts(" ");
896 + puthex((unsigned long)((unsigned long)&start + (4*num_words)));
897 + puts("\n");
898 + }
899 +
900 + /*
901 + * We link ourself to an arbitrary low address. When we run, we
902 + * relocate outself to that address. __image_being points to
903 + * the part of the image where the zImage is. -- Tom
904 + */
905 + zimage_start = (char *)(unsigned long)(&__image_begin);
906 + zimage_size = (unsigned long)(&__image_end) -
907 + (unsigned long)(&__image_begin);
908 +
909 + /*
910 + * The zImage and initrd will be between start and _end, so they've
911 + * already been moved once. We're good to go now. -- Tom
912 + */
913 + puts("zimage at: "); puthex((unsigned long)zimage_start);
914 + puts(" "); puthex((unsigned long)(zimage_size+zimage_start));
915 + puts("\n");
916 +
917 + if ( initrd_size ) {
918 + puts("initrd at: ");
919 + puthex((unsigned long)(&__ramdisk_begin));
920 + puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");
921 + }
922 +
923 + /* assume the chunk below 8M is free */
924 + avail_ram = (char *)AVAIL_RAM_START;
925 + end_avail = (char *)AVAIL_RAM_END;
926 +
927 + /* Display standard Linux/MIPS boot prompt for kernel args */
928 + puts("Uncompressing Linux at load address ");
929 + puthex(LOADADDR);
930 + puts("\n");
931 + /* I don't like this hard coded gunzip size (fixme) */
932 + gunzip((void *)LOADADDR, 0x400000, zimage_start, &zimage_size);
933 + puts("Now booting the kernel\n");
934 +}
935 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c
936 --- linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c 1970-01-01 01:00:00.000000000 +0100
937 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c 2006-05-04 23:08:18.000000000 +0200
938 @@ -0,0 +1,2 @@
939 +char initrd_data[1];
940 +int initrd_len = 0;
941 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile
942 --- linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile 1970-01-01 01:00:00.000000000 +0100
943 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile 2006-05-04 23:08:18.000000000 +0200
944 @@ -0,0 +1,17 @@
945 +
946 +#
947 +# This dir holds all of the images for MIPS machines.
948 +# Tom Rini January 2001
949 +# Pete Popov 2004
950 +
951 +extra-y := vmlinux.bin vmlinux.gz
952 +
953 +OBJCOPYFLAGS_vmlinux.bin := -O binary
954 +$(obj)/vmlinux.bin: vmlinux FORCE
955 + $(call if_changed,objcopy)
956 +
957 +$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
958 + $(call if_changed,gzip)
959 +
960 +# Files generated that shall be removed upon make clean
961 +clean-files := vmlinux* zImage*
962 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h
963 --- linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h 1970-01-01 01:00:00.000000000 +0100
964 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h 2006-05-04 23:08:18.000000000 +0200
965 @@ -0,0 +1,18 @@
966 +/*
967 + * Copyright (C) Paul Mackerras 1997.
968 + *
969 + * This program is free software; you can redistribute it and/or
970 + * modify it under the terms of the GNU General Public License
971 + * as published by the Free Software Foundation; either version
972 + * 2 of the License, or (at your option) any later version.
973 + */
974 +typedef int FILE;
975 +extern FILE *stdin, *stdout;
976 +#define NULL ((void *)0)
977 +#define EOF (-1)
978 +#define fopen(n, m) NULL
979 +#define fflush(f) 0
980 +#define fclose(f) 0
981 +extern char *fgets();
982 +
983 +#define perror(s) printf("%s: no files!\n", (s))
984 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h
985 --- linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h 1970-01-01 01:00:00.000000000 +0100
986 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h 2006-05-04 23:08:18.000000000 +0200
987 @@ -0,0 +1,46 @@
988 +/*
989 + * NS16550 Serial Port
990 + */
991 +
992 +/*
993 + * Figure out which file will have the definitons of COMx
994 + */
995 +
996 +/* Some machines have their uart registers 16 bytes apart. Most don't.
997 + * TODO: Make this work like drivers/char/serial does - Tom */
998 +#if !defined(UART_REG_PAD)
999 +#define UART_REG_PAD(x)
1000 +#endif
1001 +
1002 +struct NS16550
1003 + {
1004 + unsigned char rbr; /* 0 */
1005 + UART_REG_PAD(rbr)
1006 + unsigned char ier; /* 1 */
1007 + UART_REG_PAD(ier)
1008 + unsigned char fcr; /* 2 */
1009 + UART_REG_PAD(fcr)
1010 + unsigned char lcr; /* 3 */
1011 + UART_REG_PAD(lcr)
1012 + unsigned char mcr; /* 4 */
1013 + UART_REG_PAD(mcr)
1014 + unsigned char lsr; /* 5 */
1015 + UART_REG_PAD(lsr)
1016 + unsigned char msr; /* 6 */
1017 + UART_REG_PAD(msr)
1018 + unsigned char scr; /* 7 */
1019 + };
1020 +
1021 +#define thr rbr
1022 +#define iir fcr
1023 +#define dll rbr
1024 +#define dlm ier
1025 +
1026 +#define LSR_DR 0x01 /* Data ready */
1027 +#define LSR_OE 0x02 /* Overrun */
1028 +#define LSR_PE 0x04 /* Parity error */
1029 +#define LSR_FE 0x08 /* Framing error */
1030 +#define LSR_BI 0x10 /* Break */
1031 +#define LSR_THRE 0x20 /* Xmit holding register empty */
1032 +#define LSR_TEMT 0x40 /* Xmitter empty */
1033 +#define LSR_ERR 0x80 /* Error */
1034 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h
1035 --- linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h 1970-01-01 01:00:00.000000000 +0100
1036 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h 2006-05-04 23:08:18.000000000 +0200
1037 @@ -0,0 +1,20 @@
1038 +/*
1039 + * arch/ppc/boot/include/sandpoint_serial.h
1040 + *
1041 + * Location of the COM ports on Motorola SPS Sandpoint machines
1042 + *
1043 + * Author: Mark A. Greer
1044 + * mgreer@mvista.com
1045 + *
1046 + * Copyright 2001 MontaVista Software Inc.
1047 + *
1048 + * This program is free software; you can redistribute it and/or modify it
1049 + * under the terms of the GNU General Public License as published by the
1050 + * Free Software Foundation; either version 2 of the License, or (at your
1051 + * option) any later version.
1052 + */
1053 +
1054 +#define COM1 0xfe0003f8
1055 +#define COM2 0xfe0002f8
1056 +#define COM3 0x00000000 /* No COM3 */
1057 +#define COM4 0x00000000 /* No COM4 */
1058 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/ld.script linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script
1059 --- linux-2.6.16.7/arch/mips/boot/compressed/ld.script 1970-01-01 01:00:00.000000000 +0100
1060 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script 2006-05-04 23:08:18.000000000 +0200
1061 @@ -0,0 +1,151 @@
1062 +OUTPUT_ARCH(mips)
1063 +ENTRY(start)
1064 +SECTIONS
1065 +{
1066 + /* Read-only sections, merged into text segment: */
1067 + /* . = 0x81000000; */
1068 + .init : { *(.init) } =0
1069 + .text :
1070 + {
1071 + _ftext = . ;
1072 + *(.text)
1073 + *(.rodata) *(.rodata.*)
1074 + *(.rodata1)
1075 + /* .gnu.warning sections are handled specially by elf32.em. */
1076 + *(.gnu.warning)
1077 + } =0
1078 + .kstrtab : { *(.kstrtab) }
1079 +
1080 + . = ALIGN(16); /* Exception table */
1081 + __start___ex_table = .;
1082 + __ex_table : { *(__ex_table) }
1083 + __stop___ex_table = .;
1084 +
1085 + __start___dbe_table = .; /* Exception table for data bus errors */
1086 + __dbe_table : { *(__dbe_table) }
1087 + __stop___dbe_table = .;
1088 +
1089 + __start___ksymtab = .; /* Kernel symbol table */
1090 + __ksymtab : { *(__ksymtab) }
1091 + __stop___ksymtab = .;
1092 +
1093 + _etext = .;
1094 +
1095 + . = ALIGN(8192);
1096 + .data.init_task : { *(.data.init_task) }
1097 +
1098 + /* Startup code */
1099 + . = ALIGN(4096);
1100 + __init_begin = .;
1101 + .text.init : { *(.text.init) }
1102 + .data.init : { *(.data.init) }
1103 + . = ALIGN(16);
1104 + __setup_start = .;
1105 + .setup.init : { *(.setup.init) }
1106 + __setup_end = .;
1107 + __initcall_start = .;
1108 + .initcall.init : { *(.initcall.init) }
1109 + __initcall_end = .;
1110 + . = ALIGN(4096); /* Align double page for init_task_union */
1111 + __init_end = .;
1112 +
1113 + . = ALIGN(4096);
1114 + .data.page_aligned : { *(.data.idt) }
1115 +
1116 + . = ALIGN(32);
1117 + .data.cacheline_aligned : { *(.data.cacheline_aligned) }
1118 +
1119 + .fini : { *(.fini) } =0
1120 + .reginfo : { *(.reginfo) }
1121 + /* Adjust the address for the data segment. We want to adjust up to
1122 + the same address within the page on the next page up. It would
1123 + be more correct to do this:
1124 + . = .;
1125 + The current expression does not correctly handle the case of a
1126 + text segment ending precisely at the end of a page; it causes the
1127 + data segment to skip a page. The above expression does not have
1128 + this problem, but it will currently (2/95) cause BFD to allocate
1129 + a single segment, combining both text and data, for this case.
1130 + This will prevent the text segment from being shared among
1131 + multiple executions of the program; I think that is more
1132 + important than losing a page of the virtual address space (note
1133 + that no actual memory is lost; the page which is skipped can not
1134 + be referenced). */
1135 + . = .;
1136 + .data :
1137 + {
1138 + _fdata = . ;
1139 + *(.data)
1140 +
1141 + /* Put the compressed image here, so bss is on the end. */
1142 + __image_begin = .;
1143 + *(.image)
1144 + __image_end = .;
1145 + /* Align the initial ramdisk image (INITRD) on page boundaries. */
1146 + . = ALIGN(4096);
1147 + __ramdisk_begin = .;
1148 + *(.initrd)
1149 + __ramdisk_end = .;
1150 + . = ALIGN(4096);
1151 +
1152 + CONSTRUCTORS
1153 + }
1154 + .data1 : { *(.data1) }
1155 + _gp = . + 0x8000;
1156 + .lit8 : { *(.lit8) }
1157 + .lit4 : { *(.lit4) }
1158 + .ctors : { *(.ctors) }
1159 + .dtors : { *(.dtors) }
1160 + .got : { *(.got.plt) *(.got) }
1161 + .dynamic : { *(.dynamic) }
1162 + /* We want the small data sections together, so single-instruction offsets
1163 + can access them all, and initialized data all before uninitialized, so
1164 + we can shorten the on-disk segment size. */
1165 + .sdata : { *(.sdata) }
1166 + . = ALIGN(4);
1167 + _edata = .;
1168 + PROVIDE (edata = .);
1169 +
1170 + __bss_start = .;
1171 + _fbss = .;
1172 + .sbss : { *(.sbss) *(.scommon) }
1173 + .bss :
1174 + {
1175 + *(.dynbss)
1176 + *(.bss)
1177 + *(COMMON)
1178 + . = ALIGN(4);
1179 + _end = . ;
1180 + PROVIDE (end = .);
1181 + }
1182 +
1183 + /* Sections to be discarded */
1184 + /DISCARD/ :
1185 + {
1186 + *(.text.exit)
1187 + *(.data.exit)
1188 + *(.exitcall.exit)
1189 + }
1190 +
1191 + /* This is the MIPS specific mdebug section. */
1192 + .mdebug : { *(.mdebug) }
1193 + /* These are needed for ELF backends which have not yet been
1194 + converted to the new style linker. */
1195 + .stab 0 : { *(.stab) }
1196 + .stabstr 0 : { *(.stabstr) }
1197 + /* DWARF debug sections.
1198 + Symbols in the .debug DWARF section are relative to the beginning of the
1199 + section so we begin .debug at 0. It's not clear yet what needs to happen
1200 + for the others. */
1201 + .debug 0 : { *(.debug) }
1202 + .debug_srcinfo 0 : { *(.debug_srcinfo) }
1203 + .debug_aranges 0 : { *(.debug_aranges) }
1204 + .debug_pubnames 0 : { *(.debug_pubnames) }
1205 + .debug_sfnames 0 : { *(.debug_sfnames) }
1206 + .line 0 : { *(.line) }
1207 + /* These must appear regardless of . */
1208 + .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
1209 + .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
1210 + .comment : { *(.comment) }
1211 + .note : { *(.note) }
1212 +}
1213 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile
1214 --- linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile 1970-01-01 01:00:00.000000000 +0100
1215 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile 2006-05-04 23:08:18.000000000 +0200
1216 @@ -0,0 +1,11 @@
1217 +
1218 +#
1219 +# Makefile for some libs needed by zImage.
1220 +#
1221 +
1222 +lib-y := $(addprefix ../../../../../lib/zlib_inflate/, \
1223 + infblock.o infcodes.o inffast.o inflate.o inftrees.o infutil.o) \
1224 + $(addprefix ../../../../../lib/, ctype.o string.o) \
1225 + $(addprefix ../../../../../arch/mips/lib/, memcpy.o) \
1226 +
1227 +
1228 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile
1229 --- linux-2.6.16.7/arch/mips/boot/compressed/Makefile 1970-01-01 01:00:00.000000000 +0100
1230 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile 2006-05-04 23:08:18.000000000 +0200
1231 @@ -0,0 +1,32 @@
1232 +
1233 +#
1234 +# arch/mips/boot/compressed/Makefile
1235 +#
1236 +# This file is subject to the terms and conditions of the GNU General Public
1237 +# License. See the file "COPYING" in the main directory of this archive
1238 +# for more details.
1239 +#
1240 +# Copyright (C) 1994 by Linus Torvalds
1241 +# Adapted for PowerPC by Gary Thomas
1242 +# modified by Cort (cort@cs.nmt.edu)
1243 +#
1244 +# Ported to MIPS by Pete Popov, ppopov@embeddedalley.com
1245 +#
1246 +
1247 +boot := arch/mips/boot
1248 +compressed := arch/mips/boot/compressed
1249 +
1250 +CFLAGS += -fno-builtin -D__BOOTER__ -I$(compressed)/include
1251 +
1252 +BOOT_TARGETS = zImage zImage.flash
1253 +
1254 +bootdir-$(CONFIG_SOC_AU1X00) := au1xxx
1255 +subdir-y := common lib images
1256 +
1257 +.PHONY: $(BOOT_TARGETS) $(bootdir-y)
1258 +
1259 +$(BOOT_TARGETS): $(bootdir-y)
1260 +
1261 +$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
1262 + $(addprefix $(obj)/,$(hostprogs-y))
1263 + $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
1264 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/entry linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry
1265 --- linux-2.6.16.7/arch/mips/boot/compressed/utils/entry 1970-01-01 01:00:00.000000000 +0100
1266 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry 2006-05-04 23:08:18.000000000 +0200
1267 @@ -0,0 +1,12 @@
1268 +#!/bin/sh
1269 +
1270 +# grab the kernel_entry address from the vmlinux elf image
1271 +entry=`$1 $2 | grep kernel_entry`
1272 +
1273 +fs=`echo $entry | grep ffffffff` # check toolchain output
1274 +
1275 +if [ -n "$fs" ]; then
1276 + echo "0x"`$1 $2 | grep kernel_entry | cut -c9- | awk '{print $1}'`
1277 +else
1278 + echo "0x"`$1 $2 | grep kernel_entry | cut -c1- | awk '{print $1}'`
1279 +fi
1280 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/offset linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset
1281 --- linux-2.6.16.7/arch/mips/boot/compressed/utils/offset 1970-01-01 01:00:00.000000000 +0100
1282 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset 2006-05-04 23:08:18.000000000 +0200
1283 @@ -0,0 +1,3 @@
1284 +#!/bin/sh
1285 +
1286 +echo "0x"`$1 -h $2 | grep $3 | grep -v zvmlinux| awk '{print $6}'`
1287 diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/size linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size
1288 --- linux-2.6.16.7/arch/mips/boot/compressed/utils/size 1970-01-01 01:00:00.000000000 +0100
1289 +++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size 2006-05-04 23:08:18.000000000 +0200
1290 @@ -0,0 +1,4 @@
1291 +#!/bin/sh
1292 +
1293 +OFFSET=`$1 -h $2 | grep $3 | grep -v zvmlinux | awk '{print $3}'`
1294 +echo "0x"$OFFSET
1295 diff -urN linux-2.6.16.7/arch/mips/boot/Makefile linux-2.6.16.7.new/arch/mips/boot/Makefile
1296 --- linux-2.6.16.7/arch/mips/boot/Makefile 2006-04-17 23:53:25.000000000 +0200
1297 +++ linux-2.6.16.7.new/arch/mips/boot/Makefile 2006-05-04 23:08:18.000000000 +0200
1298 @@ -16,6 +16,7 @@
1299 E2EFLAGS =
1300 endif
1301
1302 +
1303 #
1304 # Drop some uninteresting sections in the kernel.
1305 # This is only relevant for ELF kernels but doesn't hurt a.out
1306 @@ -25,7 +26,10 @@
1307
1308 VMLINUX = vmlinux
1309
1310 -all: vmlinux.ecoff vmlinux.srec addinitrd
1311 +ZBOOT_TARGETS = zImage zImage.flash
1312 +bootdir-y := compressed
1313 +
1314 +all: vmlinux.ecoff vmlinux.srec addinitrd zImage
1315
1316 vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
1317 $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
1318 @@ -51,3 +55,11 @@
1319 vmlinux.bin \
1320 vmlinux.ecoff \
1321 vmlinux.srec
1322 +
1323 +.PHONY: $(ZBOOT_TARGETS) $(bootdir-y)
1324 +
1325 +$(ZBOOT_TARGETS): $(bootdir-y)
1326 +
1327 +$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
1328 + $(addprefix $(obj)/,$(hostprogs-y))
1329 + $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
1330 diff -urN linux-2.6.16.7/arch/mips/boot/Makefile.orig linux-2.6.16.7.new/arch/mips/boot/Makefile.orig
1331 --- linux-2.6.16.7/arch/mips/boot/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
1332 +++ linux-2.6.16.7.new/arch/mips/boot/Makefile.orig 2006-05-04 23:08:18.000000000 +0200
1333 @@ -0,0 +1,53 @@
1334 +#
1335 +# This file is subject to the terms and conditions of the GNU General Public
1336 +# License. See the file "COPYING" in the main directory of this archive
1337 +# for more details.
1338 +#
1339 +# Copyright (C) 1995, 1998, 2001, 2002 by Ralf Baechle
1340 +# Copyright (C) 2004 Maciej W. Rozycki
1341 +#
1342 +
1343 +#
1344 +# Some DECstations need all possible sections of an ECOFF executable
1345 +#
1346 +ifdef CONFIG_MACH_DECSTATION
1347 + E2EFLAGS = -a
1348 +else
1349 + E2EFLAGS =
1350 +endif
1351 +
1352 +#
1353 +# Drop some uninteresting sections in the kernel.
1354 +# This is only relevant for ELF kernels but doesn't hurt a.out
1355 +#
1356 +drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options
1357 +strip-flags = $(addprefix --remove-section=,$(drop-sections))
1358 +
1359 +VMLINUX = vmlinux
1360 +
1361 +all: vmlinux.ecoff vmlinux.srec addinitrd
1362 +
1363 +vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX)
1364 + $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS)
1365 +
1366 +$(obj)/elf2ecoff: $(obj)/elf2ecoff.c
1367 + $(HOSTCC) -o $@ $^
1368 +
1369 +vmlinux.bin: $(VMLINUX)
1370 + $(OBJCOPY) -O binary $(strip-flags) $(VMLINUX) $(obj)/vmlinux.bin
1371 +
1372 +vmlinux.srec: $(VMLINUX)
1373 + $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec
1374 +
1375 +$(obj)/addinitrd: $(obj)/addinitrd.c
1376 + $(HOSTCC) -o $@ $^
1377 +
1378 +archhelp:
1379 + @echo '* vmlinux.ecoff - ECOFF boot image'
1380 + @echo '* vmlinux.srec - SREC boot image'
1381 +
1382 +clean-files += addinitrd \
1383 + elf2ecoff \
1384 + vmlinux.bin \
1385 + vmlinux.ecoff \
1386 + vmlinux.srec
1387 diff -urN linux-2.6.16.7/arch/mips/Makefile linux-2.6.16.7.new/arch/mips/Makefile
1388 --- linux-2.6.16.7/arch/mips/Makefile 2006-04-17 23:53:25.000000000 +0200
1389 +++ linux-2.6.16.7.new/arch/mips/Makefile 2006-05-04 23:09:44.000000000 +0200
1390 @@ -831,6 +831,10 @@
1391 all: vmlinux.ecoff
1392 endif
1393
1394 +ifdef CONFIG_MIPS_MTX1
1395 +all: vmlinux.srec zImage zImage.flash
1396 +endif
1397 +
1398 vmlinux.bin: $(vmlinux-32)
1399 +@$(call makeboot,$@)
1400
1401 @@ -840,6 +844,12 @@
1402 vmlinux.srec: $(vmlinux-32)
1403 +@$(call makeboot,$@)
1404
1405 +zImage: vmlinux
1406 + +@$(call makeboot,$@)
1407 +
1408 +zImage.flash: vmlinux
1409 + +@$(call makeboot,$@)
1410 +
1411 CLEAN_FILES += vmlinux.ecoff \
1412 vmlinux.srec \
1413 vmlinux.rm200.tmp \
1414 @@ -848,6 +858,7 @@
1415 archclean:
1416 @$(MAKE) $(clean)=arch/mips/boot
1417 @$(MAKE) $(clean)=arch/mips/lasat
1418 + @$(MAKE) $(clean)=arch/mips/boot/compressed
1419
1420 CLEAN_FILES += vmlinux.32 \
1421 vmlinux.64 \
1422 diff -urN linux-2.6.16.7/arch/mips/Makefile.orig linux-2.6.16.7.new/arch/mips/Makefile.orig
1423 --- linux-2.6.16.7/arch/mips/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
1424 +++ linux-2.6.16.7.new/arch/mips/Makefile.orig 2006-05-04 23:09:55.000000000 +0200
1425 @@ -0,0 +1,862 @@
1426 +#
1427 +# This file is subject to the terms and conditions of the GNU General Public
1428 +# License. See the file "COPYING" in the main directory of this archive
1429 +# for more details.
1430 +#
1431 +# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle
1432 +# DECStation modifications by Paul M. Antoine, 1996
1433 +# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki
1434 +#
1435 +# This file is included by the global makefile so that you can add your own
1436 +# architecture-specific flags and dependencies. Remember to do have actions
1437 +# for "archclean" cleaning up for this architecture.
1438 +#
1439 +
1440 +as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \
1441 + -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \
1442 + else echo "$(2)"; fi ;)
1443 +
1444 +cflags-y :=
1445 +
1446 +#
1447 +# Select the object file format to substitute into the linker script.
1448 +#
1449 +ifdef CONFIG_CPU_LITTLE_ENDIAN
1450 +32bit-tool-prefix = mipsel-linux-
1451 +64bit-tool-prefix = mips64el-linux-
1452 +32bit-bfd = elf32-tradlittlemips
1453 +64bit-bfd = elf64-tradlittlemips
1454 +32bit-emul = elf32ltsmip
1455 +64bit-emul = elf64ltsmip
1456 +else
1457 +32bit-tool-prefix = mips-linux-
1458 +64bit-tool-prefix = mips64-linux-
1459 +32bit-bfd = elf32-tradbigmips
1460 +64bit-bfd = elf64-tradbigmips
1461 +32bit-emul = elf32btsmip
1462 +64bit-emul = elf64btsmip
1463 +endif
1464 +
1465 +ifdef CONFIG_32BIT
1466 +gcc-abi = 32
1467 +tool-prefix = $(32bit-tool-prefix)
1468 +UTS_MACHINE := mips
1469 +endif
1470 +ifdef CONFIG_64BIT
1471 +gcc-abi = 64
1472 +tool-prefix = $(64bit-tool-prefix)
1473 +UTS_MACHINE := mips64
1474 +endif
1475 +
1476 +ifdef CONFIG_CROSSCOMPILE
1477 +CROSS_COMPILE := $(tool-prefix)
1478 +endif
1479 +
1480 +CHECKFLAGS-y += -D__linux__ -D__mips__ \
1481 + -D_MIPS_SZINT=32 \
1482 + -D_ABIO32=1 \
1483 + -D_ABIN32=2 \
1484 + -D_ABI64=3
1485 +CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \
1486 + -D_MIPS_SZLONG=32 \
1487 + -D_MIPS_SZPTR=32 \
1488 + -D__PTRDIFF_TYPE__=int
1489 +CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \
1490 + -D_MIPS_SZLONG=64 \
1491 + -D_MIPS_SZPTR=64 \
1492 + -D__PTRDIFF_TYPE__="long int"
1493 +CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__
1494 +CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__
1495 +
1496 +CHECKFLAGS = $(CHECKFLAGS-y)
1497 +
1498 +ifdef CONFIG_BUILD_ELF64
1499 +gas-abi = 64
1500 +ld-emul = $(64bit-emul)
1501 +vmlinux-32 = vmlinux.32
1502 +vmlinux-64 = vmlinux
1503 +else
1504 +gas-abi = 32
1505 +ld-emul = $(32bit-emul)
1506 +vmlinux-32 = vmlinux
1507 +vmlinux-64 = vmlinux.64
1508 +
1509 +cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs)
1510 +endif
1511 +
1512 +#
1513 +# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel
1514 +# code since it only slows down the whole thing. At some point we might make
1515 +# use of global pointer optimizations but their use of $28 conflicts with
1516 +# the current pointer optimization.
1517 +#
1518 +# The DECStation requires an ECOFF kernel for remote booting, other MIPS
1519 +# machines may also. Since BFD is incredibly buggy with respect to
1520 +# crossformat linking we rely on the elf2ecoff tool for format conversion.
1521 +#
1522 +cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
1523 +cflags-y += -msoft-float
1524 +LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
1525 +MODFLAGS += -mlong-calls
1526 +
1527 +#
1528 +# We explicitly add the endianness specifier if needed, this allows
1529 +# to compile kernels with a toolchain for the other endianness. We
1530 +# carefully avoid to add it redundantly because gcc 3.3/3.4 complains
1531 +# when fed the toolchain default!
1532 +#
1533 +cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB)
1534 +cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL)
1535 +
1536 +cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
1537 + -fno-omit-frame-pointer
1538 +
1539 +#
1540 +# Use: $(call set_gccflags,<cpu0>,<isa0>,<cpu1>,<isa1>,<isa2>)
1541 +#
1542 +# <cpu0>,<isa0> -- preferred CPU and ISA designations (may require
1543 +# recent tools)
1544 +# <cpu1>,<isa1> -- fallback CPU and ISA designations (have to work
1545 +# with up to the oldest supported tools)
1546 +# <isa2> -- an ISA designation used as an ABI selector for
1547 +# gcc versions that do not support "-mabi=32"
1548 +# (depending on the CPU type, either "mips1" or
1549 +# "mips2")
1550 +#
1551 +set_gccflags = $(shell \
1552 +while :; do \
1553 + cpu=$(1); isa=-$(2); \
1554 + for gcc_opt in -march= -mcpu=; do \
1555 + $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
1556 + -xc /dev/null > /dev/null 2>&1 && \
1557 + break 2; \
1558 + done; \
1559 + cpu=$(3); isa=-$(4); \
1560 + for gcc_opt in -march= -mcpu=; do \
1561 + $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \
1562 + -xc /dev/null > /dev/null 2>&1 && \
1563 + break 2; \
1564 + done; \
1565 + break; \
1566 +done; \
1567 +gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \
1568 +if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \
1569 + gcc_isa=$$isa; \
1570 +else \
1571 + gcc_abi=; gcc_isa=-$(5); \
1572 +fi; \
1573 +gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \
1574 +while :; do \
1575 + for gas_opt in -Wa,-march= -Wa,-mcpu=; do \
1576 + $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \
1577 + -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \
1578 + break 2; \
1579 + done; \
1580 + gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \
1581 + break; \
1582 +done; \
1583 +if test "$(gcc-abi)" != "$(gas-abi)"; then \
1584 + gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \
1585 +fi; \
1586 +if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \
1587 + $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \
1588 + -xc /dev/null > /dev/null 2>&1 && \
1589 + gcc_isa=; \
1590 +fi; \
1591 +echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa)
1592 +
1593 +#
1594 +# CPU-dependent compiler/assembler options for optimization.
1595 +#
1596 +cflags-$(CONFIG_CPU_R3000) += \
1597 + $(call set_gccflags,r3000,mips1,r3000,mips1,mips1)
1598 +CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
1599 +
1600 +cflags-$(CONFIG_CPU_TX39XX) += \
1601 + $(call set_gccflags,r3900,mips1,r3000,mips1,mips1)
1602 +CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1
1603 +
1604 +cflags-$(CONFIG_CPU_R6000) += \
1605 + $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \
1606 + -Wa,--trap
1607 +CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2
1608 +
1609 +cflags-$(CONFIG_CPU_R4300) += \
1610 + $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \
1611 + -Wa,--trap
1612 +CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1613 +
1614 +cflags-$(CONFIG_CPU_VR41XX) += \
1615 + $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \
1616 + -Wa,--trap
1617 +CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1618 +
1619 +cflags-$(CONFIG_CPU_R4X00) += \
1620 + $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
1621 + -Wa,--trap
1622 +CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1623 +
1624 +cflags-$(CONFIG_CPU_TX49XX) += \
1625 + $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \
1626 + -Wa,--trap
1627 +CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3
1628 +
1629 +cflags-$(CONFIG_CPU_MIPS32_R1) += \
1630 + $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \
1631 + -Wa,--trap
1632 +CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
1633 +
1634 +cflags-$(CONFIG_CPU_MIPS32_R2) += \
1635 + $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \
1636 + -Wa,--trap
1637 +CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32
1638 +
1639 +cflags-$(CONFIG_CPU_MIPS64_R1) += \
1640 + $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \
1641 + -Wa,--trap
1642 +CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
1643 +
1644 +cflags-$(CONFIG_CPU_MIPS64_R2) += \
1645 + $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \
1646 + -Wa,--trap
1647 +CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
1648 +
1649 +cflags-$(CONFIG_CPU_R5000) += \
1650 + $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \
1651 + -Wa,--trap
1652 +CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1653 +
1654 +cflags-$(CONFIG_CPU_R5432) += \
1655 + $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \
1656 + -Wa,--trap
1657 +CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1658 +
1659 +cflags-$(CONFIG_CPU_NEVADA) += \
1660 + $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \
1661 + -Wa,--trap
1662 +CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1663 +
1664 +cflags-$(CONFIG_CPU_RM7000) += \
1665 + $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \
1666 + -Wa,--trap
1667 +CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1668 +
1669 +cflags-$(CONFIG_CPU_RM9000) += \
1670 + $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \
1671 + -Wa,--trap
1672 +CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1673 +
1674 +
1675 +cflags-$(CONFIG_CPU_SB1) += \
1676 + $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \
1677 + -Wa,--trap
1678 +CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64
1679 +
1680 +cflags-$(CONFIG_CPU_R8000) += \
1681 + $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \
1682 + -Wa,--trap
1683 +CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1684 +
1685 +cflags-$(CONFIG_CPU_R10000) += \
1686 + $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \
1687 + -Wa,--trap
1688 +CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4
1689 +
1690 +ifdef CONFIG_CPU_SB1
1691 +ifdef CONFIG_SB1_PASS_1_WORKAROUNDS
1692 +MODFLAGS += -msb1-pass1-workarounds
1693 +endif
1694 +endif
1695 +
1696 +#
1697 +# Firmware support
1698 +#
1699 +libs-$(CONFIG_ARC) += arch/mips/arc/
1700 +libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/
1701 +
1702 +#
1703 +# Board-dependent options and extra files
1704 +#
1705 +
1706 +#
1707 +# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
1708 +#
1709 +core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
1710 +cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz
1711 +load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
1712 +
1713 +#
1714 +# Common Alchemy Au1x00 stuff
1715 +#
1716 +core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/
1717 +cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00
1718 +
1719 +#
1720 +# AMD Alchemy Pb1000 eval board
1721 +#
1722 +libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/
1723 +cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00
1724 +load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000
1725 +
1726 +#
1727 +# AMD Alchemy Pb1100 eval board
1728 +#
1729 +libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/
1730 +cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00
1731 +load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000
1732 +
1733 +#
1734 +# AMD Alchemy Pb1500 eval board
1735 +#
1736 +libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/
1737 +cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00
1738 +load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000
1739 +
1740 +#
1741 +# AMD Alchemy Pb1550 eval board
1742 +#
1743 +libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/
1744 +cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00
1745 +load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000
1746 +
1747 +#
1748 +# AMD Alchemy Pb1200 eval board
1749 +#
1750 +libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/
1751 +cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00
1752 +load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000
1753 +
1754 +#
1755 +# AMD Alchemy Db1000 eval board
1756 +#
1757 +libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/
1758 +cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00
1759 +load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000
1760 +
1761 +#
1762 +# AMD Alchemy Db1100 eval board
1763 +#
1764 +libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/
1765 +cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00
1766 +load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000
1767 +
1768 +#
1769 +# AMD Alchemy Db1500 eval board
1770 +#
1771 +libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/
1772 +cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00
1773 +load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000
1774 +
1775 +#
1776 +# AMD Alchemy Db1550 eval board
1777 +#
1778 +libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/
1779 +cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00
1780 +load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000
1781 +
1782 +#
1783 +# AMD Alchemy Db1200 eval board
1784 +#
1785 +libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/
1786 +cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00
1787 +load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000
1788 +
1789 +#
1790 +# AMD Alchemy Bosporus eval board
1791 +#
1792 +libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/
1793 +cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00
1794 +load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000
1795 +
1796 +#
1797 +# AMD Alchemy Mirage eval board
1798 +#
1799 +libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/
1800 +cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00
1801 +load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000
1802 +
1803 +#
1804 +# 4G-Systems eval board
1805 +#
1806 +libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/
1807 +load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000
1808 +
1809 +#
1810 +# MyCable eval board
1811 +#
1812 +libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/
1813 +load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000
1814 +
1815 +#
1816 +# Cobalt Server
1817 +#
1818 +core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/
1819 +cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt
1820 +load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000
1821 +
1822 +#
1823 +# DECstation family
1824 +#
1825 +core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/
1826 +cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec
1827 +libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/
1828 +load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000
1829 +CLEAN_FILES += drivers/tc/lk201-map.c
1830 +
1831 +#
1832 +# Galileo EV64120 Board
1833 +#
1834 +core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/
1835 +core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/
1836 +cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120
1837 +load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000
1838 +
1839 +#
1840 +# Galileo EV96100 Board
1841 +#
1842 +core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/
1843 +cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100
1844 +load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000
1845 +
1846 +#
1847 +# Globespan IVR eval board with QED 5231 CPU
1848 +#
1849 +core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
1850 +core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
1851 +load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
1852 +
1853 +#
1854 +# ITE 8172 eval board with QED 5231 CPU
1855 +#
1856 +core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
1857 +load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
1858 +
1859 +#
1860 +# For all MIPS, Inc. eval boards
1861 +#
1862 +core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
1863 +
1864 +#
1865 +# MIPS Atlas board
1866 +#
1867 +core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
1868 +cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
1869 +cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
1870 +load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
1871 +
1872 +#
1873 +# MIPS Malta board
1874 +#
1875 +core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
1876 +cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
1877 +load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
1878 +
1879 +#
1880 +# MIPS SEAD board
1881 +#
1882 +core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
1883 +load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
1884 +
1885 +#
1886 +# MIPS SIM
1887 +#
1888 +core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/
1889 +cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim
1890 +load-$(CONFIG_MIPS_SIM) += 0x80100000
1891 +
1892 +#
1893 +# Momentum Ocelot board
1894 +#
1895 +# The Ocelot setup.o must be linked early - it does the ioremap() for the
1896 +# mips_io_port_base.
1897 +#
1898 +core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \
1899 + arch/mips/gt64120/momenco_ocelot/
1900 +cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot
1901 +load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000
1902 +
1903 +#
1904 +# Momentum Ocelot-G board
1905 +#
1906 +# The Ocelot-G setup.o must be linked early - it does the ioremap() for the
1907 +# mips_io_port_base.
1908 +#
1909 +core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/
1910 +load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000
1911 +
1912 +#
1913 +# Momentum Ocelot-C and -CS boards
1914 +#
1915 +# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the
1916 +# mips_io_port_base.
1917 +core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/
1918 +load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000
1919 +
1920 +#
1921 +# PMC-Sierra Yosemite
1922 +#
1923 +core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/
1924 +cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite
1925 +load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000
1926 +
1927 +# Qemu simulating MIPS32 4Kc
1928 +#
1929 +core-$(CONFIG_QEMU) += arch/mips/qemu/
1930 +cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu
1931 +load-$(CONFIG_QEMU) += 0xffffffff80010000
1932 +
1933 +#
1934 +# Momentum Ocelot-3
1935 +#
1936 +core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/
1937 +cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3
1938 +load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000
1939 +
1940 +#
1941 +# Momentum Jaguar ATX
1942 +#
1943 +core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/
1944 +cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja
1945 +#ifdef CONFIG_JAGUAR_DMALOW
1946 +#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000
1947 +#else
1948 +load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000
1949 +#endif
1950 +
1951 +#
1952 +# NEC DDB
1953 +#
1954 +core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/
1955 +
1956 +#
1957 +# NEC DDB Vrc-5074
1958 +#
1959 +core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/
1960 +load-$(CONFIG_DDB5074) += 0xffffffff80080000
1961 +
1962 +#
1963 +# NEC DDB Vrc-5476
1964 +#
1965 +core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/
1966 +load-$(CONFIG_DDB5476) += 0xffffffff80080000
1967 +
1968 +#
1969 +# NEC DDB Vrc-5477
1970 +#
1971 +core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/
1972 +load-$(CONFIG_DDB5477) += 0xffffffff80100000
1973 +
1974 +core-$(CONFIG_LASAT) += arch/mips/lasat/
1975 +cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
1976 +load-$(CONFIG_LASAT) += 0xffffffff80000000
1977 +
1978 +#
1979 +# Common VR41xx
1980 +#
1981 +core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
1982 +cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
1983 +
1984 +#
1985 +# NEC VR4133
1986 +#
1987 +core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
1988 +load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
1989 +
1990 +#
1991 +# ZAO Networks Capcella (VR4131)
1992 +#
1993 +load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
1994 +
1995 +#
1996 +# Victor MP-C303/304 (VR4122)
1997 +#
1998 +load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000
1999 +
2000 +#
2001 +# IBM WorkPad z50 (VR4121)
2002 +#
2003 +core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/
2004 +load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000
2005 +
2006 +#
2007 +# CASIO CASSIPEIA E-55/65 (VR4111)
2008 +#
2009 +core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/
2010 +load-$(CONFIG_CASIO_E55) += 0xffffffff80004000
2011 +
2012 +#
2013 +# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131)
2014 +#
2015 +load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000
2016 +
2017 +#
2018 +# Common Philips PNX8550
2019 +#
2020 +core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/
2021 +cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550
2022 +
2023 +#
2024 +# Philips PNX8550 JBS board
2025 +#
2026 +libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/
2027 +#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550
2028 +load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
2029 +
2030 +#
2031 +# SGI IP22 (Indy/Indigo2)
2032 +#
2033 +# Set the load address to >= 0xffffffff88069000 if you want to leave space for
2034 +# symmon, 0xffffffff80002000 for production kernels. Note that the value must
2035 +# be aligned to a multiple of the kernel stack size or the handling of the
2036 +# current variable will break so for 64-bit kernels we have to raise the start
2037 +# address by 8kb.
2038 +#
2039 +core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/
2040 +cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22
2041 +ifdef CONFIG_32BIT
2042 +load-$(CONFIG_SGI_IP22) += 0xffffffff88002000
2043 +endif
2044 +ifdef CONFIG_64BIT
2045 +load-$(CONFIG_SGI_IP22) += 0xffffffff88004000
2046 +endif
2047 +
2048 +#
2049 +# SGI-IP27 (Origin200/2000)
2050 +#
2051 +# Set the load address to >= 0xc000000000300000 if you want to leave space for
2052 +# symmon, 0xc00000000001c000 for production kernels. Note that the value must
2053 +# be 16kb aligned or the handling of the current variable will break.
2054 +#
2055 +ifdef CONFIG_SGI_IP27
2056 +core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/
2057 +cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27
2058 +ifdef CONFIG_BUILD_ELF64
2059 +ifdef CONFIG_MAPPED_KERNEL
2060 +load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
2061 +OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
2062 +dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
2063 +else
2064 +load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
2065 +OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
2066 +endif
2067 +else
2068 +ifdef CONFIG_MAPPED_KERNEL
2069 +load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000
2070 +OBJCOPYFLAGS := --change-addresses=0xc000000080000000
2071 +dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
2072 +else
2073 +load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000
2074 +OBJCOPYFLAGS := --change-addresses=0xa800000080000000
2075 +endif
2076 +endif
2077 +endif
2078 +
2079 +#
2080 +# SGI-IP32 (O2)
2081 +#
2082 +# Set the load address to >= 80069000 if you want to leave space for symmon,
2083 +# 0xffffffff80004000 for production kernels. Note that the value must be aligned to
2084 +# a multiple of the kernel stack size or the handling of the current variable
2085 +# will break.
2086 +#
2087 +core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/
2088 +cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
2089 +load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
2090 +
2091 +#
2092 +# Sibyte SB1250 SOC
2093 +#
2094 +# This is a LIB so that it links at the end, and initcalls are later
2095 +# the sequence; but it is built as an object so that modules don't get
2096 +# removed (as happens, even if they have __initcall/module_init)
2097 +#
2098 +core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
2099 +cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
2100 + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
2101 +
2102 +core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
2103 +cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
2104 + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
2105 +
2106 +core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
2107 +cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
2108 + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
2109 +
2110 +core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
2111 +cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
2112 + -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
2113 +
2114 +#
2115 +# Sibyte BCM91120x (Carmel) board
2116 +# Sibyte BCM91120C (CRhine) board
2117 +# Sibyte BCM91125C (CRhone) board
2118 +# Sibyte BCM91125E (Rhone) board
2119 +# Sibyte SWARM board
2120 +# Sibyte BCM91x80 (BigSur) board
2121 +#
2122 +libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/
2123 +load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000
2124 +libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/
2125 +load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000
2126 +libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/
2127 +load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000
2128 +libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/
2129 +load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000
2130 +libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/
2131 +load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000
2132 +libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/
2133 +load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000
2134 +libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/
2135 +load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
2136 +
2137 +#
2138 +# SNI RM200 PCI
2139 +#
2140 +core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/
2141 +cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200
2142 +load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000
2143 +
2144 +#
2145 +# Toshiba JMR-TX3927 board
2146 +#
2147 +core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
2148 + arch/mips/jmr3927/common/
2149 +cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
2150 +load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
2151 +
2152 +#
2153 +# Toshiba RBTX4927 board or
2154 +# Toshiba RBTX4937 board
2155 +#
2156 +core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
2157 +core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
2158 +load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
2159 +
2160 +#
2161 +# Toshiba RBTX4938 board
2162 +#
2163 +core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
2164 +core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
2165 +load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
2166 +
2167 +cflags-y += -Iinclude/asm-mips/mach-generic
2168 +drivers-$(CONFIG_PCI) += arch/mips/pci/
2169 +
2170 +ifdef CONFIG_32BIT
2171 +ifdef CONFIG_CPU_LITTLE_ENDIAN
2172 +JIFFIES = jiffies_64
2173 +else
2174 +JIFFIES = jiffies_64 + 4
2175 +endif
2176 +else
2177 +JIFFIES = jiffies_64
2178 +endif
2179 +
2180 +AFLAGS += $(cflags-y)
2181 +CFLAGS += $(cflags-y)
2182 +
2183 +LDFLAGS += -m $(ld-emul)
2184 +
2185 +OBJCOPYFLAGS += --remove-section=.reginfo
2186 +
2187 +#
2188 +# Choosing incompatible machines durings configuration will result in
2189 +# error messages during linking. Select a default linkscript if
2190 +# none has been choosen above.
2191 +#
2192 +
2193 +CPPFLAGS_vmlinux.lds := \
2194 + $(CFLAGS) \
2195 + -D"LOADADDR=$(load-y)" \
2196 + -D"JIFFIES=$(JIFFIES)" \
2197 + -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)"
2198 +
2199 +head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o
2200 +
2201 +libs-y += arch/mips/lib/
2202 +libs-$(CONFIG_32BIT) += arch/mips/lib-32/
2203 +libs-$(CONFIG_64BIT) += arch/mips/lib-64/
2204 +
2205 +core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
2206 +
2207 +drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
2208 +
2209 +ifdef CONFIG_LASAT
2210 +rom.bin rom.sw: vmlinux
2211 + $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
2212 +endif
2213 +
2214 +#
2215 +# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
2216 +# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
2217 +# convert to ECOFF using elf2ecoff.
2218 +#
2219 +vmlinux.32: vmlinux
2220 + $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@
2221 +
2222 +#
2223 +# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit
2224 +# ELF files from 32-bit files by conversion.
2225 +#
2226 +vmlinux.64: vmlinux
2227 + $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@
2228 +
2229 +makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1)
2230 +
2231 +ifdef CONFIG_BOOT_ELF32
2232 +all: $(vmlinux-32)
2233 +endif
2234 +
2235 +ifdef CONFIG_BOOT_ELF64
2236 +all: $(vmlinux-64)
2237 +endif
2238 +
2239 +ifdef CONFIG_MIPS_ATLAS
2240 +all: vmlinux.srec
2241 +endif
2242 +
2243 +ifdef CONFIG_MIPS_MALTA
2244 +all: vmlinux.srec
2245 +endif
2246 +
2247 +ifdef CONFIG_MIPS_SEAD
2248 +all: vmlinux.srec
2249 +endif
2250 +
2251 +ifdef CONFIG_QEMU
2252 +all: vmlinux.bin
2253 +endif
2254 +
2255 +ifdef CONFIG_SNI_RM200_PCI
2256 +all: vmlinux.ecoff
2257 +endif
2258 +
2259 +ifdef CONFIG_MIPS_MTX1
2260 +all: vmlinux.srec zImage zImage.flash
2261 +endif
2262 +
2263 +vmlinux.bin: $(vmlinux-32)
2264 + +@$(call makeboot,$@)
2265 +
2266 +vmlinux.ecoff vmlinux.rm200: $(vmlinux-32)
2267 + +@$(call makeboot,$@)
2268 +
2269 +vmlinux.srec: $(vmlinux-32)
2270 + +@$(call makeboot,$@)
2271 +
2272 +zImage: vmlinux
2273 + +@$(call makeboot,$@)
2274 +
2275 +CLEAN_FILES += vmlinux.ecoff \
2276 + vmlinux.srec \
2277 + vmlinux.rm200.tmp \
2278 + vmlinux.rm200
2279 +
2280 +archclean:
2281 + @$(MAKE) $(clean)=arch/mips/boot
2282 + @$(MAKE) $(clean)=arch/mips/lasat
2283 + @$(MAKE) $(clean)=arch/mips/boot/compressed
2284 +
2285 +CLEAN_FILES += vmlinux.32 \
2286 + vmlinux.64 \
2287 + vmlinux.ecoff
Personal OpenWRT clone
This page took 0.157341 seconds and 3 git commands to generate.