7278551d188b6329f16c7bcf90b00db537b30285
[openwrt.git] / package / mac80211 / patches / 310-ath9k_pending_work.patch
1 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
2 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
3 @@ -961,18 +961,6 @@ static void ar5008_hw_rfbus_done(struct
4 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
5 }
6
7 -static void ar5008_hw_enable_rfkill(struct ath_hw *ah)
8 -{
9 - REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
10 - AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
11 -
12 - REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
13 - AR_GPIO_INPUT_MUX2_RFSILENT);
14 -
15 - ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
16 - REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
17 -}
18 -
19 static void ar5008_restore_chainmask(struct ath_hw *ah)
20 {
21 int rx_chainmask = ah->rxchainmask;
22 @@ -1629,7 +1617,6 @@ void ar5008_hw_attach_phy_ops(struct ath
23 priv_ops->set_delta_slope = ar5008_hw_set_delta_slope;
24 priv_ops->rfbus_req = ar5008_hw_rfbus_req;
25 priv_ops->rfbus_done = ar5008_hw_rfbus_done;
26 - priv_ops->enable_rfkill = ar5008_hw_enable_rfkill;
27 priv_ops->restore_chainmask = ar5008_restore_chainmask;
28 priv_ops->set_diversity = ar5008_set_diversity;
29 priv_ops->do_getnf = ar5008_hw_do_getnf;
30 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
31 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
32 @@ -745,28 +745,6 @@ static void ar9003_hw_rfbus_done(struct
33 REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
34 }
35
36 -/*
37 - * Set the interrupt and GPIO values so the ISR can disable RF
38 - * on a switch signal. Assumes GPIO port and interrupt polarity
39 - * are set prior to call.
40 - */
41 -static void ar9003_hw_enable_rfkill(struct ath_hw *ah)
42 -{
43 - /* Connect rfsilent_bb_l to baseband */
44 - REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
45 - AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
46 - /* Set input mux for rfsilent_bb_l to GPIO #0 */
47 - REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,
48 - AR_GPIO_INPUT_MUX2_RFSILENT);
49 -
50 - /*
51 - * Configure the desired GPIO port for input and
52 - * enable baseband rf silence.
53 - */
54 - ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
55 - REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);
56 -}
57 -
58 static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
59 {
60 u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
61 @@ -1203,7 +1181,6 @@ void ar9003_hw_attach_phy_ops(struct ath
62 priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
63 priv_ops->rfbus_req = ar9003_hw_rfbus_req;
64 priv_ops->rfbus_done = ar9003_hw_rfbus_done;
65 - priv_ops->enable_rfkill = ar9003_hw_enable_rfkill;
66 priv_ops->set_diversity = ar9003_hw_set_diversity;
67 priv_ops->ani_control = ar9003_hw_ani_control;
68 priv_ops->do_getnf = ar9003_hw_do_getnf;
69 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
70 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
71 @@ -189,6 +189,7 @@ struct ath_txq {
72 struct list_head axq_q;
73 spinlock_t axq_lock;
74 u32 axq_depth;
75 + u32 axq_ampdu_depth;
76 bool stopped;
77 bool axq_tx_inprogress;
78 struct list_head axq_acq;
79 --- a/drivers/net/wireless/ath/ath9k/hw-ops.h
80 +++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
81 @@ -223,11 +223,6 @@ static inline void ath9k_hw_rfbus_done(s
82 return ath9k_hw_private_ops(ah)->rfbus_done(ah);
83 }
84
85 -static inline void ath9k_enable_rfkill(struct ath_hw *ah)
86 -{
87 - return ath9k_hw_private_ops(ah)->enable_rfkill(ah);
88 -}
89 -
90 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
91 {
92 if (!ath9k_hw_private_ops(ah)->restore_chainmask)
93 --- a/drivers/net/wireless/ath/ath9k/hw.c
94 +++ b/drivers/net/wireless/ath/ath9k/hw.c
95 @@ -491,6 +491,17 @@ static int __ath9k_hw_init(struct ath_hw
96 if (ah->hw_version.devid == AR5416_AR9100_DEVID)
97 ah->hw_version.macVersion = AR_SREV_VERSION_9100;
98
99 + ath9k_hw_read_revisions(ah);
100 +
101 + /*
102 + * Read back AR_WA into a permanent copy and set bits 14 and 17.
103 + * We need to do this to avoid RMW of this register. We cannot
104 + * read the reg when chip is asleep.
105 + */
106 + ah->WARegVal = REG_READ(ah, AR_WA);
107 + ah->WARegVal |= (AR_WA_D3_L1_DISABLE |
108 + AR_WA_ASPM_TIMER_BASED_DISABLE);
109 +
110 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
111 ath_err(common, "Couldn't reset chip\n");
112 return -EIO;
113 @@ -559,14 +570,6 @@ static int __ath9k_hw_init(struct ath_hw
114
115 ath9k_hw_init_mode_regs(ah);
116
117 - /*
118 - * Read back AR_WA into a permanent copy and set bits 14 and 17.
119 - * We need to do this to avoid RMW of this register. We cannot
120 - * read the reg when chip is asleep.
121 - */
122 - ah->WARegVal = REG_READ(ah, AR_WA);
123 - ah->WARegVal |= (AR_WA_D3_L1_DISABLE |
124 - AR_WA_ASPM_TIMER_BASED_DISABLE);
125
126 if (ah->is_pciexpress)
127 ath9k_hw_configpcipowersave(ah, 0, 0);
128 @@ -1078,8 +1081,6 @@ static bool ath9k_hw_set_reset_power_on(
129 return false;
130 }
131
132 - ath9k_hw_read_revisions(ah);
133 -
134 return ath9k_hw_set_reset(ah, ATH9K_RESET_WARM);
135 }
136
137 @@ -1399,7 +1400,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
138 ath9k_hw_init_qos(ah);
139
140 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
141 - ath9k_enable_rfkill(ah);
142 + ath9k_hw_cfg_gpio_input(ah, ah->rfkill_gpio);
143
144 ath9k_hw_init_global_settings(ah);
145
146 --- a/drivers/net/wireless/ath/ath9k/hw.h
147 +++ b/drivers/net/wireless/ath/ath9k/hw.h
148 @@ -576,7 +576,6 @@ struct ath_hw_private_ops {
149 void (*set_delta_slope)(struct ath_hw *ah, struct ath9k_channel *chan);
150 bool (*rfbus_req)(struct ath_hw *ah);
151 void (*rfbus_done)(struct ath_hw *ah);
152 - void (*enable_rfkill)(struct ath_hw *ah);
153 void (*restore_chainmask)(struct ath_hw *ah);
154 void (*set_diversity)(struct ath_hw *ah, bool value);
155 u32 (*compute_pll_control)(struct ath_hw *ah,
156 --- a/drivers/net/wireless/ath/ath9k/xmit.c
157 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
158 @@ -838,7 +838,7 @@ static void ath_tx_sched_aggr(struct ath
159 ath_tx_txqaddbuf(sc, txq, &bf_q);
160 TX_STAT_INC(txq->axq_qnum, a_aggr);
161
162 - } while (txq->axq_depth < ATH_AGGR_MIN_QDEPTH &&
163 + } while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH &&
164 status != ATH_AGGR_BAW_CLOSED);
165 }
166
167 @@ -999,6 +999,7 @@ struct ath_txq *ath_txq_setup(struct ath
168 INIT_LIST_HEAD(&txq->axq_acq);
169 spin_lock_init(&txq->axq_lock);
170 txq->axq_depth = 0;
171 + txq->axq_ampdu_depth = 0;
172 txq->axq_tx_inprogress = false;
173 sc->tx.txqsetup |= 1<<qnum;
174
175 @@ -1068,6 +1069,12 @@ int ath_cabq_update(struct ath_softc *sc
176 return 0;
177 }
178
179 +static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
180 +{
181 + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
182 + return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
183 +}
184 +
185 /*
186 * Drain a given TX queue (could be Beacon or Data)
187 *
188 @@ -1126,7 +1133,8 @@ void ath_draintxq(struct ath_softc *sc,
189 }
190
191 txq->axq_depth--;
192 -
193 + if (bf_is_ampdu_not_probing(bf))
194 + txq->axq_ampdu_depth--;
195 spin_unlock_bh(&txq->axq_lock);
196
197 if (bf_isampdu(bf))
198 @@ -1316,6 +1324,8 @@ static void ath_tx_txqaddbuf(struct ath_
199 ath9k_hw_txstart(ah, txq->axq_qnum);
200 }
201 txq->axq_depth++;
202 + if (bf_is_ampdu_not_probing(bf))
203 + txq->axq_ampdu_depth++;
204 }
205
206 static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
207 @@ -1336,7 +1346,7 @@ static void ath_tx_send_ampdu(struct ath
208 */
209 if (!list_empty(&tid->buf_q) || tid->paused ||
210 !BAW_WITHIN(tid->seq_start, tid->baw_size, fi->seqno) ||
211 - txctl->txq->axq_depth >= ATH_AGGR_MIN_QDEPTH) {
212 + txctl->txq->axq_ampdu_depth >= ATH_AGGR_MIN_QDEPTH) {
213 /*
214 * Add this frame to software queue for scheduling later
215 * for aggregation.
216 @@ -2040,6 +2050,9 @@ static void ath_tx_processq(struct ath_s
217 txq->axq_tx_inprogress = false;
218 if (bf_held)
219 list_del(&bf_held->list);
220 +
221 + if (bf_is_ampdu_not_probing(bf))
222 + txq->axq_ampdu_depth--;
223 spin_unlock_bh(&txq->axq_lock);
224
225 if (bf_held)
226 @@ -2168,6 +2181,8 @@ void ath_tx_edma_tasklet(struct ath_soft
227 INCR(txq->txq_tailidx, ATH_TXFIFO_DEPTH);
228 txq->axq_depth--;
229 txq->axq_tx_inprogress = false;
230 + if (bf_is_ampdu_not_probing(bf))
231 + txq->axq_ampdu_depth--;
232 spin_unlock_bh(&txq->axq_lock);
233
234 txok = !(txs.ts_status & ATH9K_TXERR_MASK);
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