linux: update 3.1 to 3.1.1
[openwrt.git] / target / linux / lantiq / patches / 0025-MIPS-lantiq-activate-pull-up-resistors-when-gpio-is-.patch
1 From 6efd9a5f303c4561eee14ae429b8c0fafa6c5a83 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Thu, 27 Oct 2011 20:06:30 +0200
4 Subject: [PATCH 11/22] MIPS: lantiq: activate pull up resistors when gpio is
5 a input
6
7 The register that enables a gpios internal pullups was not set.
8
9 Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
10 Signed-off-by: John Crispin <blogic@openwrt.org>
11 ---
12 arch/mips/lantiq/xway/gpio.c | 6 ++++++
13 1 files changed, 6 insertions(+), 0 deletions(-)
14
15 --- a/arch/mips/lantiq/xway/gpio.c
16 +++ b/arch/mips/lantiq/xway/gpio.c
17 @@ -21,6 +21,8 @@
18 #define LTQ_GPIO_ALTSEL0 0x0C
19 #define LTQ_GPIO_ALTSEL1 0x10
20 #define LTQ_GPIO_OD 0x14
21 +#define LTQ_GPIO_PUDSEL 0x1C
22 +#define LTQ_GPIO_PUDEN 0x20
23
24 #define PINS_PER_PORT 16
25 #define MAX_PORTS 3
26 @@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(stru
27
28 ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
29 ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
30 + ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
31 + ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
32
33 return 0;
34 }
35 @@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(str
36
37 ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset);
38 ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset);
39 + ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset);
40 + ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset);
41 ltq_gpio_set(chip, offset, value);
42
43 return 0;
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