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[openwrt.git] / target / linux / ppc40x / patches-2.6.30 / 007-openrb-light.patch
1 --- a/arch/powerpc/boot/Makefile
2 +++ b/arch/powerpc/boot/Makefile
3 @@ -76,7 +76,7 @@ src-plat := of.c cuboot-52xx.c cuboot-82
4 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
5 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
6 cuboot-acadia.c cuboot-amigaone.c cuboot-magicboxv1.c \
7 - cuboot-magicboxv2.c
8 + cuboot-magicboxv2.c cuboot-openrb-light.c
9 src-boot := $(src-wlib) $(src-plat) empty.c
10
11 src-boot := $(addprefix $(obj)/, $(src-boot))
12 @@ -195,6 +195,7 @@ image-$(CONFIG_WALNUT) += treeImage.wa
13 image-$(CONFIG_ACADIA) += cuImage.acadia
14 image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
15 image-$(CONFIG_MAGICBOXV2) += cuImage.magicboxv2
16 +image-$(CONFIG_OPENRB_LIGHT) += cuImage.openrb-light
17
18 # Board ports in arch/powerpc/platform/44x/Kconfig
19 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
20 --- a/arch/powerpc/platforms/40x/Kconfig
21 +++ b/arch/powerpc/platforms/40x/Kconfig
22 @@ -79,6 +79,16 @@ config MAKALU
23 help
24 This option enables support for the AMCC PPC405EX board.
25
26 +config OPENRB_LIGHT
27 + bool "OpenRB Light"
28 + depends on 40x
29 + default n
30 + select PPC40x_SIMPLE
31 + select 405EP
32 + select PCI
33 + help
34 + This option enables support for the OpenRB Light board.
35 +
36 #config REDWOOD_5
37 # bool "Redwood-5"
38 # depends on 40x
39 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c
40 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
41 @@ -54,6 +54,7 @@ static char *board[] __initdata = {
42 "amcc,acadia",
43 "magicboxv1",
44 "magicboxv2",
45 + "openrb,light",
46 };
47
48 static int __init ppc40x_probe(void)
49 --- /dev/null
50 +++ b/arch/powerpc/boot/cuboot-openrb-light.c
51 @@ -0,0 +1,69 @@
52 +/*
53 + * Old U-boot compatibility for OpenRB Light board
54 + *
55 + * Author: Gabor Juhos <juhosg@openwrt.org>
56 + *
57 + * This program is free software; you can redistribute it and/or modify it
58 + * under the terms of the GNU General Public License version 2 as published
59 + * by the Free Software Foundation.
60 + */
61 +
62 +#include "ops.h"
63 +#include "io.h"
64 +#include "dcr.h"
65 +#include "stdio.h"
66 +#include "4xx.h"
67 +#include "44x.h"
68 +#include "cuboot.h"
69 +
70 +#define TARGET_4xx
71 +#define TARGET_405EP
72 +#include "ppcboot.h"
73 +
74 +static bd_t bd;
75 +
76 +static void fixup_cf_card(void)
77 +{
78 +#define DCRN_CPC0_PCI_BASE 0xf9
79 +#define CF_CS0_BASE 0xff100000
80 +#define CF_CS1_BASE 0xff200000
81 +
82 + /* Turn on PerWE instead of PCIsomething */
83 + mtdcr(DCRN_CPC0_PCI_BASE,
84 + mfdcr(DCRN_CPC0_PCI_BASE) | (0x80000000L >> 27));
85 +
86 + /* PerCS1 (CF's CS0): base 0xff100000, 16-bit, rw */
87 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1CR);
88 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS0_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
89 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B1AP);
90 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
91 +
92 + /* PerCS2 (CF's CS1): base 0xff200000, 16-bit, rw */
93 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2CR);
94 + mtdcr(DCRN_EBC0_CFGDATA, CF_CS1_BASE | EBC_BXCR_BU_RW | EBC_BXCR_BW_16);
95 + mtdcr(DCRN_EBC0_CFGADDR, EBC_B2AP);
96 + mtdcr(DCRN_EBC0_CFGDATA, 0x080bd800);
97 +
98 +#undef DCRN_CPC0_PCI_BASE
99 +#undef CF_CS0_BASE
100 +#undef CF_CS1_BASE
101 +}
102 +
103 +static void openrb_light_fixups(void)
104 +{
105 + fixup_cf_card();
106 + ibm405ep_fixup_clocks(33333000);
107 + ibm4xx_sdram_fixup_memsize();
108 + dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
109 +}
110 +
111 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
112 + unsigned long r6, unsigned long r7)
113 +{
114 + CUBOOT_INIT();
115 + platform_ops.fixups = openrb_light_fixups;
116 + platform_ops.exit = ibm40x_dbcr_reset;
117 + fdt_init(_dtb_start);
118 + serial_console_init();
119 +}
120 +
121 --- /dev/null
122 +++ b/arch/powerpc/boot/dts/openrb-light.dts
123 @@ -0,0 +1,252 @@
124 +/*
125 + * Device Tree Source for OpenRB Light board
126 + *
127 + * Copyright 2009 Gabor Juhos <juhosg@openwrt.org>
128 + *
129 + * Based on magicboxv2.dts
130 + *
131 + * This file is licensed under the terms of the GNU General Public
132 + * License version 2. This program is licensed "as is" without
133 + * any warranty of any kind, whether express or implied.
134 + */
135 +
136 +/dts-v1/;
137 +
138 +/ {
139 + #address-cells = <1>;
140 + #size-cells = <1>;
141 + model = "openrb,light";
142 + compatible = "openrb,light";
143 + dcr-parent = <&{/cpus/cpu@0}>;
144 +
145 + aliases {
146 + ethernet0 = &EMAC0;
147 + serial0 = &UART0;
148 + serial1 = &UART1;
149 + };
150 +
151 + cpus {
152 + #address-cells = <1>;
153 + #size-cells = <0>;
154 +
155 + cpu@0 {
156 + device_type = "cpu";
157 + model = "PowerPC,405EP";
158 + reg = <0x00000000>;
159 + clock-frequency = <0xbebc200>; /* Filled in by zImage */
160 + timebase-frequency = <0>; /* Filled in by zImage */
161 + i-cache-line-size = <20>;
162 + d-cache-line-size = <20>;
163 + i-cache-size = <4000>;
164 + d-cache-size = <4000>;
165 + dcr-controller;
166 + dcr-access-method = "native";
167 + };
168 + };
169 +
170 + memory {
171 + device_type = "memory";
172 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
173 + };
174 +
175 + UIC0: interrupt-controller {
176 + compatible = "ibm,uic";
177 + interrupt-controller;
178 + cell-index = <0>;
179 + dcr-reg = <0x0c0 0x009>;
180 + #address-cells = <0>;
181 + #size-cells = <0>;
182 + #interrupt-cells = <2>;
183 + };
184 +
185 + plb {
186 + compatible = "ibm,plb3";
187 + #address-cells = <1>;
188 + #size-cells = <1>;
189 + ranges;
190 + clock-frequency = <0>; /* Filled in by zImage */
191 +
192 + SDRAM0: memory-controller {
193 + compatible = "ibm,sdram-405ep";
194 + dcr-reg = <0x010 0x002>;
195 + };
196 +
197 + MAL: mcmal {
198 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
199 + dcr-reg = <0x180 0x062>;
200 + num-tx-chans = <4>;
201 + num-rx-chans = <2>;
202 + interrupt-parent = <&UIC0>;
203 + interrupts = <
204 + 0xb 0x4 /* TXEOB */
205 + 0xc 0x4 /* RXEOB */
206 + 0xa 0x4 /* SERR */
207 + 0xd 0x4 /* TXDE */
208 + 0xe 0x4 /* RXDE */>;
209 + };
210 +
211 + OPB0: opb {
212 + compatible = "ibm,opb-405ep", "ibm,opb";
213 + #address-cells = <1>;
214 + #size-cells = <1>;
215 + ranges = <0xef600000 0xef600000 0x00a00000>;
216 + dcr-reg = <0x0a0 0x005>;
217 + clock-frequency = <0>; /* Filled in by zImage */
218 +
219 + UART0: serial@ef600300 {
220 + device_type = "serial";
221 + compatible = "ns16550";
222 + reg = <0xef600300 0x00000008>;
223 + virtual-reg = <0xef600300>;
224 + clock-frequency = <0>; /* Filled in by zImage */
225 + current-speed = <115200>;
226 + interrupt-parent = <&UIC0>;
227 + interrupts = <0x0 0x4>;
228 + };
229 +
230 + UART1: serial@ef600400 {
231 + device_type = "serial";
232 + compatible = "ns16550";
233 + reg = <0xef600400 0x00000008>;
234 + virtual-reg = <0xef600400>;
235 + clock-frequency = <0>; /* Filled in by zImage */
236 + current-speed = <115200>;
237 + interrupt-parent = <&UIC0>;
238 + interrupts = <0x1 0x4>;
239 + };
240 +
241 + IIC: i2c@ef600500 {
242 + #address-cells = <1>;
243 + #size-cells = <0>;
244 + compatible = "ibm,iic-405ep", "ibm,iic";
245 + reg = <0xef600500 0x00000011>;
246 + interrupt-parent = <&UIC0>;
247 + interrupts = <0x2 0x4>;
248 +
249 + eeprom@50 {
250 + compatible = "at24,24c16";
251 + reg = <0x50>;
252 + };
253 + };
254 +
255 + GPIO0: gpio-controller@ef600700 {
256 + compatible = "ibm,ppc4xx-gpio";
257 + reg = <0xef600700 0x00000020>;
258 + #gpio-cells = <2>;
259 + gpio-controller;
260 + };
261 +
262 + EMAC0: ethernet@ef600800 {
263 + linux,network-index = <0x0>;
264 + device_type = "network";
265 + compatible = "ibm,emac-405ep", "ibm,emac";
266 + interrupt-parent = <&UIC0>;
267 + interrupts = <
268 + 0xf 0x4 /* Ethernet */
269 + 0x9 0x4 /* Ethernet Wake Up */>;
270 + local-mac-address = [000000000000]; /* Filled in by zImage */
271 + reg = <0xef600800 0x00000070>;
272 + mal-device = <&MAL>;
273 + mal-tx-channel = <0>;
274 + mal-rx-channel = <0>;
275 + cell-index = <0>;
276 + max-frame-size = <0x5dc>;
277 + rx-fifo-size = <0x1000>;
278 + tx-fifo-size = <0x800>;
279 + phy-mode = "mii";
280 + phy-map = <0x00000000>;
281 + };
282 +
283 + leds {
284 + compatible = "gpio-leds";
285 + user {
286 + label = "openrb:green:user";
287 + gpios = <&GPIO0 2 1>;
288 + };
289 + };
290 + };
291 +
292 + EBC0: ebc {
293 + compatible = "ibm,ebc-405ep", "ibm,ebc";
294 + dcr-reg = <0x012 0x002>;
295 + #address-cells = <2>;
296 + #size-cells = <1>;
297 + /* The ranges property is supplied by the bootwrapper
298 + * and is based on the firmware's configuration of the
299 + * EBC bridge
300 + */
301 + clock-frequency = <0>; /* Filled in by zImage */
302 +
303 + cf_card@ff100000 {
304 + compatible = "magicbox-cf", "pata-magicbox-cf";
305 + reg = <0x00000000 0xff100000 0x00001000
306 + 0x00000000 0xff200000 0x00001000>;
307 + interrupt-parent = <&UIC0>;
308 + interrupts = <0x19 0x1 /* IRQ_TYPE_EDGE_RISING */ >;
309 + };
310 +
311 + nor_flash@ff800000 {
312 + compatible = "cfi-flash";
313 + bank-width = <2>;
314 + reg = <0x00000000 0xff800000 0x00800000>;
315 + #address-cells = <1>;
316 + #size-cells = <1>;
317 + partition@0 {
318 + label = "linux";
319 + reg = <0x0 0x120000>;
320 + };
321 + partition@120000 {
322 + label = "rootfs";
323 + reg = <0x120000 0x6a0000>;
324 + };
325 + partition@7c0000 {
326 + label = "u-boot";
327 + reg = <0x7c0000 0x30000>;
328 + read-only;
329 + };
330 + };
331 + };
332 +
333 + PCI0: pci@ec000000 {
334 + device_type = "pci";
335 + #interrupt-cells = <1>;
336 + #size-cells = <2>;
337 + #address-cells = <3>;
338 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
339 + primary;
340 + reg = <0xeec00000 0x00000008 /* Config space access */
341 + 0xeed80000 0x00000004 /* IACK */
342 + 0xeed80000 0x00000004 /* Special cycle */
343 + 0xef480000 0x00000040>; /* Internal registers */
344 +
345 + /* Outbound ranges, one memory and one IO,
346 + * later cannot be changed. Chip supports a second
347 + * IO range but we don't use it for now
348 + */
349 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
350 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
351 +
352 + /* Inbound 2GB range starting at 0 */
353 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
354 +
355 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
356 + interrupt-map = <
357 + /* IDSEL 1 */
358 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
359 +
360 + /* IDSEL 2 */
361 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
362 +
363 + /* IDSEL 3 */
364 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
365 +
366 + /* IDSEL 4 */
367 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
368 + >;
369 + };
370 + };
371 +
372 + chosen {
373 + linux,stdout-path = "/plb/opb/serial@ef600300";
374 + };
375 +};
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