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[openwrt.git] / target / linux / generic / files / drivers / net / phy / ar8216.c
1 /*
2 * ar8216.c: AR8216 switch driver
3 *
4 * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17 #include <linux/if.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/list.h>
21 #include <linux/if_ether.h>
22 #include <linux/skbuff.h>
23 #include <linux/netdevice.h>
24 #include <linux/netlink.h>
25 #include <linux/bitops.h>
26 #include <net/genetlink.h>
27 #include <linux/switch.h>
28 #include <linux/delay.h>
29 #include <linux/phy.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/lockdep.h>
33 #include "ar8216.h"
34
35 /* size of the vlan table */
36 #define AR8X16_MAX_VLANS 128
37 #define AR8X16_PROBE_RETRIES 10
38
39 struct ar8216_priv;
40
41 #define AR8XXX_CAP_GIGE BIT(0)
42
43 struct ar8xxx_chip {
44 unsigned long caps;
45
46 int (*hw_init)(struct ar8216_priv *priv);
47 void (*init_globals)(struct ar8216_priv *priv);
48 void (*init_port)(struct ar8216_priv *priv, int port);
49 void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
50 u32 ingress, u32 members, u32 pvid);
51 u32 (*read_port_status)(struct ar8216_priv *priv, int port);
52 int (*atu_flush)(struct ar8216_priv *priv);
53 void (*vtu_flush)(struct ar8216_priv *priv);
54 void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
55 };
56
57 struct ar8216_priv {
58 struct switch_dev dev;
59 struct phy_device *phy;
60 u32 (*read)(struct ar8216_priv *priv, int reg);
61 void (*write)(struct ar8216_priv *priv, int reg, u32 val);
62 const struct net_device_ops *ndo_old;
63 struct net_device_ops ndo;
64 struct mutex reg_mutex;
65 int chip_type;
66 const struct ar8xxx_chip *chip;
67 bool initialized;
68 bool port4_phy;
69 char buf[80];
70
71 bool init;
72
73 /* all fields below are cleared on reset */
74 bool vlan;
75 u16 vlan_id[AR8X16_MAX_VLANS];
76 u8 vlan_table[AR8X16_MAX_VLANS];
77 u8 vlan_tagged;
78 u16 pvid[AR8216_NUM_PORTS];
79 };
80
81 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
82
83 static inline bool ar8xxx_has_gige(struct ar8216_priv *priv)
84 {
85 return priv->chip->caps & AR8XXX_CAP_GIGE;
86 }
87
88 static inline void
89 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
90 {
91 regaddr >>= 1;
92 *r1 = regaddr & 0x1e;
93
94 regaddr >>= 5;
95 *r2 = regaddr & 0x7;
96
97 regaddr >>= 3;
98 *page = regaddr & 0x1ff;
99 }
100
101 static u32
102 ar8216_mii_read(struct ar8216_priv *priv, int reg)
103 {
104 struct phy_device *phy = priv->phy;
105 struct mii_bus *bus = phy->bus;
106 u16 r1, r2, page;
107 u16 lo, hi;
108
109 split_addr((u32) reg, &r1, &r2, &page);
110
111 mutex_lock(&bus->mdio_lock);
112
113 bus->write(bus, 0x18, 0, page);
114 usleep_range(1000, 2000); /* wait for the page switch to propagate */
115 lo = bus->read(bus, 0x10 | r2, r1);
116 hi = bus->read(bus, 0x10 | r2, r1 + 1);
117
118 mutex_unlock(&bus->mdio_lock);
119
120 return (hi << 16) | lo;
121 }
122
123 static void
124 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
125 {
126 struct phy_device *phy = priv->phy;
127 struct mii_bus *bus = phy->bus;
128 u16 r1, r2, r3;
129 u16 lo, hi;
130
131 split_addr((u32) reg, &r1, &r2, &r3);
132 lo = val & 0xffff;
133 hi = (u16) (val >> 16);
134
135 mutex_lock(&bus->mdio_lock);
136
137 bus->write(bus, 0x18, 0, r3);
138 usleep_range(1000, 2000); /* wait for the page switch to propagate */
139 bus->write(bus, 0x10 | r2, r1 + 1, hi);
140 bus->write(bus, 0x10 | r2, r1, lo);
141
142 mutex_unlock(&bus->mdio_lock);
143 }
144
145 static void
146 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
147 u16 dbg_addr, u16 dbg_data)
148 {
149 struct mii_bus *bus = priv->phy->bus;
150
151 mutex_lock(&bus->mdio_lock);
152 bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
153 bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
154 mutex_unlock(&bus->mdio_lock);
155 }
156
157 static u32
158 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
159 {
160 u32 v;
161
162 lockdep_assert_held(&priv->reg_mutex);
163
164 v = priv->read(priv, reg);
165 v &= ~mask;
166 v |= val;
167 priv->write(priv, reg, v);
168
169 return v;
170 }
171
172 static void
173 ar8216_read_port_link(struct ar8216_priv *priv, int port,
174 struct switch_port_link *link)
175 {
176 u32 status;
177 u32 speed;
178
179 memset(link, '\0', sizeof(*link));
180
181 status = priv->chip->read_port_status(priv, port);
182
183 link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
184 if (link->aneg) {
185 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
186 if (!link->link)
187 return;
188 } else {
189 link->link = true;
190 }
191
192 link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
193 link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
194 link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
195
196 speed = (status & AR8216_PORT_STATUS_SPEED) >>
197 AR8216_PORT_STATUS_SPEED_S;
198
199 switch (speed) {
200 case AR8216_PORT_SPEED_10M:
201 link->speed = SWITCH_PORT_SPEED_10;
202 break;
203 case AR8216_PORT_SPEED_100M:
204 link->speed = SWITCH_PORT_SPEED_100;
205 break;
206 case AR8216_PORT_SPEED_1000M:
207 link->speed = SWITCH_PORT_SPEED_1000;
208 break;
209 default:
210 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
211 break;
212 }
213 }
214
215 static int
216 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
217 {
218 struct ar8216_priv *priv = dev->phy_ptr;
219 unsigned char *buf;
220
221 if (unlikely(!priv))
222 goto error;
223
224 if (!priv->vlan)
225 goto send;
226
227 if (unlikely(skb_headroom(skb) < 2)) {
228 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
229 goto error;
230 }
231
232 buf = skb_push(skb, 2);
233 buf[0] = 0x10;
234 buf[1] = 0x80;
235
236 send:
237 return priv->ndo_old->ndo_start_xmit(skb, dev);
238
239 error:
240 dev_kfree_skb_any(skb);
241 return 0;
242 }
243
244 static int
245 ar8216_mangle_rx(struct sk_buff *skb, int napi)
246 {
247 struct ar8216_priv *priv;
248 struct net_device *dev;
249 unsigned char *buf;
250 int port, vlan;
251
252 dev = skb->dev;
253 if (!dev)
254 goto error;
255
256 priv = dev->phy_ptr;
257 if (!priv)
258 goto error;
259
260 /* don't strip the header if vlan mode is disabled */
261 if (!priv->vlan)
262 goto recv;
263
264 /* strip header, get vlan id */
265 buf = skb->data;
266 skb_pull(skb, 2);
267
268 /* check for vlan header presence */
269 if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
270 goto recv;
271
272 port = buf[0] & 0xf;
273
274 /* no need to fix up packets coming from a tagged source */
275 if (priv->vlan_tagged & (1 << port))
276 goto recv;
277
278 /* lookup port vid from local table, the switch passes an invalid vlan id */
279 vlan = priv->vlan_id[priv->pvid[port]];
280
281 buf[14 + 2] &= 0xf0;
282 buf[14 + 2] |= vlan >> 8;
283 buf[15 + 2] = vlan & 0xff;
284
285 recv:
286 skb->protocol = eth_type_trans(skb, skb->dev);
287
288 if (napi)
289 return netif_receive_skb(skb);
290 else
291 return netif_rx(skb);
292
293 error:
294 /* no vlan? eat the packet! */
295 dev_kfree_skb_any(skb);
296 return NET_RX_DROP;
297 }
298
299 static int
300 ar8216_netif_rx(struct sk_buff *skb)
301 {
302 return ar8216_mangle_rx(skb, 0);
303 }
304
305 static int
306 ar8216_netif_receive_skb(struct sk_buff *skb)
307 {
308 return ar8216_mangle_rx(skb, 1);
309 }
310
311 static int
312 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
313 {
314 int timeout = 20;
315 u32 t = 0;
316
317 while (1) {
318 t = priv->read(priv, reg);
319 if ((t & mask) == val)
320 return 0;
321
322 if (timeout-- <= 0)
323 break;
324
325 udelay(10);
326 }
327
328 pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
329 (unsigned int) reg, t, mask, val);
330 return -ETIMEDOUT;
331 }
332
333 static void
334 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
335 {
336 if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
337 return;
338 if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
339 val &= AR8216_VTUDATA_MEMBER;
340 val |= AR8216_VTUDATA_VALID;
341 priv->write(priv, AR8216_REG_VTU_DATA, val);
342 }
343 op |= AR8216_VTU_ACTIVE;
344 priv->write(priv, AR8216_REG_VTU, op);
345 }
346
347 static void
348 ar8216_vtu_flush(struct ar8216_priv *priv)
349 {
350 ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
351 }
352
353 static void
354 ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
355 {
356 u32 op;
357
358 op = AR8216_VTU_OP_LOAD | (vid << AR8216_VTU_VID_S);
359 ar8216_vtu_op(priv, op, port_mask);
360 }
361
362 static int
363 ar8216_atu_flush(struct ar8216_priv *priv)
364 {
365 int ret;
366
367 ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
368 if (!ret)
369 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
370
371 return ret;
372 }
373
374 static u32
375 ar8216_read_port_status(struct ar8216_priv *priv, int port)
376 {
377 return priv->read(priv, AR8216_REG_PORT_STATUS(port));
378 }
379
380 static void
381 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
382 u32 members, u32 pvid)
383 {
384 u32 header;
385
386 if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
387 header = AR8216_PORT_CTRL_HEADER;
388 else
389 header = 0;
390
391 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
392 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
393 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
394 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
395 AR8216_PORT_CTRL_LEARN | header |
396 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
397 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
398
399 ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
400 AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
401 AR8216_PORT_VLAN_DEFAULT_ID,
402 (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
403 (ingress << AR8216_PORT_VLAN_MODE_S) |
404 (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
405 }
406
407 static int
408 ar8216_hw_init(struct ar8216_priv *priv)
409 {
410 return 0;
411 }
412
413 static void
414 ar8216_init_globals(struct ar8216_priv *priv)
415 {
416 /* standard atheros magic */
417 priv->write(priv, 0x38, 0xc000050e);
418
419 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
420 AR8216_GCTRL_MTU, 1518 + 8 + 2);
421 }
422
423 static void
424 ar8216_init_port(struct ar8216_priv *priv, int port)
425 {
426 /* Enable port learning and tx */
427 priv->write(priv, AR8216_REG_PORT_CTRL(port),
428 AR8216_PORT_CTRL_LEARN |
429 (4 << AR8216_PORT_CTRL_STATE_S));
430
431 priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
432
433 if (port == AR8216_PORT_CPU) {
434 priv->write(priv, AR8216_REG_PORT_STATUS(port),
435 AR8216_PORT_STATUS_LINK_UP |
436 ar8xxx_has_gige(priv) ? AR8216_PORT_SPEED_1000M :
437 AR8216_PORT_SPEED_100M |
438 AR8216_PORT_STATUS_TXMAC |
439 AR8216_PORT_STATUS_RXMAC |
440 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
441 ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
442 AR8216_PORT_STATUS_DUPLEX);
443 } else {
444 priv->write(priv, AR8216_REG_PORT_STATUS(port),
445 AR8216_PORT_STATUS_LINK_AUTO);
446 }
447 }
448
449 static const struct ar8xxx_chip ar8216_chip = {
450 .hw_init = ar8216_hw_init,
451 .init_globals = ar8216_init_globals,
452 .init_port = ar8216_init_port,
453 .setup_port = ar8216_setup_port,
454 .read_port_status = ar8216_read_port_status,
455 .atu_flush = ar8216_atu_flush,
456 .vtu_flush = ar8216_vtu_flush,
457 .vtu_load_vlan = ar8216_vtu_load_vlan,
458 };
459
460 static void
461 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
462 u32 members, u32 pvid)
463 {
464 ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
465 AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
466 AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
467 AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
468 AR8216_PORT_CTRL_LEARN |
469 (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
470 (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
471
472 ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
473 AR8236_PORT_VLAN_DEFAULT_ID,
474 (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
475
476 ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
477 AR8236_PORT_VLAN2_VLAN_MODE |
478 AR8236_PORT_VLAN2_MEMBER,
479 (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
480 (members << AR8236_PORT_VLAN2_MEMBER_S));
481 }
482
483 static int
484 ar8236_hw_init(struct ar8216_priv *priv)
485 {
486 int i;
487 struct mii_bus *bus;
488
489 if (priv->initialized)
490 return 0;
491
492 /* Initialize the PHYs */
493 bus = priv->phy->bus;
494 for (i = 0; i < 5; i++) {
495 mdiobus_write(bus, i, MII_ADVERTISE,
496 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
497 ADVERTISE_PAUSE_ASYM);
498 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
499 }
500 msleep(1000);
501
502 priv->initialized = true;
503 return 0;
504 }
505
506 static void
507 ar8236_init_globals(struct ar8216_priv *priv)
508 {
509 /* enable jumbo frames */
510 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
511 AR8316_GCTRL_MTU, 9018 + 8 + 2);
512 }
513
514 static const struct ar8xxx_chip ar8236_chip = {
515 .hw_init = ar8236_hw_init,
516 .init_globals = ar8236_init_globals,
517 .init_port = ar8216_init_port,
518 .setup_port = ar8236_setup_port,
519 .read_port_status = ar8216_read_port_status,
520 .atu_flush = ar8216_atu_flush,
521 .vtu_flush = ar8216_vtu_flush,
522 .vtu_load_vlan = ar8216_vtu_load_vlan,
523 };
524
525 static int
526 ar8316_hw_init(struct ar8216_priv *priv)
527 {
528 int i;
529 u32 val, newval;
530 struct mii_bus *bus;
531
532 val = priv->read(priv, 0x8);
533
534 if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
535 if (priv->port4_phy) {
536 /* value taken from Ubiquiti RouterStation Pro */
537 newval = 0x81461bea;
538 printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
539 } else {
540 newval = 0x01261be2;
541 printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
542 }
543 } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
544 /* value taken from AVM Fritz!Box 7390 sources */
545 newval = 0x010e5b71;
546 } else {
547 /* no known value for phy interface */
548 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
549 priv->phy->interface);
550 return -EINVAL;
551 }
552
553 if (val == newval)
554 goto out;
555
556 priv->write(priv, 0x8, newval);
557
558 /* Initialize the ports */
559 bus = priv->phy->bus;
560 for (i = 0; i < 5; i++) {
561 if ((i == 4) && priv->port4_phy &&
562 priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
563 /* work around for phy4 rgmii mode */
564 ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
565 /* rx delay */
566 ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
567 /* tx delay */
568 ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
569 msleep(1000);
570 }
571
572 /* initialize the port itself */
573 mdiobus_write(bus, i, MII_ADVERTISE,
574 ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
575 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
576 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
577 msleep(1000);
578 }
579
580 out:
581 priv->initialized = true;
582 return 0;
583 }
584
585 static void
586 ar8316_init_globals(struct ar8216_priv *priv)
587 {
588 /* standard atheros magic */
589 priv->write(priv, 0x38, 0xc000050e);
590
591 /* enable cpu port to receive multicast and broadcast frames */
592 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
593
594 /* enable jumbo frames */
595 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
596 AR8316_GCTRL_MTU, 9018 + 8 + 2);
597 }
598
599 static const struct ar8xxx_chip ar8316_chip = {
600 .caps = AR8XXX_CAP_GIGE,
601 .hw_init = ar8316_hw_init,
602 .init_globals = ar8316_init_globals,
603 .init_port = ar8216_init_port,
604 .setup_port = ar8216_setup_port,
605 .read_port_status = ar8216_read_port_status,
606 .atu_flush = ar8216_atu_flush,
607 .vtu_flush = ar8216_vtu_flush,
608 .vtu_load_vlan = ar8216_vtu_load_vlan,
609 };
610
611 static int
612 ar8216_sw_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
613 struct switch_val *val)
614 {
615 struct ar8216_priv *priv = to_ar8216(dev);
616 priv->vlan = !!val->value.i;
617 return 0;
618 }
619
620 static int
621 ar8216_sw_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
622 struct switch_val *val)
623 {
624 struct ar8216_priv *priv = to_ar8216(dev);
625 val->value.i = priv->vlan;
626 return 0;
627 }
628
629
630 static int
631 ar8216_sw_set_pvid(struct switch_dev *dev, int port, int vlan)
632 {
633 struct ar8216_priv *priv = to_ar8216(dev);
634
635 /* make sure no invalid PVIDs get set */
636
637 if (vlan >= dev->vlans)
638 return -EINVAL;
639
640 priv->pvid[port] = vlan;
641 return 0;
642 }
643
644 static int
645 ar8216_sw_get_pvid(struct switch_dev *dev, int port, int *vlan)
646 {
647 struct ar8216_priv *priv = to_ar8216(dev);
648 *vlan = priv->pvid[port];
649 return 0;
650 }
651
652 static int
653 ar8216_sw_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
654 struct switch_val *val)
655 {
656 struct ar8216_priv *priv = to_ar8216(dev);
657 priv->vlan_id[val->port_vlan] = val->value.i;
658 return 0;
659 }
660
661 static int
662 ar8216_sw_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
663 struct switch_val *val)
664 {
665 struct ar8216_priv *priv = to_ar8216(dev);
666 val->value.i = priv->vlan_id[val->port_vlan];
667 return 0;
668 }
669
670 static int
671 ar8216_sw_get_port_link(struct switch_dev *dev, int port,
672 struct switch_port_link *link)
673 {
674 struct ar8216_priv *priv = to_ar8216(dev);
675
676 ar8216_read_port_link(priv, port, link);
677 return 0;
678 }
679
680 static int
681 ar8216_sw_get_ports(struct switch_dev *dev, struct switch_val *val)
682 {
683 struct ar8216_priv *priv = to_ar8216(dev);
684 u8 ports = priv->vlan_table[val->port_vlan];
685 int i;
686
687 val->len = 0;
688 for (i = 0; i < dev->ports; i++) {
689 struct switch_port *p;
690
691 if (!(ports & (1 << i)))
692 continue;
693
694 p = &val->value.ports[val->len++];
695 p->id = i;
696 if (priv->vlan_tagged & (1 << i))
697 p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
698 else
699 p->flags = 0;
700 }
701 return 0;
702 }
703
704 static int
705 ar8216_sw_set_ports(struct switch_dev *dev, struct switch_val *val)
706 {
707 struct ar8216_priv *priv = to_ar8216(dev);
708 u8 *vt = &priv->vlan_table[val->port_vlan];
709 int i, j;
710
711 *vt = 0;
712 for (i = 0; i < val->len; i++) {
713 struct switch_port *p = &val->value.ports[i];
714
715 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
716 priv->vlan_tagged |= (1 << p->id);
717 } else {
718 priv->vlan_tagged &= ~(1 << p->id);
719 priv->pvid[p->id] = val->port_vlan;
720
721 /* make sure that an untagged port does not
722 * appear in other vlans */
723 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
724 if (j == val->port_vlan)
725 continue;
726 priv->vlan_table[j] &= ~(1 << p->id);
727 }
728 }
729
730 *vt |= 1 << p->id;
731 }
732 return 0;
733 }
734
735 static int
736 ar8216_sw_hw_apply(struct switch_dev *dev)
737 {
738 struct ar8216_priv *priv = to_ar8216(dev);
739 u8 portmask[AR8216_NUM_PORTS];
740 int i, j;
741
742 mutex_lock(&priv->reg_mutex);
743 /* flush all vlan translation unit entries */
744 priv->chip->vtu_flush(priv);
745
746 memset(portmask, 0, sizeof(portmask));
747 if (!priv->init) {
748 /* calculate the port destination masks and load vlans
749 * into the vlan translation unit */
750 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
751 u8 vp = priv->vlan_table[j];
752
753 if (!vp)
754 continue;
755
756 for (i = 0; i < dev->ports; i++) {
757 u8 mask = (1 << i);
758 if (vp & mask)
759 portmask[i] |= vp & ~mask;
760 }
761
762 priv->chip->vtu_load_vlan(priv, priv->vlan_id[j],
763 priv->vlan_table[j]);
764 }
765 } else {
766 /* vlan disabled:
767 * isolate all ports, but connect them to the cpu port */
768 for (i = 0; i < dev->ports; i++) {
769 if (i == AR8216_PORT_CPU)
770 continue;
771
772 portmask[i] = 1 << AR8216_PORT_CPU;
773 portmask[AR8216_PORT_CPU] |= (1 << i);
774 }
775 }
776
777 /* update the port destination mask registers and tag settings */
778 for (i = 0; i < dev->ports; i++) {
779 int egress, ingress;
780 int pvid;
781
782 if (priv->vlan) {
783 pvid = priv->vlan_id[priv->pvid[i]];
784 if (priv->vlan_tagged & (1 << i))
785 egress = AR8216_OUT_ADD_VLAN;
786 else
787 egress = AR8216_OUT_STRIP_VLAN;
788 ingress = AR8216_IN_SECURE;
789 } else {
790 pvid = i;
791 egress = AR8216_OUT_KEEP;
792 ingress = AR8216_IN_PORT_ONLY;
793 }
794
795 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
796 pvid);
797 }
798 mutex_unlock(&priv->reg_mutex);
799 return 0;
800 }
801
802 static int
803 ar8216_sw_reset_switch(struct switch_dev *dev)
804 {
805 struct ar8216_priv *priv = to_ar8216(dev);
806 int i;
807
808 mutex_lock(&priv->reg_mutex);
809 memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
810 offsetof(struct ar8216_priv, vlan));
811
812 for (i = 0; i < AR8X16_MAX_VLANS; i++)
813 priv->vlan_id[i] = i;
814
815 /* Configure all ports */
816 for (i = 0; i < dev->ports; i++)
817 priv->chip->init_port(priv, i);
818
819 priv->chip->init_globals(priv);
820 mutex_unlock(&priv->reg_mutex);
821
822 return ar8216_sw_hw_apply(dev);
823 }
824
825 static struct switch_attr ar8216_globals[] = {
826 {
827 .type = SWITCH_TYPE_INT,
828 .name = "enable_vlan",
829 .description = "Enable VLAN mode",
830 .set = ar8216_sw_set_vlan,
831 .get = ar8216_sw_get_vlan,
832 .max = 1
833 },
834 };
835
836 static struct switch_attr ar8216_port[] = {
837 };
838
839 static struct switch_attr ar8216_vlan[] = {
840 {
841 .type = SWITCH_TYPE_INT,
842 .name = "vid",
843 .description = "VLAN ID (0-4094)",
844 .set = ar8216_sw_set_vid,
845 .get = ar8216_sw_get_vid,
846 .max = 4094,
847 },
848 };
849
850 static const struct switch_dev_ops ar8216_sw_ops = {
851 .attr_global = {
852 .attr = ar8216_globals,
853 .n_attr = ARRAY_SIZE(ar8216_globals),
854 },
855 .attr_port = {
856 .attr = ar8216_port,
857 .n_attr = ARRAY_SIZE(ar8216_port),
858 },
859 .attr_vlan = {
860 .attr = ar8216_vlan,
861 .n_attr = ARRAY_SIZE(ar8216_vlan),
862 },
863 .get_port_pvid = ar8216_sw_get_pvid,
864 .set_port_pvid = ar8216_sw_set_pvid,
865 .get_vlan_ports = ar8216_sw_get_ports,
866 .set_vlan_ports = ar8216_sw_set_ports,
867 .apply_config = ar8216_sw_hw_apply,
868 .reset_switch = ar8216_sw_reset_switch,
869 .get_port_link = ar8216_sw_get_port_link,
870 };
871
872 static int
873 ar8216_id_chip(struct ar8216_priv *priv)
874 {
875 u32 val;
876 u16 id;
877 int i;
878
879 priv->chip_type = UNKNOWN;
880
881 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
882 if (val == ~0)
883 return -ENODEV;
884
885 id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
886 for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
887 u16 t;
888
889 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
890 if (val == ~0)
891 return -ENODEV;
892
893 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
894 if (t != id)
895 return -ENODEV;
896 }
897
898 switch (id) {
899 case 0x0101:
900 priv->chip_type = AR8216;
901 priv->chip = &ar8216_chip;
902 break;
903 case 0x0301:
904 priv->chip_type = AR8236;
905 priv->chip = &ar8236_chip;
906 break;
907 case 0x1000:
908 case 0x1001:
909 priv->chip_type = AR8316;
910 priv->chip = &ar8316_chip;
911 break;
912 default:
913 printk(KERN_DEBUG
914 "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
915 (int)(id >> AR8216_CTRL_VERSION_S),
916 (int)(id & AR8216_CTRL_REVISION),
917 mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
918 mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
919
920 return -ENODEV;
921 }
922
923 return 0;
924 }
925
926 static int
927 ar8216_config_init(struct phy_device *pdev)
928 {
929 struct ar8216_priv *priv = pdev->priv;
930 struct net_device *dev = pdev->attached_dev;
931 struct switch_dev *swdev;
932 int ret;
933
934 if (!priv) {
935 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
936 if (priv == NULL)
937 return -ENOMEM;
938 }
939
940 priv->phy = pdev;
941
942 ret = ar8216_id_chip(priv);
943 if (ret)
944 goto err_free_priv;
945
946 if (pdev->addr != 0) {
947 if (ar8xxx_has_gige(priv)) {
948 pdev->supported |= SUPPORTED_1000baseT_Full;
949 pdev->advertising |= ADVERTISED_1000baseT_Full;
950 }
951
952 if (priv->chip_type == AR8316) {
953 /* check if we're attaching to the switch twice */
954 pdev = pdev->bus->phy_map[0];
955 if (!pdev) {
956 kfree(priv);
957 return 0;
958 }
959
960 /* switch device has not been initialized, reuse priv */
961 if (!pdev->priv) {
962 priv->port4_phy = true;
963 pdev->priv = priv;
964 return 0;
965 }
966
967 kfree(priv);
968
969 /* switch device has been initialized, reinit */
970 priv = pdev->priv;
971 priv->dev.ports = (AR8216_NUM_PORTS - 1);
972 priv->initialized = false;
973 priv->port4_phy = true;
974 ar8316_hw_init(priv);
975 return 0;
976 }
977
978 kfree(priv);
979 return 0;
980 }
981
982 printk(KERN_INFO "%s: AR%d switch driver attached.\n",
983 pdev->attached_dev->name, priv->chip_type);
984
985 if (ar8xxx_has_gige(priv))
986 pdev->supported = SUPPORTED_1000baseT_Full;
987 else
988 pdev->supported = SUPPORTED_100baseT_Full;
989 pdev->advertising = pdev->supported;
990
991 mutex_init(&priv->reg_mutex);
992 priv->read = ar8216_mii_read;
993 priv->write = ar8216_mii_write;
994
995 pdev->priv = priv;
996
997 swdev = &priv->dev;
998 swdev->cpu_port = AR8216_PORT_CPU;
999 swdev->ops = &ar8216_sw_ops;
1000 swdev->ports = AR8216_NUM_PORTS;
1001
1002 if (priv->chip_type == AR8316) {
1003 swdev->name = "Atheros AR8316";
1004 swdev->vlans = AR8X16_MAX_VLANS;
1005
1006 if (priv->port4_phy) {
1007 /* port 5 connected to the other mac, therefore unusable */
1008 swdev->ports = (AR8216_NUM_PORTS - 1);
1009 }
1010 } else if (priv->chip_type == AR8236) {
1011 swdev->name = "Atheros AR8236";
1012 swdev->vlans = AR8216_NUM_VLANS;
1013 swdev->ports = AR8216_NUM_PORTS;
1014 } else {
1015 swdev->name = "Atheros AR8216";
1016 swdev->vlans = AR8216_NUM_VLANS;
1017 }
1018
1019 ret = register_switch(&priv->dev, pdev->attached_dev);
1020 if (ret)
1021 goto err_free_priv;
1022
1023 priv->init = true;
1024
1025 ret = priv->chip->hw_init(priv);
1026 if (ret)
1027 goto err_free_priv;
1028
1029 ret = ar8216_sw_reset_switch(&priv->dev);
1030 if (ret)
1031 goto err_free_priv;
1032
1033 dev->phy_ptr = priv;
1034
1035 /* VID fixup only needed on ar8216 */
1036 if (pdev->addr == 0 && priv->chip_type == AR8216) {
1037 pdev->pkt_align = 2;
1038 pdev->netif_receive_skb = ar8216_netif_receive_skb;
1039 pdev->netif_rx = ar8216_netif_rx;
1040 priv->ndo_old = dev->netdev_ops;
1041 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
1042 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
1043 dev->netdev_ops = &priv->ndo;
1044 }
1045
1046 priv->init = false;
1047
1048 return 0;
1049
1050 err_free_priv:
1051 kfree(priv);
1052 return ret;
1053 }
1054
1055 static int
1056 ar8216_read_status(struct phy_device *phydev)
1057 {
1058 struct ar8216_priv *priv = phydev->priv;
1059 struct switch_port_link link;
1060 int ret;
1061
1062 if (phydev->addr != 0)
1063 return genphy_read_status(phydev);
1064
1065 ar8216_read_port_link(priv, phydev->addr, &link);
1066 phydev->link = !!link.link;
1067 if (!phydev->link)
1068 return 0;
1069
1070 switch (link.speed) {
1071 case SWITCH_PORT_SPEED_10:
1072 phydev->speed = SPEED_10;
1073 break;
1074 case SWITCH_PORT_SPEED_100:
1075 phydev->speed = SPEED_100;
1076 break;
1077 case SWITCH_PORT_SPEED_1000:
1078 phydev->speed = SPEED_1000;
1079 break;
1080 default:
1081 phydev->speed = 0;
1082 }
1083 phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1084
1085 /* flush the address translation unit */
1086 mutex_lock(&priv->reg_mutex);
1087 ret = priv->chip->atu_flush(priv);
1088 mutex_unlock(&priv->reg_mutex);
1089
1090 phydev->state = PHY_RUNNING;
1091 netif_carrier_on(phydev->attached_dev);
1092 phydev->adjust_link(phydev->attached_dev);
1093
1094 return ret;
1095 }
1096
1097 static int
1098 ar8216_config_aneg(struct phy_device *phydev)
1099 {
1100 if (phydev->addr == 0)
1101 return 0;
1102
1103 return genphy_config_aneg(phydev);
1104 }
1105
1106 static int
1107 ar8216_probe(struct phy_device *pdev)
1108 {
1109 struct ar8216_priv priv;
1110
1111 priv.phy = pdev;
1112 return ar8216_id_chip(&priv);
1113 }
1114
1115 static void
1116 ar8216_remove(struct phy_device *pdev)
1117 {
1118 struct ar8216_priv *priv = pdev->priv;
1119 struct net_device *dev = pdev->attached_dev;
1120
1121 if (!priv)
1122 return;
1123
1124 if (priv->ndo_old && dev)
1125 dev->netdev_ops = priv->ndo_old;
1126 if (pdev->addr == 0)
1127 unregister_switch(&priv->dev);
1128 kfree(priv);
1129 }
1130
1131 static struct phy_driver ar8216_driver = {
1132 .phy_id = 0x004d0000,
1133 .name = "Atheros AR8216/AR8236/AR8316",
1134 .phy_id_mask = 0xffff0000,
1135 .features = PHY_BASIC_FEATURES,
1136 .probe = ar8216_probe,
1137 .remove = ar8216_remove,
1138 .config_init = &ar8216_config_init,
1139 .config_aneg = &ar8216_config_aneg,
1140 .read_status = &ar8216_read_status,
1141 .driver = { .owner = THIS_MODULE },
1142 };
1143
1144 int __init
1145 ar8216_init(void)
1146 {
1147 return phy_driver_register(&ar8216_driver);
1148 }
1149
1150 void __exit
1151 ar8216_exit(void)
1152 {
1153 phy_driver_unregister(&ar8216_driver);
1154 }
1155
1156 module_init(ar8216_init);
1157 module_exit(ar8216_exit);
1158 MODULE_LICENSE("GPL");
1159
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