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[openwrt.git] / target / linux / brcm63xx / patches-2.6.27 / 003-add_serial_driver_for_bcm63xx_integr.patch
1 From 6c489656b09998ed6a6f857e01ccf630e29358dd Mon Sep 17 00:00:00 2001
2 From: Maxime Bizon <mbizon@freebox.fr>
3 Date: Fri, 18 Jul 2008 19:35:55 +0200
4 Subject: [PATCH] [MIPS] BCM63XX: Add serial driver for bcm63xx integrated UART.
5
6 Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
7 ---
8 arch/mips/bcm63xx/Makefile | 1 +
9 arch/mips/bcm63xx/dev-uart.c | 41 +
10 drivers/serial/Kconfig | 19 +
11 drivers/serial/Makefile | 1 +
12 drivers/serial/bcm63xx_uart.c | 890 ++++++++++++++++++++++
13 include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h | 6 +
14 include/linux/serial_core.h | 2 +
15 7 files changed, 960 insertions(+), 0 deletions(-)
16 create mode 100644 arch/mips/bcm63xx/dev-uart.c
17 create mode 100644 drivers/serial/bcm63xx_uart.c
18 create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
19
20 --- a/arch/mips/bcm63xx/Makefile
21 +++ b/arch/mips/bcm63xx/Makefile
22 @@ -1,2 +1,3 @@
23 obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o
24 +obj-y += dev-uart.o
25 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
26 --- /dev/null
27 +++ b/arch/mips/bcm63xx/dev-uart.c
28 @@ -0,0 +1,41 @@
29 +/*
30 + * This file is subject to the terms and conditions of the GNU General Public
31 + * License. See the file "COPYING" in the main directory of this archive
32 + * for more details.
33 + *
34 + * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
35 + */
36 +
37 +#include <linux/init.h>
38 +#include <linux/kernel.h>
39 +#include <linux/platform_device.h>
40 +#include <bcm63xx_cpu.h>
41 +#include <bcm63xx_dev_uart.h>
42 +
43 +static struct resource uart_resources[] = {
44 + {
45 + .start = -1, /* filled at runtime */
46 + .end = -1, /* filled at runtime */
47 + .flags = IORESOURCE_MEM,
48 + },
49 + {
50 + .start = -1, /* filled at runtime */
51 + .flags = IORESOURCE_IRQ,
52 + },
53 +};
54 +
55 +static struct platform_device bcm63xx_uart_device = {
56 + .name = "bcm63xx_uart",
57 + .id = 0,
58 + .num_resources = ARRAY_SIZE(uart_resources),
59 + .resource = uart_resources,
60 +};
61 +
62 +int __init bcm63xx_uart_register(void)
63 +{
64 + uart_resources[0].start = bcm63xx_regset_address(RSET_UART0);
65 + uart_resources[0].end = uart_resources[0].start;
66 + uart_resources[0].end += RSET_UART_SIZE - 1;
67 + uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
68 + return platform_device_register(&bcm63xx_uart_device);
69 +}
70 --- a/drivers/serial/Kconfig
71 +++ b/drivers/serial/Kconfig
72 @@ -1421,4 +1421,23 @@ config SPORT_BAUD_RATE
73 default 19200 if (SERIAL_SPORT_BAUD_RATE_19200)
74 default 9600 if (SERIAL_SPORT_BAUD_RATE_9600)
75
76 +config SERIAL_BCM63XX
77 + tristate "bcm63xx serial port support"
78 + select SERIAL_CORE
79 + depends on BCM63XX
80 + help
81 + If you have a bcm63xx CPU, you can enable its onboard
82 + serial port by enabling this options.
83 +
84 + To compile this driver as a module, choose M here: the
85 + module will be called bcm963xx_uart.
86 +
87 +config SERIAL_BCM63XX_CONSOLE
88 + bool "Console on bcm63xx serial port"
89 + depends on SERIAL_BCM63XX
90 + select SERIAL_CORE_CONSOLE
91 + help
92 + If you have enabled the serial port on the bcm63xx CPU
93 + you can make it the console by answering Y to this option.
94 +
95 endmenu
96 --- a/drivers/serial/Makefile
97 +++ b/drivers/serial/Makefile
98 @@ -24,6 +24,7 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711
99 obj-$(CONFIG_SERIAL_PXA) += pxa.o
100 obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o
101 obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
102 +obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
103 obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o
104 obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o
105 obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o
106 --- /dev/null
107 +++ b/drivers/serial/bcm63xx_uart.c
108 @@ -0,0 +1,890 @@
109 +/*
110 + * This file is subject to the terms and conditions of the GNU General Public
111 + * License. See the file "COPYING" in the main directory of this archive
112 + * for more details.
113 + *
114 + * Derived from many drivers using generic_serial interface.
115 + *
116 + * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
117 + *
118 + * Serial driver for BCM63xx integrated UART.
119 + *
120 + * Hardware flow control was _not_ tested since I only have RX/TX on
121 + * my board.
122 + */
123 +
124 +#if defined(CONFIG_SERIAL_BCM63XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
125 +#define SUPPORT_SYSRQ
126 +#endif
127 +
128 +#include <linux/kernel.h>
129 +#include <linux/platform_device.h>
130 +#include <linux/init.h>
131 +#include <linux/delay.h>
132 +#include <linux/module.h>
133 +#include <linux/console.h>
134 +#include <linux/clk.h>
135 +#include <linux/tty.h>
136 +#include <linux/tty_flip.h>
137 +#include <linux/sysrq.h>
138 +#include <linux/serial.h>
139 +#include <linux/serial_core.h>
140 +
141 +#include <bcm63xx_clk.h>
142 +#include <bcm63xx_irq.h>
143 +#include <bcm63xx_regs.h>
144 +#include <bcm63xx_io.h>
145 +
146 +#define BCM63XX_NR_UARTS 1
147 +
148 +static struct uart_port ports[BCM63XX_NR_UARTS];
149 +
150 +/*
151 + * rx interrupt mask / stat
152 + *
153 + * mask:
154 + * - rx fifo full
155 + * - rx fifo above threshold
156 + * - rx fifo not empty for too long
157 + */
158 +#define UART_RX_INT_MASK (UART_IR_MASK(UART_IR_RXOVER) | \
159 + UART_IR_MASK(UART_IR_RXTHRESH) | \
160 + UART_IR_MASK(UART_IR_RXTIMEOUT))
161 +
162 +#define UART_RX_INT_STAT (UART_IR_STAT(UART_IR_RXOVER) | \
163 + UART_IR_STAT(UART_IR_RXTHRESH) | \
164 + UART_IR_STAT(UART_IR_RXTIMEOUT))
165 +
166 +/*
167 + * tx interrupt mask / stat
168 + *
169 + * mask:
170 + * - tx fifo empty
171 + * - tx fifo below threshold
172 + */
173 +#define UART_TX_INT_MASK (UART_IR_MASK(UART_IR_TXEMPTY) | \
174 + UART_IR_MASK(UART_IR_TXTRESH))
175 +
176 +#define UART_TX_INT_STAT (UART_IR_STAT(UART_IR_TXEMPTY) | \
177 + UART_IR_STAT(UART_IR_TXTRESH))
178 +
179 +/*
180 + * external input interrupt
181 + *
182 + * mask: any edge on CTS, DCD
183 + */
184 +#define UART_EXTINP_INT_MASK (UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \
185 + UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD))
186 +
187 +/*
188 + * handy uart register accessor
189 + */
190 +static inline unsigned int bcm_uart_readl(struct uart_port *port,
191 + unsigned int offset)
192 +{
193 + return bcm_readl(port->membase + offset);
194 +}
195 +
196 +static inline void bcm_uart_writel(struct uart_port *port,
197 + unsigned int value, unsigned int offset)
198 +{
199 + bcm_writel(value, port->membase + offset);
200 +}
201 +
202 +/*
203 + * serial core request to check if uart tx fifo is empty
204 + */
205 +static unsigned int bcm_uart_tx_empty(struct uart_port *port)
206 +{
207 + unsigned int val;
208 +
209 + val = bcm_uart_readl(port, UART_IR_REG);
210 + return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0;
211 +}
212 +
213 +/*
214 + * serial core request to set RTS and DTR pin state and loopback mode
215 + */
216 +static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
217 +{
218 + unsigned int val;
219 +
220 + val = bcm_uart_readl(port, UART_MCTL_REG);
221 + val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK);
222 + /* invert of written value is reflected on the pin */
223 + if (!(mctrl & TIOCM_DTR))
224 + val |= UART_MCTL_DTR_MASK;
225 + if (!(mctrl & TIOCM_RTS))
226 + val |= UART_MCTL_RTS_MASK;
227 + bcm_uart_writel(port, val, UART_MCTL_REG);
228 +
229 + val = bcm_uart_readl(port, UART_CTL_REG);
230 + if (mctrl & TIOCM_LOOP)
231 + val |= UART_CTL_LOOPBACK_MASK;
232 + else
233 + val &= ~UART_CTL_LOOPBACK_MASK;
234 + bcm_uart_writel(port, val, UART_CTL_REG);
235 +}
236 +
237 +/*
238 + * serial core request to return RI, CTS, DCD and DSR pin state
239 + */
240 +static unsigned int bcm_uart_get_mctrl(struct uart_port *port)
241 +{
242 + unsigned int val, mctrl;
243 +
244 + mctrl = 0;
245 + val = bcm_uart_readl(port, UART_EXTINP_REG);
246 + if (val & UART_EXTINP_RI_MASK)
247 + mctrl |= TIOCM_RI;
248 + if (val & UART_EXTINP_CTS_MASK)
249 + mctrl |= TIOCM_CTS;
250 + if (val & UART_EXTINP_DCD_MASK)
251 + mctrl |= TIOCM_CD;
252 + if (val & UART_EXTINP_DSR_MASK)
253 + mctrl |= TIOCM_DSR;
254 + return mctrl;
255 +}
256 +
257 +/*
258 + * serial core request to disable tx ASAP (used for flow control)
259 + */
260 +static void bcm_uart_stop_tx(struct uart_port *port)
261 +{
262 + unsigned int val;
263 +
264 + val = bcm_uart_readl(port, UART_CTL_REG);
265 + val &= ~(UART_CTL_TXEN_MASK);
266 + bcm_uart_writel(port, val, UART_CTL_REG);
267 +
268 + val = bcm_uart_readl(port, UART_IR_REG);
269 + val &= ~UART_TX_INT_MASK;
270 + bcm_uart_writel(port, val, UART_IR_REG);
271 +}
272 +
273 +/*
274 + * serial core request to (re)enable tx
275 + */
276 +static void bcm_uart_start_tx(struct uart_port *port)
277 +{
278 + unsigned int val;
279 +
280 + val = bcm_uart_readl(port, UART_IR_REG);
281 + val |= UART_TX_INT_MASK;
282 + bcm_uart_writel(port, val, UART_IR_REG);
283 +
284 + val = bcm_uart_readl(port, UART_CTL_REG);
285 + val |= UART_CTL_TXEN_MASK;
286 + bcm_uart_writel(port, val, UART_CTL_REG);
287 +}
288 +
289 +/*
290 + * serial core request to stop rx, called before port shutdown
291 + */
292 +static void bcm_uart_stop_rx(struct uart_port *port)
293 +{
294 + unsigned int val;
295 +
296 + val = bcm_uart_readl(port, UART_IR_REG);
297 + val &= ~UART_RX_INT_MASK;
298 + bcm_uart_writel(port, val, UART_IR_REG);
299 +}
300 +
301 +/*
302 + * serial core request to enable modem status interrupt reporting
303 + */
304 +static void bcm_uart_enable_ms(struct uart_port *port)
305 +{
306 + unsigned int val;
307 +
308 + val = bcm_uart_readl(port, UART_IR_REG);
309 + val |= UART_IR_MASK(UART_IR_EXTIP);
310 + bcm_uart_writel(port, val, UART_IR_REG);
311 +}
312 +
313 +/*
314 + * serial core request to start/stop emitting break char
315 + */
316 +static void bcm_uart_break_ctl(struct uart_port *port, int ctl)
317 +{
318 + unsigned long flags;
319 + unsigned int val;
320 +
321 + spin_lock_irqsave(&port->lock, flags);
322 +
323 + val = bcm_uart_readl(port, UART_CTL_REG);
324 + if (ctl)
325 + val |= UART_CTL_XMITBRK_MASK;
326 + else
327 + val &= ~UART_CTL_XMITBRK_MASK;
328 + bcm_uart_writel(port, val, UART_CTL_REG);
329 +
330 + spin_unlock_irqrestore(&port->lock, flags);
331 +}
332 +
333 +/*
334 + * return port type in string format
335 + */
336 +static const char *bcm_uart_type(struct uart_port *port)
337 +{
338 + return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL;
339 +}
340 +
341 +/*
342 + * read all chars in rx fifo and send them to core
343 + */
344 +static void bcm_uart_do_rx(struct uart_port *port)
345 +{
346 + struct tty_struct *tty;
347 + unsigned int max_count;
348 +
349 + /* limit number of char read in interrupt, should not be
350 + * higher than fifo size anyway since we're much faster than
351 + * serial port */
352 + max_count = 32;
353 + tty = port->info->port.tty;
354 + do {
355 + unsigned int iestat, c, cstat;
356 + char flag;
357 +
358 + /* get overrun/fifo empty information from ier
359 + * register */
360 + iestat = bcm_uart_readl(port, UART_IR_REG);
361 + if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
362 + break;
363 +
364 + cstat = c = bcm_uart_readl(port, UART_FIFO_REG);
365 + port->icount.rx++;
366 + flag = TTY_NORMAL;
367 + c &= 0xff;
368 +
369 + if (unlikely((cstat & UART_FIFO_ANYERR_MASK))) {
370 + /* do stats first */
371 + if (cstat & UART_FIFO_BRKDET_MASK) {
372 + port->icount.brk++;
373 + if (uart_handle_break(port))
374 + continue;
375 + }
376 +
377 + if (cstat & UART_FIFO_PARERR_MASK)
378 + port->icount.parity++;
379 + if (cstat & UART_FIFO_FRAMEERR_MASK)
380 + port->icount.frame++;
381 +
382 + /* update flag wrt read_status_mask */
383 + cstat &= port->read_status_mask;
384 + if (cstat & UART_FIFO_BRKDET_MASK)
385 + flag = TTY_BREAK;
386 + if (cstat & UART_FIFO_FRAMEERR_MASK)
387 + flag = TTY_FRAME;
388 + if (cstat & UART_FIFO_PARERR_MASK)
389 + flag = TTY_PARITY;
390 + }
391 +
392 + if (uart_handle_sysrq_char(port, c))
393 + continue;
394 +
395 + if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) {
396 + port->icount.overrun++;
397 + tty_insert_flip_char(tty, 0, TTY_OVERRUN);
398 + }
399 +
400 + if ((cstat & port->ignore_status_mask) == 0)
401 + tty_insert_flip_char(tty, c, flag);
402 +
403 + } while (--max_count);
404 +
405 + tty_flip_buffer_push(tty);
406 +}
407 +
408 +/*
409 + * fill tx fifo with chars to send, stop when fifo is about to be full
410 + * or when all chars have been sent.
411 + */
412 +static void bcm_uart_do_tx(struct uart_port *port)
413 +{
414 + struct circ_buf *xmit;
415 + unsigned int val, max_count;
416 +
417 + if (port->x_char) {
418 + bcm_uart_writel(port, port->x_char, UART_FIFO_REG);
419 + port->icount.tx++;
420 + port->x_char = 0;
421 + return;
422 + }
423 +
424 + if (uart_tx_stopped(port)) {
425 + bcm_uart_stop_tx(port);
426 + return;
427 + }
428 +
429 + xmit = &port->info->xmit;
430 + if (uart_circ_empty(xmit))
431 + goto txq_empty;
432 +
433 + val = bcm_uart_readl(port, UART_MCTL_REG);
434 + val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT;
435 + max_count = port->fifosize - val;
436 +
437 + while (max_count--) {
438 + unsigned int c;
439 +
440 + c = xmit->buf[xmit->tail];
441 + bcm_uart_writel(port, c, UART_FIFO_REG);
442 + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
443 + port->icount.tx++;
444 + if (uart_circ_empty(xmit))
445 + break;
446 + }
447 +
448 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
449 + uart_write_wakeup(port);
450 +
451 + if (uart_circ_empty(xmit))
452 + goto txq_empty;
453 + return;
454 +
455 +txq_empty:
456 + /* nothing to send, disable transmit interrupt */
457 + val = bcm_uart_readl(port, UART_IR_REG);
458 + val &= ~UART_TX_INT_MASK;
459 + bcm_uart_writel(port, val, UART_IR_REG);
460 + return;
461 +}
462 +
463 +/*
464 + * process uart interrupt
465 + */
466 +static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id)
467 +{
468 + struct uart_port *port;
469 + unsigned int irqstat;
470 +
471 + port = dev_id;
472 + spin_lock(&port->lock);
473 +
474 + irqstat = bcm_uart_readl(port, UART_IR_REG);
475 + if (irqstat & UART_RX_INT_STAT)
476 + bcm_uart_do_rx(port);
477 +
478 + if (irqstat & UART_TX_INT_STAT)
479 + bcm_uart_do_tx(port);
480 +
481 + if (irqstat & UART_IR_MASK(UART_IR_EXTIP)) {
482 + unsigned int estat;
483 +
484 + estat = bcm_uart_readl(port, UART_EXTINP_REG);
485 + if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS))
486 + uart_handle_cts_change(port,
487 + estat & UART_EXTINP_CTS_MASK);
488 + if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD))
489 + uart_handle_dcd_change(port,
490 + estat & UART_EXTINP_DCD_MASK);
491 + }
492 +
493 + spin_unlock(&port->lock);
494 + return IRQ_HANDLED;
495 +}
496 +
497 +/*
498 + * enable rx & tx operation on uart
499 + */
500 +static void bcm_uart_enable(struct uart_port *port)
501 +{
502 + unsigned int val;
503 +
504 + val = bcm_uart_readl(port, UART_CTL_REG);
505 + val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
506 + bcm_uart_writel(port, val, UART_CTL_REG);
507 +}
508 +
509 +/*
510 + * disable rx & tx operation on uart
511 + */
512 +static void bcm_uart_disable(struct uart_port *port)
513 +{
514 + unsigned int val;
515 +
516 + val = bcm_uart_readl(port, UART_CTL_REG);
517 + val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK |
518 + UART_CTL_RXEN_MASK);
519 + bcm_uart_writel(port, val, UART_CTL_REG);
520 +}
521 +
522 +/*
523 + * clear all unread data in rx fifo and unsent data in tx fifo
524 + */
525 +static void bcm_uart_flush(struct uart_port *port)
526 +{
527 + unsigned int val;
528 +
529 + /* empty rx and tx fifo */
530 + val = bcm_uart_readl(port, UART_CTL_REG);
531 + val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK;
532 + bcm_uart_writel(port, val, UART_CTL_REG);
533 +
534 + /* read any pending char to make sure all irq status are
535 + * cleared */
536 + (void)bcm_uart_readl(port, UART_FIFO_REG);
537 +}
538 +
539 +/*
540 + * serial core request to initialize uart and start rx operation
541 + */
542 +static int bcm_uart_startup(struct uart_port *port)
543 +{
544 + unsigned int val;
545 + int ret;
546 +
547 + /* mask all irq and flush port */
548 + bcm_uart_disable(port);
549 + bcm_uart_writel(port, 0, UART_IR_REG);
550 + bcm_uart_flush(port);
551 +
552 + /* clear any pending external input interrupt */
553 + (void)bcm_uart_readl(port, UART_EXTINP_REG);
554 +
555 + /* set rx/tx fifo thresh to fifo half size */
556 + val = bcm_uart_readl(port, UART_MCTL_REG);
557 + val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK);
558 + val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;
559 + val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;
560 + bcm_uart_writel(port, val, UART_MCTL_REG);
561 +
562 + /* set rx fifo timeout to 1 char time */
563 + val = bcm_uart_readl(port, UART_CTL_REG);
564 + val &= ~UART_CTL_RXTMOUTCNT_MASK;
565 + val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT;
566 + bcm_uart_writel(port, val, UART_CTL_REG);
567 +
568 + /* report any edge on dcd and cts */
569 + val = UART_EXTINP_INT_MASK;
570 + val |= UART_EXTINP_DCD_NOSENSE_MASK;
571 + val |= UART_EXTINP_CTS_NOSENSE_MASK;
572 + bcm_uart_writel(port, val, UART_EXTINP_REG);
573 +
574 + /* register irq and enable rx interrupts */
575 + ret = request_irq(port->irq, bcm_uart_interrupt, 0,
576 + bcm_uart_type(port), port);
577 + if (ret)
578 + return ret;
579 + bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG);
580 + bcm_uart_enable(port);
581 + return 0;
582 +}
583 +
584 +/*
585 + * serial core request to flush & disable uart
586 + */
587 +static void bcm_uart_shutdown(struct uart_port *port)
588 +{
589 + unsigned long flags;
590 +
591 + spin_lock_irqsave(&port->lock, flags);
592 + bcm_uart_writel(port, 0, UART_IR_REG);
593 + spin_unlock_irqrestore(&port->lock, flags);
594 +
595 + bcm_uart_disable(port);
596 + bcm_uart_flush(port);
597 + free_irq(port->irq, port);
598 +}
599 +
600 +/*
601 + * serial core request to change current uart setting
602 + */
603 +static void bcm_uart_set_termios(struct uart_port *port,
604 + struct ktermios *new,
605 + struct ktermios *old)
606 +{
607 + unsigned int ctl, baud, quot, ier;
608 + unsigned long flags;
609 +
610 + spin_lock_irqsave(&port->lock, flags);
611 +
612 + /* disable uart while changing speed */
613 + bcm_uart_disable(port);
614 + bcm_uart_flush(port);
615 +
616 + /* update Control register */
617 + ctl = bcm_uart_readl(port, UART_CTL_REG);
618 + ctl &= ~UART_CTL_BITSPERSYM_MASK;
619 +
620 + switch (new->c_cflag & CSIZE) {
621 + case CS5:
622 + ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT);
623 + break;
624 + case CS6:
625 + ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT);
626 + break;
627 + case CS7:
628 + ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT);
629 + break;
630 + default:
631 + ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT);
632 + break;
633 + }
634 +
635 + ctl &= ~UART_CTL_STOPBITS_MASK;
636 + if (new->c_cflag & CSTOPB)
637 + ctl |= UART_CTL_STOPBITS_2;
638 + else
639 + ctl |= UART_CTL_STOPBITS_1;
640 +
641 + ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
642 + if (new->c_cflag & PARENB)
643 + ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK);
644 + ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
645 + if (new->c_cflag & PARODD)
646 + ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK);
647 + bcm_uart_writel(port, ctl, UART_CTL_REG);
648 +
649 + /* update Baudword register */
650 + baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
651 + quot = uart_get_divisor(port, baud) - 1;
652 + bcm_uart_writel(port, quot, UART_BAUD_REG);
653 +
654 + /* update Interrupt register */
655 + ier = bcm_uart_readl(port, UART_IR_REG);
656 +
657 + ier &= ~UART_IR_MASK(UART_IR_EXTIP);
658 + if (UART_ENABLE_MS(port, new->c_cflag))
659 + ier |= UART_IR_MASK(UART_IR_EXTIP);
660 +
661 + bcm_uart_writel(port, ier, UART_IR_REG);
662 +
663 + /* update read/ignore mask */
664 + port->read_status_mask = UART_FIFO_VALID_MASK;
665 + if (new->c_iflag & INPCK) {
666 + port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
667 + port->read_status_mask |= UART_FIFO_PARERR_MASK;
668 + }
669 + if (new->c_iflag & (BRKINT))
670 + port->read_status_mask |= UART_FIFO_BRKDET_MASK;
671 +
672 + port->ignore_status_mask = 0;
673 + if (new->c_iflag & IGNPAR)
674 + port->ignore_status_mask |= UART_FIFO_PARERR_MASK;
675 + if (new->c_iflag & IGNBRK)
676 + port->ignore_status_mask |= UART_FIFO_BRKDET_MASK;
677 + if (!(new->c_cflag & CREAD))
678 + port->ignore_status_mask |= UART_FIFO_VALID_MASK;
679 +
680 + uart_update_timeout(port, new->c_cflag, baud);
681 + bcm_uart_enable(port);
682 + spin_unlock_irqrestore(&port->lock, flags);
683 +}
684 +
685 +/*
686 + * serial core request to claim uart iomem
687 + */
688 +static int bcm_uart_request_port(struct uart_port *port)
689 +{
690 + unsigned int size;
691 +
692 + size = RSET_UART_SIZE;
693 + if (!request_mem_region(port->mapbase, size, "bcm63xx")) {
694 + dev_err(port->dev, "Memory region busy\n");
695 + return -EBUSY;
696 + }
697 +
698 + port->membase = ioremap(port->mapbase, size);
699 + if (!port->membase) {
700 + dev_err(port->dev, "Unable to map registers\n");
701 + release_mem_region(port->mapbase, size);
702 + return -EBUSY;
703 + }
704 + return 0;
705 +}
706 +
707 +/*
708 + * serial core request to release uart iomem
709 + */
710 +static void bcm_uart_release_port(struct uart_port *port)
711 +{
712 + release_mem_region(port->mapbase, RSET_UART_SIZE);
713 + iounmap(port->membase);
714 +}
715 +
716 +/*
717 + * serial core request to do any port required autoconfiguration
718 + */
719 +static void bcm_uart_config_port(struct uart_port *port, int flags)
720 +{
721 + if (flags & UART_CONFIG_TYPE) {
722 + if (bcm_uart_request_port(port))
723 + return;
724 + port->type = PORT_BCM63XX;
725 + }
726 +}
727 +
728 +/*
729 + * serial core request to check that port information in serinfo are
730 + * suitable
731 + */
732 +static int bcm_uart_verify_port(struct uart_port *port,
733 + struct serial_struct *serinfo)
734 +{
735 + if (port->type != PORT_BCM63XX)
736 + return -EINVAL;
737 + if (port->irq != serinfo->irq)
738 + return -EINVAL;
739 + if (port->iotype != serinfo->io_type)
740 + return -EINVAL;
741 + if (port->mapbase != (unsigned long)serinfo->iomem_base)
742 + return -EINVAL;
743 + return 0;
744 +}
745 +
746 +/* serial core callbacks */
747 +static struct uart_ops bcm_uart_ops = {
748 + .tx_empty = bcm_uart_tx_empty,
749 + .get_mctrl = bcm_uart_get_mctrl,
750 + .set_mctrl = bcm_uart_set_mctrl,
751 + .start_tx = bcm_uart_start_tx,
752 + .stop_tx = bcm_uart_stop_tx,
753 + .stop_rx = bcm_uart_stop_rx,
754 + .enable_ms = bcm_uart_enable_ms,
755 + .break_ctl = bcm_uart_break_ctl,
756 + .startup = bcm_uart_startup,
757 + .shutdown = bcm_uart_shutdown,
758 + .set_termios = bcm_uart_set_termios,
759 + .type = bcm_uart_type,
760 + .release_port = bcm_uart_release_port,
761 + .request_port = bcm_uart_request_port,
762 + .config_port = bcm_uart_config_port,
763 + .verify_port = bcm_uart_verify_port,
764 +};
765 +
766 +
767 +
768 +#ifdef CONFIG_SERIAL_BCM63XX_CONSOLE
769 +static inline void wait_for_xmitr(struct uart_port *port)
770 +{
771 + unsigned int tmout;
772 +
773 + /* Wait up to 10ms for the character(s) to be sent. */
774 + tmout = 10000;
775 + while (--tmout) {
776 + unsigned int val;
777 +
778 + val = bcm_uart_readl(port, UART_IR_REG);
779 + if (val & UART_IR_STAT(UART_IR_TXEMPTY))
780 + break;
781 + udelay(1);
782 + }
783 +
784 + /* Wait up to 1s for flow control if necessary */
785 + if (port->flags & UPF_CONS_FLOW) {
786 + tmout = 1000000;
787 + while (--tmout) {
788 + unsigned int val;
789 +
790 + val = bcm_uart_readl(port, UART_EXTINP_REG);
791 + if (val & UART_EXTINP_CTS_MASK)
792 + break;
793 + udelay(1);
794 + }
795 + }
796 +}
797 +
798 +/*
799 + * output given char
800 + */
801 +static void bcm_console_putchar(struct uart_port *port, int ch)
802 +{
803 + wait_for_xmitr(port);
804 + bcm_uart_writel(port, ch, UART_FIFO_REG);
805 +}
806 +
807 +/*
808 + * console core request to output given string
809 + */
810 +static void bcm_console_write(struct console *co, const char *s,
811 + unsigned int count)
812 +{
813 + struct uart_port *port;
814 + unsigned long flags;
815 + int locked;
816 +
817 + port = &ports[co->index];
818 +
819 + local_irq_save(flags);
820 + if (port->sysrq) {
821 + /* bcm_uart_interrupt() already took the lock */
822 + locked = 0;
823 + } else if (oops_in_progress) {
824 + locked = spin_trylock(&port->lock);
825 + } else {
826 + spin_lock(&port->lock);
827 + locked = 1;
828 + }
829 +
830 + /* call helper to deal with \r\n */
831 + uart_console_write(port, s, count, bcm_console_putchar);
832 +
833 + /* and wait for char to be transmitted */
834 + wait_for_xmitr(port);
835 +
836 + if (locked)
837 + spin_unlock(&port->lock);
838 + local_irq_restore(flags);
839 +}
840 +
841 +/*
842 + * console core request to setup given console, find matching uart
843 + * port and setup it.
844 + */
845 +static int bcm_console_setup(struct console *co, char *options)
846 +{
847 + struct uart_port *port;
848 + int baud = 9600;
849 + int bits = 8;
850 + int parity = 'n';
851 + int flow = 'n';
852 +
853 + if (co->index < 0 || co->index >= BCM63XX_NR_UARTS)
854 + return -EINVAL;
855 + port = &ports[co->index];
856 + if (!port->membase)
857 + return -ENODEV;
858 + if (options)
859 + uart_parse_options(options, &baud, &parity, &bits, &flow);
860 +
861 + return uart_set_options(port, co, baud, parity, bits, flow);
862 +}
863 +
864 +static struct uart_driver bcm_uart_driver;
865 +
866 +static struct console bcm63xx_console = {
867 + .name = "ttyS",
868 + .write = bcm_console_write,
869 + .device = uart_console_device,
870 + .setup = bcm_console_setup,
871 + .flags = CON_PRINTBUFFER,
872 + .index = -1,
873 + .data = &bcm_uart_driver,
874 +};
875 +
876 +static int __init bcm63xx_console_init(void)
877 +{
878 + register_console(&bcm63xx_console);
879 + return 0;
880 +}
881 +
882 +console_initcall(bcm63xx_console_init);
883 +
884 +#define BCM63XX_CONSOLE &bcm63xx_console
885 +#else
886 +#define BCM63XX_CONSOLE NULL
887 +#endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */
888 +
889 +static struct uart_driver bcm_uart_driver = {
890 + .owner = THIS_MODULE,
891 + .driver_name = "bcm63xx_uart",
892 + .dev_name = "ttyS",
893 + .major = TTY_MAJOR,
894 + .minor = 64,
895 + .nr = 1,
896 + .cons = BCM63XX_CONSOLE,
897 +};
898 +
899 +/*
900 + * platform driver probe/remove callback
901 + */
902 +static int __devinit bcm_uart_probe(struct platform_device *pdev)
903 +{
904 + struct resource *res_mem, *res_irq;
905 + struct uart_port *port;
906 + struct clk *clk;
907 + int ret;
908 +
909 + if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS)
910 + return -EINVAL;
911 +
912 + if (ports[pdev->id].membase)
913 + return -EBUSY;
914 +
915 + res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
916 + if (!res_mem)
917 + return -ENODEV;
918 +
919 + res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
920 + if (!res_irq)
921 + return -ENODEV;
922 +
923 + clk = clk_get(&pdev->dev, "periph");
924 + if (IS_ERR(clk))
925 + return -ENODEV;
926 +
927 + port = &ports[pdev->id];
928 + memset(port, 0, sizeof(*port));
929 + port->iotype = UPIO_MEM;
930 + port->mapbase = res_mem->start;
931 + port->irq = res_irq->start;
932 + port->ops = &bcm_uart_ops;
933 + port->flags = UPF_BOOT_AUTOCONF;
934 + port->dev = &pdev->dev;
935 + port->fifosize = 16;
936 + port->uartclk = clk_get_rate(clk) / 2;
937 + clk_put(clk);
938 +
939 + ret = uart_add_one_port(&bcm_uart_driver, port);
940 + if (ret) {
941 + kfree(port);
942 + return ret;
943 + }
944 + platform_set_drvdata(pdev, port);
945 + return 0;
946 +}
947 +
948 +static int __devexit bcm_uart_remove(struct platform_device *pdev)
949 +{
950 + struct uart_port *port;
951 +
952 + port = platform_get_drvdata(pdev);
953 + uart_remove_one_port(&bcm_uart_driver, port);
954 + platform_set_drvdata(pdev, NULL);
955 + /* mark port as free */
956 + ports[pdev->id].membase = 0;
957 + return 0;
958 +}
959 +
960 +/*
961 + * platform driver stuff
962 + */
963 +static struct platform_driver bcm_uart_platform_driver = {
964 + .probe = bcm_uart_probe,
965 + .remove = __devexit_p(bcm_uart_remove),
966 + .driver = {
967 + .owner = THIS_MODULE,
968 + .name = "bcm63xx_uart",
969 + },
970 +};
971 +
972 +static int __init bcm_uart_init(void)
973 +{
974 + int ret;
975 +
976 + ret = uart_register_driver(&bcm_uart_driver);
977 + if (ret)
978 + return ret;
979 +
980 + ret = platform_driver_register(&bcm_uart_platform_driver);
981 + if (ret)
982 + uart_unregister_driver(&bcm_uart_driver);
983 +
984 + return ret;
985 +}
986 +
987 +static void __exit bcm_uart_exit(void)
988 +{
989 + platform_driver_unregister(&bcm_uart_platform_driver);
990 + uart_unregister_driver(&bcm_uart_driver);
991 +}
992 +
993 +module_init(bcm_uart_init);
994 +module_exit(bcm_uart_exit);
995 +
996 +MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
997 +MODULE_DESCRIPTION("Broadcom 63<xx integrated uart driver");
998 +MODULE_LICENSE("GPL");
999 --- /dev/null
1000 +++ b/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h
1001 @@ -0,0 +1,6 @@
1002 +#ifndef BCM63XX_DEV_UART_H_
1003 +#define BCM63XX_DEV_UART_H_
1004 +
1005 +int bcm63xx_uart_register(void);
1006 +
1007 +#endif /* BCM63XX_DEV_UART_H_ */
1008 --- a/include/linux/serial_core.h
1009 +++ b/include/linux/serial_core.h
1010 @@ -155,6 +155,8 @@
1011
1012 #define PORT_SC26XX 82
1013
1014 +#define PORT_BCM63XX 83
1015 +
1016 #ifdef __KERNEL__
1017
1018 #include <linux/compiler.h>
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