a36d2d09d7762795d9fa6a54d620e614726c928c
[openwrt.git] / target / linux / ar71xx / files / arch / mips / ar71xx / mach-dir-825-b1.c
1 /*
2 * D-Link DIR-825 rev. B1 board support
3 *
4 * Copyright (C) 2009 Lukas Kuna, Evkanet, s.r.o.
5 *
6 * based on mach-wndr3700.c
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/delay.h>
17 #include <linux/rtl8366s.h>
18
19 #include <asm/mach-ar71xx/ar71xx.h>
20
21 #include "machtype.h"
22 #include "devices.h"
23 #include "dev-m25p80.h"
24 #include "dev-ap94-pci.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-usb.h"
28
29 #define DIR825B1_GPIO_LED_BLUE_USB 0
30 #define DIR825B1_GPIO_LED_ORANGE_POWER 1
31 #define DIR825B1_GPIO_LED_BLUE_POWER 2
32 #define DIR825B1_GPIO_LED_BLUE_POWERSAVE 4
33 #define DIR825B1_GPIO_LED_ORANGE_PLANET 6
34 #define DIR825B1_GPIO_LED_BLUE_PLANET 11
35
36 #define DIR825B1_GPIO_BTN_RESET 3
37 #define DIR825B1_GPIO_BTN_POWERSAVE 8
38
39 #define DIR825B1_GPIO_RTL8366_SDA 5
40 #define DIR825B1_GPIO_RTL8366_SCK 7
41
42 #define DIR825B1_BUTTONS_POLL_INTERVAL 20
43
44 #define DIR825B1_CAL_LOCATION_0 0x1f661000
45 #define DIR825B1_CAL_LOCATION_1 0x1f665000
46
47 #define DIR825B1_MAC_LOCATION_0 0x2ffa81b8
48 #define DIR825B1_MAC_LOCATION_1 0x2ffa8370
49
50 #ifdef CONFIG_MTD_PARTITIONS
51 static struct mtd_partition dir825b1_partitions[] = {
52 {
53 .name = "uboot",
54 .offset = 0,
55 .size = 0x040000,
56 .mask_flags = MTD_WRITEABLE,
57 }, {
58 .name = "config",
59 .offset = 0x040000,
60 .size = 0x010000,
61 .mask_flags = MTD_WRITEABLE,
62 }, {
63 .name = "firmware",
64 .offset = 0x050000,
65 .size = 0x610000,
66 }, {
67 .name = "caldata",
68 .offset = 0x660000,
69 .size = 0x010000,
70 .mask_flags = MTD_WRITEABLE,
71 }, {
72 .name = "unknown",
73 .offset = 0x670000,
74 .size = 0x190000,
75 .mask_flags = MTD_WRITEABLE,
76 }
77 };
78 #endif /* CONFIG_MTD_PARTITIONS */
79
80 static struct flash_platform_data dir825b1_flash_data = {
81 #ifdef CONFIG_MTD_PARTITIONS
82 .parts = dir825b1_partitions,
83 .nr_parts = ARRAY_SIZE(dir825b1_partitions),
84 #endif
85 };
86
87 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
88 {
89 .name = "dir825b1:blue:usb",
90 .gpio = DIR825B1_GPIO_LED_BLUE_USB,
91 .active_low = 1,
92 }, {
93 .name = "dir825b1:orange:power",
94 .gpio = DIR825B1_GPIO_LED_ORANGE_POWER,
95 .active_low = 1,
96 }, {
97 .name = "dir825b1:blue:power",
98 .gpio = DIR825B1_GPIO_LED_BLUE_POWER,
99 .active_low = 1,
100 }, {
101 .name = "dir825b1:blue:powersave",
102 .gpio = DIR825B1_GPIO_LED_BLUE_POWERSAVE,
103 .active_low = 1,
104 }, {
105 .name = "dir825b1:orange:planet",
106 .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET,
107 .active_low = 1,
108 }, {
109 .name = "dir825b1:blue:planet",
110 .gpio = DIR825B1_GPIO_LED_BLUE_PLANET,
111 .active_low = 1,
112 }
113 };
114
115 static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
116 {
117 .desc = "reset",
118 .type = EV_KEY,
119 .code = KEY_RESTART,
120 .threshold = 3,
121 .gpio = DIR825B1_GPIO_BTN_RESET,
122 .active_low = 1,
123 }, {
124 .desc = "powersave",
125 .type = EV_KEY,
126 .code = BTN_1,
127 .threshold = 3,
128 .gpio = DIR825B1_GPIO_BTN_POWERSAVE,
129 .active_low = 1,
130 }
131 };
132
133 static struct rtl8366s_platform_data dir825b1_rtl8366s_data = {
134 .gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
135 .gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
136 };
137
138 static struct platform_device dir825b1_rtl8366s_device = {
139 .name = RTL8366S_DRIVER_NAME,
140 .id = -1,
141 .dev = {
142 .platform_data = &dir825b1_rtl8366s_data,
143 }
144 };
145
146 static void __init dir825b1_setup(void)
147 {
148 u8 *mac = (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_1);
149
150 ar71xx_add_device_mdio(0x0);
151
152 ar71xx_init_mac(ar71xx_eth0_data.mac_addr, mac, 1);
153 ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
154 ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
155 ar71xx_eth0_data.speed = SPEED_1000;
156 ar71xx_eth0_data.duplex = DUPLEX_FULL;
157 ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
158
159 ar71xx_init_mac(ar71xx_eth1_data.mac_addr, mac, 2);
160 ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
161 ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
162 ar71xx_eth1_data.phy_mask = 0x10;
163 ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
164
165 ar71xx_add_device_eth(0);
166 ar71xx_add_device_eth(1);
167
168 ar71xx_add_device_m25p80(&dir825b1_flash_data);
169
170 ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
171 dir825b1_leds_gpio);
172
173 ar71xx_add_device_gpio_buttons(-1, DIR825B1_BUTTONS_POLL_INTERVAL,
174 ARRAY_SIZE(dir825b1_gpio_buttons),
175 dir825b1_gpio_buttons);
176
177 ar71xx_add_device_usb();
178
179 platform_device_register(&dir825b1_rtl8366s_device);
180
181 ap94_pci_setup_wmac_led_pin(0, 5);
182 ap94_pci_setup_wmac_led_pin(1, 5);
183
184 ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
185 (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_0),
186 (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1),
187 (u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_1));
188 }
189
190 MIPS_MACHINE(AR71XX_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
191 dir825b1_setup);
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