a3d1f5114be9f1580a7ad930b2bc694826a34032
5 #include <linux/device.h>
6 #include <linux/list.h>
7 #include <linux/types.h>
8 #include <linux/spinlock.h>
9 #ifdef CONFIG_SSB_PCIHOST
10 # include <linux/pci.h>
13 #include <linux/ssb/ssb_regs.h>
22 u16 pci_spid
; /* Subsystem Product ID for PCI */
23 u16 pci_svid
; /* Subsystem Vendor ID for PCI */
24 u16 pci_pid
; /* Product ID for PCI */
25 u8 il0mac
[6]; /* MAC address for 802.11b/g */
26 u8 et0mac
[6]; /* MAC address for Ethernet */
27 u8 et1mac
[6]; /* MAC address for 802.11a */
28 u8 et0phyaddr
:5; /* MII address for enet0 */
29 u8 et1phyaddr
:5; /* MII address for enet1 */
30 u8 et0mdcport
:1; /* MDIO for enet0 */
31 u8 et1mdcport
:1; /* MDIO for enet1 */
32 u8 board_rev
; /* Board revision */
33 u8 country_code
:4; /* Country Code */
34 u8 antenna_a
:2; /* Antenna 0/1 available for A-PHY */
35 u8 antenna_bg
:2; /* Antenna 0/1 available for B-PHY and G-PHY */
42 u8 gpio0
; /* GPIO pin 0 */
43 u8 gpio1
; /* GPIO pin 1 */
44 u8 gpio2
; /* GPIO pin 2 */
45 u8 gpio3
; /* GPIO pin 3 */
46 u16 maxpwr_a
; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */
47 u16 maxpwr_bg
; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */
48 u8 itssi_a
; /* Idle TSSI Target for A-PHY */
49 u8 itssi_bg
; /* Idle TSSI Target for B/G-PHY */
50 u16 boardflags_lo
; /* Boardflags (low 16 bits) */
51 u8 antenna_gain_a
; /* A-PHY Antenna gain (in dBm Q5.2) */
52 u8 antenna_gain_bg
; /* B/G-PHY Antenna gain (in dBm Q5.2) */
53 u8 oem
[8]; /* OEM string (rev 1 only) */
57 u16 boardflags_hi
; /* Boardflags (high 16 bits) */
58 u8 maxpwr_a_lo
; /* A-PHY Max Power Low */
59 u8 maxpwr_a_hi
; /* A-PHY Max Power High */
60 u16 pa1lob0
; /* A-PHY PA Low Settings */
61 u16 pa1lob1
; /* A-PHY PA Low Settings */
62 u16 pa1lob2
; /* A-PHY PA Low Settings */
63 u16 pa1hib0
; /* A-PHY PA High Settings */
64 u16 pa1hib1
; /* A-PHY PA High Settings */
65 u16 pa1hib2
; /* A-PHY PA High Settings */
66 u8 ofdm_pwr_off
; /* OFDM Power Offset from CCK Level */
67 u8 country_str
[2]; /* Two char Country Code */
71 u32 ofdmapo
; /* A-PHY OFDM Mid Power Offset */
72 u32 ofdmalpo
; /* A-PHY OFDM Low Power Offset */
73 u32 ofdmahpo
; /* A-PHY OFDM High Power Offset */
74 u8 gpioldc_on_cnt
; /* GPIO LED Powersave Duty Cycle ON count */
75 u8 gpioldc_off_cnt
; /* GPIO LED Powersave Duty Cycle OFF count */
76 u8 cckpo_1M
:4; /* CCK Power Offset for Rate 1M */
77 u8 cckpo_2M
:4; /* CCK Power Offset for Rate 2M */
78 u8 cckpo_55M
:4; /* CCK Power Offset for Rate 5.5M */
79 u8 cckpo_11M
:4; /* CCK Power Offset for Rate 11M */
80 u32 ofdmgpo
; /* G-PHY OFDM Power Offset */
90 /* The valid r# fields are selected by the "revision".
91 * Revision 3 and lower inherit from lower revisions.
95 struct ssb_sprom_r1 r1
;
96 struct ssb_sprom_r2 r2
;
97 struct ssb_sprom_r3 r3
;
99 struct ssb_sprom_r4 r4
;
103 /* Information about the PCB the circuitry is soldered on. */
104 struct ssb_boardinfo
{
112 /* Lowlevel read/write operations on the device MMIO.
113 * Internal, don't use that outside of ssb. */
115 u16 (*read16
)(struct ssb_device
*dev
, u16 offset
);
116 u32 (*read32
)(struct ssb_device
*dev
, u16 offset
);
117 void (*write16
)(struct ssb_device
*dev
, u16 offset
, u16 value
);
118 void (*write32
)(struct ssb_device
*dev
, u16 offset
, u32 value
);
122 /* Core-ID values. */
123 #define SSB_DEV_CHIPCOMMON 0x800
124 #define SSB_DEV_ILINE20 0x801
125 #define SSB_DEV_SDRAM 0x803
126 #define SSB_DEV_PCI 0x804
127 #define SSB_DEV_MIPS 0x805
128 #define SSB_DEV_ETHERNET 0x806
129 #define SSB_DEV_V90 0x807
130 #define SSB_DEV_USB11_HOSTDEV 0x808
131 #define SSB_DEV_ADSL 0x809
132 #define SSB_DEV_ILINE100 0x80A
133 #define SSB_DEV_IPSEC 0x80B
134 #define SSB_DEV_PCMCIA 0x80D
135 #define SSB_DEV_INTERNAL_MEM 0x80E
136 #define SSB_DEV_MEMC_SDRAM 0x80F
137 #define SSB_DEV_EXTIF 0x811
138 #define SSB_DEV_80211 0x812
139 #define SSB_DEV_MIPS_3302 0x816
140 #define SSB_DEV_USB11_HOST 0x817
141 #define SSB_DEV_USB11_DEV 0x818
142 #define SSB_DEV_USB20_HOST 0x819
143 #define SSB_DEV_USB20_DEV 0x81A
144 #define SSB_DEV_SDIO_HOST 0x81B
145 #define SSB_DEV_ROBOSWITCH 0x81C
146 #define SSB_DEV_PARA_ATA 0x81D
147 #define SSB_DEV_SATA_XORDMA 0x81E
148 #define SSB_DEV_ETHERNET_GBIT 0x81F
149 #define SSB_DEV_PCIE 0x820
150 #define SSB_DEV_MIMO_PHY 0x821
151 #define SSB_DEV_SRAM_CTRLR 0x822
152 #define SSB_DEV_MINI_MACPHY 0x823
153 #define SSB_DEV_ARM_1176 0x824
154 #define SSB_DEV_ARM_7TDMI 0x825
156 /* Vendor-ID values */
157 #define SSB_VENDOR_BROADCOM 0x4243
159 struct ssb_device_id
{
164 #define SSB_DEVICE(_vendor, _coreid, _revision) \
165 { .vendor = _vendor, .coreid = _coreid, .revision = _revision, }
166 #define SSB_DEVTABLE_END \
169 #define SSB_ANY_VENDOR 0xFFFF
170 #define SSB_ANY_ID 0xFFFF
171 #define SSB_ANY_REV 0xFF
173 /* Some kernel subsystems poke with dev->drvdata, so we must use the
174 * following ugly workaround to get from struct device to struct ssb_device */
175 struct __ssb_dev_wrapper
{
177 struct ssb_device
*sdev
;
181 /* Having a copy of the ops pointer in each dev struct
182 * is an optimization. */
183 const struct ssb_bus_ops
*ops
;
187 struct ssb_device_id id
;
192 /* Internal-only stuff follows. */
193 void *drvdata
; /* Per-device data */
194 void *devtypedata
; /* Per-devicetype (eg 802.11) data */
197 /* Go from struct device to struct ssb_device. */
199 struct ssb_device
* dev_to_ssb_dev(struct device
*dev
)
201 struct __ssb_dev_wrapper
*wrap
= container_of(dev
, struct __ssb_dev_wrapper
, dev
);
205 /* Device specific user data */
207 void ssb_set_drvdata(struct ssb_device
*dev
, void *data
)
212 void * ssb_get_drvdata(struct ssb_device
*dev
)
217 /* Devicetype specific user data. This is per device-type (not per device) */
218 void ssb_set_devtypedata(struct ssb_device
*dev
, void *data
);
220 void * ssb_get_devtypedata(struct ssb_device
*dev
)
222 return dev
->devtypedata
;
228 const struct ssb_device_id
*id_table
;
230 int (*probe
)(struct ssb_device
*dev
, const struct ssb_device_id
*id
);
231 void (*remove
)(struct ssb_device
*dev
);
232 int (*suspend
)(struct ssb_device
*dev
, pm_message_t state
);
233 int (*resume
)(struct ssb_device
*dev
);
234 void (*shutdown
)(struct ssb_device
*dev
);
236 struct device_driver drv
;
238 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
240 extern int __ssb_driver_register(struct ssb_driver
*drv
, struct module
*owner
);
241 static inline int ssb_driver_register(struct ssb_driver
*drv
)
243 return __ssb_driver_register(drv
, THIS_MODULE
);
245 extern void ssb_driver_unregister(struct ssb_driver
*drv
);
251 SSB_BUSTYPE_SSB
, /* This SSB bus is the system bus */
252 SSB_BUSTYPE_PCI
, /* SSB is connected to PCI bus */
253 SSB_BUSTYPE_PCMCIA
, /* SSB is connected to PCMCIA bus */
257 #define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
258 #define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
259 #define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
261 #define SSB_BOARD_BCM94306MP 0x0418
262 #define SSB_BOARD_BCM4309G 0x0421
263 #define SSB_BOARD_BCM4306CB 0x0417
264 #define SSB_BOARD_BCM4309MP 0x040C
265 #define SSB_BOARD_MP4318 0x044A
266 #define SSB_BOARD_BU4306 0x0416
267 #define SSB_BOARD_BU4309 0x040A
269 #define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
270 #define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
271 #define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
273 #include <linux/ssb/ssb_driver_chipcommon.h>
274 #include <linux/ssb/ssb_driver_mips.h>
275 #include <linux/ssb/ssb_driver_extif.h>
276 #include <linux/ssb/ssb_driver_pci.h>
282 const struct ssb_bus_ops
*ops
;
284 /* The core in the basic address register window. (PCI bus only) */
285 struct ssb_device
*mapped_device
;
286 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
287 u8 mapped_pcmcia_seg
;
288 /* Lock for core and segment switching. */
291 /* The bus this backplane is running on. */
292 enum ssb_bustype bustype
;
293 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
294 struct pci_dev
*host_pci
;
295 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
296 struct pcmcia_device
*host_pcmcia
;
298 #ifdef CONFIG_SSB_PCIHOST
299 struct mutex pci_sprom_mutex
;
302 /* ID information about the Chip. */
307 /* List of devices (cores) on the backplane. */
308 struct ssb_device devices
[SSB_MAX_NR_CORES
];
311 /* Reference count. Number of suspended devices. */
314 /* Software ID number for this bus. */
315 unsigned int busnumber
;
317 /* The ChipCommon device (if available). */
318 struct ssb_chipcommon chipco
;
319 /* The PCI-core device (if available). */
320 struct ssb_pcicore pcicore
;
321 /* The MIPS-core device (if available). */
322 struct ssb_mipscore mipscore
;
323 /* The EXTif-core device (if available). */
324 struct ssb_extif extif
;
326 /* The following structure elements are not available in early
327 * SSB initialization. Though, they are available for regular
328 * registered drivers at any stage. So be careful when
329 * using them in the ssb core code. */
331 /* ID information about the PCB. */
332 struct ssb_boardinfo boardinfo
;
333 /* Contents of the SPROM. */
334 struct ssb_sprom sprom
;
337 struct list_head list
;
340 /* The initialization-invariants. */
341 struct ssb_init_invariants
{
342 struct ssb_boardinfo boardinfo
;
343 struct ssb_sprom sprom
;
346 /* Register a SSB system bus. get_invariants() is called after the
347 * basic system devices are initialized.
348 * The invariants are usually fetched from some NVRAM.
349 * Put the invariants into the struct pointed to by iv. */
350 extern int ssb_bus_ssbbus_register(struct ssb_bus
*bus
,
351 unsigned long baseaddr
,
352 int (*get_invariants
)(struct ssb_bus
*bus
,
353 struct ssb_init_invariants
*iv
));
354 #ifdef CONFIG_SSB_PCIHOST
355 extern int ssb_bus_pcibus_register(struct ssb_bus
*bus
,
356 struct pci_dev
*host_pci
);
357 #endif /* CONFIG_SSB_PCIHOST */
358 #ifdef CONFIG_SSB_PCMCIAHOST
359 extern int ssb_bus_pcmciabus_register(struct ssb_bus
*bus
,
360 struct pcmcia_device
*pcmcia_dev
,
361 unsigned long baseaddr
);
362 #endif /* CONFIG_SSB_PCMCIAHOST */
364 extern void ssb_bus_unregister(struct ssb_bus
*bus
);
366 extern u32
ssb_clockspeed(struct ssb_bus
*bus
);
368 int ssb_device_is_enabled(struct ssb_device
*dev
);
369 void ssb_device_enable(struct ssb_device
*dev
, u32 core_specific_flags
);
370 void ssb_device_disable(struct ssb_device
*dev
, u32 core_specific_flags
);
373 /* Device MMIO register read/write functions. */
374 static inline u16
ssb_read16(struct ssb_device
*dev
, u16 offset
)
376 return dev
->ops
->read16(dev
, offset
);
378 static inline u32
ssb_read32(struct ssb_device
*dev
, u16 offset
)
380 return dev
->ops
->read32(dev
, offset
);
382 static inline void ssb_write16(struct ssb_device
*dev
, u16 offset
, u16 value
)
384 dev
->ops
->write16(dev
, offset
, value
);
386 static inline void ssb_write32(struct ssb_device
*dev
, u16 offset
, u32 value
)
388 dev
->ops
->write32(dev
, offset
, value
);
392 /* Translation (routing) bits that need to be ORed to DMA
393 * addresses before they are given to a device. */
394 extern u32
ssb_dma_translation(struct ssb_device
*dev
);
395 #define SSB_DMA_TRANSLATION_MASK 0xC0000000
396 #define SSB_DMA_TRANSLATION_SHIFT 30
398 extern int ssb_dma_set_mask(struct ssb_device
*ssb_dev
, u64 mask
);
401 #ifdef CONFIG_SSB_PCIHOST
402 /* PCI-host wrapper driver */
403 extern int ssb_pcihost_register(struct pci_driver
*driver
);
404 static inline void ssb_pcihost_unregister(struct pci_driver
*driver
)
406 pci_unregister_driver(driver
);
408 #endif /* CONFIG_SSB_PCIHOST */
411 /* Bus-Power handling functions. */
412 extern int ssb_bus_may_powerdown(struct ssb_bus
*bus
);
413 extern int ssb_bus_powerup(struct ssb_bus
*bus
, int dynamic_pctl
);
416 /* Various helper functions */
417 extern u32
ssb_admatch_base(u32 adm
);
418 extern u32
ssb_admatch_size(u32 adm
);
421 #endif /* __KERNEL__ */
422 #endif /* LINUX_SSB_H_ */
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