ar71xx: check returned value of ioremap in ar71xx_pcibios_setup
[openwrt.git] / target / linux / ramips / patches-2.6.32 / 101-rt288x_serial_driver_hack.patch
1 --- a/drivers/serial/8250.c
2 +++ b/drivers/serial/8250.c
3 @@ -298,9 +298,9 @@ static const struct serial8250_config ua
4 },
5 };
6
7 -#if defined (CONFIG_SERIAL_8250_AU1X00)
8 +#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
9
10 -/* Au1x00 UART hardware has a weird register layout */
11 +/* Au1x00 and RT288x UART hardware has a weird register layout */
12 static const u8 au_io_in_map[] = {
13 [UART_RX] = 0,
14 [UART_IER] = 2,
15 @@ -418,7 +418,7 @@ static unsigned int mem32_serial_in(stru
16 return readl(p->membase + offset);
17 }
18
19 -#ifdef CONFIG_SERIAL_8250_AU1X00
20 +#if defined(CONFIG_SERIAL_8250_AU1X00) || defined(CONFIG_SERIAL_8250_RT288X)
21 static unsigned int au_serial_in(struct uart_port *p, int offset)
22 {
23 offset = map_8250_in_reg(p, offset) << p->regshift;
24 @@ -499,7 +499,7 @@ static void set_io_from_upio(struct uart
25 p->serial_out = mem32_serial_out;
26 break;
27
28 -#ifdef CONFIG_SERIAL_8250_AU1X00
29 +#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
30 case UPIO_AU:
31 p->serial_in = au_serial_in;
32 p->serial_out = au_serial_out;
33 @@ -531,7 +531,7 @@ serial_out_sync(struct uart_8250_port *u
34 switch (p->iotype) {
35 case UPIO_MEM:
36 case UPIO_MEM32:
37 -#ifdef CONFIG_SERIAL_8250_AU1X00
38 +#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
39 case UPIO_AU:
40 #endif
41 case UPIO_DWAPB:
42 @@ -569,8 +569,8 @@ static inline void _serial_dl_write(stru
43 serial_outp(up, UART_DLM, value >> 8 & 0xff);
44 }
45
46 -#if defined(CONFIG_SERIAL_8250_AU1X00)
47 -/* Au1x00 haven't got a standard divisor latch */
48 +#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
49 +/* Au1x00 and RT288x haven't got a standard divisor latch */
50 static int serial_dl_read(struct uart_8250_port *up)
51 {
52 if (up->port.iotype == UPIO_AU)
53 @@ -777,22 +777,19 @@ static int size_fifo(struct uart_8250_po
54 */
55 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
56 {
57 - unsigned char old_dll, old_dlm, old_lcr;
58 + unsigned char old_lcr;
59 + unsigned int old_dl;
60 unsigned int id;
61
62 old_lcr = serial_inp(p, UART_LCR);
63 serial_outp(p, UART_LCR, UART_LCR_DLAB);
64
65 - old_dll = serial_inp(p, UART_DLL);
66 - old_dlm = serial_inp(p, UART_DLM);
67 + old_dl = serial_dl_read(p);
68
69 - serial_outp(p, UART_DLL, 0);
70 - serial_outp(p, UART_DLM, 0);
71 + serial_dl_write(p, 0);
72 + id = serial_dl_read(p);
73
74 - id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
75 -
76 - serial_outp(p, UART_DLL, old_dll);
77 - serial_outp(p, UART_DLM, old_dlm);
78 + serial_dl_write(p, old_dl);
79 serial_outp(p, UART_LCR, old_lcr);
80
81 return id;
82 @@ -1214,7 +1211,7 @@ static void autoconfig(struct uart_8250_
83 }
84 #endif
85
86 -#ifdef CONFIG_SERIAL_8250_AU1X00
87 +#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
88 /* if access method is AU, it is a 16550 with a quirk */
89 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
90 up->bugs |= UART_BUG_NOMSR;
91 --- a/drivers/serial/Kconfig
92 +++ b/drivers/serial/Kconfig
93 @@ -266,6 +266,14 @@ config SERIAL_8250_AU1X00
94 say Y to this option. The driver can handle up to 4 serial ports,
95 depending on the SOC. If unsure, say N.
96
97 +config SERIAL_8250_RT288X
98 + bool "Ralink RT288x/RT305x serial port support"
99 + depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X)
100 + help
101 + If you have a Ralink RT288x/RT305x SoC based board and want to use the
102 + serial port, say Y to this option. The driver can handle up to 2 serial
103 + ports. If unsure, say N.
104 +
105 config SERIAL_8250_RM9K
106 bool "Support for MIPS RM9xxx integrated serial port"
107 depends on SERIAL_8250 != n && SERIAL_RM9000
108 --- a/include/linux/serial_core.h
109 +++ b/include/linux/serial_core.h
110 @@ -281,7 +281,7 @@ struct uart_port {
111 #define UPIO_HUB6 (1)
112 #define UPIO_MEM (2)
113 #define UPIO_MEM32 (3)
114 -#define UPIO_AU (4) /* Au1x00 type IO */
115 +#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
116 #define UPIO_TSI (5) /* Tsi108/109 type IO */
117 #define UPIO_DWAPB (6) /* DesignWare APB UART */
118 #define UPIO_RM9000 (7) /* RM9000 type IO */
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