target/linux/ramips/files/arch/mips/ralink/rt288x/rt288x.c

   1 /*
   2  * Ralink RT288x SoC specific setup
   3  *
   4  * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  * Parts of this file are based on Ralink's 2.6.21 BSP
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License version 2 as published
  11  * by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/gpio.h>
  18
  19 #include <asm/mach-ralink/common.h>
  20 #include <asm/mach-ralink/rt288x.h>
  21 #include <asm/mach-ralink/rt288x_regs.h>
  22
  23 unsigned long rt288x_cpu_freq;
  24 EXPORT_SYMBOL_GPL(rt288x_cpu_freq);
  25
  26 unsigned long rt288x_sys_freq;
  27 EXPORT_SYMBOL_GPL(rt288x_sys_freq);
  28
  29 void __iomem * rt288x_sysc_base;
  30 void __iomem * rt288x_memc_base;
  31
  32 void __init rt288x_detect_sys_type(void)
  33 {
  34         u32 n0;
  35         u32 n1;
  36         u32 id;
  37
  38         n0 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME0);
  39         n1 = rt288x_sysc_rr(SYSC_REG_CHIP_NAME1);
  40         id = rt288x_sysc_rr(SYSC_REG_CHIP_ID);
  41
  42         snprintf(ramips_sys_type, RAMIPS_SYS_TYPE_LEN,
  43                 "Ralink %c%c%c%c%c%c%c%c id:%u rev:%u",
  44                 (char) (n0 & 0xff), (char) ((n0 >> 8) & 0xff),
  45                 (char) ((n0 >> 16) & 0xff), (char) ((n0 >> 24) & 0xff),
  46                 (char) (n1 & 0xff), (char) ((n1 >> 8) & 0xff),
  47                 (char) ((n1 >> 16) & 0xff), (char) ((n1 >> 24) & 0xff),
  48                 (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
  49                 (id & CHIP_ID_REV_MASK));
  50 }
  51
  52 void __init rt288x_detect_sys_freq(void)
  53 {
  54         u32     t;
  55
  56         t = rt288x_sysc_rr(SYSC_REG_SYSTEM_CONFIG);
  57         t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK);
  58
  59         switch (t) {
  60         case SYSTEM_CONFIG_CPUCLK_250:
  61                 rt288x_cpu_freq = 250000000;
  62                 break;
  63         case SYSTEM_CONFIG_CPUCLK_266:
  64                 rt288x_cpu_freq = 266666667;
  65                 break;
  66         case SYSTEM_CONFIG_CPUCLK_280:
  67                 rt288x_cpu_freq = 280000000;
  68                 break;
  69         case SYSTEM_CONFIG_CPUCLK_300:
  70                 rt288x_cpu_freq = 300000000;
  71                 break;
  72         }
  73
  74         rt288x_sys_freq = rt288x_cpu_freq / 2;
  75 }
  76
  77 static void rt288x_gpio_reserve(int first, int last)
  78 {
  79         for (; first <= last; first++)
  80                 gpio_request(first, "reserved");
  81 }
  82
  83 void __init rt288x_gpio_init(u32 mode)
  84 {
  85         rt288x_sysc_wr(mode, SYSC_REG_GPIO_MODE);
  86
  87         ramips_gpio_init();
  88         if ((mode & RT2880_GPIO_MODE_I2C) == 0)
  89                 rt288x_gpio_reserve(1, 2);
  90
  91         if ((mode & RT2880_GPIO_MODE_SPI) == 0)
  92                 rt288x_gpio_reserve(3, 6);
  93
  94         if ((mode & RT2880_GPIO_MODE_UART0) == 0)
  95                 rt288x_gpio_reserve(7, 14);
  96
  97         if ((mode & RT2880_GPIO_MODE_JTAG) == 0)
  98                 rt288x_gpio_reserve(17, 21);
  99
 100         if ((mode & RT2880_GPIO_MODE_MDIO) == 0)
 101                 rt288x_gpio_reserve(22, 23);
 102
 103         if ((mode & RT2880_GPIO_MODE_SDRAM) == 0)
 104                 rt288x_gpio_reserve(24, 39);
 105
 106         if ((mode & RT2880_GPIO_MODE_PCI) == 0)
 107                 rt288x_gpio_reserve(40, 71);
 108 }