projects / openwrt.git / blob
? search:


bdc0cdedd085483cfb94e29f4b8bbaa0f4261abb
[openwrt.git] / target / linux / generic-2.4 / patches / 000-linux_mips.patch
1 Index: linux-2.4.35.4/arch/mips/au1000/common/au1xxx_irqmap.c
2 ===================================================================
3 --- linux-2.4.35.4.orig/arch/mips/au1000/common/au1xxx_irqmap.c 2007-12-15 05:19:42.862863653 +0100
4 +++ linux-2.4.35.4/arch/mips/au1000/common/au1xxx_irqmap.c 2007-12-15 05:19:44.782973074 +0100
5 @@ -172,14 +172,14 @@
6 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
7 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
8 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
9 - { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
10 - { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
11 - { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
12 - { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
13 - { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
14 - { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
15 - { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
16 - { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
17 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
18 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
19 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
20 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
21 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
22 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
23 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
24 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
25 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
26 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
27 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
28 @@ -200,14 +200,14 @@
29 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
30 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
31 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
32 - { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
33 - { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
34 - { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
35 - { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
36 - { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
37 - { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
38 - { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
39 - { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
40 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
41 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
42 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
43 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
44 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
45 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
46 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
47 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
48 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
49 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
50 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
51 Index: linux-2.4.35.4/arch/mips/au1000/common/cputable.c
52 ===================================================================
53 --- linux-2.4.35.4.orig/arch/mips/au1000/common/cputable.c 2007-12-15 05:19:42.870864109 +0100
54 +++ linux-2.4.35.4/arch/mips/au1000/common/cputable.c 2007-12-15 05:19:44.786973303 +0100
55 @@ -39,7 +39,8 @@
56 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
57 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
58 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
59 - { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
60 + { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
61 + { 0xffffffff, 0x04030201, "Au1200 AC", 0, 0 },
62 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
63 };
64
65 Index: linux-2.4.35.4/arch/mips/au1000/common/dbdma.c
66 ===================================================================
67 --- linux-2.4.35.4.orig/arch/mips/au1000/common/dbdma.c 2007-12-15 05:19:42.878864567 +0100
68 +++ linux-2.4.35.4/arch/mips/au1000/common/dbdma.c 2007-12-15 05:19:44.786973303 +0100
69 @@ -41,6 +41,8 @@
70 #include <asm/au1xxx_dbdma.h>
71 #include <asm/system.h>
72
73 +#include <linux/module.h>
74 +
75 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
76
77 /*
78 @@ -60,37 +62,10 @@
79 */
80 #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
81
82 -static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
83 -static int dbdma_initialized;
84 +static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
85 +static int dbdma_initialized=0;
86 static void au1xxx_dbdma_init(void);
87
88 -typedef struct dbdma_device_table {
89 - u32 dev_id;
90 - u32 dev_flags;
91 - u32 dev_tsize;
92 - u32 dev_devwidth;
93 - u32 dev_physaddr; /* If FIFO */
94 - u32 dev_intlevel;
95 - u32 dev_intpolarity;
96 -} dbdev_tab_t;
97 -
98 -typedef struct dbdma_chan_config {
99 - u32 chan_flags;
100 - u32 chan_index;
101 - dbdev_tab_t *chan_src;
102 - dbdev_tab_t *chan_dest;
103 - au1x_dma_chan_t *chan_ptr;
104 - au1x_ddma_desc_t *chan_desc_base;
105 - au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
106 - void *chan_callparam;
107 - void (*chan_callback)(int, void *, struct pt_regs *);
108 -} chan_tab_t;
109 -
110 -#define DEV_FLAGS_INUSE (1 << 0)
111 -#define DEV_FLAGS_ANYUSE (1 << 1)
112 -#define DEV_FLAGS_OUT (1 << 2)
113 -#define DEV_FLAGS_IN (1 << 3)
114 -
115 static dbdev_tab_t dbdev_tab[] = {
116 #ifdef CONFIG_SOC_AU1550
117 /* UARTS */
118 @@ -156,13 +131,13 @@
119 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
120 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
121
122 - { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
123 - { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
124 - { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
125 - { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
126 + { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
127 + { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
128 + { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
129 + { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
130
131 - { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
132 - { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
133 + { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
134 + { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
135
136 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
137 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
138 @@ -172,9 +147,9 @@
139 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
140 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
141
142 - { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
143 - { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
144 - { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
145 + { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
146 + { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
147 + { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
148 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
149
150 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
151 @@ -183,6 +158,24 @@
152
153 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
154 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
155 +
156 + /* Provide 16 user definable device types */
157 + { 0, 0, 0, 0, 0, 0, 0 },
158 + { 0, 0, 0, 0, 0, 0, 0 },
159 + { 0, 0, 0, 0, 0, 0, 0 },
160 + { 0, 0, 0, 0, 0, 0, 0 },
161 + { 0, 0, 0, 0, 0, 0, 0 },
162 + { 0, 0, 0, 0, 0, 0, 0 },
163 + { 0, 0, 0, 0, 0, 0, 0 },
164 + { 0, 0, 0, 0, 0, 0, 0 },
165 + { 0, 0, 0, 0, 0, 0, 0 },
166 + { 0, 0, 0, 0, 0, 0, 0 },
167 + { 0, 0, 0, 0, 0, 0, 0 },
168 + { 0, 0, 0, 0, 0, 0, 0 },
169 + { 0, 0, 0, 0, 0, 0, 0 },
170 + { 0, 0, 0, 0, 0, 0, 0 },
171 + { 0, 0, 0, 0, 0, 0, 0 },
172 + { 0, 0, 0, 0, 0, 0, 0 },
173 };
174
175 #define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
176 @@ -202,6 +195,30 @@
177 return NULL;
178 }
179
180 +u32
181 +au1xxx_ddma_add_device(dbdev_tab_t *dev)
182 +{
183 + u32 ret = 0;
184 + dbdev_tab_t *p=NULL;
185 + static u16 new_id=0x1000;
186 +
187 + p = find_dbdev_id(0);
188 + if ( NULL != p )
189 + {
190 + memcpy(p, dev, sizeof(dbdev_tab_t));
191 + p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
192 + ret = p->dev_id;
193 + new_id++;
194 +#if 0
195 + printk("add_device: id:%x flags:%x padd:%x\n",
196 + p->dev_id, p->dev_flags, p->dev_physaddr );
197 +#endif
198 + }
199 +
200 + return ret;
201 +}
202 +EXPORT_SYMBOL(au1xxx_ddma_add_device);
203 +
204 /* Allocate a channel and return a non-zero descriptor if successful.
205 */
206 u32
207 @@ -214,7 +231,7 @@
208 int i;
209 dbdev_tab_t *stp, *dtp;
210 chan_tab_t *ctp;
211 - volatile au1x_dma_chan_t *cp;
212 + au1x_dma_chan_t *cp;
213
214 /* We do the intialization on the first channel allocation.
215 * We have to wait because of the interrupt handler initialization
216 @@ -224,9 +241,6 @@
217 au1xxx_dbdma_init();
218 dbdma_initialized = 1;
219
220 - if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
221 - return 0;
222 -
223 if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
224 if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
225
226 @@ -268,9 +282,9 @@
227 /* If kmalloc fails, it is caught below same
228 * as a channel not available.
229 */
230 - ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
231 + ctp = (chan_tab_t *)
232 + kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
233 chan_tab_ptr[i] = ctp;
234 - ctp->chan_index = chan = i;
235 break;
236 }
237 }
238 @@ -278,10 +292,11 @@
239
240 if (ctp != NULL) {
241 memset(ctp, 0, sizeof(chan_tab_t));
242 + ctp->chan_index = chan = i;
243 dcp = DDMA_CHANNEL_BASE;
244 dcp += (0x0100 * chan);
245 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
246 - cp = (volatile au1x_dma_chan_t *)dcp;
247 + cp = (au1x_dma_chan_t *)dcp;
248 ctp->chan_src = stp;
249 ctp->chan_dest = dtp;
250 ctp->chan_callback = callback;
251 @@ -298,6 +313,9 @@
252 i |= DDMA_CFG_DED;
253 if (dtp->dev_intpolarity)
254 i |= DDMA_CFG_DP;
255 + if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
256 + (dtp->dev_flags & DEV_FLAGS_SYNC))
257 + i |= DDMA_CFG_SYNC;
258 cp->ddma_cfg = i;
259 au_sync();
260
261 @@ -308,14 +326,14 @@
262 rv = (u32)(&chan_tab_ptr[chan]);
263 }
264 else {
265 - /* Release devices.
266 - */
267 + /* Release devices */
268 stp->dev_flags &= ~DEV_FLAGS_INUSE;
269 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
270 }
271 }
272 return rv;
273 }
274 +EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
275
276 /* Set the device width if source or destination is a FIFO.
277 * Should be 8, 16, or 32 bits.
278 @@ -343,6 +361,7 @@
279
280 return rv;
281 }
282 +EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
283
284 /* Allocate a descriptor ring, initializing as much as possible.
285 */
286 @@ -369,7 +388,8 @@
287 * and if we try that first we are likely to not waste larger
288 * slabs of memory.
289 */
290 - desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
291 + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
292 + GFP_KERNEL|GFP_DMA);
293 if (desc_base == 0)
294 return 0;
295
296 @@ -380,7 +400,7 @@
297 kfree((const void *)desc_base);
298 i = entries * sizeof(au1x_ddma_desc_t);
299 i += (sizeof(au1x_ddma_desc_t) - 1);
300 - if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
301 + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
302 return 0;
303
304 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
305 @@ -460,9 +480,14 @@
306 /* If source input is fifo, set static address.
307 */
308 if (stp->dev_flags & DEV_FLAGS_IN) {
309 - src0 = stp->dev_physaddr;
310 - src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
311 + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
312 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
313 + else
314 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
315 +
316 }
317 + if (stp->dev_physaddr)
318 + src0 = stp->dev_physaddr;
319
320 /* Set up dest1. For now, assume no stride and increment.
321 * A channel attribute update can change this later.
322 @@ -486,10 +511,18 @@
323 /* If destination output is fifo, set static address.
324 */
325 if (dtp->dev_flags & DEV_FLAGS_OUT) {
326 - dest0 = dtp->dev_physaddr;
327 + if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
328 + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
329 + else
330 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
331 }
332 + if (dtp->dev_physaddr)
333 + dest0 = dtp->dev_physaddr;
334
335 +#if 0
336 + printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
337 + dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
338 +#endif
339 for (i=0; i<entries; i++) {
340 dp->dscr_cmd0 = cmd0;
341 dp->dscr_cmd1 = cmd1;
342 @@ -498,6 +531,7 @@
343 dp->dscr_dest0 = dest0;
344 dp->dscr_dest1 = dest1;
345 dp->dscr_stat = 0;
346 + dp->sw_context = dp->sw_status = 0;
347 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
348 dp++;
349 }
350 @@ -510,13 +544,14 @@
351
352 return (u32)(ctp->chan_desc_base);
353 }
354 +EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
355
356 /* Put a source buffer into the DMA ring.
357 * This updates the source pointer and byte count. Normally used
358 * for memory to fifo transfers.
359 */
360 u32
361 -au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
362 +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
363 {
364 chan_tab_t *ctp;
365 au1x_ddma_desc_t *dp;
366 @@ -543,24 +578,40 @@
367 */
368 dp->dscr_source0 = virt_to_phys(buf);
369 dp->dscr_cmd1 = nbytes;
370 - dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
371 - ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */
372 -
373 + /* Check flags */
374 + if (flags & DDMA_FLAGS_IE)
375 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
376 + if (flags & DDMA_FLAGS_NOIE)
377 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
378 /* Get next descriptor pointer.
379 */
380 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
381
382 + /*
383 + * There is an errata on the Au1200/Au1550 parts that could result
384 + * in "stale" data being DMA'd. It has to do with the snoop logic on
385 + * the dache eviction buffer. NONCOHERENT_IO is on by default for
386 + * these parts. If it is fixedin the future, these dma_cache_inv will
387 + * just be nothing more than empty macros. See io.h.
388 + * */
389 + dma_cache_wback_inv(buf,nbytes);
390 + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
391 + au_sync();
392 + dma_cache_wback_inv(dp, sizeof(dp));
393 + ctp->chan_ptr->ddma_dbell = 0;
394 +
395 /* return something not zero.
396 */
397 return nbytes;
398 }
399 +EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
400
401 /* Put a destination buffer into the DMA ring.
402 * This updates the destination pointer and byte count. Normally used
403 * to place an empty buffer into the ring for fifo to memory transfers.
404 */
405 u32
406 -au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
407 +_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
408 {
409 chan_tab_t *ctp;
410 au1x_ddma_desc_t *dp;
411 @@ -582,11 +633,33 @@
412 if (dp->dscr_cmd0 & DSCR_CMD0_V)
413 return 0;
414
415 - /* Load up buffer address and byte count.
416 - */
417 + /* Load up buffer address and byte count */
418 +
419 + /* Check flags */
420 + if (flags & DDMA_FLAGS_IE)
421 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
422 + if (flags & DDMA_FLAGS_NOIE)
423 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
424 +
425 dp->dscr_dest0 = virt_to_phys(buf);
426 dp->dscr_cmd1 = nbytes;
427 +#if 0
428 + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
429 + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
430 + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
431 +#endif
432 + /*
433 + * There is an errata on the Au1200/Au1550 parts that could result in
434 + * "stale" data being DMA'd. It has to do with the snoop logic on the
435 + * dache eviction buffer. NONCOHERENT_IO is on by default for these
436 + * parts. If it is fixedin the future, these dma_cache_inv will just
437 + * be nothing more than empty macros. See io.h.
438 + * */
439 + dma_cache_inv(buf,nbytes);
440 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
441 + au_sync();
442 + dma_cache_wback_inv(dp, sizeof(dp));
443 + ctp->chan_ptr->ddma_dbell = 0;
444
445 /* Get next descriptor pointer.
446 */
447 @@ -596,6 +669,7 @@
448 */
449 return nbytes;
450 }
451 +EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
452
453 /* Get a destination buffer into the DMA ring.
454 * Normally used to get a full buffer from the ring during fifo
455 @@ -645,7 +719,7 @@
456 au1xxx_dbdma_stop(u32 chanid)
457 {
458 chan_tab_t *ctp;
459 - volatile au1x_dma_chan_t *cp;
460 + au1x_dma_chan_t *cp;
461 int halt_timeout = 0;
462
463 ctp = *((chan_tab_t **)chanid);
464 @@ -665,6 +739,7 @@
465 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
466 au_sync();
467 }
468 +EXPORT_SYMBOL(au1xxx_dbdma_stop);
469
470 /* Start using the current descriptor pointer. If the dbdma encounters
471 * a not valid descriptor, it will stop. In this case, we can just
472 @@ -674,17 +749,17 @@
473 au1xxx_dbdma_start(u32 chanid)
474 {
475 chan_tab_t *ctp;
476 - volatile au1x_dma_chan_t *cp;
477 + au1x_dma_chan_t *cp;
478
479 ctp = *((chan_tab_t **)chanid);
480 -
481 cp = ctp->chan_ptr;
482 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
483 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */
484 au_sync();
485 - cp->ddma_dbell = 0xffffffff; /* Make it go */
486 + cp->ddma_dbell = 0;
487 au_sync();
488 }
489 +EXPORT_SYMBOL(au1xxx_dbdma_start);
490
491 void
492 au1xxx_dbdma_reset(u32 chanid)
493 @@ -703,15 +778,21 @@
494
495 do {
496 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
497 + /* reset our SW status -- this is used to determine
498 + * if a descriptor is in use by upper level SW. Since
499 + * posting can reset 'V' bit.
500 + */
501 + dp->sw_status = 0;
502 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
503 } while (dp != ctp->chan_desc_base);
504 }
505 +EXPORT_SYMBOL(au1xxx_dbdma_reset);
506
507 u32
508 au1xxx_get_dma_residue(u32 chanid)
509 {
510 chan_tab_t *ctp;
511 - volatile au1x_dma_chan_t *cp;
512 + au1x_dma_chan_t *cp;
513 u32 rv;
514
515 ctp = *((chan_tab_t **)chanid);
516 @@ -746,15 +827,16 @@
517
518 kfree(ctp);
519 }
520 +EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
521
522 static void
523 dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
524 {
525 - u32 intstat;
526 + u32 intstat, flags;
527 u32 chan_index;
528 chan_tab_t *ctp;
529 au1x_ddma_desc_t *dp;
530 - volatile au1x_dma_chan_t *cp;
531 + au1x_dma_chan_t *cp;
532
533 intstat = dbdma_gptr->ddma_intstat;
534 au_sync();
535 @@ -773,18 +855,26 @@
536 (ctp->chan_callback)(irq, ctp->chan_callparam, regs);
537
538 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
539 -
540 }
541
542 -static void
543 -au1xxx_dbdma_init(void)
544 +static void au1xxx_dbdma_init(void)
545 {
546 + int irq_nr;
547 +
548 dbdma_gptr->ddma_config = 0;
549 dbdma_gptr->ddma_throttle = 0;
550 dbdma_gptr->ddma_inten = 0xffff;
551 au_sync();
552
553 - if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT,
554 +#if defined(CONFIG_SOC_AU1550)
555 + irq_nr = AU1550_DDMA_INT;
556 +#elif defined(CONFIG_SOC_AU1200)
557 + irq_nr = AU1200_DDMA_INT;
558 +#else
559 + #error Unknown Au1x00 SOC
560 +#endif
561 +
562 + if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
563 "Au1xxx dbdma", (void *)dbdma_gptr))
564 printk("Can't get 1550 dbdma irq");
565 }
566 @@ -795,7 +885,8 @@
567 chan_tab_t *ctp;
568 au1x_ddma_desc_t *dp;
569 dbdev_tab_t *stp, *dtp;
570 - volatile au1x_dma_chan_t *cp;
571 + au1x_dma_chan_t *cp;
572 + u32 i = 0;
573
574 ctp = *((chan_tab_t **)chanid);
575 stp = ctp->chan_src;
576 @@ -820,15 +911,64 @@
577 dp = ctp->chan_desc_base;
578
579 do {
580 - printk("dp %08x, cmd0 %08x, cmd1 %08x\n",
581 - (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
582 - printk("src0 %08x, src1 %08x, dest0 %08x\n",
583 - dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0);
584 - printk("dest1 %08x, stat %08x, nxtptr %08x\n",
585 - dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr);
586 + printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
587 + i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
588 + printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
589 + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
590 + printk("stat %08x, nxtptr %08x\n",
591 + dp->dscr_stat, dp->dscr_nxtptr);
592 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
593 } while (dp != ctp->chan_desc_base);
594 }
595
596 +/* Put a descriptor into the DMA ring.
597 + * This updates the source/destination pointers and byte count.
598 + */
599 +u32
600 +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
601 +{
602 + chan_tab_t *ctp;
603 + au1x_ddma_desc_t *dp;
604 + u32 nbytes=0;
605 +
606 + /* I guess we could check this to be within the
607 + * range of the table......
608 + */
609 + ctp = *((chan_tab_t **)chanid);
610 +
611 + /* We should have multiple callers for a particular channel,
612 + * an interrupt doesn't affect this pointer nor the descriptor,
613 + * so no locking should be needed.
614 + */
615 + dp = ctp->put_ptr;
616 +
617 + /* If the descriptor is valid, we are way ahead of the DMA
618 + * engine, so just return an error condition.
619 + */
620 + if (dp->dscr_cmd0 & DSCR_CMD0_V)
621 + return 0;
622 +
623 + /* Load up buffer addresses and byte count.
624 + */
625 + dp->dscr_dest0 = dscr->dscr_dest0;
626 + dp->dscr_source0 = dscr->dscr_source0;
627 + dp->dscr_dest1 = dscr->dscr_dest1;
628 + dp->dscr_source1 = dscr->dscr_source1;
629 + dp->dscr_cmd1 = dscr->dscr_cmd1;
630 + nbytes = dscr->dscr_cmd1;
631 + /* Allow the caller to specifiy if an interrupt is generated */
632 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
633 + dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
634 + ctp->chan_ptr->ddma_dbell = 0;
635 +
636 + /* Get next descriptor pointer.
637 + */
638 + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
639 +
640 + /* return something not zero.
641 + */
642 + return nbytes;
643 +}
644 +
645 #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
646
647 Index: linux-2.4.35.4/arch/mips/au1000/common/gpio.c
648 ===================================================================
649 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
650 +++ linux-2.4.35.4/arch/mips/au1000/common/gpio.c 2007-12-15 05:19:44.786973303 +0100
651 @@ -0,0 +1,118 @@
652 +/*
653 + * This program is free software; you can redistribute it and/or modify it
654 + * under the terms of the GNU General Public License as published by the
655 + * Free Software Foundation; either version 2 of the License, or (at your
656 + * option) any later version.
657 + *
658 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
659 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
660 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
661 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
662 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
663 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
664 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
665 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
666 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
667 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
668 + *
669 + * You should have received a copy of the GNU General Public License along
670 + * with this program; if not, write to the Free Software Foundation, Inc.,
671 + * 675 Mass Ave, Cambridge, MA 02139, USA.
672 + */
673 +
674 +#include <asm/au1000.h>
675 +#include <asm/au1xxx_gpio.h>
676 +
677 +#define gpio1 sys
678 +#if !defined(CONFIG_SOC_AU1000)
679 +static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
680 +
681 +#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
682 +
683 +int au1xxx_gpio2_read(int signal)
684 +{
685 + signal -= 200;
686 +/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
687 + return ((gpio2->pinstate >> signal) & 0x01);
688 +}
689 +
690 +void au1xxx_gpio2_write(int signal, int value)
691 +{
692 + signal -= 200;
693 +
694 + gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
695 + (value << signal);
696 +}
697 +
698 +void au1xxx_gpio2_tristate(int signal)
699 +{
700 + signal -= 200;
701 + gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
702 +}
703 +#endif
704 +
705 +int au1xxx_gpio1_read(int signal)
706 +{
707 +/* gpio1->trioutclr |= (0x01 << signal); */
708 + return ((gpio1->pinstaterd >> signal) & 0x01);
709 +}
710 +
711 +void au1xxx_gpio1_write(int signal, int value)
712 +{
713 + if(value)
714 + gpio1->outputset = (0x01 << signal);
715 + else
716 + gpio1->outputclr = (0x01 << signal); /* Output a Zero */
717 +}
718 +
719 +void au1xxx_gpio1_tristate(int signal)
720 +{
721 + gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
722 +}
723 +
724 +
725 +int au1xxx_gpio_read(int signal)
726 +{
727 + if(signal >= 200)
728 +#if defined(CONFIG_SOC_AU1000)
729 + return 0;
730 +#else
731 + return au1xxx_gpio2_read(signal);
732 +#endif
733 + else
734 + return au1xxx_gpio1_read(signal);
735 +}
736 +
737 +void au1xxx_gpio_write(int signal, int value)
738 +{
739 + if(signal >= 200)
740 +#if defined(CONFIG_SOC_AU1000)
741 + ;
742 +#else
743 + au1xxx_gpio2_write(signal, value);
744 +#endif
745 + else
746 + au1xxx_gpio1_write(signal, value);
747 +}
748 +
749 +void au1xxx_gpio_tristate(int signal)
750 +{
751 + if(signal >= 200)
752 +#if defined(CONFIG_SOC_AU1000)
753 + ;
754 +#else
755 + au1xxx_gpio2_tristate(signal);
756 +#endif
757 + else
758 + au1xxx_gpio1_tristate(signal);
759 +}
760 +
761 +void au1xxx_gpio1_set_inputs(void)
762 +{
763 + gpio1->pininputen = 0;
764 +}
765 +
766 +EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
767 +EXPORT_SYMBOL(au1xxx_gpio_tristate);
768 +EXPORT_SYMBOL(au1xxx_gpio_write);
769 +EXPORT_SYMBOL(au1xxx_gpio_read);
770 Index: linux-2.4.35.4/arch/mips/au1000/common/irq.c
771 ===================================================================
772 --- linux-2.4.35.4.orig/arch/mips/au1000/common/irq.c 2007-12-15 05:19:42.890865248 +0100
773 +++ linux-2.4.35.4/arch/mips/au1000/common/irq.c 2007-12-15 05:19:44.786973303 +0100
774 @@ -303,8 +303,30 @@
775 };
776
777 #ifdef CONFIG_PM
778 -void startup_match20_interrupt(void)
779 +void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *))
780 {
781 + static struct irqaction action;
782 + /* This is a big problem.... since we didn't use request_irq
783 + when kernel/irq.c calls probe_irq_xxx this interrupt will
784 + be probed for usage. This will end up disabling the device :(
785 +
786 + Give it a bogus "action" pointer -- this will keep it from
787 + getting auto-probed!
788 +
789 + By setting the status to match that of request_irq() we
790 + can avoid it. --cgray
791 + */
792 + action.dev_id = handler;
793 + action.flags = 0;
794 + action.mask = 0;
795 + action.name = "Au1xxx TOY";
796 + action.handler = handler;
797 + action.next = NULL;
798 +
799 + irq_desc[AU1000_TOY_MATCH2_INT].action = &action;
800 + irq_desc[AU1000_TOY_MATCH2_INT].status
801 + &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
802 +
803 local_enable_irq(AU1000_TOY_MATCH2_INT);
804 }
805 #endif
806 @@ -508,6 +530,7 @@
807
808 if (!intc0_req0) return;
809
810 +#ifdef AU1000_USB_DEV_REQ_INT
811 /*
812 * Because of the tight timing of SETUP token to reply
813 * transactions, the USB devices-side packet complete
814 @@ -518,6 +541,7 @@
815 do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
816 return;
817 }
818 +#endif
819
820 irq = au_ffs(intc0_req0) - 1;
821 intc0_req0 &= ~(1<<irq);
822 @@ -536,17 +560,7 @@
823
824 irq = au_ffs(intc0_req1) - 1;
825 intc0_req1 &= ~(1<<irq);
826 -#ifdef CONFIG_PM
827 - if (irq == AU1000_TOY_MATCH2_INT) {
828 - mask_and_ack_rise_edge_irq(irq);
829 - counter0_irq(irq, NULL, regs);
830 - local_enable_irq(irq);
831 - }
832 - else
833 -#endif
834 - {
835 - do_IRQ(irq, regs);
836 - }
837 + do_IRQ(irq, regs);
838 }
839
840
841 Index: linux-2.4.35.4/arch/mips/au1000/common/Makefile
842 ===================================================================
843 --- linux-2.4.35.4.orig/arch/mips/au1000/common/Makefile 2007-12-15 05:19:42.898865706 +0100
844 +++ linux-2.4.35.4/arch/mips/au1000/common/Makefile 2007-12-15 05:19:44.786973303 +0100
845 @@ -19,9 +19,9 @@
846 export-objs = prom.o clocks.o power.o usbdev.o
847
848 obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \
849 - au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o
850 + au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o gpio.o
851
852 -export-objs += dma.o dbdma.o
853 +export-objs += dma.o dbdma.o gpio.o
854
855 obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
856 obj-$(CONFIG_KGDB) += dbg_io.o
857 Index: linux-2.4.35.4/arch/mips/au1000/common/pci_fixup.c
858 ===================================================================
859 --- linux-2.4.35.4.orig/arch/mips/au1000/common/pci_fixup.c 2007-12-15 05:19:42.906866162 +0100
860 +++ linux-2.4.35.4/arch/mips/au1000/common/pci_fixup.c 2007-12-15 05:19:44.790973529 +0100
861 @@ -75,9 +75,13 @@
862
863 #ifdef CONFIG_NONCOHERENT_IO
864 /*
865 - * Set the NC bit in controller for pre-AC silicon
866 + * Set the NC bit in controller for Au1500 pre-AC silicon
867 */
868 - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
869 + u32 prid = read_c0_prid();
870 + if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
871 + au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
872 + printk("Non-coherent PCI accesses enabled\n");
873 + }
874 printk("Non-coherent PCI accesses enabled\n");
875 #endif
876
877 Index: linux-2.4.35.4/arch/mips/au1000/common/pci_ops.c
878 ===================================================================
879 --- linux-2.4.35.4.orig/arch/mips/au1000/common/pci_ops.c 2007-12-15 05:19:42.910866388 +0100
880 +++ linux-2.4.35.4/arch/mips/au1000/common/pci_ops.c 2007-12-15 05:19:44.790973529 +0100
881 @@ -162,6 +162,7 @@
882 static int config_access(unsigned char access_type, struct pci_dev *dev,
883 unsigned char where, u32 * data)
884 {
885 + int error = PCIBIOS_SUCCESSFUL;
886 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
887 unsigned char bus = dev->bus->number;
888 unsigned int dev_fn = dev->devfn;
889 @@ -170,7 +171,6 @@
890 unsigned long offset, status;
891 unsigned long cfg_base;
892 unsigned long flags;
893 - int error = PCIBIOS_SUCCESSFUL;
894 unsigned long entryLo0, entryLo1;
895
896 if (device > 19) {
897 @@ -205,9 +205,8 @@
898 last_entryLo0 = last_entryLo1 = 0xffffffff;
899 }
900
901 - /* Since the Au1xxx doesn't do the idsel timing exactly to spec,
902 - * many board vendors implement their own off-chip idsel, so call
903 - * it now. If it doesn't succeed, may as well bail out at this point.
904 + /* Allow board vendors to implement their own off-chip idsel.
905 + * If it doesn't succeed, may as well bail out at this point.
906 */
907 if (board_pci_idsel) {
908 if (board_pci_idsel(device, 1) == 0) {
909 @@ -271,8 +270,11 @@
910 }
911
912 local_irq_restore(flags);
913 - return error;
914 +#else
915 + /* Fake out Config space access with no responder */
916 + *data = 0xFFFFFFFF;
917 #endif
918 + return error;
919 }
920 #endif
921
922 Index: linux-2.4.35.4/arch/mips/au1000/common/power.c
923 ===================================================================
924 --- linux-2.4.35.4.orig/arch/mips/au1000/common/power.c 2007-12-15 05:19:42.918866846 +0100
925 +++ linux-2.4.35.4/arch/mips/au1000/common/power.c 2007-12-15 05:19:44.790973529 +0100
926 @@ -50,7 +50,6 @@
927
928 static void calibrate_delay(void);
929
930 -extern void set_au1x00_speed(unsigned int new_freq);
931 extern unsigned int get_au1x00_speed(void);
932 extern unsigned long get_au1x00_uart_baud_base(void);
933 extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
934 @@ -116,6 +115,7 @@
935 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
936 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
937
938 +#ifndef CONFIG_SOC_AU1200
939 /* Shutdown USB host/device.
940 */
941 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
942 @@ -127,6 +127,7 @@
943
944 sleep_usbdev_enable = au_readl(USBD_ENABLE);
945 au_writel(0, USBD_ENABLE); au_sync();
946 +#endif
947
948 /* Save interrupt controller state.
949 */
950 @@ -212,14 +213,12 @@
951 int au_sleep(void)
952 {
953 unsigned long wakeup, flags;
954 - extern void save_and_sleep(void);
955 + extern unsigned int save_and_sleep(void);
956
957 spin_lock_irqsave(&pm_lock,flags);
958
959 save_core_regs();
960
961 - flush_cache_all();
962 -
963 /** The code below is all system dependent and we should probably
964 ** have a function call out of here to set this up. You need
965 ** to configure the GPIO or timer interrupts that will bring
966 @@ -227,27 +226,26 @@
967 ** For testing, the TOY counter wakeup is useful.
968 **/
969
970 -#if 0
971 +#if 1
972 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
973
974 /* gpio 6 can cause a wake up event */
975 wakeup = au_readl(SYS_WAKEMSK);
976 wakeup &= ~(1 << 8); /* turn off match20 wakeup */
977 - wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
978 + wakeup = 1 << 5; /* turn on gpio 6 wakeup */
979 #else
980 - /* For testing, allow match20 to wake us up.
981 - */
982 + /* For testing, allow match20 to wake us up. */
983 #ifdef SLEEP_TEST_TIMEOUT
984 wakeup_counter0_set(sleep_ticks);
985 #endif
986 wakeup = 1 << 8; /* turn on match20 wakeup */
987 wakeup = 0;
988 #endif
989 - au_writel(1, SYS_WAKESRC); /* clear cause */
990 + au_writel(0, SYS_WAKESRC); /* clear cause */
991 au_sync();
992 au_writel(wakeup, SYS_WAKEMSK);
993 au_sync();
994 -
995 + DPRINTK("Entering sleep!\n");
996 save_and_sleep();
997
998 /* after a wakeup, the cpu vectors back to 0x1fc00000 so
999 @@ -255,6 +253,7 @@
1000 */
1001 restore_core_regs();
1002 spin_unlock_irqrestore(&pm_lock, flags);
1003 + DPRINTK("Leaving sleep!\n");
1004 return 0;
1005 }
1006
1007 @@ -285,7 +284,6 @@
1008
1009 if (retval)
1010 return retval;
1011 -
1012 au_sleep();
1013 retval = pm_send_all(PM_RESUME, (void *) 0);
1014 }
1015 @@ -296,7 +294,6 @@
1016 void *buffer, size_t * len)
1017 {
1018 int retval = 0;
1019 - void au1k_wait(void);
1020
1021 if (!write) {
1022 *len = 0;
1023 @@ -305,119 +302,9 @@
1024 if (retval)
1025 return retval;
1026 suspend_mode = 1;
1027 - au1k_wait();
1028 - retval = pm_send_all(PM_RESUME, (void *) 0);
1029 - }
1030 - return retval;
1031 -}
1032
1033 -
1034 -static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
1035 - void *buffer, size_t * len)
1036 -{
1037 - int retval = 0, i;
1038 - unsigned long val, pll;
1039 -#define TMPBUFLEN 64
1040 -#define MAX_CPU_FREQ 396
1041 - char buf[TMPBUFLEN], *p;
1042 - unsigned long flags, intc0_mask, intc1_mask;
1043 - unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
1044 - old_refresh;
1045 - unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
1046 -
1047 - spin_lock_irqsave(&pm_lock, flags);
1048 - if (!write) {
1049 - *len = 0;
1050 - } else {
1051 - /* Parse the new frequency */
1052 - if (*len > TMPBUFLEN - 1) {
1053 - spin_unlock_irqrestore(&pm_lock, flags);
1054 - return -EFAULT;
1055 - }
1056 - if (copy_from_user(buf, buffer, *len)) {
1057 - spin_unlock_irqrestore(&pm_lock, flags);
1058 - return -EFAULT;
1059 - }
1060 - buf[*len] = 0;
1061 - p = buf;
1062 - val = simple_strtoul(p, &p, 0);
1063 - if (val > MAX_CPU_FREQ) {
1064 - spin_unlock_irqrestore(&pm_lock, flags);
1065 - return -EFAULT;
1066 - }
1067 -
1068 - pll = val / 12;
1069 - if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
1070 - /* revisit this for higher speed cpus */
1071 - spin_unlock_irqrestore(&pm_lock, flags);
1072 - return -EFAULT;
1073 - }
1074 -
1075 - old_baud_base = get_au1x00_uart_baud_base();
1076 - old_cpu_freq = get_au1x00_speed();
1077 -
1078 - new_cpu_freq = pll * 12 * 1000000;
1079 - new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
1080 - set_au1x00_speed(new_cpu_freq);
1081 - set_au1x00_uart_baud_base(new_baud_base);
1082 -
1083 - old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
1084 - new_refresh =
1085 - ((old_refresh * new_cpu_freq) /
1086 - old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
1087 -
1088 - au_writel(pll, SYS_CPUPLL);
1089 - au_sync_delay(1);
1090 - au_writel(new_refresh, MEM_SDREFCFG);
1091 - au_sync_delay(1);
1092 -
1093 - for (i = 0; i < 4; i++) {
1094 - if (au_readl
1095 - (UART_BASE + UART_MOD_CNTRL +
1096 - i * 0x00100000) == 3) {
1097 - old_clk =
1098 - au_readl(UART_BASE + UART_CLK +
1099 - i * 0x00100000);
1100 - // baud_rate = baud_base/clk
1101 - baud_rate = old_baud_base / old_clk;
1102 - /* we won't get an exact baud rate and the error
1103 - * could be significant enough that our new
1104 - * calculation will result in a clock that will
1105 - * give us a baud rate that's too far off from
1106 - * what we really want.
1107 - */
1108 - if (baud_rate > 100000)
1109 - baud_rate = 115200;
1110 - else if (baud_rate > 50000)
1111 - baud_rate = 57600;
1112 - else if (baud_rate > 30000)
1113 - baud_rate = 38400;
1114 - else if (baud_rate > 17000)
1115 - baud_rate = 19200;
1116 - else
1117 - (baud_rate = 9600);
1118 - // new_clk = new_baud_base/baud_rate
1119 - new_clk = new_baud_base / baud_rate;
1120 - au_writel(new_clk,
1121 - UART_BASE + UART_CLK +
1122 - i * 0x00100000);
1123 - au_sync_delay(10);
1124 - }
1125 - }
1126 + retval = pm_send_all(PM_RESUME, (void *) 0);
1127 }
1128 -
1129 -
1130 - /* We don't want _any_ interrupts other than
1131 - * match20. Otherwise our calibrate_delay()
1132 - * calculation will be off, potentially a lot.
1133 - */
1134 - intc0_mask = save_local_and_disable(0);
1135 - intc1_mask = save_local_and_disable(1);
1136 - local_enable_irq(AU1000_TOY_MATCH2_INT);
1137 - spin_unlock_irqrestore(&pm_lock, flags);
1138 - calibrate_delay();
1139 - restore_local_and_enable(0, intc0_mask);
1140 - restore_local_and_enable(1, intc1_mask);
1141 return retval;
1142 }
1143
1144 @@ -425,7 +312,6 @@
1145 static struct ctl_table pm_table[] = {
1146 {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
1147 {ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
1148 - {CTL_ACPI, "freq", NULL, 0, 0600, NULL, &pm_do_freq},
1149 {0}
1150 };
1151
1152 Index: linux-2.4.35.4/arch/mips/au1000/common/reset.c
1153 ===================================================================
1154 --- linux-2.4.35.4.orig/arch/mips/au1000/common/reset.c 2007-12-15 05:19:42.926867302 +0100
1155 +++ linux-2.4.35.4/arch/mips/au1000/common/reset.c 2007-12-15 05:19:44.790973529 +0100
1156 @@ -37,8 +37,6 @@
1157 #include <asm/system.h>
1158 #include <asm/au1000.h>
1159
1160 -extern int au_sleep(void);
1161 -
1162 void au1000_restart(char *command)
1163 {
1164 /* Set all integrated peripherals to disabled states */
1165 @@ -144,6 +142,26 @@
1166 au_writel(0x00, 0xb1900064); /* sys_auxpll */
1167 au_writel(0x00, 0xb1900100); /* sys_pininputen */
1168 break;
1169 + case 0x04000000: /* Au1200 */
1170 + au_writel(0x00, 0xb400300c); /* ddma */
1171 + au_writel(0x00, 0xb1a00004); /* psc 0 */
1172 + au_writel(0x00, 0xb1b00004); /* psc 1 */
1173 + au_writel(0x00d02000, 0xb4020004); /* ehci, ohci, udc, otg */
1174 + au_writel(0x00, 0xb5000004); /* lcd */
1175 + au_writel(0x00, 0xb060000c); /* sd0 */
1176 + au_writel(0x00, 0xb068000c); /* sd1 */
1177 + au_writel(0x00, 0xb1100100); /* swcnt */
1178 + au_writel(0x00, 0xb0300000); /* aes */
1179 + au_writel(0x00, 0xb4004000); /* cim */
1180 + au_writel(0x00, 0xb1100100); /* uart0_enable */
1181 + au_writel(0x00, 0xb1200100); /* uart1_enable */
1182 + au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
1183 + au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
1184 + au_writel(0x00, 0xb1900028); /* sys_clksrc */
1185 + au_writel(0x10, 0xb1900060); /* sys_cpupll */
1186 + au_writel(0x00, 0xb1900064); /* sys_auxpll */
1187 + au_writel(0x00, 0xb1900100); /* sys_pininputen */
1188 + break;
1189
1190 default:
1191 break;
1192 @@ -163,32 +181,23 @@
1193
1194 void au1000_halt(void)
1195 {
1196 -#if defined(CONFIG_MIPS_PB1550)
1197 - /* power off system */
1198 - printk("\n** Powering off Pb1550\n");
1199 - au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
1200 - au_sync();
1201 - while(1); /* should not get here */
1202 -#endif
1203 - printk(KERN_NOTICE "\n** You can safely turn off the power\n");
1204 -#ifdef CONFIG_MIPS_MIRAGE
1205 - au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
1206 -#endif
1207 -#ifdef CONFIG_PM
1208 - au_sleep();
1209 -
1210 - /* should not get here */
1211 - printk(KERN_ERR "Unable to put cpu in sleep mode\n");
1212 - while(1);
1213 -#else
1214 - while (1)
1215 + /* Use WAIT in a low-power infinite spin loop */
1216 + while (1) {
1217 __asm__(".set\tmips3\n\t"
1218 "wait\n\t"
1219 ".set\tmips0");
1220 -#endif
1221 + }
1222 }
1223
1224 void au1000_power_off(void)
1225 {
1226 + extern void board_power_off (void);
1227 +
1228 + printk(KERN_NOTICE "\n** You can safely turn off the power\n");
1229 +
1230 + /* Give board a chance to power-off */
1231 + board_power_off();
1232 +
1233 + /* If board can't power-off, spin forever */
1234 au1000_halt();
1235 }
1236 Index: linux-2.4.35.4/arch/mips/au1000/common/setup.c
1237 ===================================================================
1238 --- linux-2.4.35.4.orig/arch/mips/au1000/common/setup.c 2007-12-15 05:19:42.934867757 +0100
1239 +++ linux-2.4.35.4/arch/mips/au1000/common/setup.c 2007-12-15 05:19:44.794973758 +0100
1240 @@ -174,6 +174,40 @@
1241 initrd_end = (unsigned long)&__rd_end;
1242 #endif
1243
1244 +#if defined(CONFIG_SOC_AU1200)
1245 +#ifdef CONFIG_USB_EHCI_HCD
1246 + if ((argptr = strstr(argptr, "usb_ehci=")) == NULL) {
1247 + char usb_args[80];
1248 + argptr = prom_getcmdline();
1249 + memset(usb_args, 0, sizeof(usb_args));
1250 + sprintf(usb_args, " usb_ehci=base:0x%x,len:0x%x,irq:%d",
1251 + USB_EHCI_BASE, USB_EHCI_LEN, AU1000_USB_HOST_INT);
1252 + strcat(argptr, usb_args);
1253 + }
1254 +#ifdef CONFIG_USB_AMD5536UDC
1255 + /* enable EHC + OHC + UDC clocks, memory and bus mastering */
1256 +/* au_writel( 0x00DF207F, USB_MSR_BASE + 4); */
1257 + au_writel( 0xC0DF207F, USB_MSR_BASE + 4); // incl. prefetch
1258 +#else
1259 + /* enable EHC + OHC clocks, memory and bus mastering */
1260 +/* au_writel( 0x00DB200F, USB_MSR_BASE + 4); */
1261 + au_writel( 0xC0DB200F, USB_MSR_BASE + 4); /* incl. prefetch */
1262 +#endif
1263 + udelay(1000);
1264 +
1265 +#else /* CONFIG_USB_EHCI_HCD */
1266 +
1267 +#ifdef CONFIG_USB_AMD5536UDC
1268 +#ifndef CONFIG_USB_OHCI
1269 + /* enable UDC clocks, memory and bus mastering */
1270 +/* au_writel( 0x00DC2070, USB_MSR_BASE + 4); */
1271 + au_writel( 0xC0DC2070, USB_MSR_BASE + 4); // incl. prefetch
1272 + udelay(1000);
1273 +#endif
1274 +#endif
1275 +#endif /* CONFIG_USB_EHCI_HCD */
1276 +#endif /* CONFIG_SOC_AU1200 */
1277 +
1278 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1279 #ifdef CONFIG_USB_OHCI
1280 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
1281 @@ -187,19 +221,38 @@
1282 #endif
1283
1284 #ifdef CONFIG_USB_OHCI
1285 - // enable host controller and wait for reset done
1286 +#if defined(CONFIG_SOC_AU1200)
1287 +#ifndef CONFIG_USB_EHCI_HCD
1288 +#ifdef CONFIG_USB_AMD5536UDC
1289 + /* enable OHC + UDC clocks, memory and bus mastering */
1290 +/* au_writel( 0x00DD2073, USB_MSR_BASE + 4); */
1291 + au_writel( 0xC0DD2073, USB_MSR_BASE + 4); // incl. prefetch
1292 +#else
1293 + /* enable OHC clocks, memory and bus mastering */
1294 + au_writel( 0x00D12003, USB_MSR_BASE + 4);
1295 +#endif
1296 + udelay(1000);
1297 +printk("DEBUG: Reading Au1200 USB2 reg 0x%x\n", au_readl(USB_MSR_BASE + 4));
1298 +#endif
1299 +#else
1300 + /* Au1000, Au1500, Au1100, Au1550 */
1301 + /* enable host controller and wait for reset done */
1302 au_writel(0x08, USB_HOST_CONFIG);
1303 udelay(1000);
1304 au_writel(0x0E, USB_HOST_CONFIG);
1305 udelay(1000);
1306 - au_readl(USB_HOST_CONFIG); // throw away first read
1307 + au_readl(USB_HOST_CONFIG); /* throw away first read */
1308 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
1309 au_readl(USB_HOST_CONFIG);
1310 +#endif /* CONFIG_SOC_AU1200 */
1311 #endif
1312 -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1313 +#else
1314 +
1315 +#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
1316 +
1317
1318 #ifdef CONFIG_FB
1319 - // Needed if PCI video card in use
1320 + /* Needed if PCI video card in use */
1321 conswitchp = &dummy_con;
1322 #endif
1323
1324 @@ -209,8 +262,7 @@
1325 #endif
1326
1327 #ifdef CONFIG_BLK_DEV_IDE
1328 - /* Board setup takes precedence for unique devices.
1329 - */
1330 + /* Board setup takes precedence for unique devices. */
1331 if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
1332 ide_ops = &std_ide_ops;
1333 #endif
1334 Index: linux-2.4.35.4/arch/mips/au1000/common/sleeper.S
1335 ===================================================================
1336 --- linux-2.4.35.4.orig/arch/mips/au1000/common/sleeper.S 2007-12-15 05:19:42.938867986 +0100
1337 +++ linux-2.4.35.4/arch/mips/au1000/common/sleeper.S 2007-12-15 05:19:44.794973758 +0100
1338 @@ -15,17 +15,48 @@
1339 #include <asm/addrspace.h>
1340 #include <asm/regdef.h>
1341 #include <asm/stackframe.h>
1342 +#include <asm/au1000.h>
1343 +
1344 +/*
1345 + * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep
1346 + * need not be tied to any particular power management scheme.
1347 + */
1348 +
1349 + .extern ___flush_cache_all
1350
1351 .text
1352 - .set macro
1353 - .set noat
1354 .align 5
1355
1356 -/* Save all of the processor general registers and go to sleep.
1357 - * A wakeup condition will get us back here to restore the registers.
1358 +/*
1359 + * Save the processor general registers and go to sleep. A wakeup
1360 + * condition will get us back here to restore the registers.
1361 */
1362 -LEAF(save_and_sleep)
1363
1364 +/* still need to fix alignment issues here */
1365 +save_and_sleep_frmsz = 48
1366 +NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
1367 + .set noreorder
1368 + .set nomacro
1369 + .set noat
1370 + subu sp, save_and_sleep_frmsz
1371 + sw ra, save_and_sleep_frmsz-4(sp)
1372 + sw s0, save_and_sleep_frmsz-8(sp)
1373 + sw s1, save_and_sleep_frmsz-12(sp)
1374 + sw s2, save_and_sleep_frmsz-16(sp)
1375 + sw s3, save_and_sleep_frmsz-20(sp)
1376 + sw s4, save_and_sleep_frmsz-24(sp)
1377 + sw s5, save_and_sleep_frmsz-28(sp)
1378 + sw s6, save_and_sleep_frmsz-32(sp)
1379 + sw s7, save_and_sleep_frmsz-36(sp)
1380 + sw s8, save_and_sleep_frmsz-40(sp)
1381 + sw gp, save_and_sleep_frmsz-44(sp)
1382 +
1383 + /* We only need to save the registers that the calling function
1384 + * hasn't saved for us. 0 is always zero. 8 - 15, 24 and 25 are
1385 + * temporaries and can be used without saving. 26 and 27 are reserved
1386 + * for interrupt/trap handling and expected to change. 29 is the
1387 + * stack pointer which is handled as a special case here.
1388 + */
1389 subu sp, PT_SIZE
1390 sw $1, PT_R1(sp)
1391 sw $2, PT_R2(sp)
1392 @@ -34,14 +65,6 @@
1393 sw $5, PT_R5(sp)
1394 sw $6, PT_R6(sp)
1395 sw $7, PT_R7(sp)
1396 - sw $8, PT_R8(sp)
1397 - sw $9, PT_R9(sp)
1398 - sw $10, PT_R10(sp)
1399 - sw $11, PT_R11(sp)
1400 - sw $12, PT_R12(sp)
1401 - sw $13, PT_R13(sp)
1402 - sw $14, PT_R14(sp)
1403 - sw $15, PT_R15(sp)
1404 sw $16, PT_R16(sp)
1405 sw $17, PT_R17(sp)
1406 sw $18, PT_R18(sp)
1407 @@ -50,32 +73,47 @@
1408 sw $21, PT_R21(sp)
1409 sw $22, PT_R22(sp)
1410 sw $23, PT_R23(sp)
1411 - sw $24, PT_R24(sp)
1412 - sw $25, PT_R25(sp)
1413 - sw $26, PT_R26(sp)
1414 - sw $27, PT_R27(sp)
1415 sw $28, PT_R28(sp)
1416 - sw $29, PT_R29(sp)
1417 sw $30, PT_R30(sp)
1418 sw $31, PT_R31(sp)
1419 +#define PT_C0STATUS PT_LO
1420 +#define PT_CONTEXT PT_HI
1421 +#define PT_PAGEMASK PT_EPC
1422 +#define PT_CONFIG PT_BVADDR
1423 mfc0 k0, CP0_STATUS
1424 - sw k0, 0x20(sp)
1425 + sw k0, PT_C0STATUS(sp) // 0x20
1426 mfc0 k0, CP0_CONTEXT
1427 - sw k0, 0x1c(sp)
1428 + sw k0, PT_CONTEXT(sp) // 0x1c
1429 mfc0 k0, CP0_PAGEMASK
1430 - sw k0, 0x18(sp)
1431 + sw k0, PT_PAGEMASK(sp) // 0x18
1432 mfc0 k0, CP0_CONFIG
1433 - sw k0, 0x14(sp)
1434 + sw k0, PT_CONFIG(sp) // 0x14
1435 +
1436 + .set macro
1437 + .set at
1438 +
1439 + li t0, SYS_SLPPWR
1440 + sw zero, 0(t0) /* Get the processor ready to sleep */
1441 + sync
1442
1443 /* Now set up the scratch registers so the boot rom will
1444 * return to this point upon wakeup.
1445 + * sys_scratch0 : SP
1446 + * sys_scratch1 : RA
1447 + */
1448 + li t0, SYS_SCRATCH0
1449 + li t1, SYS_SCRATCH1
1450 + sw sp, 0(t0)
1451 + la k0, resume_from_sleep
1452 + sw k0, 0(t1)
1453 +
1454 +/*
1455 + * Flush DCACHE to make sure context is in memory
1456 */
1457 - la k0, 1f
1458 - lui k1, 0xb190
1459 - ori k1, 0x18
1460 - sw sp, 0(k1)
1461 - ori k1, 0x1c
1462 - sw k0, 0(k1)
1463 + la t1,___flush_cache_all /* _flush_cache_all is a function pointer */
1464 + lw t0,0(t1)
1465 + jal t0
1466 + nop
1467
1468 /* Put SDRAM into self refresh. Preload instructions into cache,
1469 * issue a precharge, then auto refresh, then sleep commands to it.
1470 @@ -88,30 +126,65 @@
1471 cache 0x14, 96(t0)
1472 .set mips0
1473
1474 + /* Put SDRAM to sleep */
1475 sdsleep:
1476 - lui k0, 0xb400
1477 - sw zero, 0x001c(k0) /* Precharge */
1478 - sw zero, 0x0020(k0) /* Auto refresh */
1479 - sw zero, 0x0030(k0) /* SDRAM sleep */
1480 + li a0, MEM_PHYS_ADDR
1481 + or a0, a0, 0xA0000000
1482 +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
1483 + lw k0, MEM_SDMODE0(a0)
1484 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1485 + sw zero, MEM_SDAUTOREF(a0) /* Auto Refresh */
1486 + sw zero, MEM_SDSLEEP(a0) /* Sleep */
1487 sync
1488 -
1489 - lui k1, 0xb190
1490 - sw zero, 0x0078(k1) /* get ready to sleep */
1491 +#endif
1492 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
1493 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1494 + sw zero, MEM_SDSREF(a0)
1495 +
1496 + #lw t0, MEM_SDSTAT(a0)
1497 + #and t0, t0, 0x01000000
1498 + li t0, 0x01000000
1499 +refresh_not_set:
1500 + lw t1, MEM_SDSTAT(a0)
1501 + and t2, t1, t0
1502 + beq zero, t2, refresh_not_set
1503 + nop
1504 +
1505 + li t0, ~0x30000000
1506 + lw t1, MEM_SDCONFIGA(a0)
1507 + and t1, t0, t1
1508 + sw t1, MEM_SDCONFIGA(a0)
1509 sync
1510 - sw zero, 0x007c(k1) /* Put processor to sleep */
1511 +#endif
1512 +
1513 + li t0, SYS_SLEEP
1514 + sw zero, 0(t0) /* Put processor to sleep */
1515 sync
1516 + nop
1517 + nop
1518 + nop
1519 + nop
1520 + nop
1521 + nop
1522 + nop
1523 + nop
1524 +
1525
1526 /* This is where we return upon wakeup.
1527 * Reload all of the registers and return.
1528 */
1529 -1: nop
1530 - lw k0, 0x20(sp)
1531 +resume_from_sleep:
1532 + nop
1533 + .set nomacro
1534 + .set noat
1535 +
1536 + lw k0, PT_C0STATUS(sp) // 0x20
1537 mtc0 k0, CP0_STATUS
1538 - lw k0, 0x1c(sp)
1539 + lw k0, PT_CONTEXT(sp) // 0x1c
1540 mtc0 k0, CP0_CONTEXT
1541 - lw k0, 0x18(sp)
1542 + lw k0, PT_PAGEMASK(sp) // 0x18
1543 mtc0 k0, CP0_PAGEMASK
1544 - lw k0, 0x14(sp)
1545 + lw k0, PT_CONFIG(sp) // 0x14
1546 mtc0 k0, CP0_CONFIG
1547 lw $1, PT_R1(sp)
1548 lw $2, PT_R2(sp)
1549 @@ -120,14 +193,6 @@
1550 lw $5, PT_R5(sp)
1551 lw $6, PT_R6(sp)
1552 lw $7, PT_R7(sp)
1553 - lw $8, PT_R8(sp)
1554 - lw $9, PT_R9(sp)
1555 - lw $10, PT_R10(sp)
1556 - lw $11, PT_R11(sp)
1557 - lw $12, PT_R12(sp)
1558 - lw $13, PT_R13(sp)
1559 - lw $14, PT_R14(sp)
1560 - lw $15, PT_R15(sp)
1561 lw $16, PT_R16(sp)
1562 lw $17, PT_R17(sp)
1563 lw $18, PT_R18(sp)
1564 @@ -136,15 +201,36 @@
1565 lw $21, PT_R21(sp)
1566 lw $22, PT_R22(sp)
1567 lw $23, PT_R23(sp)
1568 - lw $24, PT_R24(sp)
1569 - lw $25, PT_R25(sp)
1570 - lw $26, PT_R26(sp)
1571 - lw $27, PT_R27(sp)
1572 lw $28, PT_R28(sp)
1573 - lw $29, PT_R29(sp)
1574 lw $30, PT_R30(sp)
1575 lw $31, PT_R31(sp)
1576 +
1577 + .set macro
1578 + .set at
1579 +
1580 + /* clear the wake source, but save it as the return value of the function */
1581 + li t0, SYS_WAKESRC
1582 + lw v0, 0(t0)
1583 + sw v0, PT_R2(sp)
1584 + sw zero, 0(t0)
1585 +
1586 addiu sp, PT_SIZE
1587
1588 + lw gp, save_and_sleep_frmsz-44(sp)
1589 + lw s8, save_and_sleep_frmsz-40(sp)
1590 + lw s7, save_and_sleep_frmsz-36(sp)
1591 + lw s6, save_and_sleep_frmsz-32(sp)
1592 + lw s5, save_and_sleep_frmsz-28(sp)
1593 + lw s4, save_and_sleep_frmsz-24(sp)
1594 + lw s3, save_and_sleep_frmsz-20(sp)
1595 + lw s2, save_and_sleep_frmsz-16(sp)
1596 + lw s1, save_and_sleep_frmsz-12(sp)
1597 + lw s0, save_and_sleep_frmsz-8(sp)
1598 + lw ra, save_and_sleep_frmsz-4(sp)
1599 +
1600 + addu sp, save_and_sleep_frmsz
1601 jr ra
1602 + nop
1603 + .set reorder
1604 END(save_and_sleep)
1605 +
1606 Index: linux-2.4.35.4/arch/mips/au1000/common/time.c
1607 ===================================================================
1608 --- linux-2.4.35.4.orig/arch/mips/au1000/common/time.c 2007-12-15 05:19:42.946868441 +0100
1609 +++ linux-2.4.35.4/arch/mips/au1000/common/time.c 2007-12-15 05:19:44.794973758 +0100
1610 @@ -50,7 +50,6 @@
1611 #include <linux/mc146818rtc.h>
1612 #include <linux/timex.h>
1613
1614 -extern void startup_match20_interrupt(void);
1615 extern void do_softirq(void);
1616 extern volatile unsigned long wall_jiffies;
1617 unsigned long missed_heart_beats = 0;
1618 @@ -59,14 +58,14 @@
1619 static unsigned long r4k_cur; /* What counter should be at next timer irq */
1620 extern rwlock_t xtime_lock;
1621 int no_au1xxx_32khz;
1622 -void (*au1k_wait_ptr)(void);
1623 +extern int allow_au1k_wait; /* default off for CP0 Counter */
1624
1625 /* Cycle counter value at the previous timer interrupt.. */
1626 static unsigned int timerhi = 0, timerlo = 0;
1627
1628 #ifdef CONFIG_PM
1629 #define MATCH20_INC 328
1630 -extern void startup_match20_interrupt(void);
1631 +extern void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *));
1632 static unsigned long last_pc0, last_match20;
1633 #endif
1634
1635 @@ -385,7 +384,6 @@
1636 {
1637 unsigned int est_freq;
1638 extern unsigned long (*do_gettimeoffset)(void);
1639 - extern void au1k_wait(void);
1640
1641 printk("calculating r4koff... ");
1642 r4k_offset = cal_r4koff();
1643 @@ -437,9 +435,6 @@
1644 au_writel(0, SYS_TOYWRITE);
1645 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
1646
1647 - au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
1648 - au_writel(~0, SYS_WAKESRC);
1649 - au_sync();
1650 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1651
1652 /* setup match20 to interrupt once every 10ms */
1653 @@ -447,13 +442,13 @@
1654 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
1655 au_sync();
1656 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1657 - startup_match20_interrupt();
1658 + startup_match20_interrupt(counter0_irq);
1659
1660 do_gettimeoffset = do_fast_pm_gettimeoffset;
1661
1662 /* We can use the real 'wait' instruction.
1663 */
1664 - au1k_wait_ptr = au1k_wait;
1665 + allow_au1k_wait = 1;
1666 }
1667
1668 #else
1669 Index: linux-2.4.35.4/arch/mips/au1000/db1x00/board_setup.c
1670 ===================================================================
1671 --- linux-2.4.35.4.orig/arch/mips/au1000/db1x00/board_setup.c 2007-12-15 05:19:42.954868897 +0100
1672 +++ linux-2.4.35.4/arch/mips/au1000/db1x00/board_setup.c 2007-12-15 05:19:44.794973758 +0100
1673 @@ -46,10 +46,22 @@
1674 #include <asm/au1000.h>
1675 #include <asm/db1x00.h>
1676
1677 -extern struct rtc_ops no_rtc_ops;
1678 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1679 +#include <asm/au1xxx_dbdma.h>
1680 +extern struct ide_ops *ide_ops;
1681 +extern struct ide_ops au1xxx_ide_ops;
1682 +extern u32 au1xxx_ide_virtbase;
1683 +extern u64 au1xxx_ide_physbase;
1684 +extern int au1xxx_ide_irq;
1685 +
1686 +/* Ddma */
1687 +chan_tab_t *ide_read_ch, *ide_write_ch;
1688 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
1689 +
1690 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
1691 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
1692
1693 -/* not correct for db1550 */
1694 -static BCSR * const bcsr = (BCSR *)0xAE000000;
1695 +extern struct rtc_ops no_rtc_ops;
1696
1697 void board_reset (void)
1698 {
1699 @@ -57,6 +69,13 @@
1700 au_writel(0x00000000, 0xAE00001C);
1701 }
1702
1703 +void board_power_off (void)
1704 +{
1705 +#ifdef CONFIG_MIPS_MIRAGE
1706 + au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
1707 +#endif
1708 +}
1709 +
1710 void __init board_setup(void)
1711 {
1712 u32 pin_func;
1713 @@ -108,8 +127,42 @@
1714 au_writel(0x02000200, GPIO2_OUTPUT);
1715 #endif
1716
1717 +#if defined(CONFIG_AU1XXX_SMC91111)
1718 +#define CPLD_CONTROL (0xAF00000C)
1719 + {
1720 + extern uint32_t au1xxx_smc91111_base;
1721 + extern unsigned int au1xxx_smc91111_irq;
1722 + extern int au1xxx_smc91111_nowait;
1723 +
1724 + au1xxx_smc91111_base = 0xAC000300;
1725 + au1xxx_smc91111_irq = AU1000_GPIO_8;
1726 + au1xxx_smc91111_nowait = 1;
1727 +
1728 + /* set up the Static Bus timing - only 396Mhz */
1729 + bcsr->resets |= 0x7;
1730 + au_writel(0x00010003, MEM_STCFG0);
1731 + au_writel(0x000c00c0, MEM_STCFG2);
1732 + au_writel(0x85E1900D, MEM_STTIME2);
1733 + }
1734 +#endif /* end CONFIG_SMC91111 */
1735 au_sync();
1736
1737 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1738 + /*
1739 + * Iniz IDE parameters
1740 + */
1741 + ide_ops = &au1xxx_ide_ops;
1742 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
1743 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
1744 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
1745 +
1746 + /*
1747 + * change PIO or PIO+Ddma
1748 + * check the GPIO-6 pin condition. db1550:s6_dot
1749 + */
1750 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
1751 +#endif
1752 +
1753 #ifdef CONFIG_MIPS_DB1000
1754 printk("AMD Alchemy Au1000/Db1000 Board\n");
1755 #endif
1756 Index: linux-2.4.35.4/arch/mips/au1000/db1x00/irqmap.c
1757 ===================================================================
1758 --- linux-2.4.35.4.orig/arch/mips/au1000/db1x00/irqmap.c 2007-12-15 05:19:42.962869352 +0100
1759 +++ linux-2.4.35.4/arch/mips/au1000/db1x00/irqmap.c 2007-12-15 05:19:44.794973758 +0100
1760 @@ -53,6 +53,7 @@
1761 #ifdef CONFIG_MIPS_DB1550
1762 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
1763 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
1764 + { AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
1765 #else
1766 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
1767 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
1768 Index: linux-2.4.35.4/arch/mips/au1000/db1x00/Makefile
1769 ===================================================================
1770 --- linux-2.4.35.4.orig/arch/mips/au1000/db1x00/Makefile 2007-12-15 05:19:42.970869808 +0100
1771 +++ linux-2.4.35.4/arch/mips/au1000/db1x00/Makefile 2007-12-15 05:19:44.794973758 +0100
1772 @@ -17,4 +17,11 @@
1773 obj-y := init.o board_setup.o irqmap.o
1774 obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
1775
1776 +ifdef CONFIG_MIPS_DB1100
1777 +ifdef CONFIG_MMC
1778 +obj-y += mmc_support.o
1779 +export-objs += mmc_support.o
1780 +endif
1781 +endif
1782 +
1783 include $(TOPDIR)/Rules.make
1784 Index: linux-2.4.35.4/arch/mips/au1000/db1x00/mmc_support.c
1785 ===================================================================
1786 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
1787 +++ linux-2.4.35.4/arch/mips/au1000/db1x00/mmc_support.c 2007-12-15 05:19:44.798973987 +0100
1788 @@ -0,0 +1,126 @@
1789 +/*
1790 + * BRIEF MODULE DESCRIPTION
1791 + *
1792 + * MMC support routines for DB1100.
1793 + *
1794 + *
1795 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
1796 + * Author: Embedded Edge, LLC.
1797 + * Contact: dan@embeddededge.com
1798 + *
1799 + * This program is free software; you can redistribute it and/or modify it
1800 + * under the terms of the GNU General Public License as published by the
1801 + * Free Software Foundation; either version 2 of the License, or (at your
1802 + * option) any later version.
1803 + *
1804 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
1805 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
1806 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
1807 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1808 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1809 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
1810 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1811 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1812 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1813 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1814 + *
1815 + * You should have received a copy of the GNU General Public License along
1816 + * with this program; if not, write to the Free Software Foundation, Inc.,
1817 + * 675 Mass Ave, Cambridge, MA 02139, USA.
1818 + *
1819 + */
1820 +
1821 +
1822 +#include <linux/config.h>
1823 +#include <linux/kernel.h>
1824 +#include <linux/module.h>
1825 +#include <linux/init.h>
1826 +
1827 +#include <asm/irq.h>
1828 +#include <asm/au1000.h>
1829 +#include <asm/au1100_mmc.h>
1830 +#include <asm/db1x00.h>
1831 +
1832 +
1833 +/* SD/MMC controller support functions */
1834 +
1835 +/*
1836 + * Detect card.
1837 + */
1838 +void mmc_card_inserted(int _n_, int *_res_)
1839 +{
1840 + u32 gpios = au_readl(SYS_PINSTATERD);
1841 + u32 emptybit = (_n_) ? (1<<20) : (1<<19);
1842 + *_res_ = ((gpios & emptybit) == 0);
1843 +}
1844 +
1845 +/*
1846 + * Check card write protection.
1847 + */
1848 +void mmc_card_writable(int _n_, int *_res_)
1849 +{
1850 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1851 + unsigned long mmc_wp, board_specific;
1852 +
1853 + if (_n_) {
1854 + mmc_wp = BCSR_BOARD_SD1_WP;
1855 + } else {
1856 + mmc_wp = BCSR_BOARD_SD0_WP;
1857 + }
1858 +
1859 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1860 +
1861 + if (!(board_specific & mmc_wp)) {/* low means card writable */
1862 + *_res_ = 1;
1863 + } else {
1864 + *_res_ = 0;
1865 + }
1866 +}
1867 +
1868 +/*
1869 + * Apply power to card slot.
1870 + */
1871 +void mmc_power_on(int _n_)
1872 +{
1873 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1874 + unsigned long mmc_pwr, board_specific;
1875 +
1876 + if (_n_) {
1877 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1878 + } else {
1879 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1880 + }
1881 +
1882 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1883 + board_specific |= mmc_pwr;
1884 +
1885 + au_writel(board_specific, (int)(&bcsr->specific));
1886 + au_sync_delay(1);
1887 +}
1888 +
1889 +/*
1890 + * Remove power from card slot.
1891 + */
1892 +void mmc_power_off(int _n_)
1893 +{
1894 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1895 + unsigned long mmc_pwr, board_specific;
1896 +
1897 + if (_n_) {
1898 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1899 + } else {
1900 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1901 + }
1902 +
1903 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1904 + board_specific &= ~mmc_pwr;
1905 +
1906 + au_writel(board_specific, (int)(&bcsr->specific));
1907 + au_sync_delay(1);
1908 +}
1909 +
1910 +EXPORT_SYMBOL(mmc_card_inserted);
1911 +EXPORT_SYMBOL(mmc_card_writable);
1912 +EXPORT_SYMBOL(mmc_power_on);
1913 +EXPORT_SYMBOL(mmc_power_off);
1914 +
1915 Index: linux-2.4.35.4/arch/mips/au1000/ficmmp/au1200_ibutton.c
1916 ===================================================================
1917 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
1918 +++ linux-2.4.35.4/arch/mips/au1000/ficmmp/au1200_ibutton.c 2007-12-15 05:19:44.798973987 +0100
1919 @@ -0,0 +1,270 @@
1920 +/* ----------------------------------------------------------------------
1921 + * mtwilson_keys.c
1922 + *
1923 + * Copyright (C) 2003 Intrinsyc Software Inc.
1924 + *
1925 + * Intel Personal Media Player buttons
1926 + *
1927 + * This program is free software; you can redistribute it and/or modify
1928 + * it under the terms of the GNU General Public License version 2 as
1929 + * published by the Free Software Foundation.
1930 + *
1931 + * May 02, 2003 : Initial version [FB]
1932 + *
1933 + ------------------------------------------------------------------------*/
1934 +
1935 +#include <linux/config.h>
1936 +#include <linux/module.h>
1937 +#include <linux/kernel.h>
1938 +#include <linux/init.h>
1939 +#include <linux/fs.h>
1940 +#include <linux/sched.h>
1941 +#include <linux/miscdevice.h>
1942 +#include <linux/errno.h>
1943 +#include <linux/poll.h>
1944 +#include <linux/delay.h>
1945 +#include <linux/input.h>
1946 +
1947 +#include <asm/au1000.h>
1948 +#include <asm/uaccess.h>
1949 +#include <asm/au1xxx_gpio.h>
1950 +#include <asm/irq.h>
1951 +#include <asm/keyboard.h>
1952 +#include <linux/time.h>
1953 +
1954 +#define DRIVER_VERSION "V1.0"
1955 +#define DRIVER_AUTHOR "FIC"
1956 +#define DRIVER_DESC "FIC Travis Media Player Button Driver"
1957 +#define DRIVER_NAME "Au1200Button"
1958 +
1959 +#define BUTTON_MAIN (1<<1)
1960 +#define BUTTON_SELECT (1<<6)
1961 +#define BUTTON_GUIDE (1<<12)
1962 +#define BUTTON_DOWN (1<<17)
1963 +#define BUTTON_LEFT (1<<19)
1964 +#define BUTTON_RIGHT (1<<26)
1965 +#define BUTTON_UP (1<<28)
1966 +
1967 +#define BUTTON_MASK (\
1968 + BUTTON_MAIN \
1969 + | BUTTON_SELECT \
1970 + | BUTTON_GUIDE \
1971 + | BUTTON_DOWN \
1972 + | BUTTON_LEFT \
1973 + | BUTTON_RIGHT \
1974 + | BUTTON_UP \
1975 + )
1976 +
1977 +#define BUTTON_INVERT (\
1978 + BUTTON_MAIN \
1979 + | 0 \
1980 + | BUTTON_GUIDE \
1981 + | 0 \
1982 + | 0 \
1983 + | 0 \
1984 + | 0 \
1985 + )
1986 +
1987 +char button_map[32]={0,KEY_S,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1988 +//char button_map[32]={0,0,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1989 +
1990 +//char button_map[32]={0,KEY_TAB,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1991 +//char button_map[32]={0,0,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
1992 +
1993 +#define BUTTON_COUNT (sizeof (button_map) / sizeof (button_map[0]))
1994 +
1995 +struct input_dev dev;
1996 +struct timeval cur_tv;
1997 +
1998 +static unsigned int old_tv_usec = 0;
1999 +
2000 +static unsigned int read_button_state(void)
2001 +{
2002 + unsigned int state;
2003 +
2004 + state = au_readl(SYS_PINSTATERD) & BUTTON_MASK; /* get gpio status */
2005 +
2006 + state ^= BUTTON_INVERT; /* invert main & guide button */
2007 +
2008 + /* printk("au1200_ibutton.c: button state [0x%X]\r\n",state); */
2009 + return state;
2010 +}
2011 +
2012 +//This function returns 0 if the allowed microseconds have elapsed since the last call to ths function, otherwise it returns 1 to indicate a bounce condition
2013 +static unsigned int bounce()
2014 +{
2015 +
2016 + unsigned int elapsed_time;
2017 +
2018 + do_gettimeofday (&cur_tv);
2019 +
2020 + if (!old_tv_usec) {
2021 + old_tv_usec = cur_tv.tv_usec;
2022 + return 0;
2023 + }
2024 +
2025 + if(cur_tv.tv_usec > old_tv_usec) {
2026 + /* If there hasn't been rollover */
2027 + elapsed_time = ((cur_tv.tv_usec - old_tv_usec));
2028 + }
2029 + else {
2030 + /* Accounting for rollover */
2031 + elapsed_time = ((1000000 - old_tv_usec + cur_tv.tv_usec));
2032 + }
2033 +
2034 + if (elapsed_time > 250000) {
2035 + old_tv_usec = 0; /* reset the bounce time */
2036 + return 0;
2037 + }
2038 +
2039 + return 1;
2040 +}
2041 +
2042 +/* button interrupt handler */
2043 +static void button_interrupt(int irq, void *dev, struct pt_regs *regs)
2044 +{
2045 +
2046 + unsigned int i,bit_mask, key_choice;
2047 + u32 button_state;
2048 +
2049 + /* Report state to upper level */
2050 +
2051 + button_state = read_button_state() & BUTTON_MASK; /* get new gpio status */
2052 +
2053 + /* Return if this is a repeated (bouncing) event */
2054 + if(bounce())
2055 + return;
2056 +
2057 + /* we want to make keystrokes */
2058 + for( i=0; i< BUTTON_COUNT; i++) {
2059 + bit_mask = 1<<i;
2060 + if (button_state & bit_mask) {
2061 + key_choice = button_map[i];
2062 + /* toggle key down */
2063 + input_report_key(dev, key_choice, 1);
2064 + /* toggle key up */
2065 + input_report_key(dev, key_choice, 0);
2066 + printk("ibutton gpio %d stat %x scan code %d\r\n",
2067 + i, button_state, key_choice);
2068 + /* Only report the first key event; it doesn't make
2069 + * sense for two keys to be pressed at the same time,
2070 + * and causes problems with the directional keys
2071 + * return;
2072 + */
2073 + }
2074 + }
2075 +}
2076 +
2077 +static int
2078 +button_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
2079 +{
2080 + static int prev_scancode;
2081 +
2082 + printk( "ibutton.c: translate: scancode=%x raw_mode=%x\n",
2083 + scancode, raw_mode);
2084 +
2085 + if (scancode == 0xe0 || scancode == 0xe1) {
2086 + prev_scancode = scancode;
2087 + return 0;
2088 + }
2089 +
2090 + if (scancode == 0x00 || scancode == 0xff) {
2091 + prev_scancode = 0;
2092 + return 0;
2093 + }
2094 +
2095 + *keycode = scancode;
2096 +
2097 + return 1;
2098 +}
2099 +
2100 +/* init button hardware */
2101 +static int button_hw_init(void)
2102 +{
2103 + unsigned int ipinfunc=0;
2104 +
2105 + printk("au1200_ibutton.c: Initializing buttons hardware\n");
2106 +
2107 + // initialize GPIO pin function assignments
2108 +
2109 + ipinfunc = au_readl(SYS_PINFUNC);
2110 +
2111 + ipinfunc &= ~(SYS_PINFUNC_DMA | SYS_PINFUNC_S0A | SYS_PINFUNC_S0B);
2112 + au_writel( ipinfunc ,SYS_PINFUNC);
2113 +
2114 + ipinfunc |= (SYS_PINFUNC_S0C);
2115 + au_writel( ipinfunc ,SYS_PINFUNC);
2116 +
2117 + return 0;
2118 +}
2119 +
2120 +/* button driver init */
2121 +static int __init button_init(void)
2122 +{
2123 + int ret, i;
2124 + unsigned int flag=0;
2125 +
2126 + printk("au1200_ibutton.c: button_init()\r\n");
2127 +
2128 + button_hw_init();
2129 +
2130 + /* register all button irq handler */
2131 +
2132 + for(i=0; i< sizeof(button_map)/sizeof(button_map[0]); i++)
2133 + {
2134 + /* register irq <-- gpio 1 ,6 ,12 , 17 ,19 , 26 ,28 */
2135 + if(button_map[i] != 0)
2136 + {
2137 + ret = request_irq(AU1000_GPIO_0 + i ,
2138 + &button_interrupt , SA_INTERRUPT ,
2139 + DRIVER_NAME , &dev);
2140 + if(ret) flag |= 1<<i;
2141 + }
2142 + }
2143 +
2144 + printk("au1200_ibutton.c: request_irq,ret:0x%x\r\n",ret);
2145 +
2146 + if (ret) {
2147 + printk("au1200_ibutton.c: request_irq:%X failed\r\n",flag);
2148 + return ret;
2149 + }
2150 +
2151 + dev.name = DRIVER_NAME;
2152 + dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
2153 +
2154 + for (i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2155 + {
2156 + dev.keybit[LONG(button_map[i])] |= BIT(button_map[i]);
2157 + }
2158 +
2159 + input_register_device(&dev);
2160 +
2161 + /* ready to receive interrupts */
2162 +
2163 + return 0;
2164 +}
2165 +
2166 +/* button driver exit */
2167 +static void __exit button_exit(void)
2168 +{
2169 + int i;
2170 +
2171 + for(i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2172 + {
2173 + if(button_map[i] != 0)
2174 + {
2175 + free_irq( AU1000_GPIO_0 + i, &dev);
2176 + }
2177 + }
2178 +
2179 + input_unregister_device(&dev);
2180 +
2181 + printk("au1200_ibutton.c: button_exit()\r\n");
2182 +}
2183 +
2184 +module_init(button_init);
2185 +module_exit(button_exit);
2186 +
2187 +MODULE_AUTHOR( DRIVER_AUTHOR );
2188 +MODULE_DESCRIPTION( DRIVER_DESC );
2189 +MODULE_LICENSE("GPL");
2190 Index: linux-2.4.35.4/arch/mips/au1000/ficmmp/au1xxx_dock.c
2191 ===================================================================
2192 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
2193 +++ linux-2.4.35.4/arch/mips/au1000/ficmmp/au1xxx_dock.c 2007-12-15 05:19:44.798973987 +0100
2194 @@ -0,0 +1,261 @@
2195 +/*
2196 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2197 + *
2198 + * This program is free software; you can redistribute it and/or modify
2199 + * it under the terms of the GNU General Public License version 2 as
2200 + * published by the Free Software Foundation.
2201 + */
2202 +
2203 +#include <linux/config.h>
2204 +#include <linux/module.h>
2205 +#include <linux/init.h>
2206 +#include <linux/fs.h>
2207 +#include <linux/sched.h>
2208 +#include <linux/miscdevice.h>
2209 +#include <linux/errno.h>
2210 +#include <linux/poll.h>
2211 +#include <asm/au1000.h>
2212 +#include <asm/uaccess.h>
2213 +#include <asm/au1xxx_gpio.h>
2214 +
2215 +
2216 +#if defined(CONFIG_MIPS_FICMMP)
2217 + #define DOCK_GPIO 215
2218 +#else
2219 + #error Unsupported Au1xxx Platform
2220 +#endif
2221 +
2222 +#define MAKE_FLAG 0x20
2223 +
2224 +#undef DEBUG
2225 +
2226 +#define DEBUG 0
2227 +//#define DEBUG 1
2228 +
2229 +#if DEBUG
2230 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2231 +#else
2232 +#define DPRINTK(format, args...) do { } while (0)
2233 +#endif
2234 +
2235 +/* Please note that this driver is based on a timer and is not interrupt
2236 + * driven. If you are going to make use of this driver, you will need to have
2237 + * your application open the dock listing from the /dev directory first.
2238 + */
2239 +
2240 +struct au1xxx_dock {
2241 + struct fasync_struct *fasync;
2242 + wait_queue_head_t read_wait;
2243 + int open_count;
2244 + unsigned int debounce;
2245 + unsigned int current;
2246 + unsigned int last;
2247 +};
2248 +
2249 +static struct au1xxx_dock dock_info;
2250 +
2251 +
2252 +static void dock_timer_periodic(void *data);
2253 +
2254 +static struct tq_struct dock_task = {
2255 + routine: dock_timer_periodic,
2256 + data: NULL
2257 +};
2258 +
2259 +static int cleanup_flag = 0;
2260 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2261 +
2262 +
2263 +static unsigned int read_dock_state(void)
2264 +{
2265 + u32 state;
2266 +
2267 + state = au1xxx_gpio_read(DOCK_GPIO);
2268 +
2269 + /* printk( "Current Dock State: %d\n", state ); */
2270 +
2271 + return state;
2272 +}
2273 +
2274 +
2275 +static void dock_timer_periodic(void *data)
2276 +{
2277 + struct au1xxx_dock *dock = (struct au1xxx_dock *)data;
2278 + unsigned long dock_state;
2279 +
2280 + /* If cleanup wants us to die */
2281 + if (cleanup_flag) {
2282 + /* now cleanup_module can return */
2283 + wake_up(&cleanup_wait_queue);
2284 + } else {
2285 + /* put ourselves back in the task queue */
2286 + queue_task(&dock_task, &tq_timer);
2287 + }
2288 +
2289 + /* read current dock */
2290 + dock_state = read_dock_state();
2291 +
2292 + /* if dock states hasn't changed */
2293 + /* save time and be done. */
2294 + if (dock_state == dock->current) {
2295 + return;
2296 + }
2297 +
2298 + if (dock_state == dock->debounce) {
2299 + dock->current = dock_state;
2300 + } else {
2301 + dock->debounce = dock_state;
2302 + }
2303 + if (dock->current != dock->last) {
2304 + if (waitqueue_active(&dock->read_wait)) {
2305 + wake_up_interruptible(&dock->read_wait);
2306 + }
2307 + }
2308 +}
2309 +
2310 +
2311 +static ssize_t au1xxx_dock_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2312 +{
2313 + struct au1xxx_dock *dock = filp->private_data;
2314 + char event[3];
2315 + int last;
2316 + int cur;
2317 + int err;
2318 +
2319 +try_again:
2320 +
2321 + while (dock->current == dock->last) {
2322 + if (filp->f_flags & O_NONBLOCK) {
2323 + return -EAGAIN;
2324 + }
2325 + interruptible_sleep_on(&dock->read_wait);
2326 + if (signal_pending(current)) {
2327 + return -ERESTARTSYS;
2328 + }
2329 + }
2330 +
2331 + cur = dock->current;
2332 + last = dock->last;
2333 +
2334 + if(cur != last)
2335 + {
2336 + event[0] = cur ? 'D' : 'U';
2337 + event[1] = '\r';
2338 + event[2] = '\n';
2339 + }
2340 + else
2341 + goto try_again;
2342 +
2343 + dock->last = cur;
2344 + err = copy_to_user(buffer, &event, 3);
2345 + if (err) {
2346 + return err;
2347 + }
2348 +
2349 + return 3;
2350 +}
2351 +
2352 +
2353 +static int au1xxx_dock_open(struct inode *inode, struct file *filp)
2354 +{
2355 + struct au1xxx_dock *dock = &dock_info;
2356 +
2357 + MOD_INC_USE_COUNT;
2358 +
2359 + filp->private_data = dock;
2360 +
2361 + if (dock->open_count++ == 0) {
2362 + dock_task.data = dock;
2363 + cleanup_flag = 0;
2364 + queue_task(&dock_task, &tq_timer);
2365 + }
2366 +
2367 + return 0;
2368 +}
2369 +
2370 +
2371 +static unsigned int au1xxx_dock_poll(struct file *filp, poll_table *wait)
2372 +{
2373 + struct au1xxx_dock *dock = filp->private_data;
2374 + int ret = 0;
2375 +
2376 + DPRINTK("start\n");
2377 + poll_wait(filp, &dock->read_wait, wait);
2378 + if (dock->current != dock->last) {
2379 + ret = POLLIN | POLLRDNORM;
2380 + }
2381 + return ret;
2382 +}
2383 +
2384 +
2385 +static int au1xxx_dock_release(struct inode *inode, struct file *filp)
2386 +{
2387 + struct au1xxx_dock *dock = filp->private_data;
2388 +
2389 + DPRINTK("start\n");
2390 +
2391 + if (--dock->open_count == 0) {
2392 + cleanup_flag = 1;
2393 + sleep_on(&cleanup_wait_queue);
2394 + }
2395 + MOD_DEC_USE_COUNT;
2396 +
2397 + return 0;
2398 +}
2399 +
2400 +
2401 +
2402 +static struct file_operations au1xxx_dock_fops = {
2403 + owner: THIS_MODULE,
2404 + read: au1xxx_dock_read,
2405 + poll: au1xxx_dock_poll,
2406 + open: au1xxx_dock_open,
2407 + release: au1xxx_dock_release,
2408 +};
2409 +
2410 +/*
2411 + * The au1xxx dock is a misc device:
2412 + * Major 10 char
2413 + * Minor 22 /dev/dock
2414 + *
2415 + * This is /dev/misc/dock if devfs is used.
2416 + */
2417 +
2418 +static struct miscdevice au1xxx_dock_dev = {
2419 + minor: 23,
2420 + name: "dock",
2421 + fops: &au1xxx_dock_fops,
2422 +};
2423 +
2424 +static int __init au1xxx_dock_init(void)
2425 +{
2426 + struct au1xxx_dock *dock = &dock_info;
2427 + int ret;
2428 +
2429 + DPRINTK("Initializing dock driver\n");
2430 + dock->open_count = 0;
2431 + cleanup_flag = 0;
2432 + init_waitqueue_head(&dock->read_wait);
2433 +
2434 +
2435 + /* yamon configures GPIO pins for the dock
2436 + * no initialization needed
2437 + */
2438 +
2439 + ret = misc_register(&au1xxx_dock_dev);
2440 +
2441 + DPRINTK("dock driver fully initialized.\n");
2442 +
2443 + return ret;
2444 +}
2445 +
2446 +
2447 +static void __exit au1xxx_dock_exit(void)
2448 +{
2449 + DPRINTK("unloading dock driver\n");
2450 + misc_deregister(&au1xxx_dock_dev);
2451 +}
2452 +
2453 +
2454 +module_init(au1xxx_dock_init);
2455 +module_exit(au1xxx_dock_exit);
2456 Index: linux-2.4.35.4/arch/mips/au1000/ficmmp/board_setup.c
2457 ===================================================================
2458 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
2459 +++ linux-2.4.35.4/arch/mips/au1000/ficmmp/board_setup.c 2007-12-15 05:19:44.798973987 +0100
2460 @@ -0,0 +1,226 @@
2461 +/*
2462 + *
2463 + * BRIEF MODULE DESCRIPTION
2464 + * Alchemy Pb1200 board setup.
2465 + *
2466 + * This program is free software; you can redistribute it and/or modify it
2467 + * under the terms of the GNU General Public License as published by the
2468 + * Free Software Foundation; either version 2 of the License, or (at your
2469 + * option) any later version.
2470 + *
2471 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2472 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2473 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2474 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2475 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2476 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2477 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2478 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2479 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2480 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2481 + *
2482 + * You should have received a copy of the GNU General Public License along
2483 + * with this program; if not, write to the Free Software Foundation, Inc.,
2484 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2485 + */
2486 +#include <linux/config.h>
2487 +#include <linux/init.h>
2488 +#include <linux/sched.h>
2489 +#include <linux/ioport.h>
2490 +#include <linux/mm.h>
2491 +#include <linux/console.h>
2492 +#include <linux/mc146818rtc.h>
2493 +#include <linux/delay.h>
2494 +#include <linux/ide.h>
2495 +
2496 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2497 +#include <linux/ide.h>
2498 +#endif
2499 +
2500 +#include <asm/cpu.h>
2501 +#include <asm/bootinfo.h>
2502 +#include <asm/irq.h>
2503 +#include <asm/keyboard.h>
2504 +#include <asm/mipsregs.h>
2505 +#include <asm/reboot.h>
2506 +#include <asm/pgtable.h>
2507 +#include <asm/au1000.h>
2508 +#include <asm/ficmmp.h>
2509 +#include <asm/au1xxx_dbdma.h>
2510 +#include <asm/au1xxx_gpio.h>
2511 +
2512 +extern struct rtc_ops no_rtc_ops;
2513 +
2514 +/* value currently in the board configuration register */
2515 +u16 ficmmp_config = 0;
2516 +
2517 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2518 +extern struct ide_ops *ide_ops;
2519 +extern struct ide_ops au1xxx_ide_ops;
2520 +extern u32 au1xxx_ide_virtbase;
2521 +extern u64 au1xxx_ide_physbase;
2522 +extern int au1xxx_ide_irq;
2523 +
2524 +u32 led_base_addr;
2525 +/* Ddma */
2526 +chan_tab_t *ide_read_ch, *ide_write_ch;
2527 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
2528 +
2529 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
2530 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
2531 +
2532 +void board_reset (void)
2533 +{
2534 + au_writel(0, 0xAD80001C);
2535 +}
2536 +
2537 +void board_power_off (void)
2538 +{
2539 +}
2540 +
2541 +void __init board_setup(void)
2542 +{
2543 + char *argptr = NULL;
2544 + u32 pin_func;
2545 + rtc_ops = &no_rtc_ops;
2546 +
2547 + ficmmp_config_init(); //Initialize FIC control register
2548 +
2549 +#if 0
2550 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
2551 + * but it is board specific code, so put it here.
2552 + */
2553 + pin_func = au_readl(SYS_PINFUNC);
2554 + au_sync();
2555 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
2556 + au_writel(pin_func, SYS_PINFUNC);
2557 +
2558 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
2559 + au_sync();
2560 +#endif
2561 +
2562 +#if defined( CONFIG_I2C_ALGO_AU1550 )
2563 + {
2564 + u32 freq0, clksrc;
2565 +
2566 + /* Select SMBUS in CPLD */
2567 + /* bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); */
2568 +
2569 + pin_func = au_readl(SYS_PINFUNC);
2570 + au_sync();
2571 + pin_func &= ~(3<<17 | 1<<4);
2572 + /* Set GPIOs correctly */
2573 + pin_func |= 2<<17;
2574 + au_writel(pin_func, SYS_PINFUNC);
2575 + au_sync();
2576 +
2577 + /* The i2c driver depends on 50Mhz clock */
2578 + freq0 = au_readl(SYS_FREQCTRL0);
2579 + au_sync();
2580 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
2581 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
2582 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
2583 + au_writel(freq0, SYS_FREQCTRL0);
2584 + au_sync();
2585 + freq0 |= SYS_FC_FE1;
2586 + au_writel(freq0, SYS_FREQCTRL0);
2587 + au_sync();
2588 +
2589 + clksrc = au_readl(SYS_CLKSRC);
2590 + au_sync();
2591 + clksrc &= ~0x01f00000;
2592 + /* bit 22 is EXTCLK0 for PSC0 */
2593 + clksrc |= (0x3 << 22);
2594 + au_writel(clksrc, SYS_CLKSRC);
2595 + au_sync();
2596 + }
2597 +#endif
2598 +
2599 +#ifdef CONFIG_FB_AU1200
2600 + argptr = prom_getcmdline();
2601 + strcat(argptr, " video=au1200fb:");
2602 +#endif
2603 +
2604 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2605 + /*
2606 + * Iniz IDE parameters
2607 + */
2608 + ide_ops = &au1xxx_ide_ops;
2609 + au1xxx_ide_irq = FICMMP_IDE_INT;
2610 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
2611 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
2612 + switch4ddma = 0;
2613 + /*
2614 + ide_ops = &au1xxx_ide_ops;
2615 + au1xxx_ide_irq = FICMMP_IDE_INT;
2616 + au1xxx_ide_base = KSEG1ADDR(AU1XXX_ATA_BASE);
2617 + */
2618 + au1xxx_gpio_write(9, 1);
2619 + printk("B4001010: %X\n", *((u32*)0xB4001010));
2620 + printk("B4001014: %X\n", *((u32*)0xB4001014));
2621 + printk("B4001018: %X\n", *((u32*)0xB4001018));
2622 + printk("B1900100: %X\n", *((u32*)0xB1900100));
2623 +
2624 +#if 0
2625 + ficmmp_config_clear(FICMMP_CONFIG_IDERST);
2626 + mdelay(100);
2627 + ficmmp_config_set(FICMMP_CONFIG_IDERST);
2628 + mdelay(100);
2629 +#endif
2630 + /*
2631 + * change PIO or PIO+Ddma
2632 + * check the GPIO-5 pin condition. pb1200:s18_dot
2633 + */
2634 +/* switch4ddma = 0; //(au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; */
2635 +#endif
2636 +
2637 + /* The Pb1200 development board uses external MUX for PSC0 to
2638 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
2639 + */
2640 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
2641 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
2642 + Refer to Pb1200 documentation.
2643 +#elif defined( CONFIG_AU1550_PSC_SPI )
2644 + //bcsr->resets |= BCSR_RESETS_PCS0MUX;
2645 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
2646 + //bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
2647 +#endif
2648 + au_sync();
2649 +
2650 + printk("FIC Multimedia Player Board\n");
2651 + au1xxx_gpio_tristate(5);
2652 + printk("B1900100: %X\n", *((volatile u32*)0xB1900100));
2653 + printk("B190002C: %X\n", *((volatile u32*)0xB190002C));
2654 +}
2655 +
2656 +int
2657 +board_au1200fb_panel (void)
2658 +{
2659 + au1xxx_gpio_tristate(6);
2660 +
2661 + if (au1xxx_gpio_read(12) == 0)
2662 + return 9; /* FS453_640x480 (Composite/S-Video) */
2663 + else
2664 + return 7; /* Sharp 320x240 TFT */
2665 +}
2666 +
2667 +int
2668 +board_au1200fb_panel_init (void)
2669 +{
2670 + /*Enable data buffers*/
2671 + ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT);
2672 + /*Take LCD out of reset*/
2673 + ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN);
2674 + return 0;
2675 +}
2676 +
2677 +int
2678 +board_au1200fb_panel_shutdown (void)
2679 +{
2680 + /*Disable data buffers*/
2681 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT);
2682 + /*Put LCD in reset, remove power*/
2683 + ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN);
2684 + return 0;
2685 +}
2686 +
2687 Index: linux-2.4.35.4/arch/mips/au1000/ficmmp/init.c
2688 ===================================================================
2689 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
2690 +++ linux-2.4.35.4/arch/mips/au1000/ficmmp/init.c 2007-12-15 05:19:44.802974213 +0100
2691 @@ -0,0 +1,76 @@
2692 +/*
2693 + *
2694 + * BRIEF MODULE DESCRIPTION
2695 + * PB1200 board setup
2696 + *
2697 + * This program is free software; you can redistribute it and/or modify it
2698 + * under the terms of the GNU General Public License as published by the
2699 + * Free Software Foundation; either version 2 of the License, or (at your
2700 + * option) any later version.
2701 + *
2702 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2703 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2704 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2705 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2706 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2707 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2708 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2709 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2710 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2711 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2712 + *
2713 + * You should have received a copy of the GNU General Public License along
2714 + * with this program; if not, write to the Free Software Foundation, Inc.,
2715 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2716 + */
2717 +
2718 +#include <linux/init.h>
2719 +#include <linux/mm.h>
2720 +#include <linux/sched.h>
2721 +#include <linux/bootmem.h>
2722 +#include <asm/addrspace.h>
2723 +#include <asm/bootinfo.h>
2724 +#include <linux/config.h>
2725 +#include <linux/string.h>
2726 +#include <linux/kernel.h>
2727 +#include <linux/sched.h>
2728 +
2729 +int prom_argc;
2730 +char **prom_argv, **prom_envp;
2731 +extern void __init prom_init_cmdline(void);
2732 +extern char *prom_getenv(char *envname);
2733 +
2734 +const char *get_system_type(void)
2735 +{
2736 + return "FIC Multimedia Player (Au1200)";
2737 +}
2738 +
2739 +u32 mae_memsize = 0;
2740 +
2741 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
2742 +{
2743 + unsigned char *memsize_str;
2744 + unsigned long memsize;
2745 +
2746 + prom_argc = argc;
2747 + prom_argv = argv;
2748 + prom_envp = envp;
2749 +
2750 + mips_machgroup = MACH_GROUP_ALCHEMY;
2751 + mips_machtype = MACH_PB1000; /* set the platform # */
2752 + prom_init_cmdline();
2753 +
2754 + memsize_str = prom_getenv("memsize");
2755 + if (!memsize_str) {
2756 + memsize = 0x08000000;
2757 + } else {
2758 + memsize = simple_strtol(memsize_str, NULL, 0);
2759 + }
2760 +
2761 + /* reserved 32MB for MAE driver */
2762 + memsize -= (32 * 1024 * 1024);
2763 + add_memory_region(0, memsize, BOOT_MEM_RAM);
2764 + mae_memsize = memsize; /* for drivers/char/au1xxx_mae.c */
2765 + return 0;
2766 +}
2767 +
2768 Index: linux-2.4.35.4/arch/mips/au1000/ficmmp/irqmap.c
2769 ===================================================================
2770 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
2771 +++ linux-2.4.35.4/arch/mips/au1000/ficmmp/irqmap.c 2007-12-15 05:19:44.802974213 +0100
2772 @@ -0,0 +1,61 @@
2773 +/*
2774 + * BRIEF MODULE DESCRIPTION
2775 + * Au1xxx irq map table
2776 + *
2777 + * This program is free software; you can redistribute it and/or modify it
2778 + * under the terms of the GNU General Public License as published by the
2779 + * Free Software Foundation; either version 2 of the License, or (at your
2780 + * option) any later version.
2781 + *
2782 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2783 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2784 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2785 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2786 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2787 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2788 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2789 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2790 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2791 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2792 + *
2793 + * You should have received a copy of the GNU General Public License along
2794 + * with this program; if not, write to the Free Software Foundation, Inc.,
2795 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2796 + */
2797 +#include <linux/errno.h>
2798 +#include <linux/init.h>
2799 +#include <linux/irq.h>
2800 +#include <linux/kernel_stat.h>
2801 +#include <linux/module.h>
2802 +#include <linux/signal.h>
2803 +#include <linux/sched.h>
2804 +#include <linux/types.h>
2805 +#include <linux/interrupt.h>
2806 +#include <linux/ioport.h>
2807 +#include <linux/timex.h>
2808 +#include <linux/slab.h>
2809 +#include <linux/random.h>
2810 +#include <linux/delay.h>
2811 +
2812 +#include <asm/bitops.h>
2813 +#include <asm/bootinfo.h>
2814 +#include <asm/io.h>
2815 +#include <asm/mipsregs.h>
2816 +#include <asm/system.h>
2817 +#include <asm/au1000.h>
2818 +#include <asm/ficmmp.h>
2819 +
2820 +au1xxx_irq_map_t au1xxx_irq_map[] = {
2821 + { FICMMP_IDE_INT, INTC_INT_HIGH_LEVEL, 0 },
2822 + { AU1XXX_SMC91111_IRQ, INTC_INT_HIGH_LEVEL, 0 },
2823 + { AU1000_GPIO_1 , INTC_INT_FALL_EDGE, 0 }, // main button
2824 + { AU1000_GPIO_6 , INTC_INT_RISE_EDGE, 0 }, // select button
2825 + { AU1000_GPIO_12, INTC_INT_FALL_EDGE, 0 }, // guide button
2826 + { AU1000_GPIO_17, INTC_INT_RISE_EDGE, 0 }, // down button
2827 + { AU1000_GPIO_19, INTC_INT_RISE_EDGE, 0 }, // left button
2828 + { AU1000_GPIO_26, INTC_INT_RISE_EDGE, 0 }, // right button
2829 + { AU1000_GPIO_28, INTC_INT_RISE_EDGE, 0 }, // up button
2830 +};
2831 +
2832 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
2833 +
2834 Index: linux-2.4.35.4/arch/mips/au1000/ficmmp/Makefile
2835 ===================================================================
2836 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
2837 +++ linux-2.4.35.4/arch/mips/au1000/ficmmp/Makefile 2007-12-15 05:19:44.802974213 +0100
2838 @@ -0,0 +1,25 @@
2839 +#
2840 +# Copyright 2000 MontaVista Software Inc.
2841 +# Author: MontaVista Software, Inc.
2842 +# ppopov@mvista.com or source@mvista.com
2843 +#
2844 +# Makefile for the Alchemy Semiconductor FIC board.
2845 +#
2846 +# Note! Dependencies are done automagically by 'make dep', which also
2847 +# removes any old dependencies. DON'T put your own dependencies here
2848 +# unless it's something special (ie not a .c file).
2849 +#
2850 +
2851 +USE_STANDARD_AS_RULE := true
2852 +
2853 +O_TARGET := ficmmp.o
2854 +
2855 +obj-y := init.o board_setup.o irqmap.o au1200_ibutton.o au1xxx_dock.o
2856 +
2857 +ifdef CONFIG_MMC
2858 +obj-y += mmc_support.o
2859 +export-objs +=mmc_support.o
2860 +endif
2861 +
2862 +
2863 +include $(TOPDIR)/Rules.make
2864 Index: linux-2.4.35.4/arch/mips/au1000/hydrogen3/board_setup.c
2865 ===================================================================
2866 --- linux-2.4.35.4.orig/arch/mips/au1000/hydrogen3/board_setup.c 2007-12-15 05:19:43.014872316 +0100
2867 +++ linux-2.4.35.4/arch/mips/au1000/hydrogen3/board_setup.c 2007-12-15 05:19:44.802974213 +0100
2868 @@ -51,12 +51,19 @@
2869 {
2870 }
2871
2872 +void board_power_off (void)
2873 +{
2874 +}
2875 +
2876 void __init board_setup(void)
2877 {
2878 u32 pin_func;
2879
2880 rtc_ops = &no_rtc_ops;
2881
2882 + /* Set GPIO14 high to make CD/DAT1 high for MMC to work */
2883 + au_writel(1<<14, SYS_OUTPUTSET);
2884 +
2885 #ifdef CONFIG_AU1X00_USB_DEVICE
2886 // 2nd USB port is USB device
2887 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
2888 Index: linux-2.4.35.4/arch/mips/au1000/hydrogen3/buttons.c
2889 ===================================================================
2890 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
2891 +++ linux-2.4.35.4/arch/mips/au1000/hydrogen3/buttons.c 2007-12-15 05:19:44.802974213 +0100
2892 @@ -0,0 +1,308 @@
2893 +/*
2894 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2895 + *
2896 + * This program is free software; you can redistribute it and/or modify
2897 + * it under the terms of the GNU General Public License version 2 as
2898 + * published by the Free Software Foundation.
2899 + */
2900 +
2901 +#include <linux/config.h>
2902 +#include <linux/module.h>
2903 +#include <linux/init.h>
2904 +#include <linux/fs.h>
2905 +#include <linux/sched.h>
2906 +#include <linux/miscdevice.h>
2907 +#include <linux/errno.h>
2908 +#include <linux/poll.h>
2909 +#include <asm/au1000.h>
2910 +#include <asm/uaccess.h>
2911 +
2912 +#define BUTTON_SELECT (1<<1)
2913 +#define BUTTON_1 (1<<2)
2914 +#define BUTTON_2 (1<<3)
2915 +#define BUTTON_ONOFF (1<<6)
2916 +#define BUTTON_3 (1<<7)
2917 +#define BUTTON_4 (1<<8)
2918 +#define BUTTON_LEFT (1<<9)
2919 +#define BUTTON_DOWN (1<<10)
2920 +#define BUTTON_RIGHT (1<<11)
2921 +#define BUTTON_UP (1<<12)
2922 +
2923 +#define BUTTON_MASK (\
2924 + BUTTON_SELECT \
2925 + | BUTTON_1 \
2926 + | BUTTON_2 \
2927 + | BUTTON_ONOFF \
2928 + | BUTTON_3 \
2929 + | BUTTON_4 \
2930 + | BUTTON_LEFT \
2931 + | BUTTON_DOWN \
2932 + | BUTTON_RIGHT \
2933 + | BUTTON_UP \
2934 + )
2935 +
2936 +#define BUTTON_INVERT (\
2937 + BUTTON_SELECT \
2938 + | BUTTON_1 \
2939 + | BUTTON_2 \
2940 + | BUTTON_3 \
2941 + | BUTTON_4 \
2942 + | BUTTON_LEFT \
2943 + | BUTTON_DOWN \
2944 + | BUTTON_RIGHT \
2945 + | BUTTON_UP \
2946 + )
2947 +
2948 +
2949 +
2950 +#define MAKE_FLAG 0x20
2951 +
2952 +#undef DEBUG
2953 +
2954 +#define DEBUG 0
2955 +//#define DEBUG 1
2956 +
2957 +#if DEBUG
2958 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2959 +#else
2960 +#define DPRINTK(format, args...) do { } while (0)
2961 +#endif
2962 +
2963 +/* Please note that this driver is based on a timer and is not interrupt
2964 + * driven. If you are going to make use of this driver, you will need to have
2965 + * your application open the buttons listing from the /dev directory first.
2966 + */
2967 +
2968 +struct hydrogen3_buttons {
2969 + struct fasync_struct *fasync;
2970 + wait_queue_head_t read_wait;
2971 + int open_count;
2972 + unsigned int debounce;
2973 + unsigned int current;
2974 + unsigned int last;
2975 +};
2976 +
2977 +static struct hydrogen3_buttons buttons_info;
2978 +
2979 +
2980 +static void button_timer_periodic(void *data);
2981 +
2982 +static struct tq_struct button_task = {
2983 + routine: button_timer_periodic,
2984 + data: NULL
2985 +};
2986 +
2987 +static int cleanup_flag = 0;
2988 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2989 +
2990 +
2991 +static unsigned int read_button_state(void)
2992 +{
2993 + unsigned long state;
2994 +
2995 + state = inl(SYS_PINSTATERD) & BUTTON_MASK;
2996 + state ^= BUTTON_INVERT;
2997 +
2998 + DPRINTK( "Current Button State: %d\n", state );
2999 +
3000 + return state;
3001 +}
3002 +
3003 +
3004 +static void button_timer_periodic(void *data)
3005 +{
3006 + struct hydrogen3_buttons *buttons = (struct hydrogen3_buttons *)data;
3007 + unsigned long button_state;
3008 +
3009 + // If cleanup wants us to die
3010 + if (cleanup_flag) {
3011 + wake_up(&cleanup_wait_queue); // now cleanup_module can return
3012 + } else {
3013 + queue_task(&button_task, &tq_timer); // put ourselves back in the task queue
3014 + }
3015 +
3016 + // read current buttons
3017 + button_state = read_button_state();
3018 +
3019 + // if no buttons are down and nothing to do then
3020 + // save time and be done.
3021 + if ((button_state == 0) && (buttons->current == 0)) {
3022 + return;
3023 + }
3024 +
3025 + if (button_state == buttons->debounce) {
3026 + buttons->current = button_state;
3027 + } else {
3028 + buttons->debounce = button_state;
3029 + }
3030 +// printk("0x%04x\n", button_state);
3031 + if (buttons->current != buttons->last) {
3032 + if (waitqueue_active(&buttons->read_wait)) {
3033 + wake_up_interruptible(&buttons->read_wait);
3034 + }
3035 + }
3036 +}
3037 +
3038 +
3039 +static ssize_t hydrogen3_buttons_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
3040 +{
3041 + struct hydrogen3_buttons *buttons = filp->private_data;
3042 + char events[16];
3043 + int index;
3044 + int last;
3045 + int cur;
3046 + int bit;
3047 + int bit_mask;
3048 + int err;
3049 +
3050 + DPRINTK("start\n");
3051 +
3052 +try_again:
3053 +
3054 + while (buttons->current == buttons->last) {
3055 + if (filp->f_flags & O_NONBLOCK) {
3056 + return -EAGAIN;
3057 + }
3058 + interruptible_sleep_on(&buttons->read_wait);
3059 + if (signal_pending(current)) {
3060 + return -ERESTARTSYS;
3061 + }
3062 + }
3063 +
3064 + cur = buttons->current;
3065 + last = buttons->last;
3066 +
3067 + index = 0;
3068 + bit_mask = 1;
3069 + for (bit = 0; (bit < 16) && count; bit++) {
3070 + if ((cur ^ last) & bit_mask) {
3071 + if (cur & bit_mask) {
3072 + events[index] = (bit | MAKE_FLAG) + 'A';
3073 + last |= bit_mask;
3074 + } else {
3075 + events[index] = bit + 'A';
3076 + last &= ~bit_mask;
3077 + }
3078 + index++;
3079 + count--;
3080 + }
3081 + bit_mask <<= 1;
3082 + }
3083 + buttons->last = last;
3084 +
3085 + if (index == 0) {
3086 + goto try_again;
3087 + }
3088 +
3089 + err = copy_to_user(buffer, events, index);
3090 + if (err) {
3091 + return err;
3092 + }
3093 +
3094 + return index;
3095 +}
3096 +
3097 +
3098 +static int hydrogen3_buttons_open(struct inode *inode, struct file *filp)
3099 +{
3100 + struct hydrogen3_buttons *buttons = &buttons_info;
3101 +
3102 + DPRINTK("start\n");
3103 + MOD_INC_USE_COUNT;
3104 +
3105 + filp->private_data = buttons;
3106 +
3107 + if (buttons->open_count++ == 0) {
3108 + button_task.data = buttons;
3109 + cleanup_flag = 0;
3110 + queue_task(&button_task, &tq_timer);
3111 + }
3112 +
3113 + return 0;
3114 +}
3115 +
3116 +
3117 +static unsigned int hydrogen3_buttons_poll(struct file *filp, poll_table *wait)
3118 +{
3119 + struct hydrogen3_buttons *buttons = filp->private_data;
3120 + int ret = 0;
3121 +
3122 + DPRINTK("start\n");
3123 + poll_wait(filp, &buttons->read_wait, wait);
3124 + if (buttons->current != buttons->last) {
3125 + ret = POLLIN | POLLRDNORM;
3126 + }
3127 + return ret;
3128 +}
3129 +
3130 +
3131 +static int hydrogen3_buttons_release(struct inode *inode, struct file *filp)
3132 +{
3133 + struct hydrogen3_buttons *buttons = filp->private_data;
3134 +
3135 + DPRINTK("start\n");
3136 +
3137 + if (--buttons->open_count == 0) {
3138 + cleanup_flag = 1;
3139 + sleep_on(&cleanup_wait_queue);
3140 + }
3141 + MOD_DEC_USE_COUNT;
3142 +
3143 + return 0;
3144 +}
3145 +
3146 +
3147 +
3148 +static struct file_operations hydrogen3_buttons_fops = {
3149 + owner: THIS_MODULE,
3150 + read: hydrogen3_buttons_read,
3151 + poll: hydrogen3_buttons_poll,
3152 + open: hydrogen3_buttons_open,
3153 + release: hydrogen3_buttons_release,
3154 +};
3155 +
3156 +/*
3157 + * The hydrogen3 buttons is a misc device:
3158 + * Major 10 char
3159 + * Minor 22 /dev/buttons
3160 + *
3161 + * This is /dev/misc/buttons if devfs is used.
3162 + */
3163 +
3164 +static struct miscdevice hydrogen3_buttons_dev = {
3165 + minor: 22,
3166 + name: "buttons",
3167 + fops: &hydrogen3_buttons_fops,
3168 +};
3169 +
3170 +static int __init hydrogen3_buttons_init(void)
3171 +{
3172 + struct hydrogen3_buttons *buttons = &buttons_info;
3173 + int ret;
3174 +
3175 + DPRINTK("Initializing buttons driver\n");
3176 + buttons->open_count = 0;
3177 + cleanup_flag = 0;
3178 + init_waitqueue_head(&buttons->read_wait);
3179 +
3180 +
3181 + // yamon configures GPIO pins for the buttons
3182 + // no initialization needed
3183 +
3184 + ret = misc_register(&hydrogen3_buttons_dev);
3185 +
3186 + DPRINTK("Buttons driver fully initialized.\n");
3187 +
3188 + return ret;
3189 +}
3190 +
3191 +
3192 +static void __exit hydrogen3_buttons_exit(void)
3193 +{
3194 + DPRINTK("unloading buttons driver\n");
3195 + misc_deregister(&hydrogen3_buttons_dev);
3196 +}
3197 +
3198 +
3199 +module_init(hydrogen3_buttons_init);
3200 +module_exit(hydrogen3_buttons_exit);
3201 Index: linux-2.4.35.4/arch/mips/au1000/hydrogen3/Makefile
3202 ===================================================================
3203 --- linux-2.4.35.4.orig/arch/mips/au1000/hydrogen3/Makefile 2007-12-15 05:19:43.026873001 +0100
3204 +++ linux-2.4.35.4/arch/mips/au1000/hydrogen3/Makefile 2007-12-15 05:19:44.802974213 +0100
3205 @@ -14,6 +14,11 @@
3206
3207 O_TARGET := hydrogen3.o
3208
3209 -obj-y := init.o board_setup.o irqmap.o
3210 +obj-y := init.o board_setup.o irqmap.o buttons.o
3211 +
3212 +ifdef CONFIG_MMC
3213 +obj-y += mmc_support.o
3214 +export-objs +=mmc_support.o
3215 +endif
3216
3217 include $(TOPDIR)/Rules.make
3218 Index: linux-2.4.35.4/arch/mips/au1000/hydrogen3/mmc_support.c
3219 ===================================================================
3220 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
3221 +++ linux-2.4.35.4/arch/mips/au1000/hydrogen3/mmc_support.c 2007-12-15 05:19:44.802974213 +0100
3222 @@ -0,0 +1,89 @@
3223 +/*
3224 + * BRIEF MODULE DESCRIPTION
3225 + *
3226 + * MMC support routines for Hydrogen3.
3227 + *
3228 + *
3229 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3230 + * Author: Embedded Edge, LLC.
3231 + * Contact: dan@embeddededge.com
3232 + *
3233 + * This program is free software; you can redistribute it and/or modify it
3234 + * under the terms of the GNU General Public License as published by the
3235 + * Free Software Foundation; either version 2 of the License, or (at your
3236 + * option) any later version.
3237 + *
3238 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3239 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3240 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3241 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3242 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3243 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3244 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3245 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3246 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3247 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3248 + *
3249 + * You should have received a copy of the GNU General Public License along
3250 + * with this program; if not, write to the Free Software Foundation, Inc.,
3251 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3252 + *
3253 + */
3254 +
3255 +
3256 +#include <linux/config.h>
3257 +#include <linux/kernel.h>
3258 +#include <linux/module.h>
3259 +#include <linux/init.h>
3260 +
3261 +#include <asm/irq.h>
3262 +#include <asm/au1000.h>
3263 +#include <asm/au1100_mmc.h>
3264 +
3265 +#define GPIO_17_WP 0x20000
3266 +
3267 +/* SD/MMC controller support functions */
3268 +
3269 +/*
3270 + * Detect card.
3271 + */
3272 +void mmc_card_inserted(int _n_, int *_res_)
3273 +{
3274 + u32 gpios = au_readl(SYS_PINSTATERD);
3275 + u32 emptybit = (1<<16);
3276 + *_res_ = ((gpios & emptybit) == 0);
3277 +}
3278 +
3279 +/*
3280 + * Check card write protection.
3281 + */
3282 +void mmc_card_writable(int _n_, int *_res_)
3283 +{
3284 + unsigned long mmc_wp, board_specific;
3285 + board_specific = au_readl(SYS_OUTPUTSET);
3286 + mmc_wp=GPIO_17_WP;
3287 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3288 + *_res_ = 1;
3289 + } else {
3290 + *_res_ = 0;
3291 + }
3292 +}
3293 +/*
3294 + * Apply power to card slot.
3295 + */
3296 +void mmc_power_on(int _n_)
3297 +{
3298 +}
3299 +
3300 +/*
3301 + * Remove power from card slot.
3302 + */
3303 +void mmc_power_off(int _n_)
3304 +{
3305 +}
3306 +
3307 +EXPORT_SYMBOL(mmc_card_inserted);
3308 +EXPORT_SYMBOL(mmc_card_writable);
3309 +EXPORT_SYMBOL(mmc_power_on);
3310 +EXPORT_SYMBOL(mmc_power_off);
3311 +
3312 Index: linux-2.4.35.4/arch/mips/au1000/mtx-1/board_setup.c
3313 ===================================================================
3314 --- linux-2.4.35.4.orig/arch/mips/au1000/mtx-1/board_setup.c 2007-12-15 05:19:43.038873685 +0100
3315 +++ linux-2.4.35.4/arch/mips/au1000/mtx-1/board_setup.c 2007-12-15 05:19:44.806974443 +0100
3316 @@ -48,6 +48,12 @@
3317
3318 extern struct rtc_ops no_rtc_ops;
3319
3320 +void board_reset (void)
3321 +{
3322 + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
3323 + au_writel(0x00000000, 0xAE00001C);
3324 +}
3325 +
3326 void __init board_setup(void)
3327 {
3328 rtc_ops = &no_rtc_ops;
3329 Index: linux-2.4.35.4/arch/mips/au1000/mtx-1/irqmap.c
3330 ===================================================================
3331 --- linux-2.4.35.4.orig/arch/mips/au1000/mtx-1/irqmap.c 2007-12-15 05:19:43.046874140 +0100
3332 +++ linux-2.4.35.4/arch/mips/au1000/mtx-1/irqmap.c 2007-12-15 05:19:44.806974443 +0100
3333 @@ -72,10 +72,10 @@
3334 * A B C D
3335 */
3336 {
3337 - {INTA, INTB, INTC, INTD}, /* IDSEL 0 */
3338 - {INTA, INTB, INTC, INTD}, /* IDSEL 1 */
3339 - {INTA, INTB, INTC, INTD}, /* IDSEL 2 */
3340 - {INTA, INTB, INTC, INTD}, /* IDSEL 3 */
3341 + {INTA, INTB, INTX, INTX}, /* IDSEL 0 */
3342 + {INTB, INTA, INTX, INTX}, /* IDSEL 1 */
3343 + {INTC, INTD, INTX, INTX}, /* IDSEL 2 */
3344 + {INTD, INTC, INTX, INTX}, /* IDSEL 3 */
3345 };
3346 const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4;
3347 return PCI_IRQ_TABLE_LOOKUP;
3348 Index: linux-2.4.35.4/arch/mips/au1000/pb1000/board_setup.c
3349 ===================================================================
3350 --- linux-2.4.35.4.orig/arch/mips/au1000/pb1000/board_setup.c 2007-12-15 05:19:43.054874596 +0100
3351 +++ linux-2.4.35.4/arch/mips/au1000/pb1000/board_setup.c 2007-12-15 05:19:44.806974443 +0100
3352 @@ -58,6 +58,10 @@
3353 {
3354 }
3355
3356 +void board_power_off (void)
3357 +{
3358 +}
3359 +
3360 void __init board_setup(void)
3361 {
3362 u32 pin_func, static_cfg0;
3363 Index: linux-2.4.35.4/arch/mips/au1000/pb1100/board_setup.c
3364 ===================================================================
3365 --- linux-2.4.35.4.orig/arch/mips/au1000/pb1100/board_setup.c 2007-12-15 05:19:43.062875051 +0100
3366 +++ linux-2.4.35.4/arch/mips/au1000/pb1100/board_setup.c 2007-12-15 05:19:44.806974443 +0100
3367 @@ -62,6 +62,10 @@
3368 au_writel(0x00000000, 0xAE00001C);
3369 }
3370
3371 +void board_power_off (void)
3372 +{
3373 +}
3374 +
3375 void __init board_setup(void)
3376 {
3377 u32 pin_func;
3378 Index: linux-2.4.35.4/arch/mips/au1000/pb1100/Makefile
3379 ===================================================================
3380 --- linux-2.4.35.4.orig/arch/mips/au1000/pb1100/Makefile 2007-12-15 05:19:43.070875507 +0100
3381 +++ linux-2.4.35.4/arch/mips/au1000/pb1100/Makefile 2007-12-15 05:19:44.806974443 +0100
3382 @@ -16,4 +16,10 @@
3383
3384 obj-y := init.o board_setup.o irqmap.o
3385
3386 +
3387 +ifdef CONFIG_MMC
3388 +obj-y += mmc_support.o
3389 +export-objs += mmc_support.o
3390 +endif
3391 +
3392 include $(TOPDIR)/Rules.make
3393 Index: linux-2.4.35.4/arch/mips/au1000/pb1100/mmc_support.c
3394 ===================================================================
3395 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
3396 +++ linux-2.4.35.4/arch/mips/au1000/pb1100/mmc_support.c 2007-12-15 05:19:44.806974443 +0100
3397 @@ -0,0 +1,126 @@
3398 +/*
3399 + * BRIEF MODULE DESCRIPTION
3400 + *
3401 + * MMC support routines for PB1100.
3402 + *
3403 + *
3404 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3405 + * Author: Embedded Edge, LLC.
3406 + * Contact: dan@embeddededge.com
3407 + *
3408 + * This program is free software; you can redistribute it and/or modify it
3409 + * under the terms of the GNU General Public License as published by the
3410 + * Free Software Foundation; either version 2 of the License, or (at your
3411 + * option) any later version.
3412 + *
3413 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3414 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3415 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3416 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3417 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3418 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3419 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3420 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3421 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3422 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3423 + *
3424 + * You should have received a copy of the GNU General Public License along
3425 + * with this program; if not, write to the Free Software Foundation, Inc.,
3426 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3427 + *
3428 + */
3429 +
3430 +
3431 +#include <linux/config.h>
3432 +#include <linux/kernel.h>
3433 +#include <linux/module.h>
3434 +#include <linux/init.h>
3435 +
3436 +#include <asm/irq.h>
3437 +#include <asm/au1000.h>
3438 +#include <asm/au1100_mmc.h>
3439 +#include <asm/pb1100.h>
3440 +
3441 +
3442 +/* SD/MMC controller support functions */
3443 +
3444 +/*
3445 + * Detect card.
3446 + */
3447 +void mmc_card_inserted(int _n_, int *_res_)
3448 +{
3449 + u32 gpios = au_readl(SYS_PINSTATERD);
3450 + u32 emptybit = (_n_) ? (1<<15) : (1<<14);
3451 + *_res_ = ((gpios & emptybit) == 0);
3452 +}
3453 +
3454 +/*
3455 + * Check card write protection.
3456 + */
3457 +void mmc_card_writable(int _n_, int *_res_)
3458 +{
3459 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3460 + unsigned long mmc_wp, board_specific;
3461 +
3462 + if (_n_) {
3463 + mmc_wp = BCSR_PCMCIA_SD1_WP;
3464 + } else {
3465 + mmc_wp = BCSR_PCMCIA_SD0_WP;
3466 + }
3467 +
3468 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3469 +
3470 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3471 + *_res_ = 1;
3472 + } else {
3473 + *_res_ = 0;
3474 + }
3475 +}
3476 +
3477 +/*
3478 + * Apply power to card slot.
3479 + */
3480 +void mmc_power_on(int _n_)
3481 +{
3482 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3483 + unsigned long mmc_pwr, board_specific;
3484 +
3485 + if (_n_) {
3486 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3487 + } else {
3488 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3489 + }
3490 +
3491 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3492 + board_specific |= mmc_pwr;
3493 +
3494 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3495 + au_sync_delay(1);
3496 +}
3497 +
3498 +/*
3499 + * Remove power from card slot.
3500 + */
3501 +void mmc_power_off(int _n_)
3502 +{
3503 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3504 + unsigned long mmc_pwr, board_specific;
3505 +
3506 + if (_n_) {
3507 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3508 + } else {
3509 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3510 + }
3511 +
3512 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3513 + board_specific &= ~mmc_pwr;
3514 +
3515 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3516 + au_sync_delay(1);
3517 +}
3518 +
3519 +EXPORT_SYMBOL(mmc_card_inserted);
3520 +EXPORT_SYMBOL(mmc_card_writable);
3521 +EXPORT_SYMBOL(mmc_power_on);
3522 +EXPORT_SYMBOL(mmc_power_off);
3523 +
3524 Index: linux-2.4.35.4/arch/mips/au1000/pb1200/board_setup.c
3525 ===================================================================
3526 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
3527 +++ linux-2.4.35.4/arch/mips/au1000/pb1200/board_setup.c 2007-12-15 05:19:44.810974669 +0100
3528 @@ -0,0 +1,221 @@
3529 +/*
3530 + *
3531 + * BRIEF MODULE DESCRIPTION
3532 + * Alchemy Pb1200 board setup.
3533 + *
3534 + * This program is free software; you can redistribute it and/or modify it
3535 + * under the terms of the GNU General Public License as published by the
3536 + * Free Software Foundation; either version 2 of the License, or (at your
3537 + * option) any later version.
3538 + *
3539 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3540 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3541 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3542 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3543 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3544 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3545 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3546 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3547 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3548 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3549 + *
3550 + * You should have received a copy of the GNU General Public License along
3551 + * with this program; if not, write to the Free Software Foundation, Inc.,
3552 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3553 + */
3554 +#include <linux/config.h>
3555 +#include <linux/init.h>
3556 +#include <linux/sched.h>
3557 +#include <linux/ioport.h>
3558 +#include <linux/mm.h>
3559 +#include <linux/console.h>
3560 +#include <linux/mc146818rtc.h>
3561 +#include <linux/delay.h>
3562 +
3563 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3564 +#include <linux/ide.h>
3565 +#endif
3566 +
3567 +#include <asm/cpu.h>
3568 +#include <asm/bootinfo.h>
3569 +#include <asm/irq.h>
3570 +#include <asm/keyboard.h>
3571 +#include <asm/mipsregs.h>
3572 +#include <asm/reboot.h>
3573 +#include <asm/pgtable.h>
3574 +#include <asm/au1000.h>
3575 +#include <asm/au1xxx_dbdma.h>
3576 +
3577 +#ifdef CONFIG_MIPS_PB1200
3578 +#include <asm/pb1200.h>
3579 +#endif
3580 +
3581 +#ifdef CONFIG_MIPS_DB1200
3582 +#include <asm/db1200.h>
3583 +#define PB1200_ETH_INT DB1200_ETH_INT
3584 +#define PB1200_IDE_INT DB1200_IDE_INT
3585 +#endif
3586 +
3587 +extern struct rtc_ops no_rtc_ops;
3588 +
3589 +extern void _board_init_irq(void);
3590 +extern void (*board_init_irq)(void);
3591 +
3592 +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
3593 +extern struct ide_ops *ide_ops;
3594 +extern struct ide_ops au1xxx_ide_ops;
3595 +extern u32 au1xxx_ide_virtbase;
3596 +extern u64 au1xxx_ide_physbase;
3597 +extern int au1xxx_ide_irq;
3598 +
3599 +u32 led_base_addr;
3600 +/* Ddma */
3601 +chan_tab_t *ide_read_ch, *ide_write_ch;
3602 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
3603 +
3604 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
3605 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
3606 +
3607 +void board_reset (void)
3608 +{
3609 + bcsr->resets = 0;
3610 +}
3611 +
3612 +void board_power_off (void)
3613 +{
3614 + bcsr->resets = 0xC000;
3615 +}
3616 +
3617 +void __init board_setup(void)
3618 +{
3619 + char *argptr = NULL;
3620 + u32 pin_func;
3621 + rtc_ops = &no_rtc_ops;
3622 +
3623 +#if 0
3624 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
3625 + * but it is board specific code, so put it here.
3626 + */
3627 + pin_func = au_readl(SYS_PINFUNC);
3628 + au_sync();
3629 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
3630 + au_writel(pin_func, SYS_PINFUNC);
3631 +
3632 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
3633 + au_sync();
3634 +#endif
3635 +
3636 +#if defined( CONFIG_I2C_ALGO_AU1550 )
3637 + {
3638 + u32 freq0, clksrc;
3639 +
3640 + /* Select SMBUS in CPLD */
3641 + bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
3642 +
3643 + pin_func = au_readl(SYS_PINFUNC);
3644 + au_sync();
3645 + pin_func &= ~(3<<17 | 1<<4);
3646 + /* Set GPIOs correctly */
3647 + pin_func |= 2<<17;
3648 + au_writel(pin_func, SYS_PINFUNC);
3649 + au_sync();
3650 +
3651 + /* The i2c driver depends on 50Mhz clock */
3652 + freq0 = au_readl(SYS_FREQCTRL0);
3653 + au_sync();
3654 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
3655 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
3656 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
3657 + au_writel(freq0, SYS_FREQCTRL0);
3658 + au_sync();
3659 + freq0 |= SYS_FC_FE1;
3660 + au_writel(freq0, SYS_FREQCTRL0);
3661 + au_sync();
3662 +
3663 + clksrc = au_readl(SYS_CLKSRC);
3664 + au_sync();
3665 + clksrc &= ~0x01f00000;
3666 + /* bit 22 is EXTCLK0 for PSC0 */
3667 + clksrc |= (0x3 << 22);
3668 + au_writel(clksrc, SYS_CLKSRC);
3669 + au_sync();
3670 + }
3671 +#endif
3672 +
3673 +#ifdef CONFIG_FB_AU1200
3674 + argptr = prom_getcmdline();
3675 + strcat(argptr, " video=au1200fb:");
3676 +#endif
3677 +
3678 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3679 + /*
3680 + * Iniz IDE parameters
3681 + */
3682 + ide_ops = &au1xxx_ide_ops;
3683 + au1xxx_ide_irq = PB1200_IDE_INT;
3684 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
3685 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
3686 + /*
3687 + * change PIO or PIO+Ddma
3688 + * check the GPIO-5 pin condition. pb1200:s18_dot */
3689 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
3690 +#endif
3691 +
3692 + /* The Pb1200 development board uses external MUX for PSC0 to
3693 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
3694 + */
3695 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
3696 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
3697 + Refer to Pb1200/Db1200 documentation.
3698 +#elif defined( CONFIG_AU1550_PSC_SPI )
3699 + bcsr->resets |= BCSR_RESETS_PCS0MUX;
3700 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
3701 + bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
3702 +#endif
3703 + au_sync();
3704 +
3705 +#ifdef CONFIG_MIPS_PB1200
3706 + printk("AMD Alchemy Pb1200 Board\n");
3707 +#endif
3708 +#ifdef CONFIG_MIPS_DB1200
3709 + printk("AMD Alchemy Db1200 Board\n");
3710 +#endif
3711 +
3712 + /* Setup Pb1200 External Interrupt Controller */
3713 + {
3714 + extern void (*board_init_irq)(void);
3715 + extern void _board_init_irq(void);
3716 + board_init_irq = _board_init_irq;
3717 + }
3718 +}
3719 +
3720 +int
3721 +board_au1200fb_panel (void)
3722 +{
3723 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3724 + int p;
3725 +
3726 + p = bcsr->switches;
3727 + p >>= 8;
3728 + p &= 0x0F;
3729 + return p;
3730 +}
3731 +
3732 +int
3733 +board_au1200fb_panel_init (void)
3734 +{
3735 + /* Apply power */
3736 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3737 + bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3738 + return 0;
3739 +}
3740 +
3741 +int
3742 +board_au1200fb_panel_shutdown (void)
3743 +{
3744 + /* Remove power */
3745 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3746 + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3747 + return 0;
3748 +}
3749 +
3750 Index: linux-2.4.35.4/arch/mips/au1000/pb1200/init.c
3751 ===================================================================
3752 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
3753 +++ linux-2.4.35.4/arch/mips/au1000/pb1200/init.c 2007-12-15 05:19:44.810974669 +0100
3754 @@ -0,0 +1,72 @@
3755 +/*
3756 + *
3757 + * BRIEF MODULE DESCRIPTION
3758 + * PB1200 board setup
3759 + *
3760 + * This program is free software; you can redistribute it and/or modify it
3761 + * under the terms of the GNU General Public License as published by the
3762 + * Free Software Foundation; either version 2 of the License, or (at your
3763 + * option) any later version.
3764 + *
3765 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3766 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3767 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3768 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3769 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3770 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3771 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3772 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3773 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3774 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3775 + *
3776 + * You should have received a copy of the GNU General Public License along
3777 + * with this program; if not, write to the Free Software Foundation, Inc.,
3778 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3779 + */
3780 +
3781 +#include <linux/init.h>
3782 +#include <linux/mm.h>
3783 +#include <linux/sched.h>
3784 +#include <linux/bootmem.h>
3785 +#include <asm/addrspace.h>
3786 +#include <asm/bootinfo.h>
3787 +#include <linux/config.h>
3788 +#include <linux/string.h>
3789 +#include <linux/kernel.h>
3790 +#include <linux/sched.h>
3791 +
3792 +int prom_argc;
3793 +char **prom_argv, **prom_envp;
3794 +extern void __init prom_init_cmdline(void);
3795 +extern char *prom_getenv(char *envname);
3796 +
3797 +const char *get_system_type(void)
3798 +{
3799 + return "AMD Alchemy Au1200/Pb1200";
3800 +}
3801 +
3802 +u32 mae_memsize = 0;
3803 +
3804 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
3805 +{
3806 + unsigned char *memsize_str;
3807 + unsigned long memsize;
3808 +
3809 + prom_argc = argc;
3810 + prom_argv = argv;
3811 + prom_envp = envp;
3812 +
3813 + mips_machgroup = MACH_GROUP_ALCHEMY;
3814 + mips_machtype = MACH_PB1000; /* set the platform # */
3815 + prom_init_cmdline();
3816 +
3817 + memsize_str = prom_getenv("memsize");
3818 + if (!memsize_str) {
3819 + memsize = 0x08000000;
3820 + } else {
3821 + memsize = simple_strtol(memsize_str, NULL, 0);
3822 + }
3823 + add_memory_region(0, memsize, BOOT_MEM_RAM);
3824 + return 0;
3825 +}
3826 +
3827 Index: linux-2.4.35.4/arch/mips/au1000/pb1200/irqmap.c
3828 ===================================================================
3829 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
3830 +++ linux-2.4.35.4/arch/mips/au1000/pb1200/irqmap.c 2007-12-15 05:19:44.810974669 +0100
3831 @@ -0,0 +1,180 @@
3832 +/*
3833 + * BRIEF MODULE DESCRIPTION
3834 + * Au1xxx irq map table
3835 + *
3836 + * This program is free software; you can redistribute it and/or modify it
3837 + * under the terms of the GNU General Public License as published by the
3838 + * Free Software Foundation; either version 2 of the License, or (at your
3839 + * option) any later version.
3840 + *
3841 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3842 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3843 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3844 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3845 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3846 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3847 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3848 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3849 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3850 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3851 + *
3852 + * You should have received a copy of the GNU General Public License along
3853 + * with this program; if not, write to the Free Software Foundation, Inc.,
3854 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3855 + */
3856 +#include <linux/errno.h>
3857 +#include <linux/init.h>
3858 +#include <linux/irq.h>
3859 +#include <linux/kernel_stat.h>
3860 +#include <linux/module.h>
3861 +#include <linux/signal.h>
3862 +#include <linux/sched.h>
3863 +#include <linux/types.h>
3864 +#include <linux/interrupt.h>
3865 +#include <linux/ioport.h>
3866 +#include <linux/timex.h>
3867 +#include <linux/slab.h>
3868 +#include <linux/random.h>
3869 +#include <linux/delay.h>
3870 +
3871 +#include <asm/bitops.h>
3872 +#include <asm/bootinfo.h>
3873 +#include <asm/io.h>
3874 +#include <asm/mipsregs.h>
3875 +#include <asm/system.h>
3876 +#include <asm/au1000.h>
3877 +
3878 +#ifdef CONFIG_MIPS_PB1200
3879 +#include <asm/pb1200.h>
3880 +#endif
3881 +
3882 +#ifdef CONFIG_MIPS_DB1200
3883 +#include <asm/db1200.h>
3884 +#define PB1200_INT_BEGIN DB1200_INT_BEGIN
3885 +#define PB1200_INT_END DB1200_INT_END
3886 +#endif
3887 +
3888 +au1xxx_irq_map_t au1xxx_irq_map[] = {
3889 + { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
3890 +};
3891 +
3892 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
3893 +
3894 +/*
3895 + * Support for External interrupts on the PbAu1200 Development platform.
3896 + */
3897 +static volatile int pb1200_cascade_en=0;
3898 +
3899 +void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
3900 +{
3901 + unsigned short bisr = bcsr->int_status;
3902 + int extirq_nr = 0;
3903 +
3904 + /* Clear all the edge interrupts. This has no effect on level */
3905 + bcsr->int_status = bisr;
3906 + for( ; bisr; bisr &= (bisr-1) )
3907 + {
3908 + extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
3909 + /* Ack and dispatch IRQ */
3910 + do_IRQ(extirq_nr,regs);
3911 + }
3912 +}
3913 +
3914 +inline void pb1200_enable_irq(unsigned int irq_nr)
3915 +{
3916 + bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3917 + bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
3918 +}
3919 +
3920 +inline void pb1200_disable_irq(unsigned int irq_nr)
3921 +{
3922 + bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
3923 + bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
3924 +}
3925 +
3926 +static unsigned int pb1200_startup_irq( unsigned int irq_nr )
3927 +{
3928 + if (++pb1200_cascade_en == 1)
3929 + {
3930 + request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
3931 + 0, "Pb1200 Cascade", &pb1200_cascade_handler );
3932 +#ifdef CONFIG_MIPS_PB1200
3933 + /* We have a problem with CPLD rev3. Enable a workaround */
3934 + if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
3935 + {
3936 + printk("\nWARNING!!!\n");
3937 + printk("\nWARNING!!!\n");
3938 + printk("\nWARNING!!!\n");
3939 + printk("\nWARNING!!!\n");
3940 + printk("\nWARNING!!!\n");
3941 + printk("\nWARNING!!!\n");
3942 + printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
3943 + printk("updated to latest revision. This software will not\n");
3944 + printk("work on anything less than CPLD rev4\n");
3945 + printk("\nWARNING!!!\n");
3946 + printk("\nWARNING!!!\n");
3947 + printk("\nWARNING!!!\n");
3948 + printk("\nWARNING!!!\n");
3949 + printk("\nWARNING!!!\n");
3950 + printk("\nWARNING!!!\n");
3951 + while(1);
3952 + }
3953 +#endif
3954 + }
3955 + pb1200_enable_irq(irq_nr);
3956 + return 0;
3957 +}
3958 +
3959 +static void pb1200_shutdown_irq( unsigned int irq_nr )
3960 +{
3961 + pb1200_disable_irq(irq_nr);
3962 + if (--pb1200_cascade_en == 0)
3963 + {
3964 + free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
3965 + }
3966 + return;
3967 +}
3968 +
3969 +static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
3970 +{
3971 + pb1200_disable_irq( irq_nr );
3972 +}
3973 +
3974 +static void pb1200_end_irq(unsigned int irq_nr)
3975 +{
3976 + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
3977 + pb1200_enable_irq(irq_nr);
3978 + }
3979 +}
3980 +
3981 +static struct hw_interrupt_type external_irq_type =
3982 +{
3983 +#ifdef CONFIG_MIPS_PB1200
3984 + "Pb1200 Ext",
3985 +#endif
3986 +#ifdef CONFIG_MIPS_DB1200
3987 + "Db1200 Ext",
3988 +#endif
3989 + pb1200_startup_irq,
3990 + pb1200_shutdown_irq,
3991 + pb1200_enable_irq,
3992 + pb1200_disable_irq,
3993 + pb1200_mask_and_ack_irq,
3994 + pb1200_end_irq,
3995 + NULL
3996 +};
3997 +
3998 +void _board_init_irq(void)
3999 +{
4000 + int irq_nr;
4001 +
4002 + for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
4003 + {
4004 + irq_desc[irq_nr].handler = &external_irq_type;
4005 + pb1200_disable_irq(irq_nr);
4006 + }
4007 +
4008 + /* GPIO_7 can not be hooked here, so it is hooked upon first
4009 + request of any source attached to the cascade */
4010 +}
4011 +
4012 Index: linux-2.4.35.4/arch/mips/au1000/pb1200/Makefile
4013 ===================================================================
4014 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
4015 +++ linux-2.4.35.4/arch/mips/au1000/pb1200/Makefile 2007-12-15 05:19:44.810974669 +0100
4016 @@ -0,0 +1,25 @@
4017 +#
4018 +# Copyright 2000 MontaVista Software Inc.
4019 +# Author: MontaVista Software, Inc.
4020 +# ppopov@mvista.com or source@mvista.com
4021 +#
4022 +# Makefile for the Alchemy Semiconductor PB1000 board.
4023 +#
4024 +# Note! Dependencies are done automagically by 'make dep', which also
4025 +# removes any old dependencies. DON'T put your own dependencies here
4026 +# unless it's something special (ie not a .c file).
4027 +#
4028 +
4029 +USE_STANDARD_AS_RULE := true
4030 +
4031 +O_TARGET := pb1200.o
4032 +
4033 +obj-y := init.o board_setup.o irqmap.o
4034 +
4035 +ifdef CONFIG_MMC
4036 +obj-y += mmc_support.o
4037 +export-objs +=mmc_support.o
4038 +endif
4039 +
4040 +
4041 +include $(TOPDIR)/Rules.make
4042 Index: linux-2.4.35.4/arch/mips/au1000/pb1200/mmc_support.c
4043 ===================================================================
4044 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
4045 +++ linux-2.4.35.4/arch/mips/au1000/pb1200/mmc_support.c 2007-12-15 05:19:44.810974669 +0100
4046 @@ -0,0 +1,141 @@
4047 +/*
4048 + * BRIEF MODULE DESCRIPTION
4049 + *
4050 + * MMC support routines for PB1200.
4051 + *
4052 + *
4053 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
4054 + * Author: Embedded Edge, LLC.
4055 + * Contact: dan@embeddededge.com
4056 + *
4057 + * This program is free software; you can redistribute it and/or modify it
4058 + * under the terms of the GNU General Public License as published by the
4059 + * Free Software Foundation; either version 2 of the License, or (at your
4060 + * option) any later version.
4061 + *
4062 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
4063 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
4064 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
4065 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
4066 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
4067 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
4068 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
4069 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4070 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
4071 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4072 + *
4073 + * You should have received a copy of the GNU General Public License along
4074 + * with this program; if not, write to the Free Software Foundation, Inc.,
4075 + * 675 Mass Ave, Cambridge, MA 02139, USA.
4076 + *
4077 + */
4078 +
4079 +
4080 +#include <linux/config.h>
4081 +#include <linux/kernel.h>
4082 +#include <linux/module.h>
4083 +#include <linux/init.h>
4084 +
4085 +#include <asm/irq.h>
4086 +#include <asm/au1000.h>
4087 +#include <asm/au1100_mmc.h>
4088 +
4089 +#ifdef CONFIG_MIPS_PB1200
4090 +#include <asm/pb1200.h>
4091 +#endif
4092 +
4093 +#ifdef CONFIG_MIPS_DB1200
4094 +/* NOTE: DB1200 only has SD0 pinned out and usable */
4095 +#include <asm/db1200.h>
4096 +#endif
4097 +
4098 +/* SD/MMC controller support functions */
4099 +
4100 +/*
4101 + * Detect card.
4102 + */
4103 +void mmc_card_inserted(int socket, int *result)
4104 +{
4105 + u16 mask;
4106 +
4107 + if (socket)
4108 +#ifdef CONFIG_MIPS_DB1200
4109 + mask = 0;
4110 +#else
4111 + mask = BCSR_INT_SD1INSERT;
4112 +#endif
4113 + else
4114 + mask = BCSR_INT_SD0INSERT;
4115 +
4116 + *result = ((bcsr->sig_status & mask) != 0);
4117 +}
4118 +
4119 +/*
4120 + * Check card write protection.
4121 + */
4122 +void mmc_card_writable(int socket, int *result)
4123 +{
4124 + u16 mask;
4125 +
4126 + if (socket)
4127 +#ifdef CONFIG_MIPS_DB1200
4128 + mask = 0;
4129 +#else
4130 + mask = BCSR_STATUS_SD1WP;
4131 +#endif
4132 + else
4133 + mask = BCSR_STATUS_SD0WP;
4134 +
4135 + /* low means card writable */
4136 + if (!(bcsr->status & mask)) {
4137 + *result = 1;
4138 + } else {
4139 + *result = 0;
4140 + }
4141 +}
4142 +
4143 +/*
4144 + * Apply power to card slot.
4145 + */
4146 +void mmc_power_on(int socket)
4147 +{
4148 + u16 mask;
4149 +
4150 + if (socket)
4151 +#ifdef CONFIG_MIPS_DB1200
4152 + mask = 0;
4153 +#else
4154 + mask = BCSR_BOARD_SD1PWR;
4155 +#endif
4156 + else
4157 + mask = BCSR_BOARD_SD0PWR;
4158 +
4159 + bcsr->board |= mask;
4160 + au_sync_delay(1);
4161 +}
4162 +
4163 +/*
4164 + * Remove power from card slot.
4165 + */
4166 +void mmc_power_off(int socket)
4167 +{
4168 + u16 mask;
4169 +
4170 + if (socket)
4171 +#ifdef CONFIG_MIPS_DB1200
4172 + mask = 0;
4173 +#else
4174 + mask = BCSR_BOARD_SD1PWR;
4175 +#endif
4176 + else
4177 + mask = BCSR_BOARD_SD0PWR;
4178 +
4179 + bcsr->board &= ~mask;
4180 + au_sync_delay(1);
4181 +}
4182 +
4183 +EXPORT_SYMBOL(mmc_card_inserted);
4184 +EXPORT_SYMBOL(mmc_card_writable);
4185 +EXPORT_SYMBOL(mmc_power_on);
4186 +EXPORT_SYMBOL(mmc_power_off);
4187 +
4188 Index: linux-2.4.35.4/arch/mips/au1000/pb1500/board_setup.c
4189 ===================================================================
4190 --- linux-2.4.35.4.orig/arch/mips/au1000/pb1500/board_setup.c 2007-12-15 05:19:43.110877786 +0100
4191 +++ linux-2.4.35.4/arch/mips/au1000/pb1500/board_setup.c 2007-12-15 05:19:44.810974669 +0100
4192 @@ -62,6 +62,10 @@
4193 au_writel(0x00000000, 0xAE00001C);
4194 }
4195
4196 +void board_power_off (void)
4197 +{
4198 +}
4199 +
4200 void __init board_setup(void)
4201 {
4202 u32 pin_func;
4203 Index: linux-2.4.35.4/arch/mips/au1000/pb1550/board_setup.c
4204 ===================================================================
4205 --- linux-2.4.35.4.orig/arch/mips/au1000/pb1550/board_setup.c 2007-12-15 05:19:43.118878244 +0100
4206 +++ linux-2.4.35.4/arch/mips/au1000/pb1550/board_setup.c 2007-12-15 05:19:44.814974898 +0100
4207 @@ -48,12 +48,31 @@
4208
4209 extern struct rtc_ops no_rtc_ops;
4210
4211 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4212 +extern struct ide_ops *ide_ops;
4213 +extern struct ide_ops au1xxx_ide_ops;
4214 +extern u32 au1xxx_ide_virtbase;
4215 +extern u64 au1xxx_ide_physbase;
4216 +extern unsigned int au1xxx_ide_irq;
4217 +
4218 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
4219 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
4220 +
4221 void board_reset (void)
4222 {
4223 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
4224 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
4225 }
4226
4227 +void board_power_off (void)
4228 +{
4229 + /* power off system */
4230 + printk("\n** Powering off Pb1550\n");
4231 + au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
4232 + au_sync();
4233 + while(1); /* should not get here */
4234 +}
4235 +
4236 void __init board_setup(void)
4237 {
4238 u32 pin_func;
4239 @@ -78,5 +97,36 @@
4240 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
4241 au_sync();
4242
4243 +#if defined(CONFIG_AU1XXX_SMC91111)
4244 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4245 +#error "Resource conflict occured. Disable either Ethernet or IDE daughter card."
4246 +#else
4247 +#define CPLD_CONTROL (0xAF00000C)
4248 + {
4249 + /* set up the Static Bus timing */
4250 + /* only 396Mhz */
4251 + /* reset the DC */
4252 + au_writew(au_readw(CPLD_CONTROL) | 0x0f, CPLD_CONTROL);
4253 + au_writel(0x00010003, MEM_STCFG0);
4254 + au_writel(0x000c00c0, MEM_STCFG2);
4255 + au_writel(0x85E1900D, MEM_STTIME2);
4256 + }
4257 +#endif
4258 +#endif /* end CONFIG_SMC91111 */
4259 +
4260 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4261 + /*
4262 + * Iniz IDE parameters
4263 + */
4264 + ide_ops = &au1xxx_ide_ops;
4265 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;;
4266 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
4267 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
4268 + /*
4269 + * change PIO or PIO+Ddma
4270 + * check the GPIO-6 pin condition. pb1550:s15_dot
4271 + */
4272 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
4273 +#endif
4274 printk("AMD Alchemy Pb1550 Board\n");
4275 }
4276 Index: linux-2.4.35.4/arch/mips/au1000/pb1550/irqmap.c
4277 ===================================================================
4278 --- linux-2.4.35.4.orig/arch/mips/au1000/pb1550/irqmap.c 2007-12-15 05:19:43.126878700 +0100
4279 +++ linux-2.4.35.4/arch/mips/au1000/pb1550/irqmap.c 2007-12-15 05:19:44.814974898 +0100
4280 @@ -50,6 +50,9 @@
4281 au1xxx_irq_map_t au1xxx_irq_map[] = {
4282 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
4283 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
4284 +#ifdef CONFIG_AU1XXX_SMC91111
4285 + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
4286 +#endif
4287 };
4288
4289 int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
4290 Index: linux-2.4.35.4/arch/mips/config-shared.in
4291 ===================================================================
4292 --- linux-2.4.35.4.orig/arch/mips/config-shared.in 2007-12-15 05:19:43.134879155 +0100
4293 +++ linux-2.4.35.4/arch/mips/config-shared.in 2007-12-15 05:19:44.814974898 +0100
4294 @@ -21,16 +21,19 @@
4295 comment 'Machine selection'
4296 dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
4297 dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
4298 +dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
4299 dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
4300 dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32
4301 dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32
4302 dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32
4303 dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32
4304 +dep_bool 'Support for Alchemy Db1200 board' CONFIG_MIPS_DB1200 $CONFIG_MIPS32
4305 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
4306 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
4307 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
4308 -dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4309 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
4310 +dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
4311 +dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4312 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
4313 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
4314 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
4315 @@ -249,6 +252,12 @@
4316 define_bool CONFIG_PC_KEYB y
4317 define_bool CONFIG_NONCOHERENT_IO y
4318 fi
4319 +if [ "$CONFIG_MIPS_FICMMP" = "y" ]; then
4320 + define_bool CONFIG_SOC_AU1X00 y
4321 + define_bool CONFIG_SOC_AU1200 y
4322 + define_bool CONFIG_NONCOHERENT_IO y
4323 + define_bool CONFIG_PC_KEYB y
4324 +fi
4325 if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then
4326 define_bool CONFIG_SOC_AU1X00 y
4327 define_bool CONFIG_SOC_AU1500 y
4328 @@ -263,6 +272,12 @@
4329 define_bool CONFIG_SWAP_IO_SPACE_W y
4330 define_bool CONFIG_SWAP_IO_SPACE_L y
4331 fi
4332 +if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4333 + define_bool CONFIG_SOC_AU1X00 y
4334 + define_bool CONFIG_SOC_AU1500 y
4335 + define_bool CONFIG_NONCOHERENT_IO y
4336 + define_bool CONFIG_PC_KEYB y
4337 +fi
4338 if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
4339 define_bool CONFIG_SOC_AU1X00 y
4340 define_bool CONFIG_SOC_AU1100 y
4341 @@ -271,9 +286,15 @@
4342 define_bool CONFIG_SWAP_IO_SPACE_W y
4343 define_bool CONFIG_SWAP_IO_SPACE_L y
4344 fi
4345 -if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4346 +if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4347 define_bool CONFIG_SOC_AU1X00 y
4348 - define_bool CONFIG_SOC_AU1500 y
4349 + define_bool CONFIG_SOC_AU1550 y
4350 + define_bool CONFIG_NONCOHERENT_IO n
4351 + define_bool CONFIG_PC_KEYB y
4352 +fi
4353 +if [ "$CONFIG_MIPS_PB1200" = "y" ]; then
4354 + define_bool CONFIG_SOC_AU1X00 y
4355 + define_bool CONFIG_SOC_AU1200 y
4356 define_bool CONFIG_NONCOHERENT_IO y
4357 define_bool CONFIG_PC_KEYB y
4358 fi
4359 @@ -290,18 +311,24 @@
4360 define_bool CONFIG_NONCOHERENT_IO y
4361 define_bool CONFIG_PC_KEYB y
4362 fi
4363 +if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4364 + define_bool CONFIG_SOC_AU1X00 y
4365 + define_bool CONFIG_SOC_AU1100 y
4366 + define_bool CONFIG_NONCOHERENT_IO y
4367 + define_bool CONFIG_PC_KEYB y
4368 + define_bool CONFIG_SWAP_IO_SPACE y
4369 +fi
4370 if [ "$CONFIG_MIPS_DB1550" = "y" ]; then
4371 define_bool CONFIG_SOC_AU1X00 y
4372 define_bool CONFIG_SOC_AU1550 y
4373 define_bool CONFIG_NONCOHERENT_IO y
4374 define_bool CONFIG_PC_KEYB y
4375 fi
4376 -if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4377 +if [ "$CONFIG_MIPS_DB1200" = "y" ]; then
4378 define_bool CONFIG_SOC_AU1X00 y
4379 - define_bool CONFIG_SOC_AU1100 y
4380 + define_bool CONFIG_SOC_AU1200 y
4381 define_bool CONFIG_NONCOHERENT_IO y
4382 define_bool CONFIG_PC_KEYB y
4383 - define_bool CONFIG_SWAP_IO_SPACE y
4384 fi
4385 if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then
4386 define_bool CONFIG_SOC_AU1X00 y
4387 @@ -327,12 +354,6 @@
4388 define_bool CONFIG_NONCOHERENT_IO y
4389 define_bool CONFIG_PC_KEYB y
4390 fi
4391 -if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4392 - define_bool CONFIG_SOC_AU1X00 y
4393 - define_bool CONFIG_SOC_AU1550 y
4394 - define_bool CONFIG_NONCOHERENT_IO n
4395 - define_bool CONFIG_PC_KEYB y
4396 -fi
4397 if [ "$CONFIG_MIPS_COBALT" = "y" ]; then
4398 define_bool CONFIG_BOOT_ELF32 y
4399 define_bool CONFIG_COBALT_LCD y
4400 @@ -729,6 +750,13 @@
4401 "$CONFIG_MIPS_PB1000" = "y" -o \
4402 "$CONFIG_MIPS_PB1100" = "y" -o \
4403 "$CONFIG_MIPS_PB1500" = "y" -o \
4404 + "$CONFIG_MIPS_PB1550" = "y" -o \
4405 + "$CONFIG_MIPS_PB1200" = "y" -o \
4406 + "$CONFIG_MIPS_DB1000" = "y" -o \
4407 + "$CONFIG_MIPS_DB1100" = "y" -o \
4408 + "$CONFIG_MIPS_DB1500" = "y" -o \
4409 + "$CONFIG_MIPS_DB1550" = "y" -o \
4410 + "$CONFIG_MIPS_DB1200" = "y" -o \
4411 "$CONFIG_NEC_OSPREY" = "y" -o \
4412 "$CONFIG_NEC_EAGLE" = "y" -o \
4413 "$CONFIG_NINO" = "y" -o \
4414 Index: linux-2.4.35.4/arch/mips/defconfig
4415 ===================================================================
4416 --- linux-2.4.35.4.orig/arch/mips/defconfig 2007-12-15 05:19:43.142879610 +0100
4417 +++ linux-2.4.35.4/arch/mips/defconfig 2007-12-15 05:19:44.814974898 +0100
4418 @@ -30,8 +30,8 @@
4419 # CONFIG_MIPS_PB1000 is not set
4420 # CONFIG_MIPS_PB1100 is not set
4421 # CONFIG_MIPS_PB1500 is not set
4422 -# CONFIG_MIPS_HYDROGEN3 is not set
4423 # CONFIG_MIPS_PB1550 is not set
4424 +# CONFIG_MIPS_HYDROGEN3 is not set
4425 # CONFIG_MIPS_XXS1500 is not set
4426 # CONFIG_MIPS_MTX1 is not set
4427 # CONFIG_COGENT_CSB250 is not set
4428 @@ -235,11 +235,6 @@
4429 #
4430 # CONFIG_IPX is not set
4431 # CONFIG_ATALK is not set
4432 -
4433 -#
4434 -# Appletalk devices
4435 -#
4436 -# CONFIG_DEV_APPLETALK is not set
4437 # CONFIG_DECNET is not set
4438 # CONFIG_BRIDGE is not set
4439 # CONFIG_X25 is not set
4440 @@ -319,9 +314,11 @@
4441 # CONFIG_SCSI_MEGARAID is not set
4442 # CONFIG_SCSI_MEGARAID2 is not set
4443 # CONFIG_SCSI_SATA is not set
4444 +# CONFIG_SCSI_SATA_AHCI is not set
4445 # CONFIG_SCSI_SATA_SVW is not set
4446 # CONFIG_SCSI_ATA_PIIX is not set
4447 # CONFIG_SCSI_SATA_NV is not set
4448 +# CONFIG_SCSI_SATA_QSTOR is not set
4449 # CONFIG_SCSI_SATA_PROMISE is not set
4450 # CONFIG_SCSI_SATA_SX4 is not set
4451 # CONFIG_SCSI_SATA_SIL is not set
4452 @@ -465,7 +462,6 @@
4453 # CONFIG_SERIAL is not set
4454 # CONFIG_SERIAL_EXTENDED is not set
4455 # CONFIG_SERIAL_NONSTANDARD is not set
4456 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4457 CONFIG_UNIX98_PTYS=y
4458 CONFIG_UNIX98_PTY_COUNT=256
4459
4460 Index: linux-2.4.35.4/arch/mips/defconfig-atlas
4461 ===================================================================
4462 --- linux-2.4.35.4.orig/arch/mips/defconfig-atlas 2007-12-15 05:19:43.150880066 +0100
4463 +++ linux-2.4.35.4/arch/mips/defconfig-atlas 2007-12-15 05:19:44.818975127 +0100
4464 @@ -28,8 +28,8 @@
4465 # CONFIG_MIPS_PB1000 is not set
4466 # CONFIG_MIPS_PB1100 is not set
4467 # CONFIG_MIPS_PB1500 is not set
4468 -# CONFIG_MIPS_HYDROGEN3 is not set
4469 # CONFIG_MIPS_PB1550 is not set
4470 +# CONFIG_MIPS_HYDROGEN3 is not set
4471 # CONFIG_MIPS_XXS1500 is not set
4472 # CONFIG_MIPS_MTX1 is not set
4473 # CONFIG_COGENT_CSB250 is not set
4474 @@ -235,11 +235,6 @@
4475 #
4476 # CONFIG_IPX is not set
4477 # CONFIG_ATALK is not set
4478 -
4479 -#
4480 -# Appletalk devices
4481 -#
4482 -# CONFIG_DEV_APPLETALK is not set
4483 # CONFIG_DECNET is not set
4484 # CONFIG_BRIDGE is not set
4485 # CONFIG_X25 is not set
4486 @@ -317,9 +312,11 @@
4487 # CONFIG_SCSI_MEGARAID is not set
4488 # CONFIG_SCSI_MEGARAID2 is not set
4489 # CONFIG_SCSI_SATA is not set
4490 +# CONFIG_SCSI_SATA_AHCI is not set
4491 # CONFIG_SCSI_SATA_SVW is not set
4492 # CONFIG_SCSI_ATA_PIIX is not set
4493 # CONFIG_SCSI_SATA_NV is not set
4494 +# CONFIG_SCSI_SATA_QSTOR is not set
4495 # CONFIG_SCSI_SATA_PROMISE is not set
4496 # CONFIG_SCSI_SATA_SX4 is not set
4497 # CONFIG_SCSI_SATA_SIL is not set
4498 @@ -528,7 +525,6 @@
4499 CONFIG_SERIAL_CONSOLE=y
4500 # CONFIG_SERIAL_EXTENDED is not set
4501 # CONFIG_SERIAL_NONSTANDARD is not set
4502 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4503 CONFIG_UNIX98_PTYS=y
4504 CONFIG_UNIX98_PTY_COUNT=256
4505
4506 Index: linux-2.4.35.4/arch/mips/defconfig-bosporus
4507 ===================================================================
4508 --- linux-2.4.35.4.orig/arch/mips/defconfig-bosporus 2007-12-15 05:19:43.158880524 +0100
4509 +++ linux-2.4.35.4/arch/mips/defconfig-bosporus 2007-12-15 05:19:44.818975127 +0100
4510 @@ -30,8 +30,8 @@
4511 # CONFIG_MIPS_PB1000 is not set
4512 # CONFIG_MIPS_PB1100 is not set
4513 # CONFIG_MIPS_PB1500 is not set
4514 -# CONFIG_MIPS_HYDROGEN3 is not set
4515 # CONFIG_MIPS_PB1550 is not set
4516 +# CONFIG_MIPS_HYDROGEN3 is not set
4517 # CONFIG_MIPS_XXS1500 is not set
4518 # CONFIG_MIPS_MTX1 is not set
4519 # CONFIG_COGENT_CSB250 is not set
4520 @@ -208,9 +208,7 @@
4521 CONFIG_MTD_BOSPORUS=y
4522 # CONFIG_MTD_XXS1500 is not set
4523 # CONFIG_MTD_MTX1 is not set
4524 -# CONFIG_MTD_DB1X00 is not set
4525 # CONFIG_MTD_PB1550 is not set
4526 -# CONFIG_MTD_HYDROGEN3 is not set
4527 # CONFIG_MTD_MIRAGE is not set
4528 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4529 # CONFIG_MTD_OCELOT is not set
4530 @@ -229,7 +227,6 @@
4531 #
4532 # Disk-On-Chip Device Drivers
4533 #
4534 -# CONFIG_MTD_DOC1000 is not set
4535 # CONFIG_MTD_DOC2000 is not set
4536 # CONFIG_MTD_DOC2001 is not set
4537 # CONFIG_MTD_DOCPROBE is not set
4538 @@ -373,11 +370,6 @@
4539 #
4540 # CONFIG_IPX is not set
4541 # CONFIG_ATALK is not set
4542 -
4543 -#
4544 -# Appletalk devices
4545 -#
4546 -# CONFIG_DEV_APPLETALK is not set
4547 # CONFIG_DECNET is not set
4548 # CONFIG_BRIDGE is not set
4549 # CONFIG_X25 is not set
4550 @@ -457,9 +449,11 @@
4551 # CONFIG_SCSI_MEGARAID is not set
4552 # CONFIG_SCSI_MEGARAID2 is not set
4553 # CONFIG_SCSI_SATA is not set
4554 +# CONFIG_SCSI_SATA_AHCI is not set
4555 # CONFIG_SCSI_SATA_SVW is not set
4556 # CONFIG_SCSI_ATA_PIIX is not set
4557 # CONFIG_SCSI_SATA_NV is not set
4558 +# CONFIG_SCSI_SATA_QSTOR is not set
4559 # CONFIG_SCSI_SATA_PROMISE is not set
4560 # CONFIG_SCSI_SATA_SX4 is not set
4561 # CONFIG_SCSI_SATA_SIL is not set
4562 @@ -681,7 +675,6 @@
4563 # CONFIG_AU1X00_USB_TTY is not set
4564 # CONFIG_AU1X00_USB_RAW is not set
4565 # CONFIG_TXX927_SERIAL is not set
4566 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4567 CONFIG_UNIX98_PTYS=y
4568 CONFIG_UNIX98_PTY_COUNT=256
4569
4570 Index: linux-2.4.35.4/arch/mips/defconfig-capcella
4571 ===================================================================
4572 --- linux-2.4.35.4.orig/arch/mips/defconfig-capcella 2007-12-15 05:19:43.162880750 +0100
4573 +++ linux-2.4.35.4/arch/mips/defconfig-capcella 2007-12-15 05:19:44.818975127 +0100
4574 @@ -30,8 +30,8 @@
4575 # CONFIG_MIPS_PB1000 is not set
4576 # CONFIG_MIPS_PB1100 is not set
4577 # CONFIG_MIPS_PB1500 is not set
4578 -# CONFIG_MIPS_HYDROGEN3 is not set
4579 # CONFIG_MIPS_PB1550 is not set
4580 +# CONFIG_MIPS_HYDROGEN3 is not set
4581 # CONFIG_MIPS_XXS1500 is not set
4582 # CONFIG_MIPS_MTX1 is not set
4583 # CONFIG_COGENT_CSB250 is not set
4584 @@ -228,11 +228,6 @@
4585 #
4586 # CONFIG_IPX is not set
4587 # CONFIG_ATALK is not set
4588 -
4589 -#
4590 -# Appletalk devices
4591 -#
4592 -# CONFIG_DEV_APPLETALK is not set
4593 # CONFIG_DECNET is not set
4594 # CONFIG_BRIDGE is not set
4595 # CONFIG_X25 is not set
4596 @@ -472,7 +467,6 @@
4597 CONFIG_SERIAL_CONSOLE=y
4598 # CONFIG_SERIAL_EXTENDED is not set
4599 # CONFIG_SERIAL_NONSTANDARD is not set
4600 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4601 # CONFIG_VR41XX_KIU is not set
4602 CONFIG_UNIX98_PTYS=y
4603 CONFIG_UNIX98_PTY_COUNT=256
4604 Index: linux-2.4.35.4/arch/mips/defconfig-cobalt
4605 ===================================================================
4606 --- linux-2.4.35.4.orig/arch/mips/defconfig-cobalt 2007-12-15 05:19:43.170881205 +0100
4607 +++ linux-2.4.35.4/arch/mips/defconfig-cobalt 2007-12-15 05:19:44.818975127 +0100
4608 @@ -28,8 +28,8 @@
4609 # CONFIG_MIPS_PB1000 is not set
4610 # CONFIG_MIPS_PB1100 is not set
4611 # CONFIG_MIPS_PB1500 is not set
4612 -# CONFIG_MIPS_HYDROGEN3 is not set
4613 # CONFIG_MIPS_PB1550 is not set
4614 +# CONFIG_MIPS_HYDROGEN3 is not set
4615 # CONFIG_MIPS_XXS1500 is not set
4616 # CONFIG_MIPS_MTX1 is not set
4617 # CONFIG_COGENT_CSB250 is not set
4618 @@ -222,11 +222,6 @@
4619 #
4620 # CONFIG_IPX is not set
4621 # CONFIG_ATALK is not set
4622 -
4623 -#
4624 -# Appletalk devices
4625 -#
4626 -# CONFIG_DEV_APPLETALK is not set
4627 # CONFIG_DECNET is not set
4628 # CONFIG_BRIDGE is not set
4629 # CONFIG_X25 is not set
4630 @@ -505,7 +500,6 @@
4631 CONFIG_SERIAL_CONSOLE=y
4632 # CONFIG_SERIAL_EXTENDED is not set
4633 # CONFIG_SERIAL_NONSTANDARD is not set
4634 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4635 CONFIG_UNIX98_PTYS=y
4636 CONFIG_UNIX98_PTY_COUNT=16
4637
4638 Index: linux-2.4.35.4/arch/mips/defconfig-csb250
4639 ===================================================================
4640 --- linux-2.4.35.4.orig/arch/mips/defconfig-csb250 2007-12-15 05:19:43.178881664 +0100
4641 +++ linux-2.4.35.4/arch/mips/defconfig-csb250 2007-12-15 05:19:44.818975127 +0100
4642 @@ -30,8 +30,8 @@
4643 # CONFIG_MIPS_PB1000 is not set
4644 # CONFIG_MIPS_PB1100 is not set
4645 # CONFIG_MIPS_PB1500 is not set
4646 -# CONFIG_MIPS_HYDROGEN3 is not set
4647 # CONFIG_MIPS_PB1550 is not set
4648 +# CONFIG_MIPS_HYDROGEN3 is not set
4649 # CONFIG_MIPS_XXS1500 is not set
4650 # CONFIG_MIPS_MTX1 is not set
4651 CONFIG_COGENT_CSB250=y
4652 @@ -268,11 +268,6 @@
4653 #
4654 # CONFIG_IPX is not set
4655 # CONFIG_ATALK is not set
4656 -
4657 -#
4658 -# Appletalk devices
4659 -#
4660 -# CONFIG_DEV_APPLETALK is not set
4661 # CONFIG_DECNET is not set
4662 # CONFIG_BRIDGE is not set
4663 # CONFIG_X25 is not set
4664 @@ -556,7 +551,6 @@
4665 # CONFIG_AU1X00_USB_TTY is not set
4666 # CONFIG_AU1X00_USB_RAW is not set
4667 # CONFIG_TXX927_SERIAL is not set
4668 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4669 CONFIG_UNIX98_PTYS=y
4670 CONFIG_UNIX98_PTY_COUNT=256
4671
4672 Index: linux-2.4.35.4/arch/mips/defconfig-db1000
4673 ===================================================================
4674 --- linux-2.4.35.4.orig/arch/mips/defconfig-db1000 2007-12-15 05:19:43.186882119 +0100
4675 +++ linux-2.4.35.4/arch/mips/defconfig-db1000 2007-12-15 05:19:44.822975353 +0100
4676 @@ -30,8 +30,8 @@
4677 # CONFIG_MIPS_PB1000 is not set
4678 # CONFIG_MIPS_PB1100 is not set
4679 # CONFIG_MIPS_PB1500 is not set
4680 -# CONFIG_MIPS_HYDROGEN3 is not set
4681 # CONFIG_MIPS_PB1550 is not set
4682 +# CONFIG_MIPS_HYDROGEN3 is not set
4683 # CONFIG_MIPS_XXS1500 is not set
4684 # CONFIG_MIPS_MTX1 is not set
4685 # CONFIG_COGENT_CSB250 is not set
4686 @@ -214,11 +214,7 @@
4687 # CONFIG_MTD_BOSPORUS is not set
4688 # CONFIG_MTD_XXS1500 is not set
4689 # CONFIG_MTD_MTX1 is not set
4690 -CONFIG_MTD_DB1X00=y
4691 -CONFIG_MTD_DB1X00_BOOT=y
4692 -CONFIG_MTD_DB1X00_USER=y
4693 # CONFIG_MTD_PB1550 is not set
4694 -# CONFIG_MTD_HYDROGEN3 is not set
4695 # CONFIG_MTD_MIRAGE is not set
4696 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4697 # CONFIG_MTD_OCELOT is not set
4698 @@ -237,7 +233,6 @@
4699 #
4700 # Disk-On-Chip Device Drivers
4701 #
4702 -# CONFIG_MTD_DOC1000 is not set
4703 # CONFIG_MTD_DOC2000 is not set
4704 # CONFIG_MTD_DOC2001 is not set
4705 # CONFIG_MTD_DOCPROBE is not set
4706 @@ -342,11 +337,6 @@
4707 #
4708 # CONFIG_IPX is not set
4709 # CONFIG_ATALK is not set
4710 -
4711 -#
4712 -# Appletalk devices
4713 -#
4714 -# CONFIG_DEV_APPLETALK is not set
4715 # CONFIG_DECNET is not set
4716 # CONFIG_BRIDGE is not set
4717 # CONFIG_X25 is not set
4718 @@ -636,7 +626,6 @@
4719 # CONFIG_AU1X00_USB_TTY is not set
4720 # CONFIG_AU1X00_USB_RAW is not set
4721 # CONFIG_TXX927_SERIAL is not set
4722 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4723 CONFIG_UNIX98_PTYS=y
4724 CONFIG_UNIX98_PTY_COUNT=256
4725
4726 Index: linux-2.4.35.4/arch/mips/defconfig-db1100
4727 ===================================================================
4728 --- linux-2.4.35.4.orig/arch/mips/defconfig-db1100 2007-12-15 05:19:43.190882345 +0100
4729 +++ linux-2.4.35.4/arch/mips/defconfig-db1100 2007-12-15 05:19:44.822975353 +0100
4730 @@ -30,8 +30,8 @@
4731 # CONFIG_MIPS_PB1000 is not set
4732 # CONFIG_MIPS_PB1100 is not set
4733 # CONFIG_MIPS_PB1500 is not set
4734 -# CONFIG_MIPS_HYDROGEN3 is not set
4735 # CONFIG_MIPS_PB1550 is not set
4736 +# CONFIG_MIPS_HYDROGEN3 is not set
4737 # CONFIG_MIPS_XXS1500 is not set
4738 # CONFIG_MIPS_MTX1 is not set
4739 # CONFIG_COGENT_CSB250 is not set
4740 @@ -214,11 +214,7 @@
4741 # CONFIG_MTD_BOSPORUS is not set
4742 # CONFIG_MTD_XXS1500 is not set
4743 # CONFIG_MTD_MTX1 is not set
4744 -CONFIG_MTD_DB1X00=y
4745 -# CONFIG_MTD_DB1X00_BOOT is not set
4746 -CONFIG_MTD_DB1X00_USER=y
4747 # CONFIG_MTD_PB1550 is not set
4748 -# CONFIG_MTD_HYDROGEN3 is not set
4749 # CONFIG_MTD_MIRAGE is not set
4750 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4751 # CONFIG_MTD_OCELOT is not set
4752 @@ -237,7 +233,6 @@
4753 #
4754 # Disk-On-Chip Device Drivers
4755 #
4756 -# CONFIG_MTD_DOC1000 is not set
4757 # CONFIG_MTD_DOC2000 is not set
4758 # CONFIG_MTD_DOC2001 is not set
4759 # CONFIG_MTD_DOCPROBE is not set
4760 @@ -342,11 +337,6 @@
4761 #
4762 # CONFIG_IPX is not set
4763 # CONFIG_ATALK is not set
4764 -
4765 -#
4766 -# Appletalk devices
4767 -#
4768 -# CONFIG_DEV_APPLETALK is not set
4769 # CONFIG_DECNET is not set
4770 # CONFIG_BRIDGE is not set
4771 # CONFIG_X25 is not set
4772 @@ -636,7 +626,6 @@
4773 # CONFIG_AU1X00_USB_TTY is not set
4774 # CONFIG_AU1X00_USB_RAW is not set
4775 # CONFIG_TXX927_SERIAL is not set
4776 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4777 CONFIG_UNIX98_PTYS=y
4778 CONFIG_UNIX98_PTY_COUNT=256
4779
4780 @@ -884,6 +873,7 @@
4781 # CONFIG_FB_PM2 is not set
4782 # CONFIG_FB_PM3 is not set
4783 # CONFIG_FB_CYBER2000 is not set
4784 +CONFIG_FB_AU1100=y
4785 # CONFIG_FB_MATROX is not set
4786 # CONFIG_FB_ATY is not set
4787 # CONFIG_FB_RADEON is not set
4788 @@ -895,7 +885,6 @@
4789 # CONFIG_FB_VOODOO1 is not set
4790 # CONFIG_FB_TRIDENT is not set
4791 # CONFIG_FB_E1356 is not set
4792 -CONFIG_FB_AU1100=y
4793 # CONFIG_FB_IT8181 is not set
4794 # CONFIG_FB_VIRTUAL is not set
4795 CONFIG_FBCON_ADVANCED=y
4796 Index: linux-2.4.35.4/arch/mips/defconfig-db1200
4797 ===================================================================
4798 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
4799 +++ linux-2.4.35.4/arch/mips/defconfig-db1200 2007-12-15 05:19:44.822975353 +0100
4800 @@ -0,0 +1,1032 @@
4801 +#
4802 +# Automatically generated make config: don't edit
4803 +#
4804 +CONFIG_MIPS=y
4805 +CONFIG_MIPS32=y
4806 +# CONFIG_MIPS64 is not set
4807 +
4808 +#
4809 +# Code maturity level options
4810 +#
4811 +CONFIG_EXPERIMENTAL=y
4812 +
4813 +#
4814 +# Loadable module support
4815 +#
4816 +CONFIG_MODULES=y
4817 +# CONFIG_MODVERSIONS is not set
4818 +CONFIG_KMOD=y
4819 +
4820 +#
4821 +# Machine selection
4822 +#
4823 +# CONFIG_ACER_PICA_61 is not set
4824 +# CONFIG_MIPS_BOSPORUS is not set
4825 +# CONFIG_MIPS_MIRAGE is not set
4826 +# CONFIG_MIPS_DB1000 is not set
4827 +# CONFIG_MIPS_DB1100 is not set
4828 +# CONFIG_MIPS_DB1500 is not set
4829 +# CONFIG_MIPS_DB1550 is not set
4830 +# CONFIG_MIPS_PB1000 is not set
4831 +# CONFIG_MIPS_PB1100 is not set
4832 +# CONFIG_MIPS_PB1500 is not set
4833 +# CONFIG_MIPS_PB1550 is not set
4834 +# CONFIG_MIPS_HYDROGEN3 is not set
4835 +# CONFIG_MIPS_XXS1500 is not set
4836 +# CONFIG_MIPS_MTX1 is not set
4837 +# CONFIG_COGENT_CSB250 is not set
4838 +# CONFIG_BAGET_MIPS is not set
4839 +# CONFIG_CASIO_E55 is not set
4840 +# CONFIG_MIPS_COBALT is not set
4841 +# CONFIG_DECSTATION is not set
4842 +# CONFIG_MIPS_EV64120 is not set
4843 +# CONFIG_MIPS_EV96100 is not set
4844 +# CONFIG_MIPS_IVR is not set
4845 +# CONFIG_HP_LASERJET is not set
4846 +# CONFIG_IBM_WORKPAD is not set
4847 +# CONFIG_LASAT is not set
4848 +# CONFIG_MIPS_ITE8172 is not set
4849 +# CONFIG_MIPS_ATLAS is not set
4850 +# CONFIG_MIPS_MAGNUM_4000 is not set
4851 +# CONFIG_MIPS_MALTA is not set
4852 +# CONFIG_MIPS_SEAD is not set
4853 +# CONFIG_MOMENCO_OCELOT is not set
4854 +# CONFIG_MOMENCO_OCELOT_G is not set
4855 +# CONFIG_MOMENCO_OCELOT_C is not set
4856 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
4857 +# CONFIG_PMC_BIG_SUR is not set
4858 +# CONFIG_PMC_STRETCH is not set
4859 +# CONFIG_PMC_YOSEMITE is not set
4860 +# CONFIG_DDB5074 is not set
4861 +# CONFIG_DDB5476 is not set
4862 +# CONFIG_DDB5477 is not set
4863 +# CONFIG_NEC_OSPREY is not set
4864 +# CONFIG_NEC_EAGLE is not set
4865 +# CONFIG_OLIVETTI_M700 is not set
4866 +# CONFIG_NINO is not set
4867 +# CONFIG_SGI_IP22 is not set
4868 +# CONFIG_SGI_IP27 is not set
4869 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
4870 +# CONFIG_SNI_RM200_PCI is not set
4871 +# CONFIG_TANBAC_TB0226 is not set
4872 +# CONFIG_TANBAC_TB0229 is not set
4873 +# CONFIG_TOSHIBA_JMR3927 is not set
4874 +# CONFIG_TOSHIBA_RBTX4927 is not set
4875 +# CONFIG_VICTOR_MPC30X is not set
4876 +# CONFIG_ZAO_CAPCELLA is not set
4877 +# CONFIG_HIGHMEM is not set
4878 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4879 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4880 +# CONFIG_MIPS_AU1000 is not set
4881 +
4882 +#
4883 +# CPU selection
4884 +#
4885 +CONFIG_CPU_MIPS32=y
4886 +# CONFIG_CPU_MIPS64 is not set
4887 +# CONFIG_CPU_R3000 is not set
4888 +# CONFIG_CPU_TX39XX is not set
4889 +# CONFIG_CPU_VR41XX is not set
4890 +# CONFIG_CPU_R4300 is not set
4891 +# CONFIG_CPU_R4X00 is not set
4892 +# CONFIG_CPU_TX49XX is not set
4893 +# CONFIG_CPU_R5000 is not set
4894 +# CONFIG_CPU_R5432 is not set
4895 +# CONFIG_CPU_R6000 is not set
4896 +# CONFIG_CPU_NEVADA is not set
4897 +# CONFIG_CPU_R8000 is not set
4898 +# CONFIG_CPU_R10000 is not set
4899 +# CONFIG_CPU_RM7000 is not set
4900 +# CONFIG_CPU_RM9000 is not set
4901 +# CONFIG_CPU_SB1 is not set
4902 +CONFIG_PAGE_SIZE_4KB=y
4903 +# CONFIG_PAGE_SIZE_16KB is not set
4904 +# CONFIG_PAGE_SIZE_64KB is not set
4905 +CONFIG_CPU_HAS_PREFETCH=y
4906 +# CONFIG_VTAG_ICACHE is not set
4907 +CONFIG_64BIT_PHYS_ADDR=y
4908 +# CONFIG_CPU_ADVANCED is not set
4909 +CONFIG_CPU_HAS_LLSC=y
4910 +# CONFIG_CPU_HAS_LLDSCD is not set
4911 +# CONFIG_CPU_HAS_WB is not set
4912 +CONFIG_CPU_HAS_SYNC=y
4913 +
4914 +#
4915 +# General setup
4916 +#
4917 +CONFIG_CPU_LITTLE_ENDIAN=y
4918 +# CONFIG_BUILD_ELF64 is not set
4919 +CONFIG_NET=y
4920 +CONFIG_PCI=y
4921 +CONFIG_PCI_NEW=y
4922 +CONFIG_PCI_AUTO=y
4923 +# CONFIG_PCI_NAMES is not set
4924 +# CONFIG_ISA is not set
4925 +# CONFIG_TC is not set
4926 +# CONFIG_MCA is not set
4927 +# CONFIG_SBUS is not set
4928 +CONFIG_HOTPLUG=y
4929 +
4930 +#
4931 +# PCMCIA/CardBus support
4932 +#
4933 +CONFIG_PCMCIA=m
4934 +# CONFIG_CARDBUS is not set
4935 +# CONFIG_TCIC is not set
4936 +# CONFIG_I82092 is not set
4937 +# CONFIG_I82365 is not set
4938 +
4939 +#
4940 +# PCI Hotplug Support
4941 +#
4942 +# CONFIG_HOTPLUG_PCI is not set
4943 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
4944 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
4945 +# CONFIG_HOTPLUG_PCI_SHPC is not set
4946 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
4947 +# CONFIG_HOTPLUG_PCI_PCIE is not set
4948 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
4949 +CONFIG_SYSVIPC=y
4950 +# CONFIG_BSD_PROCESS_ACCT is not set
4951 +CONFIG_SYSCTL=y
4952 +CONFIG_KCORE_ELF=y
4953 +# CONFIG_KCORE_AOUT is not set
4954 +# CONFIG_BINFMT_AOUT is not set
4955 +CONFIG_BINFMT_ELF=y
4956 +# CONFIG_MIPS32_COMPAT is not set
4957 +# CONFIG_MIPS32_O32 is not set
4958 +# CONFIG_MIPS32_N32 is not set
4959 +# CONFIG_BINFMT_ELF32 is not set
4960 +# CONFIG_BINFMT_MISC is not set
4961 +# CONFIG_OOM_KILLER is not set
4962 +CONFIG_CMDLINE_BOOL=y
4963 +CONFIG_CMDLINE="mem=96M"
4964 +
4965 +#
4966 +# Memory Technology Devices (MTD)
4967 +#
4968 +# CONFIG_MTD is not set
4969 +
4970 +#
4971 +# Parallel port support
4972 +#
4973 +# CONFIG_PARPORT is not set
4974 +
4975 +#
4976 +# Plug and Play configuration
4977 +#
4978 +# CONFIG_PNP is not set
4979 +# CONFIG_ISAPNP is not set
4980 +
4981 +#
4982 +# Block devices
4983 +#
4984 +# CONFIG_BLK_DEV_FD is not set
4985 +# CONFIG_BLK_DEV_XD is not set
4986 +# CONFIG_PARIDE is not set
4987 +# CONFIG_BLK_CPQ_DA is not set
4988 +# CONFIG_BLK_CPQ_CISS_DA is not set
4989 +# CONFIG_CISS_SCSI_TAPE is not set
4990 +# CONFIG_CISS_MONITOR_THREAD is not set
4991 +# CONFIG_BLK_DEV_DAC960 is not set
4992 +# CONFIG_BLK_DEV_UMEM is not set
4993 +# CONFIG_BLK_DEV_SX8 is not set
4994 +CONFIG_BLK_DEV_LOOP=y
4995 +# CONFIG_BLK_DEV_NBD is not set
4996 +# CONFIG_BLK_DEV_RAM is not set
4997 +# CONFIG_BLK_DEV_INITRD is not set
4998 +# CONFIG_BLK_STATS is not set
4999 +
5000 +#
5001 +# Multi-device support (RAID and LVM)
5002 +#
5003 +# CONFIG_MD is not set
5004 +# CONFIG_BLK_DEV_MD is not set
5005 +# CONFIG_MD_LINEAR is not set
5006 +# CONFIG_MD_RAID0 is not set
5007 +# CONFIG_MD_RAID1 is not set
5008 +# CONFIG_MD_RAID5 is not set
5009 +# CONFIG_MD_MULTIPATH is not set
5010 +# CONFIG_BLK_DEV_LVM is not set
5011 +
5012 +#
5013 +# Networking options
5014 +#
5015 +CONFIG_PACKET=y
5016 +# CONFIG_PACKET_MMAP is not set
5017 +# CONFIG_NETLINK_DEV is not set
5018 +CONFIG_NETFILTER=y
5019 +# CONFIG_NETFILTER_DEBUG is not set
5020 +CONFIG_FILTER=y
5021 +CONFIG_UNIX=y
5022 +CONFIG_INET=y
5023 +CONFIG_IP_MULTICAST=y
5024 +# CONFIG_IP_ADVANCED_ROUTER is not set
5025 +CONFIG_IP_PNP=y
5026 +# CONFIG_IP_PNP_DHCP is not set
5027 +CONFIG_IP_PNP_BOOTP=y
5028 +# CONFIG_IP_PNP_RARP is not set
5029 +# CONFIG_NET_IPIP is not set
5030 +# CONFIG_NET_IPGRE is not set
5031 +# CONFIG_IP_MROUTE is not set
5032 +# CONFIG_ARPD is not set
5033 +# CONFIG_INET_ECN is not set
5034 +# CONFIG_SYN_COOKIES is not set
5035 +
5036 +#
5037 +# IP: Netfilter Configuration
5038 +#
5039 +# CONFIG_IP_NF_CONNTRACK is not set
5040 +# CONFIG_IP_NF_QUEUE is not set
5041 +# CONFIG_IP_NF_IPTABLES is not set
5042 +# CONFIG_IP_NF_ARPTABLES is not set
5043 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
5044 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
5045 +
5046 +#
5047 +# IP: Virtual Server Configuration
5048 +#
5049 +# CONFIG_IP_VS is not set
5050 +# CONFIG_IPV6 is not set
5051 +# CONFIG_KHTTPD is not set
5052 +
5053 +#
5054 +# SCTP Configuration (EXPERIMENTAL)
5055 +#
5056 +# CONFIG_IP_SCTP is not set
5057 +# CONFIG_ATM is not set
5058 +# CONFIG_VLAN_8021Q is not set
5059 +
5060 +#
5061 +#
5062 +#
5063 +# CONFIG_IPX is not set
5064 +# CONFIG_ATALK is not set
5065 +# CONFIG_DECNET is not set
5066 +# CONFIG_BRIDGE is not set
5067 +# CONFIG_X25 is not set
5068 +# CONFIG_LAPB is not set
5069 +# CONFIG_LLC is not set
5070 +# CONFIG_NET_DIVERT is not set
5071 +# CONFIG_ECONET is not set
5072 +# CONFIG_WAN_ROUTER is not set
5073 +# CONFIG_NET_FASTROUTE is not set
5074 +# CONFIG_NET_HW_FLOWCONTROL is not set
5075 +
5076 +#
5077 +# QoS and/or fair queueing
5078 +#
5079 +# CONFIG_NET_SCHED is not set
5080 +
5081 +#
5082 +# Network testing
5083 +#
5084 +# CONFIG_NET_PKTGEN is not set
5085 +
5086 +#
5087 +# Telephony Support
5088 +#
5089 +# CONFIG_PHONE is not set
5090 +# CONFIG_PHONE_IXJ is not set
5091 +# CONFIG_PHONE_IXJ_PCMCIA is not set
5092 +
5093 +#
5094 +# ATA/IDE/MFM/RLL support
5095 +#
5096 +CONFIG_IDE=y
5097 +
5098 +#
5099 +# IDE, ATA and ATAPI Block devices
5100 +#
5101 +CONFIG_BLK_DEV_IDE=y
5102 +
5103 +#
5104 +# Please see Documentation/ide.txt for help/info on IDE drives
5105 +#
5106 +# CONFIG_BLK_DEV_HD_IDE is not set
5107 +# CONFIG_BLK_DEV_HD is not set
5108 +# CONFIG_BLK_DEV_IDE_SATA is not set
5109 +CONFIG_BLK_DEV_IDEDISK=y
5110 +CONFIG_IDEDISK_MULTI_MODE=y
5111 +CONFIG_IDEDISK_STROKE=y
5112 +CONFIG_BLK_DEV_IDECS=m
5113 +# CONFIG_BLK_DEV_DELKIN is not set
5114 +# CONFIG_BLK_DEV_IDECD is not set
5115 +# CONFIG_BLK_DEV_IDETAPE is not set
5116 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
5117 +# CONFIG_BLK_DEV_IDESCSI is not set
5118 +# CONFIG_IDE_TASK_IOCTL is not set
5119 +
5120 +#
5121 +# IDE chipset support/bugfixes
5122 +#
5123 +# CONFIG_BLK_DEV_CMD640 is not set
5124 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
5125 +# CONFIG_BLK_DEV_ISAPNP is not set
5126 +# CONFIG_BLK_DEV_IDEPCI is not set
5127 +# CONFIG_IDE_CHIPSETS is not set
5128 +# CONFIG_IDEDMA_AUTO is not set
5129 +# CONFIG_DMA_NONPCI is not set
5130 +# CONFIG_BLK_DEV_ATARAID is not set
5131 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
5132 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
5133 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
5134 +# CONFIG_BLK_DEV_ATARAID_SII is not set
5135 +
5136 +#
5137 +# SCSI support
5138 +#
5139 +CONFIG_SCSI=y
5140 +
5141 +#
5142 +# SCSI support type (disk, tape, CD-ROM)
5143 +#
5144 +CONFIG_BLK_DEV_SD=y
5145 +CONFIG_SD_EXTRA_DEVS=40
5146 +CONFIG_CHR_DEV_ST=y
5147 +# CONFIG_CHR_DEV_OSST is not set
5148 +CONFIG_BLK_DEV_SR=y
5149 +# CONFIG_BLK_DEV_SR_VENDOR is not set
5150 +CONFIG_SR_EXTRA_DEVS=2
5151 +# CONFIG_CHR_DEV_SG is not set
5152 +
5153 +#
5154 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
5155 +#
5156 +# CONFIG_SCSI_DEBUG_QUEUES is not set
5157 +# CONFIG_SCSI_MULTI_LUN is not set
5158 +CONFIG_SCSI_CONSTANTS=y
5159 +# CONFIG_SCSI_LOGGING is not set
5160 +
5161 +#
5162 +# SCSI low-level drivers
5163 +#
5164 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
5165 +# CONFIG_SCSI_7000FASST is not set
5166 +# CONFIG_SCSI_ACARD is not set
5167 +# CONFIG_SCSI_AHA152X is not set
5168 +# CONFIG_SCSI_AHA1542 is not set
5169 +# CONFIG_SCSI_AHA1740 is not set
5170 +# CONFIG_SCSI_AACRAID is not set
5171 +# CONFIG_SCSI_AIC7XXX is not set
5172 +# CONFIG_SCSI_AIC79XX is not set
5173 +# CONFIG_SCSI_AIC7XXX_OLD is not set
5174 +# CONFIG_SCSI_DPT_I2O is not set
5175 +# CONFIG_SCSI_ADVANSYS is not set
5176 +# CONFIG_SCSI_IN2000 is not set
5177 +# CONFIG_SCSI_AM53C974 is not set
5178 +# CONFIG_SCSI_MEGARAID is not set
5179 +# CONFIG_SCSI_MEGARAID2 is not set
5180 +# CONFIG_SCSI_SATA is not set
5181 +# CONFIG_SCSI_SATA_AHCI is not set
5182 +# CONFIG_SCSI_SATA_SVW is not set
5183 +# CONFIG_SCSI_ATA_PIIX is not set
5184 +# CONFIG_SCSI_SATA_NV is not set
5185 +# CONFIG_SCSI_SATA_QSTOR is not set
5186 +# CONFIG_SCSI_SATA_PROMISE is not set
5187 +# CONFIG_SCSI_SATA_SX4 is not set
5188 +# CONFIG_SCSI_SATA_SIL is not set
5189 +# CONFIG_SCSI_SATA_SIS is not set
5190 +# CONFIG_SCSI_SATA_ULI is not set
5191 +# CONFIG_SCSI_SATA_VIA is not set
5192 +# CONFIG_SCSI_SATA_VITESSE is not set
5193 +# CONFIG_SCSI_BUSLOGIC is not set
5194 +# CONFIG_SCSI_CPQFCTS is not set
5195 +# CONFIG_SCSI_DMX3191D is not set
5196 +# CONFIG_SCSI_DTC3280 is not set
5197 +# CONFIG_SCSI_EATA is not set
5198 +# CONFIG_SCSI_EATA_DMA is not set
5199 +# CONFIG_SCSI_EATA_PIO is not set
5200 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
5201 +# CONFIG_SCSI_GDTH is not set
5202 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
5203 +# CONFIG_SCSI_INITIO is not set
5204 +# CONFIG_SCSI_INIA100 is not set
5205 +# CONFIG_SCSI_NCR53C406A is not set
5206 +# CONFIG_SCSI_NCR53C7xx is not set
5207 +# CONFIG_SCSI_SYM53C8XX_2 is not set
5208 +# CONFIG_SCSI_NCR53C8XX is not set
5209 +# CONFIG_SCSI_SYM53C8XX is not set
5210 +# CONFIG_SCSI_PAS16 is not set
5211 +# CONFIG_SCSI_PCI2000 is not set
5212 +# CONFIG_SCSI_PCI2220I is not set
5213 +# CONFIG_SCSI_PSI240I is not set
5214 +# CONFIG_SCSI_QLOGIC_FAS is not set
5215 +# CONFIG_SCSI_QLOGIC_ISP is not set
5216 +# CONFIG_SCSI_QLOGIC_FC is not set
5217 +# CONFIG_SCSI_QLOGIC_1280 is not set
5218 +# CONFIG_SCSI_SIM710 is not set
5219 +# CONFIG_SCSI_SYM53C416 is not set
5220 +# CONFIG_SCSI_DC390T is not set
5221 +# CONFIG_SCSI_T128 is not set
5222 +# CONFIG_SCSI_U14_34F is not set
5223 +# CONFIG_SCSI_NSP32 is not set
5224 +# CONFIG_SCSI_DEBUG is not set
5225 +
5226 +#
5227 +# PCMCIA SCSI adapter support
5228 +#
5229 +# CONFIG_SCSI_PCMCIA is not set
5230 +
5231 +#
5232 +# Fusion MPT device support
5233 +#
5234 +# CONFIG_FUSION is not set
5235 +# CONFIG_FUSION_BOOT is not set
5236 +# CONFIG_FUSION_ISENSE is not set
5237 +# CONFIG_FUSION_CTL is not set
5238 +# CONFIG_FUSION_LAN is not set
5239 +
5240 +#
5241 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
5242 +#
5243 +# CONFIG_IEEE1394 is not set
5244 +
5245 +#
5246 +# I2O device support
5247 +#
5248 +# CONFIG_I2O is not set
5249 +# CONFIG_I2O_PCI is not set
5250 +# CONFIG_I2O_BLOCK is not set
5251 +# CONFIG_I2O_LAN is not set
5252 +# CONFIG_I2O_SCSI is not set
5253 +# CONFIG_I2O_PROC is not set
5254 +
5255 +#
5256 +# Network device support
5257 +#
5258 +CONFIG_NETDEVICES=y
5259 +
5260 +#
5261 +# ARCnet devices
5262 +#
5263 +# CONFIG_ARCNET is not set
5264 +# CONFIG_DUMMY is not set
5265 +# CONFIG_BONDING is not set
5266 +# CONFIG_EQUALIZER is not set
5267 +# CONFIG_TUN is not set
5268 +# CONFIG_ETHERTAP is not set
5269 +
5270 +#
5271 +# Ethernet (10 or 100Mbit)
5272 +#
5273 +CONFIG_NET_ETHERNET=y
5274 +# CONFIG_SUNLANCE is not set
5275 +# CONFIG_HAPPYMEAL is not set
5276 +# CONFIG_SUNBMAC is not set
5277 +# CONFIG_SUNQE is not set
5278 +# CONFIG_SUNGEM is not set
5279 +# CONFIG_NET_VENDOR_3COM is not set
5280 +# CONFIG_LANCE is not set
5281 +# CONFIG_NET_VENDOR_SMC is not set
5282 +# CONFIG_NET_VENDOR_RACAL is not set
5283 +# CONFIG_HP100 is not set
5284 +# CONFIG_NET_ISA is not set
5285 +# CONFIG_NET_PCI is not set
5286 +# CONFIG_NET_POCKET is not set
5287 +
5288 +#
5289 +# Ethernet (1000 Mbit)
5290 +#
5291 +# CONFIG_ACENIC is not set
5292 +# CONFIG_DL2K is not set
5293 +# CONFIG_E1000 is not set
5294 +# CONFIG_MYRI_SBUS is not set
5295 +# CONFIG_NS83820 is not set
5296 +# CONFIG_HAMACHI is not set
5297 +# CONFIG_YELLOWFIN is not set
5298 +# CONFIG_R8169 is not set
5299 +# CONFIG_SK98LIN is not set
5300 +# CONFIG_TIGON3 is not set
5301 +# CONFIG_FDDI is not set
5302 +# CONFIG_HIPPI is not set
5303 +# CONFIG_PLIP is not set
5304 +# CONFIG_PPP is not set
5305 +# CONFIG_SLIP is not set
5306 +
5307 +#
5308 +# Wireless LAN (non-hamradio)
5309 +#
5310 +# CONFIG_NET_RADIO is not set
5311 +
5312 +#
5313 +# Token Ring devices
5314 +#
5315 +# CONFIG_TR is not set
5316 +# CONFIG_NET_FC is not set
5317 +# CONFIG_RCPCI is not set
5318 +# CONFIG_SHAPER is not set
5319 +
5320 +#
5321 +# Wan interfaces
5322 +#
5323 +# CONFIG_WAN is not set
5324 +
5325 +#
5326 +# PCMCIA network device support
5327 +#
5328 +# CONFIG_NET_PCMCIA is not set
5329 +
5330 +#
5331 +# Amateur Radio support
5332 +#
5333 +# CONFIG_HAMRADIO is not set
5334 +
5335 +#
5336 +# IrDA (infrared) support
5337 +#
5338 +# CONFIG_IRDA is not set
5339 +
5340 +#
5341 +# ISDN subsystem
5342 +#
5343 +# CONFIG_ISDN is not set
5344 +
5345 +#
5346 +# Input core support
5347 +#
5348 +CONFIG_INPUT=y
5349 +CONFIG_INPUT_KEYBDEV=y
5350 +CONFIG_INPUT_MOUSEDEV=y
5351 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
5352 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
5353 +# CONFIG_INPUT_JOYDEV is not set
5354 +CONFIG_INPUT_EVDEV=y
5355 +# CONFIG_INPUT_UINPUT is not set
5356 +
5357 +#
5358 +# Character devices
5359 +#
5360 +CONFIG_VT=y
5361 +# CONFIG_VT_CONSOLE is not set
5362 +# CONFIG_SERIAL is not set
5363 +# CONFIG_SERIAL_EXTENDED is not set
5364 +CONFIG_SERIAL_NONSTANDARD=y
5365 +# CONFIG_COMPUTONE is not set
5366 +# CONFIG_ROCKETPORT is not set
5367 +# CONFIG_CYCLADES is not set
5368 +# CONFIG_DIGIEPCA is not set
5369 +# CONFIG_DIGI is not set
5370 +# CONFIG_ESPSERIAL is not set
5371 +# CONFIG_MOXA_INTELLIO is not set
5372 +# CONFIG_MOXA_SMARTIO is not set
5373 +# CONFIG_ISI is not set
5374 +# CONFIG_SYNCLINK is not set
5375 +# CONFIG_SYNCLINKMP is not set
5376 +# CONFIG_N_HDLC is not set
5377 +# CONFIG_RISCOM8 is not set
5378 +# CONFIG_SPECIALIX is not set
5379 +# CONFIG_SX is not set
5380 +# CONFIG_RIO is not set
5381 +# CONFIG_STALDRV is not set
5382 +# CONFIG_SERIAL_TX3912 is not set
5383 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
5384 +# CONFIG_SERIAL_TXX9 is not set
5385 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
5386 +# CONFIG_TXX927_SERIAL is not set
5387 +CONFIG_UNIX98_PTYS=y
5388 +CONFIG_UNIX98_PTY_COUNT=256
5389 +
5390 +#
5391 +# I2C support
5392 +#
5393 +# CONFIG_I2C is not set
5394 +
5395 +#
5396 +# Mice
5397 +#
5398 +# CONFIG_BUSMOUSE is not set
5399 +# CONFIG_MOUSE is not set
5400 +
5401 +#
5402 +# Joysticks
5403 +#
5404 +# CONFIG_INPUT_GAMEPORT is not set
5405 +# CONFIG_INPUT_NS558 is not set
5406 +# CONFIG_INPUT_LIGHTNING is not set
5407 +# CONFIG_INPUT_PCIGAME is not set
5408 +# CONFIG_INPUT_CS461X is not set
5409 +# CONFIG_INPUT_EMU10K1 is not set
5410 +# CONFIG_INPUT_SERIO is not set
5411 +# CONFIG_INPUT_SERPORT is not set
5412 +
5413 +#
5414 +# Joysticks
5415 +#
5416 +# CONFIG_INPUT_ANALOG is not set
5417 +# CONFIG_INPUT_A3D is not set
5418 +# CONFIG_INPUT_ADI is not set
5419 +# CONFIG_INPUT_COBRA is not set
5420 +# CONFIG_INPUT_GF2K is not set
5421 +# CONFIG_INPUT_GRIP is not set
5422 +# CONFIG_INPUT_INTERACT is not set
5423 +# CONFIG_INPUT_TMDC is not set
5424 +# CONFIG_INPUT_SIDEWINDER is not set
5425 +# CONFIG_INPUT_IFORCE_USB is not set
5426 +# CONFIG_INPUT_IFORCE_232 is not set
5427 +# CONFIG_INPUT_WARRIOR is not set
5428 +# CONFIG_INPUT_MAGELLAN is not set
5429 +# CONFIG_INPUT_SPACEORB is not set
5430 +# CONFIG_INPUT_SPACEBALL is not set
5431 +# CONFIG_INPUT_STINGER is not set
5432 +# CONFIG_INPUT_DB9 is not set
5433 +# CONFIG_INPUT_GAMECON is not set
5434 +# CONFIG_INPUT_TURBOGRAFX is not set
5435 +# CONFIG_QIC02_TAPE is not set
5436 +# CONFIG_IPMI_HANDLER is not set
5437 +# CONFIG_IPMI_PANIC_EVENT is not set
5438 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
5439 +# CONFIG_IPMI_KCS is not set
5440 +# CONFIG_IPMI_WATCHDOG is not set
5441 +
5442 +#
5443 +# Watchdog Cards
5444 +#
5445 +# CONFIG_WATCHDOG is not set
5446 +# CONFIG_SCx200 is not set
5447 +# CONFIG_SCx200_GPIO is not set
5448 +# CONFIG_AMD_PM768 is not set
5449 +# CONFIG_NVRAM is not set
5450 +# CONFIG_RTC is not set
5451 +# CONFIG_DTLK is not set
5452 +# CONFIG_R3964 is not set
5453 +# CONFIG_APPLICOM is not set
5454 +
5455 +#
5456 +# Ftape, the floppy tape device driver
5457 +#
5458 +# CONFIG_FTAPE is not set
5459 +# CONFIG_AGP is not set
5460 +
5461 +#
5462 +# Direct Rendering Manager (XFree86 DRI support)
5463 +#
5464 +# CONFIG_DRM is not set
5465 +
5466 +#
5467 +# PCMCIA character devices
5468 +#
5469 +# CONFIG_PCMCIA_SERIAL_CS is not set
5470 +# CONFIG_SYNCLINK_CS is not set
5471 +
5472 +#
5473 +# File systems
5474 +#
5475 +# CONFIG_QUOTA is not set
5476 +# CONFIG_QFMT_V2 is not set
5477 +CONFIG_AUTOFS_FS=y
5478 +# CONFIG_AUTOFS4_FS is not set
5479 +# CONFIG_REISERFS_FS is not set
5480 +# CONFIG_REISERFS_CHECK is not set
5481 +# CONFIG_REISERFS_PROC_INFO is not set
5482 +# CONFIG_ADFS_FS is not set
5483 +# CONFIG_ADFS_FS_RW is not set
5484 +# CONFIG_AFFS_FS is not set
5485 +# CONFIG_HFS_FS is not set
5486 +# CONFIG_HFSPLUS_FS is not set
5487 +# CONFIG_BEFS_FS is not set
5488 +# CONFIG_BEFS_DEBUG is not set
5489 +# CONFIG_BFS_FS is not set
5490 +CONFIG_EXT3_FS=y
5491 +CONFIG_JBD=y
5492 +# CONFIG_JBD_DEBUG is not set
5493 +CONFIG_FAT_FS=y
5494 +CONFIG_MSDOS_FS=y
5495 +# CONFIG_UMSDOS_FS is not set
5496 +CONFIG_VFAT_FS=y
5497 +# CONFIG_EFS_FS is not set
5498 +# CONFIG_JFFS_FS is not set
5499 +# CONFIG_JFFS2_FS is not set
5500 +# CONFIG_CRAMFS is not set
5501 +CONFIG_TMPFS=y
5502 +CONFIG_RAMFS=y
5503 +# CONFIG_ISO9660_FS is not set
5504 +# CONFIG_JOLIET is not set
5505 +# CONFIG_ZISOFS is not set
5506 +# CONFIG_JFS_FS is not set
5507 +# CONFIG_JFS_DEBUG is not set
5508 +# CONFIG_JFS_STATISTICS is not set
5509 +# CONFIG_MINIX_FS is not set
5510 +# CONFIG_VXFS_FS is not set
5511 +# CONFIG_NTFS_FS is not set
5512 +# CONFIG_NTFS_RW is not set
5513 +# CONFIG_HPFS_FS is not set
5514 +CONFIG_PROC_FS=y
5515 +# CONFIG_DEVFS_FS is not set
5516 +# CONFIG_DEVFS_MOUNT is not set
5517 +# CONFIG_DEVFS_DEBUG is not set
5518 +CONFIG_DEVPTS_FS=y
5519 +# CONFIG_QNX4FS_FS is not set
5520 +# CONFIG_QNX4FS_RW is not set
5521 +# CONFIG_ROMFS_FS is not set
5522 +CONFIG_EXT2_FS=y
5523 +# CONFIG_SYSV_FS is not set
5524 +# CONFIG_UDF_FS is not set
5525 +# CONFIG_UDF_RW is not set
5526 +# CONFIG_UFS_FS is not set
5527 +# CONFIG_UFS_FS_WRITE is not set
5528 +# CONFIG_XFS_FS is not set
5529 +# CONFIG_XFS_QUOTA is not set
5530 +# CONFIG_XFS_RT is not set
5531 +# CONFIG_XFS_TRACE is not set
5532 +# CONFIG_XFS_DEBUG is not set
5533 +
5534 +#
5535 +# Network File Systems
5536 +#
5537 +# CONFIG_CODA_FS is not set
5538 +# CONFIG_INTERMEZZO_FS is not set
5539 +CONFIG_NFS_FS=y
5540 +CONFIG_NFS_V3=y
5541 +# CONFIG_NFS_DIRECTIO is not set
5542 +CONFIG_ROOT_NFS=y
5543 +# CONFIG_NFSD is not set
5544 +# CONFIG_NFSD_V3 is not set
5545 +# CONFIG_NFSD_TCP is not set
5546 +CONFIG_SUNRPC=y
5547 +CONFIG_LOCKD=y
5548 +CONFIG_LOCKD_V4=y
5549 +# CONFIG_SMB_FS is not set
5550 +# CONFIG_NCP_FS is not set
5551 +# CONFIG_NCPFS_PACKET_SIGNING is not set
5552 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
5553 +# CONFIG_NCPFS_STRONG is not set
5554 +# CONFIG_NCPFS_NFS_NS is not set
5555 +# CONFIG_NCPFS_OS2_NS is not set
5556 +# CONFIG_NCPFS_SMALLDOS is not set
5557 +# CONFIG_NCPFS_NLS is not set
5558 +# CONFIG_NCPFS_EXTRAS is not set
5559 +# CONFIG_ZISOFS_FS is not set
5560 +
5561 +#
5562 +# Partition Types
5563 +#
5564 +# CONFIG_PARTITION_ADVANCED is not set
5565 +CONFIG_MSDOS_PARTITION=y
5566 +# CONFIG_SMB_NLS is not set
5567 +CONFIG_NLS=y
5568 +
5569 +#
5570 +# Native Language Support
5571 +#
5572 +CONFIG_NLS_DEFAULT="iso8859-1"
5573 +# CONFIG_NLS_CODEPAGE_437 is not set
5574 +# CONFIG_NLS_CODEPAGE_737 is not set
5575 +# CONFIG_NLS_CODEPAGE_775 is not set
5576 +# CONFIG_NLS_CODEPAGE_850 is not set
5577 +# CONFIG_NLS_CODEPAGE_852 is not set
5578 +# CONFIG_NLS_CODEPAGE_855 is not set
5579 +# CONFIG_NLS_CODEPAGE_857 is not set
5580 +# CONFIG_NLS_CODEPAGE_860 is not set
5581 +# CONFIG_NLS_CODEPAGE_861 is not set
5582 +# CONFIG_NLS_CODEPAGE_862 is not set
5583 +# CONFIG_NLS_CODEPAGE_863 is not set
5584 +# CONFIG_NLS_CODEPAGE_864 is not set
5585 +# CONFIG_NLS_CODEPAGE_865 is not set
5586 +# CONFIG_NLS_CODEPAGE_866 is not set
5587 +# CONFIG_NLS_CODEPAGE_869 is not set
5588 +# CONFIG_NLS_CODEPAGE_936 is not set
5589 +# CONFIG_NLS_CODEPAGE_950 is not set
5590 +# CONFIG_NLS_CODEPAGE_932 is not set
5591 +# CONFIG_NLS_CODEPAGE_949 is not set
5592 +# CONFIG_NLS_CODEPAGE_874 is not set
5593 +# CONFIG_NLS_ISO8859_8 is not set
5594 +# CONFIG_NLS_CODEPAGE_1250 is not set
5595 +# CONFIG_NLS_CODEPAGE_1251 is not set
5596 +# CONFIG_NLS_ISO8859_1 is not set
5597 +# CONFIG_NLS_ISO8859_2 is not set
5598 +# CONFIG_NLS_ISO8859_3 is not set
5599 +# CONFIG_NLS_ISO8859_4 is not set
5600 +# CONFIG_NLS_ISO8859_5 is not set
5601 +# CONFIG_NLS_ISO8859_6 is not set
5602 +# CONFIG_NLS_ISO8859_7 is not set
5603 +# CONFIG_NLS_ISO8859_9 is not set
5604 +# CONFIG_NLS_ISO8859_13 is not set
5605 +# CONFIG_NLS_ISO8859_14 is not set
5606 +# CONFIG_NLS_ISO8859_15 is not set
5607 +# CONFIG_NLS_KOI8_R is not set
5608 +# CONFIG_NLS_KOI8_U is not set
5609 +# CONFIG_NLS_UTF8 is not set
5610 +
5611 +#
5612 +# Multimedia devices
5613 +#
5614 +# CONFIG_VIDEO_DEV is not set
5615 +
5616 +#
5617 +# Console drivers
5618 +#
5619 +# CONFIG_VGA_CONSOLE is not set
5620 +# CONFIG_MDA_CONSOLE is not set
5621 +
5622 +#
5623 +# Frame-buffer support
5624 +#
5625 +CONFIG_FB=y
5626 +CONFIG_DUMMY_CONSOLE=y
5627 +# CONFIG_FB_RIVA is not set
5628 +# CONFIG_FB_CLGEN is not set
5629 +# CONFIG_FB_PM2 is not set
5630 +# CONFIG_FB_PM3 is not set
5631 +# CONFIG_FB_CYBER2000 is not set
5632 +# CONFIG_FB_MATROX is not set
5633 +# CONFIG_FB_ATY is not set
5634 +# CONFIG_FB_RADEON is not set
5635 +# CONFIG_FB_ATY128 is not set
5636 +# CONFIG_FB_INTEL is not set
5637 +# CONFIG_FB_SIS is not set
5638 +# CONFIG_FB_NEOMAGIC is not set
5639 +# CONFIG_FB_3DFX is not set
5640 +# CONFIG_FB_VOODOO1 is not set
5641 +# CONFIG_FB_TRIDENT is not set
5642 +# CONFIG_FB_E1356 is not set
5643 +# CONFIG_FB_IT8181 is not set
5644 +# CONFIG_FB_VIRTUAL is not set
5645 +CONFIG_FBCON_ADVANCED=y
5646 +# CONFIG_FBCON_MFB is not set
5647 +# CONFIG_FBCON_CFB2 is not set
5648 +# CONFIG_FBCON_CFB4 is not set
5649 +# CONFIG_FBCON_CFB8 is not set
5650 +CONFIG_FBCON_CFB16=y
5651 +# CONFIG_FBCON_CFB24 is not set
5652 +CONFIG_FBCON_CFB32=y
5653 +# CONFIG_FBCON_AFB is not set
5654 +# CONFIG_FBCON_ILBM is not set
5655 +# CONFIG_FBCON_IPLAN2P2 is not set
5656 +# CONFIG_FBCON_IPLAN2P4 is not set
5657 +# CONFIG_FBCON_IPLAN2P8 is not set
5658 +# CONFIG_FBCON_MAC is not set
5659 +# CONFIG_FBCON_VGA_PLANES is not set
5660 +# CONFIG_FBCON_VGA is not set
5661 +# CONFIG_FBCON_HGA is not set
5662 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
5663 +CONFIG_FBCON_FONTS=y
5664 +CONFIG_FONT_8x8=y
5665 +CONFIG_FONT_8x16=y
5666 +# CONFIG_FONT_SUN8x16 is not set
5667 +# CONFIG_FONT_SUN12x22 is not set
5668 +# CONFIG_FONT_6x11 is not set
5669 +# CONFIG_FONT_PEARL_8x8 is not set
5670 +# CONFIG_FONT_ACORN_8x8 is not set
5671 +
5672 +#
5673 +# Sound
5674 +#
5675 +CONFIG_SOUND=y
5676 +# CONFIG_SOUND_ALI5455 is not set
5677 +# CONFIG_SOUND_BT878 is not set
5678 +# CONFIG_SOUND_CMPCI is not set
5679 +# CONFIG_SOUND_EMU10K1 is not set
5680 +# CONFIG_MIDI_EMU10K1 is not set
5681 +# CONFIG_SOUND_FUSION is not set
5682 +# CONFIG_SOUND_CS4281 is not set
5683 +# CONFIG_SOUND_ES1370 is not set
5684 +# CONFIG_SOUND_ES1371 is not set
5685 +# CONFIG_SOUND_ESSSOLO1 is not set
5686 +# CONFIG_SOUND_MAESTRO is not set
5687 +# CONFIG_SOUND_MAESTRO3 is not set
5688 +# CONFIG_SOUND_FORTE is not set
5689 +# CONFIG_SOUND_ICH is not set
5690 +# CONFIG_SOUND_RME96XX is not set
5691 +# CONFIG_SOUND_SONICVIBES is not set
5692 +# CONFIG_SOUND_TRIDENT is not set
5693 +# CONFIG_SOUND_MSNDCLAS is not set
5694 +# CONFIG_SOUND_MSNDPIN is not set
5695 +# CONFIG_SOUND_VIA82CXXX is not set
5696 +# CONFIG_MIDI_VIA82CXXX is not set
5697 +# CONFIG_SOUND_OSS is not set
5698 +# CONFIG_SOUND_TVMIXER is not set
5699 +# CONFIG_SOUND_AD1980 is not set
5700 +# CONFIG_SOUND_WM97XX is not set
5701 +
5702 +#
5703 +# USB support
5704 +#
5705 +CONFIG_USB=y
5706 +# CONFIG_USB_DEBUG is not set
5707 +
5708 +#
5709 +# Miscellaneous USB options
5710 +#
5711 +CONFIG_USB_DEVICEFS=y
5712 +# CONFIG_USB_BANDWIDTH is not set
5713 +
5714 +#
5715 +# USB Host Controller Drivers
5716 +#
5717 +# CONFIG_USB_EHCI_HCD is not set
5718 +# CONFIG_USB_UHCI is not set
5719 +# CONFIG_USB_UHCI_ALT is not set
5720 +CONFIG_USB_OHCI=y
5721 +
5722 +#
5723 +# USB Device Class drivers
5724 +#
5725 +# CONFIG_USB_AUDIO is not set
5726 +# CONFIG_USB_EMI26 is not set
5727 +# CONFIG_USB_BLUETOOTH is not set
5728 +# CONFIG_USB_MIDI is not set
5729 +CONFIG_USB_STORAGE=y
5730 +# CONFIG_USB_STORAGE_DEBUG is not set
5731 +# CONFIG_USB_STORAGE_DATAFAB is not set
5732 +# CONFIG_USB_STORAGE_FREECOM is not set
5733 +# CONFIG_USB_STORAGE_ISD200 is not set
5734 +# CONFIG_USB_STORAGE_DPCM is not set
5735 +# CONFIG_USB_STORAGE_HP8200e is not set
5736 +# CONFIG_USB_STORAGE_SDDR09 is not set
5737 +# CONFIG_USB_STORAGE_SDDR55 is not set
5738 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
5739 +# CONFIG_USB_ACM is not set
5740 +# CONFIG_USB_PRINTER is not set
5741 +
5742 +#
5743 +# USB Human Interface Devices (HID)
5744 +#
5745 +CONFIG_USB_HID=y
5746 +CONFIG_USB_HIDINPUT=y
5747 +CONFIG_USB_HIDDEV=y
5748 +# CONFIG_USB_AIPTEK is not set
5749 +# CONFIG_USB_WACOM is not set
5750 +# CONFIG_USB_KBTAB is not set
5751 +# CONFIG_USB_POWERMATE is not set
5752 +
5753 +#
5754 +# USB Imaging devices
5755 +#
5756 +# CONFIG_USB_DC2XX is not set
5757 +# CONFIG_USB_MDC800 is not set
5758 +# CONFIG_USB_SCANNER is not set
5759 +# CONFIG_USB_MICROTEK is not set
5760 +# CONFIG_USB_HPUSBSCSI is not set
5761 +
5762 +#
5763 +# USB Multimedia devices
5764 +#
5765 +
5766 +#
5767 +# Video4Linux support is needed for USB Multimedia device support
5768 +#
5769 +
5770 +#
5771 +# USB Network adaptors
5772 +#
5773 +# CONFIG_USB_PEGASUS is not set
5774 +# CONFIG_USB_RTL8150 is not set
5775 +# CONFIG_USB_KAWETH is not set
5776 +# CONFIG_USB_CATC is not set
5777 +# CONFIG_USB_CDCETHER is not set
5778 +# CONFIG_USB_USBNET is not set
5779 +
5780 +#
5781 +# USB port drivers
5782 +#
5783 +# CONFIG_USB_USS720 is not set
5784 +
5785 +#
5786 +# USB Serial Converter support
5787 +#
5788 +# CONFIG_USB_SERIAL is not set
5789 +
5790 +#
5791 +# USB Miscellaneous drivers
5792 +#
5793 +# CONFIG_USB_RIO500 is not set
5794 +# CONFIG_USB_AUERSWALD is not set
5795 +# CONFIG_USB_TIGL is not set
5796 +# CONFIG_USB_BRLVGER is not set
5797 +# CONFIG_USB_LCD is not set
5798 +
5799 +#
5800 +# Support for USB gadgets
5801 +#
5802 +# CONFIG_USB_GADGET is not set
5803 +
5804 +#
5805 +# Bluetooth support
5806 +#
5807 +# CONFIG_BLUEZ is not set
5808 +
5809 +#
5810 +# Kernel hacking
5811 +#
5812 +CONFIG_CROSSCOMPILE=y
5813 +# CONFIG_RUNTIME_DEBUG is not set
5814 +# CONFIG_KGDB is not set
5815 +# CONFIG_GDB_CONSOLE is not set
5816 +# CONFIG_DEBUG_INFO is not set
5817 +# CONFIG_MAGIC_SYSRQ is not set
5818 +# CONFIG_MIPS_UNCACHED is not set
5819 +CONFIG_LOG_BUF_SHIFT=0
5820 +
5821 +#
5822 +# Cryptographic options
5823 +#
5824 +# CONFIG_CRYPTO is not set
5825 +
5826 +#
5827 +# Library routines
5828 +#
5829 +# CONFIG_CRC32 is not set
5830 +CONFIG_ZLIB_INFLATE=m
5831 +CONFIG_ZLIB_DEFLATE=m
5832 +# CONFIG_FW_LOADER is not set
5833 Index: linux-2.4.35.4/arch/mips/defconfig-db1500
5834 ===================================================================
5835 --- linux-2.4.35.4.orig/arch/mips/defconfig-db1500 2007-12-15 05:19:43.202883030 +0100
5836 +++ linux-2.4.35.4/arch/mips/defconfig-db1500 2007-12-15 05:19:44.826975582 +0100
5837 @@ -30,8 +30,8 @@
5838 # CONFIG_MIPS_PB1000 is not set
5839 # CONFIG_MIPS_PB1100 is not set
5840 # CONFIG_MIPS_PB1500 is not set
5841 -# CONFIG_MIPS_HYDROGEN3 is not set
5842 # CONFIG_MIPS_PB1550 is not set
5843 +# CONFIG_MIPS_HYDROGEN3 is not set
5844 # CONFIG_MIPS_XXS1500 is not set
5845 # CONFIG_MIPS_MTX1 is not set
5846 # CONFIG_COGENT_CSB250 is not set
5847 @@ -267,11 +267,6 @@
5848 #
5849 # CONFIG_IPX is not set
5850 # CONFIG_ATALK is not set
5851 -
5852 -#
5853 -# Appletalk devices
5854 -#
5855 -# CONFIG_DEV_APPLETALK is not set
5856 # CONFIG_DECNET is not set
5857 # CONFIG_BRIDGE is not set
5858 # CONFIG_X25 is not set
5859 @@ -555,7 +550,6 @@
5860 # CONFIG_AU1X00_USB_TTY is not set
5861 # CONFIG_AU1X00_USB_RAW is not set
5862 # CONFIG_TXX927_SERIAL is not set
5863 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5864 CONFIG_UNIX98_PTYS=y
5865 CONFIG_UNIX98_PTY_COUNT=256
5866
5867 Index: linux-2.4.35.4/arch/mips/defconfig-db1550
5868 ===================================================================
5869 --- linux-2.4.35.4.orig/arch/mips/defconfig-db1550 2007-12-15 05:19:43.210883485 +0100
5870 +++ linux-2.4.35.4/arch/mips/defconfig-db1550 2007-12-15 05:19:44.826975582 +0100
5871 @@ -30,8 +30,8 @@
5872 # CONFIG_MIPS_PB1000 is not set
5873 # CONFIG_MIPS_PB1100 is not set
5874 # CONFIG_MIPS_PB1500 is not set
5875 -# CONFIG_MIPS_HYDROGEN3 is not set
5876 # CONFIG_MIPS_PB1550 is not set
5877 +# CONFIG_MIPS_HYDROGEN3 is not set
5878 # CONFIG_MIPS_XXS1500 is not set
5879 # CONFIG_MIPS_MTX1 is not set
5880 # CONFIG_COGENT_CSB250 is not set
5881 @@ -213,11 +213,9 @@
5882 # CONFIG_MTD_BOSPORUS is not set
5883 # CONFIG_MTD_XXS1500 is not set
5884 # CONFIG_MTD_MTX1 is not set
5885 -# CONFIG_MTD_DB1X00 is not set
5886 CONFIG_MTD_PB1550=y
5887 CONFIG_MTD_PB1550_BOOT=y
5888 CONFIG_MTD_PB1550_USER=y
5889 -# CONFIG_MTD_HYDROGEN3 is not set
5890 # CONFIG_MTD_MIRAGE is not set
5891 # CONFIG_MTD_CSTM_MIPS_IXX is not set
5892 # CONFIG_MTD_OCELOT is not set
5893 @@ -236,7 +234,6 @@
5894 #
5895 # Disk-On-Chip Device Drivers
5896 #
5897 -# CONFIG_MTD_DOC1000 is not set
5898 # CONFIG_MTD_DOC2000 is not set
5899 # CONFIG_MTD_DOC2001 is not set
5900 # CONFIG_MTD_DOCPROBE is not set
5901 @@ -343,11 +340,6 @@
5902 #
5903 # CONFIG_IPX is not set
5904 # CONFIG_ATALK is not set
5905 -
5906 -#
5907 -# Appletalk devices
5908 -#
5909 -# CONFIG_DEV_APPLETALK is not set
5910 # CONFIG_DECNET is not set
5911 # CONFIG_BRIDGE is not set
5912 # CONFIG_X25 is not set
5913 @@ -633,7 +625,6 @@
5914 # CONFIG_AU1X00_USB_TTY is not set
5915 # CONFIG_AU1X00_USB_RAW is not set
5916 # CONFIG_TXX927_SERIAL is not set
5917 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5918 CONFIG_UNIX98_PTYS=y
5919 CONFIG_UNIX98_PTY_COUNT=256
5920
5921 Index: linux-2.4.35.4/arch/mips/defconfig-ddb5476
5922 ===================================================================
5923 --- linux-2.4.35.4.orig/arch/mips/defconfig-ddb5476 2007-12-15 05:19:43.218883943 +0100
5924 +++ linux-2.4.35.4/arch/mips/defconfig-ddb5476 2007-12-15 05:19:44.826975582 +0100
5925 @@ -28,8 +28,8 @@
5926 # CONFIG_MIPS_PB1000 is not set
5927 # CONFIG_MIPS_PB1100 is not set
5928 # CONFIG_MIPS_PB1500 is not set
5929 -# CONFIG_MIPS_HYDROGEN3 is not set
5930 # CONFIG_MIPS_PB1550 is not set
5931 +# CONFIG_MIPS_HYDROGEN3 is not set
5932 # CONFIG_MIPS_XXS1500 is not set
5933 # CONFIG_MIPS_MTX1 is not set
5934 # CONFIG_COGENT_CSB250 is not set
5935 @@ -226,11 +226,6 @@
5936 #
5937 # CONFIG_IPX is not set
5938 # CONFIG_ATALK is not set
5939 -
5940 -#
5941 -# Appletalk devices
5942 -#
5943 -# CONFIG_DEV_APPLETALK is not set
5944 # CONFIG_DECNET is not set
5945 # CONFIG_BRIDGE is not set
5946 # CONFIG_X25 is not set
5947 @@ -517,7 +512,6 @@
5948 CONFIG_SERIAL_CONSOLE=y
5949 # CONFIG_SERIAL_EXTENDED is not set
5950 # CONFIG_SERIAL_NONSTANDARD is not set
5951 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5952 CONFIG_UNIX98_PTYS=y
5953 CONFIG_UNIX98_PTY_COUNT=256
5954
5955 Index: linux-2.4.35.4/arch/mips/defconfig-ddb5477
5956 ===================================================================
5957 --- linux-2.4.35.4.orig/arch/mips/defconfig-ddb5477 2007-12-15 05:19:43.226884399 +0100
5958 +++ linux-2.4.35.4/arch/mips/defconfig-ddb5477 2007-12-15 05:19:44.826975582 +0100
5959 @@ -28,8 +28,8 @@
5960 # CONFIG_MIPS_PB1000 is not set
5961 # CONFIG_MIPS_PB1100 is not set
5962 # CONFIG_MIPS_PB1500 is not set
5963 -# CONFIG_MIPS_HYDROGEN3 is not set
5964 # CONFIG_MIPS_PB1550 is not set
5965 +# CONFIG_MIPS_HYDROGEN3 is not set
5966 # CONFIG_MIPS_XXS1500 is not set
5967 # CONFIG_MIPS_MTX1 is not set
5968 # CONFIG_COGENT_CSB250 is not set
5969 @@ -226,11 +226,6 @@
5970 #
5971 # CONFIG_IPX is not set
5972 # CONFIG_ATALK is not set
5973 -
5974 -#
5975 -# Appletalk devices
5976 -#
5977 -# CONFIG_DEV_APPLETALK is not set
5978 # CONFIG_DECNET is not set
5979 # CONFIG_BRIDGE is not set
5980 # CONFIG_X25 is not set
5981 @@ -434,7 +429,6 @@
5982 CONFIG_SERIAL_CONSOLE=y
5983 # CONFIG_SERIAL_EXTENDED is not set
5984 # CONFIG_SERIAL_NONSTANDARD is not set
5985 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5986 CONFIG_UNIX98_PTYS=y
5987 CONFIG_UNIX98_PTY_COUNT=256
5988
5989 Index: linux-2.4.35.4/arch/mips/defconfig-decstation
5990 ===================================================================
5991 --- linux-2.4.35.4.orig/arch/mips/defconfig-decstation 2007-12-15 05:19:43.234884854 +0100
5992 +++ linux-2.4.35.4/arch/mips/defconfig-decstation 2007-12-15 05:19:44.826975582 +0100
5993 @@ -30,8 +30,8 @@
5994 # CONFIG_MIPS_PB1000 is not set
5995 # CONFIG_MIPS_PB1100 is not set
5996 # CONFIG_MIPS_PB1500 is not set
5997 -# CONFIG_MIPS_HYDROGEN3 is not set
5998 # CONFIG_MIPS_PB1550 is not set
5999 +# CONFIG_MIPS_HYDROGEN3 is not set
6000 # CONFIG_MIPS_XXS1500 is not set
6001 # CONFIG_MIPS_MTX1 is not set
6002 # CONFIG_COGENT_CSB250 is not set
6003 @@ -223,11 +223,6 @@
6004 #
6005 # CONFIG_IPX is not set
6006 # CONFIG_ATALK is not set
6007 -
6008 -#
6009 -# Appletalk devices
6010 -#
6011 -# CONFIG_DEV_APPLETALK is not set
6012 # CONFIG_DECNET is not set
6013 # CONFIG_BRIDGE is not set
6014 # CONFIG_X25 is not set
6015 @@ -306,9 +301,11 @@
6016 # CONFIG_SCSI_MEGARAID is not set
6017 # CONFIG_SCSI_MEGARAID2 is not set
6018 # CONFIG_SCSI_SATA is not set
6019 +# CONFIG_SCSI_SATA_AHCI is not set
6020 # CONFIG_SCSI_SATA_SVW is not set
6021 # CONFIG_SCSI_ATA_PIIX is not set
6022 # CONFIG_SCSI_SATA_NV is not set
6023 +# CONFIG_SCSI_SATA_QSTOR is not set
6024 # CONFIG_SCSI_SATA_PROMISE is not set
6025 # CONFIG_SCSI_SATA_SX4 is not set
6026 # CONFIG_SCSI_SATA_SIL is not set
6027 @@ -477,7 +474,6 @@
6028 CONFIG_SERIAL_DEC_CONSOLE=y
6029 CONFIG_DZ=y
6030 CONFIG_ZS=y
6031 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6032 CONFIG_UNIX98_PTYS=y
6033 CONFIG_UNIX98_PTY_COUNT=256
6034
6035 Index: linux-2.4.35.4/arch/mips/defconfig-e55
6036 ===================================================================
6037 --- linux-2.4.35.4.orig/arch/mips/defconfig-e55 2007-12-15 05:19:43.242885309 +0100
6038 +++ linux-2.4.35.4/arch/mips/defconfig-e55 2007-12-15 05:19:44.830975809 +0100
6039 @@ -30,8 +30,8 @@
6040 # CONFIG_MIPS_PB1000 is not set
6041 # CONFIG_MIPS_PB1100 is not set
6042 # CONFIG_MIPS_PB1500 is not set
6043 -# CONFIG_MIPS_HYDROGEN3 is not set
6044 # CONFIG_MIPS_PB1550 is not set
6045 +# CONFIG_MIPS_HYDROGEN3 is not set
6046 # CONFIG_MIPS_XXS1500 is not set
6047 # CONFIG_MIPS_MTX1 is not set
6048 # CONFIG_COGENT_CSB250 is not set
6049 @@ -222,11 +222,6 @@
6050 #
6051 # CONFIG_IPX is not set
6052 # CONFIG_ATALK is not set
6053 -
6054 -#
6055 -# Appletalk devices
6056 -#
6057 -# CONFIG_DEV_APPLETALK is not set
6058 # CONFIG_DECNET is not set
6059 # CONFIG_BRIDGE is not set
6060 # CONFIG_X25 is not set
6061 @@ -426,7 +421,6 @@
6062 # CONFIG_SERIAL_MULTIPORT is not set
6063 # CONFIG_HUB6 is not set
6064 # CONFIG_SERIAL_NONSTANDARD is not set
6065 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6066 # CONFIG_VR41XX_KIU is not set
6067 CONFIG_UNIX98_PTYS=y
6068 CONFIG_UNIX98_PTY_COUNT=256
6069 Index: linux-2.4.35.4/arch/mips/defconfig-eagle
6070 ===================================================================
6071 --- linux-2.4.35.4.orig/arch/mips/defconfig-eagle 2007-12-15 05:19:43.246885538 +0100
6072 +++ linux-2.4.35.4/arch/mips/defconfig-eagle 2007-12-15 05:19:44.830975809 +0100
6073 @@ -30,8 +30,8 @@
6074 # CONFIG_MIPS_PB1000 is not set
6075 # CONFIG_MIPS_PB1100 is not set
6076 # CONFIG_MIPS_PB1500 is not set
6077 -# CONFIG_MIPS_HYDROGEN3 is not set
6078 # CONFIG_MIPS_PB1550 is not set
6079 +# CONFIG_MIPS_HYDROGEN3 is not set
6080 # CONFIG_MIPS_XXS1500 is not set
6081 # CONFIG_MIPS_MTX1 is not set
6082 # CONFIG_COGENT_CSB250 is not set
6083 @@ -208,8 +208,8 @@
6084 # Mapping drivers for chip access
6085 #
6086 CONFIG_MTD_PHYSMAP=y
6087 -CONFIG_MTD_PHYSMAP_START=1c000000
6088 -CONFIG_MTD_PHYSMAP_LEN=2000000
6089 +CONFIG_MTD_PHYSMAP_START=0x1c000000
6090 +CONFIG_MTD_PHYSMAP_LEN=0x2000000
6091 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
6092 # CONFIG_MTD_PB1000 is not set
6093 # CONFIG_MTD_PB1500 is not set
6094 @@ -217,9 +217,7 @@
6095 # CONFIG_MTD_BOSPORUS is not set
6096 # CONFIG_MTD_XXS1500 is not set
6097 # CONFIG_MTD_MTX1 is not set
6098 -# CONFIG_MTD_DB1X00 is not set
6099 # CONFIG_MTD_PB1550 is not set
6100 -# CONFIG_MTD_HYDROGEN3 is not set
6101 # CONFIG_MTD_MIRAGE is not set
6102 # CONFIG_MTD_CSTM_MIPS_IXX is not set
6103 # CONFIG_MTD_OCELOT is not set
6104 @@ -238,7 +236,6 @@
6105 #
6106 # Disk-On-Chip Device Drivers
6107 #
6108 -# CONFIG_MTD_DOC1000 is not set
6109 # CONFIG_MTD_DOC2000 is not set
6110 # CONFIG_MTD_DOC2001 is not set
6111 # CONFIG_MTD_DOCPROBE is not set
6112 @@ -327,11 +324,6 @@
6113 #
6114 # CONFIG_IPX is not set
6115 # CONFIG_ATALK is not set
6116 -
6117 -#
6118 -# Appletalk devices
6119 -#
6120 -# CONFIG_DEV_APPLETALK is not set
6121 # CONFIG_DECNET is not set
6122 # CONFIG_BRIDGE is not set
6123 # CONFIG_X25 is not set
6124 @@ -587,7 +579,6 @@
6125 CONFIG_SERIAL_CONSOLE=y
6126 # CONFIG_SERIAL_EXTENDED is not set
6127 # CONFIG_SERIAL_NONSTANDARD is not set
6128 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6129 # CONFIG_VR41XX_KIU is not set
6130 CONFIG_UNIX98_PTYS=y
6131 CONFIG_UNIX98_PTY_COUNT=256
6132 Index: linux-2.4.35.4/arch/mips/defconfig-ev64120
6133 ===================================================================
6134 --- linux-2.4.35.4.orig/arch/mips/defconfig-ev64120 2007-12-15 05:19:43.254885994 +0100
6135 +++ linux-2.4.35.4/arch/mips/defconfig-ev64120 2007-12-15 05:19:44.830975809 +0100
6136 @@ -30,8 +30,8 @@
6137 # CONFIG_MIPS_PB1000 is not set
6138 # CONFIG_MIPS_PB1100 is not set
6139 # CONFIG_MIPS_PB1500 is not set
6140 -# CONFIG_MIPS_HYDROGEN3 is not set
6141 # CONFIG_MIPS_PB1550 is not set
6142 +# CONFIG_MIPS_HYDROGEN3 is not set
6143 # CONFIG_MIPS_XXS1500 is not set
6144 # CONFIG_MIPS_MTX1 is not set
6145 # CONFIG_COGENT_CSB250 is not set
6146 @@ -230,11 +230,6 @@
6147 #
6148 # CONFIG_IPX is not set
6149 # CONFIG_ATALK is not set
6150 -
6151 -#
6152 -# Appletalk devices
6153 -#
6154 -# CONFIG_DEV_APPLETALK is not set
6155 # CONFIG_DECNET is not set
6156 # CONFIG_BRIDGE is not set
6157 # CONFIG_X25 is not set
6158 @@ -443,7 +438,6 @@
6159 # CONFIG_SERIAL_CONSOLE is not set
6160 # CONFIG_SERIAL_EXTENDED is not set
6161 # CONFIG_SERIAL_NONSTANDARD is not set
6162 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6163 CONFIG_UNIX98_PTYS=y
6164 CONFIG_UNIX98_PTY_COUNT=256
6165
6166 Index: linux-2.4.35.4/arch/mips/defconfig-ev96100
6167 ===================================================================
6168 --- linux-2.4.35.4.orig/arch/mips/defconfig-ev96100 2007-12-15 05:19:43.262886449 +0100
6169 +++ linux-2.4.35.4/arch/mips/defconfig-ev96100 2007-12-15 05:19:44.830975809 +0100
6170 @@ -30,8 +30,8 @@
6171 # CONFIG_MIPS_PB1000 is not set
6172 # CONFIG_MIPS_PB1100 is not set
6173 # CONFIG_MIPS_PB1500 is not set
6174 -# CONFIG_MIPS_HYDROGEN3 is not set
6175 # CONFIG_MIPS_PB1550 is not set
6176 +# CONFIG_MIPS_HYDROGEN3 is not set
6177 # CONFIG_MIPS_XXS1500 is not set
6178 # CONFIG_MIPS_MTX1 is not set
6179 # CONFIG_COGENT_CSB250 is not set
6180 @@ -232,11 +232,6 @@
6181 #
6182 # CONFIG_IPX is not set
6183 # CONFIG_ATALK is not set
6184 -
6185 -#
6186 -# Appletalk devices
6187 -#
6188 -# CONFIG_DEV_APPLETALK is not set
6189 # CONFIG_DECNET is not set
6190 # CONFIG_BRIDGE is not set
6191 # CONFIG_X25 is not set
6192 @@ -441,7 +436,6 @@
6193 CONFIG_SERIAL_CONSOLE=y
6194 # CONFIG_SERIAL_EXTENDED is not set
6195 # CONFIG_SERIAL_NONSTANDARD is not set
6196 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6197 CONFIG_UNIX98_PTYS=y
6198 CONFIG_UNIX98_PTY_COUNT=256
6199
6200 Index: linux-2.4.35.4/arch/mips/defconfig-ficmmp
6201 ===================================================================
6202 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
6203 +++ linux-2.4.35.4/arch/mips/defconfig-ficmmp 2007-12-15 05:19:44.834976038 +0100
6204 @@ -0,0 +1,862 @@
6205 +#
6206 +# Automatically generated make config: don't edit
6207 +#
6208 +CONFIG_MIPS=y
6209 +CONFIG_MIPS32=y
6210 +# CONFIG_MIPS64 is not set
6211 +
6212 +#
6213 +# Code maturity level options
6214 +#
6215 +CONFIG_EXPERIMENTAL=y
6216 +
6217 +#
6218 +# Loadable module support
6219 +#
6220 +CONFIG_MODULES=y
6221 +# CONFIG_MODVERSIONS is not set
6222 +CONFIG_KMOD=y
6223 +
6224 +#
6225 +# Machine selection
6226 +#
6227 +# CONFIG_ACER_PICA_61 is not set
6228 +# CONFIG_MIPS_BOSPORUS is not set
6229 +# CONFIG_MIPS_MIRAGE is not set
6230 +# CONFIG_MIPS_DB1000 is not set
6231 +# CONFIG_MIPS_DB1100 is not set
6232 +# CONFIG_MIPS_DB1500 is not set
6233 +# CONFIG_MIPS_DB1550 is not set
6234 +# CONFIG_MIPS_PB1000 is not set
6235 +# CONFIG_MIPS_PB1100 is not set
6236 +# CONFIG_MIPS_PB1500 is not set
6237 +# CONFIG_MIPS_PB1550 is not set
6238 +# CONFIG_MIPS_HYDROGEN3 is not set
6239 +# CONFIG_MIPS_XXS1500 is not set
6240 +# CONFIG_MIPS_MTX1 is not set
6241 +# CONFIG_COGENT_CSB250 is not set
6242 +# CONFIG_BAGET_MIPS is not set
6243 +# CONFIG_CASIO_E55 is not set
6244 +# CONFIG_MIPS_COBALT is not set
6245 +# CONFIG_DECSTATION is not set
6246 +# CONFIG_MIPS_EV64120 is not set
6247 +# CONFIG_MIPS_EV96100 is not set
6248 +# CONFIG_MIPS_IVR is not set
6249 +# CONFIG_HP_LASERJET is not set
6250 +# CONFIG_IBM_WORKPAD is not set
6251 +# CONFIG_LASAT is not set
6252 +# CONFIG_MIPS_ITE8172 is not set
6253 +# CONFIG_MIPS_ATLAS is not set
6254 +# CONFIG_MIPS_MAGNUM_4000 is not set
6255 +# CONFIG_MIPS_MALTA is not set
6256 +# CONFIG_MIPS_SEAD is not set
6257 +# CONFIG_MOMENCO_OCELOT is not set
6258 +# CONFIG_MOMENCO_OCELOT_G is not set
6259 +# CONFIG_MOMENCO_OCELOT_C is not set
6260 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
6261 +# CONFIG_PMC_BIG_SUR is not set
6262 +# CONFIG_PMC_STRETCH is not set
6263 +# CONFIG_PMC_YOSEMITE is not set
6264 +# CONFIG_DDB5074 is not set
6265 +# CONFIG_DDB5476 is not set
6266 +# CONFIG_DDB5477 is not set
6267 +# CONFIG_NEC_OSPREY is not set
6268 +# CONFIG_NEC_EAGLE is not set
6269 +# CONFIG_OLIVETTI_M700 is not set
6270 +# CONFIG_NINO is not set
6271 +# CONFIG_SGI_IP22 is not set
6272 +# CONFIG_SGI_IP27 is not set
6273 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
6274 +# CONFIG_SNI_RM200_PCI is not set
6275 +# CONFIG_TANBAC_TB0226 is not set
6276 +# CONFIG_TANBAC_TB0229 is not set
6277 +# CONFIG_TOSHIBA_JMR3927 is not set
6278 +# CONFIG_TOSHIBA_RBTX4927 is not set
6279 +# CONFIG_VICTOR_MPC30X is not set
6280 +# CONFIG_ZAO_CAPCELLA is not set
6281 +# CONFIG_HIGHMEM is not set
6282 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
6283 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
6284 +# CONFIG_MIPS_AU1000 is not set
6285 +
6286 +#
6287 +# CPU selection
6288 +#
6289 +CONFIG_CPU_MIPS32=y
6290 +# CONFIG_CPU_MIPS64 is not set
6291 +# CONFIG_CPU_R3000 is not set
6292 +# CONFIG_CPU_TX39XX is not set
6293 +# CONFIG_CPU_VR41XX is not set
6294 +# CONFIG_CPU_R4300 is not set
6295 +# CONFIG_CPU_R4X00 is not set
6296 +# CONFIG_CPU_TX49XX is not set
6297 +# CONFIG_CPU_R5000 is not set
6298 +# CONFIG_CPU_R5432 is not set
6299 +# CONFIG_CPU_R6000 is not set
6300 +# CONFIG_CPU_NEVADA is not set
6301 +# CONFIG_CPU_R8000 is not set
6302 +# CONFIG_CPU_R10000 is not set
6303 +# CONFIG_CPU_RM7000 is not set
6304 +# CONFIG_CPU_RM9000 is not set
6305 +# CONFIG_CPU_SB1 is not set
6306 +CONFIG_PAGE_SIZE_4KB=y
6307 +# CONFIG_PAGE_SIZE_16KB is not set
6308 +# CONFIG_PAGE_SIZE_64KB is not set
6309 +CONFIG_CPU_HAS_PREFETCH=y
6310 +# CONFIG_VTAG_ICACHE is not set
6311 +CONFIG_64BIT_PHYS_ADDR=y
6312 +# CONFIG_CPU_ADVANCED is not set
6313 +CONFIG_CPU_HAS_LLSC=y
6314 +# CONFIG_CPU_HAS_LLDSCD is not set
6315 +# CONFIG_CPU_HAS_WB is not set
6316 +CONFIG_CPU_HAS_SYNC=y
6317 +
6318 +#
6319 +# General setup
6320 +#
6321 +CONFIG_CPU_LITTLE_ENDIAN=y
6322 +# CONFIG_BUILD_ELF64 is not set
6323 +CONFIG_NET=y
6324 +# CONFIG_PCI is not set
6325 +# CONFIG_PCI_NEW is not set
6326 +CONFIG_PCI_AUTO=y
6327 +# CONFIG_ISA is not set
6328 +# CONFIG_TC is not set
6329 +# CONFIG_MCA is not set
6330 +# CONFIG_SBUS is not set
6331 +# CONFIG_HOTPLUG is not set
6332 +# CONFIG_PCMCIA is not set
6333 +# CONFIG_HOTPLUG_PCI is not set
6334 +CONFIG_SYSVIPC=y
6335 +# CONFIG_BSD_PROCESS_ACCT is not set
6336 +CONFIG_SYSCTL=y
6337 +CONFIG_KCORE_ELF=y
6338 +# CONFIG_KCORE_AOUT is not set
6339 +# CONFIG_BINFMT_AOUT is not set
6340 +CONFIG_BINFMT_ELF=y
6341 +# CONFIG_MIPS32_COMPAT is not set
6342 +# CONFIG_MIPS32_O32 is not set
6343 +# CONFIG_MIPS32_N32 is not set
6344 +# CONFIG_BINFMT_ELF32 is not set
6345 +# CONFIG_BINFMT_MISC is not set
6346 +# CONFIG_OOM_KILLER is not set
6347 +CONFIG_CMDLINE_BOOL=y
6348 +CONFIG_CMDLINE="ide3=dma mem=96M root=/dev/hda2 rootflags=data=journal"
6349 +
6350 +#
6351 +# Memory Technology Devices (MTD)
6352 +#
6353 +# CONFIG_MTD is not set
6354 +
6355 +#
6356 +# Parallel port support
6357 +#
6358 +# CONFIG_PARPORT is not set
6359 +
6360 +#
6361 +# Plug and Play configuration
6362 +#
6363 +# CONFIG_PNP is not set
6364 +# CONFIG_ISAPNP is not set
6365 +
6366 +#
6367 +# Block devices
6368 +#
6369 +# CONFIG_BLK_DEV_FD is not set
6370 +# CONFIG_BLK_DEV_XD is not set
6371 +# CONFIG_PARIDE is not set
6372 +# CONFIG_BLK_CPQ_DA is not set
6373 +# CONFIG_BLK_CPQ_CISS_DA is not set
6374 +# CONFIG_CISS_SCSI_TAPE is not set
6375 +# CONFIG_CISS_MONITOR_THREAD is not set
6376 +# CONFIG_BLK_DEV_DAC960 is not set
6377 +# CONFIG_BLK_DEV_UMEM is not set
6378 +# CONFIG_BLK_DEV_SX8 is not set
6379 +CONFIG_BLK_DEV_LOOP=y
6380 +# CONFIG_BLK_DEV_NBD is not set
6381 +# CONFIG_BLK_DEV_RAM is not set
6382 +# CONFIG_BLK_DEV_INITRD is not set
6383 +# CONFIG_BLK_STATS is not set
6384 +
6385 +#
6386 +# Multi-device support (RAID and LVM)
6387 +#
6388 +# CONFIG_MD is not set
6389 +# CONFIG_BLK_DEV_MD is not set
6390 +# CONFIG_MD_LINEAR is not set
6391 +# CONFIG_MD_RAID0 is not set
6392 +# CONFIG_MD_RAID1 is not set
6393 +# CONFIG_MD_RAID5 is not set
6394 +# CONFIG_MD_MULTIPATH is not set
6395 +# CONFIG_BLK_DEV_LVM is not set
6396 +
6397 +#
6398 +# Networking options
6399 +#
6400 +CONFIG_PACKET=y
6401 +# CONFIG_PACKET_MMAP is not set
6402 +# CONFIG_NETLINK_DEV is not set
6403 +CONFIG_NETFILTER=y
6404 +# CONFIG_NETFILTER_DEBUG is not set
6405 +CONFIG_FILTER=y
6406 +CONFIG_UNIX=y
6407 +CONFIG_INET=y
6408 +CONFIG_IP_MULTICAST=y
6409 +# CONFIG_IP_ADVANCED_ROUTER is not set
6410 +# CONFIG_IP_PNP is not set
6411 +# CONFIG_NET_IPIP is not set
6412 +# CONFIG_NET_IPGRE is not set
6413 +# CONFIG_IP_MROUTE is not set
6414 +# CONFIG_ARPD is not set
6415 +# CONFIG_INET_ECN is not set
6416 +# CONFIG_SYN_COOKIES is not set
6417 +
6418 +#
6419 +# IP: Netfilter Configuration
6420 +#
6421 +# CONFIG_IP_NF_CONNTRACK is not set
6422 +# CONFIG_IP_NF_QUEUE is not set
6423 +# CONFIG_IP_NF_IPTABLES is not set
6424 +# CONFIG_IP_NF_ARPTABLES is not set
6425 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
6426 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
6427 +
6428 +#
6429 +# IP: Virtual Server Configuration
6430 +#
6431 +# CONFIG_IP_VS is not set
6432 +# CONFIG_IPV6 is not set
6433 +# CONFIG_KHTTPD is not set
6434 +
6435 +#
6436 +# SCTP Configuration (EXPERIMENTAL)
6437 +#
6438 +# CONFIG_IP_SCTP is not set
6439 +# CONFIG_ATM is not set
6440 +# CONFIG_VLAN_8021Q is not set
6441 +
6442 +#
6443 +#
6444 +#
6445 +# CONFIG_IPX is not set
6446 +# CONFIG_ATALK is not set
6447 +# CONFIG_DECNET is not set
6448 +# CONFIG_BRIDGE is not set
6449 +# CONFIG_X25 is not set
6450 +# CONFIG_LAPB is not set
6451 +# CONFIG_LLC is not set
6452 +# CONFIG_NET_DIVERT is not set
6453 +# CONFIG_ECONET is not set
6454 +# CONFIG_WAN_ROUTER is not set
6455 +# CONFIG_NET_FASTROUTE is not set
6456 +# CONFIG_NET_HW_FLOWCONTROL is not set
6457 +
6458 +#
6459 +# QoS and/or fair queueing
6460 +#
6461 +# CONFIG_NET_SCHED is not set
6462 +
6463 +#
6464 +# Network testing
6465 +#
6466 +# CONFIG_NET_PKTGEN is not set
6467 +
6468 +#
6469 +# Telephony Support
6470 +#
6471 +# CONFIG_PHONE is not set
6472 +# CONFIG_PHONE_IXJ is not set
6473 +# CONFIG_PHONE_IXJ_PCMCIA is not set
6474 +
6475 +#
6476 +# ATA/IDE/MFM/RLL support
6477 +#
6478 +CONFIG_IDE=y
6479 +
6480 +#
6481 +# IDE, ATA and ATAPI Block devices
6482 +#
6483 +CONFIG_BLK_DEV_IDE=y
6484 +
6485 +#
6486 +# Please see Documentation/ide.txt for help/info on IDE drives
6487 +#
6488 +CONFIG_BLK_DEV_HD_IDE=y
6489 +CONFIG_BLK_DEV_HD=y
6490 +# CONFIG_BLK_DEV_IDE_SATA is not set
6491 +CONFIG_BLK_DEV_IDEDISK=y
6492 +CONFIG_IDEDISK_MULTI_MODE=y
6493 +CONFIG_IDEDISK_STROKE=y
6494 +# CONFIG_BLK_DEV_IDECS is not set
6495 +# CONFIG_BLK_DEV_DELKIN is not set
6496 +# CONFIG_BLK_DEV_IDECD is not set
6497 +# CONFIG_BLK_DEV_IDETAPE is not set
6498 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
6499 +# CONFIG_BLK_DEV_IDESCSI is not set
6500 +# CONFIG_IDE_TASK_IOCTL is not set
6501 +
6502 +#
6503 +# IDE chipset support/bugfixes
6504 +#
6505 +# CONFIG_BLK_DEV_CMD640 is not set
6506 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
6507 +# CONFIG_BLK_DEV_ISAPNP is not set
6508 +# CONFIG_IDE_CHIPSETS is not set
6509 +# CONFIG_IDEDMA_AUTO is not set
6510 +# CONFIG_DMA_NONPCI is not set
6511 +# CONFIG_BLK_DEV_ATARAID is not set
6512 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
6513 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
6514 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
6515 +# CONFIG_BLK_DEV_ATARAID_SII is not set
6516 +
6517 +#
6518 +# SCSI support
6519 +#
6520 +CONFIG_SCSI=y
6521 +
6522 +#
6523 +# SCSI support type (disk, tape, CD-ROM)
6524 +#
6525 +CONFIG_BLK_DEV_SD=y
6526 +CONFIG_SD_EXTRA_DEVS=40
6527 +CONFIG_CHR_DEV_ST=y
6528 +# CONFIG_CHR_DEV_OSST is not set
6529 +CONFIG_BLK_DEV_SR=y
6530 +# CONFIG_BLK_DEV_SR_VENDOR is not set
6531 +CONFIG_SR_EXTRA_DEVS=2
6532 +# CONFIG_CHR_DEV_SG is not set
6533 +
6534 +#
6535 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
6536 +#
6537 +# CONFIG_SCSI_DEBUG_QUEUES is not set
6538 +# CONFIG_SCSI_MULTI_LUN is not set
6539 +CONFIG_SCSI_CONSTANTS=y
6540 +# CONFIG_SCSI_LOGGING is not set
6541 +
6542 +#
6543 +# SCSI low-level drivers
6544 +#
6545 +# CONFIG_SCSI_7000FASST is not set
6546 +# CONFIG_SCSI_ACARD is not set
6547 +# CONFIG_SCSI_AHA152X is not set
6548 +# CONFIG_SCSI_AHA1542 is not set
6549 +# CONFIG_SCSI_AHA1740 is not set
6550 +# CONFIG_SCSI_AACRAID is not set
6551 +# CONFIG_SCSI_AIC7XXX is not set
6552 +# CONFIG_SCSI_AIC79XX is not set
6553 +# CONFIG_SCSI_AIC7XXX_OLD is not set
6554 +# CONFIG_SCSI_DPT_I2O is not set
6555 +# CONFIG_SCSI_ADVANSYS is not set
6556 +# CONFIG_SCSI_IN2000 is not set
6557 +# CONFIG_SCSI_AM53C974 is not set
6558 +# CONFIG_SCSI_MEGARAID is not set
6559 +# CONFIG_SCSI_MEGARAID2 is not set
6560 +# CONFIG_SCSI_SATA is not set
6561 +# CONFIG_SCSI_SATA_AHCI is not set
6562 +# CONFIG_SCSI_SATA_SVW is not set
6563 +# CONFIG_SCSI_ATA_PIIX is not set
6564 +# CONFIG_SCSI_SATA_NV is not set
6565 +# CONFIG_SCSI_SATA_QSTOR is not set
6566 +# CONFIG_SCSI_SATA_PROMISE is not set
6567 +# CONFIG_SCSI_SATA_SX4 is not set
6568 +# CONFIG_SCSI_SATA_SIL is not set
6569 +# CONFIG_SCSI_SATA_SIS is not set
6570 +# CONFIG_SCSI_SATA_ULI is not set
6571 +# CONFIG_SCSI_SATA_VIA is not set
6572 +# CONFIG_SCSI_SATA_VITESSE is not set
6573 +# CONFIG_SCSI_BUSLOGIC is not set
6574 +# CONFIG_SCSI_DMX3191D is not set
6575 +# CONFIG_SCSI_DTC3280 is not set
6576 +# CONFIG_SCSI_EATA is not set
6577 +# CONFIG_SCSI_EATA_DMA is not set
6578 +# CONFIG_SCSI_EATA_PIO is not set
6579 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
6580 +# CONFIG_SCSI_GDTH is not set
6581 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
6582 +# CONFIG_SCSI_INITIO is not set
6583 +# CONFIG_SCSI_INIA100 is not set
6584 +# CONFIG_SCSI_NCR53C406A is not set
6585 +# CONFIG_SCSI_NCR53C7xx is not set
6586 +# CONFIG_SCSI_PAS16 is not set
6587 +# CONFIG_SCSI_PCI2000 is not set
6588 +# CONFIG_SCSI_PCI2220I is not set
6589 +# CONFIG_SCSI_PSI240I is not set
6590 +# CONFIG_SCSI_QLOGIC_FAS is not set
6591 +# CONFIG_SCSI_SIM710 is not set
6592 +# CONFIG_SCSI_SYM53C416 is not set
6593 +# CONFIG_SCSI_T128 is not set
6594 +# CONFIG_SCSI_U14_34F is not set
6595 +# CONFIG_SCSI_NSP32 is not set
6596 +# CONFIG_SCSI_DEBUG is not set
6597 +
6598 +#
6599 +# Fusion MPT device support
6600 +#
6601 +# CONFIG_FUSION is not set
6602 +# CONFIG_FUSION_BOOT is not set
6603 +# CONFIG_FUSION_ISENSE is not set
6604 +# CONFIG_FUSION_CTL is not set
6605 +# CONFIG_FUSION_LAN is not set
6606 +
6607 +#
6608 +# Network device support
6609 +#
6610 +CONFIG_NETDEVICES=y
6611 +
6612 +#
6613 +# ARCnet devices
6614 +#
6615 +# CONFIG_ARCNET is not set
6616 +# CONFIG_DUMMY is not set
6617 +# CONFIG_BONDING is not set
6618 +# CONFIG_EQUALIZER is not set
6619 +# CONFIG_TUN is not set
6620 +# CONFIG_ETHERTAP is not set
6621 +
6622 +#
6623 +# Ethernet (10 or 100Mbit)
6624 +#
6625 +CONFIG_NET_ETHERNET=y
6626 +# CONFIG_SUNLANCE is not set
6627 +# CONFIG_SUNBMAC is not set
6628 +# CONFIG_SUNQE is not set
6629 +# CONFIG_SUNGEM is not set
6630 +# CONFIG_NET_VENDOR_3COM is not set
6631 +# CONFIG_LANCE is not set
6632 +# CONFIG_NET_VENDOR_SMC is not set
6633 +# CONFIG_NET_VENDOR_RACAL is not set
6634 +# CONFIG_NET_ISA is not set
6635 +# CONFIG_NET_PCI is not set
6636 +# CONFIG_NET_POCKET is not set
6637 +
6638 +#
6639 +# Ethernet (1000 Mbit)
6640 +#
6641 +# CONFIG_ACENIC is not set
6642 +# CONFIG_DL2K is not set
6643 +# CONFIG_E1000 is not set
6644 +# CONFIG_MYRI_SBUS is not set
6645 +# CONFIG_NS83820 is not set
6646 +# CONFIG_HAMACHI is not set
6647 +# CONFIG_YELLOWFIN is not set
6648 +# CONFIG_R8169 is not set
6649 +# CONFIG_SK98LIN is not set
6650 +# CONFIG_TIGON3 is not set
6651 +# CONFIG_FDDI is not set
6652 +# CONFIG_HIPPI is not set
6653 +# CONFIG_PLIP is not set
6654 +# CONFIG_PPP is not set
6655 +# CONFIG_SLIP is not set
6656 +
6657 +#
6658 +# Wireless LAN (non-hamradio)
6659 +#
6660 +# CONFIG_NET_RADIO is not set
6661 +
6662 +#
6663 +# Token Ring devices
6664 +#
6665 +# CONFIG_TR is not set
6666 +# CONFIG_NET_FC is not set
6667 +# CONFIG_RCPCI is not set
6668 +# CONFIG_SHAPER is not set
6669 +
6670 +#
6671 +# Wan interfaces
6672 +#
6673 +# CONFIG_WAN is not set
6674 +
6675 +#
6676 +# Amateur Radio support
6677 +#
6678 +# CONFIG_HAMRADIO is not set
6679 +
6680 +#
6681 +# IrDA (infrared) support
6682 +#
6683 +# CONFIG_IRDA is not set
6684 +
6685 +#
6686 +# ISDN subsystem
6687 +#
6688 +# CONFIG_ISDN is not set
6689 +
6690 +#
6691 +# Input core support
6692 +#
6693 +CONFIG_INPUT=y
6694 +CONFIG_INPUT_KEYBDEV=y
6695 +CONFIG_INPUT_MOUSEDEV=y
6696 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
6697 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
6698 +# CONFIG_INPUT_JOYDEV is not set
6699 +CONFIG_INPUT_EVDEV=y
6700 +# CONFIG_INPUT_UINPUT is not set
6701 +
6702 +#
6703 +# Character devices
6704 +#
6705 +CONFIG_VT=y
6706 +CONFIG_VT_CONSOLE=y
6707 +# CONFIG_SERIAL is not set
6708 +# CONFIG_SERIAL_EXTENDED is not set
6709 +CONFIG_SERIAL_NONSTANDARD=y
6710 +# CONFIG_COMPUTONE is not set
6711 +# CONFIG_ROCKETPORT is not set
6712 +# CONFIG_CYCLADES is not set
6713 +# CONFIG_DIGIEPCA is not set
6714 +# CONFIG_DIGI is not set
6715 +# CONFIG_ESPSERIAL is not set
6716 +# CONFIG_MOXA_INTELLIO is not set
6717 +# CONFIG_MOXA_SMARTIO is not set
6718 +# CONFIG_ISI is not set
6719 +# CONFIG_SYNCLINK is not set
6720 +# CONFIG_SYNCLINKMP is not set
6721 +# CONFIG_N_HDLC is not set
6722 +# CONFIG_RISCOM8 is not set
6723 +# CONFIG_SPECIALIX is not set
6724 +# CONFIG_SX is not set
6725 +# CONFIG_RIO is not set
6726 +# CONFIG_STALDRV is not set
6727 +# CONFIG_SERIAL_TX3912 is not set
6728 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
6729 +# CONFIG_SERIAL_TXX9 is not set
6730 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
6731 +# CONFIG_TXX927_SERIAL is not set
6732 +CONFIG_UNIX98_PTYS=y
6733 +CONFIG_UNIX98_PTY_COUNT=256
6734 +
6735 +#
6736 +# I2C support
6737 +#
6738 +CONFIG_I2C=y
6739 +# CONFIG_I2C_ALGOBIT is not set
6740 +# CONFIG_SCx200_ACB is not set
6741 +# CONFIG_I2C_ALGOPCF is not set
6742 +# CONFIG_I2C_CHARDEV is not set
6743 +# CONFIG_I2C_PROC is not set
6744 +
6745 +#
6746 +# Mice
6747 +#
6748 +# CONFIG_BUSMOUSE is not set
6749 +# CONFIG_MOUSE is not set
6750 +
6751 +#
6752 +# Joysticks
6753 +#
6754 +# CONFIG_INPUT_GAMEPORT is not set
6755 +# CONFIG_INPUT_NS558 is not set
6756 +# CONFIG_INPUT_LIGHTNING is not set
6757 +# CONFIG_INPUT_PCIGAME is not set
6758 +# CONFIG_INPUT_CS461X is not set
6759 +# CONFIG_INPUT_EMU10K1 is not set
6760 +# CONFIG_INPUT_SERIO is not set
6761 +# CONFIG_INPUT_SERPORT is not set
6762 +
6763 +#
6764 +# Joysticks
6765 +#
6766 +# CONFIG_INPUT_ANALOG is not set
6767 +# CONFIG_INPUT_A3D is not set
6768 +# CONFIG_INPUT_ADI is not set
6769 +# CONFIG_INPUT_COBRA is not set
6770 +# CONFIG_INPUT_GF2K is not set
6771 +# CONFIG_INPUT_GRIP is not set
6772 +# CONFIG_INPUT_INTERACT is not set
6773 +# CONFIG_INPUT_TMDC is not set
6774 +# CONFIG_INPUT_SIDEWINDER is not set
6775 +# CONFIG_INPUT_IFORCE_USB is not set
6776 +# CONFIG_INPUT_IFORCE_232 is not set
6777 +# CONFIG_INPUT_WARRIOR is not set
6778 +# CONFIG_INPUT_MAGELLAN is not set
6779 +# CONFIG_INPUT_SPACEORB is not set
6780 +# CONFIG_INPUT_SPACEBALL is not set
6781 +# CONFIG_INPUT_STINGER is not set
6782 +# CONFIG_INPUT_DB9 is not set
6783 +# CONFIG_INPUT_GAMECON is not set
6784 +# CONFIG_INPUT_TURBOGRAFX is not set
6785 +# CONFIG_QIC02_TAPE is not set
6786 +# CONFIG_IPMI_HANDLER is not set
6787 +# CONFIG_IPMI_PANIC_EVENT is not set
6788 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
6789 +# CONFIG_IPMI_KCS is not set
6790 +# CONFIG_IPMI_WATCHDOG is not set
6791 +
6792 +#
6793 +# Watchdog Cards
6794 +#
6795 +# CONFIG_WATCHDOG is not set
6796 +# CONFIG_SCx200 is not set
6797 +# CONFIG_SCx200_GPIO is not set
6798 +# CONFIG_AMD_PM768 is not set
6799 +# CONFIG_NVRAM is not set
6800 +# CONFIG_RTC is not set
6801 +# CONFIG_DTLK is not set
6802 +# CONFIG_R3964 is not set
6803 +# CONFIG_APPLICOM is not set
6804 +
6805 +#
6806 +# Ftape, the floppy tape device driver
6807 +#
6808 +# CONFIG_FTAPE is not set
6809 +# CONFIG_AGP is not set
6810 +
6811 +#
6812 +# Direct Rendering Manager (XFree86 DRI support)
6813 +#
6814 +# CONFIG_DRM is not set
6815 +
6816 +#
6817 +# File systems
6818 +#
6819 +# CONFIG_QUOTA is not set
6820 +# CONFIG_QFMT_V2 is not set
6821 +CONFIG_AUTOFS_FS=y
6822 +# CONFIG_AUTOFS4_FS is not set
6823 +# CONFIG_REISERFS_FS is not set
6824 +# CONFIG_REISERFS_CHECK is not set
6825 +# CONFIG_REISERFS_PROC_INFO is not set
6826 +# CONFIG_ADFS_FS is not set
6827 +# CONFIG_ADFS_FS_RW is not set
6828 +# CONFIG_AFFS_FS is not set
6829 +# CONFIG_HFS_FS is not set
6830 +# CONFIG_HFSPLUS_FS is not set
6831 +# CONFIG_BEFS_FS is not set
6832 +# CONFIG_BEFS_DEBUG is not set
6833 +# CONFIG_BFS_FS is not set
6834 +CONFIG_EXT3_FS=y
6835 +CONFIG_JBD=y
6836 +# CONFIG_JBD_DEBUG is not set
6837 +CONFIG_FAT_FS=y
6838 +CONFIG_MSDOS_FS=y
6839 +# CONFIG_UMSDOS_FS is not set
6840 +CONFIG_VFAT_FS=y
6841 +# CONFIG_EFS_FS is not set
6842 +# CONFIG_JFFS_FS is not set
6843 +# CONFIG_JFFS2_FS is not set
6844 +# CONFIG_CRAMFS is not set
6845 +# CONFIG_TMPFS is not set
6846 +CONFIG_RAMFS=y
6847 +# CONFIG_ISO9660_FS is not set
6848 +# CONFIG_JOLIET is not set
6849 +# CONFIG_ZISOFS is not set
6850 +# CONFIG_JFS_FS is not set
6851 +# CONFIG_JFS_DEBUG is not set
6852 +# CONFIG_JFS_STATISTICS is not set
6853 +# CONFIG_MINIX_FS is not set
6854 +# CONFIG_VXFS_FS is not set
6855 +# CONFIG_NTFS_FS is not set
6856 +# CONFIG_NTFS_RW is not set
6857 +# CONFIG_HPFS_FS is not set
6858 +CONFIG_PROC_FS=y
6859 +# CONFIG_DEVFS_FS is not set
6860 +# CONFIG_DEVFS_MOUNT is not set
6861 +# CONFIG_DEVFS_DEBUG is not set
6862 +CONFIG_DEVPTS_FS=y
6863 +# CONFIG_QNX4FS_FS is not set
6864 +# CONFIG_QNX4FS_RW is not set
6865 +# CONFIG_ROMFS_FS is not set
6866 +CONFIG_EXT2_FS=y
6867 +# CONFIG_SYSV_FS is not set
6868 +# CONFIG_UDF_FS is not set
6869 +# CONFIG_UDF_RW is not set
6870 +# CONFIG_UFS_FS is not set
6871 +# CONFIG_UFS_FS_WRITE is not set
6872 +# CONFIG_XFS_FS is not set
6873 +# CONFIG_XFS_QUOTA is not set
6874 +# CONFIG_XFS_RT is not set
6875 +# CONFIG_XFS_TRACE is not set
6876 +# CONFIG_XFS_DEBUG is not set
6877 +
6878 +#
6879 +# Network File Systems
6880 +#
6881 +# CONFIG_CODA_FS is not set
6882 +# CONFIG_INTERMEZZO_FS is not set
6883 +# CONFIG_NFS_FS is not set
6884 +# CONFIG_NFS_V3 is not set
6885 +# CONFIG_NFS_DIRECTIO is not set
6886 +# CONFIG_ROOT_NFS is not set
6887 +# CONFIG_NFSD is not set
6888 +# CONFIG_NFSD_V3 is not set
6889 +# CONFIG_NFSD_TCP is not set
6890 +# CONFIG_SUNRPC is not set
6891 +# CONFIG_LOCKD is not set
6892 +# CONFIG_SMB_FS is not set
6893 +# CONFIG_NCP_FS is not set
6894 +# CONFIG_NCPFS_PACKET_SIGNING is not set
6895 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
6896 +# CONFIG_NCPFS_STRONG is not set
6897 +# CONFIG_NCPFS_NFS_NS is not set
6898 +# CONFIG_NCPFS_OS2_NS is not set
6899 +# CONFIG_NCPFS_SMALLDOS is not set
6900 +# CONFIG_NCPFS_NLS is not set
6901 +# CONFIG_NCPFS_EXTRAS is not set
6902 +# CONFIG_ZISOFS_FS is not set
6903 +
6904 +#
6905 +# Partition Types
6906 +#
6907 +# CONFIG_PARTITION_ADVANCED is not set
6908 +CONFIG_MSDOS_PARTITION=y
6909 +# CONFIG_SMB_NLS is not set
6910 +CONFIG_NLS=y
6911 +
6912 +#
6913 +# Native Language Support
6914 +#
6915 +CONFIG_NLS_DEFAULT="iso8859-1"
6916 +# CONFIG_NLS_CODEPAGE_437 is not set
6917 +# CONFIG_NLS_CODEPAGE_737 is not set
6918 +# CONFIG_NLS_CODEPAGE_775 is not set
6919 +# CONFIG_NLS_CODEPAGE_850 is not set
6920 +# CONFIG_NLS_CODEPAGE_852 is not set
6921 +# CONFIG_NLS_CODEPAGE_855 is not set
6922 +# CONFIG_NLS_CODEPAGE_857 is not set
6923 +# CONFIG_NLS_CODEPAGE_860 is not set
6924 +# CONFIG_NLS_CODEPAGE_861 is not set
6925 +# CONFIG_NLS_CODEPAGE_862 is not set
6926 +# CONFIG_NLS_CODEPAGE_863 is not set
6927 +# CONFIG_NLS_CODEPAGE_864 is not set
6928 +# CONFIG_NLS_CODEPAGE_865 is not set
6929 +# CONFIG_NLS_CODEPAGE_866 is not set
6930 +# CONFIG_NLS_CODEPAGE_869 is not set
6931 +# CONFIG_NLS_CODEPAGE_936 is not set
6932 +# CONFIG_NLS_CODEPAGE_950 is not set
6933 +# CONFIG_NLS_CODEPAGE_932 is not set
6934 +# CONFIG_NLS_CODEPAGE_949 is not set
6935 +# CONFIG_NLS_CODEPAGE_874 is not set
6936 +# CONFIG_NLS_ISO8859_8 is not set
6937 +# CONFIG_NLS_CODEPAGE_1250 is not set
6938 +# CONFIG_NLS_CODEPAGE_1251 is not set
6939 +# CONFIG_NLS_ISO8859_1 is not set
6940 +# CONFIG_NLS_ISO8859_2 is not set
6941 +# CONFIG_NLS_ISO8859_3 is not set
6942 +# CONFIG_NLS_ISO8859_4 is not set
6943 +# CONFIG_NLS_ISO8859_5 is not set
6944 +# CONFIG_NLS_ISO8859_6 is not set
6945 +# CONFIG_NLS_ISO8859_7 is not set
6946 +# CONFIG_NLS_ISO8859_9 is not set
6947 +# CONFIG_NLS_ISO8859_13 is not set
6948 +# CONFIG_NLS_ISO8859_14 is not set
6949 +# CONFIG_NLS_ISO8859_15 is not set
6950 +# CONFIG_NLS_KOI8_R is not set
6951 +# CONFIG_NLS_KOI8_U is not set
6952 +# CONFIG_NLS_UTF8 is not set
6953 +
6954 +#
6955 +# Multimedia devices
6956 +#
6957 +# CONFIG_VIDEO_DEV is not set
6958 +
6959 +#
6960 +# Console drivers
6961 +#
6962 +# CONFIG_VGA_CONSOLE is not set
6963 +# CONFIG_MDA_CONSOLE is not set
6964 +
6965 +#
6966 +# Frame-buffer support
6967 +#
6968 +CONFIG_FB=y
6969 +CONFIG_DUMMY_CONSOLE=y
6970 +# CONFIG_FB_CYBER2000 is not set
6971 +# CONFIG_FB_VIRTUAL is not set
6972 +CONFIG_FBCON_ADVANCED=y
6973 +# CONFIG_FBCON_MFB is not set
6974 +# CONFIG_FBCON_CFB2 is not set
6975 +# CONFIG_FBCON_CFB4 is not set
6976 +# CONFIG_FBCON_CFB8 is not set
6977 +CONFIG_FBCON_CFB16=y
6978 +# CONFIG_FBCON_CFB24 is not set
6979 +# CONFIG_FBCON_CFB32 is not set
6980 +# CONFIG_FBCON_AFB is not set
6981 +# CONFIG_FBCON_ILBM is not set
6982 +# CONFIG_FBCON_IPLAN2P2 is not set
6983 +# CONFIG_FBCON_IPLAN2P4 is not set
6984 +# CONFIG_FBCON_IPLAN2P8 is not set
6985 +# CONFIG_FBCON_MAC is not set
6986 +# CONFIG_FBCON_VGA_PLANES is not set
6987 +# CONFIG_FBCON_VGA is not set
6988 +# CONFIG_FBCON_HGA is not set
6989 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
6990 +CONFIG_FBCON_FONTS=y
6991 +CONFIG_FONT_8x8=y
6992 +CONFIG_FONT_8x16=y
6993 +# CONFIG_FONT_SUN8x16 is not set
6994 +# CONFIG_FONT_SUN12x22 is not set
6995 +# CONFIG_FONT_6x11 is not set
6996 +# CONFIG_FONT_PEARL_8x8 is not set
6997 +# CONFIG_FONT_ACORN_8x8 is not set
6998 +
6999 +#
7000 +# Sound
7001 +#
7002 +CONFIG_SOUND=y
7003 +# CONFIG_SOUND_ALI5455 is not set
7004 +# CONFIG_SOUND_BT878 is not set
7005 +# CONFIG_SOUND_CMPCI is not set
7006 +# CONFIG_SOUND_EMU10K1 is not set
7007 +# CONFIG_MIDI_EMU10K1 is not set
7008 +# CONFIG_SOUND_FUSION is not set
7009 +# CONFIG_SOUND_CS4281 is not set
7010 +# CONFIG_SOUND_ES1370 is not set
7011 +# CONFIG_SOUND_ES1371 is not set
7012 +# CONFIG_SOUND_ESSSOLO1 is not set
7013 +# CONFIG_SOUND_MAESTRO is not set
7014 +# CONFIG_SOUND_MAESTRO3 is not set
7015 +# CONFIG_SOUND_FORTE is not set
7016 +# CONFIG_SOUND_ICH is not set
7017 +# CONFIG_SOUND_RME96XX is not set
7018 +# CONFIG_SOUND_SONICVIBES is not set
7019 +# CONFIG_SOUND_TRIDENT is not set
7020 +# CONFIG_SOUND_MSNDCLAS is not set
7021 +# CONFIG_SOUND_MSNDPIN is not set
7022 +# CONFIG_SOUND_VIA82CXXX is not set
7023 +# CONFIG_MIDI_VIA82CXXX is not set
7024 +# CONFIG_SOUND_OSS is not set
7025 +# CONFIG_SOUND_TVMIXER is not set
7026 +# CONFIG_SOUND_AD1980 is not set
7027 +# CONFIG_SOUND_WM97XX is not set
7028 +
7029 +#
7030 +# USB support
7031 +#
7032 +# CONFIG_USB is not set
7033 +
7034 +#
7035 +# Support for USB gadgets
7036 +#
7037 +# CONFIG_USB_GADGET is not set
7038 +
7039 +#
7040 +# Bluetooth support
7041 +#
7042 +# CONFIG_BLUEZ is not set
7043 +
7044 +#
7045 +# Kernel hacking
7046 +#
7047 +CONFIG_CROSSCOMPILE=y
7048 +# CONFIG_RUNTIME_DEBUG is not set
7049 +# CONFIG_KGDB is not set
7050 +# CONFIG_GDB_CONSOLE is not set
7051 +# CONFIG_DEBUG_INFO is not set
7052 +# CONFIG_MAGIC_SYSRQ is not set
7053 +# CONFIG_MIPS_UNCACHED is not set
7054 +CONFIG_LOG_BUF_SHIFT=0
7055 +
7056 +#
7057 +# Cryptographic options
7058 +#
7059 +# CONFIG_CRYPTO is not set
7060 +
7061 +#
7062 +# Library routines
7063 +#
7064 +# CONFIG_CRC32 is not set
7065 +CONFIG_ZLIB_INFLATE=m
7066 +CONFIG_ZLIB_DEFLATE=m
7067 Index: linux-2.4.35.4/arch/mips/defconfig-hp-lj
7068 ===================================================================
7069 --- linux-2.4.35.4.orig/arch/mips/defconfig-hp-lj 2007-12-15 05:19:43.274887133 +0100
7070 +++ linux-2.4.35.4/arch/mips/defconfig-hp-lj 2007-12-15 05:19:44.834976038 +0100
7071 @@ -30,8 +30,8 @@
7072 # CONFIG_MIPS_PB1000 is not set
7073 # CONFIG_MIPS_PB1100 is not set
7074 # CONFIG_MIPS_PB1500 is not set
7075 -# CONFIG_MIPS_HYDROGEN3 is not set
7076 # CONFIG_MIPS_PB1550 is not set
7077 +# CONFIG_MIPS_HYDROGEN3 is not set
7078 # CONFIG_MIPS_XXS1500 is not set
7079 # CONFIG_MIPS_MTX1 is not set
7080 # CONFIG_COGENT_CSB250 is not set
7081 @@ -184,8 +184,8 @@
7082 # Mapping drivers for chip access
7083 #
7084 CONFIG_MTD_PHYSMAP=y
7085 -CONFIG_MTD_PHYSMAP_START=10040000
7086 -CONFIG_MTD_PHYSMAP_LEN=00fc0000
7087 +CONFIG_MTD_PHYSMAP_START=0x10040000
7088 +CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
7089 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
7090 # CONFIG_MTD_PB1000 is not set
7091 # CONFIG_MTD_PB1500 is not set
7092 @@ -193,9 +193,7 @@
7093 # CONFIG_MTD_BOSPORUS is not set
7094 # CONFIG_MTD_XXS1500 is not set
7095 # CONFIG_MTD_MTX1 is not set
7096 -# CONFIG_MTD_DB1X00 is not set
7097 # CONFIG_MTD_PB1550 is not set
7098 -# CONFIG_MTD_HYDROGEN3 is not set
7099 # CONFIG_MTD_MIRAGE is not set
7100 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7101 # CONFIG_MTD_OCELOT is not set
7102 @@ -214,7 +212,6 @@
7103 #
7104 # Disk-On-Chip Device Drivers
7105 #
7106 -# CONFIG_MTD_DOC1000 is not set
7107 # CONFIG_MTD_DOC2000 is not set
7108 # CONFIG_MTD_DOC2001 is not set
7109 # CONFIG_MTD_DOCPROBE is not set
7110 @@ -304,11 +301,6 @@
7111 #
7112 # CONFIG_IPX is not set
7113 # CONFIG_ATALK is not set
7114 -
7115 -#
7116 -# Appletalk devices
7117 -#
7118 -# CONFIG_DEV_APPLETALK is not set
7119 # CONFIG_DECNET is not set
7120 # CONFIG_BRIDGE is not set
7121 # CONFIG_X25 is not set
7122 @@ -604,7 +596,6 @@
7123 CONFIG_SERIAL_CONSOLE=y
7124 # CONFIG_SERIAL_EXTENDED is not set
7125 # CONFIG_SERIAL_NONSTANDARD is not set
7126 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7127 # CONFIG_UNIX98_PTYS is not set
7128
7129 #
7130 Index: linux-2.4.35.4/arch/mips/defconfig-hydrogen3
7131 ===================================================================
7132 --- linux-2.4.35.4.orig/arch/mips/defconfig-hydrogen3 2007-12-15 05:19:43.282887589 +0100
7133 +++ linux-2.4.35.4/arch/mips/defconfig-hydrogen3 2007-12-15 05:19:44.834976038 +0100
7134 @@ -30,8 +30,8 @@
7135 # CONFIG_MIPS_PB1000 is not set
7136 # CONFIG_MIPS_PB1100 is not set
7137 # CONFIG_MIPS_PB1500 is not set
7138 -CONFIG_MIPS_HYDROGEN3=y
7139 # CONFIG_MIPS_PB1550 is not set
7140 +CONFIG_MIPS_HYDROGEN3=y
7141 # CONFIG_MIPS_XXS1500 is not set
7142 # CONFIG_MIPS_MTX1 is not set
7143 # CONFIG_COGENT_CSB250 is not set
7144 @@ -214,9 +214,7 @@
7145 # CONFIG_MTD_BOSPORUS is not set
7146 # CONFIG_MTD_XXS1500 is not set
7147 # CONFIG_MTD_MTX1 is not set
7148 -# CONFIG_MTD_DB1X00 is not set
7149 # CONFIG_MTD_PB1550 is not set
7150 -CONFIG_MTD_HYDROGEN3=y
7151 # CONFIG_MTD_MIRAGE is not set
7152 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7153 # CONFIG_MTD_OCELOT is not set
7154 @@ -235,7 +233,6 @@
7155 #
7156 # Disk-On-Chip Device Drivers
7157 #
7158 -# CONFIG_MTD_DOC1000 is not set
7159 # CONFIG_MTD_DOC2000 is not set
7160 # CONFIG_MTD_DOC2001 is not set
7161 # CONFIG_MTD_DOCPROBE is not set
7162 @@ -340,11 +337,6 @@
7163 #
7164 # CONFIG_IPX is not set
7165 # CONFIG_ATALK is not set
7166 -
7167 -#
7168 -# Appletalk devices
7169 -#
7170 -# CONFIG_DEV_APPLETALK is not set
7171 # CONFIG_DECNET is not set
7172 # CONFIG_BRIDGE is not set
7173 # CONFIG_X25 is not set
7174 @@ -590,7 +582,6 @@
7175 # CONFIG_AU1X00_USB_TTY is not set
7176 # CONFIG_AU1X00_USB_RAW is not set
7177 # CONFIG_TXX927_SERIAL is not set
7178 -CONFIG_MIPS_HYDROGEN3_BUTTONS=y
7179 CONFIG_UNIX98_PTYS=y
7180 CONFIG_UNIX98_PTY_COUNT=256
7181
7182 @@ -838,6 +829,7 @@
7183 # CONFIG_FB_PM2 is not set
7184 # CONFIG_FB_PM3 is not set
7185 # CONFIG_FB_CYBER2000 is not set
7186 +CONFIG_FB_AU1100=y
7187 # CONFIG_FB_MATROX is not set
7188 # CONFIG_FB_ATY is not set
7189 # CONFIG_FB_RADEON is not set
7190 @@ -849,7 +841,6 @@
7191 # CONFIG_FB_VOODOO1 is not set
7192 # CONFIG_FB_TRIDENT is not set
7193 # CONFIG_FB_E1356 is not set
7194 -CONFIG_FB_AU1100=y
7195 # CONFIG_FB_IT8181 is not set
7196 # CONFIG_FB_VIRTUAL is not set
7197 CONFIG_FBCON_ADVANCED=y
7198 Index: linux-2.4.35.4/arch/mips/defconfig-ip22
7199 ===================================================================
7200 --- linux-2.4.35.4.orig/arch/mips/defconfig-ip22 2007-12-15 05:19:43.290888044 +0100
7201 +++ linux-2.4.35.4/arch/mips/defconfig-ip22 2007-12-15 05:19:44.834976038 +0100
7202 @@ -30,8 +30,8 @@
7203 # CONFIG_MIPS_PB1000 is not set
7204 # CONFIG_MIPS_PB1100 is not set
7205 # CONFIG_MIPS_PB1500 is not set
7206 -# CONFIG_MIPS_HYDROGEN3 is not set
7207 # CONFIG_MIPS_PB1550 is not set
7208 +# CONFIG_MIPS_HYDROGEN3 is not set
7209 # CONFIG_MIPS_XXS1500 is not set
7210 # CONFIG_MIPS_MTX1 is not set
7211 # CONFIG_COGENT_CSB250 is not set
7212 @@ -235,11 +235,6 @@
7213 #
7214 # CONFIG_IPX is not set
7215 # CONFIG_ATALK is not set
7216 -
7217 -#
7218 -# Appletalk devices
7219 -#
7220 -# CONFIG_DEV_APPLETALK is not set
7221 # CONFIG_DECNET is not set
7222 # CONFIG_BRIDGE is not set
7223 # CONFIG_X25 is not set
7224 @@ -319,9 +314,11 @@
7225 # CONFIG_SCSI_MEGARAID is not set
7226 # CONFIG_SCSI_MEGARAID2 is not set
7227 # CONFIG_SCSI_SATA is not set
7228 +# CONFIG_SCSI_SATA_AHCI is not set
7229 # CONFIG_SCSI_SATA_SVW is not set
7230 # CONFIG_SCSI_ATA_PIIX is not set
7231 # CONFIG_SCSI_SATA_NV is not set
7232 +# CONFIG_SCSI_SATA_QSTOR is not set
7233 # CONFIG_SCSI_SATA_PROMISE is not set
7234 # CONFIG_SCSI_SATA_SX4 is not set
7235 # CONFIG_SCSI_SATA_SIL is not set
7236 @@ -465,7 +462,6 @@
7237 # CONFIG_SERIAL is not set
7238 # CONFIG_SERIAL_EXTENDED is not set
7239 # CONFIG_SERIAL_NONSTANDARD is not set
7240 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7241 CONFIG_UNIX98_PTYS=y
7242 CONFIG_UNIX98_PTY_COUNT=256
7243
7244 Index: linux-2.4.35.4/arch/mips/defconfig-it8172
7245 ===================================================================
7246 --- linux-2.4.35.4.orig/arch/mips/defconfig-it8172 2007-12-15 05:19:43.294888273 +0100
7247 +++ linux-2.4.35.4/arch/mips/defconfig-it8172 2007-12-15 05:19:44.838976267 +0100
7248 @@ -30,8 +30,8 @@
7249 # CONFIG_MIPS_PB1000 is not set
7250 # CONFIG_MIPS_PB1100 is not set
7251 # CONFIG_MIPS_PB1500 is not set
7252 -# CONFIG_MIPS_HYDROGEN3 is not set
7253 # CONFIG_MIPS_PB1550 is not set
7254 +# CONFIG_MIPS_HYDROGEN3 is not set
7255 # CONFIG_MIPS_XXS1500 is not set
7256 # CONFIG_MIPS_MTX1 is not set
7257 # CONFIG_COGENT_CSB250 is not set
7258 @@ -186,8 +186,8 @@
7259 # Mapping drivers for chip access
7260 #
7261 CONFIG_MTD_PHYSMAP=y
7262 -CONFIG_MTD_PHYSMAP_START=8000000
7263 -CONFIG_MTD_PHYSMAP_LEN=2000000
7264 +CONFIG_MTD_PHYSMAP_START=0x8000000
7265 +CONFIG_MTD_PHYSMAP_LEN=0x2000000
7266 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
7267 # CONFIG_MTD_PB1000 is not set
7268 # CONFIG_MTD_PB1500 is not set
7269 @@ -195,9 +195,7 @@
7270 # CONFIG_MTD_BOSPORUS is not set
7271 # CONFIG_MTD_XXS1500 is not set
7272 # CONFIG_MTD_MTX1 is not set
7273 -# CONFIG_MTD_DB1X00 is not set
7274 # CONFIG_MTD_PB1550 is not set
7275 -# CONFIG_MTD_HYDROGEN3 is not set
7276 # CONFIG_MTD_MIRAGE is not set
7277 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7278 # CONFIG_MTD_OCELOT is not set
7279 @@ -216,7 +214,6 @@
7280 #
7281 # Disk-On-Chip Device Drivers
7282 #
7283 -# CONFIG_MTD_DOC1000 is not set
7284 # CONFIG_MTD_DOC2000 is not set
7285 # CONFIG_MTD_DOC2001 is not set
7286 # CONFIG_MTD_DOCPROBE is not set
7287 @@ -304,11 +301,6 @@
7288 #
7289 # CONFIG_IPX is not set
7290 # CONFIG_ATALK is not set
7291 -
7292 -#
7293 -# Appletalk devices
7294 -#
7295 -# CONFIG_DEV_APPLETALK is not set
7296 # CONFIG_DECNET is not set
7297 # CONFIG_BRIDGE is not set
7298 # CONFIG_X25 is not set
7299 @@ -592,7 +584,6 @@
7300 CONFIG_PC_KEYB=y
7301 # CONFIG_IT8172_SCR0 is not set
7302 # CONFIG_IT8172_SCR1 is not set
7303 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7304 CONFIG_UNIX98_PTYS=y
7305 CONFIG_UNIX98_PTY_COUNT=256
7306
7307 Index: linux-2.4.35.4/arch/mips/defconfig-ivr
7308 ===================================================================
7309 --- linux-2.4.35.4.orig/arch/mips/defconfig-ivr 2007-12-15 05:19:43.302888729 +0100
7310 +++ linux-2.4.35.4/arch/mips/defconfig-ivr 2007-12-15 05:19:44.838976267 +0100
7311 @@ -30,8 +30,8 @@
7312 # CONFIG_MIPS_PB1000 is not set
7313 # CONFIG_MIPS_PB1100 is not set
7314 # CONFIG_MIPS_PB1500 is not set
7315 -# CONFIG_MIPS_HYDROGEN3 is not set
7316 # CONFIG_MIPS_PB1550 is not set
7317 +# CONFIG_MIPS_HYDROGEN3 is not set
7318 # CONFIG_MIPS_XXS1500 is not set
7319 # CONFIG_MIPS_MTX1 is not set
7320 # CONFIG_COGENT_CSB250 is not set
7321 @@ -226,11 +226,6 @@
7322 #
7323 # CONFIG_IPX is not set
7324 # CONFIG_ATALK is not set
7325 -
7326 -#
7327 -# Appletalk devices
7328 -#
7329 -# CONFIG_DEV_APPLETALK is not set
7330 # CONFIG_DECNET is not set
7331 # CONFIG_BRIDGE is not set
7332 # CONFIG_X25 is not set
7333 @@ -516,7 +511,6 @@
7334 CONFIG_QTRONIX_KEYBOARD=y
7335 CONFIG_IT8172_CIR=y
7336 # CONFIG_IT8172_SCR0 is not set
7337 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7338 CONFIG_UNIX98_PTYS=y
7339 CONFIG_UNIX98_PTY_COUNT=256
7340
7341 Index: linux-2.4.35.4/arch/mips/defconfig-jmr3927
7342 ===================================================================
7343 --- linux-2.4.35.4.orig/arch/mips/defconfig-jmr3927 2007-12-15 05:19:43.310889184 +0100
7344 +++ linux-2.4.35.4/arch/mips/defconfig-jmr3927 2007-12-15 05:19:44.838976267 +0100
7345 @@ -28,8 +28,8 @@
7346 # CONFIG_MIPS_PB1000 is not set
7347 # CONFIG_MIPS_PB1100 is not set
7348 # CONFIG_MIPS_PB1500 is not set
7349 -# CONFIG_MIPS_HYDROGEN3 is not set
7350 # CONFIG_MIPS_PB1550 is not set
7351 +# CONFIG_MIPS_HYDROGEN3 is not set
7352 # CONFIG_MIPS_XXS1500 is not set
7353 # CONFIG_MIPS_MTX1 is not set
7354 # CONFIG_COGENT_CSB250 is not set
7355 @@ -225,11 +225,6 @@
7356 #
7357 # CONFIG_IPX is not set
7358 # CONFIG_ATALK is not set
7359 -
7360 -#
7361 -# Appletalk devices
7362 -#
7363 -# CONFIG_DEV_APPLETALK is not set
7364 # CONFIG_DECNET is not set
7365 # CONFIG_BRIDGE is not set
7366 # CONFIG_X25 is not set
7367 @@ -454,7 +449,6 @@
7368 # CONFIG_SERIAL_TXX9_CONSOLE is not set
7369 CONFIG_TXX927_SERIAL=y
7370 CONFIG_TXX927_SERIAL_CONSOLE=y
7371 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7372 # CONFIG_UNIX98_PTYS is not set
7373
7374 #
7375 Index: linux-2.4.35.4/arch/mips/defconfig-lasat
7376 ===================================================================
7377 --- linux-2.4.35.4.orig/arch/mips/defconfig-lasat 2007-12-15 05:19:43.318889642 +0100
7378 +++ linux-2.4.35.4/arch/mips/defconfig-lasat 2007-12-15 05:19:44.838976267 +0100
7379 @@ -30,8 +30,8 @@
7380 # CONFIG_MIPS_PB1000 is not set
7381 # CONFIG_MIPS_PB1100 is not set
7382 # CONFIG_MIPS_PB1500 is not set
7383 -# CONFIG_MIPS_HYDROGEN3 is not set
7384 # CONFIG_MIPS_PB1550 is not set
7385 +# CONFIG_MIPS_HYDROGEN3 is not set
7386 # CONFIG_MIPS_XXS1500 is not set
7387 # CONFIG_MIPS_MTX1 is not set
7388 # CONFIG_COGENT_CSB250 is not set
7389 @@ -198,9 +198,7 @@
7390 # CONFIG_MTD_BOSPORUS is not set
7391 # CONFIG_MTD_XXS1500 is not set
7392 # CONFIG_MTD_MTX1 is not set
7393 -# CONFIG_MTD_DB1X00 is not set
7394 # CONFIG_MTD_PB1550 is not set
7395 -# CONFIG_MTD_HYDROGEN3 is not set
7396 # CONFIG_MTD_MIRAGE is not set
7397 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7398 # CONFIG_MTD_OCELOT is not set
7399 @@ -219,7 +217,6 @@
7400 #
7401 # Disk-On-Chip Device Drivers
7402 #
7403 -# CONFIG_MTD_DOC1000 is not set
7404 # CONFIG_MTD_DOC2000 is not set
7405 # CONFIG_MTD_DOC2001 is not set
7406 # CONFIG_MTD_DOCPROBE is not set
7407 @@ -303,11 +300,6 @@
7408 #
7409 # CONFIG_IPX is not set
7410 # CONFIG_ATALK is not set
7411 -
7412 -#
7413 -# Appletalk devices
7414 -#
7415 -# CONFIG_DEV_APPLETALK is not set
7416 # CONFIG_DECNET is not set
7417 # CONFIG_BRIDGE is not set
7418 # CONFIG_X25 is not set
7419 @@ -584,7 +576,6 @@
7420 CONFIG_SERIAL_CONSOLE=y
7421 # CONFIG_SERIAL_EXTENDED is not set
7422 # CONFIG_SERIAL_NONSTANDARD is not set
7423 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7424 CONFIG_UNIX98_PTYS=y
7425 CONFIG_UNIX98_PTY_COUNT=256
7426
7427 Index: linux-2.4.35.4/arch/mips/defconfig-malta
7428 ===================================================================
7429 --- linux-2.4.35.4.orig/arch/mips/defconfig-malta 2007-12-15 05:19:43.322889868 +0100
7430 +++ linux-2.4.35.4/arch/mips/defconfig-malta 2007-12-15 05:19:44.842976493 +0100
7431 @@ -22,16 +22,19 @@
7432 #
7433 # CONFIG_ACER_PICA_61 is not set
7434 # CONFIG_MIPS_BOSPORUS is not set
7435 +# CONFIG_MIPS_FICMMP is not set
7436 # CONFIG_MIPS_MIRAGE is not set
7437 # CONFIG_MIPS_DB1000 is not set
7438 # CONFIG_MIPS_DB1100 is not set
7439 # CONFIG_MIPS_DB1500 is not set
7440 # CONFIG_MIPS_DB1550 is not set
7441 +# CONFIG_MIPS_DB1200 is not set
7442 # CONFIG_MIPS_PB1000 is not set
7443 # CONFIG_MIPS_PB1100 is not set
7444 # CONFIG_MIPS_PB1500 is not set
7445 -# CONFIG_MIPS_HYDROGEN3 is not set
7446 # CONFIG_MIPS_PB1550 is not set
7447 +# CONFIG_MIPS_PB1200 is not set
7448 +# CONFIG_MIPS_HYDROGEN3 is not set
7449 # CONFIG_MIPS_XXS1500 is not set
7450 # CONFIG_MIPS_MTX1 is not set
7451 # CONFIG_COGENT_CSB250 is not set
7452 @@ -237,11 +240,6 @@
7453 #
7454 # CONFIG_IPX is not set
7455 # CONFIG_ATALK is not set
7456 -
7457 -#
7458 -# Appletalk devices
7459 -#
7460 -# CONFIG_DEV_APPLETALK is not set
7461 # CONFIG_DECNET is not set
7462 # CONFIG_BRIDGE is not set
7463 # CONFIG_X25 is not set
7464 @@ -273,8 +271,83 @@
7465 #
7466 # ATA/IDE/MFM/RLL support
7467 #
7468 -# CONFIG_IDE is not set
7469 +CONFIG_IDE=y
7470 +
7471 +#
7472 +# IDE, ATA and ATAPI Block devices
7473 +#
7474 +CONFIG_BLK_DEV_IDE=y
7475 +
7476 +#
7477 +# Please see Documentation/ide.txt for help/info on IDE drives
7478 +#
7479 +# CONFIG_BLK_DEV_HD_IDE is not set
7480 # CONFIG_BLK_DEV_HD is not set
7481 +# CONFIG_BLK_DEV_IDE_SATA is not set
7482 +CONFIG_BLK_DEV_IDEDISK=y
7483 +# CONFIG_IDEDISK_MULTI_MODE is not set
7484 +# CONFIG_IDEDISK_STROKE is not set
7485 +# CONFIG_BLK_DEV_IDECS is not set
7486 +# CONFIG_BLK_DEV_DELKIN is not set
7487 +CONFIG_BLK_DEV_IDECD=y
7488 +CONFIG_BLK_DEV_IDETAPE=y
7489 +CONFIG_BLK_DEV_IDEFLOPPY=y
7490 +CONFIG_BLK_DEV_IDESCSI=y
7491 +# CONFIG_IDE_TASK_IOCTL is not set
7492 +
7493 +#
7494 +# IDE chipset support/bugfixes
7495 +#
7496 +# CONFIG_BLK_DEV_CMD640 is not set
7497 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
7498 +# CONFIG_BLK_DEV_ISAPNP is not set
7499 +CONFIG_BLK_DEV_IDEPCI=y
7500 +CONFIG_BLK_DEV_GENERIC=y
7501 +CONFIG_IDEPCI_SHARE_IRQ=y
7502 +CONFIG_BLK_DEV_IDEDMA_PCI=y
7503 +# CONFIG_BLK_DEV_OFFBOARD is not set
7504 +CONFIG_BLK_DEV_IDEDMA_FORCED=y
7505 +CONFIG_IDEDMA_PCI_AUTO=y
7506 +# CONFIG_IDEDMA_ONLYDISK is not set
7507 +CONFIG_BLK_DEV_IDEDMA=y
7508 +# CONFIG_IDEDMA_PCI_WIP is not set
7509 +# CONFIG_BLK_DEV_ADMA100 is not set
7510 +# CONFIG_BLK_DEV_AEC62XX is not set
7511 +# CONFIG_BLK_DEV_ALI15X3 is not set
7512 +# CONFIG_WDC_ALI15X3 is not set
7513 +# CONFIG_BLK_DEV_AMD74XX is not set
7514 +# CONFIG_AMD74XX_OVERRIDE is not set
7515 +# CONFIG_BLK_DEV_ATIIXP is not set
7516 +# CONFIG_BLK_DEV_CMD64X is not set
7517 +# CONFIG_BLK_DEV_TRIFLEX is not set
7518 +# CONFIG_BLK_DEV_CY82C693 is not set
7519 +# CONFIG_BLK_DEV_CS5530 is not set
7520 +# CONFIG_BLK_DEV_HPT34X is not set
7521 +# CONFIG_HPT34X_AUTODMA is not set
7522 +# CONFIG_BLK_DEV_HPT366 is not set
7523 +CONFIG_BLK_DEV_PIIX=y
7524 +# CONFIG_BLK_DEV_NS87415 is not set
7525 +# CONFIG_BLK_DEV_OPTI621 is not set
7526 +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
7527 +# CONFIG_PDC202XX_BURST is not set
7528 +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
7529 +# CONFIG_BLK_DEV_RZ1000 is not set
7530 +# CONFIG_BLK_DEV_SC1200 is not set
7531 +# CONFIG_BLK_DEV_SVWKS is not set
7532 +# CONFIG_BLK_DEV_SIIMAGE is not set
7533 +# CONFIG_BLK_DEV_SIS5513 is not set
7534 +# CONFIG_BLK_DEV_SLC90E66 is not set
7535 +# CONFIG_BLK_DEV_TRM290 is not set
7536 +# CONFIG_BLK_DEV_VIA82CXXX is not set
7537 +# CONFIG_IDE_CHIPSETS is not set
7538 +CONFIG_IDEDMA_AUTO=y
7539 +# CONFIG_IDEDMA_IVB is not set
7540 +# CONFIG_DMA_NONPCI is not set
7541 +# CONFIG_BLK_DEV_ATARAID is not set
7542 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
7543 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
7544 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
7545 +# CONFIG_BLK_DEV_ATARAID_SII is not set
7546
7547 #
7548 # SCSI support
7549 @@ -319,9 +392,11 @@
7550 # CONFIG_SCSI_MEGARAID is not set
7551 # CONFIG_SCSI_MEGARAID2 is not set
7552 # CONFIG_SCSI_SATA is not set
7553 +# CONFIG_SCSI_SATA_AHCI is not set
7554 # CONFIG_SCSI_SATA_SVW is not set
7555 # CONFIG_SCSI_ATA_PIIX is not set
7556 # CONFIG_SCSI_SATA_NV is not set
7557 +# CONFIG_SCSI_SATA_QSTOR is not set
7558 # CONFIG_SCSI_SATA_PROMISE is not set
7559 # CONFIG_SCSI_SATA_SX4 is not set
7560 # CONFIG_SCSI_SATA_SIL is not set
7561 @@ -524,7 +599,6 @@
7562 CONFIG_SERIAL_CONSOLE=y
7563 # CONFIG_SERIAL_EXTENDED is not set
7564 # CONFIG_SERIAL_NONSTANDARD is not set
7565 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7566 CONFIG_UNIX98_PTYS=y
7567 CONFIG_UNIX98_PTY_COUNT=256
7568
7569 Index: linux-2.4.35.4/arch/mips/defconfig-mirage
7570 ===================================================================
7571 --- linux-2.4.35.4.orig/arch/mips/defconfig-mirage 2007-12-15 05:19:43.330890324 +0100
7572 +++ linux-2.4.35.4/arch/mips/defconfig-mirage 2007-12-15 05:19:44.842976493 +0100
7573 @@ -30,8 +30,8 @@
7574 # CONFIG_MIPS_PB1000 is not set
7575 # CONFIG_MIPS_PB1100 is not set
7576 # CONFIG_MIPS_PB1500 is not set
7577 -# CONFIG_MIPS_HYDROGEN3 is not set
7578 # CONFIG_MIPS_PB1550 is not set
7579 +# CONFIG_MIPS_HYDROGEN3 is not set
7580 # CONFIG_MIPS_XXS1500 is not set
7581 # CONFIG_MIPS_MTX1 is not set
7582 # CONFIG_COGENT_CSB250 is not set
7583 @@ -209,9 +209,7 @@
7584 # CONFIG_MTD_BOSPORUS is not set
7585 # CONFIG_MTD_XXS1500 is not set
7586 # CONFIG_MTD_MTX1 is not set
7587 -# CONFIG_MTD_DB1X00 is not set
7588 # CONFIG_MTD_PB1550 is not set
7589 -# CONFIG_MTD_HYDROGEN3 is not set
7590 CONFIG_MTD_MIRAGE=y
7591 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7592 # CONFIG_MTD_OCELOT is not set
7593 @@ -230,7 +228,6 @@
7594 #
7595 # Disk-On-Chip Device Drivers
7596 #
7597 -# CONFIG_MTD_DOC1000 is not set
7598 # CONFIG_MTD_DOC2000 is not set
7599 # CONFIG_MTD_DOC2001 is not set
7600 # CONFIG_MTD_DOCPROBE is not set
7601 @@ -335,11 +332,6 @@
7602 #
7603 # CONFIG_IPX is not set
7604 # CONFIG_ATALK is not set
7605 -
7606 -#
7607 -# Appletalk devices
7608 -#
7609 -# CONFIG_DEV_APPLETALK is not set
7610 # CONFIG_DECNET is not set
7611 # CONFIG_BRIDGE is not set
7612 # CONFIG_X25 is not set
7613 @@ -560,7 +552,6 @@
7614 # CONFIG_AU1X00_USB_TTY is not set
7615 # CONFIG_AU1X00_USB_RAW is not set
7616 # CONFIG_TXX927_SERIAL is not set
7617 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7618 CONFIG_UNIX98_PTYS=y
7619 CONFIG_UNIX98_PTY_COUNT=256
7620
7621 Index: linux-2.4.35.4/arch/mips/defconfig-mpc30x
7622 ===================================================================
7623 --- linux-2.4.35.4.orig/arch/mips/defconfig-mpc30x 2007-12-15 05:19:43.338890782 +0100
7624 +++ linux-2.4.35.4/arch/mips/defconfig-mpc30x 2007-12-15 05:19:44.842976493 +0100
7625 @@ -30,8 +30,8 @@
7626 # CONFIG_MIPS_PB1000 is not set
7627 # CONFIG_MIPS_PB1100 is not set
7628 # CONFIG_MIPS_PB1500 is not set
7629 -# CONFIG_MIPS_HYDROGEN3 is not set
7630 # CONFIG_MIPS_PB1550 is not set
7631 +# CONFIG_MIPS_HYDROGEN3 is not set
7632 # CONFIG_MIPS_XXS1500 is not set
7633 # CONFIG_MIPS_MTX1 is not set
7634 # CONFIG_COGENT_CSB250 is not set
7635 @@ -228,11 +228,6 @@
7636 #
7637 # CONFIG_IPX is not set
7638 # CONFIG_ATALK is not set
7639 -
7640 -#
7641 -# Appletalk devices
7642 -#
7643 -# CONFIG_DEV_APPLETALK is not set
7644 # CONFIG_DECNET is not set
7645 # CONFIG_BRIDGE is not set
7646 # CONFIG_X25 is not set
7647 @@ -400,7 +395,6 @@
7648 CONFIG_SERIAL_CONSOLE=y
7649 # CONFIG_SERIAL_EXTENDED is not set
7650 # CONFIG_SERIAL_NONSTANDARD is not set
7651 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7652 # CONFIG_VR41XX_KIU is not set
7653 CONFIG_UNIX98_PTYS=y
7654 CONFIG_UNIX98_PTY_COUNT=256
7655 Index: linux-2.4.35.4/arch/mips/defconfig-mtx-1
7656 ===================================================================
7657 --- linux-2.4.35.4.orig/arch/mips/defconfig-mtx-1 2007-12-15 05:19:43.346891237 +0100
7658 +++ linux-2.4.35.4/arch/mips/defconfig-mtx-1 2007-12-15 05:19:44.842976493 +0100
7659 @@ -30,8 +30,8 @@
7660 # CONFIG_MIPS_PB1000 is not set
7661 # CONFIG_MIPS_PB1100 is not set
7662 # CONFIG_MIPS_PB1500 is not set
7663 -# CONFIG_MIPS_HYDROGEN3 is not set
7664 # CONFIG_MIPS_PB1550 is not set
7665 +# CONFIG_MIPS_HYDROGEN3 is not set
7666 # CONFIG_MIPS_XXS1500 is not set
7667 CONFIG_MIPS_MTX1=y
7668 # CONFIG_COGENT_CSB250 is not set
7669 @@ -193,9 +193,7 @@
7670 # CONFIG_MTD_BOSPORUS is not set
7671 # CONFIG_MTD_XXS1500 is not set
7672 CONFIG_MTD_MTX1=y
7673 -# CONFIG_MTD_DB1X00 is not set
7674 # CONFIG_MTD_PB1550 is not set
7675 -# CONFIG_MTD_HYDROGEN3 is not set
7676 # CONFIG_MTD_MIRAGE is not set
7677 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7678 # CONFIG_MTD_OCELOT is not set
7679 @@ -214,7 +212,6 @@
7680 #
7681 # Disk-On-Chip Device Drivers
7682 #
7683 -# CONFIG_MTD_DOC1000 is not set
7684 # CONFIG_MTD_DOC2000 is not set
7685 # CONFIG_MTD_DOC2001 is not set
7686 # CONFIG_MTD_DOCPROBE is not set
7687 @@ -371,11 +368,6 @@
7688 #
7689 # CONFIG_IPX is not set
7690 # CONFIG_ATALK is not set
7691 -
7692 -#
7693 -# Appletalk devices
7694 -#
7695 -# CONFIG_DEV_APPLETALK is not set
7696 # CONFIG_DECNET is not set
7697 CONFIG_BRIDGE=m
7698 # CONFIG_X25 is not set
7699 @@ -479,9 +471,11 @@
7700 # CONFIG_SCSI_MEGARAID is not set
7701 # CONFIG_SCSI_MEGARAID2 is not set
7702 # CONFIG_SCSI_SATA is not set
7703 +# CONFIG_SCSI_SATA_AHCI is not set
7704 # CONFIG_SCSI_SATA_SVW is not set
7705 # CONFIG_SCSI_ATA_PIIX is not set
7706 # CONFIG_SCSI_SATA_NV is not set
7707 +# CONFIG_SCSI_SATA_QSTOR is not set
7708 # CONFIG_SCSI_SATA_PROMISE is not set
7709 # CONFIG_SCSI_SATA_SX4 is not set
7710 # CONFIG_SCSI_SATA_SIL is not set
7711 @@ -700,7 +694,6 @@
7712 # CONFIG_AU1X00_USB_TTY is not set
7713 # CONFIG_AU1X00_USB_RAW is not set
7714 # CONFIG_TXX927_SERIAL is not set
7715 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7716 CONFIG_UNIX98_PTYS=y
7717 CONFIG_UNIX98_PTY_COUNT=256
7718
7719 Index: linux-2.4.35.4/arch/mips/defconfig-nino
7720 ===================================================================
7721 --- linux-2.4.35.4.orig/arch/mips/defconfig-nino 2007-12-15 05:19:43.354891693 +0100
7722 +++ linux-2.4.35.4/arch/mips/defconfig-nino 2007-12-15 05:19:44.846976722 +0100
7723 @@ -30,8 +30,8 @@
7724 # CONFIG_MIPS_PB1000 is not set
7725 # CONFIG_MIPS_PB1100 is not set
7726 # CONFIG_MIPS_PB1500 is not set
7727 -# CONFIG_MIPS_HYDROGEN3 is not set
7728 # CONFIG_MIPS_PB1550 is not set
7729 +# CONFIG_MIPS_HYDROGEN3 is not set
7730 # CONFIG_MIPS_XXS1500 is not set
7731 # CONFIG_MIPS_MTX1 is not set
7732 # CONFIG_COGENT_CSB250 is not set
7733 @@ -226,11 +226,6 @@
7734 #
7735 # CONFIG_IPX is not set
7736 # CONFIG_ATALK is not set
7737 -
7738 -#
7739 -# Appletalk devices
7740 -#
7741 -# CONFIG_DEV_APPLETALK is not set
7742 # CONFIG_DECNET is not set
7743 # CONFIG_BRIDGE is not set
7744 # CONFIG_X25 is not set
7745 @@ -339,7 +334,6 @@
7746 # CONFIG_SERIAL_TXX9 is not set
7747 # CONFIG_SERIAL_TXX9_CONSOLE is not set
7748 # CONFIG_TXX927_SERIAL is not set
7749 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7750 # CONFIG_UNIX98_PTYS is not set
7751
7752 #
7753 Index: linux-2.4.35.4/arch/mips/defconfig-ocelot
7754 ===================================================================
7755 --- linux-2.4.35.4.orig/arch/mips/defconfig-ocelot 2007-12-15 05:19:43.358891922 +0100
7756 +++ linux-2.4.35.4/arch/mips/defconfig-ocelot 2007-12-15 05:19:44.846976722 +0100
7757 @@ -28,8 +28,8 @@
7758 # CONFIG_MIPS_PB1000 is not set
7759 # CONFIG_MIPS_PB1100 is not set
7760 # CONFIG_MIPS_PB1500 is not set
7761 -# CONFIG_MIPS_HYDROGEN3 is not set
7762 # CONFIG_MIPS_PB1550 is not set
7763 +# CONFIG_MIPS_HYDROGEN3 is not set
7764 # CONFIG_MIPS_XXS1500 is not set
7765 # CONFIG_MIPS_MTX1 is not set
7766 # CONFIG_COGENT_CSB250 is not set
7767 @@ -194,9 +194,7 @@
7768 # CONFIG_MTD_BOSPORUS is not set
7769 # CONFIG_MTD_XXS1500 is not set
7770 # CONFIG_MTD_MTX1 is not set
7771 -# CONFIG_MTD_DB1X00 is not set
7772 # CONFIG_MTD_PB1550 is not set
7773 -# CONFIG_MTD_HYDROGEN3 is not set
7774 # CONFIG_MTD_MIRAGE is not set
7775 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7776 CONFIG_MTD_OCELOT=y
7777 @@ -215,7 +213,6 @@
7778 #
7779 # Disk-On-Chip Device Drivers
7780 #
7781 -# CONFIG_MTD_DOC1000 is not set
7782 CONFIG_MTD_DOC2000=y
7783 # CONFIG_MTD_DOC2001 is not set
7784 CONFIG_MTD_DOCPROBE=y
7785 @@ -307,11 +304,6 @@
7786 #
7787 # CONFIG_IPX is not set
7788 # CONFIG_ATALK is not set
7789 -
7790 -#
7791 -# Appletalk devices
7792 -#
7793 -# CONFIG_DEV_APPLETALK is not set
7794 # CONFIG_DECNET is not set
7795 # CONFIG_BRIDGE is not set
7796 # CONFIG_X25 is not set
7797 @@ -513,7 +505,6 @@
7798 CONFIG_SERIAL_CONSOLE=y
7799 # CONFIG_SERIAL_EXTENDED is not set
7800 # CONFIG_SERIAL_NONSTANDARD is not set
7801 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7802 CONFIG_UNIX98_PTYS=y
7803 CONFIG_UNIX98_PTY_COUNT=256
7804
7805 Index: linux-2.4.35.4/arch/mips/defconfig-osprey
7806 ===================================================================
7807 --- linux-2.4.35.4.orig/arch/mips/defconfig-osprey 2007-12-15 05:19:43.366892377 +0100
7808 +++ linux-2.4.35.4/arch/mips/defconfig-osprey 2007-12-15 05:19:44.846976722 +0100
7809 @@ -30,8 +30,8 @@
7810 # CONFIG_MIPS_PB1000 is not set
7811 # CONFIG_MIPS_PB1100 is not set
7812 # CONFIG_MIPS_PB1500 is not set
7813 -# CONFIG_MIPS_HYDROGEN3 is not set
7814 # CONFIG_MIPS_PB1550 is not set
7815 +# CONFIG_MIPS_HYDROGEN3 is not set
7816 # CONFIG_MIPS_XXS1500 is not set
7817 # CONFIG_MIPS_MTX1 is not set
7818 # CONFIG_COGENT_CSB250 is not set
7819 @@ -227,11 +227,6 @@
7820 #
7821 # CONFIG_IPX is not set
7822 # CONFIG_ATALK is not set
7823 -
7824 -#
7825 -# Appletalk devices
7826 -#
7827 -# CONFIG_DEV_APPLETALK is not set
7828 # CONFIG_DECNET is not set
7829 # CONFIG_BRIDGE is not set
7830 # CONFIG_X25 is not set
7831 @@ -388,7 +383,6 @@
7832 # CONFIG_SERIAL_MULTIPORT is not set
7833 # CONFIG_HUB6 is not set
7834 # CONFIG_SERIAL_NONSTANDARD is not set
7835 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7836 # CONFIG_VR41XX_KIU is not set
7837 CONFIG_UNIX98_PTYS=y
7838 CONFIG_UNIX98_PTY_COUNT=256
7839 Index: linux-2.4.35.4/arch/mips/defconfig-pb1000
7840 ===================================================================
7841 --- linux-2.4.35.4.orig/arch/mips/defconfig-pb1000 2007-12-15 05:19:43.374892832 +0100
7842 +++ linux-2.4.35.4/arch/mips/defconfig-pb1000 2007-12-15 05:19:44.846976722 +0100
7843 @@ -30,8 +30,8 @@
7844 CONFIG_MIPS_PB1000=y
7845 # CONFIG_MIPS_PB1100 is not set
7846 # CONFIG_MIPS_PB1500 is not set
7847 -# CONFIG_MIPS_HYDROGEN3 is not set
7848 # CONFIG_MIPS_PB1550 is not set
7849 +# CONFIG_MIPS_HYDROGEN3 is not set
7850 # CONFIG_MIPS_XXS1500 is not set
7851 # CONFIG_MIPS_MTX1 is not set
7852 # CONFIG_COGENT_CSB250 is not set
7853 @@ -215,9 +215,7 @@
7854 # CONFIG_MTD_BOSPORUS is not set
7855 # CONFIG_MTD_XXS1500 is not set
7856 # CONFIG_MTD_MTX1 is not set
7857 -# CONFIG_MTD_DB1X00 is not set
7858 # CONFIG_MTD_PB1550 is not set
7859 -# CONFIG_MTD_HYDROGEN3 is not set
7860 # CONFIG_MTD_MIRAGE is not set
7861 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7862 # CONFIG_MTD_OCELOT is not set
7863 @@ -236,7 +234,6 @@
7864 #
7865 # Disk-On-Chip Device Drivers
7866 #
7867 -# CONFIG_MTD_DOC1000 is not set
7868 # CONFIG_MTD_DOC2000 is not set
7869 # CONFIG_MTD_DOC2001 is not set
7870 # CONFIG_MTD_DOCPROBE is not set
7871 @@ -324,11 +321,6 @@
7872 #
7873 # CONFIG_IPX is not set
7874 # CONFIG_ATALK is not set
7875 -
7876 -#
7877 -# Appletalk devices
7878 -#
7879 -# CONFIG_DEV_APPLETALK is not set
7880 # CONFIG_DECNET is not set
7881 # CONFIG_BRIDGE is not set
7882 # CONFIG_X25 is not set
7883 @@ -622,7 +614,6 @@
7884 # CONFIG_AU1X00_USB_TTY is not set
7885 # CONFIG_AU1X00_USB_RAW is not set
7886 # CONFIG_TXX927_SERIAL is not set
7887 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7888 CONFIG_UNIX98_PTYS=y
7889 CONFIG_UNIX98_PTY_COUNT=256
7890
7891 @@ -707,7 +698,7 @@
7892 #
7893 # CONFIG_PCMCIA_SERIAL_CS is not set
7894 # CONFIG_SYNCLINK_CS is not set
7895 -CONFIG_AU1X00_GPIO=m
7896 +CONFIG_AU1X00_GPIO=y
7897 # CONFIG_TS_AU1X00_ADS7846 is not set
7898
7899 #
7900 Index: linux-2.4.35.4/arch/mips/defconfig-pb1100
7901 ===================================================================
7902 --- linux-2.4.35.4.orig/arch/mips/defconfig-pb1100 2007-12-15 05:19:43.382893288 +0100
7903 +++ linux-2.4.35.4/arch/mips/defconfig-pb1100 2007-12-15 05:19:44.850976948 +0100
7904 @@ -30,8 +30,8 @@
7905 # CONFIG_MIPS_PB1000 is not set
7906 CONFIG_MIPS_PB1100=y
7907 # CONFIG_MIPS_PB1500 is not set
7908 -# CONFIG_MIPS_HYDROGEN3 is not set
7909 # CONFIG_MIPS_PB1550 is not set
7910 +# CONFIG_MIPS_HYDROGEN3 is not set
7911 # CONFIG_MIPS_XXS1500 is not set
7912 # CONFIG_MIPS_MTX1 is not set
7913 # CONFIG_COGENT_CSB250 is not set
7914 @@ -198,9 +198,7 @@
7915 # CONFIG_MTD_MTX1 is not set
7916 CONFIG_MTD_PB1500_BOOT=y
7917 CONFIG_MTD_PB1500_USER=y
7918 -# CONFIG_MTD_DB1X00 is not set
7919 # CONFIG_MTD_PB1550 is not set
7920 -# CONFIG_MTD_HYDROGEN3 is not set
7921 # CONFIG_MTD_MIRAGE is not set
7922 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7923 # CONFIG_MTD_OCELOT is not set
7924 @@ -219,7 +217,6 @@
7925 #
7926 # Disk-On-Chip Device Drivers
7927 #
7928 -# CONFIG_MTD_DOC1000 is not set
7929 # CONFIG_MTD_DOC2000 is not set
7930 # CONFIG_MTD_DOC2001 is not set
7931 # CONFIG_MTD_DOCPROBE is not set
7932 @@ -324,11 +321,6 @@
7933 #
7934 # CONFIG_IPX is not set
7935 # CONFIG_ATALK is not set
7936 -
7937 -#
7938 -# Appletalk devices
7939 -#
7940 -# CONFIG_DEV_APPLETALK is not set
7941 # CONFIG_DECNET is not set
7942 # CONFIG_BRIDGE is not set
7943 # CONFIG_X25 is not set
7944 @@ -613,7 +605,6 @@
7945 # CONFIG_AU1X00_USB_TTY is not set
7946 # CONFIG_AU1X00_USB_RAW is not set
7947 # CONFIG_TXX927_SERIAL is not set
7948 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7949 CONFIG_UNIX98_PTYS=y
7950 CONFIG_UNIX98_PTY_COUNT=256
7951
7952 @@ -859,6 +850,7 @@
7953 # CONFIG_FB_PM2 is not set
7954 # CONFIG_FB_PM3 is not set
7955 # CONFIG_FB_CYBER2000 is not set
7956 +CONFIG_FB_AU1100=y
7957 # CONFIG_FB_MATROX is not set
7958 # CONFIG_FB_ATY is not set
7959 # CONFIG_FB_RADEON is not set
7960 @@ -870,7 +862,6 @@
7961 # CONFIG_FB_VOODOO1 is not set
7962 # CONFIG_FB_TRIDENT is not set
7963 # CONFIG_FB_E1356 is not set
7964 -CONFIG_FB_AU1100=y
7965 # CONFIG_FB_IT8181 is not set
7966 # CONFIG_FB_VIRTUAL is not set
7967 CONFIG_FBCON_ADVANCED=y
7968 Index: linux-2.4.35.4/arch/mips/defconfig-pb1200
7969 ===================================================================
7970 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
7971 +++ linux-2.4.35.4/arch/mips/defconfig-pb1200 2007-12-15 05:19:44.850976948 +0100
7972 @@ -0,0 +1,1060 @@
7973 +#
7974 +# Automatically generated make config: don't edit
7975 +#
7976 +CONFIG_MIPS=y
7977 +CONFIG_MIPS32=y
7978 +# CONFIG_MIPS64 is not set
7979 +
7980 +#
7981 +# Code maturity level options
7982 +#
7983 +CONFIG_EXPERIMENTAL=y
7984 +
7985 +#
7986 +# Loadable module support
7987 +#
7988 +CONFIG_MODULES=y
7989 +# CONFIG_MODVERSIONS is not set
7990 +CONFIG_KMOD=y
7991 +
7992 +#
7993 +# Machine selection
7994 +#
7995 +# CONFIG_ACER_PICA_61 is not set
7996 +# CONFIG_MIPS_BOSPORUS is not set
7997 +# CONFIG_MIPS_MIRAGE is not set
7998 +# CONFIG_MIPS_DB1000 is not set
7999 +# CONFIG_MIPS_DB1100 is not set
8000 +# CONFIG_MIPS_DB1500 is not set
8001 +# CONFIG_MIPS_DB1550 is not set
8002 +# CONFIG_MIPS_PB1000 is not set
8003 +# CONFIG_MIPS_PB1100 is not set
8004 +# CONFIG_MIPS_PB1500 is not set
8005 +# CONFIG_MIPS_PB1550 is not set
8006 +# CONFIG_MIPS_HYDROGEN3 is not set
8007 +# CONFIG_MIPS_XXS1500 is not set
8008 +# CONFIG_MIPS_MTX1 is not set
8009 +# CONFIG_COGENT_CSB250 is not set
8010 +# CONFIG_BAGET_MIPS is not set
8011 +# CONFIG_CASIO_E55 is not set
8012 +# CONFIG_MIPS_COBALT is not set
8013 +# CONFIG_DECSTATION is not set
8014 +# CONFIG_MIPS_EV64120 is not set
8015 +# CONFIG_MIPS_EV96100 is not set
8016 +# CONFIG_MIPS_IVR is not set
8017 +# CONFIG_HP_LASERJET is not set
8018 +# CONFIG_IBM_WORKPAD is not set
8019 +# CONFIG_LASAT is not set
8020 +# CONFIG_MIPS_ITE8172 is not set
8021 +# CONFIG_MIPS_ATLAS is not set
8022 +# CONFIG_MIPS_MAGNUM_4000 is not set
8023 +# CONFIG_MIPS_MALTA is not set
8024 +# CONFIG_MIPS_SEAD is not set
8025 +# CONFIG_MOMENCO_OCELOT is not set
8026 +# CONFIG_MOMENCO_OCELOT_G is not set
8027 +# CONFIG_MOMENCO_OCELOT_C is not set
8028 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
8029 +# CONFIG_PMC_BIG_SUR is not set
8030 +# CONFIG_PMC_STRETCH is not set
8031 +# CONFIG_PMC_YOSEMITE is not set
8032 +# CONFIG_DDB5074 is not set
8033 +# CONFIG_DDB5476 is not set
8034 +# CONFIG_DDB5477 is not set
8035 +# CONFIG_NEC_OSPREY is not set
8036 +# CONFIG_NEC_EAGLE is not set
8037 +# CONFIG_OLIVETTI_M700 is not set
8038 +# CONFIG_NINO is not set
8039 +# CONFIG_SGI_IP22 is not set
8040 +# CONFIG_SGI_IP27 is not set
8041 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
8042 +# CONFIG_SNI_RM200_PCI is not set
8043 +# CONFIG_TANBAC_TB0226 is not set
8044 +# CONFIG_TANBAC_TB0229 is not set
8045 +# CONFIG_TOSHIBA_JMR3927 is not set
8046 +# CONFIG_TOSHIBA_RBTX4927 is not set
8047 +# CONFIG_VICTOR_MPC30X is not set
8048 +# CONFIG_ZAO_CAPCELLA is not set
8049 +# CONFIG_HIGHMEM is not set
8050 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
8051 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
8052 +CONFIG_SOC_AU1X00=y
8053 +CONFIG_SOC_AU1200=y
8054 +CONFIG_NONCOHERENT_IO=y
8055 +CONFIG_PC_KEYB=y
8056 +# CONFIG_MIPS_AU1000 is not set
8057 +
8058 +#
8059 +# CPU selection
8060 +#
8061 +CONFIG_CPU_MIPS32=y
8062 +# CONFIG_CPU_MIPS64 is not set
8063 +# CONFIG_CPU_R3000 is not set
8064 +# CONFIG_CPU_TX39XX is not set
8065 +# CONFIG_CPU_VR41XX is not set
8066 +# CONFIG_CPU_R4300 is not set
8067 +# CONFIG_CPU_R4X00 is not set
8068 +# CONFIG_CPU_TX49XX is not set
8069 +# CONFIG_CPU_R5000 is not set
8070 +# CONFIG_CPU_R5432 is not set
8071 +# CONFIG_CPU_R6000 is not set
8072 +# CONFIG_CPU_NEVADA is not set
8073 +# CONFIG_CPU_R8000 is not set
8074 +# CONFIG_CPU_R10000 is not set
8075 +# CONFIG_CPU_RM7000 is not set
8076 +# CONFIG_CPU_RM9000 is not set
8077 +# CONFIG_CPU_SB1 is not set
8078 +CONFIG_PAGE_SIZE_4KB=y
8079 +# CONFIG_PAGE_SIZE_16KB is not set
8080 +# CONFIG_PAGE_SIZE_64KB is not set
8081 +CONFIG_CPU_HAS_PREFETCH=y
8082 +# CONFIG_VTAG_ICACHE is not set
8083 +CONFIG_64BIT_PHYS_ADDR=y
8084 +# CONFIG_CPU_ADVANCED is not set
8085 +CONFIG_CPU_HAS_LLSC=y
8086 +# CONFIG_CPU_HAS_LLDSCD is not set
8087 +# CONFIG_CPU_HAS_WB is not set
8088 +CONFIG_CPU_HAS_SYNC=y
8089 +
8090 +#
8091 +# General setup
8092 +#
8093 +CONFIG_CPU_LITTLE_ENDIAN=y
8094 +# CONFIG_BUILD_ELF64 is not set
8095 +CONFIG_NET=y
8096 +CONFIG_PCI=y
8097 +CONFIG_PCI_NEW=y
8098 +CONFIG_PCI_AUTO=y
8099 +# CONFIG_PCI_NAMES is not set
8100 +# CONFIG_ISA is not set
8101 +# CONFIG_TC is not set
8102 +# CONFIG_MCA is not set
8103 +# CONFIG_SBUS is not set
8104 +CONFIG_HOTPLUG=y
8105 +
8106 +#
8107 +# PCMCIA/CardBus support
8108 +#
8109 +CONFIG_PCMCIA=m
8110 +# CONFIG_CARDBUS is not set
8111 +# CONFIG_TCIC is not set
8112 +# CONFIG_I82092 is not set
8113 +# CONFIG_I82365 is not set
8114 +CONFIG_PCMCIA_AU1X00=m
8115 +
8116 +#
8117 +# PCI Hotplug Support
8118 +#
8119 +# CONFIG_HOTPLUG_PCI is not set
8120 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
8121 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
8122 +# CONFIG_HOTPLUG_PCI_SHPC is not set
8123 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
8124 +# CONFIG_HOTPLUG_PCI_PCIE is not set
8125 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
8126 +CONFIG_SYSVIPC=y
8127 +# CONFIG_BSD_PROCESS_ACCT is not set
8128 +CONFIG_SYSCTL=y
8129 +CONFIG_KCORE_ELF=y
8130 +# CONFIG_KCORE_AOUT is not set
8131 +# CONFIG_BINFMT_AOUT is not set
8132 +CONFIG_BINFMT_ELF=y
8133 +# CONFIG_MIPS32_COMPAT is not set
8134 +# CONFIG_MIPS32_O32 is not set
8135 +# CONFIG_MIPS32_N32 is not set
8136 +# CONFIG_BINFMT_ELF32 is not set
8137 +# CONFIG_BINFMT_MISC is not set
8138 +# CONFIG_OOM_KILLER is not set
8139 +CONFIG_CMDLINE_BOOL=y
8140 +CONFIG_CMDLINE="mem=96M"
8141 +# CONFIG_PM is not set
8142 +
8143 +#
8144 +# Memory Technology Devices (MTD)
8145 +#
8146 +# CONFIG_MTD is not set
8147 +
8148 +#
8149 +# Parallel port support
8150 +#
8151 +# CONFIG_PARPORT is not set
8152 +
8153 +#
8154 +# Plug and Play configuration
8155 +#
8156 +# CONFIG_PNP is not set
8157 +# CONFIG_ISAPNP is not set
8158 +
8159 +#
8160 +# Block devices
8161 +#
8162 +# CONFIG_BLK_DEV_FD is not set
8163 +# CONFIG_BLK_DEV_XD is not set
8164 +# CONFIG_PARIDE is not set
8165 +# CONFIG_BLK_CPQ_DA is not set
8166 +# CONFIG_BLK_CPQ_CISS_DA is not set
8167 +# CONFIG_CISS_SCSI_TAPE is not set
8168 +# CONFIG_CISS_MONITOR_THREAD is not set
8169 +# CONFIG_BLK_DEV_DAC960 is not set
8170 +# CONFIG_BLK_DEV_UMEM is not set
8171 +# CONFIG_BLK_DEV_SX8 is not set
8172 +CONFIG_BLK_DEV_LOOP=y
8173 +# CONFIG_BLK_DEV_NBD is not set
8174 +# CONFIG_BLK_DEV_RAM is not set
8175 +# CONFIG_BLK_DEV_INITRD is not set
8176 +# CONFIG_BLK_STATS is not set
8177 +
8178 +#
8179 +# Multi-device support (RAID and LVM)
8180 +#
8181 +# CONFIG_MD is not set
8182 +# CONFIG_BLK_DEV_MD is not set
8183 +# CONFIG_MD_LINEAR is not set
8184 +# CONFIG_MD_RAID0 is not set
8185 +# CONFIG_MD_RAID1 is not set
8186 +# CONFIG_MD_RAID5 is not set
8187 +# CONFIG_MD_MULTIPATH is not set
8188 +# CONFIG_BLK_DEV_LVM is not set
8189 +
8190 +#
8191 +# Networking options
8192 +#
8193 +CONFIG_PACKET=y
8194 +# CONFIG_PACKET_MMAP is not set
8195 +# CONFIG_NETLINK_DEV is not set
8196 +CONFIG_NETFILTER=y
8197 +# CONFIG_NETFILTER_DEBUG is not set
8198 +CONFIG_FILTER=y
8199 +CONFIG_UNIX=y
8200 +CONFIG_INET=y
8201 +CONFIG_IP_MULTICAST=y
8202 +# CONFIG_IP_ADVANCED_ROUTER is not set
8203 +CONFIG_IP_PNP=y
8204 +# CONFIG_IP_PNP_DHCP is not set
8205 +CONFIG_IP_PNP_BOOTP=y
8206 +# CONFIG_IP_PNP_RARP is not set
8207 +# CONFIG_NET_IPIP is not set
8208 +# CONFIG_NET_IPGRE is not set
8209 +# CONFIG_IP_MROUTE is not set
8210 +# CONFIG_ARPD is not set
8211 +# CONFIG_INET_ECN is not set
8212 +# CONFIG_SYN_COOKIES is not set
8213 +
8214 +#
8215 +# IP: Netfilter Configuration
8216 +#
8217 +# CONFIG_IP_NF_CONNTRACK is not set
8218 +# CONFIG_IP_NF_QUEUE is not set
8219 +# CONFIG_IP_NF_IPTABLES is not set
8220 +# CONFIG_IP_NF_ARPTABLES is not set
8221 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
8222 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
8223 +
8224 +#
8225 +# IP: Virtual Server Configuration
8226 +#
8227 +# CONFIG_IP_VS is not set
8228 +# CONFIG_IPV6 is not set
8229 +# CONFIG_KHTTPD is not set
8230 +
8231 +#
8232 +# SCTP Configuration (EXPERIMENTAL)
8233 +#
8234 +# CONFIG_IP_SCTP is not set
8235 +# CONFIG_ATM is not set
8236 +# CONFIG_VLAN_8021Q is not set
8237 +
8238 +#
8239 +#
8240 +#
8241 +# CONFIG_IPX is not set
8242 +# CONFIG_ATALK is not set
8243 +# CONFIG_DECNET is not set
8244 +# CONFIG_BRIDGE is not set
8245 +# CONFIG_X25 is not set
8246 +# CONFIG_LAPB is not set
8247 +# CONFIG_LLC is not set
8248 +# CONFIG_NET_DIVERT is not set
8249 +# CONFIG_ECONET is not set
8250 +# CONFIG_WAN_ROUTER is not set
8251 +# CONFIG_NET_FASTROUTE is not set
8252 +# CONFIG_NET_HW_FLOWCONTROL is not set
8253 +
8254 +#
8255 +# QoS and/or fair queueing
8256 +#
8257 +# CONFIG_NET_SCHED is not set
8258 +
8259 +#
8260 +# Network testing
8261 +#
8262 +# CONFIG_NET_PKTGEN is not set
8263 +
8264 +#
8265 +# Telephony Support
8266 +#
8267 +# CONFIG_PHONE is not set
8268 +# CONFIG_PHONE_IXJ is not set
8269 +# CONFIG_PHONE_IXJ_PCMCIA is not set
8270 +
8271 +#
8272 +# ATA/IDE/MFM/RLL support
8273 +#
8274 +CONFIG_IDE=y
8275 +
8276 +#
8277 +# IDE, ATA and ATAPI Block devices
8278 +#
8279 +CONFIG_BLK_DEV_IDE=y
8280 +
8281 +#
8282 +# Please see Documentation/ide.txt for help/info on IDE drives
8283 +#
8284 +# CONFIG_BLK_DEV_HD_IDE is not set
8285 +# CONFIG_BLK_DEV_HD is not set
8286 +# CONFIG_BLK_DEV_IDE_SATA is not set
8287 +CONFIG_BLK_DEV_IDEDISK=y
8288 +CONFIG_IDEDISK_MULTI_MODE=y
8289 +CONFIG_IDEDISK_STROKE=y
8290 +CONFIG_BLK_DEV_IDECS=m
8291 +# CONFIG_BLK_DEV_DELKIN is not set
8292 +# CONFIG_BLK_DEV_IDECD is not set
8293 +# CONFIG_BLK_DEV_IDETAPE is not set
8294 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
8295 +# CONFIG_BLK_DEV_IDESCSI is not set
8296 +# CONFIG_IDE_TASK_IOCTL is not set
8297 +
8298 +#
8299 +# IDE chipset support/bugfixes
8300 +#
8301 +# CONFIG_BLK_DEV_CMD640 is not set
8302 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
8303 +# CONFIG_BLK_DEV_ISAPNP is not set
8304 +# CONFIG_BLK_DEV_IDEPCI is not set
8305 +# CONFIG_IDE_CHIPSETS is not set
8306 +# CONFIG_IDEDMA_AUTO is not set
8307 +# CONFIG_DMA_NONPCI is not set
8308 +# CONFIG_BLK_DEV_ATARAID is not set
8309 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
8310 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
8311 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
8312 +# CONFIG_BLK_DEV_ATARAID_SII is not set
8313 +
8314 +#
8315 +# SCSI support
8316 +#
8317 +CONFIG_SCSI=y
8318 +
8319 +#
8320 +# SCSI support type (disk, tape, CD-ROM)
8321 +#
8322 +CONFIG_BLK_DEV_SD=y
8323 +CONFIG_SD_EXTRA_DEVS=40
8324 +CONFIG_CHR_DEV_ST=y
8325 +# CONFIG_CHR_DEV_OSST is not set
8326 +CONFIG_BLK_DEV_SR=y
8327 +# CONFIG_BLK_DEV_SR_VENDOR is not set
8328 +CONFIG_SR_EXTRA_DEVS=2
8329 +# CONFIG_CHR_DEV_SG is not set
8330 +
8331 +#
8332 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
8333 +#
8334 +# CONFIG_SCSI_DEBUG_QUEUES is not set
8335 +# CONFIG_SCSI_MULTI_LUN is not set
8336 +CONFIG_SCSI_CONSTANTS=y
8337 +# CONFIG_SCSI_LOGGING is not set
8338 +
8339 +#
8340 +# SCSI low-level drivers
8341 +#
8342 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
8343 +# CONFIG_SCSI_7000FASST is not set
8344 +# CONFIG_SCSI_ACARD is not set
8345 +# CONFIG_SCSI_AHA152X is not set
8346 +# CONFIG_SCSI_AHA1542 is not set
8347 +# CONFIG_SCSI_AHA1740 is not set
8348 +# CONFIG_SCSI_AACRAID is not set
8349 +# CONFIG_SCSI_AIC7XXX is not set
8350 +# CONFIG_SCSI_AIC79XX is not set
8351 +# CONFIG_SCSI_AIC7XXX_OLD is not set
8352 +# CONFIG_SCSI_DPT_I2O is not set
8353 +# CONFIG_SCSI_ADVANSYS is not set
8354 +# CONFIG_SCSI_IN2000 is not set
8355 +# CONFIG_SCSI_AM53C974 is not set
8356 +# CONFIG_SCSI_MEGARAID is not set
8357 +# CONFIG_SCSI_MEGARAID2 is not set
8358 +# CONFIG_SCSI_SATA is not set
8359 +# CONFIG_SCSI_SATA_AHCI is not set
8360 +# CONFIG_SCSI_SATA_SVW is not set
8361 +# CONFIG_SCSI_ATA_PIIX is not set
8362 +# CONFIG_SCSI_SATA_NV is not set
8363 +# CONFIG_SCSI_SATA_QSTOR is not set
8364 +# CONFIG_SCSI_SATA_PROMISE is not set
8365 +# CONFIG_SCSI_SATA_SX4 is not set
8366 +# CONFIG_SCSI_SATA_SIL is not set
8367 +# CONFIG_SCSI_SATA_SIS is not set
8368 +# CONFIG_SCSI_SATA_ULI is not set
8369 +# CONFIG_SCSI_SATA_VIA is not set
8370 +# CONFIG_SCSI_SATA_VITESSE is not set
8371 +# CONFIG_SCSI_BUSLOGIC is not set
8372 +# CONFIG_SCSI_CPQFCTS is not set
8373 +# CONFIG_SCSI_DMX3191D is not set
8374 +# CONFIG_SCSI_DTC3280 is not set
8375 +# CONFIG_SCSI_EATA is not set
8376 +# CONFIG_SCSI_EATA_DMA is not set
8377 +# CONFIG_SCSI_EATA_PIO is not set
8378 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
8379 +# CONFIG_SCSI_GDTH is not set
8380 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
8381 +# CONFIG_SCSI_INITIO is not set
8382 +# CONFIG_SCSI_INIA100 is not set
8383 +# CONFIG_SCSI_NCR53C406A is not set
8384 +# CONFIG_SCSI_NCR53C7xx is not set
8385 +# CONFIG_SCSI_SYM53C8XX_2 is not set
8386 +# CONFIG_SCSI_NCR53C8XX is not set
8387 +# CONFIG_SCSI_SYM53C8XX is not set
8388 +# CONFIG_SCSI_PAS16 is not set
8389 +# CONFIG_SCSI_PCI2000 is not set
8390 +# CONFIG_SCSI_PCI2220I is not set
8391 +# CONFIG_SCSI_PSI240I is not set
8392 +# CONFIG_SCSI_QLOGIC_FAS is not set
8393 +# CONFIG_SCSI_QLOGIC_ISP is not set
8394 +# CONFIG_SCSI_QLOGIC_FC is not set
8395 +# CONFIG_SCSI_QLOGIC_1280 is not set
8396 +# CONFIG_SCSI_SIM710 is not set
8397 +# CONFIG_SCSI_SYM53C416 is not set
8398 +# CONFIG_SCSI_DC390T is not set
8399 +# CONFIG_SCSI_T128 is not set
8400 +# CONFIG_SCSI_U14_34F is not set
8401 +# CONFIG_SCSI_NSP32 is not set
8402 +# CONFIG_SCSI_DEBUG is not set
8403 +
8404 +#
8405 +# PCMCIA SCSI adapter support
8406 +#
8407 +# CONFIG_SCSI_PCMCIA is not set
8408 +
8409 +#
8410 +# Fusion MPT device support
8411 +#
8412 +# CONFIG_FUSION is not set
8413 +# CONFIG_FUSION_BOOT is not set
8414 +# CONFIG_FUSION_ISENSE is not set
8415 +# CONFIG_FUSION_CTL is not set
8416 +# CONFIG_FUSION_LAN is not set
8417 +
8418 +#
8419 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
8420 +#
8421 +# CONFIG_IEEE1394 is not set
8422 +
8423 +#
8424 +# I2O device support
8425 +#
8426 +# CONFIG_I2O is not set
8427 +# CONFIG_I2O_PCI is not set
8428 +# CONFIG_I2O_BLOCK is not set
8429 +# CONFIG_I2O_LAN is not set
8430 +# CONFIG_I2O_SCSI is not set
8431 +# CONFIG_I2O_PROC is not set
8432 +
8433 +#
8434 +# Network device support
8435 +#
8436 +CONFIG_NETDEVICES=y
8437 +
8438 +#
8439 +# ARCnet devices
8440 +#
8441 +# CONFIG_ARCNET is not set
8442 +# CONFIG_DUMMY is not set
8443 +# CONFIG_BONDING is not set
8444 +# CONFIG_EQUALIZER is not set
8445 +# CONFIG_TUN is not set
8446 +# CONFIG_ETHERTAP is not set
8447 +
8448 +#
8449 +# Ethernet (10 or 100Mbit)
8450 +#
8451 +CONFIG_NET_ETHERNET=y
8452 +# CONFIG_MIPS_AU1X00_ENET is not set
8453 +# CONFIG_SUNLANCE is not set
8454 +# CONFIG_HAPPYMEAL is not set
8455 +# CONFIG_SUNBMAC is not set
8456 +# CONFIG_SUNQE is not set
8457 +# CONFIG_SUNGEM is not set
8458 +# CONFIG_NET_VENDOR_3COM is not set
8459 +# CONFIG_LANCE is not set
8460 +# CONFIG_NET_VENDOR_SMC is not set
8461 +# CONFIG_NET_VENDOR_RACAL is not set
8462 +# CONFIG_HP100 is not set
8463 +# CONFIG_NET_ISA is not set
8464 +# CONFIG_NET_PCI is not set
8465 +# CONFIG_NET_POCKET is not set
8466 +
8467 +#
8468 +# Ethernet (1000 Mbit)
8469 +#
8470 +# CONFIG_ACENIC is not set
8471 +# CONFIG_DL2K is not set
8472 +# CONFIG_E1000 is not set
8473 +# CONFIG_MYRI_SBUS is not set
8474 +# CONFIG_NS83820 is not set
8475 +# CONFIG_HAMACHI is not set
8476 +# CONFIG_YELLOWFIN is not set
8477 +# CONFIG_R8169 is not set
8478 +# CONFIG_SK98LIN is not set
8479 +# CONFIG_TIGON3 is not set
8480 +# CONFIG_FDDI is not set
8481 +# CONFIG_HIPPI is not set
8482 +# CONFIG_PLIP is not set
8483 +CONFIG_PPP=m
8484 +CONFIG_PPP_MULTILINK=y
8485 +# CONFIG_PPP_FILTER is not set
8486 +CONFIG_PPP_ASYNC=m
8487 +# CONFIG_PPP_SYNC_TTY is not set
8488 +CONFIG_PPP_DEFLATE=m
8489 +# CONFIG_PPP_BSDCOMP is not set
8490 +CONFIG_PPPOE=m
8491 +# CONFIG_SLIP is not set
8492 +
8493 +#
8494 +# Wireless LAN (non-hamradio)
8495 +#
8496 +# CONFIG_NET_RADIO is not set
8497 +
8498 +#
8499 +# Token Ring devices
8500 +#
8501 +# CONFIG_TR is not set
8502 +# CONFIG_NET_FC is not set
8503 +# CONFIG_RCPCI is not set
8504 +# CONFIG_SHAPER is not set
8505 +
8506 +#
8507 +# Wan interfaces
8508 +#
8509 +# CONFIG_WAN is not set
8510 +
8511 +#
8512 +# PCMCIA network device support
8513 +#
8514 +# CONFIG_NET_PCMCIA is not set
8515 +
8516 +#
8517 +# Amateur Radio support
8518 +#
8519 +# CONFIG_HAMRADIO is not set
8520 +
8521 +#
8522 +# IrDA (infrared) support
8523 +#
8524 +# CONFIG_IRDA is not set
8525 +
8526 +#
8527 +# ISDN subsystem
8528 +#
8529 +# CONFIG_ISDN is not set
8530 +
8531 +#
8532 +# Input core support
8533 +#
8534 +CONFIG_INPUT=y
8535 +CONFIG_INPUT_KEYBDEV=y
8536 +CONFIG_INPUT_MOUSEDEV=y
8537 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
8538 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
8539 +# CONFIG_INPUT_JOYDEV is not set
8540 +CONFIG_INPUT_EVDEV=y
8541 +# CONFIG_INPUT_UINPUT is not set
8542 +
8543 +#
8544 +# Character devices
8545 +#
8546 +CONFIG_VT=y
8547 +# CONFIG_VT_CONSOLE is not set
8548 +# CONFIG_SERIAL is not set
8549 +# CONFIG_SERIAL_EXTENDED is not set
8550 +CONFIG_SERIAL_NONSTANDARD=y
8551 +# CONFIG_COMPUTONE is not set
8552 +# CONFIG_ROCKETPORT is not set
8553 +# CONFIG_CYCLADES is not set
8554 +# CONFIG_DIGIEPCA is not set
8555 +# CONFIG_DIGI is not set
8556 +# CONFIG_ESPSERIAL is not set
8557 +# CONFIG_MOXA_INTELLIO is not set
8558 +# CONFIG_MOXA_SMARTIO is not set
8559 +# CONFIG_ISI is not set
8560 +# CONFIG_SYNCLINK is not set
8561 +# CONFIG_SYNCLINKMP is not set
8562 +# CONFIG_N_HDLC is not set
8563 +# CONFIG_RISCOM8 is not set
8564 +# CONFIG_SPECIALIX is not set
8565 +# CONFIG_SX is not set
8566 +# CONFIG_RIO is not set
8567 +# CONFIG_STALDRV is not set
8568 +# CONFIG_SERIAL_TX3912 is not set
8569 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
8570 +# CONFIG_SERIAL_TXX9 is not set
8571 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
8572 +CONFIG_AU1X00_UART=y
8573 +CONFIG_AU1X00_SERIAL_CONSOLE=y
8574 +# CONFIG_AU1X00_USB_TTY is not set
8575 +# CONFIG_AU1X00_USB_RAW is not set
8576 +# CONFIG_TXX927_SERIAL is not set
8577 +CONFIG_UNIX98_PTYS=y
8578 +CONFIG_UNIX98_PTY_COUNT=256
8579 +
8580 +#
8581 +# I2C support
8582 +#
8583 +CONFIG_I2C=y
8584 +# CONFIG_I2C_ALGOBIT is not set
8585 +# CONFIG_SCx200_ACB is not set
8586 +# CONFIG_I2C_ALGOPCF is not set
8587 +# CONFIG_I2C_CHARDEV is not set
8588 +CONFIG_I2C_PROC=y
8589 +
8590 +#
8591 +# Mice
8592 +#
8593 +# CONFIG_BUSMOUSE is not set
8594 +# CONFIG_MOUSE is not set
8595 +
8596 +#
8597 +# Joysticks
8598 +#
8599 +# CONFIG_INPUT_GAMEPORT is not set
8600 +# CONFIG_INPUT_NS558 is not set
8601 +# CONFIG_INPUT_LIGHTNING is not set
8602 +# CONFIG_INPUT_PCIGAME is not set
8603 +# CONFIG_INPUT_CS461X is not set
8604 +# CONFIG_INPUT_EMU10K1 is not set
8605 +# CONFIG_INPUT_SERIO is not set
8606 +# CONFIG_INPUT_SERPORT is not set
8607 +
8608 +#
8609 +# Joysticks
8610 +#
8611 +# CONFIG_INPUT_ANALOG is not set
8612 +# CONFIG_INPUT_A3D is not set
8613 +# CONFIG_INPUT_ADI is not set
8614 +# CONFIG_INPUT_COBRA is not set
8615 +# CONFIG_INPUT_GF2K is not set
8616 +# CONFIG_INPUT_GRIP is not set
8617 +# CONFIG_INPUT_INTERACT is not set
8618 +# CONFIG_INPUT_TMDC is not set
8619 +# CONFIG_INPUT_SIDEWINDER is not set
8620 +# CONFIG_INPUT_IFORCE_USB is not set
8621 +# CONFIG_INPUT_IFORCE_232 is not set
8622 +# CONFIG_INPUT_WARRIOR is not set
8623 +# CONFIG_INPUT_MAGELLAN is not set
8624 +# CONFIG_INPUT_SPACEORB is not set
8625 +# CONFIG_INPUT_SPACEBALL is not set
8626 +# CONFIG_INPUT_STINGER is not set
8627 +# CONFIG_INPUT_DB9 is not set
8628 +# CONFIG_INPUT_GAMECON is not set
8629 +# CONFIG_INPUT_TURBOGRAFX is not set
8630 +# CONFIG_QIC02_TAPE is not set
8631 +# CONFIG_IPMI_HANDLER is not set
8632 +# CONFIG_IPMI_PANIC_EVENT is not set
8633 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
8634 +# CONFIG_IPMI_KCS is not set
8635 +# CONFIG_IPMI_WATCHDOG is not set
8636 +
8637 +#
8638 +# Watchdog Cards
8639 +#
8640 +# CONFIG_WATCHDOG is not set
8641 +# CONFIG_SCx200 is not set
8642 +# CONFIG_SCx200_GPIO is not set
8643 +# CONFIG_AMD_PM768 is not set
8644 +# CONFIG_NVRAM is not set
8645 +# CONFIG_RTC is not set
8646 +# CONFIG_DTLK is not set
8647 +# CONFIG_R3964 is not set
8648 +# CONFIG_APPLICOM is not set
8649 +
8650 +#
8651 +# Ftape, the floppy tape device driver
8652 +#
8653 +# CONFIG_FTAPE is not set
8654 +# CONFIG_AGP is not set
8655 +
8656 +#
8657 +# Direct Rendering Manager (XFree86 DRI support)
8658 +#
8659 +# CONFIG_DRM is not set
8660 +
8661 +#
8662 +# PCMCIA character devices
8663 +#
8664 +# CONFIG_PCMCIA_SERIAL_CS is not set
8665 +# CONFIG_SYNCLINK_CS is not set
8666 +# CONFIG_AU1X00_GPIO is not set
8667 +# CONFIG_TS_AU1X00_ADS7846 is not set
8668 +
8669 +#
8670 +# File systems
8671 +#
8672 +# CONFIG_QUOTA is not set
8673 +# CONFIG_QFMT_V2 is not set
8674 +CONFIG_AUTOFS_FS=y
8675 +# CONFIG_AUTOFS4_FS is not set
8676 +# CONFIG_REISERFS_FS is not set
8677 +# CONFIG_REISERFS_CHECK is not set
8678 +# CONFIG_REISERFS_PROC_INFO is not set
8679 +# CONFIG_ADFS_FS is not set
8680 +# CONFIG_ADFS_FS_RW is not set
8681 +# CONFIG_AFFS_FS is not set
8682 +# CONFIG_HFS_FS is not set
8683 +# CONFIG_HFSPLUS_FS is not set
8684 +# CONFIG_BEFS_FS is not set
8685 +# CONFIG_BEFS_DEBUG is not set
8686 +# CONFIG_BFS_FS is not set
8687 +CONFIG_EXT3_FS=y
8688 +CONFIG_JBD=y
8689 +# CONFIG_JBD_DEBUG is not set
8690 +CONFIG_FAT_FS=y
8691 +CONFIG_MSDOS_FS=y
8692 +# CONFIG_UMSDOS_FS is not set
8693 +CONFIG_VFAT_FS=y
8694 +# CONFIG_EFS_FS is not set
8695 +# CONFIG_JFFS_FS is not set
8696 +# CONFIG_JFFS2_FS is not set
8697 +# CONFIG_CRAMFS is not set
8698 +CONFIG_TMPFS=y
8699 +CONFIG_RAMFS=y
8700 +# CONFIG_ISO9660_FS is not set
8701 +# CONFIG_JOLIET is not set
8702 +# CONFIG_ZISOFS is not set
8703 +# CONFIG_JFS_FS is not set
8704 +# CONFIG_JFS_DEBUG is not set
8705 +# CONFIG_JFS_STATISTICS is not set
8706 +# CONFIG_MINIX_FS is not set
8707 +# CONFIG_VXFS_FS is not set
8708 +# CONFIG_NTFS_FS is not set
8709 +# CONFIG_NTFS_RW is not set
8710 +# CONFIG_HPFS_FS is not set
8711 +CONFIG_PROC_FS=y
8712 +# CONFIG_DEVFS_FS is not set
8713 +# CONFIG_DEVFS_MOUNT is not set
8714 +# CONFIG_DEVFS_DEBUG is not set
8715 +CONFIG_DEVPTS_FS=y
8716 +# CONFIG_QNX4FS_FS is not set
8717 +# CONFIG_QNX4FS_RW is not set
8718 +# CONFIG_ROMFS_FS is not set
8719 +CONFIG_EXT2_FS=y
8720 +# CONFIG_SYSV_FS is not set
8721 +# CONFIG_UDF_FS is not set
8722 +# CONFIG_UDF_RW is not set
8723 +# CONFIG_UFS_FS is not set
8724 +# CONFIG_UFS_FS_WRITE is not set
8725 +# CONFIG_XFS_FS is not set
8726 +# CONFIG_XFS_QUOTA is not set
8727 +# CONFIG_XFS_RT is not set
8728 +# CONFIG_XFS_TRACE is not set
8729 +# CONFIG_XFS_DEBUG is not set
8730 +
8731 +#
8732 +# Network File Systems
8733 +#
8734 +# CONFIG_CODA_FS is not set
8735 +# CONFIG_INTERMEZZO_FS is not set
8736 +CONFIG_NFS_FS=y
8737 +CONFIG_NFS_V3=y
8738 +# CONFIG_NFS_DIRECTIO is not set
8739 +CONFIG_ROOT_NFS=y
8740 +# CONFIG_NFSD is not set
8741 +# CONFIG_NFSD_V3 is not set
8742 +# CONFIG_NFSD_TCP is not set
8743 +CONFIG_SUNRPC=y
8744 +CONFIG_LOCKD=y
8745 +CONFIG_LOCKD_V4=y
8746 +# CONFIG_SMB_FS is not set
8747 +# CONFIG_NCP_FS is not set
8748 +# CONFIG_NCPFS_PACKET_SIGNING is not set
8749 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
8750 +# CONFIG_NCPFS_STRONG is not set
8751 +# CONFIG_NCPFS_NFS_NS is not set
8752 +# CONFIG_NCPFS_OS2_NS is not set
8753 +# CONFIG_NCPFS_SMALLDOS is not set
8754 +# CONFIG_NCPFS_NLS is not set
8755 +# CONFIG_NCPFS_EXTRAS is not set
8756 +# CONFIG_ZISOFS_FS is not set
8757 +
8758 +#
8759 +# Partition Types
8760 +#
8761 +# CONFIG_PARTITION_ADVANCED is not set
8762 +CONFIG_MSDOS_PARTITION=y
8763 +# CONFIG_SMB_NLS is not set
8764 +CONFIG_NLS=y
8765 +
8766 +#
8767 +# Native Language Support
8768 +#
8769 +CONFIG_NLS_DEFAULT="iso8859-1"
8770 +# CONFIG_NLS_CODEPAGE_437 is not set
8771 +# CONFIG_NLS_CODEPAGE_737 is not set
8772 +# CONFIG_NLS_CODEPAGE_775 is not set
8773 +# CONFIG_NLS_CODEPAGE_850 is not set
8774 +# CONFIG_NLS_CODEPAGE_852 is not set
8775 +# CONFIG_NLS_CODEPAGE_855 is not set
8776 +# CONFIG_NLS_CODEPAGE_857 is not set
8777 +# CONFIG_NLS_CODEPAGE_860 is not set
8778 +# CONFIG_NLS_CODEPAGE_861 is not set
8779 +# CONFIG_NLS_CODEPAGE_862 is not set
8780 +# CONFIG_NLS_CODEPAGE_863 is not set
8781 +# CONFIG_NLS_CODEPAGE_864 is not set
8782 +# CONFIG_NLS_CODEPAGE_865 is not set
8783 +# CONFIG_NLS_CODEPAGE_866 is not set
8784 +# CONFIG_NLS_CODEPAGE_869 is not set
8785 +# CONFIG_NLS_CODEPAGE_936 is not set
8786 +# CONFIG_NLS_CODEPAGE_950 is not set
8787 +# CONFIG_NLS_CODEPAGE_932 is not set
8788 +# CONFIG_NLS_CODEPAGE_949 is not set
8789 +# CONFIG_NLS_CODEPAGE_874 is not set
8790 +# CONFIG_NLS_ISO8859_8 is not set
8791 +# CONFIG_NLS_CODEPAGE_1250 is not set
8792 +# CONFIG_NLS_CODEPAGE_1251 is not set
8793 +# CONFIG_NLS_ISO8859_1 is not set
8794 +# CONFIG_NLS_ISO8859_2 is not set
8795 +# CONFIG_NLS_ISO8859_3 is not set
8796 +# CONFIG_NLS_ISO8859_4 is not set
8797 +# CONFIG_NLS_ISO8859_5 is not set
8798 +# CONFIG_NLS_ISO8859_6 is not set
8799 +# CONFIG_NLS_ISO8859_7 is not set
8800 +# CONFIG_NLS_ISO8859_9 is not set
8801 +# CONFIG_NLS_ISO8859_13 is not set
8802 +# CONFIG_NLS_ISO8859_14 is not set
8803 +# CONFIG_NLS_ISO8859_15 is not set
8804 +# CONFIG_NLS_KOI8_R is not set
8805 +# CONFIG_NLS_KOI8_U is not set
8806 +# CONFIG_NLS_UTF8 is not set
8807 +
8808 +#
8809 +# Multimedia devices
8810 +#
8811 +# CONFIG_VIDEO_DEV is not set
8812 +
8813 +#
8814 +# Console drivers
8815 +#
8816 +# CONFIG_VGA_CONSOLE is not set
8817 +# CONFIG_MDA_CONSOLE is not set
8818 +
8819 +#
8820 +# Frame-buffer support
8821 +#
8822 +CONFIG_FB=y
8823 +CONFIG_DUMMY_CONSOLE=y
8824 +# CONFIG_FB_RIVA is not set
8825 +# CONFIG_FB_CLGEN is not set
8826 +# CONFIG_FB_PM2 is not set
8827 +# CONFIG_FB_PM3 is not set
8828 +# CONFIG_FB_CYBER2000 is not set
8829 +# CONFIG_FB_MATROX is not set
8830 +# CONFIG_FB_ATY is not set
8831 +# CONFIG_FB_RADEON is not set
8832 +# CONFIG_FB_ATY128 is not set
8833 +# CONFIG_FB_INTEL is not set
8834 +# CONFIG_FB_SIS is not set
8835 +# CONFIG_FB_NEOMAGIC is not set
8836 +# CONFIG_FB_3DFX is not set
8837 +# CONFIG_FB_VOODOO1 is not set
8838 +# CONFIG_FB_TRIDENT is not set
8839 +# CONFIG_FB_E1356 is not set
8840 +# CONFIG_FB_IT8181 is not set
8841 +# CONFIG_FB_VIRTUAL is not set
8842 +CONFIG_FBCON_ADVANCED=y
8843 +# CONFIG_FBCON_MFB is not set
8844 +# CONFIG_FBCON_CFB2 is not set
8845 +# CONFIG_FBCON_CFB4 is not set
8846 +# CONFIG_FBCON_CFB8 is not set
8847 +CONFIG_FBCON_CFB16=y
8848 +# CONFIG_FBCON_CFB24 is not set
8849 +CONFIG_FBCON_CFB32=y
8850 +# CONFIG_FBCON_AFB is not set
8851 +# CONFIG_FBCON_ILBM is not set
8852 +# CONFIG_FBCON_IPLAN2P2 is not set
8853 +# CONFIG_FBCON_IPLAN2P4 is not set
8854 +# CONFIG_FBCON_IPLAN2P8 is not set
8855 +# CONFIG_FBCON_MAC is not set
8856 +# CONFIG_FBCON_VGA_PLANES is not set
8857 +# CONFIG_FBCON_VGA is not set
8858 +# CONFIG_FBCON_HGA is not set
8859 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
8860 +CONFIG_FBCON_FONTS=y
8861 +CONFIG_FONT_8x8=y
8862 +CONFIG_FONT_8x16=y
8863 +# CONFIG_FONT_SUN8x16 is not set
8864 +# CONFIG_FONT_SUN12x22 is not set
8865 +# CONFIG_FONT_6x11 is not set
8866 +# CONFIG_FONT_PEARL_8x8 is not set
8867 +# CONFIG_FONT_ACORN_8x8 is not set
8868 +
8869 +#
8870 +# Sound
8871 +#
8872 +CONFIG_SOUND=y
8873 +# CONFIG_SOUND_ALI5455 is not set
8874 +# CONFIG_SOUND_BT878 is not set
8875 +# CONFIG_SOUND_CMPCI is not set
8876 +# CONFIG_SOUND_EMU10K1 is not set
8877 +# CONFIG_MIDI_EMU10K1 is not set
8878 +# CONFIG_SOUND_FUSION is not set
8879 +# CONFIG_SOUND_CS4281 is not set
8880 +# CONFIG_SOUND_ES1370 is not set
8881 +# CONFIG_SOUND_ES1371 is not set
8882 +# CONFIG_SOUND_ESSSOLO1 is not set
8883 +# CONFIG_SOUND_MAESTRO is not set
8884 +# CONFIG_SOUND_MAESTRO3 is not set
8885 +# CONFIG_SOUND_FORTE is not set
8886 +# CONFIG_SOUND_ICH is not set
8887 +# CONFIG_SOUND_RME96XX is not set
8888 +# CONFIG_SOUND_SONICVIBES is not set
8889 +# CONFIG_SOUND_AU1X00 is not set
8890 +CONFIG_SOUND_AU1550_PSC=y
8891 +# CONFIG_SOUND_AU1550_I2S is not set
8892 +# CONFIG_SOUND_TRIDENT is not set
8893 +# CONFIG_SOUND_MSNDCLAS is not set
8894 +# CONFIG_SOUND_MSNDPIN is not set
8895 +# CONFIG_SOUND_VIA82CXXX is not set
8896 +# CONFIG_MIDI_VIA82CXXX is not set
8897 +# CONFIG_SOUND_OSS is not set
8898 +# CONFIG_SOUND_TVMIXER is not set
8899 +# CONFIG_SOUND_AD1980 is not set
8900 +# CONFIG_SOUND_WM97XX is not set
8901 +
8902 +#
8903 +# USB support
8904 +#
8905 +CONFIG_USB=y
8906 +# CONFIG_USB_DEBUG is not set
8907 +
8908 +#
8909 +# Miscellaneous USB options
8910 +#
8911 +CONFIG_USB_DEVICEFS=y
8912 +# CONFIG_USB_BANDWIDTH is not set
8913 +
8914 +#
8915 +# USB Host Controller Drivers
8916 +#
8917 +# CONFIG_USB_EHCI_HCD is not set
8918 +# CONFIG_USB_UHCI is not set
8919 +# CONFIG_USB_UHCI_ALT is not set
8920 +CONFIG_USB_OHCI=y
8921 +
8922 +#
8923 +# USB Device Class drivers
8924 +#
8925 +# CONFIG_USB_AUDIO is not set
8926 +# CONFIG_USB_EMI26 is not set
8927 +# CONFIG_USB_BLUETOOTH is not set
8928 +# CONFIG_USB_MIDI is not set
8929 +CONFIG_USB_STORAGE=y
8930 +# CONFIG_USB_STORAGE_DEBUG is not set
8931 +# CONFIG_USB_STORAGE_DATAFAB is not set
8932 +# CONFIG_USB_STORAGE_FREECOM is not set
8933 +# CONFIG_USB_STORAGE_ISD200 is not set
8934 +# CONFIG_USB_STORAGE_DPCM is not set
8935 +# CONFIG_USB_STORAGE_HP8200e is not set
8936 +# CONFIG_USB_STORAGE_SDDR09 is not set
8937 +# CONFIG_USB_STORAGE_SDDR55 is not set
8938 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
8939 +# CONFIG_USB_ACM is not set
8940 +# CONFIG_USB_PRINTER is not set
8941 +
8942 +#
8943 +# USB Human Interface Devices (HID)
8944 +#
8945 +CONFIG_USB_HID=y
8946 +CONFIG_USB_HIDINPUT=y
8947 +CONFIG_USB_HIDDEV=y
8948 +# CONFIG_USB_AIPTEK is not set
8949 +# CONFIG_USB_WACOM is not set
8950 +# CONFIG_USB_KBTAB is not set
8951 +# CONFIG_USB_POWERMATE is not set
8952 +
8953 +#
8954 +# USB Imaging devices
8955 +#
8956 +# CONFIG_USB_DC2XX is not set
8957 +# CONFIG_USB_MDC800 is not set
8958 +# CONFIG_USB_SCANNER is not set
8959 +# CONFIG_USB_MICROTEK is not set
8960 +# CONFIG_USB_HPUSBSCSI is not set
8961 +
8962 +#
8963 +# USB Multimedia devices
8964 +#
8965 +
8966 +#
8967 +# Video4Linux support is needed for USB Multimedia device support
8968 +#
8969 +
8970 +#
8971 +# USB Network adaptors
8972 +#
8973 +# CONFIG_USB_PEGASUS is not set
8974 +# CONFIG_USB_RTL8150 is not set
8975 +# CONFIG_USB_KAWETH is not set
8976 +# CONFIG_USB_CATC is not set
8977 +# CONFIG_USB_CDCETHER is not set
8978 +# CONFIG_USB_USBNET is not set
8979 +
8980 +#
8981 +# USB port drivers
8982 +#
8983 +# CONFIG_USB_USS720 is not set
8984 +
8985 +#
8986 +# USB Serial Converter support
8987 +#
8988 +# CONFIG_USB_SERIAL is not set
8989 +
8990 +#
8991 +# USB Miscellaneous drivers
8992 +#
8993 +# CONFIG_USB_RIO500 is not set
8994 +# CONFIG_USB_AUERSWALD is not set
8995 +# CONFIG_USB_TIGL is not set
8996 +# CONFIG_USB_BRLVGER is not set
8997 +# CONFIG_USB_LCD is not set
8998 +
8999 +#
9000 +# Support for USB gadgets
9001 +#
9002 +# CONFIG_USB_GADGET is not set
9003 +
9004 +#
9005 +# Bluetooth support
9006 +#
9007 +# CONFIG_BLUEZ is not set
9008 +
9009 +#
9010 +# Kernel hacking
9011 +#
9012 +CONFIG_CROSSCOMPILE=y
9013 +# CONFIG_RUNTIME_DEBUG is not set
9014 +# CONFIG_KGDB is not set
9015 +# CONFIG_GDB_CONSOLE is not set
9016 +# CONFIG_DEBUG_INFO is not set
9017 +# CONFIG_MAGIC_SYSRQ is not set
9018 +# CONFIG_MIPS_UNCACHED is not set
9019 +CONFIG_LOG_BUF_SHIFT=0
9020 +
9021 +#
9022 +# Cryptographic options
9023 +#
9024 +# CONFIG_CRYPTO is not set
9025 +
9026 +#
9027 +# Library routines
9028 +#
9029 +# CONFIG_CRC32 is not set
9030 +CONFIG_ZLIB_INFLATE=m
9031 +CONFIG_ZLIB_DEFLATE=m
9032 +# CONFIG_FW_LOADER is not set
9033 Index: linux-2.4.35.4/arch/mips/defconfig-pb1500
9034 ===================================================================
9035 --- linux-2.4.35.4.orig/arch/mips/defconfig-pb1500 2007-12-15 05:19:43.394893972 +0100
9036 +++ linux-2.4.35.4/arch/mips/defconfig-pb1500 2007-12-15 05:19:44.850976948 +0100
9037 @@ -30,8 +30,8 @@
9038 # CONFIG_MIPS_PB1000 is not set
9039 # CONFIG_MIPS_PB1100 is not set
9040 CONFIG_MIPS_PB1500=y
9041 -# CONFIG_MIPS_HYDROGEN3 is not set
9042 # CONFIG_MIPS_PB1550 is not set
9043 +# CONFIG_MIPS_HYDROGEN3 is not set
9044 # CONFIG_MIPS_XXS1500 is not set
9045 # CONFIG_MIPS_MTX1 is not set
9046 # CONFIG_COGENT_CSB250 is not set
9047 @@ -215,9 +215,7 @@
9048 # CONFIG_MTD_MTX1 is not set
9049 CONFIG_MTD_PB1500_BOOT=y
9050 # CONFIG_MTD_PB1500_USER is not set
9051 -# CONFIG_MTD_DB1X00 is not set
9052 # CONFIG_MTD_PB1550 is not set
9053 -# CONFIG_MTD_HYDROGEN3 is not set
9054 # CONFIG_MTD_MIRAGE is not set
9055 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9056 # CONFIG_MTD_OCELOT is not set
9057 @@ -236,7 +234,6 @@
9058 #
9059 # Disk-On-Chip Device Drivers
9060 #
9061 -# CONFIG_MTD_DOC1000 is not set
9062 # CONFIG_MTD_DOC2000 is not set
9063 # CONFIG_MTD_DOC2001 is not set
9064 # CONFIG_MTD_DOCPROBE is not set
9065 @@ -341,11 +338,6 @@
9066 #
9067 # CONFIG_IPX is not set
9068 # CONFIG_ATALK is not set
9069 -
9070 -#
9071 -# Appletalk devices
9072 -#
9073 -# CONFIG_DEV_APPLETALK is not set
9074 # CONFIG_DECNET is not set
9075 # CONFIG_BRIDGE is not set
9076 # CONFIG_X25 is not set
9077 @@ -675,7 +667,6 @@
9078 # CONFIG_AU1X00_USB_TTY is not set
9079 # CONFIG_AU1X00_USB_RAW is not set
9080 # CONFIG_TXX927_SERIAL is not set
9081 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9082 CONFIG_UNIX98_PTYS=y
9083 CONFIG_UNIX98_PTY_COUNT=256
9084
9085 Index: linux-2.4.35.4/arch/mips/defconfig-pb1550
9086 ===================================================================
9087 --- linux-2.4.35.4.orig/arch/mips/defconfig-pb1550 2007-12-15 05:19:43.402894428 +0100
9088 +++ linux-2.4.35.4/arch/mips/defconfig-pb1550 2007-12-15 05:19:44.854977177 +0100
9089 @@ -30,8 +30,8 @@
9090 # CONFIG_MIPS_PB1000 is not set
9091 # CONFIG_MIPS_PB1100 is not set
9092 # CONFIG_MIPS_PB1500 is not set
9093 -# CONFIG_MIPS_HYDROGEN3 is not set
9094 CONFIG_MIPS_PB1550=y
9095 +# CONFIG_MIPS_HYDROGEN3 is not set
9096 # CONFIG_MIPS_XXS1500 is not set
9097 # CONFIG_MIPS_MTX1 is not set
9098 # CONFIG_COGENT_CSB250 is not set
9099 @@ -213,11 +213,9 @@
9100 # CONFIG_MTD_BOSPORUS is not set
9101 # CONFIG_MTD_XXS1500 is not set
9102 # CONFIG_MTD_MTX1 is not set
9103 -# CONFIG_MTD_DB1X00 is not set
9104 CONFIG_MTD_PB1550=y
9105 CONFIG_MTD_PB1550_BOOT=y
9106 CONFIG_MTD_PB1550_USER=y
9107 -# CONFIG_MTD_HYDROGEN3 is not set
9108 # CONFIG_MTD_MIRAGE is not set
9109 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9110 # CONFIG_MTD_OCELOT is not set
9111 @@ -236,7 +234,6 @@
9112 #
9113 # Disk-On-Chip Device Drivers
9114 #
9115 -# CONFIG_MTD_DOC1000 is not set
9116 # CONFIG_MTD_DOC2000 is not set
9117 # CONFIG_MTD_DOC2001 is not set
9118 # CONFIG_MTD_DOCPROBE is not set
9119 @@ -343,11 +340,6 @@
9120 #
9121 # CONFIG_IPX is not set
9122 # CONFIG_ATALK is not set
9123 -
9124 -#
9125 -# Appletalk devices
9126 -#
9127 -# CONFIG_DEV_APPLETALK is not set
9128 # CONFIG_DECNET is not set
9129 # CONFIG_BRIDGE is not set
9130 # CONFIG_X25 is not set
9131 @@ -633,7 +625,6 @@
9132 # CONFIG_AU1X00_USB_TTY is not set
9133 # CONFIG_AU1X00_USB_RAW is not set
9134 # CONFIG_TXX927_SERIAL is not set
9135 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9136 CONFIG_UNIX98_PTYS=y
9137 CONFIG_UNIX98_PTY_COUNT=256
9138
9139 Index: linux-2.4.35.4/arch/mips/defconfig-rbtx4927
9140 ===================================================================
9141 --- linux-2.4.35.4.orig/arch/mips/defconfig-rbtx4927 2007-12-15 05:19:43.406894657 +0100
9142 +++ linux-2.4.35.4/arch/mips/defconfig-rbtx4927 2007-12-15 05:19:44.854977177 +0100
9143 @@ -28,8 +28,8 @@
9144 # CONFIG_MIPS_PB1000 is not set
9145 # CONFIG_MIPS_PB1100 is not set
9146 # CONFIG_MIPS_PB1500 is not set
9147 -# CONFIG_MIPS_HYDROGEN3 is not set
9148 # CONFIG_MIPS_PB1550 is not set
9149 +# CONFIG_MIPS_HYDROGEN3 is not set
9150 # CONFIG_MIPS_XXS1500 is not set
9151 # CONFIG_MIPS_MTX1 is not set
9152 # CONFIG_COGENT_CSB250 is not set
9153 @@ -223,11 +223,6 @@
9154 #
9155 # CONFIG_IPX is not set
9156 # CONFIG_ATALK is not set
9157 -
9158 -#
9159 -# Appletalk devices
9160 -#
9161 -# CONFIG_DEV_APPLETALK is not set
9162 # CONFIG_DECNET is not set
9163 # CONFIG_BRIDGE is not set
9164 # CONFIG_X25 is not set
9165 @@ -466,7 +461,6 @@
9166 CONFIG_SERIAL_TXX9=y
9167 CONFIG_SERIAL_TXX9_CONSOLE=y
9168 # CONFIG_TXX927_SERIAL is not set
9169 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9170 # CONFIG_UNIX98_PTYS is not set
9171
9172 #
9173 Index: linux-2.4.35.4/arch/mips/defconfig-rm200
9174 ===================================================================
9175 --- linux-2.4.35.4.orig/arch/mips/defconfig-rm200 2007-12-15 05:19:43.414895112 +0100
9176 +++ linux-2.4.35.4/arch/mips/defconfig-rm200 2007-12-15 05:19:44.854977177 +0100
9177 @@ -30,8 +30,8 @@
9178 # CONFIG_MIPS_PB1000 is not set
9179 # CONFIG_MIPS_PB1100 is not set
9180 # CONFIG_MIPS_PB1500 is not set
9181 -# CONFIG_MIPS_HYDROGEN3 is not set
9182 # CONFIG_MIPS_PB1550 is not set
9183 +# CONFIG_MIPS_HYDROGEN3 is not set
9184 # CONFIG_MIPS_XXS1500 is not set
9185 # CONFIG_MIPS_MTX1 is not set
9186 # CONFIG_COGENT_CSB250 is not set
9187 @@ -229,11 +229,6 @@
9188 #
9189 # CONFIG_IPX is not set
9190 # CONFIG_ATALK is not set
9191 -
9192 -#
9193 -# Appletalk devices
9194 -#
9195 -# CONFIG_DEV_APPLETALK is not set
9196 # CONFIG_DECNET is not set
9197 # CONFIG_BRIDGE is not set
9198 # CONFIG_X25 is not set
9199 @@ -340,7 +335,6 @@
9200 # CONFIG_SERIAL is not set
9201 # CONFIG_SERIAL_EXTENDED is not set
9202 # CONFIG_SERIAL_NONSTANDARD is not set
9203 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9204 CONFIG_UNIX98_PTYS=y
9205 CONFIG_UNIX98_PTY_COUNT=256
9206
9207 Index: linux-2.4.35.4/arch/mips/defconfig-sb1250-swarm
9208 ===================================================================
9209 --- linux-2.4.35.4.orig/arch/mips/defconfig-sb1250-swarm 2007-12-15 05:19:43.422895567 +0100
9210 +++ linux-2.4.35.4/arch/mips/defconfig-sb1250-swarm 2007-12-15 05:19:44.854977177 +0100
9211 @@ -30,8 +30,8 @@
9212 # CONFIG_MIPS_PB1000 is not set
9213 # CONFIG_MIPS_PB1100 is not set
9214 # CONFIG_MIPS_PB1500 is not set
9215 -# CONFIG_MIPS_HYDROGEN3 is not set
9216 # CONFIG_MIPS_PB1550 is not set
9217 +# CONFIG_MIPS_HYDROGEN3 is not set
9218 # CONFIG_MIPS_XXS1500 is not set
9219 # CONFIG_MIPS_MTX1 is not set
9220 # CONFIG_COGENT_CSB250 is not set
9221 @@ -90,6 +90,7 @@
9222 # CONFIG_SIBYTE_TBPROF is not set
9223 CONFIG_SIBYTE_GENBUS_IDE=y
9224 CONFIG_SMP_CAPABLE=y
9225 +CONFIG_MIPS_RTC=y
9226 # CONFIG_SNI_RM200_PCI is not set
9227 # CONFIG_TANBAC_TB0226 is not set
9228 # CONFIG_TANBAC_TB0229 is not set
9229 @@ -253,11 +254,6 @@
9230 #
9231 # CONFIG_IPX is not set
9232 # CONFIG_ATALK is not set
9233 -
9234 -#
9235 -# Appletalk devices
9236 -#
9237 -# CONFIG_DEV_APPLETALK is not set
9238 # CONFIG_DECNET is not set
9239 # CONFIG_BRIDGE is not set
9240 # CONFIG_X25 is not set
9241 @@ -469,7 +465,6 @@
9242 CONFIG_SIBYTE_SB1250_DUART=y
9243 CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
9244 CONFIG_SERIAL_CONSOLE=y
9245 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9246 CONFIG_UNIX98_PTYS=y
9247 CONFIG_UNIX98_PTY_COUNT=256
9248
9249 Index: linux-2.4.35.4/arch/mips/defconfig-sead
9250 ===================================================================
9251 --- linux-2.4.35.4.orig/arch/mips/defconfig-sead 2007-12-15 05:19:43.430896023 +0100
9252 +++ linux-2.4.35.4/arch/mips/defconfig-sead 2007-12-15 05:19:44.854977177 +0100
9253 @@ -28,8 +28,8 @@
9254 # CONFIG_MIPS_PB1000 is not set
9255 # CONFIG_MIPS_PB1100 is not set
9256 # CONFIG_MIPS_PB1500 is not set
9257 -# CONFIG_MIPS_HYDROGEN3 is not set
9258 # CONFIG_MIPS_PB1550 is not set
9259 +# CONFIG_MIPS_HYDROGEN3 is not set
9260 # CONFIG_MIPS_XXS1500 is not set
9261 # CONFIG_MIPS_MTX1 is not set
9262 # CONFIG_COGENT_CSB250 is not set
9263 @@ -244,7 +244,6 @@
9264 CONFIG_SERIAL_CONSOLE=y
9265 # CONFIG_SERIAL_EXTENDED is not set
9266 # CONFIG_SERIAL_NONSTANDARD is not set
9267 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9268 # CONFIG_UNIX98_PTYS is not set
9269
9270 #
9271 Index: linux-2.4.35.4/arch/mips/defconfig-stretch
9272 ===================================================================
9273 --- linux-2.4.35.4.orig/arch/mips/defconfig-stretch 2007-12-15 05:19:43.438896481 +0100
9274 +++ linux-2.4.35.4/arch/mips/defconfig-stretch 2007-12-15 05:19:44.858977407 +0100
9275 @@ -30,8 +30,8 @@
9276 # CONFIG_MIPS_PB1000 is not set
9277 # CONFIG_MIPS_PB1100 is not set
9278 # CONFIG_MIPS_PB1500 is not set
9279 -# CONFIG_MIPS_HYDROGEN3 is not set
9280 # CONFIG_MIPS_PB1550 is not set
9281 +# CONFIG_MIPS_HYDROGEN3 is not set
9282 # CONFIG_MIPS_XXS1500 is not set
9283 # CONFIG_MIPS_MTX1 is not set
9284 # CONFIG_COGENT_CSB250 is not set
9285 @@ -240,11 +240,6 @@
9286 #
9287 # CONFIG_IPX is not set
9288 # CONFIG_ATALK is not set
9289 -
9290 -#
9291 -# Appletalk devices
9292 -#
9293 -# CONFIG_DEV_APPLETALK is not set
9294 # CONFIG_DECNET is not set
9295 # CONFIG_BRIDGE is not set
9296 # CONFIG_X25 is not set
9297 @@ -324,9 +319,11 @@
9298 # CONFIG_SCSI_MEGARAID is not set
9299 # CONFIG_SCSI_MEGARAID2 is not set
9300 # CONFIG_SCSI_SATA is not set
9301 +# CONFIG_SCSI_SATA_AHCI is not set
9302 # CONFIG_SCSI_SATA_SVW is not set
9303 # CONFIG_SCSI_ATA_PIIX is not set
9304 # CONFIG_SCSI_SATA_NV is not set
9305 +# CONFIG_SCSI_SATA_QSTOR is not set
9306 # CONFIG_SCSI_SATA_PROMISE is not set
9307 # CONFIG_SCSI_SATA_SX4 is not set
9308 # CONFIG_SCSI_SATA_SIL is not set
9309 @@ -516,7 +513,6 @@
9310 # CONFIG_SERIAL_TXX9 is not set
9311 # CONFIG_SERIAL_TXX9_CONSOLE is not set
9312 # CONFIG_TXX927_SERIAL is not set
9313 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9314 CONFIG_UNIX98_PTYS=y
9315 CONFIG_UNIX98_PTY_COUNT=256
9316
9317 Index: linux-2.4.35.4/arch/mips/defconfig-tb0226
9318 ===================================================================
9319 --- linux-2.4.35.4.orig/arch/mips/defconfig-tb0226 2007-12-15 05:19:43.442896707 +0100
9320 +++ linux-2.4.35.4/arch/mips/defconfig-tb0226 2007-12-15 05:19:44.858977407 +0100
9321 @@ -30,8 +30,8 @@
9322 # CONFIG_MIPS_PB1000 is not set
9323 # CONFIG_MIPS_PB1100 is not set
9324 # CONFIG_MIPS_PB1500 is not set
9325 -# CONFIG_MIPS_HYDROGEN3 is not set
9326 # CONFIG_MIPS_PB1550 is not set
9327 +# CONFIG_MIPS_HYDROGEN3 is not set
9328 # CONFIG_MIPS_XXS1500 is not set
9329 # CONFIG_MIPS_MTX1 is not set
9330 # CONFIG_COGENT_CSB250 is not set
9331 @@ -228,11 +228,6 @@
9332 #
9333 # CONFIG_IPX is not set
9334 # CONFIG_ATALK is not set
9335 -
9336 -#
9337 -# Appletalk devices
9338 -#
9339 -# CONFIG_DEV_APPLETALK is not set
9340 # CONFIG_DECNET is not set
9341 # CONFIG_BRIDGE is not set
9342 # CONFIG_X25 is not set
9343 @@ -312,9 +307,11 @@
9344 # CONFIG_SCSI_MEGARAID is not set
9345 # CONFIG_SCSI_MEGARAID2 is not set
9346 # CONFIG_SCSI_SATA is not set
9347 +# CONFIG_SCSI_SATA_AHCI is not set
9348 # CONFIG_SCSI_SATA_SVW is not set
9349 # CONFIG_SCSI_ATA_PIIX is not set
9350 # CONFIG_SCSI_SATA_NV is not set
9351 +# CONFIG_SCSI_SATA_QSTOR is not set
9352 # CONFIG_SCSI_SATA_PROMISE is not set
9353 # CONFIG_SCSI_SATA_SX4 is not set
9354 # CONFIG_SCSI_SATA_SIL is not set
9355 @@ -518,7 +515,6 @@
9356 CONFIG_SERIAL_CONSOLE=y
9357 # CONFIG_SERIAL_EXTENDED is not set
9358 # CONFIG_SERIAL_NONSTANDARD is not set
9359 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9360 # CONFIG_VR41XX_KIU is not set
9361 CONFIG_UNIX98_PTYS=y
9362 CONFIG_UNIX98_PTY_COUNT=256
9363 Index: linux-2.4.35.4/arch/mips/defconfig-tb0229
9364 ===================================================================
9365 --- linux-2.4.35.4.orig/arch/mips/defconfig-tb0229 2007-12-15 05:19:43.450897163 +0100
9366 +++ linux-2.4.35.4/arch/mips/defconfig-tb0229 2007-12-15 05:19:44.858977407 +0100
9367 @@ -30,8 +30,8 @@
9368 # CONFIG_MIPS_PB1000 is not set
9369 # CONFIG_MIPS_PB1100 is not set
9370 # CONFIG_MIPS_PB1500 is not set
9371 -# CONFIG_MIPS_HYDROGEN3 is not set
9372 # CONFIG_MIPS_PB1550 is not set
9373 +# CONFIG_MIPS_HYDROGEN3 is not set
9374 # CONFIG_MIPS_XXS1500 is not set
9375 # CONFIG_MIPS_MTX1 is not set
9376 # CONFIG_COGENT_CSB250 is not set
9377 @@ -230,11 +230,6 @@
9378 #
9379 # CONFIG_IPX is not set
9380 # CONFIG_ATALK is not set
9381 -
9382 -#
9383 -# Appletalk devices
9384 -#
9385 -# CONFIG_DEV_APPLETALK is not set
9386 # CONFIG_DECNET is not set
9387 # CONFIG_BRIDGE is not set
9388 # CONFIG_X25 is not set
9389 @@ -445,7 +440,6 @@
9390 CONFIG_SERIAL_CONSOLE=y
9391 # CONFIG_SERIAL_EXTENDED is not set
9392 # CONFIG_SERIAL_NONSTANDARD is not set
9393 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9394 # CONFIG_VR41XX_KIU is not set
9395 CONFIG_UNIX98_PTYS=y
9396 CONFIG_UNIX98_PTY_COUNT=256
9397 Index: linux-2.4.35.4/arch/mips/defconfig-ti1500
9398 ===================================================================
9399 --- linux-2.4.35.4.orig/arch/mips/defconfig-ti1500 2007-12-15 05:19:43.458897621 +0100
9400 +++ linux-2.4.35.4/arch/mips/defconfig-ti1500 2007-12-15 05:19:44.858977407 +0100
9401 @@ -30,8 +30,8 @@
9402 # CONFIG_MIPS_PB1000 is not set
9403 # CONFIG_MIPS_PB1100 is not set
9404 # CONFIG_MIPS_PB1500 is not set
9405 -# CONFIG_MIPS_HYDROGEN3 is not set
9406 # CONFIG_MIPS_PB1550 is not set
9407 +# CONFIG_MIPS_HYDROGEN3 is not set
9408 CONFIG_MIPS_XXS1500=y
9409 # CONFIG_MIPS_MTX1 is not set
9410 # CONFIG_COGENT_CSB250 is not set
9411 @@ -213,9 +213,7 @@
9412 # CONFIG_MTD_BOSPORUS is not set
9413 CONFIG_MTD_XXS1500=y
9414 # CONFIG_MTD_MTX1 is not set
9415 -# CONFIG_MTD_DB1X00 is not set
9416 # CONFIG_MTD_PB1550 is not set
9417 -# CONFIG_MTD_HYDROGEN3 is not set
9418 # CONFIG_MTD_MIRAGE is not set
9419 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9420 # CONFIG_MTD_OCELOT is not set
9421 @@ -234,7 +232,6 @@
9422 #
9423 # Disk-On-Chip Device Drivers
9424 #
9425 -# CONFIG_MTD_DOC1000 is not set
9426 # CONFIG_MTD_DOC2000 is not set
9427 # CONFIG_MTD_DOC2001 is not set
9428 # CONFIG_MTD_DOCPROBE is not set
9429 @@ -339,11 +336,6 @@
9430 #
9431 # CONFIG_IPX is not set
9432 # CONFIG_ATALK is not set
9433 -
9434 -#
9435 -# Appletalk devices
9436 -#
9437 -# CONFIG_DEV_APPLETALK is not set
9438 # CONFIG_DECNET is not set
9439 # CONFIG_BRIDGE is not set
9440 # CONFIG_X25 is not set
9441 @@ -600,7 +592,6 @@
9442 # CONFIG_AU1X00_USB_TTY is not set
9443 # CONFIG_AU1X00_USB_RAW is not set
9444 # CONFIG_TXX927_SERIAL is not set
9445 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9446 CONFIG_UNIX98_PTYS=y
9447 CONFIG_UNIX98_PTY_COUNT=256
9448
9449 Index: linux-2.4.35.4/arch/mips/defconfig-workpad
9450 ===================================================================
9451 --- linux-2.4.35.4.orig/arch/mips/defconfig-workpad 2007-12-15 05:19:43.466898076 +0100
9452 +++ linux-2.4.35.4/arch/mips/defconfig-workpad 2007-12-15 05:19:44.862977633 +0100
9453 @@ -30,8 +30,8 @@
9454 # CONFIG_MIPS_PB1000 is not set
9455 # CONFIG_MIPS_PB1100 is not set
9456 # CONFIG_MIPS_PB1500 is not set
9457 -# CONFIG_MIPS_HYDROGEN3 is not set
9458 # CONFIG_MIPS_PB1550 is not set
9459 +# CONFIG_MIPS_HYDROGEN3 is not set
9460 # CONFIG_MIPS_XXS1500 is not set
9461 # CONFIG_MIPS_MTX1 is not set
9462 # CONFIG_COGENT_CSB250 is not set
9463 @@ -222,11 +222,6 @@
9464 #
9465 # CONFIG_IPX is not set
9466 # CONFIG_ATALK is not set
9467 -
9468 -#
9469 -# Appletalk devices
9470 -#
9471 -# CONFIG_DEV_APPLETALK is not set
9472 # CONFIG_DECNET is not set
9473 # CONFIG_BRIDGE is not set
9474 # CONFIG_X25 is not set
9475 @@ -426,7 +421,6 @@
9476 # CONFIG_SERIAL_MULTIPORT is not set
9477 # CONFIG_HUB6 is not set
9478 # CONFIG_SERIAL_NONSTANDARD is not set
9479 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9480 # CONFIG_VR41XX_KIU is not set
9481 CONFIG_UNIX98_PTYS=y
9482 CONFIG_UNIX98_PTY_COUNT=256
9483 Index: linux-2.4.35.4/arch/mips/defconfig-xxs1500
9484 ===================================================================
9485 --- linux-2.4.35.4.orig/arch/mips/defconfig-xxs1500 2007-12-15 05:19:43.474898531 +0100
9486 +++ linux-2.4.35.4/arch/mips/defconfig-xxs1500 2007-12-15 05:19:44.862977633 +0100
9487 @@ -30,8 +30,8 @@
9488 # CONFIG_MIPS_PB1000 is not set
9489 # CONFIG_MIPS_PB1100 is not set
9490 # CONFIG_MIPS_PB1500 is not set
9491 -# CONFIG_MIPS_HYDROGEN3 is not set
9492 # CONFIG_MIPS_PB1550 is not set
9493 +# CONFIG_MIPS_HYDROGEN3 is not set
9494 CONFIG_MIPS_XXS1500=y
9495 # CONFIG_MIPS_MTX1 is not set
9496 # CONFIG_COGENT_CSB250 is not set
9497 @@ -213,9 +213,7 @@
9498 # CONFIG_MTD_BOSPORUS is not set
9499 CONFIG_MTD_XXS1500=y
9500 # CONFIG_MTD_MTX1 is not set
9501 -# CONFIG_MTD_DB1X00 is not set
9502 # CONFIG_MTD_PB1550 is not set
9503 -# CONFIG_MTD_HYDROGEN3 is not set
9504 # CONFIG_MTD_MIRAGE is not set
9505 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9506 # CONFIG_MTD_OCELOT is not set
9507 @@ -234,7 +232,6 @@
9508 #
9509 # Disk-On-Chip Device Drivers
9510 #
9511 -# CONFIG_MTD_DOC1000 is not set
9512 # CONFIG_MTD_DOC2000 is not set
9513 # CONFIG_MTD_DOC2001 is not set
9514 # CONFIG_MTD_DOCPROBE is not set
9515 @@ -339,11 +336,6 @@
9516 #
9517 # CONFIG_IPX is not set
9518 # CONFIG_ATALK is not set
9519 -
9520 -#
9521 -# Appletalk devices
9522 -#
9523 -# CONFIG_DEV_APPLETALK is not set
9524 # CONFIG_DECNET is not set
9525 # CONFIG_BRIDGE is not set
9526 # CONFIG_X25 is not set
9527 @@ -671,7 +663,6 @@
9528 # CONFIG_AU1X00_USB_TTY is not set
9529 # CONFIG_AU1X00_USB_RAW is not set
9530 # CONFIG_TXX927_SERIAL is not set
9531 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9532 CONFIG_UNIX98_PTYS=y
9533 CONFIG_UNIX98_PTY_COUNT=256
9534
9535 Index: linux-2.4.35.4/arch/mips/defconfig-yosemite
9536 ===================================================================
9537 --- linux-2.4.35.4.orig/arch/mips/defconfig-yosemite 2007-12-15 05:19:43.478898761 +0100
9538 +++ linux-2.4.35.4/arch/mips/defconfig-yosemite 2007-12-15 05:19:44.862977633 +0100
9539 @@ -30,8 +30,8 @@
9540 # CONFIG_MIPS_PB1000 is not set
9541 # CONFIG_MIPS_PB1100 is not set
9542 # CONFIG_MIPS_PB1500 is not set
9543 -# CONFIG_MIPS_HYDROGEN3 is not set
9544 # CONFIG_MIPS_PB1550 is not set
9545 +# CONFIG_MIPS_HYDROGEN3 is not set
9546 # CONFIG_MIPS_XXS1500 is not set
9547 # CONFIG_MIPS_MTX1 is not set
9548 # CONFIG_COGENT_CSB250 is not set
9549 @@ -227,11 +227,6 @@
9550 #
9551 # CONFIG_IPX is not set
9552 # CONFIG_ATALK is not set
9553 -
9554 -#
9555 -# Appletalk devices
9556 -#
9557 -# CONFIG_DEV_APPLETALK is not set
9558 # CONFIG_DECNET is not set
9559 # CONFIG_BRIDGE is not set
9560 # CONFIG_X25 is not set
9561 @@ -310,9 +305,11 @@
9562 # CONFIG_SCSI_MEGARAID is not set
9563 # CONFIG_SCSI_MEGARAID2 is not set
9564 # CONFIG_SCSI_SATA is not set
9565 +# CONFIG_SCSI_SATA_AHCI is not set
9566 # CONFIG_SCSI_SATA_SVW is not set
9567 # CONFIG_SCSI_ATA_PIIX is not set
9568 # CONFIG_SCSI_SATA_NV is not set
9569 +# CONFIG_SCSI_SATA_QSTOR is not set
9570 # CONFIG_SCSI_SATA_PROMISE is not set
9571 # CONFIG_SCSI_SATA_SX4 is not set
9572 # CONFIG_SCSI_SATA_SIL is not set
9573 @@ -477,7 +474,6 @@
9574 # CONFIG_SERIAL_TXX9 is not set
9575 # CONFIG_SERIAL_TXX9_CONSOLE is not set
9576 # CONFIG_TXX927_SERIAL is not set
9577 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9578 CONFIG_UNIX98_PTYS=y
9579 CONFIG_UNIX98_PTY_COUNT=256
9580
9581 Index: linux-2.4.35.4/arch/mips/kernel/cpu-probe.c
9582 ===================================================================
9583 --- linux-2.4.35.4.orig/arch/mips/kernel/cpu-probe.c 2007-12-15 05:19:43.486899216 +0100
9584 +++ linux-2.4.35.4/arch/mips/kernel/cpu-probe.c 2007-12-15 05:19:44.862977633 +0100
9585 @@ -34,21 +34,16 @@
9586 ".set\tmips0");
9587 }
9588
9589 -/* The Au1xxx wait is available only if we run CONFIG_PM and
9590 - * the timer setup found we had a 32KHz counter available.
9591 - * There are still problems with functions that may call au1k_wait
9592 - * directly, but that will be discovered pretty quickly.
9593 - */
9594 -extern void (*au1k_wait_ptr)(void);
9595 -void au1k_wait(void)
9596 +/* The Au1xxx wait is available only if using 32khz counter or
9597 + * external timer source, but specifically not CP0 Counter. */
9598 +int allow_au1k_wait;
9599 +
9600 +static void au1k_wait(void)
9601 {
9602 -#ifdef CONFIG_PM
9603 - unsigned long addr;
9604 /* using the wait instruction makes CP0 counter unusable */
9605 - __asm__("la %0,au1k_wait\n\t"
9606 - ".set mips3\n\t"
9607 - "cache 0x14,0(%0)\n\t"
9608 - "cache 0x14,32(%0)\n\t"
9609 + __asm__(".set mips3\n\t"
9610 + "cache 0x14, 0(%0)\n\t"
9611 + "cache 0x14, 32(%0)\n\t"
9612 "sync\n\t"
9613 "nop\n\t"
9614 "wait\n\t"
9615 @@ -57,11 +52,7 @@
9616 "nop\n\t"
9617 "nop\n\t"
9618 ".set mips0\n\t"
9619 - : : "r" (addr));
9620 -#else
9621 - __asm__("nop\n\t"
9622 - "nop");
9623 -#endif
9624 + : : "r" (au1k_wait));
9625 }
9626
9627 static inline void check_wait(void)
9628 @@ -100,20 +91,17 @@
9629 cpu_wait = r4k_wait;
9630 printk(" available.\n");
9631 break;
9632 -#ifdef CONFIG_PM
9633 case CPU_AU1000:
9634 case CPU_AU1100:
9635 case CPU_AU1500:
9636 case CPU_AU1550:
9637 - if (au1k_wait_ptr != NULL) {
9638 - cpu_wait = au1k_wait_ptr;
9639 + case CPU_AU1200:
9640 + if (allow_au1k_wait) {
9641 + cpu_wait = au1k_wait;
9642 printk(" available.\n");
9643 - }
9644 - else {
9645 + } else
9646 printk(" unavailable.\n");
9647 - }
9648 break;
9649 -#endif
9650 default:
9651 printk(" unavailable.\n");
9652 break;
9653 Index: linux-2.4.35.4/arch/mips/kernel/head.S
9654 ===================================================================
9655 --- linux-2.4.35.4.orig/arch/mips/kernel/head.S 2007-12-15 05:19:43.494899671 +0100
9656 +++ linux-2.4.35.4/arch/mips/kernel/head.S 2007-12-15 05:19:44.866977862 +0100
9657 @@ -43,9 +43,9 @@
9658
9659 /* Cache Error */
9660 LEAF(except_vec2_generic)
9661 + .set push
9662 .set noreorder
9663 .set noat
9664 - .set mips0
9665 /*
9666 * This is a very bad place to be. Our cache error
9667 * detection has triggered. If we have write-back data
9668 @@ -64,10 +64,9 @@
9669
9670 j cache_parity_error
9671 nop
9672 + .set pop
9673 END(except_vec2_generic)
9674
9675 - .set at
9676 -
9677 /*
9678 * Special interrupt vector for embedded MIPS. This is a
9679 * dedicated interrupt vector which reduces interrupt processing
9680 @@ -76,8 +75,11 @@
9681 * size!
9682 */
9683 NESTED(except_vec4, 0, sp)
9684 + .set push
9685 + .set noreorder
9686 1: j 1b /* Dummy, will be replaced */
9687 nop
9688 + .set pop
9689 END(except_vec4)
9690
9691 /*
9692 @@ -87,8 +89,11 @@
9693 * unconditional jump to this vector.
9694 */
9695 NESTED(except_vec_ejtag_debug, 0, sp)
9696 + .set push
9697 + .set noreorder
9698 j ejtag_debug_handler
9699 nop
9700 + .set pop
9701 END(except_vec_ejtag_debug)
9702
9703 __FINIT
9704 @@ -97,6 +102,7 @@
9705 * EJTAG debug exception handler.
9706 */
9707 NESTED(ejtag_debug_handler, PT_SIZE, sp)
9708 + .set push
9709 .set noat
9710 .set noreorder
9711 mtc0 k0, CP0_DESAVE
9712 @@ -120,7 +126,7 @@
9713 deret
9714 .set mips0
9715 nop
9716 - .set at
9717 + .set pop
9718 END(ejtag_debug_handler)
9719
9720 __INIT
9721 @@ -132,13 +138,17 @@
9722 * unconditional jump to this vector.
9723 */
9724 NESTED(except_vec_nmi, 0, sp)
9725 + .set push
9726 + .set noreorder
9727 j nmi_handler
9728 nop
9729 + .set pop
9730 END(except_vec_nmi)
9731
9732 __FINIT
9733
9734 NESTED(nmi_handler, PT_SIZE, sp)
9735 + .set push
9736 .set noat
9737 .set noreorder
9738 .set mips3
9739 @@ -147,8 +157,7 @@
9740 move a0, sp
9741 RESTORE_ALL
9742 eret
9743 - .set at
9744 - .set mips0
9745 + .set pop
9746 END(nmi_handler)
9747
9748 __INIT
9749 @@ -157,7 +166,20 @@
9750 * Kernel entry point
9751 */
9752 NESTED(kernel_entry, 16, sp)
9753 + .set push
9754 + /*
9755 + * For the moment disable interrupts and mark the kernel mode.
9756 + * A full initialization of the CPU's status register is done
9757 + * later in per_cpu_trap_init().
9758 + */
9759 + mfc0 t0, CP0_STATUS
9760 + or t0, ST0_CU0|0x1f
9761 + xor t0, 0x1f
9762 + mtc0 t0, CP0_STATUS
9763 +
9764 .set noreorder
9765 + sll zero,3 # ehb
9766 + .set reorder
9767
9768 /*
9769 * The firmware/bootloader passes argc/argp/envp
9770 @@ -170,8 +192,8 @@
9771 la t1, (_end - 4)
9772 1:
9773 addiu t0, 4
9774 + sw zero, (t0)
9775 bne t0, t1, 1b
9776 - sw zero, (t0)
9777
9778 /*
9779 * Stack for kernel and init, current variable
9780 @@ -182,7 +204,7 @@
9781 sw t0, kernelsp
9782
9783 jal init_arch
9784 - nop
9785 + .set pop
9786 END(kernel_entry)
9787
9788
9789 @@ -193,17 +215,26 @@
9790 * function after setting up the stack and gp registers.
9791 */
9792 LEAF(smp_bootstrap)
9793 - .set push
9794 - .set noreorder
9795 - mtc0 zero, CP0_WIRED
9796 - CLI
9797 + .set push
9798 + /*
9799 + * For the moment disable interrupts and bootstrap exception
9800 + * vectors and mark the kernel mode. A full initialization of
9801 + * the CPU's status register is done later in
9802 + * per_cpu_trap_init().
9803 + */
9804 mfc0 t0, CP0_STATUS
9805 - li t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_UX)
9806 - and t0, t1
9807 - or t0, (ST0_CU0);
9808 + or t0, ST0_CU0|ST0_BEV|0x1f
9809 + xor t0, ST0_BEV|0x1f
9810 + mtc0 t0, CP0_STATUS
9811 +
9812 + .set noreorder
9813 + sll zero,3 # ehb
9814 + .set reorder
9815 +
9816 + mtc0 zero, CP0_WIRED
9817 +
9818 jal start_secondary
9819 - mtc0 t0, CP0_STATUS
9820 - .set pop
9821 + .set pop
9822 END(smp_bootstrap)
9823 #endif
9824
9825 Index: linux-2.4.35.4/arch/mips/kernel/process.c
9826 ===================================================================
9827 --- linux-2.4.35.4.orig/arch/mips/kernel/process.c 2007-12-15 05:19:43.502900127 +0100
9828 +++ linux-2.4.35.4/arch/mips/kernel/process.c 2007-12-15 05:19:44.866977862 +0100
9829 @@ -128,6 +128,26 @@
9830 return 1;
9831 }
9832
9833 +void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
9834 +{
9835 + int i;
9836 +
9837 + for (i = 0; i < EF_REG0; i++)
9838 + gp[i] = 0;
9839 + gp[EF_REG0] = 0;
9840 + for (i = 1; i <= 31; i++)
9841 + gp[EF_REG0 + i] = regs->regs[i];
9842 + gp[EF_REG26] = 0;
9843 + gp[EF_REG27] = 0;
9844 + gp[EF_LO] = regs->lo;
9845 + gp[EF_HI] = regs->hi;
9846 + gp[EF_CP0_EPC] = regs->cp0_epc;
9847 + gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
9848 + gp[EF_CP0_STATUS] = regs->cp0_status;
9849 + gp[EF_CP0_CAUSE] = regs->cp0_cause;
9850 + gp[EF_UNUSED0] = 0;
9851 +}
9852 +
9853 /*
9854 * Create a kernel thread
9855 */
9856 Index: linux-2.4.35.4/arch/mips/kernel/scall_o32.S
9857 ===================================================================
9858 --- linux-2.4.35.4.orig/arch/mips/kernel/scall_o32.S 2007-12-15 05:19:43.506900356 +0100
9859 +++ linux-2.4.35.4/arch/mips/kernel/scall_o32.S 2007-12-15 05:19:44.866977862 +0100
9860 @@ -121,15 +121,14 @@
9861
9862 trace_a_syscall:
9863 SAVE_STATIC
9864 - sw t2, PT_R1(sp)
9865 + move s0, t2
9866 jal syscall_trace
9867 - lw t2, PT_R1(sp)
9868
9869 lw a0, PT_R4(sp) # Restore argument registers
9870 lw a1, PT_R5(sp)
9871 lw a2, PT_R6(sp)
9872 lw a3, PT_R7(sp)
9873 - jalr t2
9874 + jalr s0
9875
9876 li t0, -EMAXERRNO - 1 # error?
9877 sltu t0, t0, v0
9878 Index: linux-2.4.35.4/arch/mips/kernel/setup.c
9879 ===================================================================
9880 --- linux-2.4.35.4.orig/arch/mips/kernel/setup.c 2007-12-15 05:19:43.514900811 +0100
9881 +++ linux-2.4.35.4/arch/mips/kernel/setup.c 2007-12-15 05:19:44.866977862 +0100
9882 @@ -5,7 +5,7 @@
9883 *
9884 * Copyright (C) 1995 Linus Torvalds
9885 * Copyright (C) 1995 Waldorf Electronics
9886 - * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
9887 + * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 01, 05 Ralf Baechle
9888 * Copyright (C) 1996 Stoned Elipot
9889 * Copyright (C) 2000, 2001, 2002 Maciej W. Rozycki
9890 */
9891 @@ -71,6 +71,8 @@
9892 extern struct rtc_ops no_rtc_ops;
9893 struct rtc_ops *rtc_ops;
9894
9895 +EXPORT_SYMBOL(rtc_ops);
9896 +
9897 #ifdef CONFIG_PC_KEYB
9898 struct kbd_ops *kbd_ops;
9899 #endif
9900 @@ -132,10 +134,6 @@
9901 */
9902 load_mmu();
9903
9904 - /* Disable coprocessors and set FPU for 16/32 FPR register model */
9905 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
9906 - set_c0_status(ST0_CU0);
9907 -
9908 start_kernel();
9909 }
9910
9911 Index: linux-2.4.35.4/arch/mips/kernel/traps.c
9912 ===================================================================
9913 --- linux-2.4.35.4.orig/arch/mips/kernel/traps.c 2007-12-15 05:19:43.522901266 +0100
9914 +++ linux-2.4.35.4/arch/mips/kernel/traps.c 2007-12-15 05:19:44.870978088 +0100
9915 @@ -452,9 +452,10 @@
9916 }
9917 ll_task = current;
9918
9919 + compute_return_epc(regs);
9920 +
9921 regs->regs[(opcode & RT) >> 16] = value;
9922
9923 - compute_return_epc(regs);
9924 return;
9925
9926 sig:
9927 @@ -485,8 +486,8 @@
9928 goto sig;
9929 }
9930 if (ll_bit == 0 || ll_task != current) {
9931 - regs->regs[reg] = 0;
9932 compute_return_epc(regs);
9933 + regs->regs[reg] = 0;
9934 return;
9935 }
9936
9937 @@ -495,9 +496,9 @@
9938 goto sig;
9939 }
9940
9941 + compute_return_epc(regs);
9942 regs->regs[reg] = 1;
9943
9944 - compute_return_epc(regs);
9945 return;
9946
9947 sig:
9948 @@ -887,12 +888,18 @@
9949 void __init per_cpu_trap_init(void)
9950 {
9951 unsigned int cpu = smp_processor_id();
9952 + unsigned int status_set = ST0_CU0;
9953
9954 - /* Some firmware leaves the BEV flag set, clear it. */
9955 - clear_c0_status(ST0_CU3|ST0_CU2|ST0_CU1|ST0_BEV|ST0_KX|ST0_SX|ST0_UX);
9956 -
9957 + /*
9958 + * Disable coprocessors and 64-bit addressing and set FPU for
9959 + * the 16/32 FPR register model. Reset the BEV flag that some
9960 + * firmware may have left set and the TS bit (for IP27). Set
9961 + * XX for ISA IV code to work.
9962 + */
9963 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
9964 - set_c0_status(ST0_XX);
9965 + status_set |= ST0_XX;
9966 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
9967 + status_set);
9968
9969 /*
9970 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
9971 @@ -902,7 +909,7 @@
9972 set_c0_cause(CAUSEF_IV);
9973
9974 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
9975 - write_c0_context(cpu << 23);
9976 + TLBMISS_HANDLER_SETUP();
9977
9978 atomic_inc(&init_mm.mm_count);
9979 current->active_mm = &init_mm;
9980 @@ -918,8 +925,6 @@
9981 extern char except_vec4;
9982 unsigned long i;
9983
9984 - per_cpu_trap_init();
9985 -
9986 /* Copy the generic exception handler code to it's final destination. */
9987 memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
9988
9989 @@ -1020,10 +1025,5 @@
9990
9991 flush_icache_range(KSEG0, KSEG0 + 0x400);
9992
9993 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
9994 - current->active_mm = &init_mm;
9995 -
9996 - /* XXX Must be done for all CPUs */
9997 - current_cpu_data.asid_cache = ASID_FIRST_VERSION;
9998 - TLBMISS_HANDLER_SETUP();
9999 + per_cpu_trap_init();
10000 }
10001 Index: linux-2.4.35.4/arch/mips/lib/rtc-no.c
10002 ===================================================================
10003 --- linux-2.4.35.4.orig/arch/mips/lib/rtc-no.c 2007-12-15 05:19:43.530901722 +0100
10004 +++ linux-2.4.35.4/arch/mips/lib/rtc-no.c 2007-12-15 05:19:44.870978088 +0100
10005 @@ -6,10 +6,9 @@
10006 * Stub RTC routines to keep Linux from crashing on machine which don't
10007 * have a RTC chip.
10008 *
10009 - * Copyright (C) 1998, 2001 by Ralf Baechle
10010 + * Copyright (C) 1998, 2001, 2005 by Ralf Baechle
10011 */
10012 #include <linux/kernel.h>
10013 -#include <linux/module.h>
10014 #include <linux/mc146818rtc.h>
10015
10016 static unsigned int shouldnt_happen(void)
10017 @@ -29,5 +28,3 @@
10018 .rtc_write_data = (void *) &shouldnt_happen,
10019 .rtc_bcd_mode = (void *) &shouldnt_happen
10020 };
10021 -
10022 -EXPORT_SYMBOL(rtc_ops);
10023 Index: linux-2.4.35.4/arch/mips/lib/rtc-std.c
10024 ===================================================================
10025 --- linux-2.4.35.4.orig/arch/mips/lib/rtc-std.c 2007-12-15 05:19:43.538902180 +0100
10026 +++ linux-2.4.35.4/arch/mips/lib/rtc-std.c 2007-12-15 05:19:44.870978088 +0100
10027 @@ -5,9 +5,8 @@
10028 *
10029 * RTC routines for PC style attached Dallas chip.
10030 *
10031 - * Copyright (C) 1998, 2001 by Ralf Baechle
10032 + * Copyright (C) 1998, 2001, 05 by Ralf Baechle
10033 */
10034 -#include <linux/module.h>
10035 #include <linux/mc146818rtc.h>
10036 #include <asm/io.h>
10037
10038 @@ -33,5 +32,3 @@
10039 &std_rtc_write_data,
10040 &std_rtc_bcd_mode
10041 };
10042 -
10043 -EXPORT_SYMBOL(rtc_ops);
10044 Index: linux-2.4.35.4/arch/mips/Makefile
10045 ===================================================================
10046 --- linux-2.4.35.4.orig/arch/mips/Makefile 2007-12-15 05:19:43.546902635 +0100
10047 +++ linux-2.4.35.4/arch/mips/Makefile 2007-12-15 05:19:44.870978088 +0100
10048 @@ -209,7 +209,7 @@
10049 endif
10050
10051 #
10052 -# Au1000 (Alchemy Semi PB1000) eval board
10053 +# Au1x AMD Alchemy eval boards
10054 #
10055 ifdef CONFIG_MIPS_PB1000
10056 LIBS += arch/mips/au1000/pb1000/pb1000.o \
10057 @@ -218,9 +218,6 @@
10058 LOADADDR := 0x80100000
10059 endif
10060
10061 -#
10062 -# Au1100 (Alchemy Semi PB1100) eval board
10063 -#
10064 ifdef CONFIG_MIPS_PB1100
10065 LIBS += arch/mips/au1000/pb1100/pb1100.o \
10066 arch/mips/au1000/common/au1000.o
10067 @@ -228,9 +225,6 @@
10068 LOADADDR += 0x80100000
10069 endif
10070
10071 -#
10072 -# Au1500 (Alchemy Semi PB1500) eval board
10073 -#
10074 ifdef CONFIG_MIPS_PB1500
10075 LIBS += arch/mips/au1000/pb1500/pb1500.o \
10076 arch/mips/au1000/common/au1000.o
10077 @@ -238,9 +232,6 @@
10078 LOADADDR := 0x80100000
10079 endif
10080
10081 -#
10082 -# Au1x00 (AMD/Alchemy) eval boards
10083 -#
10084 ifdef CONFIG_MIPS_DB1000
10085 LIBS += arch/mips/au1000/db1x00/db1x00.o \
10086 arch/mips/au1000/common/au1000.o
10087 @@ -311,6 +302,27 @@
10088 LOADADDR += 0x80100000
10089 endif
10090
10091 +ifdef CONFIG_MIPS_PB1200
10092 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
10093 + arch/mips/au1000/common/au1000.o
10094 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
10095 +LOADADDR += 0x80100000
10096 +endif
10097 +
10098 +ifdef CONFIG_MIPS_DB1200
10099 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
10100 + arch/mips/au1000/common/au1000.o
10101 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
10102 +LOADADDR += 0x80100000
10103 +endif
10104 +
10105 +ifdef CONFIG_MIPS_FICMMP
10106 +LIBS += arch/mips/au1000/ficmmp/ficmmp.o \
10107 + arch/mips/au1000/common/au1000.o
10108 +SUBDIRS += arch/mips/au1000/ficmmp arch/mips/au1000/common
10109 +LOADADDR += 0x80100000
10110 +endif
10111 +
10112
10113 #
10114 # Cogent CSB250
10115 Index: linux-2.4.35.4/arch/mips/mm/cerr-sb1.c
10116 ===================================================================
10117 --- linux-2.4.35.4.orig/arch/mips/mm/cerr-sb1.c 2007-12-15 05:19:43.554903091 +0100
10118 +++ linux-2.4.35.4/arch/mips/mm/cerr-sb1.c 2007-12-15 05:19:44.870978088 +0100
10119 @@ -252,14 +252,14 @@
10120
10121 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
10122 static const uint64_t mask_72_64[8] = {
10123 - 0x0738C808099264FFL,
10124 - 0x38C808099264FF07L,
10125 - 0xC808099264FF0738L,
10126 - 0x08099264FF0738C8L,
10127 - 0x099264FF0738C808L,
10128 - 0x9264FF0738C80809L,
10129 - 0x64FF0738C8080992L,
10130 - 0xFF0738C808099264L
10131 + 0x0738C808099264FFULL,
10132 + 0x38C808099264FF07ULL,
10133 + 0xC808099264FF0738ULL,
10134 + 0x08099264FF0738C8ULL,
10135 + 0x099264FF0738C808ULL,
10136 + 0x9264FF0738C80809ULL,
10137 + 0x64FF0738C8080992ULL,
10138 + 0xFF0738C808099264ULL
10139 };
10140
10141 /* Calculate the parity on a range of bits */
10142 @@ -331,9 +331,9 @@
10143 ((lru >> 4) & 0x3),
10144 ((lru >> 6) & 0x3));
10145 }
10146 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
10147 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
10148 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
10149 - va |= 0x3FFFF00000000000;
10150 + va |= 0x3FFFF00000000000ULL;
10151 valid = ((taghi >> 29) & 1);
10152 if (valid) {
10153 tlo_tmp = taglo & 0xfff3ff;
10154 @@ -474,7 +474,7 @@
10155 : "r" ((way << 13) | addr));
10156
10157 taglo = ((unsigned long long)taglohi << 32) | taglolo;
10158 - pa = (taglo & 0xFFFFFFE000) | addr;
10159 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
10160 if (way == 0) {
10161 lru = (taghi >> 14) & 0xff;
10162 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
10163 Index: linux-2.4.35.4/arch/mips/mm/c-r4k.c
10164 ===================================================================
10165 --- linux-2.4.35.4.orig/arch/mips/mm/c-r4k.c 2007-12-15 05:19:43.558903320 +0100
10166 +++ linux-2.4.35.4/arch/mips/mm/c-r4k.c 2007-12-15 05:19:44.874978317 +0100
10167 @@ -867,9 +867,16 @@
10168 * normally they'd suffer from aliases but magic in the hardware deals
10169 * with that for us so we don't need to take care ourselves.
10170 */
10171 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
10172 - if (c->dcache.waysize > PAGE_SIZE)
10173 - c->dcache.flags |= MIPS_CACHE_ALIASES;
10174 + switch (c->cputype) {
10175 + case CPU_R10000:
10176 + case CPU_R12000:
10177 + break;
10178 + case CPU_24K:
10179 + if (!(read_c0_config7() & (1 << 16)))
10180 + default:
10181 + if (c->dcache.waysize > PAGE_SIZE)
10182 + c->dcache.flags |= MIPS_CACHE_ALIASES;
10183 + }
10184
10185 switch (c->cputype) {
10186 case CPU_20KC:
10187 @@ -1069,9 +1076,6 @@
10188 probe_pcache();
10189 setup_scache();
10190
10191 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
10192 - c->dcache.flags |= MIPS_CACHE_ALIASES;
10193 -
10194 r4k_blast_dcache_page_setup();
10195 r4k_blast_dcache_page_indexed_setup();
10196 r4k_blast_dcache_setup();
10197 Index: linux-2.4.35.4/arch/mips/mm/tlbex-mips32.S
10198 ===================================================================
10199 --- linux-2.4.35.4.orig/arch/mips/mm/tlbex-mips32.S 2007-12-15 05:19:43.566903775 +0100
10200 +++ linux-2.4.35.4/arch/mips/mm/tlbex-mips32.S 2007-12-15 05:19:44.874978317 +0100
10201 @@ -196,7 +196,7 @@
10202 .set noat; \
10203 SAVE_ALL; \
10204 mfc0 a2, CP0_BADVADDR; \
10205 - STI; \
10206 + KMODE; \
10207 .set at; \
10208 move a0, sp; \
10209 jal do_page_fault; \
10210 Index: linux-2.4.35.4/arch/mips/mm/tlbex-r4k.S
10211 ===================================================================
10212 --- linux-2.4.35.4.orig/arch/mips/mm/tlbex-r4k.S 2007-12-15 05:19:43.574904230 +0100
10213 +++ linux-2.4.35.4/arch/mips/mm/tlbex-r4k.S 2007-12-15 05:19:44.874978317 +0100
10214 @@ -184,13 +184,10 @@
10215 P_MTC0 k0, CP0_ENTRYLO0 # load it
10216 PTE_SRL k1, k1, 6 # convert to entrylo1
10217 P_MTC0 k1, CP0_ENTRYLO1 # load it
10218 - b 1f
10219 - rm9000_tlb_hazard
10220 + mtc0_tlbw_hazard
10221 tlbwr # write random tlb entry
10222 -1:
10223 - nop
10224 - rm9000_tlb_hazard
10225 - eret # return from trap
10226 + tlbw_eret_hazard
10227 + eret
10228 END(except_vec0_r4000)
10229
10230 /* TLB refill, EXL == 0, R4600 version */
10231 @@ -468,13 +465,9 @@
10232 PTE_PRESENT(k0, k1, nopage_tlbl)
10233 PTE_MAKEVALID(k0, k1)
10234 PTE_RELOAD(k1, k0)
10235 - rm9000_tlb_hazard
10236 - nop
10237 - b 1f
10238 - tlbwi
10239 -1:
10240 - nop
10241 - rm9000_tlb_hazard
10242 + mtc0_tlbw_hazard
10243 + tlbwi
10244 + tlbw_eret_hazard
10245 .set mips3
10246 eret
10247 .set mips0
10248 @@ -496,13 +489,9 @@
10249 PTE_WRITABLE(k0, k1, nopage_tlbs)
10250 PTE_MAKEWRITE(k0, k1)
10251 PTE_RELOAD(k1, k0)
10252 - rm9000_tlb_hazard
10253 - nop
10254 - b 1f
10255 - tlbwi
10256 -1:
10257 - nop
10258 - rm9000_tlb_hazard
10259 + mtc0_tlbw_hazard
10260 + tlbwi
10261 + tlbw_eret_hazard
10262 .set mips3
10263 eret
10264 .set mips0
10265 @@ -529,13 +518,9 @@
10266
10267 /* Now reload the entry into the tlb. */
10268 PTE_RELOAD(k1, k0)
10269 - rm9000_tlb_hazard
10270 - nop
10271 - b 1f
10272 - tlbwi
10273 -1:
10274 - rm9000_tlb_hazard
10275 - nop
10276 + mtc0_tlbw_hazard
10277 + tlbwi
10278 + tlbw_eret_hazard
10279 .set mips3
10280 eret
10281 .set mips0
10282 Index: linux-2.4.35.4/arch/mips/mm/tlb-r4k.c
10283 ===================================================================
10284 --- linux-2.4.35.4.orig/arch/mips/mm/tlb-r4k.c 2007-12-15 05:19:43.582904686 +0100
10285 +++ linux-2.4.35.4/arch/mips/mm/tlb-r4k.c 2007-12-15 05:19:44.874978317 +0100
10286 @@ -3,17 +3,12 @@
10287 * License. See the file "COPYING" in the main directory of this archive
10288 * for more details.
10289 *
10290 - * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
10291 - *
10292 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
10293 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
10294 - *
10295 - * To do:
10296 - *
10297 - * - this code is a overbloated pig
10298 - * - many of the bug workarounds are not efficient at all, but at
10299 - * least they are functional ...
10300 + * Carsten Langgaard, carstenl@mips.com
10301 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
10302 */
10303 +#include <linux/config.h>
10304 #include <linux/init.h>
10305 #include <linux/sched.h>
10306 #include <linux/mm.h>
10307 @@ -25,9 +20,6 @@
10308 #include <asm/pgtable.h>
10309 #include <asm/system.h>
10310
10311 -#undef DEBUG_TLB
10312 -#undef DEBUG_TLBUPDATE
10313 -
10314 extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
10315
10316 /* CP0 hazard avoidance. */
10317 @@ -41,33 +33,23 @@
10318 unsigned long old_ctx;
10319 int entry;
10320
10321 -#ifdef DEBUG_TLB
10322 - printk("[tlball]");
10323 -#endif
10324 -
10325 local_irq_save(flags);
10326 /* Save old context and create impossible VPN2 value */
10327 old_ctx = read_c0_entryhi();
10328 write_c0_entrylo0(0);
10329 write_c0_entrylo1(0);
10330 - BARRIER;
10331
10332 entry = read_c0_wired();
10333
10334 /* Blast 'em all away. */
10335 while (entry < current_cpu_data.tlbsize) {
10336 - /*
10337 - * Make sure all entries differ. If they're not different
10338 - * MIPS32 will take revenge ...
10339 - */
10340 write_c0_entryhi(KSEG0 + entry*0x2000);
10341 write_c0_index(entry);
10342 - BARRIER;
10343 + mtc0_tlbw_hazard();
10344 tlb_write_indexed();
10345 - BARRIER;
10346 entry++;
10347 }
10348 - BARRIER;
10349 + tlbw_use_hazard();
10350 write_c0_entryhi(old_ctx);
10351 local_irq_restore(flags);
10352 }
10353 @@ -76,12 +58,8 @@
10354 {
10355 int cpu = smp_processor_id();
10356
10357 - if (cpu_context(cpu, mm) != 0) {
10358 -#ifdef DEBUG_TLB
10359 - printk("[tlbmm<%d>]", cpu_context(cpu, mm));
10360 -#endif
10361 + if (cpu_context(cpu, mm) != 0)
10362 drop_mmu_context(mm,cpu);
10363 - }
10364 }
10365
10366 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
10367 @@ -93,10 +71,6 @@
10368 unsigned long flags;
10369 int size;
10370
10371 -#ifdef DEBUG_TLB
10372 - printk("[tlbrange<%02x,%08lx,%08lx>]",
10373 - cpu_asid(cpu, mm), start, end);
10374 -#endif
10375 local_irq_save(flags);
10376 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
10377 size = (size + 1) >> 1;
10378 @@ -112,7 +86,7 @@
10379
10380 write_c0_entryhi(start | newpid);
10381 start += (PAGE_SIZE << 1);
10382 - BARRIER;
10383 + mtc0_tlbw_hazard();
10384 tlb_probe();
10385 BARRIER;
10386 idx = read_c0_index();
10387 @@ -122,10 +96,10 @@
10388 continue;
10389 /* Make sure all entries differ. */
10390 write_c0_entryhi(KSEG0 + idx*0x2000);
10391 - BARRIER;
10392 + mtc0_tlbw_hazard();
10393 tlb_write_indexed();
10394 - BARRIER;
10395 }
10396 + tlbw_use_hazard();
10397 write_c0_entryhi(oldpid);
10398 } else {
10399 drop_mmu_context(mm, cpu);
10400 @@ -138,34 +112,30 @@
10401 {
10402 int cpu = smp_processor_id();
10403
10404 - if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
10405 + if (cpu_context(cpu, vma->vm_mm) != 0) {
10406 unsigned long flags;
10407 - int oldpid, newpid, idx;
10408 + unsigned long oldpid, newpid, idx;
10409
10410 -#ifdef DEBUG_TLB
10411 - printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
10412 - page);
10413 -#endif
10414 newpid = cpu_asid(cpu, vma->vm_mm);
10415 page &= (PAGE_MASK << 1);
10416 local_irq_save(flags);
10417 oldpid = read_c0_entryhi();
10418 write_c0_entryhi(page | newpid);
10419 - BARRIER;
10420 + mtc0_tlbw_hazard();
10421 tlb_probe();
10422 BARRIER;
10423 idx = read_c0_index();
10424 write_c0_entrylo0(0);
10425 write_c0_entrylo1(0);
10426 - if(idx < 0)
10427 + if (idx < 0)
10428 goto finish;
10429 /* Make sure all entries differ. */
10430 write_c0_entryhi(KSEG0+idx*0x2000);
10431 - BARRIER;
10432 + mtc0_tlbw_hazard();
10433 tlb_write_indexed();
10434 + tlbw_use_hazard();
10435
10436 finish:
10437 - BARRIER;
10438 write_c0_entryhi(oldpid);
10439 local_irq_restore(flags);
10440 }
10441 @@ -185,7 +155,7 @@
10442
10443 local_irq_save(flags);
10444 write_c0_entryhi(page);
10445 - BARRIER;
10446 + mtc0_tlbw_hazard();
10447 tlb_probe();
10448 BARRIER;
10449 idx = read_c0_index();
10450 @@ -194,18 +164,19 @@
10451 if (idx >= 0) {
10452 /* Make sure all entries differ. */
10453 write_c0_entryhi(KSEG0+idx*0x2000);
10454 + mtc0_tlbw_hazard();
10455 tlb_write_indexed();
10456 + tlbw_use_hazard();
10457 }
10458 - BARRIER;
10459 write_c0_entryhi(oldpid);
10460 +
10461 local_irq_restore(flags);
10462 }
10463
10464 EXPORT_SYMBOL(local_flush_tlb_one);
10465
10466 -/* We will need multiple versions of update_mmu_cache(), one that just
10467 - * updates the TLB with the new pte(s), and another which also checks
10468 - * for the R4k "end of page" hardware bug and does the needy.
10469 +/*
10470 + * Updates the TLB with the new pte(s).
10471 */
10472 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
10473 {
10474 @@ -223,25 +194,16 @@
10475
10476 pid = read_c0_entryhi() & ASID_MASK;
10477
10478 -#ifdef DEBUG_TLB
10479 - if ((pid != cpu_asid(cpu, vma->vm_mm)) ||
10480 - (cpu_context(vma->vm_mm) == 0)) {
10481 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
10482 - "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);
10483 - }
10484 -#endif
10485 -
10486 local_irq_save(flags);
10487 address &= (PAGE_MASK << 1);
10488 write_c0_entryhi(address | pid);
10489 pgdp = pgd_offset(vma->vm_mm, address);
10490 - BARRIER;
10491 + mtc0_tlbw_hazard();
10492 tlb_probe();
10493 BARRIER;
10494 pmdp = pmd_offset(pgdp, address);
10495 idx = read_c0_index();
10496 ptep = pte_offset(pmdp, address);
10497 - BARRIER;
10498 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
10499 write_c0_entrylo0(ptep->pte_high);
10500 ptep++;
10501 @@ -251,15 +213,13 @@
10502 write_c0_entrylo1(pte_val(*ptep) >> 6);
10503 #endif
10504 write_c0_entryhi(address | pid);
10505 - BARRIER;
10506 - if (idx < 0) {
10507 + mtc0_tlbw_hazard();
10508 + if (idx < 0)
10509 tlb_write_random();
10510 - } else {
10511 + else
10512 tlb_write_indexed();
10513 - }
10514 - BARRIER;
10515 + tlbw_use_hazard();
10516 write_c0_entryhi(pid);
10517 - BARRIER;
10518 local_irq_restore(flags);
10519 }
10520
10521 @@ -279,24 +239,26 @@
10522 asid = read_c0_entryhi() & ASID_MASK;
10523 write_c0_entryhi(address | asid);
10524 pgdp = pgd_offset(vma->vm_mm, address);
10525 + mtc0_tlbw_hazard();
10526 tlb_probe();
10527 + BARRIER;
10528 pmdp = pmd_offset(pgdp, address);
10529 idx = read_c0_index();
10530 ptep = pte_offset(pmdp, address);
10531 write_c0_entrylo0(pte_val(*ptep++) >> 6);
10532 write_c0_entrylo1(pte_val(*ptep) >> 6);
10533 - BARRIER;
10534 + mtc0_tlbw_hazard();
10535 if (idx < 0)
10536 tlb_write_random();
10537 else
10538 tlb_write_indexed();
10539 - BARRIER;
10540 + tlbw_use_hazard();
10541 local_irq_restore(flags);
10542 }
10543 #endif
10544
10545 void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
10546 - unsigned long entryhi, unsigned long pagemask)
10547 + unsigned long entryhi, unsigned long pagemask)
10548 {
10549 unsigned long flags;
10550 unsigned long wired;
10551 @@ -315,9 +277,9 @@
10552 write_c0_entryhi(entryhi);
10553 write_c0_entrylo0(entrylo0);
10554 write_c0_entrylo1(entrylo1);
10555 - BARRIER;
10556 + mtc0_tlbw_hazard();
10557 tlb_write_indexed();
10558 - BARRIER;
10559 + tlbw_use_hazard();
10560
10561 write_c0_entryhi(old_ctx);
10562 BARRIER;
10563 @@ -355,17 +317,15 @@
10564 }
10565
10566 write_c0_index(temp_tlb_entry);
10567 - BARRIER;
10568 write_c0_pagemask(pagemask);
10569 write_c0_entryhi(entryhi);
10570 write_c0_entrylo0(entrylo0);
10571 write_c0_entrylo1(entrylo1);
10572 - BARRIER;
10573 + mtc0_tlbw_hazard();
10574 tlb_write_indexed();
10575 - BARRIER;
10576 + tlbw_use_hazard();
10577
10578 write_c0_entryhi(old_ctx);
10579 - BARRIER;
10580 write_c0_pagemask(old_pagemask);
10581 out:
10582 local_irq_restore(flags);
10583 @@ -375,7 +335,7 @@
10584 static void __init probe_tlb(unsigned long config)
10585 {
10586 struct cpuinfo_mips *c = &current_cpu_data;
10587 - unsigned int reg;
10588 + unsigned int config1;
10589
10590 /*
10591 * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
10592 @@ -385,16 +345,16 @@
10593 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
10594 return;
10595
10596 - reg = read_c0_config1();
10597 + config1 = read_c0_config1();
10598 if (!((config >> 7) & 3))
10599 panic("No TLB present");
10600
10601 - c->tlbsize = ((reg >> 25) & 0x3f) + 1;
10602 + c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
10603 }
10604
10605 void __init r4k_tlb_init(void)
10606 {
10607 - u32 config = read_c0_config();
10608 + unsigned int config = read_c0_config();
10609
10610 /*
10611 * You should never change this register:
10612 Index: linux-2.4.35.4/arch/mips64/defconfig
10613 ===================================================================
10614 --- linux-2.4.35.4.orig/arch/mips64/defconfig 2007-12-15 05:19:43.590905141 +0100
10615 +++ linux-2.4.35.4/arch/mips64/defconfig 2007-12-15 05:19:44.874978317 +0100
10616 @@ -30,8 +30,8 @@
10617 # CONFIG_MIPS_PB1000 is not set
10618 # CONFIG_MIPS_PB1100 is not set
10619 # CONFIG_MIPS_PB1500 is not set
10620 -# CONFIG_MIPS_HYDROGEN3 is not set
10621 # CONFIG_MIPS_PB1550 is not set
10622 +# CONFIG_MIPS_HYDROGEN3 is not set
10623 # CONFIG_MIPS_XXS1500 is not set
10624 # CONFIG_MIPS_MTX1 is not set
10625 # CONFIG_COGENT_CSB250 is not set
10626 @@ -470,9 +470,11 @@
10627 # CONFIG_SCSI_MEGARAID is not set
10628 # CONFIG_SCSI_MEGARAID2 is not set
10629 # CONFIG_SCSI_SATA is not set
10630 +# CONFIG_SCSI_SATA_AHCI is not set
10631 # CONFIG_SCSI_SATA_SVW is not set
10632 # CONFIG_SCSI_ATA_PIIX is not set
10633 # CONFIG_SCSI_SATA_NV is not set
10634 +# CONFIG_SCSI_SATA_QSTOR is not set
10635 # CONFIG_SCSI_SATA_PROMISE is not set
10636 # CONFIG_SCSI_SATA_SX4 is not set
10637 # CONFIG_SCSI_SATA_SIL is not set
10638 @@ -658,7 +660,6 @@
10639 CONFIG_SERIAL_CONSOLE=y
10640 # CONFIG_SERIAL_EXTENDED is not set
10641 # CONFIG_SERIAL_NONSTANDARD is not set
10642 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10643 CONFIG_UNIX98_PTYS=y
10644 CONFIG_UNIX98_PTY_COUNT=256
10645
10646 Index: linux-2.4.35.4/arch/mips64/defconfig-atlas
10647 ===================================================================
10648 --- linux-2.4.35.4.orig/arch/mips64/defconfig-atlas 2007-12-15 05:19:43.598905599 +0100
10649 +++ linux-2.4.35.4/arch/mips64/defconfig-atlas 2007-12-15 05:19:44.878978546 +0100
10650 @@ -28,8 +28,8 @@
10651 # CONFIG_MIPS_PB1000 is not set
10652 # CONFIG_MIPS_PB1100 is not set
10653 # CONFIG_MIPS_PB1500 is not set
10654 -# CONFIG_MIPS_HYDROGEN3 is not set
10655 # CONFIG_MIPS_PB1550 is not set
10656 +# CONFIG_MIPS_HYDROGEN3 is not set
10657 # CONFIG_MIPS_XXS1500 is not set
10658 # CONFIG_MIPS_MTX1 is not set
10659 # CONFIG_COGENT_CSB250 is not set
10660 @@ -232,11 +232,6 @@
10661 #
10662 # CONFIG_IPX is not set
10663 # CONFIG_ATALK is not set
10664 -
10665 -#
10666 -# Appletalk devices
10667 -#
10668 -# CONFIG_DEV_APPLETALK is not set
10669 # CONFIG_DECNET is not set
10670 # CONFIG_BRIDGE is not set
10671 # CONFIG_X25 is not set
10672 @@ -314,9 +309,11 @@
10673 # CONFIG_SCSI_MEGARAID is not set
10674 # CONFIG_SCSI_MEGARAID2 is not set
10675 # CONFIG_SCSI_SATA is not set
10676 +# CONFIG_SCSI_SATA_AHCI is not set
10677 # CONFIG_SCSI_SATA_SVW is not set
10678 # CONFIG_SCSI_ATA_PIIX is not set
10679 # CONFIG_SCSI_SATA_NV is not set
10680 +# CONFIG_SCSI_SATA_QSTOR is not set
10681 # CONFIG_SCSI_SATA_PROMISE is not set
10682 # CONFIG_SCSI_SATA_SX4 is not set
10683 # CONFIG_SCSI_SATA_SIL is not set
10684 @@ -474,7 +471,6 @@
10685 CONFIG_SERIAL_CONSOLE=y
10686 # CONFIG_SERIAL_EXTENDED is not set
10687 # CONFIG_SERIAL_NONSTANDARD is not set
10688 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10689 CONFIG_UNIX98_PTYS=y
10690 CONFIG_UNIX98_PTY_COUNT=256
10691
10692 Index: linux-2.4.35.4/arch/mips64/defconfig-decstation
10693 ===================================================================
10694 --- linux-2.4.35.4.orig/arch/mips64/defconfig-decstation 2007-12-15 05:19:43.606906055 +0100
10695 +++ linux-2.4.35.4/arch/mips64/defconfig-decstation 2007-12-15 05:19:44.878978546 +0100
10696 @@ -28,8 +28,8 @@
10697 # CONFIG_MIPS_PB1000 is not set
10698 # CONFIG_MIPS_PB1100 is not set
10699 # CONFIG_MIPS_PB1500 is not set
10700 -# CONFIG_MIPS_HYDROGEN3 is not set
10701 # CONFIG_MIPS_PB1550 is not set
10702 +# CONFIG_MIPS_HYDROGEN3 is not set
10703 # CONFIG_MIPS_XXS1500 is not set
10704 # CONFIG_MIPS_MTX1 is not set
10705 # CONFIG_COGENT_CSB250 is not set
10706 @@ -224,11 +224,6 @@
10707 #
10708 # CONFIG_IPX is not set
10709 # CONFIG_ATALK is not set
10710 -
10711 -#
10712 -# Appletalk devices
10713 -#
10714 -# CONFIG_DEV_APPLETALK is not set
10715 # CONFIG_DECNET is not set
10716 # CONFIG_BRIDGE is not set
10717 # CONFIG_X25 is not set
10718 @@ -307,9 +302,11 @@
10719 # CONFIG_SCSI_MEGARAID is not set
10720 # CONFIG_SCSI_MEGARAID2 is not set
10721 # CONFIG_SCSI_SATA is not set
10722 +# CONFIG_SCSI_SATA_AHCI is not set
10723 # CONFIG_SCSI_SATA_SVW is not set
10724 # CONFIG_SCSI_ATA_PIIX is not set
10725 # CONFIG_SCSI_SATA_NV is not set
10726 +# CONFIG_SCSI_SATA_QSTOR is not set
10727 # CONFIG_SCSI_SATA_PROMISE is not set
10728 # CONFIG_SCSI_SATA_SX4 is not set
10729 # CONFIG_SCSI_SATA_SIL is not set
10730 @@ -477,7 +474,6 @@
10731 CONFIG_SERIAL_DEC_CONSOLE=y
10732 # CONFIG_DZ is not set
10733 CONFIG_ZS=y
10734 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10735 CONFIG_UNIX98_PTYS=y
10736 CONFIG_UNIX98_PTY_COUNT=256
10737
10738 Index: linux-2.4.35.4/arch/mips64/defconfig-ip22
10739 ===================================================================
10740 --- linux-2.4.35.4.orig/arch/mips64/defconfig-ip22 2007-12-15 05:19:43.610906281 +0100
10741 +++ linux-2.4.35.4/arch/mips64/defconfig-ip22 2007-12-15 05:19:44.878978546 +0100
10742 @@ -30,8 +30,8 @@
10743 # CONFIG_MIPS_PB1000 is not set
10744 # CONFIG_MIPS_PB1100 is not set
10745 # CONFIG_MIPS_PB1500 is not set
10746 -# CONFIG_MIPS_HYDROGEN3 is not set
10747 # CONFIG_MIPS_PB1550 is not set
10748 +# CONFIG_MIPS_HYDROGEN3 is not set
10749 # CONFIG_MIPS_XXS1500 is not set
10750 # CONFIG_MIPS_MTX1 is not set
10751 # CONFIG_COGENT_CSB250 is not set
10752 @@ -235,11 +235,6 @@
10753 #
10754 # CONFIG_IPX is not set
10755 # CONFIG_ATALK is not set
10756 -
10757 -#
10758 -# Appletalk devices
10759 -#
10760 -# CONFIG_DEV_APPLETALK is not set
10761 # CONFIG_DECNET is not set
10762 # CONFIG_BRIDGE is not set
10763 # CONFIG_X25 is not set
10764 @@ -319,9 +314,11 @@
10765 # CONFIG_SCSI_MEGARAID is not set
10766 # CONFIG_SCSI_MEGARAID2 is not set
10767 # CONFIG_SCSI_SATA is not set
10768 +# CONFIG_SCSI_SATA_AHCI is not set
10769 # CONFIG_SCSI_SATA_SVW is not set
10770 # CONFIG_SCSI_ATA_PIIX is not set
10771 # CONFIG_SCSI_SATA_NV is not set
10772 +# CONFIG_SCSI_SATA_QSTOR is not set
10773 # CONFIG_SCSI_SATA_PROMISE is not set
10774 # CONFIG_SCSI_SATA_SX4 is not set
10775 # CONFIG_SCSI_SATA_SIL is not set
10776 @@ -488,7 +485,6 @@
10777 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10778 # CONFIG_TXX927_SERIAL is not set
10779 CONFIG_IP22_SERIAL=y
10780 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10781 CONFIG_UNIX98_PTYS=y
10782 CONFIG_UNIX98_PTY_COUNT=256
10783
10784 Index: linux-2.4.35.4/arch/mips64/defconfig-ip27
10785 ===================================================================
10786 --- linux-2.4.35.4.orig/arch/mips64/defconfig-ip27 2007-12-15 05:19:43.618906739 +0100
10787 +++ linux-2.4.35.4/arch/mips64/defconfig-ip27 2007-12-15 05:19:44.878978546 +0100
10788 @@ -30,8 +30,8 @@
10789 # CONFIG_MIPS_PB1000 is not set
10790 # CONFIG_MIPS_PB1100 is not set
10791 # CONFIG_MIPS_PB1500 is not set
10792 -# CONFIG_MIPS_HYDROGEN3 is not set
10793 # CONFIG_MIPS_PB1550 is not set
10794 +# CONFIG_MIPS_HYDROGEN3 is not set
10795 # CONFIG_MIPS_XXS1500 is not set
10796 # CONFIG_MIPS_MTX1 is not set
10797 # CONFIG_COGENT_CSB250 is not set
10798 @@ -470,9 +470,11 @@
10799 # CONFIG_SCSI_MEGARAID is not set
10800 # CONFIG_SCSI_MEGARAID2 is not set
10801 # CONFIG_SCSI_SATA is not set
10802 +# CONFIG_SCSI_SATA_AHCI is not set
10803 # CONFIG_SCSI_SATA_SVW is not set
10804 # CONFIG_SCSI_ATA_PIIX is not set
10805 # CONFIG_SCSI_SATA_NV is not set
10806 +# CONFIG_SCSI_SATA_QSTOR is not set
10807 # CONFIG_SCSI_SATA_PROMISE is not set
10808 # CONFIG_SCSI_SATA_SX4 is not set
10809 # CONFIG_SCSI_SATA_SIL is not set
10810 @@ -658,7 +660,6 @@
10811 CONFIG_SERIAL_CONSOLE=y
10812 # CONFIG_SERIAL_EXTENDED is not set
10813 # CONFIG_SERIAL_NONSTANDARD is not set
10814 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10815 CONFIG_UNIX98_PTYS=y
10816 CONFIG_UNIX98_PTY_COUNT=256
10817
10818 Index: linux-2.4.35.4/arch/mips64/defconfig-jaguar
10819 ===================================================================
10820 --- linux-2.4.35.4.orig/arch/mips64/defconfig-jaguar 2007-12-15 05:19:43.626907195 +0100
10821 +++ linux-2.4.35.4/arch/mips64/defconfig-jaguar 2007-12-15 05:19:44.882978773 +0100
10822 @@ -30,8 +30,8 @@
10823 # CONFIG_MIPS_PB1000 is not set
10824 # CONFIG_MIPS_PB1100 is not set
10825 # CONFIG_MIPS_PB1500 is not set
10826 -# CONFIG_MIPS_HYDROGEN3 is not set
10827 # CONFIG_MIPS_PB1550 is not set
10828 +# CONFIG_MIPS_HYDROGEN3 is not set
10829 # CONFIG_MIPS_XXS1500 is not set
10830 # CONFIG_MIPS_MTX1 is not set
10831 # CONFIG_COGENT_CSB250 is not set
10832 @@ -227,11 +227,6 @@
10833 #
10834 # CONFIG_IPX is not set
10835 # CONFIG_ATALK is not set
10836 -
10837 -#
10838 -# Appletalk devices
10839 -#
10840 -# CONFIG_DEV_APPLETALK is not set
10841 # CONFIG_DECNET is not set
10842 # CONFIG_BRIDGE is not set
10843 # CONFIG_X25 is not set
10844 @@ -403,7 +398,6 @@
10845 # CONFIG_SERIAL_TXX9 is not set
10846 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10847 # CONFIG_TXX927_SERIAL is not set
10848 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10849 CONFIG_UNIX98_PTYS=y
10850 CONFIG_UNIX98_PTY_COUNT=256
10851
10852 Index: linux-2.4.35.4/arch/mips64/defconfig-malta
10853 ===================================================================
10854 --- linux-2.4.35.4.orig/arch/mips64/defconfig-malta 2007-12-15 05:19:43.634907650 +0100
10855 +++ linux-2.4.35.4/arch/mips64/defconfig-malta 2007-12-15 05:19:44.882978773 +0100
10856 @@ -22,16 +22,19 @@
10857 #
10858 # CONFIG_ACER_PICA_61 is not set
10859 # CONFIG_MIPS_BOSPORUS is not set
10860 +# CONFIG_MIPS_FICMMP is not set
10861 # CONFIG_MIPS_MIRAGE is not set
10862 # CONFIG_MIPS_DB1000 is not set
10863 # CONFIG_MIPS_DB1100 is not set
10864 # CONFIG_MIPS_DB1500 is not set
10865 # CONFIG_MIPS_DB1550 is not set
10866 +# CONFIG_MIPS_DB1200 is not set
10867 # CONFIG_MIPS_PB1000 is not set
10868 # CONFIG_MIPS_PB1100 is not set
10869 # CONFIG_MIPS_PB1500 is not set
10870 -# CONFIG_MIPS_HYDROGEN3 is not set
10871 # CONFIG_MIPS_PB1550 is not set
10872 +# CONFIG_MIPS_PB1200 is not set
10873 +# CONFIG_MIPS_HYDROGEN3 is not set
10874 # CONFIG_MIPS_XXS1500 is not set
10875 # CONFIG_MIPS_MTX1 is not set
10876 # CONFIG_COGENT_CSB250 is not set
10877 @@ -146,9 +149,9 @@
10878 CONFIG_BINFMT_ELF=y
10879 CONFIG_MIPS32_COMPAT=y
10880 CONFIG_MIPS32_O32=y
10881 -# CONFIG_MIPS32_N32 is not set
10882 +CONFIG_MIPS32_N32=y
10883 CONFIG_BINFMT_ELF32=y
10884 -# CONFIG_BINFMT_MISC is not set
10885 +CONFIG_BINFMT_MISC=y
10886 # CONFIG_OOM_KILLER is not set
10887 # CONFIG_CMDLINE_BOOL is not set
10888
10889 @@ -235,11 +238,6 @@
10890 #
10891 # CONFIG_IPX is not set
10892 # CONFIG_ATALK is not set
10893 -
10894 -#
10895 -# Appletalk devices
10896 -#
10897 -# CONFIG_DEV_APPLETALK is not set
10898 # CONFIG_DECNET is not set
10899 # CONFIG_BRIDGE is not set
10900 # CONFIG_X25 is not set
10901 @@ -271,8 +269,83 @@
10902 #
10903 # ATA/IDE/MFM/RLL support
10904 #
10905 -# CONFIG_IDE is not set
10906 +CONFIG_IDE=y
10907 +
10908 +#
10909 +# IDE, ATA and ATAPI Block devices
10910 +#
10911 +CONFIG_BLK_DEV_IDE=y
10912 +
10913 +#
10914 +# Please see Documentation/ide.txt for help/info on IDE drives
10915 +#
10916 +# CONFIG_BLK_DEV_HD_IDE is not set
10917 # CONFIG_BLK_DEV_HD is not set
10918 +# CONFIG_BLK_DEV_IDE_SATA is not set
10919 +CONFIG_BLK_DEV_IDEDISK=y
10920 +# CONFIG_IDEDISK_MULTI_MODE is not set
10921 +# CONFIG_IDEDISK_STROKE is not set
10922 +# CONFIG_BLK_DEV_IDECS is not set
10923 +# CONFIG_BLK_DEV_DELKIN is not set
10924 +CONFIG_BLK_DEV_IDECD=y
10925 +CONFIG_BLK_DEV_IDETAPE=y
10926 +CONFIG_BLK_DEV_IDEFLOPPY=y
10927 +# CONFIG_BLK_DEV_IDESCSI is not set
10928 +# CONFIG_IDE_TASK_IOCTL is not set
10929 +
10930 +#
10931 +# IDE chipset support/bugfixes
10932 +#
10933 +# CONFIG_BLK_DEV_CMD640 is not set
10934 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
10935 +# CONFIG_BLK_DEV_ISAPNP is not set
10936 +CONFIG_BLK_DEV_IDEPCI=y
10937 +CONFIG_BLK_DEV_GENERIC=y
10938 +CONFIG_IDEPCI_SHARE_IRQ=y
10939 +CONFIG_BLK_DEV_IDEDMA_PCI=y
10940 +# CONFIG_BLK_DEV_OFFBOARD is not set
10941 +CONFIG_BLK_DEV_IDEDMA_FORCED=y
10942 +CONFIG_IDEDMA_PCI_AUTO=y
10943 +# CONFIG_IDEDMA_ONLYDISK is not set
10944 +CONFIG_BLK_DEV_IDEDMA=y
10945 +# CONFIG_IDEDMA_PCI_WIP is not set
10946 +# CONFIG_BLK_DEV_ADMA100 is not set
10947 +# CONFIG_BLK_DEV_AEC62XX is not set
10948 +# CONFIG_BLK_DEV_ALI15X3 is not set
10949 +# CONFIG_WDC_ALI15X3 is not set
10950 +# CONFIG_BLK_DEV_AMD74XX is not set
10951 +# CONFIG_AMD74XX_OVERRIDE is not set
10952 +# CONFIG_BLK_DEV_ATIIXP is not set
10953 +# CONFIG_BLK_DEV_CMD64X is not set
10954 +# CONFIG_BLK_DEV_TRIFLEX is not set
10955 +# CONFIG_BLK_DEV_CY82C693 is not set
10956 +# CONFIG_BLK_DEV_CS5530 is not set
10957 +# CONFIG_BLK_DEV_HPT34X is not set
10958 +# CONFIG_HPT34X_AUTODMA is not set
10959 +# CONFIG_BLK_DEV_HPT366 is not set
10960 +CONFIG_BLK_DEV_PIIX=y
10961 +# CONFIG_BLK_DEV_NS87415 is not set
10962 +# CONFIG_BLK_DEV_OPTI621 is not set
10963 +# CONFIG_BLK_DEV_PDC202XX_OLD is not set
10964 +# CONFIG_PDC202XX_BURST is not set
10965 +# CONFIG_BLK_DEV_PDC202XX_NEW is not set
10966 +# CONFIG_BLK_DEV_RZ1000 is not set
10967 +# CONFIG_BLK_DEV_SC1200 is not set
10968 +# CONFIG_BLK_DEV_SVWKS is not set
10969 +# CONFIG_BLK_DEV_SIIMAGE is not set
10970 +# CONFIG_BLK_DEV_SIS5513 is not set
10971 +# CONFIG_BLK_DEV_SLC90E66 is not set
10972 +# CONFIG_BLK_DEV_TRM290 is not set
10973 +# CONFIG_BLK_DEV_VIA82CXXX is not set
10974 +# CONFIG_IDE_CHIPSETS is not set
10975 +CONFIG_IDEDMA_AUTO=y
10976 +# CONFIG_IDEDMA_IVB is not set
10977 +# CONFIG_DMA_NONPCI is not set
10978 +# CONFIG_BLK_DEV_ATARAID is not set
10979 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
10980 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
10981 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
10982 +# CONFIG_BLK_DEV_ATARAID_SII is not set
10983
10984 #
10985 # SCSI support
10986 @@ -317,9 +390,11 @@
10987 # CONFIG_SCSI_MEGARAID is not set
10988 # CONFIG_SCSI_MEGARAID2 is not set
10989 # CONFIG_SCSI_SATA is not set
10990 +# CONFIG_SCSI_SATA_AHCI is not set
10991 # CONFIG_SCSI_SATA_SVW is not set
10992 # CONFIG_SCSI_ATA_PIIX is not set
10993 # CONFIG_SCSI_SATA_NV is not set
10994 +# CONFIG_SCSI_SATA_QSTOR is not set
10995 # CONFIG_SCSI_SATA_PROMISE is not set
10996 # CONFIG_SCSI_SATA_SX4 is not set
10997 # CONFIG_SCSI_SATA_SIL is not set
10998 @@ -477,7 +552,6 @@
10999 CONFIG_SERIAL_CONSOLE=y
11000 # CONFIG_SERIAL_EXTENDED is not set
11001 # CONFIG_SERIAL_NONSTANDARD is not set
11002 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
11003 CONFIG_UNIX98_PTYS=y
11004 CONFIG_UNIX98_PTY_COUNT=256
11005
11006 Index: linux-2.4.35.4/arch/mips64/defconfig-ocelotc
11007 ===================================================================
11008 --- linux-2.4.35.4.orig/arch/mips64/defconfig-ocelotc 2007-12-15 05:19:43.638907879 +0100
11009 +++ linux-2.4.35.4/arch/mips64/defconfig-ocelotc 2007-12-15 05:19:44.882978773 +0100
11010 @@ -30,8 +30,8 @@
11011 # CONFIG_MIPS_PB1000 is not set
11012 # CONFIG_MIPS_PB1100 is not set
11013 # CONFIG_MIPS_PB1500 is not set
11014 -# CONFIG_MIPS_HYDROGEN3 is not set
11015 # CONFIG_MIPS_PB1550 is not set
11016 +# CONFIG_MIPS_HYDROGEN3 is not set
11017 # CONFIG_MIPS_XXS1500 is not set
11018 # CONFIG_MIPS_MTX1 is not set
11019 # CONFIG_COGENT_CSB250 is not set
11020 @@ -231,11 +231,6 @@
11021 #
11022 # CONFIG_IPX is not set
11023 # CONFIG_ATALK is not set
11024 -
11025 -#
11026 -# Appletalk devices
11027 -#
11028 -# CONFIG_DEV_APPLETALK is not set
11029 # CONFIG_DECNET is not set
11030 # CONFIG_BRIDGE is not set
11031 # CONFIG_X25 is not set
11032 @@ -453,7 +448,6 @@
11033 # CONFIG_SERIAL_TXX9 is not set
11034 # CONFIG_SERIAL_TXX9_CONSOLE is not set
11035 # CONFIG_TXX927_SERIAL is not set
11036 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
11037 CONFIG_UNIX98_PTYS=y
11038 CONFIG_UNIX98_PTY_COUNT=256
11039
11040 Index: linux-2.4.35.4/arch/mips64/defconfig-sb1250-swarm
11041 ===================================================================
11042 --- linux-2.4.35.4.orig/arch/mips64/defconfig-sb1250-swarm 2007-12-15 05:19:43.646908334 +0100
11043 +++ linux-2.4.35.4/arch/mips64/defconfig-sb1250-swarm 2007-12-15 05:19:44.882978773 +0100
11044 @@ -30,8 +30,8 @@
11045 # CONFIG_MIPS_PB1000 is not set
11046 # CONFIG_MIPS_PB1100 is not set
11047 # CONFIG_MIPS_PB1500 is not set
11048 -# CONFIG_MIPS_HYDROGEN3 is not set
11049 # CONFIG_MIPS_PB1550 is not set
11050 +# CONFIG_MIPS_HYDROGEN3 is not set
11051 # CONFIG_MIPS_XXS1500 is not set
11052 # CONFIG_MIPS_MTX1 is not set
11053 # CONFIG_COGENT_CSB250 is not set
11054 @@ -90,6 +90,7 @@
11055 # CONFIG_SIBYTE_TBPROF is not set
11056 CONFIG_SIBYTE_GENBUS_IDE=y
11057 CONFIG_SMP_CAPABLE=y
11058 +CONFIG_MIPS_RTC=y
11059 # CONFIG_SNI_RM200_PCI is not set
11060 # CONFIG_TANBAC_TB0226 is not set
11061 # CONFIG_TANBAC_TB0229 is not set
11062 @@ -253,11 +254,6 @@
11063 #
11064 # CONFIG_IPX is not set
11065 # CONFIG_ATALK is not set
11066 -
11067 -#
11068 -# Appletalk devices
11069 -#
11070 -# CONFIG_DEV_APPLETALK is not set
11071 # CONFIG_DECNET is not set
11072 # CONFIG_BRIDGE is not set
11073 # CONFIG_X25 is not set
11074 @@ -432,7 +428,6 @@
11075 CONFIG_SIBYTE_SB1250_DUART=y
11076 CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
11077 CONFIG_SERIAL_CONSOLE=y
11078 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
11079 CONFIG_UNIX98_PTYS=y
11080 CONFIG_UNIX98_PTY_COUNT=256
11081
11082 Index: linux-2.4.35.4/arch/mips64/defconfig-sead
11083 ===================================================================
11084 --- linux-2.4.35.4.orig/arch/mips64/defconfig-sead 2007-12-15 05:19:43.654908790 +0100
11085 +++ linux-2.4.35.4/arch/mips64/defconfig-sead 2007-12-15 05:19:44.886979002 +0100
11086 @@ -28,8 +28,8 @@
11087 # CONFIG_MIPS_PB1000 is not set
11088 # CONFIG_MIPS_PB1100 is not set
11089 # CONFIG_MIPS_PB1500 is not set
11090 -# CONFIG_MIPS_HYDROGEN3 is not set
11091 # CONFIG_MIPS_PB1550 is not set
11092 +# CONFIG_MIPS_HYDROGEN3 is not set
11093 # CONFIG_MIPS_XXS1500 is not set
11094 # CONFIG_MIPS_MTX1 is not set
11095 # CONFIG_COGENT_CSB250 is not set
11096 @@ -242,7 +242,6 @@
11097 CONFIG_SERIAL_CONSOLE=y
11098 # CONFIG_SERIAL_EXTENDED is not set
11099 # CONFIG_SERIAL_NONSTANDARD is not set
11100 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
11101 # CONFIG_UNIX98_PTYS is not set
11102
11103 #
11104 Index: linux-2.4.35.4/arch/mips64/kernel/binfmt_elfn32.c
11105 ===================================================================
11106 --- linux-2.4.35.4.orig/arch/mips64/kernel/binfmt_elfn32.c 2007-12-15 05:19:43.662909245 +0100
11107 +++ linux-2.4.35.4/arch/mips64/kernel/binfmt_elfn32.c 2007-12-15 05:19:44.894979457 +0100
11108 @@ -116,4 +116,7 @@
11109 #undef MODULE_DESCRIPTION
11110 #undef MODULE_AUTHOR
11111
11112 +#undef TASK_SIZE
11113 +#define TASK_SIZE TASK_SIZE32
11114 +
11115 #include "../../../fs/binfmt_elf.c"
11116 Index: linux-2.4.35.4/arch/mips64/kernel/binfmt_elfo32.c
11117 ===================================================================
11118 --- linux-2.4.35.4.orig/arch/mips64/kernel/binfmt_elfo32.c 2007-12-15 05:19:43.670909700 +0100
11119 +++ linux-2.4.35.4/arch/mips64/kernel/binfmt_elfo32.c 2007-12-15 05:19:44.898979686 +0100
11120 @@ -137,4 +137,7 @@
11121 #undef MODULE_DESCRIPTION
11122 #undef MODULE_AUTHOR
11123
11124 +#undef TASK_SIZE
11125 +#define TASK_SIZE TASK_SIZE32
11126 +
11127 #include "../../../fs/binfmt_elf.c"
11128 Index: linux-2.4.35.4/arch/mips64/kernel/head.S
11129 ===================================================================
11130 --- linux-2.4.35.4.orig/arch/mips64/kernel/head.S 2007-12-15 05:19:43.674909929 +0100
11131 +++ linux-2.4.35.4/arch/mips64/kernel/head.S 2007-12-15 05:19:44.898979686 +0100
11132 @@ -91,6 +91,21 @@
11133 __INIT
11134
11135 NESTED(kernel_entry, 16, sp) # kernel entry point
11136 + .set push
11137 + /*
11138 + * For the moment disable interrupts, mark the kernel mode and
11139 + * set ST0_KX so that the CPU does not spit fire when using
11140 + * 64-bit addresses. A full initialization of the CPU's status
11141 + * register is done later in per_cpu_trap_init().
11142 + */
11143 + mfc0 t0, CP0_STATUS
11144 + or t0, ST0_CU0|ST0_KX|0x1f
11145 + xor t0, 0x1f
11146 + mtc0 t0, CP0_STATUS
11147 +
11148 + .set noreorder
11149 + sll zero,3 # ehb
11150 + .set reorder
11151
11152 ori sp, 0xf # align stack on 16 byte.
11153 xori sp, 0xf
11154 @@ -103,8 +118,6 @@
11155
11156 ARC64_TWIDDLE_PC
11157
11158 - CLI # disable interrupts
11159 -
11160 /*
11161 * The firmware/bootloader passes argc/argp/envp
11162 * to us as arguments. But clear bss first because
11163 @@ -125,6 +138,7 @@
11164 dsubu sp, 4*SZREG # init stack pointer
11165
11166 j init_arch
11167 + .set pop
11168 END(kernel_entry)
11169
11170 #ifdef CONFIG_SMP
11171 @@ -133,6 +147,23 @@
11172 * function after setting up the stack and gp registers.
11173 */
11174 NESTED(smp_bootstrap, 16, sp)
11175 + .set push
11176 + /*
11177 + * For the moment disable interrupts and bootstrap exception
11178 + * vectors, mark the kernel mode and set ST0_KX so that the CPU
11179 + * does not spit fire when using 64-bit addresses. A full
11180 + * initialization of the CPU's status register is done later in
11181 + * per_cpu_trap_init().
11182 + */
11183 + mfc0 t0, CP0_STATUS
11184 + or t0, ST0_CU0|ST0_BEV|ST0_KX|0x1f
11185 + xor t0, ST0_BEV|0x1f
11186 + mtc0 t0, CP0_STATUS
11187 +
11188 + .set noreorder
11189 + sll zero,3 # ehb
11190 + .set reorder
11191 +
11192 #ifdef CONFIG_SGI_IP27
11193 GET_NASID_ASM t1
11194 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
11195 @@ -146,19 +177,8 @@
11196 ARC64_TWIDDLE_PC
11197 #endif /* CONFIG_SGI_IP27 */
11198
11199 - CLI
11200 -
11201 - /*
11202 - * For the moment set ST0_KU so the CPU will not spit fire when
11203 - * executing 64-bit instructions. The full initialization of the
11204 - * CPU's status register is done later in per_cpu_trap_init().
11205 - */
11206 - mfc0 t0, CP0_STATUS
11207 - or t0, ST0_KX
11208 - mtc0 t0, CP0_STATUS
11209 -
11210 jal start_secondary # XXX: IP27: cboot
11211 -
11212 + .set pop
11213 END(smp_bootstrap)
11214 #endif /* CONFIG_SMP */
11215
11216 Index: linux-2.4.35.4/arch/mips64/kernel/ioctl32.c
11217 ===================================================================
11218 --- linux-2.4.35.4.orig/arch/mips64/kernel/ioctl32.c 2007-12-15 05:19:43.682910385 +0100
11219 +++ linux-2.4.35.4/arch/mips64/kernel/ioctl32.c 2007-12-15 05:19:44.898979686 +0100
11220 @@ -2352,7 +2352,7 @@
11221 IOCTL32_HANDLER(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout),
11222 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE),
11223 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE_MULTI),
11224 - IOCTL32_DEFAULT(AUTOFS_IOC_PROTSUBVER),
11225 + IOCTL32_DEFAULT(AUTOFS_IOC_PROTOSUBVER),
11226 IOCTL32_DEFAULT(AUTOFS_IOC_ASKREGHOST),
11227 IOCTL32_DEFAULT(AUTOFS_IOC_TOGGLEREGHOST),
11228 IOCTL32_DEFAULT(AUTOFS_IOC_ASKUMOUNT),
11229 Index: linux-2.4.35.4/arch/mips64/kernel/linux32.c
11230 ===================================================================
11231 --- linux-2.4.35.4.orig/arch/mips64/kernel/linux32.c 2007-12-15 05:19:43.690910840 +0100
11232 +++ linux-2.4.35.4/arch/mips64/kernel/linux32.c 2007-12-15 05:19:44.902979912 +0100
11233 @@ -1101,6 +1101,7 @@
11234 * specially as they have atomicity guarantees and can handle
11235 * iovec's natively
11236 */
11237 + inode = file->f_dentry->d_inode;
11238 if (inode->i_sock) {
11239 int err;
11240 err = sock_readv_writev(type, inode, file, iov, count, tot_len);
11241 @@ -1187,72 +1188,19 @@
11242 lseek back to original location. They fail just like lseek does on
11243 non-seekable files. */
11244
11245 -asmlinkage ssize_t sys32_pread(unsigned int fd, char * buf,
11246 - size_t count, u32 unused, u64 a4, u64 a5)
11247 +asmlinkage ssize_t sys32_pread(unsigned int fd, char *buf,
11248 + size_t count, u32 unused, u64 a4, u64 a5)
11249 {
11250 - ssize_t ret;
11251 - struct file * file;
11252 - ssize_t (*read)(struct file *, char *, size_t, loff_t *);
11253 - loff_t pos;
11254 -
11255 - ret = -EBADF;
11256 - file = fget(fd);
11257 - if (!file)
11258 - goto bad_file;
11259 - if (!(file->f_mode & FMODE_READ))
11260 - goto out;
11261 - pos = merge_64(a4, a5);
11262 - ret = locks_verify_area(FLOCK_VERIFY_READ, file->f_dentry->d_inode,
11263 - file, pos, count);
11264 - if (ret)
11265 - goto out;
11266 - ret = -EINVAL;
11267 - if (!file->f_op || !(read = file->f_op->read))
11268 - goto out;
11269 - if (pos < 0)
11270 - goto out;
11271 - ret = read(file, buf, count, &pos);
11272 - if (ret > 0)
11273 - dnotify_parent(file->f_dentry, DN_ACCESS);
11274 -out:
11275 - fput(file);
11276 -bad_file:
11277 - return ret;
11278 + return sys_pread(fd, buf, count, merge_64(a4, a5));
11279 }
11280
11281 asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char * buf,
11282 size_t count, u32 unused, u64 a4, u64 a5)
11283 {
11284 - ssize_t ret;
11285 - struct file * file;
11286 - ssize_t (*write)(struct file *, const char *, size_t, loff_t *);
11287 - loff_t pos;
11288 + return sys_pwrite(fd, buf, count, merge_64(a4, a5));
11289 +}
11290
11291 - ret = -EBADF;
11292 - file = fget(fd);
11293 - if (!file)
11294 - goto bad_file;
11295 - if (!(file->f_mode & FMODE_WRITE))
11296 - goto out;
11297 - pos = merge_64(a4, a5);
11298 - ret = locks_verify_area(FLOCK_VERIFY_WRITE, file->f_dentry->d_inode,
11299 - file, pos, count);
11300 - if (ret)
11301 - goto out;
11302 - ret = -EINVAL;
11303 - if (!file->f_op || !(write = file->f_op->write))
11304 - goto out;
11305 - if (pos < 0)
11306 - goto out;
11307
11308 - ret = write(file, buf, count, &pos);
11309 - if (ret > 0)
11310 - dnotify_parent(file->f_dentry, DN_MODIFY);
11311 -out:
11312 - fput(file);
11313 -bad_file:
11314 - return ret;
11315 -}
11316 /*
11317 * Ooo, nasty. We need here to frob 32-bit unsigned longs to
11318 * 64-bit unsigned longs.
11319 Index: linux-2.4.35.4/arch/mips64/kernel/process.c
11320 ===================================================================
11321 --- linux-2.4.35.4.orig/arch/mips64/kernel/process.c 2007-12-15 05:19:43.698911298 +0100
11322 +++ linux-2.4.35.4/arch/mips64/kernel/process.c 2007-12-15 05:19:44.902979912 +0100
11323 @@ -125,6 +125,25 @@
11324 return 1;
11325 }
11326
11327 +void dump_regs(elf_greg_t *gp, struct pt_regs *regs)
11328 +{
11329 + int i;
11330 +
11331 + for (i = 0; i < EF_REG0; i++)
11332 + gp[i] = 0;
11333 + gp[EF_REG0] = 0;
11334 + for (i = 1; i <= 31; i++)
11335 + gp[EF_REG0 + i] = regs->regs[i];
11336 + gp[EF_REG26] = 0;
11337 + gp[EF_REG27] = 0;
11338 + gp[EF_LO] = regs->lo;
11339 + gp[EF_HI] = regs->hi;
11340 + gp[EF_CP0_EPC] = regs->cp0_epc;
11341 + gp[EF_CP0_BADVADDR] = regs->cp0_badvaddr;
11342 + gp[EF_CP0_STATUS] = regs->cp0_status;
11343 + gp[EF_CP0_CAUSE] = regs->cp0_cause;
11344 +}
11345 +
11346 /*
11347 * Create a kernel thread
11348 */
11349 Index: linux-2.4.35.4/arch/mips64/kernel/scall_64.S
11350 ===================================================================
11351 --- linux-2.4.35.4.orig/arch/mips64/kernel/scall_64.S 2007-12-15 05:19:43.702911525 +0100
11352 +++ linux-2.4.35.4/arch/mips64/kernel/scall_64.S 2007-12-15 05:19:44.902979912 +0100
11353 @@ -102,15 +102,14 @@
11354
11355 trace_a_syscall:
11356 SAVE_STATIC
11357 - sd t2,PT_R1(sp)
11358 + move s0, t2
11359 jal syscall_trace
11360 - ld t2,PT_R1(sp)
11361
11362 ld a0, PT_R4(sp) # Restore argument registers
11363 ld a1, PT_R5(sp)
11364 ld a2, PT_R6(sp)
11365 ld a3, PT_R7(sp)
11366 - jalr t2
11367 + jalr s0
11368
11369 li t0, -EMAXERRNO - 1 # error?
11370 sltu t0, t0, v0
11371 Index: linux-2.4.35.4/arch/mips64/kernel/scall_n32.S
11372 ===================================================================
11373 --- linux-2.4.35.4.orig/arch/mips64/kernel/scall_n32.S 2007-12-15 05:19:43.710911980 +0100
11374 +++ linux-2.4.35.4/arch/mips64/kernel/scall_n32.S 2007-12-15 05:19:44.902979912 +0100
11375 @@ -106,15 +106,14 @@
11376
11377 trace_a_syscall:
11378 SAVE_STATIC
11379 - sd t2,PT_R1(sp)
11380 + move s0, t2
11381 jal syscall_trace
11382 - ld t2,PT_R1(sp)
11383
11384 ld a0, PT_R4(sp) # Restore argument registers
11385 ld a1, PT_R5(sp)
11386 ld a2, PT_R6(sp)
11387 ld a3, PT_R7(sp)
11388 - jalr t2
11389 + jalr s0
11390
11391 li t0, -EMAXERRNO - 1 # error?
11392 sltu t0, t0, v0
11393 Index: linux-2.4.35.4/arch/mips64/kernel/scall_o32.S
11394 ===================================================================
11395 --- linux-2.4.35.4.orig/arch/mips64/kernel/scall_o32.S 2007-12-15 05:19:43.718912438 +0100
11396 +++ linux-2.4.35.4/arch/mips64/kernel/scall_o32.S 2007-12-15 05:19:44.906980142 +0100
11397 @@ -118,9 +118,8 @@
11398 sd a6, PT_R10(sp)
11399 sd a7, PT_R11(sp)
11400
11401 - sd t2,PT_R1(sp)
11402 + move s0, t2
11403 jal syscall_trace
11404 - ld t2,PT_R1(sp)
11405
11406 ld a0, PT_R4(sp) # Restore argument registers
11407 ld a1, PT_R5(sp)
11408 @@ -129,7 +128,7 @@
11409 ld a4, PT_R8(sp)
11410 ld a5, PT_R9(sp)
11411
11412 - jalr t2
11413 + jalr s0
11414
11415 li t0, -EMAXERRNO - 1 # error?
11416 sltu t0, t0, v0
11417 @@ -576,6 +575,8 @@
11418 sys_call_table:
11419 syscalltable
11420
11421 + .purgem sys
11422 +
11423 .macro sys function, nargs
11424 .byte \nargs
11425 .endm
11426 Index: linux-2.4.35.4/arch/mips64/kernel/setup.c
11427 ===================================================================
11428 --- linux-2.4.35.4.orig/arch/mips64/kernel/setup.c 2007-12-15 05:19:43.726912894 +0100
11429 +++ linux-2.4.35.4/arch/mips64/kernel/setup.c 2007-12-15 05:19:44.906980142 +0100
11430 @@ -129,14 +129,6 @@
11431 */
11432 load_mmu();
11433
11434 - /*
11435 - * On IP27, I am seeing the TS bit set when the kernel is loaded.
11436 - * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
11437 - * anyway ...
11438 - */
11439 - clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
11440 - set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
11441 -
11442 start_kernel();
11443 }
11444
11445 Index: linux-2.4.35.4/arch/mips64/kernel/signal_n32.c
11446 ===================================================================
11447 --- linux-2.4.35.4.orig/arch/mips64/kernel/signal_n32.c 2007-12-15 05:19:43.730913120 +0100
11448 +++ linux-2.4.35.4/arch/mips64/kernel/signal_n32.c 2007-12-15 05:19:44.906980142 +0100
11449 @@ -68,7 +68,7 @@
11450 };
11451
11452 extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11453 -extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11454 +extern int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11455
11456 asmlinkage void sysn32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
11457 {
11458 Index: linux-2.4.35.4/arch/mips64/kernel/traps.c
11459 ===================================================================
11460 --- linux-2.4.35.4.orig/arch/mips64/kernel/traps.c 2007-12-15 05:19:43.738913578 +0100
11461 +++ linux-2.4.35.4/arch/mips64/kernel/traps.c 2007-12-15 05:19:44.906980142 +0100
11462 @@ -462,9 +462,10 @@
11463 }
11464 ll_task = current;
11465
11466 + compute_return_epc(regs);
11467 +
11468 regs->regs[(opcode & RT) >> 16] = value;
11469
11470 - compute_return_epc(regs);
11471 return;
11472
11473 sig:
11474 @@ -495,8 +496,8 @@
11475 goto sig;
11476 }
11477 if (ll_bit == 0 || ll_task != current) {
11478 - regs->regs[reg] = 0;
11479 compute_return_epc(regs);
11480 + regs->regs[reg] = 0;
11481 return;
11482 }
11483
11484 @@ -505,9 +506,9 @@
11485 goto sig;
11486 }
11487
11488 + compute_return_epc(regs);
11489 regs->regs[reg] = 1;
11490
11491 - compute_return_epc(regs);
11492 return;
11493
11494 sig:
11495 @@ -809,13 +810,18 @@
11496 void __init per_cpu_trap_init(void)
11497 {
11498 unsigned int cpu = smp_processor_id();
11499 + unsigned int status_set = ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX;
11500
11501 - /* Some firmware leaves the BEV flag set, clear it. */
11502 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
11503 - set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
11504 -
11505 + /*
11506 + * Disable coprocessors, enable 64-bit addressing and set FPU
11507 + * for the 32/32 FPR register model. Reset the BEV flag that
11508 + * some firmware may have left set and the TS bit (for IP27).
11509 + * Set XX for ISA IV code to work.
11510 + */
11511 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
11512 - set_c0_status(ST0_XX);
11513 + status_set |= ST0_XX;
11514 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
11515 + status_set);
11516
11517 /*
11518 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
11519 @@ -825,13 +831,11 @@
11520 set_c0_cause(CAUSEF_IV);
11521
11522 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
11523 - write_c0_context(((long)(&pgd_current[cpu])) << 23);
11524 - write_c0_wired(0);
11525 + TLBMISS_HANDLER_SETUP();
11526
11527 atomic_inc(&init_mm.mm_count);
11528 current->active_mm = &init_mm;
11529 - if (current->mm)
11530 - BUG();
11531 + BUG_ON(current->mm);
11532 enter_lazy_tlb(&init_mm, current, cpu);
11533 }
11534
11535 @@ -842,8 +846,6 @@
11536 extern char except_vec4;
11537 unsigned long i;
11538
11539 - per_cpu_trap_init();
11540 -
11541 /* Copy the generic exception handlers to their final destination. */
11542 memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
11543 memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
11544 @@ -933,6 +935,5 @@
11545
11546 flush_icache_range(KSEG0, KSEG0 + 0x400);
11547
11548 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
11549 - current->active_mm = &init_mm;
11550 + per_cpu_trap_init();
11551 }
11552 Index: linux-2.4.35.4/arch/mips64/mm/cerr-sb1.c
11553 ===================================================================
11554 --- linux-2.4.35.4.orig/arch/mips64/mm/cerr-sb1.c 2007-12-15 05:19:43.746914033 +0100
11555 +++ linux-2.4.35.4/arch/mips64/mm/cerr-sb1.c 2007-12-15 05:19:44.906980142 +0100
11556 @@ -252,14 +252,14 @@
11557
11558 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
11559 static const uint64_t mask_72_64[8] = {
11560 - 0x0738C808099264FFL,
11561 - 0x38C808099264FF07L,
11562 - 0xC808099264FF0738L,
11563 - 0x08099264FF0738C8L,
11564 - 0x099264FF0738C808L,
11565 - 0x9264FF0738C80809L,
11566 - 0x64FF0738C8080992L,
11567 - 0xFF0738C808099264L
11568 + 0x0738C808099264FFULL,
11569 + 0x38C808099264FF07ULL,
11570 + 0xC808099264FF0738ULL,
11571 + 0x08099264FF0738C8ULL,
11572 + 0x099264FF0738C808ULL,
11573 + 0x9264FF0738C80809ULL,
11574 + 0x64FF0738C8080992ULL,
11575 + 0xFF0738C808099264ULL
11576 };
11577
11578 /* Calculate the parity on a range of bits */
11579 @@ -331,9 +331,9 @@
11580 ((lru >> 4) & 0x3),
11581 ((lru >> 6) & 0x3));
11582 }
11583 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
11584 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
11585 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
11586 - va |= 0x3FFFF00000000000;
11587 + va |= 0x3FFFF00000000000ULL;
11588 valid = ((taghi >> 29) & 1);
11589 if (valid) {
11590 tlo_tmp = taglo & 0xfff3ff;
11591 @@ -474,7 +474,7 @@
11592 : "r" ((way << 13) | addr));
11593
11594 taglo = ((unsigned long long)taglohi << 32) | taglolo;
11595 - pa = (taglo & 0xFFFFFFE000) | addr;
11596 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
11597 if (way == 0) {
11598 lru = (taghi >> 14) & 0xff;
11599 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
11600 Index: linux-2.4.35.4/arch/mips64/mm/c-r4k.c
11601 ===================================================================
11602 --- linux-2.4.35.4.orig/arch/mips64/mm/c-r4k.c 2007-12-15 05:19:43.754914488 +0100
11603 +++ linux-2.4.35.4/arch/mips64/mm/c-r4k.c 2007-12-15 05:19:44.910980368 +0100
11604 @@ -867,9 +867,16 @@
11605 * normally they'd suffer from aliases but magic in the hardware deals
11606 * with that for us so we don't need to take care ourselves.
11607 */
11608 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
11609 - if (c->dcache.waysize > PAGE_SIZE)
11610 - c->dcache.flags |= MIPS_CACHE_ALIASES;
11611 + switch (c->cputype) {
11612 + case CPU_R10000:
11613 + case CPU_R12000:
11614 + break;
11615 + case CPU_24K:
11616 + if (!(read_c0_config7() & (1 << 16)))
11617 + default:
11618 + if (c->dcache.waysize > PAGE_SIZE)
11619 + c->dcache.flags |= MIPS_CACHE_ALIASES;
11620 + }
11621
11622 switch (c->cputype) {
11623 case CPU_20KC:
11624 @@ -1070,9 +1077,6 @@
11625 setup_scache();
11626 coherency_setup();
11627
11628 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
11629 - c->dcache.flags |= MIPS_CACHE_ALIASES;
11630 -
11631 r4k_blast_dcache_page_setup();
11632 r4k_blast_dcache_page_indexed_setup();
11633 r4k_blast_dcache_setup();
11634 Index: linux-2.4.35.4/arch/mips64/mm/tlbex-r4k.S
11635 ===================================================================
11636 --- linux-2.4.35.4.orig/arch/mips64/mm/tlbex-r4k.S 2007-12-15 05:19:43.762914944 +0100
11637 +++ linux-2.4.35.4/arch/mips64/mm/tlbex-r4k.S 2007-12-15 05:19:44.910980368 +0100
11638 @@ -125,6 +125,33 @@
11639 nop
11640 END(except_vec1_r4k)
11641
11642 + __FINIT
11643 +
11644 + .align 5
11645 +LEAF(handle_vec1_r4k)
11646 + .set noat
11647 + LOAD_PTE2 k1 k0 9f
11648 + ld k0, 0(k1) # get even pte
11649 + ld k1, 8(k1) # get odd pte
11650 + PTE_RELOAD k0 k1
11651 + mtc0_tlbw_hazard
11652 + tlbwr
11653 + tlbw_eret_hazard
11654 + eret
11655 +
11656 +9: # handle the vmalloc range
11657 + LOAD_KPTE2 k1 k0 invalid_vmalloc_address
11658 + ld k0, 0(k1) # get even pte
11659 + ld k1, 8(k1) # get odd pte
11660 + PTE_RELOAD k0 k1
11661 + mtc0_tlbw_hazard
11662 + tlbwr
11663 + tlbw_eret_hazard
11664 + eret
11665 +END(handle_vec1_r4k)
11666 +
11667 + __INIT
11668 +
11669 LEAF(except_vec1_sb1)
11670 #if BCM1250_M3_WAR
11671 dmfc0 k0, CP0_BADVADDR
11672 @@ -134,28 +161,24 @@
11673 bnez k0, 1f
11674 #endif
11675 .set noat
11676 - dla k0, handle_vec1_r4k
11677 + dla k0, handle_vec1_sb1
11678 jr k0
11679 nop
11680
11681 1: eret
11682 - nop
11683 END(except_vec1_sb1)
11684
11685 __FINIT
11686
11687 .align 5
11688 -LEAF(handle_vec1_r4k)
11689 +LEAF(handle_vec1_sb1)
11690 .set noat
11691 LOAD_PTE2 k1 k0 9f
11692 ld k0, 0(k1) # get even pte
11693 ld k1, 8(k1) # get odd pte
11694 PTE_RELOAD k0 k1
11695 - rm9000_tlb_hazard
11696 - b 1f
11697 - tlbwr
11698 -1: nop
11699 - rm9000_tlb_hazard
11700 + mtc0_tlbw_hazard
11701 + tlbwr
11702 eret
11703
11704 9: # handle the vmalloc range
11705 @@ -163,13 +186,10 @@
11706 ld k0, 0(k1) # get even pte
11707 ld k1, 8(k1) # get odd pte
11708 PTE_RELOAD k0 k1
11709 - rm9000_tlb_hazard
11710 - b 1f
11711 - tlbwr
11712 -1: nop
11713 - rm9000_tlb_hazard
11714 + mtc0_tlbw_hazard
11715 + tlbwr
11716 eret
11717 -END(handle_vec1_r4k)
11718 +END(handle_vec1_sb1)
11719
11720
11721 __INIT
11722 @@ -195,10 +215,8 @@
11723 ld k0, 0(k1) # get even pte
11724 ld k1, 8(k1) # get odd pte
11725 PTE_RELOAD k0 k1
11726 - rm9000_tlb_hazard
11727 - nop
11728 + mtc0_tlbw_hazard
11729 tlbwr
11730 - rm9000_tlb_hazard
11731 eret
11732
11733 9: # handle the vmalloc range
11734 @@ -206,10 +224,8 @@
11735 ld k0, 0(k1) # get even pte
11736 ld k1, 8(k1) # get odd pte
11737 PTE_RELOAD k0 k1
11738 - rm9000_tlb_hazard
11739 - nop
11740 + mtc0_tlbw_hazard
11741 tlbwr
11742 - rm9000_tlb_hazard
11743 eret
11744 END(handle_vec1_r10k)
11745
11746 Index: linux-2.4.35.4/arch/mips64/mm/tlb-r4k.c
11747 ===================================================================
11748 --- linux-2.4.35.4.orig/arch/mips64/mm/tlb-r4k.c 2007-12-15 05:19:43.770915399 +0100
11749 +++ linux-2.4.35.4/arch/mips64/mm/tlb-r4k.c 2007-12-15 05:19:44.910980368 +0100
11750 @@ -1,24 +1,12 @@
11751 /*
11752 - * Carsten Langgaard, carstenl@mips.com
11753 - * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11754 - *
11755 - * This program is free software; you can distribute it and/or modify it
11756 - * under the terms of the GNU General Public License (Version 2) as
11757 - * published by the Free Software Foundation.
11758 - *
11759 - * This program is distributed in the hope it will be useful, but WITHOUT
11760 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11761 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11762 + * This file is subject to the terms and conditions of the GNU General Public
11763 + * License. See the file "COPYING" in the main directory of this archive
11764 * for more details.
11765 *
11766 - * You should have received a copy of the GNU General Public License along
11767 - * with this program; if not, write to the Free Software Foundation, Inc.,
11768 - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
11769 - *
11770 - * MIPS64 CPU variant specific MMU routines.
11771 - * These routine are not optimized in any way, they are done in a generic way
11772 - * so they can be used on all MIPS64 compliant CPUs, and also done in an
11773 - * attempt not to break anything for the R4xx0 style CPUs.
11774 + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
11775 + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
11776 + * Carsten Langgaard, carstenl@mips.com
11777 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11778 */
11779 #include <linux/init.h>
11780 #include <linux/sched.h>
11781 @@ -30,9 +18,6 @@
11782 #include <asm/pgtable.h>
11783 #include <asm/system.h>
11784
11785 -#undef DEBUG_TLB
11786 -#undef DEBUG_TLBUPDATE
11787 -
11788 extern void except_vec1_r4k(void);
11789
11790 /* CP0 hazard avoidance. */
11791 @@ -46,31 +31,23 @@
11792 unsigned long old_ctx;
11793 int entry;
11794
11795 -#ifdef DEBUG_TLB
11796 - printk("[tlball]");
11797 -#endif
11798 -
11799 local_irq_save(flags);
11800 /* Save old context and create impossible VPN2 value */
11801 old_ctx = read_c0_entryhi();
11802 - write_c0_entryhi(XKPHYS);
11803 write_c0_entrylo0(0);
11804 write_c0_entrylo1(0);
11805 - BARRIER;
11806
11807 entry = read_c0_wired();
11808
11809 /* Blast 'em all away. */
11810 - while(entry < current_cpu_data.tlbsize) {
11811 - /* Make sure all entries differ. */
11812 - write_c0_entryhi(XKPHYS+entry*0x2000);
11813 + while (entry < current_cpu_data.tlbsize) {
11814 + write_c0_entryhi(XKPHYS + entry*0x2000);
11815 write_c0_index(entry);
11816 - BARRIER;
11817 + mtc0_tlbw_hazard();
11818 tlb_write_indexed();
11819 - BARRIER;
11820 entry++;
11821 }
11822 - BARRIER;
11823 + tlbw_use_hazard();
11824 write_c0_entryhi(old_ctx);
11825 local_irq_restore(flags);
11826 }
11827 @@ -79,12 +56,8 @@
11828 {
11829 int cpu = smp_processor_id();
11830
11831 - if (cpu_context(cpu, mm) != 0) {
11832 -#ifdef DEBUG_TLB
11833 - printk("[tlbmm<%d>]", mm->context);
11834 -#endif
11835 + if (cpu_context(cpu, mm) != 0)
11836 drop_mmu_context(mm,cpu);
11837 - }
11838 }
11839
11840 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
11841 @@ -96,10 +69,6 @@
11842 unsigned long flags;
11843 int size;
11844
11845 -#ifdef DEBUG_TLB
11846 - printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & ASID_MASK),
11847 - start, end);
11848 -#endif
11849 local_irq_save(flags);
11850 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
11851 size = (size + 1) >> 1;
11852 @@ -110,25 +79,25 @@
11853 start &= (PAGE_MASK << 1);
11854 end += ((PAGE_SIZE << 1) - 1);
11855 end &= (PAGE_MASK << 1);
11856 - while(start < end) {
11857 + while (start < end) {
11858 int idx;
11859
11860 write_c0_entryhi(start | newpid);
11861 start += (PAGE_SIZE << 1);
11862 - BARRIER;
11863 + mtc0_tlbw_hazard();
11864 tlb_probe();
11865 BARRIER;
11866 idx = read_c0_index();
11867 write_c0_entrylo0(0);
11868 write_c0_entrylo1(0);
11869 - if(idx < 0)
11870 + if (idx < 0)
11871 continue;
11872 /* Make sure all entries differ. */
11873 write_c0_entryhi(XKPHYS+idx*0x2000);
11874 - BARRIER;
11875 + mtc0_tlbw_hazard();
11876 tlb_write_indexed();
11877 - BARRIER;
11878 }
11879 + tlbw_use_hazard();
11880 write_c0_entryhi(oldpid);
11881 } else {
11882 drop_mmu_context(mm, cpu);
11883 @@ -145,28 +114,26 @@
11884 unsigned long flags;
11885 unsigned long oldpid, newpid, idx;
11886
11887 -#ifdef DEBUG_TLB
11888 - printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
11889 -#endif
11890 newpid = cpu_asid(cpu, vma->vm_mm);
11891 page &= (PAGE_MASK << 1);
11892 local_irq_save(flags);
11893 oldpid = read_c0_entryhi();
11894 write_c0_entryhi(page | newpid);
11895 - BARRIER;
11896 + mtc0_tlbw_hazard();
11897 tlb_probe();
11898 BARRIER;
11899 idx = read_c0_index();
11900 write_c0_entrylo0(0);
11901 write_c0_entrylo1(0);
11902 - if(idx < 0)
11903 + if (idx < 0)
11904 goto finish;
11905 /* Make sure all entries differ. */
11906 write_c0_entryhi(XKPHYS+idx*0x2000);
11907 - BARRIER;
11908 + mtc0_tlbw_hazard();
11909 tlb_write_indexed();
11910 + tlbw_use_hazard();
11911 +
11912 finish:
11913 - BARRIER;
11914 write_c0_entryhi(oldpid);
11915 local_irq_restore(flags);
11916 }
11917 @@ -186,7 +153,7 @@
11918
11919 local_irq_save(flags);
11920 write_c0_entryhi(page);
11921 - BARRIER;
11922 + mtc0_tlbw_hazard();
11923 tlb_probe();
11924 BARRIER;
11925 idx = read_c0_index();
11926 @@ -195,10 +162,12 @@
11927 if (idx >= 0) {
11928 /* Make sure all entries differ. */
11929 write_c0_entryhi(KSEG0+idx*0x2000);
11930 + mtc0_tlbw_hazard();
11931 tlb_write_indexed();
11932 + tlbw_use_hazard();
11933 }
11934 - BARRIER;
11935 write_c0_entryhi(oldpid);
11936 +
11937 local_irq_restore(flags);
11938 }
11939
11940 @@ -208,7 +177,6 @@
11941 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
11942 {
11943 unsigned long flags;
11944 - unsigned int asid;
11945 pgd_t *pgdp;
11946 pmd_t *pmdp;
11947 pte_t *ptep;
11948 @@ -222,70 +190,58 @@
11949
11950 pid = read_c0_entryhi() & ASID_MASK;
11951
11952 -#ifdef DEBUG_TLB
11953 - if ((pid != (cpu_asid(smp_processor_id(), vma->vm_mm))) ||
11954 - (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
11955 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d"
11956 - "tlbpid=%d\n", (int) (cpu_context(smp_processor_id(),
11957 - vma->vm_mm) & ASID_MASK), pid);
11958 - }
11959 -#endif
11960 -
11961 local_irq_save(flags);
11962 address &= (PAGE_MASK << 1);
11963 - write_c0_entryhi(address | (pid));
11964 + write_c0_entryhi(address | pid);
11965 pgdp = pgd_offset(vma->vm_mm, address);
11966 - BARRIER;
11967 + mtc0_tlbw_hazard();
11968 tlb_probe();
11969 BARRIER;
11970 pmdp = pmd_offset(pgdp, address);
11971 idx = read_c0_index();
11972 ptep = pte_offset(pmdp, address);
11973 - BARRIER;
11974 write_c0_entrylo0(pte_val(*ptep++) >> 6);
11975 write_c0_entrylo1(pte_val(*ptep) >> 6);
11976 - write_c0_entryhi(address | (pid));
11977 - BARRIER;
11978 - if(idx < 0) {
11979 + write_c0_entryhi(address | pid);
11980 + mtc0_tlbw_hazard();
11981 + if (idx < 0)
11982 tlb_write_random();
11983 - } else {
11984 + else
11985 tlb_write_indexed();
11986 - }
11987 - BARRIER;
11988 + tlbw_use_hazard();
11989 write_c0_entryhi(pid);
11990 - BARRIER;
11991 local_irq_restore(flags);
11992 }
11993
11994 -void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
11995 - unsigned long entryhi, unsigned long pagemask)
11996 +void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
11997 + unsigned long entryhi, unsigned long pagemask)
11998 {
11999 - unsigned long flags;
12000 - unsigned long wired;
12001 - unsigned long old_pagemask;
12002 - unsigned long old_ctx;
12003 -
12004 - local_irq_save(flags);
12005 - /* Save old context and create impossible VPN2 value */
12006 - old_ctx = (read_c0_entryhi() & ASID_MASK);
12007 - old_pagemask = read_c0_pagemask();
12008 - wired = read_c0_wired();
12009 - write_c0_wired(wired + 1);
12010 - write_c0_index(wired);
12011 - BARRIER;
12012 - write_c0_pagemask(pagemask);
12013 - write_c0_entryhi(entryhi);
12014 - write_c0_entrylo0(entrylo0);
12015 - write_c0_entrylo1(entrylo1);
12016 - BARRIER;
12017 - tlb_write_indexed();
12018 - BARRIER;
12019 -
12020 - write_c0_entryhi(old_ctx);
12021 - BARRIER;
12022 - write_c0_pagemask(old_pagemask);
12023 - local_flush_tlb_all();
12024 - local_irq_restore(flags);
12025 + unsigned long flags;
12026 + unsigned long wired;
12027 + unsigned long old_pagemask;
12028 + unsigned long old_ctx;
12029 +
12030 + local_irq_save(flags);
12031 + /* Save old context and create impossible VPN2 value */
12032 + old_ctx = read_c0_entryhi() & ASID_MASK;
12033 + old_pagemask = read_c0_pagemask();
12034 + wired = read_c0_wired();
12035 + write_c0_wired(wired + 1);
12036 + write_c0_index(wired);
12037 + BARRIER;
12038 + write_c0_pagemask(pagemask);
12039 + write_c0_entryhi(entryhi);
12040 + write_c0_entrylo0(entrylo0);
12041 + write_c0_entrylo1(entrylo1);
12042 + mtc0_tlbw_hazard();
12043 + tlb_write_indexed();
12044 + tlbw_use_hazard();
12045 +
12046 + write_c0_entryhi(old_ctx);
12047 + BARRIER;
12048 + write_c0_pagemask(old_pagemask);
12049 + local_flush_tlb_all();
12050 + local_irq_restore(flags);
12051 }
12052
12053 /*
12054 @@ -317,17 +273,15 @@
12055 }
12056
12057 write_c0_index(temp_tlb_entry);
12058 - BARRIER;
12059 write_c0_pagemask(pagemask);
12060 write_c0_entryhi(entryhi);
12061 write_c0_entrylo0(entrylo0);
12062 write_c0_entrylo1(entrylo1);
12063 - BARRIER;
12064 + mtc0_tlbw_hazard();
12065 tlb_write_indexed();
12066 - BARRIER;
12067 + tlbw_use_hazard();
12068
12069 write_c0_entryhi(old_ctx);
12070 - BARRIER;
12071 write_c0_pagemask(old_pagemask);
12072 out:
12073 local_irq_restore(flags);
12074 @@ -348,15 +302,23 @@
12075 return;
12076
12077 config1 = read_c0_config1();
12078 - if (!((config1 >> 7) & 3))
12079 - panic("No MMU present");
12080 + if (!((config >> 7) & 3))
12081 + panic("No TLB present");
12082
12083 c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
12084 }
12085
12086 void __init r4k_tlb_init(void)
12087 {
12088 - unsigned long config = read_c0_config();
12089 + unsigned int config = read_c0_config();
12090 +
12091 + /*
12092 + * You should never change this register:
12093 + * - On R4600 1.7 the tlbp never hits for pages smaller than
12094 + * the value in the c0_pagemask register.
12095 + * - The entire mm handling assumes the c0_pagemask register to
12096 + * be set for 4kb pages.
12097 + */
12098 probe_tlb(config);
12099 write_c0_pagemask(PM_DEFAULT_MASK);
12100 write_c0_wired(0);
12101 Index: linux-2.4.35.4/drivers/char/au1000_gpio.c
12102 ===================================================================
12103 --- linux-2.4.35.4.orig/drivers/char/au1000_gpio.c 2007-12-15 05:19:43.778915857 +0100
12104 +++ linux-2.4.35.4/drivers/char/au1000_gpio.c 2007-12-15 05:19:44.910980368 +0100
12105 @@ -246,7 +246,7 @@
12106
12107 static struct miscdevice au1000gpio_miscdev =
12108 {
12109 - GPIO_MINOR,
12110 + MISC_DYNAMIC_MINOR,
12111 "au1000_gpio",
12112 &au1000gpio_fops
12113 };
12114 Index: linux-2.4.35.4/drivers/char/au1550_psc_spi.c
12115 ===================================================================
12116 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
12117 +++ linux-2.4.35.4/drivers/char/au1550_psc_spi.c 2007-12-15 05:19:44.914980597 +0100
12118 @@ -0,0 +1,466 @@
12119 +/*
12120 + * Driver for Alchemy Au1550 SPI on the PSC.
12121 + *
12122 + * Copyright 2004 Embedded Edge, LLC.
12123 + * dan@embeddededge.com
12124 + *
12125 + * This program is free software; you can redistribute it and/or modify it
12126 + * under the terms of the GNU General Public License as published by the
12127 + * Free Software Foundation; either version 2 of the License, or (at your
12128 + * option) any later version.
12129 + *
12130 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12131 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
12132 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12133 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
12134 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12135 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
12136 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
12137 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
12138 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
12139 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
12140 + *
12141 + * You should have received a copy of the GNU General Public License along
12142 + * with this program; if not, write to the Free Software Foundation, Inc.,
12143 + * 675 Mass Ave, Cambridge, MA 02139, USA.
12144 + */
12145 +
12146 +#include <linux/module.h>
12147 +#include <linux/config.h>
12148 +#include <linux/types.h>
12149 +#include <linux/kernel.h>
12150 +#include <linux/miscdevice.h>
12151 +#include <linux/init.h>
12152 +#include <asm/uaccess.h>
12153 +#include <asm/io.h>
12154 +#include <asm/au1000.h>
12155 +#include <asm/au1550_spi.h>
12156 +#include <asm/au1xxx_psc.h>
12157 +
12158 +#ifdef CONFIG_MIPS_PB1550
12159 +#include <asm/pb1550.h>
12160 +#endif
12161 +
12162 +#ifdef CONFIG_MIPS_DB1550
12163 +#include <asm/db1x00.h>
12164 +#endif
12165 +
12166 +#ifdef CONFIG_MIPS_PB1200
12167 +#include <asm/pb1200.h>
12168 +#endif
12169 +
12170 +/* This is just a simple programmed I/O SPI interface on the PSC of the 1550.
12171 + * We support open, close, write, and ioctl. The SPI is a full duplex
12172 + * interface, you can't read without writing. So, the write system call
12173 + * copies the bytes out to the SPI, and whatever is returned is placed
12174 + * in the same buffer. Kinda weird, maybe we'll change it, but for now
12175 + * it works OK.
12176 + * I didn't implement any DMA yet, and it's a debate about the necessity.
12177 + * The SPI clocks are usually quite fast, so data is sent/received as
12178 + * quickly as you can stuff the FIFO. The overhead of DMA and interrupts
12179 + * are usually far greater than the data transfer itself. If, however,
12180 + * we find applications that move large amounts of data, we may choose
12181 + * use the overhead of buffering and DMA to do the work.
12182 + */
12183 +
12184 +/* The maximum clock rate specified in the manual is 2mHz.
12185 +*/
12186 +#define MAX_BAUD_RATE (2 * 1000000)
12187 +#define PSC_INTCLK_RATE (32 * 1000000)
12188 +
12189 +static int inuse;
12190 +
12191 +/* We have to know what the user requested for the data length
12192 + * so we know how to stuff the fifo. The FIFO is 32 bits wide,
12193 + * and we have to load it with the bits to go in a single transfer.
12194 + */
12195 +static uint spi_datalen;
12196 +
12197 +static int
12198 +au1550spi_master_done( int ms )
12199 +{
12200 + int timeout=ms;
12201 + volatile psc_spi_t *sp;
12202 +
12203 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12204 +
12205 + /* Loop until MD is set or timeout has expired */
12206 + while(!(sp->psc_spievent & PSC_SPIEVNT_MD) && timeout--) udelay(1000);
12207 +
12208 + if ( !timeout )
12209 + return 0;
12210 + else
12211 + sp->psc_spievent |= PSC_SPIEVNT_MD;
12212 +
12213 + return 1;
12214 +}
12215 +
12216 +static int
12217 +au1550spi_open(struct inode *inode, struct file *file)
12218 +{
12219 + if (inuse)
12220 + return -EBUSY;
12221 +
12222 + inuse = 1;
12223 +
12224 + MOD_INC_USE_COUNT;
12225 +
12226 + return 0;
12227 +}
12228 +
12229 +static ssize_t
12230 +au1550spi_write(struct file *fp, const char *bp, size_t count, loff_t *ppos)
12231 +{
12232 + int bytelen, i;
12233 + size_t rcount, retval;
12234 + unsigned char sb, *rp, *wp;
12235 + uint fifoword, pcr, stat;
12236 + volatile psc_spi_t *sp;
12237 +
12238 + /* Get the number of bytes per transfer.
12239 + */
12240 + bytelen = ((spi_datalen - 1) / 8) + 1;
12241 +
12242 + /* User needs to send us multiple of this count.
12243 + */
12244 + if ((count % bytelen) != 0)
12245 + return -EINVAL;
12246 +
12247 + rp = wp = (unsigned char *)bp;
12248 + retval = rcount = count;
12249 +
12250 + /* Reset the FIFO.
12251 + */
12252 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12253 + sp->psc_spipcr = (PSC_SPIPCR_RC | PSC_SPIPCR_TC);
12254 + au_sync();
12255 + do {
12256 + pcr = sp->psc_spipcr;
12257 + au_sync();
12258 + } while (pcr != 0);
12259 +
12260 + /* Prime the transmit FIFO.
12261 + */
12262 + while (count > 0) {
12263 + fifoword = 0;
12264 + for (i=0; i<bytelen; i++) {
12265 + fifoword <<= 8;
12266 + if (get_user(sb, wp) < 0)
12267 + return -EFAULT;
12268 + fifoword |= sb;
12269 + wp++;
12270 + }
12271 + count -= bytelen;
12272 + if (count <= 0)
12273 + fifoword |= PSC_SPITXRX_LC;
12274 + sp->psc_spitxrx = fifoword;
12275 + au_sync();
12276 + stat = sp->psc_spistat;
12277 + au_sync();
12278 + if (stat & PSC_SPISTAT_TF)
12279 + break;
12280 + }
12281 +
12282 + /* Start the transfer.
12283 + */
12284 + sp->psc_spipcr = PSC_SPIPCR_MS;
12285 + au_sync();
12286 +
12287 + /* Now, just keep the transmit fifo full and empty the receive.
12288 + */
12289 + while (count > 0) {
12290 + stat = sp->psc_spistat;
12291 + au_sync();
12292 + while ((stat & PSC_SPISTAT_RE) == 0) {
12293 + fifoword = sp->psc_spitxrx;
12294 + au_sync();
12295 + for (i=0; i<bytelen; i++) {
12296 + sb = fifoword & 0xff;
12297 + if (put_user(sb, rp) < 0)
12298 + return -EFAULT;
12299 + fifoword >>= 8;
12300 + rp++;
12301 + }
12302 + rcount -= bytelen;
12303 + stat = sp->psc_spistat;
12304 + au_sync();
12305 + }
12306 + if ((stat & PSC_SPISTAT_TF) == 0) {
12307 + fifoword = 0;
12308 + for (i=0; i<bytelen; i++) {
12309 + fifoword <<= 8;
12310 + if (get_user(sb, wp) < 0)
12311 + return -EFAULT;
12312 + fifoword |= sb;
12313 + wp++;
12314 + }
12315 + count -= bytelen;
12316 + if (count <= 0)
12317 + fifoword |= PSC_SPITXRX_LC;
12318 + sp->psc_spitxrx = fifoword;
12319 + au_sync();
12320 + }
12321 + }
12322 +
12323 + /* All of the bytes for transmit have been written. Hang
12324 + * out waiting for any residual bytes that are yet to be
12325 + * read from the fifo.
12326 + */
12327 + while (rcount > 0) {
12328 + stat = sp->psc_spistat;
12329 + au_sync();
12330 + if ((stat & PSC_SPISTAT_RE) == 0) {
12331 + fifoword = sp->psc_spitxrx;
12332 + au_sync();
12333 + for (i=0; i<bytelen; i++) {
12334 + sb = fifoword & 0xff;
12335 + if (put_user(sb, rp) < 0)
12336 + return -EFAULT;
12337 + fifoword >>= 8;
12338 + rp++;
12339 + }
12340 + rcount -= bytelen;
12341 + }
12342 + }
12343 +
12344 + /* Wait for MasterDone event. 30ms timeout */
12345 + if (!au1550spi_master_done(30) ) retval = -EFAULT;
12346 + return retval;
12347 +}
12348 +
12349 +static int
12350 +au1550spi_release(struct inode *inode, struct file *file)
12351 +{
12352 + MOD_DEC_USE_COUNT;
12353 +
12354 + inuse = 0;
12355 +
12356 + return 0;
12357 +}
12358 +
12359 +/* Set the baud rate closest to the request, then return the actual
12360 + * value we are using.
12361 + */
12362 +static uint
12363 +set_baud_rate(uint baud)
12364 +{
12365 + uint rate, tmpclk, brg, ctl, stat;
12366 + volatile psc_spi_t *sp;
12367 +
12368 + /* For starters, the input clock is divided by two.
12369 + */
12370 + tmpclk = PSC_INTCLK_RATE/2;
12371 +
12372 + rate = tmpclk / baud;
12373 +
12374 + /* The dividers work as follows:
12375 + * baud = tmpclk / (2 * (brg + 1))
12376 + */
12377 + brg = (rate/2) - 1;
12378 +
12379 + /* Test BRG to ensure it will fit into the 6 bits allocated.
12380 + */
12381 +
12382 + /* Make sure the device is disabled while we make the change.
12383 + */
12384 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12385 + ctl = sp->psc_spicfg;
12386 + au_sync();
12387 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
12388 + au_sync();
12389 + ctl = PSC_SPICFG_CLR_BAUD(ctl);
12390 + ctl |= PSC_SPICFG_SET_BAUD(brg);
12391 + sp->psc_spicfg = ctl;
12392 + au_sync();
12393 +
12394 + /* If the device was running prior to getting here, wait for
12395 + * it to restart.
12396 + */
12397 + if (ctl & PSC_SPICFG_DE_ENABLE) {
12398 + do {
12399 + stat = sp->psc_spistat;
12400 + au_sync();
12401 + } while ((stat & PSC_SPISTAT_DR) == 0);
12402 + }
12403 +
12404 + /* Return the actual value.
12405 + */
12406 + rate = tmpclk / (2 * (brg + 1));
12407 +
12408 + return(rate);
12409 +}
12410 +
12411 +static uint
12412 +set_word_len(uint len)
12413 +{
12414 + uint ctl, stat;
12415 + volatile psc_spi_t *sp;
12416 +
12417 + if ((len < 4) || (len > 24))
12418 + return -EINVAL;
12419 +
12420 + /* Make sure the device is disabled while we make the change.
12421 + */
12422 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12423 + ctl = sp->psc_spicfg;
12424 + au_sync();
12425 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
12426 + au_sync();
12427 + ctl = PSC_SPICFG_CLR_LEN(ctl);
12428 + ctl |= PSC_SPICFG_SET_LEN(len);
12429 + sp->psc_spicfg = ctl;
12430 + au_sync();
12431 +
12432 + /* If the device was running prior to getting here, wait for
12433 + * it to restart.
12434 + */
12435 + if (ctl & PSC_SPICFG_DE_ENABLE) {
12436 + do {
12437 + stat = sp->psc_spistat;
12438 + au_sync();
12439 + } while ((stat & PSC_SPISTAT_DR) == 0);
12440 + }
12441 +
12442 + return 0;
12443 +}
12444 +
12445 +static int
12446 +au1550spi_ioctl(struct inode *inode, struct file *file,
12447 + unsigned int cmd, unsigned long arg)
12448 +{
12449 + int status;
12450 + u32 val;
12451 +
12452 + status = 0;
12453 +
12454 + switch(cmd) {
12455 + case AU1550SPI_WORD_LEN:
12456 + status = set_word_len(arg);
12457 + break;
12458 +
12459 + case AU1550SPI_SET_BAUD:
12460 + if (get_user(val, (u32 *)arg))
12461 + return -EFAULT;
12462 +
12463 + val = set_baud_rate(val);
12464 + if (put_user(val, (u32 *)arg))
12465 + return -EFAULT;
12466 + break;
12467 +
12468 + default:
12469 + status = -ENOIOCTLCMD;
12470 +
12471 + }
12472 +
12473 + return status;
12474 +}
12475 +
12476 +
12477 +static struct file_operations au1550spi_fops =
12478 +{
12479 + owner: THIS_MODULE,
12480 + write: au1550spi_write,
12481 + ioctl: au1550spi_ioctl,
12482 + open: au1550spi_open,
12483 + release: au1550spi_release,
12484 +};
12485 +
12486 +
12487 +static struct miscdevice au1550spi_miscdev =
12488 +{
12489 + MISC_DYNAMIC_MINOR,
12490 + "au1550_spi",
12491 + &au1550spi_fops
12492 +};
12493 +
12494 +
12495 +int __init
12496 +au1550spi_init(void)
12497 +{
12498 + uint clk, rate, stat;
12499 + volatile psc_spi_t *sp;
12500 +
12501 + /* Wire up Freq3 as a clock for the SPI. The PSC does
12502 + * factor of 2 divisor, so run a higher rate so we can
12503 + * get some granularity to the clock speeds.
12504 + * We can't do this in board set up because the frequency
12505 + * is computed too late.
12506 + */
12507 + rate = get_au1x00_speed();
12508 + rate /= PSC_INTCLK_RATE;
12509 +
12510 + /* The FRDIV in the frequency control is (FRDIV + 1) * 2
12511 + */
12512 + rate /=2;
12513 + rate--;
12514 + clk = au_readl(SYS_FREQCTRL1);
12515 + au_sync();
12516 + clk &= ~SYS_FC_FRDIV3_MASK;
12517 + clk |= (rate << SYS_FC_FRDIV3_BIT);
12518 + clk |= SYS_FC_FE3;
12519 + au_writel(clk, SYS_FREQCTRL1);
12520 + au_sync();
12521 +
12522 + /* Set up the clock source routing to get Freq3 to PSC0_intclk.
12523 + */
12524 + clk = au_readl(SYS_CLKSRC);
12525 + au_sync();
12526 + clk &= ~0x03e0;
12527 + clk |= (5 << 7);
12528 + au_writel(clk, SYS_CLKSRC);
12529 + au_sync();
12530 +
12531 + /* Set up GPIO pin function to drive PSC0_SYNC1, which is
12532 + * the SPI Select.
12533 + */
12534 + clk = au_readl(SYS_PINFUNC);
12535 + au_sync();
12536 + clk |= 1;
12537 + au_writel(clk, SYS_PINFUNC);
12538 + au_sync();
12539 +
12540 + /* Now, set up the PSC for SPI PIO mode.
12541 + */
12542 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12543 + sp->psc_ctrl = PSC_CTRL_DISABLE;
12544 + au_sync();
12545 + sp->psc_sel = PSC_SEL_PS_SPIMODE;
12546 + sp->psc_spicfg = 0;
12547 + au_sync();
12548 + sp->psc_ctrl = PSC_CTRL_ENABLE;
12549 + au_sync();
12550 + do {
12551 + stat = sp->psc_spistat;
12552 + au_sync();
12553 + } while ((stat & PSC_SPISTAT_SR) == 0);
12554 +
12555 + sp->psc_spicfg = (PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8 |
12556 + PSC_SPICFG_DD_DISABLE | PSC_SPICFG_MO);
12557 + sp->psc_spicfg |= PSC_SPICFG_SET_LEN(8);
12558 + spi_datalen = 8;
12559 + sp->psc_spimsk = PSC_SPIMSK_ALLMASK;
12560 + au_sync();
12561 +
12562 + set_baud_rate(1000000);
12563 +
12564 + sp->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
12565 + do {
12566 + stat = sp->psc_spistat;
12567 + au_sync();
12568 + } while ((stat & PSC_SPISTAT_DR) == 0);
12569 +
12570 + misc_register(&au1550spi_miscdev);
12571 + printk("Au1550 SPI driver\n");
12572 + return 0;
12573 +}
12574 +
12575 +
12576 +void __exit
12577 +au1550spi_exit(void)
12578 +{
12579 + misc_deregister(&au1550spi_miscdev);
12580 +}
12581 +
12582 +
12583 +module_init(au1550spi_init);
12584 +module_exit(au1550spi_exit);
12585 Index: linux-2.4.35.4/drivers/char/Config.in
12586 ===================================================================
12587 --- linux-2.4.35.4.orig/drivers/char/Config.in 2007-12-15 05:19:43.790916539 +0100
12588 +++ linux-2.4.35.4/drivers/char/Config.in 2007-12-15 05:19:44.914980597 +0100
12589 @@ -314,14 +314,11 @@
12590 if [ "$CONFIG_OBSOLETE" = "y" -a "$CONFIG_ALPHA_BOOK1" = "y" ]; then
12591 bool 'Tadpole ANA H8 Support (OBSOLETE)' CONFIG_H8
12592 fi
12593 -if [ "$CONFIG_MIPS" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then
12594 - tristate 'Generic MIPS RTC Support' CONFIG_MIPS_RTC
12595 -fi
12596 if [ "$CONFIG_SGI_IP22" = "y" ]; then
12597 - bool 'SGI DS1286 RTC support' CONFIG_SGI_DS1286
12598 + tristate 'Dallas DS1286 RTC support' CONFIG_DS1286
12599 fi
12600 if [ "$CONFIG_SGI_IP27" = "y" ]; then
12601 - bool 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
12602 + tristate 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
12603 fi
12604 if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" -o "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
12605 tristate 'Dallas DS1742 RTC support' CONFIG_DS1742
12606 @@ -384,6 +381,11 @@
12607 source drivers/char/drm/Config.in
12608 fi
12609 fi
12610 +
12611 +if [ "$CONFIG_X86" = "y" ]; then
12612 + tristate 'ACP Modem (Mwave) support' CONFIG_MWAVE
12613 +fi
12614 +
12615 endmenu
12616
12617 if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
12618 @@ -392,6 +394,7 @@
12619 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
12620 tristate ' Alchemy Au1x00 GPIO device support' CONFIG_AU1X00_GPIO
12621 tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1X00_ADS7846
12622 + #tristate ' Alchemy Au1550 PSC SPI support' CONFIG_AU1550_PSC_SPI
12623 fi
12624 if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
12625 tristate ' ITE GPIO' CONFIG_ITE_GPIO
12626 Index: linux-2.4.35.4/drivers/char/decserial.c
12627 ===================================================================
12628 --- linux-2.4.35.4.orig/drivers/char/decserial.c 2007-12-15 05:19:43.798916997 +0100
12629 +++ linux-2.4.35.4/drivers/char/decserial.c 2007-12-15 05:19:44.914980597 +0100
12630 @@ -3,95 +3,105 @@
12631 * choose the right serial device at boot time
12632 *
12633 * triemer 6-SEP-1998
12634 - * sercons.c is designed to allow the three different kinds
12635 + * sercons.c is designed to allow the three different kinds
12636 * of serial devices under the decstation world to co-exist
12637 - * in the same kernel. The idea here is to abstract
12638 + * in the same kernel. The idea here is to abstract
12639 * the pieces of the drivers that are common to this file
12640 * so that they do not clash at compile time and runtime.
12641 *
12642 * HK 16-SEP-1998 v0.002
12643 * removed the PROM console as this is not a real serial
12644 * device. Added support for PROM console in drivers/char/tty_io.c
12645 - * instead. Although it may work to enable more than one
12646 + * instead. Although it may work to enable more than one
12647 * console device I strongly recommend to use only one.
12648 + *
12649 + * Copyright (C) 2004 Maciej W. Rozycki
12650 */
12651
12652 #include <linux/config.h>
12653 +#include <linux/errno.h>
12654 #include <linux/init.h>
12655 +
12656 #include <asm/dec/machtype.h>
12657 +#include <asm/dec/serial.h>
12658 +
12659 +extern int register_zs_hook(unsigned int channel,
12660 + struct dec_serial_hook *hook);
12661 +extern int unregister_zs_hook(unsigned int channel);
12662 +
12663 +extern int register_dz_hook(unsigned int channel,
12664 + struct dec_serial_hook *hook);
12665 +extern int unregister_dz_hook(unsigned int channel);
12666
12667 +int register_dec_serial_hook(unsigned int channel,
12668 + struct dec_serial_hook *hook)
12669 +{
12670 #ifdef CONFIG_ZS
12671 -extern int zs_init(void);
12672 + if (IOASIC)
12673 + return register_zs_hook(channel, hook);
12674 #endif
12675 -
12676 #ifdef CONFIG_DZ
12677 -extern int dz_init(void);
12678 + if (!IOASIC)
12679 + return register_dz_hook(channel, hook);
12680 #endif
12681 + return 0;
12682 +}
12683
12684 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
12685 -
12686 +int unregister_dec_serial_hook(unsigned int channel)
12687 +{
12688 #ifdef CONFIG_ZS
12689 -extern void zs_serial_console_init(void);
12690 + if (IOASIC)
12691 + return unregister_zs_hook(channel);
12692 #endif
12693 -
12694 #ifdef CONFIG_DZ
12695 -extern void dz_serial_console_init(void);
12696 -#endif
12697 -
12698 + if (!IOASIC)
12699 + return unregister_dz_hook(channel);
12700 #endif
12701 + return 0;
12702 +}
12703
12704 -/* rs_init - starts up the serial interface -
12705 - handle normal case of starting up the serial interface */
12706
12707 -#ifdef CONFIG_SERIAL_DEC
12708 +extern int zs_init(void);
12709 +extern int dz_init(void);
12710
12711 +/*
12712 + * rs_init - starts up the serial interface -
12713 + * handle normal case of starting up the serial interface
12714 + */
12715 int __init rs_init(void)
12716 {
12717 -
12718 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
12719 - if (IOASIC)
12720 - return zs_init();
12721 - else
12722 - return dz_init();
12723 -#else
12724 -
12725 #ifdef CONFIG_ZS
12726 - return zs_init();
12727 + if (IOASIC)
12728 + return zs_init();
12729 #endif
12730 -
12731 #ifdef CONFIG_DZ
12732 - return dz_init();
12733 -#endif
12734 -
12735 + if (!IOASIC)
12736 + return dz_init();
12737 #endif
12738 + return -ENXIO;
12739 }
12740
12741 __initcall(rs_init);
12742
12743 -#endif
12744
12745 #ifdef CONFIG_SERIAL_DEC_CONSOLE
12746
12747 -/* dec_serial_console_init handles the special case of starting
12748 - * up the console on the serial port
12749 +extern void zs_serial_console_init(void);
12750 +extern void dz_serial_console_init(void);
12751 +
12752 +/*
12753 + * dec_serial_console_init handles the special case of starting
12754 + * up the console on the serial port
12755 */
12756 void __init dec_serial_console_init(void)
12757 {
12758 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
12759 - if (IOASIC)
12760 - zs_serial_console_init();
12761 - else
12762 - dz_serial_console_init();
12763 -#else
12764 -
12765 #ifdef CONFIG_ZS
12766 - zs_serial_console_init();
12767 + if (IOASIC)
12768 + zs_serial_console_init();
12769 #endif
12770 -
12771 #ifdef CONFIG_DZ
12772 - dz_serial_console_init();
12773 -#endif
12774 -
12775 + if (!IOASIC)
12776 + dz_serial_console_init();
12777 #endif
12778 }
12779
12780 Index: linux-2.4.35.4/drivers/char/ds1286.c
12781 ===================================================================
12782 --- linux-2.4.35.4.orig/drivers/char/ds1286.c 2007-12-15 05:19:43.806917453 +0100
12783 +++ linux-2.4.35.4/drivers/char/ds1286.c 2007-12-15 05:19:44.914980597 +0100
12784 @@ -1,6 +1,10 @@
12785 /*
12786 * DS1286 Real Time Clock interface for Linux
12787 *
12788 + * Copyright (C) 2003 TimeSys Corp.
12789 + * S. James Hill (James.Hill@timesys.com)
12790 + * (sjhill@realitydiluted.com)
12791 + *
12792 * Copyright (C) 1998, 1999, 2000 Ralf Baechle
12793 *
12794 * Based on code written by Paul Gortmaker.
12795 @@ -29,6 +33,7 @@
12796 #include <linux/types.h>
12797 #include <linux/errno.h>
12798 #include <linux/miscdevice.h>
12799 +#include <linux/module.h>
12800 #include <linux/slab.h>
12801 #include <linux/ioport.h>
12802 #include <linux/fcntl.h>
12803 @@ -95,6 +100,12 @@
12804 return -EIO;
12805 }
12806
12807 +void rtc_ds1286_wait(void)
12808 +{
12809 + unsigned char sec = CMOS_READ(RTC_SECONDS);
12810 + while (sec == CMOS_READ(RTC_SECONDS));
12811 +}
12812 +
12813 static int ds1286_ioctl(struct inode *inode, struct file *file,
12814 unsigned int cmd, unsigned long arg)
12815 {
12816 @@ -249,23 +260,22 @@
12817 {
12818 spin_lock_irq(&ds1286_lock);
12819
12820 - if (ds1286_status & RTC_IS_OPEN)
12821 - goto out_busy;
12822 + if (ds1286_status & RTC_IS_OPEN) {
12823 + spin_unlock_irq(&ds1286_lock);
12824 + return -EBUSY;
12825 + }
12826
12827 ds1286_status |= RTC_IS_OPEN;
12828
12829 - spin_lock_irq(&ds1286_lock);
12830 + spin_unlock_irq(&ds1286_lock);
12831 return 0;
12832 -
12833 -out_busy:
12834 - spin_lock_irq(&ds1286_lock);
12835 - return -EBUSY;
12836 }
12837
12838 static int ds1286_release(struct inode *inode, struct file *file)
12839 {
12840 + spin_lock_irq(&ds1286_lock);
12841 ds1286_status &= ~RTC_IS_OPEN;
12842 -
12843 + spin_unlock_irq(&ds1286_lock);
12844 return 0;
12845 }
12846
12847 @@ -276,32 +286,6 @@
12848 return 0;
12849 }
12850
12851 -/*
12852 - * The various file operations we support.
12853 - */
12854 -
12855 -static struct file_operations ds1286_fops = {
12856 - .llseek = no_llseek,
12857 - .read = ds1286_read,
12858 - .poll = ds1286_poll,
12859 - .ioctl = ds1286_ioctl,
12860 - .open = ds1286_open,
12861 - .release = ds1286_release,
12862 -};
12863 -
12864 -static struct miscdevice ds1286_dev=
12865 -{
12866 - .minor = RTC_MINOR,
12867 - .name = "rtc",
12868 - .fops = &ds1286_fops,
12869 -};
12870 -
12871 -int __init ds1286_init(void)
12872 -{
12873 - printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
12874 - return misc_register(&ds1286_dev);
12875 -}
12876 -
12877 static char *days[] = {
12878 "***", "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
12879 };
12880 @@ -528,3 +512,38 @@
12881 BCD_TO_BIN(alm_tm->tm_hour);
12882 alm_tm->tm_sec = 0;
12883 }
12884 +
12885 +static struct file_operations ds1286_fops = {
12886 + .owner = THIS_MODULE,
12887 + .llseek = no_llseek,
12888 + .read = ds1286_read,
12889 + .poll = ds1286_poll,
12890 + .ioctl = ds1286_ioctl,
12891 + .open = ds1286_open,
12892 + .release = ds1286_release,
12893 +};
12894 +
12895 +static struct miscdevice ds1286_dev =
12896 +{
12897 + .minor = RTC_MINOR,
12898 + .name = "rtc",
12899 + .fops = &ds1286_fops,
12900 +};
12901 +
12902 +static int __init ds1286_init(void)
12903 +{
12904 + printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
12905 + return misc_register(&ds1286_dev);
12906 +}
12907 +
12908 +static void __exit ds1286_exit(void)
12909 +{
12910 + misc_deregister(&ds1286_dev);
12911 +}
12912 +
12913 +module_init(ds1286_init);
12914 +module_exit(ds1286_exit);
12915 +EXPORT_NO_SYMBOLS;
12916 +
12917 +MODULE_AUTHOR("Ralf Baechle");
12918 +MODULE_LICENSE("GPL");
12919 Index: linux-2.4.35.4/drivers/char/ds1742.c
12920 ===================================================================
12921 --- linux-2.4.35.4.orig/drivers/char/ds1742.c 2007-12-15 05:19:43.814917908 +0100
12922 +++ linux-2.4.35.4/drivers/char/ds1742.c 2007-12-15 05:19:44.918980826 +0100
12923 @@ -142,6 +142,7 @@
12924 CMOS_WRITE(RTC_WRITE, RTC_CONTROL);
12925
12926 /* convert */
12927 + memset(&tm, 0, sizeof(struct rtc_time));
12928 to_tm(t, &tm);
12929
12930 /* check each field one by one */
12931 @@ -216,6 +217,7 @@
12932 unsigned long curr_time;
12933
12934 curr_time = rtc_ds1742_get_time();
12935 + memset(&tm, 0, sizeof(struct rtc_time));
12936 to_tm(curr_time, &tm);
12937
12938 p = buf;
12939 @@ -251,8 +253,8 @@
12940
12941 void rtc_ds1742_wait(void)
12942 {
12943 - while (CMOS_READ(RTC_SECONDS) & 1);
12944 - while (!(CMOS_READ(RTC_SECONDS) & 1));
12945 + unsigned char sec = CMOS_READ(RTC_SECONDS);
12946 + while (sec == CMOS_READ(RTC_SECONDS));
12947 }
12948
12949 static int ds1742_ioctl(struct inode *inode, struct file *file,
12950 @@ -264,6 +266,7 @@
12951 switch (cmd) {
12952 case RTC_RD_TIME: /* Read the time/date from RTC */
12953 curr_time = rtc_ds1742_get_time();
12954 + memset(&rtc_tm, 0, sizeof(struct rtc_time));
12955 to_tm(curr_time, &rtc_tm);
12956 rtc_tm.tm_year -= 1900;
12957 return copy_to_user((void *) arg, &rtc_tm, sizeof(rtc_tm)) ?
12958 Index: linux-2.4.35.4/drivers/char/dummy_keyb.c
12959 ===================================================================
12960 --- linux-2.4.35.4.orig/drivers/char/dummy_keyb.c 2007-12-15 05:19:43.822918363 +0100
12961 +++ linux-2.4.35.4/drivers/char/dummy_keyb.c 2007-12-15 05:19:44.918980826 +0100
12962 @@ -141,3 +141,7 @@
12963 {
12964 printk("Dummy keyboard driver installed.\n");
12965 }
12966 +#ifdef CONFIG_MAGIC_SYSRQ
12967 +unsigned char kbd_sysrq_key;
12968 +unsigned char kbd_sysrq_xlate[128];
12969 +#endif
12970 Index: linux-2.4.35.4/drivers/char/dz.c
12971 ===================================================================
12972 --- linux-2.4.35.4.orig/drivers/char/dz.c 2007-12-15 05:19:43.826918593 +0100
12973 +++ linux-2.4.35.4/drivers/char/dz.c 2007-12-15 05:19:44.918980826 +0100
12974 @@ -1,11 +1,13 @@
12975 /*
12976 - * dz.c: Serial port driver for DECStations equiped
12977 + * dz.c: Serial port driver for DECstations equipped
12978 * with the DZ chipset.
12979 *
12980 * Copyright (C) 1998 Olivier A. D. Lebaillif
12981 *
12982 * Email: olivier.lebaillif@ifrsys.com
12983 *
12984 + * Copyright (C) 2004 Maciej W. Rozycki
12985 + *
12986 * [31-AUG-98] triemer
12987 * Changed IRQ to use Harald's dec internals interrupts.h
12988 * removed base_addr code - moving address assignment to setup.c
12989 @@ -24,6 +26,7 @@
12990 #undef DEBUG_DZ
12991
12992 #include <linux/config.h>
12993 +#include <linux/delay.h>
12994 #include <linux/version.h>
12995 #include <linux/kernel.h>
12996 #include <linux/sched.h>
12997 @@ -54,33 +57,56 @@
12998 #include <asm/system.h>
12999 #include <asm/uaccess.h>
13000
13001 -#define CONSOLE_LINE (3) /* for definition of struct console */
13002 +#ifdef CONFIG_MAGIC_SYSRQ
13003 +#include <linux/sysrq.h>
13004 +#endif
13005
13006 #include "dz.h"
13007
13008 -#define DZ_INTR_DEBUG 1
13009 -
13010 DECLARE_TASK_QUEUE(tq_serial);
13011
13012 -static struct dz_serial *lines[4];
13013 -static unsigned char tmp_buffer[256];
13014 +static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
13015 +static struct tty_driver serial_driver, callout_driver;
13016 +
13017 +static struct tty_struct *serial_table[DZ_NB_PORT];
13018 +static struct termios *serial_termios[DZ_NB_PORT];
13019 +static struct termios *serial_termios_locked[DZ_NB_PORT];
13020 +
13021 +static int serial_refcount;
13022
13023 -#ifdef DEBUG_DZ
13024 /*
13025 - * debugging code to send out chars via prom
13026 + * tmp_buf is used as a temporary buffer by serial_write. We need to
13027 + * lock it in case the copy_from_user blocks while swapping in a page,
13028 + * and some other program tries to do a serial write at the same time.
13029 + * Since the lock will only come under contention when the system is
13030 + * swapping and available memory is low, it makes sense to share one
13031 + * buffer across all the serial ports, since it significantly saves
13032 + * memory if large numbers of serial ports are open.
13033 */
13034 -static void debug_console(const char *s, int count)
13035 -{
13036 - unsigned i;
13037 +static unsigned char *tmp_buf;
13038 +static DECLARE_MUTEX(tmp_buf_sem);
13039
13040 - for (i = 0; i < count; i++) {
13041 - if (*s == 10)
13042 - prom_printf("%c", 13);
13043 - prom_printf("%c", *s++);
13044 - }
13045 -}
13046 +static char *dz_name __initdata = "DECstation DZ serial driver version ";
13047 +static char *dz_version __initdata = "1.03";
13048 +
13049 +static struct dz_serial *lines[DZ_NB_PORT];
13050 +static unsigned char tmp_buffer[256];
13051 +
13052 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13053 +static struct console dz_sercons;
13054 +#endif
13055 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
13056 + !defined(MODULE)
13057 +static unsigned long break_pressed; /* break, really ... */
13058 #endif
13059
13060 +static void change_speed (struct dz_serial *);
13061 +
13062 +static int baud_table[] = {
13063 + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
13064 + 9600, 0
13065 +};
13066 +
13067 /*
13068 * ------------------------------------------------------------
13069 * dz_in () and dz_out ()
13070 @@ -94,15 +120,16 @@
13071 {
13072 volatile unsigned short *addr =
13073 (volatile unsigned short *) (info->port + offset);
13074 +
13075 return *addr;
13076 }
13077
13078 static inline void dz_out(struct dz_serial *info, unsigned offset,
13079 unsigned short value)
13080 {
13081 -
13082 volatile unsigned short *addr =
13083 (volatile unsigned short *) (info->port + offset);
13084 +
13085 *addr = value;
13086 }
13087
13088 @@ -143,25 +170,24 @@
13089
13090 tmp |= mask; /* set the TX flag */
13091 dz_out(info, DZ_TCR, tmp);
13092 -
13093 }
13094
13095 /*
13096 * ------------------------------------------------------------
13097 - * Here starts the interrupt handling routines. All of the
13098 - * following subroutines are declared as inline and are folded
13099 - * into dz_interrupt. They were separated out for readability's
13100 - * sake.
13101 *
13102 - * Note: rs_interrupt() is a "fast" interrupt, which means that it
13103 + * Here starts the interrupt handling routines. All of the following
13104 + * subroutines are declared as inline and are folded into
13105 + * dz_interrupt(). They were separated out for readability's sake.
13106 + *
13107 + * Note: dz_interrupt() is a "fast" interrupt, which means that it
13108 * runs with interrupts turned off. People who may want to modify
13109 - * rs_interrupt() should try to keep the interrupt handler as fast as
13110 + * dz_interrupt() should try to keep the interrupt handler as fast as
13111 * possible. After you are done making modifications, it is not a bad
13112 * idea to do:
13113 *
13114 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
13115 *
13116 - * and look at the resulting assemble code in serial.s.
13117 + * and look at the resulting assemble code in dz.s.
13118 *
13119 * ------------------------------------------------------------
13120 */
13121 @@ -188,101 +214,97 @@
13122 * This routine deals with inputs from any lines.
13123 * ------------------------------------------------------------
13124 */
13125 -static inline void receive_chars(struct dz_serial *info_in)
13126 +static inline void receive_chars(struct dz_serial *info_in,
13127 + struct pt_regs *regs)
13128 {
13129 -
13130 struct dz_serial *info;
13131 - struct tty_struct *tty = 0;
13132 + struct tty_struct *tty;
13133 struct async_icount *icount;
13134 - int ignore = 0;
13135 - unsigned short status, tmp;
13136 - unsigned char ch;
13137 -
13138 - /* this code is going to be a problem...
13139 - the call to tty_flip_buffer is going to need
13140 - to be rethought...
13141 - */
13142 - do {
13143 - status = dz_in(info_in, DZ_RBUF);
13144 - info = lines[LINE(status)];
13145 + int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
13146 + unsigned short status;
13147 + unsigned char ch, flag;
13148 + int i;
13149
13150 - /* punt so we don't get duplicate characters */
13151 - if (!(status & DZ_DVAL))
13152 - goto ignore_char;
13153 -
13154 - ch = UCHAR(status); /* grab the char */
13155 -
13156 -#if 0
13157 - if (info->is_console) {
13158 - if (ch == 0)
13159 - return; /* it's a break ... */
13160 - }
13161 -#endif
13162 + while ((status = dz_in(info_in, DZ_RBUF)) & DZ_DVAL) {
13163 + info = lines[LINE(status)];
13164 + tty = info->tty; /* point to the proper dev */
13165
13166 - tty = info->tty; /* now tty points to the proper dev */
13167 - icount = &info->icount;
13168 + ch = UCHAR(status); /* grab the char */
13169
13170 - if (!tty)
13171 - break;
13172 - if (tty->flip.count >= TTY_FLIPBUF_SIZE)
13173 - break;
13174 + if (!tty && (!info->hook || !info->hook->rx_char))
13175 + continue;
13176
13177 - *tty->flip.char_buf_ptr = ch;
13178 - *tty->flip.flag_buf_ptr = 0;
13179 + icount = &info->icount;
13180 icount->rx++;
13181
13182 - /* keep track of the statistics */
13183 - if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
13184 - if (status & DZ_PERR) /* parity error */
13185 - icount->parity++;
13186 - else if (status & DZ_FERR) /* frame error */
13187 - icount->frame++;
13188 - if (status & DZ_OERR) /* overrun error */
13189 - icount->overrun++;
13190 -
13191 - /* check to see if we should ignore the character
13192 - and mask off conditions that should be ignored
13193 + flag = 0;
13194 + if (status & DZ_FERR) { /* frame error */
13195 + /*
13196 + * There is no separate BREAK status bit, so
13197 + * treat framing errors as BREAKs for Magic SysRq
13198 + * and SAK; normally, otherwise.
13199 */
13200 -
13201 - if (status & info->ignore_status_mask) {
13202 - if (++ignore > 100)
13203 - break;
13204 - goto ignore_char;
13205 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
13206 + !defined(MODULE)
13207 + if (info->line == dz_sercons.index) {
13208 + if (!break_pressed)
13209 + break_pressed = jiffies;
13210 + continue;
13211 }
13212 - /* mask off the error conditions we want to ignore */
13213 - tmp = status & info->read_status_mask;
13214 -
13215 - if (tmp & DZ_PERR) {
13216 - *tty->flip.flag_buf_ptr = TTY_PARITY;
13217 -#ifdef DEBUG_DZ
13218 - debug_console("PERR\n", 5);
13219 -#endif
13220 - } else if (tmp & DZ_FERR) {
13221 - *tty->flip.flag_buf_ptr = TTY_FRAME;
13222 -#ifdef DEBUG_DZ
13223 - debug_console("FERR\n", 5);
13224 #endif
13225 + flag = TTY_BREAK;
13226 + if (info->flags & DZ_SAK)
13227 + do_SAK(tty);
13228 + else
13229 + flag = TTY_FRAME;
13230 + } else if (status & DZ_OERR) /* overrun error */
13231 + flag = TTY_OVERRUN;
13232 + else if (status & DZ_PERR) /* parity error */
13233 + flag = TTY_PARITY;
13234 +
13235 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
13236 + !defined(MODULE)
13237 + if (break_pressed && info->line == dz_sercons.index) {
13238 + if (time_before(jiffies, break_pressed + HZ * 5)) {
13239 + handle_sysrq(ch, regs, NULL, NULL);
13240 + break_pressed = 0;
13241 + continue;
13242 }
13243 - if (tmp & DZ_OERR) {
13244 -#ifdef DEBUG_DZ
13245 - debug_console("OERR\n", 5);
13246 + break_pressed = 0;
13247 + }
13248 #endif
13249 - if (tty->flip.count < TTY_FLIPBUF_SIZE) {
13250 - tty->flip.count++;
13251 - tty->flip.flag_buf_ptr++;
13252 - tty->flip.char_buf_ptr++;
13253 - *tty->flip.flag_buf_ptr = TTY_OVERRUN;
13254 - }
13255 - }
13256 +
13257 + if (info->hook && info->hook->rx_char) {
13258 + (*info->hook->rx_char)(ch, flag);
13259 + return;
13260 }
13261 - tty->flip.flag_buf_ptr++;
13262 - tty->flip.char_buf_ptr++;
13263 - tty->flip.count++;
13264 - ignore_char:
13265 - } while (status & DZ_DVAL);
13266
13267 - if (tty)
13268 - tty_flip_buffer_push(tty);
13269 + /* keep track of the statistics */
13270 + switch (flag) {
13271 + case TTY_FRAME:
13272 + icount->frame++;
13273 + break;
13274 + case TTY_PARITY:
13275 + icount->parity++;
13276 + break;
13277 + case TTY_OVERRUN:
13278 + icount->overrun++;
13279 + break;
13280 + case TTY_BREAK:
13281 + icount->brk++;
13282 + break;
13283 + default:
13284 + break;
13285 + }
13286 +
13287 + if ((status & info->ignore_status_mask) == 0) {
13288 + tty_insert_flip_char(tty, ch, flag);
13289 + lines_rx[LINE(status)] = 1;
13290 + }
13291 + }
13292 + for (i = 0; i < DZ_NB_PORT; i++)
13293 + if (lines_rx[i])
13294 + tty_flip_buffer_push(lines[i]->tty);
13295 }
13296
13297 /*
13298 @@ -292,20 +314,34 @@
13299 * This routine deals with outputs to any lines.
13300 * ------------------------------------------------------------
13301 */
13302 -static inline void transmit_chars(struct dz_serial *info)
13303 +static inline void transmit_chars(struct dz_serial *info_in)
13304 {
13305 + struct dz_serial *info;
13306 + unsigned short status;
13307 unsigned char tmp;
13308
13309 + status = dz_in(info_in, DZ_CSR);
13310 + info = lines[LINE(status)];
13311
13312 + if (info->hook || !info->tty) {
13313 + unsigned short mask, tmp;
13314
13315 - if (info->x_char) { /* XON/XOFF chars */
13316 + mask = 1 << info->line;
13317 + tmp = dz_in(info, DZ_TCR); /* read the TX flag */
13318 + tmp &= ~mask; /* clear the TX flag */
13319 + dz_out(info, DZ_TCR, tmp);
13320 + return;
13321 + }
13322 +
13323 + if (info->x_char) { /* XON/XOFF chars */
13324 dz_out(info, DZ_TDR, info->x_char);
13325 info->icount.tx++;
13326 info->x_char = 0;
13327 return;
13328 }
13329 /* if nothing to do or stopped or hardware stopped */
13330 - if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
13331 + if (info->xmit_cnt <= 0 ||
13332 + info->tty->stopped || info->tty->hw_stopped) {
13333 dz_stop(info->tty);
13334 return;
13335 }
13336 @@ -359,15 +395,14 @@
13337 */
13338 static void dz_interrupt(int irq, void *dev, struct pt_regs *regs)
13339 {
13340 - struct dz_serial *info;
13341 + struct dz_serial *info = (struct dz_serial *)dev;
13342 unsigned short status;
13343
13344 /* get the reason why we just got an irq */
13345 - status = dz_in((struct dz_serial *) dev, DZ_CSR);
13346 - info = lines[LINE(status)]; /* re-arrange info the proper port */
13347 + status = dz_in(info, DZ_CSR);
13348
13349 if (status & DZ_RDONE)
13350 - receive_chars(info); /* the receive function */
13351 + receive_chars(info, regs);
13352
13353 if (status & DZ_TRDY)
13354 transmit_chars(info);
13355 @@ -514,7 +549,7 @@
13356
13357
13358 info->cflags &= ~DZ_CREAD; /* turn off receive enable flag */
13359 - dz_out(info, DZ_LPR, info->cflags);
13360 + dz_out(info, DZ_LPR, info->cflags | info->line);
13361
13362 if (info->xmit_buf) { /* free Tx buffer */
13363 free_page((unsigned long) info->xmit_buf);
13364 @@ -545,18 +580,21 @@
13365 {
13366 unsigned long flags;
13367 unsigned cflag;
13368 - int baud;
13369 + int baud, i;
13370
13371 - if (!info->tty || !info->tty->termios)
13372 - return;
13373 + if (!info->hook) {
13374 + if (!info->tty || !info->tty->termios)
13375 + return;
13376 + cflag = info->tty->termios->c_cflag;
13377 + } else {
13378 + cflag = info->hook->cflags;
13379 + }
13380
13381 save_flags(flags);
13382 cli();
13383
13384 info->cflags = info->line;
13385
13386 - cflag = info->tty->termios->c_cflag;
13387 -
13388 switch (cflag & CSIZE) {
13389 case CS5:
13390 info->cflags |= DZ_CS5;
13391 @@ -579,7 +617,16 @@
13392 if (cflag & PARODD)
13393 info->cflags |= DZ_PARODD;
13394
13395 - baud = tty_get_baud_rate(info->tty);
13396 + i = cflag & CBAUD;
13397 + if (i & CBAUDEX) {
13398 + i &= ~CBAUDEX;
13399 + if (!info->hook)
13400 + info->tty->termios->c_cflag &= ~CBAUDEX;
13401 + else
13402 + info->hook->cflags &= ~CBAUDEX;
13403 + }
13404 + baud = baud_table[i];
13405 +
13406 switch (baud) {
13407 case 50:
13408 info->cflags |= DZ_B50;
13409 @@ -629,16 +676,16 @@
13410 }
13411
13412 info->cflags |= DZ_RXENAB;
13413 - dz_out(info, DZ_LPR, info->cflags);
13414 + dz_out(info, DZ_LPR, info->cflags | info->line);
13415
13416 /* setup accept flag */
13417 info->read_status_mask = DZ_OERR;
13418 - if (I_INPCK(info->tty))
13419 + if (info->tty && I_INPCK(info->tty))
13420 info->read_status_mask |= (DZ_FERR | DZ_PERR);
13421
13422 /* characters to ignore */
13423 info->ignore_status_mask = 0;
13424 - if (I_IGNPAR(info->tty))
13425 + if (info->tty && I_IGNPAR(info->tty))
13426 info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
13427
13428 restore_flags(flags);
13429 @@ -694,7 +741,7 @@
13430
13431 down(&tmp_buf_sem);
13432 while (1) {
13433 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13434 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13435 if (c <= 0)
13436 break;
13437
13438 @@ -707,7 +754,7 @@
13439 save_flags(flags);
13440 cli();
13441
13442 - c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13443 + c = min(c, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13444 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
13445 info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE - 1));
13446 info->xmit_cnt += c;
13447 @@ -727,7 +774,7 @@
13448 save_flags(flags);
13449 cli();
13450
13451 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13452 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13453 if (c <= 0) {
13454 restore_flags(flags);
13455 break;
13456 @@ -845,7 +892,7 @@
13457
13458 /*
13459 * ------------------------------------------------------------
13460 - * rs_ioctl () and friends
13461 + * dz_ioctl () and friends
13462 * ------------------------------------------------------------
13463 */
13464 static int get_serial_info(struct dz_serial *info,
13465 @@ -958,6 +1005,9 @@
13466 struct dz_serial *info = (struct dz_serial *) tty->driver_data;
13467 int retval;
13468
13469 + if (info->hook)
13470 + return -ENODEV;
13471 +
13472 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
13473 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
13474 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
13475 @@ -1252,19 +1302,14 @@
13476 int retval, line;
13477
13478 line = MINOR(tty->device) - tty->driver.minor_start;
13479 -
13480 - /* The dz lines for the mouse/keyboard must be
13481 - * opened using their respective drivers.
13482 - */
13483 if ((line < 0) || (line >= DZ_NB_PORT))
13484 return -ENODEV;
13485 + info = lines[line];
13486
13487 - if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
13488 + if (info->hook)
13489 return -ENODEV;
13490
13491 - info = lines[line];
13492 info->count++;
13493 -
13494 tty->driver_data = info;
13495 info->tty = tty;
13496
13497 @@ -1285,14 +1330,21 @@
13498 else
13499 *tty->termios = info->callout_termios;
13500 change_speed(info);
13501 -
13502 }
13503 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13504 + if (dz_sercons.cflag && dz_sercons.index == line) {
13505 + tty->termios->c_cflag = dz_sercons.cflag;
13506 + dz_sercons.cflag = 0;
13507 + change_speed(info);
13508 + }
13509 +#endif
13510 +
13511 info->session = current->session;
13512 info->pgrp = current->pgrp;
13513 return 0;
13514 }
13515
13516 -static void show_serial_version(void)
13517 +static void __init show_serial_version(void)
13518 {
13519 printk("%s%s\n", dz_name, dz_version);
13520 }
13521 @@ -1300,7 +1352,6 @@
13522 int __init dz_init(void)
13523 {
13524 int i;
13525 - long flags;
13526 struct dz_serial *info;
13527
13528 /* Setup base handler, and timer table. */
13529 @@ -1311,9 +1362,9 @@
13530 memset(&serial_driver, 0, sizeof(struct tty_driver));
13531 serial_driver.magic = TTY_DRIVER_MAGIC;
13532 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
13533 - serial_driver.name = "ttyS";
13534 -#else
13535 serial_driver.name = "tts/%d";
13536 +#else
13537 + serial_driver.name = "ttyS";
13538 #endif
13539 serial_driver.major = TTY_MAJOR;
13540 serial_driver.minor_start = 64;
13541 @@ -1352,9 +1403,9 @@
13542 */
13543 callout_driver = serial_driver;
13544 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
13545 - callout_driver.name = "cua";
13546 -#else
13547 callout_driver.name = "cua/%d";
13548 +#else
13549 + callout_driver.name = "cua";
13550 #endif
13551 callout_driver.major = TTYAUX_MAJOR;
13552 callout_driver.subtype = SERIAL_TYPE_CALLOUT;
13553 @@ -1363,25 +1414,27 @@
13554 panic("Couldn't register serial driver");
13555 if (tty_register_driver(&callout_driver))
13556 panic("Couldn't register callout driver");
13557 - save_flags(flags);
13558 - cli();
13559
13560 for (i = 0; i < DZ_NB_PORT; i++) {
13561 info = &multi[i];
13562 lines[i] = info;
13563 - info->magic = SERIAL_MAGIC;
13564 -
13565 + info->tty = 0;
13566 + info->x_char = 0;
13567 if (mips_machtype == MACH_DS23100 ||
13568 mips_machtype == MACH_DS5100)
13569 info->port = (unsigned long) KN01_DZ11_BASE;
13570 else
13571 info->port = (unsigned long) KN02_DZ11_BASE;
13572 -
13573 info->line = i;
13574 - info->tty = 0;
13575 +
13576 + if (info->hook && info->hook->init_info) {
13577 + (*info->hook->init_info)(info);
13578 + continue;
13579 + }
13580 +
13581 + info->magic = SERIAL_MAGIC;
13582 info->close_delay = 50;
13583 info->closing_wait = 3000;
13584 - info->x_char = 0;
13585 info->event = 0;
13586 info->count = 0;
13587 info->blocked_open = 0;
13588 @@ -1393,25 +1446,16 @@
13589 info->normal_termios = serial_driver.init_termios;
13590 init_waitqueue_head(&info->open_wait);
13591 init_waitqueue_head(&info->close_wait);
13592 -
13593 - /*
13594 - * If we are pointing to address zero then punt - not correctly
13595 - * set up in setup.c to handle this.
13596 - */
13597 - if (!info->port)
13598 - return 0;
13599 -
13600 - printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
13601 - info->port, dec_interrupt[DEC_IRQ_DZ11]);
13602 -
13603 + printk("ttyS%02d at 0x%08x (irq = %d) is a DC7085 DZ\n",
13604 + info->line, info->port, dec_interrupt[DEC_IRQ_DZ11]);
13605 tty_register_devfs(&serial_driver, 0,
13606 - serial_driver.minor_start + info->line);
13607 + serial_driver.minor_start + info->line);
13608 tty_register_devfs(&callout_driver, 0,
13609 - callout_driver.minor_start + info->line);
13610 + callout_driver.minor_start + info->line);
13611 }
13612
13613 - /* reset the chip */
13614 #ifndef CONFIG_SERIAL_DEC_CONSOLE
13615 + /* reset the chip */
13616 dz_out(info, DZ_CSR, DZ_CLR);
13617 while (dz_in(info, DZ_CSR) & DZ_CLR);
13618 iob();
13619 @@ -1420,43 +1464,104 @@
13620 dz_out(info, DZ_CSR, DZ_MSE);
13621 #endif
13622
13623 - /* order matters here... the trick is that flags
13624 - is updated... in request_irq - to immediatedly obliterate
13625 - it is unwise. */
13626 - restore_flags(flags);
13627 -
13628 -
13629 if (request_irq(dec_interrupt[DEC_IRQ_DZ11], dz_interrupt,
13630 - SA_INTERRUPT, "DZ", lines[0]))
13631 + 0, "DZ", lines[0]))
13632 panic("Unable to register DZ interrupt");
13633
13634 + for (i = 0; i < DZ_NB_PORT; i++)
13635 + if (lines[i]->hook) {
13636 + startup(lines[i]);
13637 + if (lines[i]->hook->init_channel)
13638 + (*lines[i]->hook->init_channel)(lines[i]);
13639 + }
13640 +
13641 return 0;
13642 }
13643
13644 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
13645 -static void dz_console_put_char(unsigned char ch)
13646 +/*
13647 + * polling I/O routines
13648 + */
13649 +static int dz_poll_tx_char(void *handle, unsigned char ch)
13650 {
13651 unsigned long flags;
13652 - int loops = 2500;
13653 - unsigned short tmp = ch;
13654 - /* this code sends stuff out to serial device - spinning its
13655 - wheels and waiting. */
13656 + struct dz_serial *info = handle;
13657 + unsigned short csr, tcr, trdy, mask;
13658 + int loops = 10000;
13659 + int ret;
13660
13661 - /* force the issue - point it at lines[3] */
13662 - dz_console = &multi[CONSOLE_LINE];
13663 + local_irq_save(flags);
13664 + csr = dz_in(info, DZ_CSR);
13665 + dz_out(info, DZ_CSR, csr & ~DZ_TIE);
13666 + tcr = dz_in(info, DZ_TCR);
13667 + tcr |= 1 << info->line;
13668 + mask = tcr;
13669 + dz_out(info, DZ_TCR, mask);
13670 + iob();
13671 + local_irq_restore(flags);
13672
13673 - save_flags(flags);
13674 - cli();
13675 + while (loops--) {
13676 + trdy = dz_in(info, DZ_CSR);
13677 + if (!(trdy & DZ_TRDY))
13678 + continue;
13679 + trdy = (trdy & DZ_TLINE) >> 8;
13680 + if (trdy == info->line)
13681 + break;
13682 + mask &= ~(1 << trdy);
13683 + dz_out(info, DZ_TCR, mask);
13684 + iob();
13685 + udelay(2);
13686 + }
13687
13688 + if (loops) {
13689 + dz_out(info, DZ_TDR, ch);
13690 + ret = 0;
13691 + } else
13692 + ret = -EAGAIN;
13693
13694 - /* spin our wheels */
13695 - while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--);
13696 + dz_out(info, DZ_TCR, tcr);
13697 + dz_out(info, DZ_CSR, csr);
13698
13699 - /* Actually transmit the character. */
13700 - dz_out(dz_console, DZ_TDR, tmp);
13701 + return ret;
13702 +}
13703
13704 - restore_flags(flags);
13705 +static int dz_poll_rx_char(void *handle)
13706 +{
13707 + return -ENODEV;
13708 +}
13709 +
13710 +int register_dz_hook(unsigned int channel, struct dec_serial_hook *hook)
13711 +{
13712 + struct dz_serial *info = multi + channel;
13713 +
13714 + if (info->hook) {
13715 + printk("%s: line %d has already a hook registered\n",
13716 + __FUNCTION__, channel);
13717 +
13718 + return 0;
13719 + } else {
13720 + hook->poll_rx_char = dz_poll_rx_char;
13721 + hook->poll_tx_char = dz_poll_tx_char;
13722 + info->hook = hook;
13723 +
13724 + return 1;
13725 + }
13726 +}
13727 +
13728 +int unregister_dz_hook(unsigned int channel)
13729 +{
13730 + struct dz_serial *info = &multi[channel];
13731 +
13732 + if (info->hook) {
13733 + info->hook = NULL;
13734 + return 1;
13735 + } else {
13736 + printk("%s: trying to unregister hook on line %d,"
13737 + " but none is registered\n", __FUNCTION__, channel);
13738 + return 0;
13739 + }
13740 }
13741 +
13742 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13743 /*
13744 * -------------------------------------------------------------------
13745 * dz_console_print ()
13746 @@ -1465,17 +1570,19 @@
13747 * The console must be locked when we get here.
13748 * -------------------------------------------------------------------
13749 */
13750 -static void dz_console_print(struct console *cons,
13751 +static void dz_console_print(struct console *co,
13752 const char *str,
13753 unsigned int count)
13754 {
13755 + struct dz_serial *info = multi + co->index;
13756 +
13757 #ifdef DEBUG_DZ
13758 prom_printf((char *) str);
13759 #endif
13760 while (count--) {
13761 if (*str == '\n')
13762 - dz_console_put_char('\r');
13763 - dz_console_put_char(*str++);
13764 + dz_poll_tx_char(info, '\r');
13765 + dz_poll_tx_char(info, *str++);
13766 }
13767 }
13768
13769 @@ -1486,12 +1593,12 @@
13770
13771 static int __init dz_console_setup(struct console *co, char *options)
13772 {
13773 + struct dz_serial *info = multi + co->index;
13774 int baud = 9600;
13775 int bits = 8;
13776 int parity = 'n';
13777 int cflag = CREAD | HUPCL | CLOCAL;
13778 char *s;
13779 - unsigned short mask, tmp;
13780
13781 if (options) {
13782 baud = simple_strtoul(options, NULL, 10);
13783 @@ -1542,44 +1649,31 @@
13784 }
13785 co->cflag = cflag;
13786
13787 - /* TOFIX: force to console line */
13788 - dz_console = &multi[CONSOLE_LINE];
13789 if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
13790 - dz_console->port = KN01_DZ11_BASE;
13791 + info->port = KN01_DZ11_BASE;
13792 else
13793 - dz_console->port = KN02_DZ11_BASE;
13794 - dz_console->line = CONSOLE_LINE;
13795 + info->port = KN02_DZ11_BASE;
13796 + info->line = co->index;
13797
13798 - dz_out(dz_console, DZ_CSR, DZ_CLR);
13799 - while ((tmp = dz_in(dz_console, DZ_CSR)) & DZ_CLR);
13800 + dz_out(info, DZ_CSR, DZ_CLR);
13801 + while (dz_in(info, DZ_CSR) & DZ_CLR);
13802
13803 /* enable scanning */
13804 - dz_out(dz_console, DZ_CSR, DZ_MSE);
13805 + dz_out(info, DZ_CSR, DZ_MSE);
13806
13807 /* Set up flags... */
13808 - dz_console->cflags = 0;
13809 - dz_console->cflags |= DZ_B9600;
13810 - dz_console->cflags |= DZ_CS8;
13811 - dz_console->cflags |= DZ_PARENB;
13812 - dz_out(dz_console, DZ_LPR, dz_console->cflags);
13813 -
13814 - mask = 1 << dz_console->line;
13815 - tmp = dz_in(dz_console, DZ_TCR); /* read the TX flag */
13816 - if (!(tmp & mask)) {
13817 - tmp |= mask; /* set the TX flag */
13818 - dz_out(dz_console, DZ_TCR, tmp);
13819 - }
13820 + dz_out(info, DZ_LPR, cflag | info->line);
13821 +
13822 return 0;
13823 }
13824
13825 -static struct console dz_sercons =
13826 -{
13827 - .name = "ttyS",
13828 - .write = dz_console_print,
13829 - .device = dz_console_device,
13830 - .setup = dz_console_setup,
13831 - .flags = CON_CONSDEV | CON_PRINTBUFFER,
13832 - .index = CONSOLE_LINE,
13833 +static struct console dz_sercons = {
13834 + .name = "ttyS",
13835 + .write = dz_console_print,
13836 + .device = dz_console_device,
13837 + .setup = dz_console_setup,
13838 + .flags = CON_PRINTBUFFER,
13839 + .index = -1,
13840 };
13841
13842 void __init dz_serial_console_init(void)
13843 Index: linux-2.4.35.4/drivers/char/dz.h
13844 ===================================================================
13845 --- linux-2.4.35.4.orig/drivers/char/dz.h 2007-12-15 05:19:43.834919048 +0100
13846 +++ linux-2.4.35.4/drivers/char/dz.h 2007-12-15 05:19:44.918980826 +0100
13847 @@ -10,6 +10,8 @@
13848 #ifndef DZ_SERIAL_H
13849 #define DZ_SERIAL_H
13850
13851 +#include <asm/dec/serial.h>
13852 +
13853 #define SERIAL_MAGIC 0x5301
13854
13855 /*
13856 @@ -17,6 +19,7 @@
13857 */
13858 #define DZ_TRDY 0x8000 /* Transmitter empty */
13859 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */
13860 +#define DZ_TLINE 0x0300 /* Transmitter Line Number */
13861 #define DZ_RDONE 0x0080 /* Receiver data ready */
13862 #define DZ_RIE 0x0040 /* Receive Interrupt Enable */
13863 #define DZ_MSE 0x0020 /* Master Scan Enable */
13864 @@ -37,19 +40,30 @@
13865 #define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
13866
13867 /*
13868 - * Definitions for the Transmit Register.
13869 + * Definitions for the Transmit Control Register.
13870 */
13871 #define DZ_LINE_KEYBOARD 0x0001
13872 #define DZ_LINE_MOUSE 0x0002
13873 #define DZ_LINE_MODEM 0x0004
13874 #define DZ_LINE_PRINTER 0x0008
13875
13876 +#define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
13877 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
13878 +#define DZ_PRINT_RTS 0x0200 /* RTS for the printer line (3) */
13879 +#define DZ_PRINT_DTR 0x0100 /* DTR for the printer line (3) */
13880 +#define DZ_LNENB 0x000f /* Transmitter Line Enable */
13881
13882 /*
13883 * Definitions for the Modem Status Register.
13884 */
13885 +#define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
13886 +#define DZ_MODEM_CD 0x0400 /* CD for the modem line (2) */
13887 #define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
13888 +#define DZ_MODEM_CTS 0x0100 /* CTS for the modem line (2) */
13889 +#define DZ_PRINT_RI 0x0008 /* RI for the printer line (2) */
13890 +#define DZ_PRINT_CD 0x0004 /* CD for the printer line (2) */
13891 +#define DZ_PRINT_DSR 0x0002 /* DSR for the printer line (2) */
13892 +#define DZ_PRINT_CTS 0x0001 /* CTS for the printer line (2) */
13893
13894 /*
13895 * Definitions for the Transmit Data Register.
13896 @@ -115,9 +129,6 @@
13897
13898 #define DZ_EVENT_WRITE_WAKEUP 0
13899
13900 -#ifndef MIN
13901 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
13902 -
13903 #define DZ_INITIALIZED 0x80000000 /* Serial port was initialized */
13904 #define DZ_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
13905 #define DZ_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
13906 @@ -129,6 +140,7 @@
13907 #define DZ_CLOSING_WAIT_INF 0
13908 #define DZ_CLOSING_WAIT_NONE 65535
13909
13910 +#define DZ_SAK 0x0004 /* Secure Attention Key (Orange book) */
13911 #define DZ_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
13912 #define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
13913 #define DZ_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
13914 @@ -166,79 +178,9 @@
13915 long session; /* Session of opening process */
13916 long pgrp; /* pgrp of opening process */
13917
13918 + struct dec_serial_hook *hook; /* Hook on this channel. */
13919 unsigned char is_console; /* flag indicating a serial console */
13920 unsigned char is_initialized;
13921 };
13922
13923 -static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
13924 -static struct dz_serial *dz_console;
13925 -static struct tty_driver serial_driver, callout_driver;
13926 -
13927 -static struct tty_struct *serial_table[DZ_NB_PORT];
13928 -static struct termios *serial_termios[DZ_NB_PORT];
13929 -static struct termios *serial_termios_locked[DZ_NB_PORT];
13930 -
13931 -static int serial_refcount;
13932 -
13933 -/*
13934 - * tmp_buf is used as a temporary buffer by serial_write. We need to
13935 - * lock it in case the copy_from_user blocks while swapping in a page,
13936 - * and some other program tries to do a serial write at the same time.
13937 - * Since the lock will only come under contention when the system is
13938 - * swapping and available memory is low, it makes sense to share one
13939 - * buffer across all the serial ports, since it significantly saves
13940 - * memory if large numbers of serial ports are open.
13941 - */
13942 -static unsigned char *tmp_buf;
13943 -static DECLARE_MUTEX(tmp_buf_sem);
13944 -
13945 -static char *dz_name = "DECstation DZ serial driver version ";
13946 -static char *dz_version = "1.02";
13947 -
13948 -static inline unsigned short dz_in (struct dz_serial *, unsigned);
13949 -static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
13950 -
13951 -static inline void dz_sched_event (struct dz_serial *, int);
13952 -static inline void receive_chars (struct dz_serial *);
13953 -static inline void transmit_chars (struct dz_serial *);
13954 -static inline void check_modem_status (struct dz_serial *);
13955 -
13956 -static void dz_stop (struct tty_struct *);
13957 -static void dz_start (struct tty_struct *);
13958 -static void dz_interrupt (int, void *, struct pt_regs *);
13959 -static void do_serial_bh (void);
13960 -static void do_softint (void *);
13961 -static void do_serial_hangup (void *);
13962 -static void change_speed (struct dz_serial *);
13963 -static void dz_flush_chars (struct tty_struct *);
13964 -static void dz_console_print (struct console *, const char *, unsigned int);
13965 -static void dz_flush_buffer (struct tty_struct *);
13966 -static void dz_throttle (struct tty_struct *);
13967 -static void dz_unthrottle (struct tty_struct *);
13968 -static void dz_send_xchar (struct tty_struct *, char);
13969 -static void shutdown (struct dz_serial *);
13970 -static void send_break (struct dz_serial *, int);
13971 -static void dz_set_termios (struct tty_struct *, struct termios *);
13972 -static void dz_close (struct tty_struct *, struct file *);
13973 -static void dz_hangup (struct tty_struct *);
13974 -static void show_serial_version (void);
13975 -
13976 -static int dz_write (struct tty_struct *, int, const unsigned char *, int);
13977 -static int dz_write_room (struct tty_struct *);
13978 -static int dz_chars_in_buffer (struct tty_struct *);
13979 -static int startup (struct dz_serial *);
13980 -static int get_serial_info (struct dz_serial *, struct serial_struct *);
13981 -static int set_serial_info (struct dz_serial *, struct serial_struct *);
13982 -static int get_lsr_info (struct dz_serial *, unsigned int *);
13983 -static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
13984 -static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
13985 -static int dz_open (struct tty_struct *, struct file *);
13986 -
13987 -#ifdef MODULE
13988 -int init_module (void)
13989 -void cleanup_module (void)
13990 -#endif
13991 -
13992 -#endif
13993 -
13994 #endif /* DZ_SERIAL_H */
13995 Index: linux-2.4.35.4/drivers/char/ibm_workpad_keymap.map
13996 ===================================================================
13997 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
13998 +++ linux-2.4.35.4/drivers/char/ibm_workpad_keymap.map 2007-12-15 05:19:44.922981052 +0100
13999 @@ -0,0 +1,343 @@
14000 +# Keymap for IBM Workpad z50
14001 +# US Mapping
14002 +#
14003 +# by Michael Klar <wyldfier@iname.com>
14004 +#
14005 +# This is a great big mess on account of how the Caps Lock key is handled as
14006 +# LeftShift-RightShift. Right shift key had to be broken out, so don't use
14007 +# use this map file as a basis for other keyboards that don't do the same
14008 +# thing with Caps Lock.
14009 +#
14010 +# This file is subject to the terms and conditions of the GNU General Public
14011 +# License. See the file "COPYING" in the main directory of this archive
14012 +# for more details.
14013 +
14014 +keymaps 0-2,4-5,8,12,32-33,36-37
14015 +strings as usual
14016 +
14017 +keycode 0 = F1 F11 Console_13
14018 + shiftr keycode 0 = F11
14019 + shift shiftr keycode 0 = F11
14020 + control keycode 0 = F1
14021 + alt keycode 0 = Console_1
14022 + control alt keycode 0 = Console_1
14023 +keycode 1 = F3 F13 Console_15
14024 + shiftr keycode 1 = F13
14025 + shift shiftr keycode 1 = F13
14026 + control keycode 1 = F3
14027 + alt keycode 1 = Console_3
14028 + control alt keycode 1 = Console_3
14029 +keycode 2 = F5 F15 Console_17
14030 + shiftr keycode 2 = F15
14031 + shift shiftr keycode 2 = F15
14032 + control keycode 2 = F5
14033 + alt keycode 2 = Console_5
14034 + control alt keycode 2 = Console_5
14035 +keycode 3 = F7 F17 Console_19
14036 + shiftr keycode 3 = F17
14037 + shift shiftr keycode 3 = F17
14038 + control keycode 3 = F7
14039 + alt keycode 3 = Console_7
14040 + control alt keycode 3 = Console_7
14041 +keycode 4 = F9 F19 Console_21
14042 + shiftr keycode 4 = F19
14043 + shift shiftr keycode 4 = F19
14044 + control keycode 4 = F9
14045 + alt keycode 4 = Console_9
14046 + control alt keycode 4 = Console_9
14047 +#keycode 5 is contrast down
14048 +#keycode 6 is contrast up
14049 +keycode 7 = F11 F11 Console_23
14050 + shiftr keycode 7 = F11
14051 + shift shiftr keycode 7 = F11
14052 + control keycode 7 = F11
14053 + alt keycode 7 = Console_11
14054 + control alt keycode 7 = Console_11
14055 +keycode 8 = F2 F12 Console_14
14056 + shiftr keycode 8 = F12
14057 + shift shiftr keycode 8 = F12
14058 + control keycode 8 = F2
14059 + alt keycode 8 = Console_2
14060 + control alt keycode 8 = Console_2
14061 +keycode 9 = F4 F14 Console_16
14062 + shiftr keycode 9 = F14
14063 + shift shiftr keycode 9 = F14
14064 + control keycode 9 = F4
14065 + alt keycode 9 = Console_4
14066 + control alt keycode 9 = Console_4
14067 +keycode 10 = F6 F16 Console_18
14068 + shiftr keycode 10 = F16
14069 + shift shiftr keycode 10 = F16
14070 + control keycode 10 = F6
14071 + alt keycode 10 = Console_6
14072 + control alt keycode 10 = Console_6
14073 +keycode 11 = F8 F18 Console_20
14074 + shiftr keycode 11 = F18
14075 + shift shiftr keycode 11 = F18
14076 + control keycode 11 = F8
14077 + alt keycode 11 = Console_8
14078 + control alt keycode 11 = Console_8
14079 +keycode 12 = F10 F20 Console_22
14080 + shiftr keycode 12 = F20
14081 + shift shiftr keycode 12 = F20
14082 + control keycode 12 = F10
14083 + alt keycode 12 = Console_10
14084 + control alt keycode 12 = Console_10
14085 +#keycode 13 is brightness down
14086 +#keycode 14 is brightness up
14087 +keycode 15 = F12 F12 Console_24
14088 + shiftr keycode 15 = F12
14089 + shift shiftr keycode 15 = F12
14090 + control keycode 15 = F12
14091 + alt keycode 15 = Console_12
14092 + control alt keycode 15 = Console_12
14093 +keycode 16 = apostrophe quotedbl
14094 + shiftr keycode 16 = quotedbl
14095 + shift shiftr keycode 16 = quotedbl
14096 + control keycode 16 = Control_g
14097 + alt keycode 16 = Meta_apostrophe
14098 +keycode 17 = bracketleft braceleft
14099 + shiftr keycode 17 = braceleft
14100 + shift shiftr keycode 17 = braceleft
14101 + control keycode 17 = Escape
14102 + alt keycode 17 = Meta_bracketleft
14103 +keycode 18 = minus underscore backslash
14104 + shiftr keycode 18 = underscore
14105 + shift shiftr keycode 18 = underscore
14106 + control keycode 18 = Control_underscore
14107 + shift control keycode 18 = Control_underscore
14108 + shiftr control keycode 18 = Control_underscore
14109 + shift shiftr control keycode 18 = Control_underscore
14110 + alt keycode 18 = Meta_minus
14111 +keycode 19 = zero parenright braceright
14112 + shiftr keycode 19 = parenright
14113 + shift shiftr keycode 19 = parenright
14114 + alt keycode 19 = Meta_zero
14115 +keycode 20 = p
14116 + shiftr keycode 20 = +P
14117 + shift shiftr keycode 20 = +p
14118 +keycode 21 = semicolon colon
14119 + shiftr keycode 21 = colon
14120 + shift shiftr keycode 21 = colon
14121 + alt keycode 21 = Meta_semicolon
14122 +keycode 22 = Up Scroll_Backward
14123 + shiftr keycode 22 = Scroll_Backward
14124 + shift shiftr keycode 22 = Scroll_Backward
14125 + alt keycode 22 = Prior
14126 +keycode 23 = slash question
14127 + shiftr keycode 23 = question
14128 + shift shiftr keycode 23 = question
14129 + control keycode 23 = Delete
14130 + alt keycode 23 = Meta_slash
14131 +
14132 +keycode 27 = nine parenleft bracketright
14133 + shiftr keycode 27 = parenleft
14134 + shift shiftr keycode 27 = parenleft
14135 + alt keycode 27 = Meta_nine
14136 +keycode 28 = o
14137 + shiftr keycode 28 = +O
14138 + shift shiftr keycode 28 = +o
14139 +keycode 29 = l
14140 + shiftr keycode 29 = +L
14141 + shift shiftr keycode 29 = +l
14142 +keycode 30 = period greater
14143 + shiftr keycode 30 = greater
14144 + shift shiftr keycode 30 = greater
14145 + control keycode 30 = Compose
14146 + alt keycode 30 = Meta_period
14147 +
14148 +keycode 32 = Left Decr_Console
14149 + shiftr keycode 32 = Decr_Console
14150 + shift shiftr keycode 32 = Decr_Console
14151 + alt keycode 32 = Home
14152 +keycode 33 = bracketright braceright asciitilde
14153 + shiftr keycode 33 = braceright
14154 + shift shiftr keycode 33 = braceright
14155 + control keycode 33 = Control_bracketright
14156 + alt keycode 33 = Meta_bracketright
14157 +keycode 34 = equal plus
14158 + shiftr keycode 34 = plus
14159 + shift shiftr keycode 34 = plus
14160 + alt keycode 34 = Meta_equal
14161 +keycode 35 = eight asterisk bracketleft
14162 + shiftr keycode 35 = asterisk
14163 + shift shiftr keycode 35 = asterisk
14164 + control keycode 35 = Delete
14165 + alt keycode 35 = Meta_eight
14166 +keycode 36 = i
14167 + shiftr keycode 36 = +I
14168 + shift shiftr keycode 36 = +i
14169 +keycode 37 = k
14170 + shiftr keycode 37 = +K
14171 + shift shiftr keycode 37 = +k
14172 +keycode 38 = comma less
14173 + shiftr keycode 38 = less
14174 + shift shiftr keycode 38 = less
14175 + alt keycode 38 = Meta_comma
14176 +
14177 +keycode 40 = h
14178 + shiftr keycode 40 = +H
14179 + shift shiftr keycode 40 = +h
14180 +keycode 41 = y
14181 + shiftr keycode 41 = +Y
14182 + shift shiftr keycode 41 = +y
14183 +keycode 42 = six asciicircum
14184 + shiftr keycode 42 = asciicircum
14185 + shift shiftr keycode 42 = asciicircum
14186 + control keycode 42 = Control_asciicircum
14187 + alt keycode 42 = Meta_six
14188 +keycode 43 = seven ampersand braceleft
14189 + shiftr keycode 43 = ampersand
14190 + shift shiftr keycode 43 = ampersand
14191 + control keycode 43 = Control_underscore
14192 + alt keycode 43 = Meta_seven
14193 +keycode 44 = u
14194 + shiftr keycode 44 = +U
14195 + shift shiftr keycode 44 = +u
14196 +keycode 45 = j
14197 + shiftr keycode 45 = +J
14198 + shift shiftr keycode 45 = +j
14199 +keycode 46 = m
14200 + shiftr keycode 46 = +M
14201 + shift shiftr keycode 46 = +m
14202 +keycode 47 = n
14203 + shiftr keycode 47 = +N
14204 + shift shiftr keycode 47 = +n
14205 +
14206 +# This is the "Backspace" key:
14207 +keycode 49 = Delete Delete
14208 + shiftr keycode 49 = Delete
14209 + shift shiftr keycode 49 = Delete
14210 + control keycode 49 = BackSpace
14211 + alt keycode 49 = Meta_Delete
14212 +keycode 50 = Num_Lock
14213 + shift keycode 50 = Bare_Num_Lock
14214 + shiftr keycode 50 = Bare_Num_Lock
14215 + shift shiftr keycode 50 = Bare_Num_Lock
14216 +# This is the "Delete" key:
14217 +keycode 51 = Remove
14218 + control alt keycode 51 = Boot
14219 +
14220 +keycode 53 = backslash bar
14221 + shiftr keycode 53 = bar
14222 + shift shiftr keycode 53 = bar
14223 + control keycode 53 = Control_backslash
14224 + alt keycode 53 = Meta_backslash
14225 +keycode 54 = Return
14226 + alt keycode 54 = Meta_Control_m
14227 +keycode 55 = space space
14228 + shiftr keycode 55 = space
14229 + shift shiftr keycode 55 = space
14230 + control keycode 55 = nul
14231 + alt keycode 55 = Meta_space
14232 +keycode 56 = g
14233 + shiftr keycode 56 = +G
14234 + shift shiftr keycode 56 = +g
14235 +keycode 57 = t
14236 + shiftr keycode 57 = +T
14237 + shift shiftr keycode 57 = +t
14238 +keycode 58 = five percent
14239 + shiftr keycode 58 = percent
14240 + shift shiftr keycode 58 = percent
14241 + control keycode 58 = Control_bracketright
14242 + alt keycode 58 = Meta_five
14243 +keycode 59 = four dollar dollar
14244 + shiftr keycode 59 = dollar
14245 + shift shiftr keycode 59 = dollar
14246 + control keycode 59 = Control_backslash
14247 + alt keycode 59 = Meta_four
14248 +keycode 60 = r
14249 + shiftr keycode 60 = +R
14250 + shift shiftr keycode 60 = +r
14251 +keycode 61 = f
14252 + shiftr keycode 61 = +F
14253 + shift shiftr keycode 61 = +f
14254 + altgr keycode 61 = Hex_F
14255 +keycode 62 = v
14256 + shiftr keycode 62 = +V
14257 + shift shiftr keycode 62 = +v
14258 +keycode 63 = b
14259 + shiftr keycode 63 = +B
14260 + shift shiftr keycode 63 = +b
14261 + altgr keycode 63 = Hex_B
14262 +
14263 +keycode 67 = three numbersign
14264 + shiftr keycode 67 = numbersign
14265 + shift shiftr keycode 67 = numbersign
14266 + control keycode 67 = Escape
14267 + alt keycode 67 = Meta_three
14268 +keycode 68 = e
14269 + shiftr keycode 68 = +E
14270 + shift shiftr keycode 68 = +e
14271 + altgr keycode 68 = Hex_E
14272 +keycode 69 = d
14273 + shiftr keycode 69 = +D
14274 + shift shiftr keycode 69 = +d
14275 + altgr keycode 69 = Hex_D
14276 +keycode 70 = c
14277 + shiftr keycode 70 = +C
14278 + shift shiftr keycode 70 = +c
14279 + altgr keycode 70 = Hex_C
14280 +keycode 71 = Right Incr_Console
14281 + shiftr keycode 71 = Incr_Console
14282 + shift shiftr keycode 71 = Incr_Console
14283 + alt keycode 71 = End
14284 +
14285 +keycode 75 = two at at
14286 + shiftr keycode 75 = at
14287 + shift shiftr keycode 75 = at
14288 + control keycode 75 = nul
14289 + shift control keycode 75 = nul
14290 + shiftr control keycode 75 = nul
14291 + shift shiftr control keycode 75 = nul
14292 + alt keycode 75 = Meta_two
14293 +keycode 76 = w
14294 + shiftr keycode 76 = +W
14295 + shift shiftr keycode 76 = +w
14296 +keycode 77 = s
14297 + shiftr keycode 77 = +S
14298 + shift shiftr keycode 77 = +s
14299 +keycode 78 = x
14300 + shiftr keycode 78 = +X
14301 + shift shiftr keycode 78 = +x
14302 +keycode 79 = Down Scroll_Forward
14303 + shiftr keycode 79 = Scroll_Forward
14304 + shift shiftr keycode 79 = Scroll_Forward
14305 + alt keycode 79 = Next
14306 +keycode 80 = Escape Escape
14307 + shiftr keycode 80 = Escape
14308 + shift shiftr keycode 80 = Escape
14309 + alt keycode 80 = Meta_Escape
14310 +keycode 81 = Tab Tab
14311 + shiftr keycode 81 = Tab
14312 + shift shiftr keycode 81 = Tab
14313 + alt keycode 81 = Meta_Tab
14314 +keycode 82 = grave asciitilde
14315 + shiftr keycode 82 = asciitilde
14316 + shift shiftr keycode 82 = asciitilde
14317 + control keycode 82 = nul
14318 + alt keycode 82 = Meta_grave
14319 +keycode 83 = one exclam
14320 + shiftr keycode 83 = exclam
14321 + shift shiftr keycode 83 = exclam
14322 + alt keycode 83 = Meta_one
14323 +keycode 84 = q
14324 + shiftr keycode 84 = +Q
14325 + shift shiftr keycode 84 = +q
14326 +keycode 85 = a
14327 + shiftr keycode 85 = +A
14328 + shift shiftr keycode 85 = +a
14329 + altgr keycode 85 = Hex_A
14330 +keycode 86 = z
14331 + shiftr keycode 86 = +Z
14332 + shift shiftr keycode 86 = +z
14333 +
14334 +# This is the windows key:
14335 +keycode 88 = Decr_Console
14336 +keycode 89 = Shift
14337 +keycode 90 = Control
14338 +keycode 91 = Control
14339 +keycode 92 = Alt
14340 +keycode 93 = AltGr
14341 +keycode 94 = ShiftR
14342 + shift keycode 94 = Caps_Lock
14343 Index: linux-2.4.35.4/drivers/char/indydog.c
14344 ===================================================================
14345 --- linux-2.4.35.4.orig/drivers/char/indydog.c 2007-12-15 05:19:43.846919732 +0100
14346 +++ linux-2.4.35.4/drivers/char/indydog.c 2007-12-15 05:19:44.922981052 +0100
14347 @@ -1,5 +1,5 @@
14348 /*
14349 - * IndyDog 0.2 A Hardware Watchdog Device for SGI IP22
14350 + * IndyDog 0.3 A Hardware Watchdog Device for SGI IP22
14351 *
14352 * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
14353 *
14354 @@ -7,10 +7,10 @@
14355 * modify it under the terms of the GNU General Public License
14356 * as published by the Free Software Foundation; either version
14357 * 2 of the License, or (at your option) any later version.
14358 - *
14359 + *
14360 * based on softdog.c by Alan Cox <alan@redhat.com>
14361 */
14362 -
14363 +
14364 #include <linux/module.h>
14365 #include <linux/config.h>
14366 #include <linux/types.h>
14367 @@ -19,13 +19,12 @@
14368 #include <linux/mm.h>
14369 #include <linux/miscdevice.h>
14370 #include <linux/watchdog.h>
14371 -#include <linux/smp_lock.h>
14372 #include <linux/init.h>
14373 #include <asm/uaccess.h>
14374 #include <asm/sgi/mc.h>
14375
14376 -static unsigned long indydog_alive;
14377 -static int expect_close = 0;
14378 +#define PFX "indydog: "
14379 +static int indydog_alive;
14380
14381 #ifdef CONFIG_WATCHDOG_NOWAYOUT
14382 static int nowayout = 1;
14383 @@ -33,10 +32,30 @@
14384 static int nowayout = 0;
14385 #endif
14386
14387 +#define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
14388 +
14389 MODULE_PARM(nowayout,"i");
14390 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
14391
14392 -static inline void indydog_ping(void)
14393 +static void indydog_start(void)
14394 +{
14395 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14396 +
14397 + mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
14398 + sgimc->cpuctrl0 = mc_ctrl0;
14399 +}
14400 +
14401 +static void indydog_stop(void)
14402 +{
14403 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14404 +
14405 + mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
14406 + sgimc->cpuctrl0 = mc_ctrl0;
14407 +
14408 + printk(KERN_INFO PFX "Stopped watchdog timer.\n");
14409 +}
14410 +
14411 +static void indydog_ping(void)
14412 {
14413 sgimc->watchdogt = 0;
14414 }
14415 @@ -46,18 +65,14 @@
14416 */
14417 static int indydog_open(struct inode *inode, struct file *file)
14418 {
14419 - u32 mc_ctrl0;
14420 -
14421 - if (test_and_set_bit(0,&indydog_alive))
14422 + if (indydog_alive)
14423 return -EBUSY;
14424
14425 - if (nowayout) {
14426 + if (nowayout)
14427 MOD_INC_USE_COUNT;
14428 - }
14429
14430 /* Activate timer */
14431 - mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
14432 - sgimc->cpuctrl0 = mc_ctrl0;
14433 + indydog_start();
14434 indydog_ping();
14435
14436 indydog_alive = 1;
14437 @@ -69,63 +84,48 @@
14438 static int indydog_release(struct inode *inode, struct file *file)
14439 {
14440 /* Shut off the timer.
14441 - * Lock it in if it's a module and we set nowayout. */
14442 - lock_kernel();
14443 - if (expect_close) {
14444 - u32 mc_ctrl0 = sgimc->cpuctrl0;
14445 + * Lock it in if it's a module and we defined ...NOWAYOUT */
14446 + if (!nowayout) {
14447 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14448 mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
14449 sgimc->cpuctrl0 = mc_ctrl0;
14450 printk(KERN_INFO "Stopped watchdog timer.\n");
14451 - } else
14452 - printk(KERN_CRIT "WDT device closed unexpectedly. WDT will not stop!\n");
14453 - clear_bit(0, &indydog_alive);
14454 - unlock_kernel();
14455 + }
14456 + indydog_alive = 0;
14457
14458 return 0;
14459 }
14460
14461 static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
14462 {
14463 - /* Can't seek (pwrite) on this device */
14464 + /* Can't seek (pwrite) on this device */
14465 if (ppos != &file->f_pos)
14466 return -ESPIPE;
14467
14468 - /*
14469 - * Refresh the timer.
14470 - */
14471 + /* Refresh the timer. */
14472 if (len) {
14473 - if (!nowayout) {
14474 - size_t i;
14475 -
14476 - /* In case it was set long ago */
14477 - expect_close = 0;
14478 -
14479 - for (i = 0; i != len; i++) {
14480 - char c;
14481 - if (get_user(c, data + i))
14482 - return -EFAULT;
14483 - if (c == 'V')
14484 - expect_close = 1;
14485 - }
14486 - }
14487 indydog_ping();
14488 - return 1;
14489 }
14490 - return 0;
14491 + return len;
14492 }
14493
14494 static int indydog_ioctl(struct inode *inode, struct file *file,
14495 unsigned int cmd, unsigned long arg)
14496 {
14497 + int options, retval = -EINVAL;
14498 static struct watchdog_info ident = {
14499 - options: WDIOF_MAGICCLOSE,
14500 - identity: "Hardware Watchdog for SGI IP22",
14501 + .options = WDIOF_KEEPALIVEPING |
14502 + WDIOF_MAGICCLOSE,
14503 + .firmware_version = 0,
14504 + .identity = "Hardware Watchdog for SGI IP22",
14505 };
14506 +
14507 switch (cmd) {
14508 default:
14509 return -ENOIOCTLCMD;
14510 case WDIOC_GETSUPPORT:
14511 - if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
14512 + if (copy_to_user((struct watchdog_info *)arg,
14513 + &ident, sizeof(ident)))
14514 return -EFAULT;
14515 return 0;
14516 case WDIOC_GETSTATUS:
14517 @@ -134,31 +134,53 @@
14518 case WDIOC_KEEPALIVE:
14519 indydog_ping();
14520 return 0;
14521 + case WDIOC_GETTIMEOUT:
14522 + return put_user(WATCHDOG_TIMEOUT,(int *)arg);
14523 + case WDIOC_SETOPTIONS:
14524 + {
14525 + if (get_user(options, (int *)arg))
14526 + return -EFAULT;
14527 +
14528 + if (options & WDIOS_DISABLECARD) {
14529 + indydog_stop();
14530 + retval = 0;
14531 + }
14532 +
14533 + if (options & WDIOS_ENABLECARD) {
14534 + indydog_start();
14535 + retval = 0;
14536 + }
14537 +
14538 + return retval;
14539 + }
14540 }
14541 }
14542
14543 static struct file_operations indydog_fops = {
14544 - owner: THIS_MODULE,
14545 - write: indydog_write,
14546 - ioctl: indydog_ioctl,
14547 - open: indydog_open,
14548 - release: indydog_release,
14549 + .owner = THIS_MODULE,
14550 + .write = indydog_write,
14551 + .ioctl = indydog_ioctl,
14552 + .open = indydog_open,
14553 + .release = indydog_release,
14554 };
14555
14556 static struct miscdevice indydog_miscdev = {
14557 - minor: WATCHDOG_MINOR,
14558 - name: "watchdog",
14559 - fops: &indydog_fops,
14560 + .minor = WATCHDOG_MINOR,
14561 + .name = "watchdog",
14562 + .fops = &indydog_fops,
14563 };
14564
14565 -static const char banner[] __initdata = KERN_INFO "Hardware Watchdog Timer for SGI IP22: 0.2\n";
14566 +static char banner[] __initdata =
14567 + KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n";
14568
14569 static int __init watchdog_init(void)
14570 {
14571 int ret = misc_register(&indydog_miscdev);
14572 -
14573 - if (ret)
14574 + if (ret) {
14575 + printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
14576 + WATCHDOG_MINOR, ret);
14577 return ret;
14578 + }
14579
14580 printk(banner);
14581
14582 @@ -172,4 +194,7 @@
14583
14584 module_init(watchdog_init);
14585 module_exit(watchdog_exit);
14586 +
14587 +MODULE_AUTHOR("Guido Guenther <agx@sigxcpu.org>");
14588 +MODULE_DESCRIPTION("Hardware Watchdog Device for SGI IP22");
14589 MODULE_LICENSE("GPL");
14590 Index: linux-2.4.35.4/drivers/char/ip27-rtc.c
14591 ===================================================================
14592 --- linux-2.4.35.4.orig/drivers/char/ip27-rtc.c 2007-12-15 05:19:43.854920187 +0100
14593 +++ linux-2.4.35.4/drivers/char/ip27-rtc.c 2007-12-15 05:19:44.922981052 +0100
14594 @@ -44,6 +44,7 @@
14595 #include <asm/sn/klconfig.h>
14596 #include <asm/sn/sn0/ip27.h>
14597 #include <asm/sn/sn0/hub.h>
14598 +#include <asm/sn/sn_private.h>
14599
14600 static int rtc_ioctl(struct inode *inode, struct file *file,
14601 unsigned int cmd, unsigned long arg);
14602 @@ -209,11 +210,8 @@
14603
14604 static int __init rtc_init(void)
14605 {
14606 - nasid_t nid;
14607 -
14608 - nid = get_nasid();
14609 rtc = (struct m48t35_rtc *)
14610 - (KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0);
14611 + (KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0);
14612
14613 printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
14614 if (misc_register(&rtc_dev)) {
14615 @@ -325,3 +323,7 @@
14616
14617 rtc_tm->tm_mon--;
14618 }
14619 +
14620 +MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
14621 +MODULE_DESCRIPTION("SGI IP27 M48T35 RTC driver");
14622 +MODULE_LICENSE("GPL");
14623 Index: linux-2.4.35.4/drivers/char/Makefile
14624 ===================================================================
14625 --- linux-2.4.35.4.orig/drivers/char/Makefile 2007-12-15 05:19:43.862920643 +0100
14626 +++ linux-2.4.35.4/drivers/char/Makefile 2007-12-15 05:19:44.922981052 +0100
14627 @@ -48,7 +48,12 @@
14628 KEYBD =
14629 endif
14630 ifeq ($(CONFIG_VR41XX_KIU),y)
14631 - KEYMAP =
14632 + ifeq ($(CONFIG_IBM_WORKPAD),y)
14633 + KEYMAP = ibm_workpad_keymap.o
14634 + endif
14635 + ifeq ($(CONFIG_VICTOR_MPC30X),y)
14636 + KEYMAP = victor_mpc30x_keymap.o
14637 + endif
14638 KEYBD = vr41xx_keyb.o
14639 endif
14640 endif
14641 @@ -251,7 +256,6 @@
14642 obj-$(CONFIG_RTC) += rtc.o
14643 obj-$(CONFIG_GEN_RTC) += genrtc.o
14644 obj-$(CONFIG_EFI_RTC) += efirtc.o
14645 -obj-$(CONFIG_SGI_DS1286) += ds1286.o
14646 obj-$(CONFIG_MIPS_RTC) += mips_rtc.o
14647 obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
14648 ifeq ($(CONFIG_PPC),)
14649 @@ -259,6 +263,7 @@
14650 endif
14651 obj-$(CONFIG_TOSHIBA) += toshiba.o
14652 obj-$(CONFIG_I8K) += i8k.o
14653 +obj-$(CONFIG_DS1286) += ds1286.o
14654 obj-$(CONFIG_DS1620) += ds1620.o
14655 obj-$(CONFIG_DS1742) += ds1742.o
14656 obj-$(CONFIG_INTEL_RNG) += i810_rng.o
14657 @@ -269,6 +274,7 @@
14658
14659 obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
14660 obj-$(CONFIG_AU1X00_GPIO) += au1000_gpio.o
14661 +obj-$(CONFIG_AU1550_PSC_SPI) += au1550_psc_spi.o
14662 obj-$(CONFIG_AU1X00_USB_TTY) += au1000_usbtty.o
14663 obj-$(CONFIG_AU1X00_USB_RAW) += au1000_usbraw.o
14664 obj-$(CONFIG_COBALT_LCD) += lcd.o
14665 @@ -355,3 +361,9 @@
14666
14667 qtronixmap.c: qtronixmap.map
14668 set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
14669 +
14670 +ibm_workpad_keymap.c: ibm_workpad_keymap.map
14671 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
14672 +
14673 +victor_mpc30x_keymap.c: victor_mpc30x_keymap.map
14674 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
14675 Index: linux-2.4.35.4/drivers/char/mips_rtc.c
14676 ===================================================================
14677 --- linux-2.4.35.4.orig/drivers/char/mips_rtc.c 2007-12-15 05:19:43.870921098 +0100
14678 +++ linux-2.4.35.4/drivers/char/mips_rtc.c 2007-12-15 05:19:44.926981281 +0100
14679 @@ -53,14 +53,6 @@
14680 #include <asm/io.h>
14681 #include <asm/uaccess.h>
14682 #include <asm/system.h>
14683 -
14684 -/*
14685 - * Check machine
14686 - */
14687 -#if !defined(CONFIG_MIPS) || !defined(CONFIG_NEW_TIME_C)
14688 -#error "This driver is for MIPS machines with CONFIG_NEW_TIME_C defined"
14689 -#endif
14690 -
14691 #include <asm/time.h>
14692
14693 static unsigned long rtc_status = 0; /* bitmapped status byte. */
14694 Index: linux-2.4.35.4/drivers/char/sb1250_duart.c
14695 ===================================================================
14696 --- linux-2.4.35.4.orig/drivers/char/sb1250_duart.c 2007-12-15 05:19:43.874921327 +0100
14697 +++ linux-2.4.35.4/drivers/char/sb1250_duart.c 2007-12-15 05:19:44.930981508 +0100
14698 @@ -328,10 +328,11 @@
14699 if (c <= 0) break;
14700
14701 if (from_user) {
14702 + spin_unlock_irqrestore(&us->outp_lock, flags);
14703 if (copy_from_user(us->outp_buf + us->outp_tail, buf, c)) {
14704 - spin_unlock_irqrestore(&us->outp_lock, flags);
14705 return -EFAULT;
14706 }
14707 + spin_lock_irqsave(&us->outp_lock, flags);
14708 } else {
14709 memcpy(us->outp_buf + us->outp_tail, buf, c);
14710 }
14711 @@ -498,9 +499,31 @@
14712 duart_set_cflag(us->line, tty->termios->c_cflag);
14713 }
14714
14715 +static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo) {
14716 +
14717 + struct serial_struct tmp;
14718 +
14719 + memset(&tmp, 0, sizeof(tmp));
14720 +
14721 + tmp.type=PORT_SB1250;
14722 + tmp.line=us->line;
14723 + tmp.port=A_DUART_CHANREG(tmp.line,0);
14724 + tmp.irq=K_INT_UART_0 + tmp.line;
14725 + tmp.xmit_fifo_size=16; /* fixed by hw */
14726 + tmp.baud_base=5000000;
14727 + tmp.io_type=SERIAL_IO_MEM;
14728 +
14729 + if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
14730 + return -EFAULT;
14731 +
14732 + return 0;
14733 +}
14734 +
14735 static int duart_ioctl(struct tty_struct *tty, struct file * file,
14736 unsigned int cmd, unsigned long arg)
14737 {
14738 + uart_state_t *us = (uart_state_t *) tty->driver_data;
14739 +
14740 /* if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
14741 return -ENODEV;*/
14742 switch (cmd) {
14743 @@ -517,7 +540,7 @@
14744 printk("Ignoring TIOCMSET\n");
14745 break;
14746 case TIOCGSERIAL:
14747 - printk("Ignoring TIOCGSERIAL\n");
14748 + return get_serial_info(us,(struct serial_struct *) arg);
14749 break;
14750 case TIOCSSERIAL:
14751 printk("Ignoring TIOCSSERIAL\n");
14752 Index: linux-2.4.35.4/drivers/char/serial.c
14753 ===================================================================
14754 --- linux-2.4.35.4.orig/drivers/char/serial.c 2007-12-15 05:19:43.882921783 +0100
14755 +++ linux-2.4.35.4/drivers/char/serial.c 2007-12-15 05:19:44.934981737 +0100
14756 @@ -62,6 +62,12 @@
14757 * Robert Schwebel <robert@schwebel.de>,
14758 * Juergen Beisert <jbeisert@eurodsn.de>,
14759 * Theodore Ts'o <tytso@mit.edu>
14760 + *
14761 + * 10/00: Added suport for MIPS Atlas board.
14762 + * 11/00: Hooks for serial kernel debug port support added.
14763 + * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard,
14764 + * carstenl@mips.com
14765 + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
14766 */
14767
14768 static char *serial_version = "5.05c";
14769 @@ -413,6 +419,22 @@
14770 return 0;
14771 }
14772
14773 +#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
14774 +
14775 +#include <asm/mips-boards/atlas.h>
14776 +
14777 +static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
14778 +{
14779 + return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
14780 +}
14781 +
14782 +static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
14783 +{
14784 + *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
14785 +}
14786 +
14787 +#else
14788 +
14789 static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
14790 {
14791 switch (info->io_type) {
14792 @@ -447,6 +469,8 @@
14793 outb(value, info->port+offset);
14794 }
14795 }
14796 +#endif
14797 +
14798
14799 /*
14800 * We used to support using pause I/O for certain machines. We
14801 Index: linux-2.4.35.4/drivers/char/victor_mpc30x_keymap.map
14802 ===================================================================
14803 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
14804 +++ linux-2.4.35.4/drivers/char/victor_mpc30x_keymap.map 2007-12-15 05:19:44.934981737 +0100
14805 @@ -0,0 +1,102 @@
14806 +# Victor Interlink MP-C303/304 keyboard keymap
14807 +#
14808 +# Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
14809 +#
14810 +# This file is subject to the terms and conditions of the GNU General Public
14811 +# License. See the file "COPYING" in the main directory of this archive
14812 +# for more details.
14813 +keymaps 0-1,4-5,8-9,12
14814 +alt_is_meta
14815 +strings as usual
14816 +compose as usual for "iso-8859-1"
14817 +
14818 +# First line
14819 +keycode 89 = Escape
14820 +keycode 9 = Delete
14821 +
14822 +# 2nd line
14823 +keycode 73 = one exclam
14824 +keycode 18 = two quotedbl
14825 +keycode 92 = three numbersign
14826 + control keycode 92 = Escape
14827 +keycode 53 = four dollar
14828 + control keycode 53 = Control_backslash
14829 +keycode 21 = five percent
14830 + control keycode 21 = Control_bracketright
14831 +keycode 50 = six ampersand
14832 + control keycode 50 = Control_underscore
14833 +keycode 48 = seven apostrophe
14834 +keycode 51 = eight parenleft
14835 +keycode 16 = nine parenright
14836 +keycode 80 = zero asciitilde
14837 + control keycode 80 = nul
14838 +keycode 49 = minus equal
14839 +keycode 30 = asciicircum asciitilde
14840 + control keycode 30 = Control_asciicircum
14841 +keycode 5 = backslash bar
14842 + control keycode 5 = Control_backslash
14843 +keycode 13 = BackSpace
14844 +# 3rd line
14845 +keycode 57 = Tab
14846 +keycode 74 = q
14847 +keycode 26 = w
14848 +keycode 81 = e
14849 +keycode 29 = r
14850 +keycode 37 = t
14851 +keycode 45 = y
14852 +keycode 72 = u
14853 +keycode 24 = i
14854 +keycode 32 = o
14855 +keycode 41 = p
14856 +keycode 1 = at grave
14857 + control keycode 1 = nul
14858 +keycode 54 = bracketleft braceleft
14859 +keycode 63 = Return
14860 + alt keycode 63 = Meta_Control_m
14861 +# 4th line
14862 +keycode 23 = Caps_Lock
14863 +keycode 34 = a
14864 +keycode 66 = s
14865 +keycode 52 = d
14866 +keycode 20 = f
14867 +keycode 84 = g
14868 +keycode 67 = h
14869 +keycode 64 = j
14870 +keycode 17 = k
14871 +keycode 83 = l
14872 +keycode 22 = semicolon plus
14873 +keycode 61 = colon asterisk
14874 + control keycode 61 = Control_g
14875 +keycode 65 = bracketright braceright
14876 + control keycode 65 = Control_bracketright
14877 +# 5th line
14878 +keycode 91 = Shift
14879 +keycode 76 = z
14880 +keycode 68 = x
14881 +keycode 28 = c
14882 +keycode 36 = v
14883 +keycode 44 = b
14884 +keycode 19 = n
14885 +keycode 27 = m
14886 +keycode 35 = comma less
14887 +keycode 3 = period greater
14888 + control keycode 3 = Compose
14889 +keycode 38 = slash question
14890 + control keycode 38 = Delete
14891 + shift control keycode 38 = Delete
14892 +keycode 6 = backslash underscore
14893 + control keycode 6 = Control_backslash
14894 +keycode 55 = Up
14895 + alt keycode 55 = PageUp
14896 +keycode 14 = Shift
14897 +# 6th line
14898 +keycode 56 = Control
14899 +keycode 42 = Alt
14900 +keycode 33 = space
14901 + control keycode 33 = nul
14902 +keycode 7 = Left
14903 + alt keycode 7 = Home
14904 +keycode 31 = Down
14905 + alt keycode 31 = PageDown
14906 +keycode 47 = Right
14907 + alt keycode 47 = End
14908 Index: linux-2.4.35.4/drivers/char/vr41xx_keyb.c
14909 ===================================================================
14910 --- linux-2.4.35.4.orig/drivers/char/vr41xx_keyb.c 2007-12-15 05:19:43.894922467 +0100
14911 +++ linux-2.4.35.4/drivers/char/vr41xx_keyb.c 2007-12-15 05:19:44.938981966 +0100
14912 @@ -308,7 +308,7 @@
14913 if (found != 0) {
14914 kiu_base = VRC4173_KIU_OFFSET;
14915 mkiuintreg = VRC4173_MKIUINTREG_OFFSET;
14916 - vrc4173_clock_supply(VRC4173_KIU_CLOCK);
14917 + vrc4173_supply_clock(VRC4173_KIU_CLOCK);
14918 }
14919 }
14920 #endif
14921 @@ -325,7 +325,7 @@
14922
14923 if (current_cpu_data.cputype == CPU_VR4111 ||
14924 current_cpu_data.cputype == CPU_VR4121)
14925 - vr41xx_clock_supply(KIU_CLOCK);
14926 + vr41xx_supply_clock(KIU_CLOCK);
14927
14928 kiu_writew(KIURST_KIURST, KIURST);
14929
14930 Index: linux-2.4.35.4/drivers/i2c/Config.in
14931 ===================================================================
14932 --- linux-2.4.35.4.orig/drivers/i2c/Config.in 2007-12-15 05:19:43.902922923 +0100
14933 +++ linux-2.4.35.4/drivers/i2c/Config.in 2007-12-15 05:19:44.938981966 +0100
14934 @@ -57,6 +57,10 @@
14935 if [ "$CONFIG_SGI_IP22" = "y" ]; then
14936 dep_tristate 'I2C SGI interfaces' CONFIG_I2C_ALGO_SGI $CONFIG_I2C
14937 fi
14938 +
14939 + if [ "$CONFIG_SOC_AU1550" = "y" -o "$CONFIG_SOC_AU1200" ]; then
14940 + dep_tristate 'Au1550/Au1200 SMBus interface' CONFIG_I2C_ALGO_AU1550 $CONFIG_I2C
14941 + fi
14942
14943 # This is needed for automatic patch generation: sensors code starts here
14944 # This is needed for automatic patch generation: sensors code ends here
14945 Index: linux-2.4.35.4/drivers/i2c/i2c-algo-au1550.c
14946 ===================================================================
14947 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
14948 +++ linux-2.4.35.4/drivers/i2c/i2c-algo-au1550.c 2007-12-15 05:19:44.938981966 +0100
14949 @@ -0,0 +1,340 @@
14950 +/*
14951 + * i2c-algo-au1550.c: SMBus (i2c) driver algorithms for Alchemy PSC interface
14952 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
14953 + *
14954 + * The documentation describes this as an SMBus controller, but it doesn't
14955 + * understand any of the SMBus protocol in hardware. It's really an I2C
14956 + * controller that could emulate most of the SMBus in software.
14957 + */
14958 +
14959 +#include <linux/kernel.h>
14960 +#include <linux/module.h>
14961 +#include <linux/init.h>
14962 +#include <linux/errno.h>
14963 +#include <linux/delay.h>
14964 +
14965 +#include <asm/au1000.h>
14966 +#include <asm/au1xxx_psc.h>
14967 +
14968 +#include <linux/i2c.h>
14969 +#include <linux/i2c-algo-au1550.h>
14970 +
14971 +static int
14972 +wait_xfer_done(struct i2c_algo_au1550_data *adap)
14973 +{
14974 + u32 stat;
14975 + int i;
14976 + volatile psc_smb_t *sp;
14977 +
14978 + sp = (volatile psc_smb_t *)(adap->psc_base);
14979 +
14980 + /* Wait for Tx FIFO Underflow.
14981 + */
14982 + for (i = 0; i < adap->xfer_timeout; i++) {
14983 + stat = sp->psc_smbevnt;
14984 + au_sync();
14985 + if ((stat & PSC_SMBEVNT_TU) != 0) {
14986 + /* Clear it. */
14987 + sp->psc_smbevnt = PSC_SMBEVNT_TU;
14988 + au_sync();
14989 + return 0;
14990 + }
14991 + udelay(1);
14992 + }
14993 +
14994 + return -ETIMEDOUT;
14995 +}
14996 +
14997 +static int
14998 +wait_ack(struct i2c_algo_au1550_data *adap)
14999 +{
15000 + u32 stat;
15001 + volatile psc_smb_t *sp;
15002 +
15003 + if (wait_xfer_done(adap))
15004 + return -ETIMEDOUT;
15005 +
15006 + sp = (volatile psc_smb_t *)(adap->psc_base);
15007 +
15008 + stat = sp->psc_smbevnt;
15009 + au_sync();
15010 +
15011 + if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
15012 + return -ETIMEDOUT;
15013 +
15014 + return 0;
15015 +}
15016 +
15017 +static int
15018 +wait_master_done(struct i2c_algo_au1550_data *adap)
15019 +{
15020 + u32 stat;
15021 + int i;
15022 + volatile psc_smb_t *sp;
15023 +
15024 + sp = (volatile psc_smb_t *)(adap->psc_base);
15025 +
15026 + /* Wait for Master Done.
15027 + */
15028 + for (i = 0; i < adap->xfer_timeout; i++) {
15029 + stat = sp->psc_smbevnt;
15030 + au_sync();
15031 + if ((stat & PSC_SMBEVNT_MD) != 0)
15032 + return 0;
15033 + udelay(1);
15034 + }
15035 +
15036 + return -ETIMEDOUT;
15037 +}
15038 +
15039 +static int
15040 +do_address(struct i2c_algo_au1550_data *adap, unsigned int addr, int rd)
15041 +{
15042 + volatile psc_smb_t *sp;
15043 + u32 stat;
15044 +
15045 + sp = (volatile psc_smb_t *)(adap->psc_base);
15046 +
15047 + /* Reset the FIFOs, clear events.
15048 + */
15049 + sp->psc_smbpcr = PSC_SMBPCR_DC;
15050 + sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
15051 + au_sync();
15052 + do {
15053 + stat = sp->psc_smbpcr;
15054 + au_sync();
15055 + } while ((stat & PSC_SMBPCR_DC) != 0);
15056 +
15057 + /* Write out the i2c chip address and specify operation
15058 + */
15059 + addr <<= 1;
15060 + if (rd)
15061 + addr |= 1;
15062 +
15063 + /* Put byte into fifo, start up master.
15064 + */
15065 + sp->psc_smbtxrx = addr;
15066 + au_sync();
15067 + sp->psc_smbpcr = PSC_SMBPCR_MS;
15068 + au_sync();
15069 + if (wait_ack(adap))
15070 + return -EIO;
15071 + return 0;
15072 +}
15073 +
15074 +static u32
15075 +wait_for_rx_byte(struct i2c_algo_au1550_data *adap, u32 *ret_data)
15076 +{
15077 + int j;
15078 + u32 data, stat;
15079 + volatile psc_smb_t *sp;
15080 +
15081 + if (wait_xfer_done(adap))
15082 + return -EIO;
15083 +
15084 + sp = (volatile psc_smb_t *)(adap->psc_base);
15085 +
15086 + j = adap->xfer_timeout * 100;
15087 + do {
15088 + j--;
15089 + if (j <= 0)
15090 + return -EIO;
15091 +
15092 + stat = sp->psc_smbstat;
15093 + au_sync();
15094 + if ((stat & PSC_SMBSTAT_RE) == 0)
15095 + j = 0;
15096 + else
15097 + udelay(1);
15098 + } while (j > 0);
15099 + data = sp->psc_smbtxrx;
15100 + au_sync();
15101 + *ret_data = data;
15102 +
15103 + return 0;
15104 +}
15105 +
15106 +static int
15107 +i2c_read(struct i2c_algo_au1550_data *adap, unsigned char *buf,
15108 + unsigned int len)
15109 +{
15110 + int i;
15111 + u32 data;
15112 + volatile psc_smb_t *sp;
15113 +
15114 + if (len == 0)
15115 + return 0;
15116 +
15117 + /* A read is performed by stuffing the transmit fifo with
15118 + * zero bytes for timing, waiting for bytes to appear in the
15119 + * receive fifo, then reading the bytes.
15120 + */
15121 +
15122 + sp = (volatile psc_smb_t *)(adap->psc_base);
15123 +
15124 + i = 0;
15125 + while (i < (len-1)) {
15126 + sp->psc_smbtxrx = 0;
15127 + au_sync();
15128 + if (wait_for_rx_byte(adap, &data))
15129 + return -EIO;
15130 +
15131 + buf[i] = data;
15132 + i++;
15133 + }
15134 +
15135 + /* The last byte has to indicate transfer done.
15136 + */
15137 + sp->psc_smbtxrx = PSC_SMBTXRX_STP;
15138 + au_sync();
15139 + if (wait_master_done(adap))
15140 + return -EIO;
15141 +
15142 + data = sp->psc_smbtxrx;
15143 + au_sync();
15144 + buf[i] = data;
15145 + return 0;
15146 +}
15147 +
15148 +static int
15149 +i2c_write(struct i2c_algo_au1550_data *adap, unsigned char *buf,
15150 + unsigned int len)
15151 +{
15152 + int i;
15153 + u32 data;
15154 + volatile psc_smb_t *sp;
15155 +
15156 + if (len == 0)
15157 + return 0;
15158 +
15159 + sp = (volatile psc_smb_t *)(adap->psc_base);
15160 +
15161 + i = 0;
15162 + while (i < (len-1)) {
15163 + data = buf[i];
15164 + sp->psc_smbtxrx = data;
15165 + au_sync();
15166 + if (wait_ack(adap))
15167 + return -EIO;
15168 + i++;
15169 + }
15170 +
15171 + /* The last byte has to indicate transfer done.
15172 + */
15173 + data = buf[i];
15174 + data |= PSC_SMBTXRX_STP;
15175 + sp->psc_smbtxrx = data;
15176 + au_sync();
15177 + if (wait_master_done(adap))
15178 + return -EIO;
15179 + return 0;
15180 +}
15181 +
15182 +static int
15183 +au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
15184 +{
15185 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
15186 + struct i2c_msg *p;
15187 + int i, err = 0;
15188 +
15189 + for (i = 0; !err && i < num; i++) {
15190 + p = &msgs[i];
15191 + err = do_address(adap, p->addr, p->flags & I2C_M_RD);
15192 + if (err || !p->len)
15193 + continue;
15194 + if (p->flags & I2C_M_RD)
15195 + err = i2c_read(adap, p->buf, p->len);
15196 + else
15197 + err = i2c_write(adap, p->buf, p->len);
15198 + }
15199 +
15200 + /* Return the number of messages processed, or the error code.
15201 + */
15202 + if (err == 0)
15203 + err = num;
15204 + return err;
15205 +}
15206 +
15207 +static u32
15208 +au1550_func(struct i2c_adapter *adap)
15209 +{
15210 + return I2C_FUNC_I2C;
15211 +}
15212 +
15213 +static struct i2c_algorithm au1550_algo = {
15214 + .name = "Au1550 algorithm",
15215 + .id = I2C_ALGO_AU1550,
15216 + .master_xfer = au1550_xfer,
15217 + .functionality = au1550_func,
15218 +};
15219 +
15220 +/*
15221 + * registering functions to load algorithms at runtime
15222 + * Prior to calling us, the 50MHz clock frequency and routing
15223 + * must have been set up for the PSC indicated by the adapter.
15224 + */
15225 +int
15226 +i2c_au1550_add_bus(struct i2c_adapter *i2c_adap)
15227 +{
15228 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
15229 + volatile psc_smb_t *sp;
15230 + u32 stat;
15231 +
15232 + i2c_adap->algo = &au1550_algo;
15233 +
15234 + /* Now, set up the PSC for SMBus PIO mode.
15235 + */
15236 + sp = (volatile psc_smb_t *)(adap->psc_base);
15237 + sp->psc_ctrl = PSC_CTRL_DISABLE;
15238 + au_sync();
15239 + sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
15240 + sp->psc_smbcfg = 0;
15241 + au_sync();
15242 + sp->psc_ctrl = PSC_CTRL_ENABLE;
15243 + au_sync();
15244 + do {
15245 + stat = sp->psc_smbstat;
15246 + au_sync();
15247 + } while ((stat & PSC_SMBSTAT_SR) == 0);
15248 +
15249 + sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
15250 + PSC_SMBCFG_DD_DISABLE);
15251 +
15252 + /* Divide by 8 to get a 6.25 MHz clock. The later protocol
15253 + * timings are based on this clock.
15254 + */
15255 + sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV2);
15256 + sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
15257 + au_sync();
15258 +
15259 + /* Set the protocol timer values. See Table 71 in the
15260 + * Au1550 Data Book for standard timing values.
15261 + */
15262 + sp->psc_smbtmr = PSC_SMBTMR_SET_TH(2) | PSC_SMBTMR_SET_PS(15) | \
15263 + PSC_SMBTMR_SET_PU(11) | PSC_SMBTMR_SET_SH(11) | \
15264 + PSC_SMBTMR_SET_SU(11) | PSC_SMBTMR_SET_CL(15) | \
15265 + PSC_SMBTMR_SET_CH(11);
15266 + au_sync();
15267 +
15268 + sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
15269 + do {
15270 + stat = sp->psc_smbstat;
15271 + au_sync();
15272 + } while ((stat & PSC_SMBSTAT_DR) == 0);
15273 +
15274 + return i2c_add_adapter(i2c_adap);
15275 +}
15276 +
15277 +
15278 +int
15279 +i2c_au1550_del_bus(struct i2c_adapter *adap)
15280 +{
15281 + return i2c_del_adapter(adap);
15282 +}
15283 +
15284 +EXPORT_SYMBOL(i2c_au1550_add_bus);
15285 +EXPORT_SYMBOL(i2c_au1550_del_bus);
15286 +
15287 +MODULE_AUTHOR("Dan Malek <dan@embeddededge.com>");
15288 +MODULE_DESCRIPTION("SMBus Au1550 algorithm");
15289 +MODULE_LICENSE("GPL");
15290 Index: linux-2.4.35.4/drivers/i2c/i2c-au1550.c
15291 ===================================================================
15292 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
15293 +++ linux-2.4.35.4/drivers/i2c/i2c-au1550.c 2007-12-15 05:19:44.938981966 +0100
15294 @@ -0,0 +1,154 @@
15295 +/*
15296 + * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
15297 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
15298 + *
15299 + * This is just a skeleton adapter to use with the Au1550 PSC
15300 + * algorithm. It was developed for the Pb1550, but will work with
15301 + * any Au1550 board that has a similar PSC configuration.
15302 + *
15303 + * This program is free software; you can redistribute it and/or
15304 + * modify it under the terms of the GNU General Public License
15305 + * as published by the Free Software Foundation; either version 2
15306 + * of the License, or (at your option) any later version.
15307 + *
15308 + * This program is distributed in the hope that it will be useful,
15309 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
15310 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15311 + * GNU General Public License for more details.
15312 + *
15313 + * You should have received a copy of the GNU General Public License
15314 + * along with this program; if not, write to the Free Software
15315 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15316 + */
15317 +
15318 +#include <linux/config.h>
15319 +#include <linux/kernel.h>
15320 +#include <linux/module.h>
15321 +#include <linux/init.h>
15322 +#include <linux/errno.h>
15323 +
15324 +#include <asm/au1000.h>
15325 +#include <asm/au1xxx_psc.h>
15326 +#if defined( CONFIG_MIPS_PB1550 )
15327 + #include <asm/pb1550.h>
15328 +#endif
15329 +#if defined( CONFIG_MIPS_PB1200 )
15330 + #include <asm/pb1200.h>
15331 +#endif
15332 +#if defined( CONFIG_MIPS_DB1200 )
15333 + #include <asm/db1200.h>
15334 +#endif
15335 +#if defined( CONFIG_MIPS_FICMMP )
15336 + #include <asm/ficmmp.h>
15337 +#endif
15338 +
15339 +#include <linux/i2c.h>
15340 +#include <linux/i2c-algo-au1550.h>
15341 +
15342 +
15343 +
15344 +static int
15345 +pb1550_reg(struct i2c_client *client)
15346 +{
15347 + return 0;
15348 +}
15349 +
15350 +static int
15351 +pb1550_unreg(struct i2c_client *client)
15352 +{
15353 + return 0;
15354 +}
15355 +
15356 +static void
15357 +pb1550_inc_use(struct i2c_adapter *adap)
15358 +{
15359 +#ifdef MODULE
15360 + MOD_INC_USE_COUNT;
15361 +#endif
15362 +}
15363 +
15364 +static void
15365 +pb1550_dec_use(struct i2c_adapter *adap)
15366 +{
15367 +#ifdef MODULE
15368 + MOD_DEC_USE_COUNT;
15369 +#endif
15370 +}
15371 +
15372 +static struct i2c_algo_au1550_data pb1550_i2c_info = {
15373 + SMBUS_PSC_BASE, 200, 200
15374 +};
15375 +
15376 +static struct i2c_adapter pb1550_board_adapter = {
15377 + name: "pb1550 adapter",
15378 + id: I2C_HW_AU1550_PSC,
15379 + algo: NULL,
15380 + algo_data: &pb1550_i2c_info,
15381 + inc_use: pb1550_inc_use,
15382 + dec_use: pb1550_dec_use,
15383 + client_register: pb1550_reg,
15384 + client_unregister: pb1550_unreg,
15385 + client_count: 0,
15386 +};
15387 +
15388 +int __init
15389 +i2c_pb1550_init(void)
15390 +{
15391 + /* This is where we would set up a 50MHz clock source
15392 + * and routing. On the Pb1550, the SMBus is PSC2, which
15393 + * uses a shared clock with USB. This has been already
15394 + * configured by Yamon as a 48MHz clock, close enough
15395 + * for our work.
15396 + */
15397 + if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0)
15398 + return -ENODEV;
15399 +
15400 + return 0;
15401 +}
15402 +
15403 +/* BIG hack to support the control interface on the Wolfson WM8731
15404 + * audio codec on the Pb1550 board. We get an address and two data
15405 + * bytes to write, create an i2c message, and send it across the
15406 + * i2c transfer function. We do this here because we have access to
15407 + * the i2c adapter structure.
15408 + */
15409 +static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */
15410 +static u8 i2cbuf[2];
15411 +
15412 +int
15413 +pb1550_wm_codec_write(u8 addr, u8 reg, u8 val)
15414 +{
15415 + wm_i2c_msg.addr = addr;
15416 + wm_i2c_msg.flags = 0;
15417 + wm_i2c_msg.buf = i2cbuf;
15418 + wm_i2c_msg.len = 2;
15419 + i2cbuf[0] = reg;
15420 + i2cbuf[1] = val;
15421 +
15422 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1);
15423 +}
15424 +
15425 +/* the next function is needed by DVB driver. */
15426 +int pb1550_i2c_xfer(struct i2c_msg msgs[], int num)
15427 +{
15428 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, msgs, num);
15429 +}
15430 +
15431 +EXPORT_SYMBOL(pb1550_wm_codec_write);
15432 +EXPORT_SYMBOL(pb1550_i2c_xfer);
15433 +
15434 +MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
15435 +MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
15436 +MODULE_LICENSE("GPL");
15437 +
15438 +int
15439 +init_module(void)
15440 +{
15441 + return i2c_pb1550_init();
15442 +}
15443 +
15444 +void
15445 +cleanup_module(void)
15446 +{
15447 + i2c_au1550_del_bus(&pb1550_board_adapter);
15448 +}
15449 Index: linux-2.4.35.4/drivers/i2c/i2c-core.c
15450 ===================================================================
15451 --- linux-2.4.35.4.orig/drivers/i2c/i2c-core.c 2007-12-15 05:19:43.922924062 +0100
15452 +++ linux-2.4.35.4/drivers/i2c/i2c-core.c 2007-12-15 05:19:44.938981966 +0100
15453 @@ -1277,6 +1277,9 @@
15454 #ifdef CONFIG_I2C_MAX1617
15455 extern int i2c_max1617_init(void);
15456 #endif
15457 +#ifdef CONFIG_I2C_ALGO_AU1550
15458 + extern int i2c_pb1550_init(void);
15459 +#endif
15460
15461 #ifdef CONFIG_I2C_PROC
15462 extern int sensors_init(void);
15463 @@ -1332,6 +1335,10 @@
15464 i2c_max1617_init();
15465 #endif
15466
15467 +#ifdef CONFIG_I2C_ALGO_AU1550
15468 + i2c_pb1550_init();
15469 +#endif
15470 +
15471 /* -------------- proc interface ---- */
15472 #ifdef CONFIG_I2C_PROC
15473 sensors_init();
15474 Index: linux-2.4.35.4/drivers/i2c/Makefile
15475 ===================================================================
15476 --- linux-2.4.35.4.orig/drivers/i2c/Makefile 2007-12-15 05:19:43.930924518 +0100
15477 +++ linux-2.4.35.4/drivers/i2c/Makefile 2007-12-15 05:19:44.942982192 +0100
15478 @@ -6,7 +6,7 @@
15479
15480 export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
15481 i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
15482 - i2c-proc.o
15483 + i2c-algo-au1550.o i2c-proc.o i2c-au1550.o
15484
15485 obj-$(CONFIG_I2C) += i2c-core.o
15486 obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
15487 @@ -25,6 +25,7 @@
15488 obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o
15489 obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o
15490 obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
15491 +obj-$(CONFIG_I2C_ALGO_AU1550) += i2c-algo-au1550.o i2c-au1550.o
15492
15493 # This is needed for automatic patch generation: sensors code starts here
15494 # This is needed for automatic patch generation: sensors code ends here
15495 Index: linux-2.4.35.4/drivers/media/video/indycam.c
15496 ===================================================================
15497 --- linux-2.4.35.4.orig/drivers/media/video/indycam.c 2007-12-15 05:19:43.934924747 +0100
15498 +++ linux-2.4.35.4/drivers/media/video/indycam.c 2007-12-15 05:19:44.942982192 +0100
15499 @@ -50,13 +50,14 @@
15500 0x80, /* INDYCAM_GAMMA */
15501 };
15502
15503 - int err = 0;
15504 struct indycam *camera;
15505 struct i2c_client *client;
15506 + int err = 0;
15507
15508 client = kmalloc(sizeof(*client), GFP_KERNEL);
15509 - if (!client)
15510 + if (!client)
15511 return -ENOMEM;
15512 +
15513 camera = kmalloc(sizeof(*camera), GFP_KERNEL);
15514 if (!camera) {
15515 err = -ENOMEM;
15516 @@ -67,7 +68,7 @@
15517 client->adapter = adap;
15518 client->addr = addr;
15519 client->driver = &i2c_driver_indycam;
15520 - strcpy(client->name, "IndyCam client");
15521 + strcpy(client->name, "IndyCam client");
15522 camera->client = client;
15523
15524 err = i2c_attach_client(client);
15525 @@ -75,18 +76,18 @@
15526 goto out_free_camera;
15527
15528 camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
15529 - if (camera->version != CAMERA_VERSION_INDY &&
15530 - camera->version != CAMERA_VERSION_MOOSE) {
15531 + if ((camera->version != CAMERA_VERSION_INDY) &&
15532 + (camera->version != CAMERA_VERSION_MOOSE)) {
15533 err = -ENODEV;
15534 goto out_detach_client;
15535 }
15536 - printk(KERN_INFO "Indycam v%d.%d detected.\n",
15537 + printk(KERN_INFO "IndyCam v%d.%d detected.\n",
15538 INDYCAM_VERSION_MAJOR(camera->version),
15539 INDYCAM_VERSION_MINOR(camera->version));
15540
15541 err = i2c_master_send(client, initseq, sizeof(initseq));
15542 if (err)
15543 - printk(KERN_INFO "IndyCam initalization failed\n");
15544 + printk(KERN_ERR "IndyCam initalization failed.\n");
15545
15546 MOD_INC_USE_COUNT;
15547 return 0;
15548 Index: linux-2.4.35.4/drivers/media/video/vino.c
15549 ===================================================================
15550 --- linux-2.4.35.4.orig/drivers/media/video/vino.c 2007-12-15 05:19:43.946925431 +0100
15551 +++ linux-2.4.35.4/drivers/media/video/vino.c 2007-12-15 05:19:44.950982647 +0100
15552 @@ -5,6 +5,8 @@
15553 * License version 2 as published by the Free Software Foundation.
15554 *
15555 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
15556 + * Copyright (C) 2004 Mikael Nousiainen <tmnousia@cc.hut.fi>
15557 + *
15558 */
15559
15560 #include <linux/module.h>
15561 @@ -37,13 +39,23 @@
15562 #define DEBUG(x...)
15563 #endif
15564
15565 +/* Channels (who could have guessed) */
15566 +#define VINO_CHAN_NONE 0
15567 +#define VINO_CHAN_A 1
15568 +#define VINO_CHAN_B 2
15569 +
15570 /* VINO video size */
15571 #define VINO_PAL_WIDTH 768
15572 #define VINO_PAL_HEIGHT 576
15573 #define VINO_NTSC_WIDTH 646
15574 #define VINO_NTSC_HEIGHT 486
15575
15576 -/* set this to some sensible values. note: VINO_MIN_WIDTH has to be 8*x */
15577 +/* Minimum value for Y-clipping (for smaller values the images
15578 + * will be corrupted) */
15579 +#define VINO_MIN_Y_CLIPPING 2
15580 +
15581 +/* Set these to some sensible values.
15582 + * Note: the picture width has to be divisible by 8 */
15583 #define VINO_MIN_WIDTH 32
15584 #define VINO_MIN_HEIGHT 32
15585
15586 @@ -64,9 +76,7 @@
15587
15588 struct vino_device {
15589 struct video_device vdev;
15590 -#define VINO_CHAN_A 1
15591 -#define VINO_CHAN_B 2
15592 - int chan;
15593 + int chan; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
15594 int alpha;
15595 /* clipping... */
15596 unsigned int left, right, top, bottom;
15597 @@ -106,7 +116,7 @@
15598
15599 struct vino_client {
15600 struct i2c_client *driver;
15601 - int owner;
15602 + int owner; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
15603 };
15604
15605 struct vino_video {
15606 @@ -362,6 +372,7 @@
15607 static int dma_setup(struct vino_device *v)
15608 {
15609 u32 ctrl, intr;
15610 + int ofs;
15611 struct sgi_vino_channel *ch;
15612
15613 ch = (v->chan == VINO_CHAN_A) ? &vino->a : &vino->b;
15614 @@ -377,14 +388,24 @@
15615 ch->line_size = v->line_size - 8;
15616 /* set the alpha register */
15617 ch->alpha = v->alpha;
15618 - /* set cliping registers */
15619 - ch->clip_start = VINO_CLIP_ODD(v->top) | VINO_CLIP_EVEN(v->top+1) |
15620 + /* Set the clipping registers, this is the constant source of fun :)
15621 + * Y clipping start has to be >= 2 and end has to be start + height/2
15622 + * The values of top and bottom are even so dividing is not a problem
15623 + *
15624 + * The docs say that clipping values for the even field should be
15625 + * odd_end + something_to_skip_vertical_blanking + some_lines and
15626 + * even_start + height/2, though the image is good this way also
15627 + *
15628 + * TODO: for analog sources (SAA7191), the clipping values are a bit
15629 + * different and that case isn't yet handled
15630 + */
15631 + ofs = VINO_MIN_Y_CLIPPING; /* Should depend on input source */
15632 + ch->clip_start = VINO_CLIP_ODD(ofs + v->top / 2) |
15633 + VINO_CLIP_EVEN(ofs + v->top / 2 + 1) |
15634 VINO_CLIP_X(v->left);
15635 - ch->clip_end = VINO_CLIP_ODD(v->bottom) | VINO_CLIP_EVEN(v->bottom+1) |
15636 + ch->clip_end = VINO_CLIP_ODD(ofs + v->bottom / 2 - 1) |
15637 + VINO_CLIP_EVEN(ofs + v->bottom / 2) |
15638 VINO_CLIP_X(v->right);
15639 - /* FIXME: end-of-field bug workaround
15640 - VINO_CLIP_X(VINO_PAL_WIDTH);
15641 - */
15642 /* init the frame rate and norm (full frame rate only for now...) */
15643 ch->frame_rate = VINO_FRAMERT_RT(0x1fff) |
15644 (get_capture_norm(v) == VIDEO_MODE_PAL ?
15645 @@ -510,6 +531,7 @@
15646 static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
15647 {
15648 u32 intr, ctrl;
15649 + int a_eof, b_eof;
15650
15651 spin_lock(&Vino->vino_lock);
15652 ctrl = vino->control;
15653 @@ -525,12 +547,14 @@
15654 vino->control = ctrl;
15655 clear_eod(&Vino->chB);
15656 }
15657 + a_eof = intr & VINO_INTSTAT_A_EOF;
15658 + b_eof = intr & VINO_INTSTAT_B_EOF;
15659 vino->intr_status = ~intr;
15660 spin_unlock(&Vino->vino_lock);
15661 - /* FIXME: For now we are assuming that interrupt means that frame is
15662 - * done. That's not true, but we can live with such brokeness for
15663 - * a while ;-) */
15664 - field_done(&Vino->chA);
15665 + if (a_eof)
15666 + field_done(&Vino->chA);
15667 + if (b_eof)
15668 + field_done(&Vino->chB);
15669 }
15670
15671 static int vino_grab(struct vino_device *v, int frame)
15672 Index: linux-2.4.35.4/drivers/mtd/devices/docprobe.c
15673 ===================================================================
15674 --- linux-2.4.35.4.orig/drivers/mtd/devices/docprobe.c 2007-12-15 05:19:43.954925886 +0100
15675 +++ linux-2.4.35.4/drivers/mtd/devices/docprobe.c 2007-12-15 05:19:44.950982647 +0100
15676 @@ -89,10 +89,10 @@
15677 0xe4000000,
15678 #elif defined(CONFIG_MOMENCO_OCELOT)
15679 0x2f000000,
15680 - 0xff000000,
15681 + 0xff000000,
15682 #elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
15683 - 0xff000000,
15684 -##else
15685 + 0xff000000,
15686 +#else
15687 #warning Unknown architecture for DiskOnChip. No default probe locations defined
15688 #endif
15689 0 };
15690 Index: linux-2.4.35.4/drivers/mtd/devices/ms02-nv.c
15691 ===================================================================
15692 --- linux-2.4.35.4.orig/drivers/mtd/devices/ms02-nv.c 2007-12-15 05:19:43.958926116 +0100
15693 +++ linux-2.4.35.4/drivers/mtd/devices/ms02-nv.c 2007-12-15 05:19:44.950982647 +0100
15694 @@ -1,10 +1,10 @@
15695 /*
15696 - * Copyright (c) 2001 Maciej W. Rozycki
15697 + * Copyright (c) 2001 Maciej W. Rozycki
15698 *
15699 - * This program is free software; you can redistribute it and/or
15700 - * modify it under the terms of the GNU General Public License
15701 - * as published by the Free Software Foundation; either version
15702 - * 2 of the License, or (at your option) any later version.
15703 + * This program is free software; you can redistribute it and/or
15704 + * modify it under the terms of the GNU General Public License
15705 + * as published by the Free Software Foundation; either version
15706 + * 2 of the License, or (at your option) any later version.
15707 *
15708 * $Id: ms02-nv.c,v 1.2 2003/01/24 14:05:17 dwmw2 Exp $
15709 */
15710 @@ -29,18 +29,18 @@
15711
15712
15713 static char version[] __initdata =
15714 - "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
15715 + "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
15716
15717 -MODULE_AUTHOR("Maciej W. Rozycki <macro@ds2.pg.gda.pl>");
15718 +MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
15719 MODULE_DESCRIPTION("DEC MS02-NV NVRAM module driver");
15720 MODULE_LICENSE("GPL");
15721
15722
15723 /*
15724 * Addresses we probe for an MS02-NV at. Modules may be located
15725 - * at any 8MB boundary within a 0MB up to 112MB range or at any 32MB
15726 - * boundary within a 0MB up to 448MB range. We don't support a module
15727 - * at 0MB, though.
15728 + * at any 8MiB boundary within a 0MiB up to 112MiB range or at any 32MiB
15729 + * boundary within a 0MiB up to 448MiB range. We don't support a module
15730 + * at 0MiB, though.
15731 */
15732 static ulong ms02nv_addrs[] __initdata = {
15733 0x07000000, 0x06800000, 0x06000000, 0x05800000, 0x05000000,
15734 @@ -130,7 +130,7 @@
15735
15736 int ret = -ENODEV;
15737
15738 - /* The module decodes 8MB of address space. */
15739 + /* The module decodes 8MiB of address space. */
15740 mod_res = kmalloc(sizeof(*mod_res), GFP_KERNEL);
15741 if (!mod_res)
15742 return -ENOMEM;
15743 @@ -233,7 +233,7 @@
15744 goto err_out_csr_res;
15745 }
15746
15747 - printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMB.\n",
15748 + printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
15749 mtd->index, ms02nv_name, addr, size >> 20);
15750
15751 mp->next = root_ms02nv_mtd;
15752 @@ -293,12 +293,12 @@
15753
15754 switch (mips_machtype) {
15755 case MACH_DS5000_200:
15756 - csr = (volatile u32 *)KN02_CSR_ADDR;
15757 + csr = (volatile u32 *)KN02_CSR_BASE;
15758 if (*csr & KN02_CSR_BNK32M)
15759 stride = 2;
15760 break;
15761 case MACH_DS5000_2X0:
15762 - case MACH_DS5000:
15763 + case MACH_DS5900:
15764 csr = (volatile u32 *)KN03_MCR_BASE;
15765 if (*csr & KN03_MCR_BNK32M)
15766 stride = 2;
15767 Index: linux-2.4.35.4/drivers/mtd/devices/ms02-nv.h
15768 ===================================================================
15769 --- linux-2.4.35.4.orig/drivers/mtd/devices/ms02-nv.h 2007-12-15 05:19:43.966926571 +0100
15770 +++ linux-2.4.35.4/drivers/mtd/devices/ms02-nv.h 2007-12-15 05:19:44.950982647 +0100
15771 @@ -1,32 +1,96 @@
15772 /*
15773 - * Copyright (c) 2001 Maciej W. Rozycki
15774 + * Copyright (c) 2001, 2003 Maciej W. Rozycki
15775 *
15776 - * This program is free software; you can redistribute it and/or
15777 - * modify it under the terms of the GNU General Public License
15778 - * as published by the Free Software Foundation; either version
15779 - * 2 of the License, or (at your option) any later version.
15780 + * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
15781 + * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
15782 + * systems.
15783 + *
15784 + * This program is free software; you can redistribute it and/or
15785 + * modify it under the terms of the GNU General Public License
15786 + * as published by the Free Software Foundation; either version
15787 + * 2 of the License, or (at your option) any later version.
15788 + *
15789 + * $Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
15790 */
15791
15792 #include <linux/ioport.h>
15793 #include <linux/mtd/mtd.h>
15794
15795 +/*
15796 + * Addresses are decoded as follows:
15797 + *
15798 + * 0x000000 - 0x3fffff SRAM
15799 + * 0x400000 - 0x7fffff CSR
15800 + *
15801 + * Within the SRAM area the following ranges are forced by the system
15802 + * firmware:
15803 + *
15804 + * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
15805 + * 0x000400 - ENDofRAM storage area, available to operating systems
15806 + *
15807 + * but we can't really use the available area right from 0x000400 as
15808 + * the first word is used by the firmware as a status flag passed
15809 + * from an operating system. If anything but the valid data magic
15810 + * ID value is found, the firmware considers the SRAM clean, i.e.
15811 + * containing no valid data, and disables the battery resulting in
15812 + * data being erased as soon as power is switched off. So the choice
15813 + * for the start address of the user-available is 0x001000 which is
15814 + * nicely page aligned. The area between 0x000404 and 0x000fff may
15815 + * be used by the driver for own needs.
15816 + *
15817 + * The diagnostic area defines two status words to be read by an
15818 + * operating system, a magic ID to distinguish a MS02-NV board from
15819 + * anything else and a status information providing results of tests
15820 + * as well as the size of SRAM available, which can be 1MiB or 2MiB
15821 + * (that's what the firmware handles; no idea if 2MiB modules ever
15822 + * existed).
15823 + *
15824 + * The firmware only handles the MS02-NV board if installed in the
15825 + * last (15th) slot, so for any other location the status information
15826 + * stored in the SRAM cannot be relied upon. But from the hardware
15827 + * point of view there is no problem using up to 14 such boards in a
15828 + * system -- only the 1st slot needs to be filled with a DRAM module.
15829 + * The MS02-NV board is ECC-protected, like other MS02 memory boards.
15830 + *
15831 + * The state of the battery as provided by the CSR is reflected on
15832 + * the two onboard LEDs. When facing the battery side of the board,
15833 + * with the LEDs at the top left and the battery at the bottom right
15834 + * (i.e. looking from the back side of the system box), their meaning
15835 + * is as follows (the system has to be powered on):
15836 + *
15837 + * left LED battery disable status: lit = enabled
15838 + * right LED battery condition status: lit = OK
15839 + */
15840 +
15841 /* MS02-NV iomem register offsets. */
15842 #define MS02NV_CSR 0x400000 /* control & status register */
15843
15844 +/* MS02-NV CSR status bits. */
15845 +#define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
15846 +#define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
15847 +
15848 +
15849 /* MS02-NV memory offsets. */
15850 #define MS02NV_DIAG 0x0003f8 /* diagnostic status */
15851 #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */
15852 -#define MS02NV_RAM 0x000400 /* general-purpose RAM start */
15853 +#define MS02NV_VALID 0x000400 /* valid data magic ID */
15854 +#define MS02NV_RAM 0x001000 /* user-exposed RAM start */
15855
15856 -/* MS02-NV diagnostic status constants. */
15857 -#define MS02NV_DIAG_SIZE_MASK 0xf0 /* RAM size mask */
15858 -#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* RAM size shift (left) */
15859 +/* MS02-NV diagnostic status bits. */
15860 +#define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */
15861 +#define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */
15862 +#define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */
15863 +#define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */
15864 +#define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */
15865 +#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */
15866
15867 /* MS02-NV general constants. */
15868 #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */
15869 +#define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */
15870 #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space
15871 decoded by the module */
15872
15873 +
15874 typedef volatile u32 ms02nv_uint;
15875
15876 struct ms02nv_private {
15877 Index: linux-2.4.35.4/drivers/mtd/maps/Config.in
15878 ===================================================================
15879 --- linux-2.4.35.4.orig/drivers/mtd/maps/Config.in 2007-12-15 05:19:43.974927026 +0100
15880 +++ linux-2.4.35.4/drivers/mtd/maps/Config.in 2007-12-15 05:19:44.950982647 +0100
15881 @@ -51,11 +51,26 @@
15882 dep_tristate ' Pb1000 MTD support' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
15883 dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
15884 dep_tristate ' Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100
15885 + dep_tristate ' Bosporus MTD support' CONFIG_MTD_BOSPORUS $CONFIG_MIPS_BOSPORUS
15886 + dep_tristate ' XXS1500 boot flash device' CONFIG_MTD_XXS1500 $CONFIG_MIPS_XXS1500
15887 + dep_tristate ' MTX-1 flash device' CONFIG_MTD_MTX1 $CONFIG_MIPS_MTX1
15888 if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \
15889 -o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then
15890 bool ' Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT
15891 bool ' Pb[15]00 user flash device (2nd 32MiB bank)' CONFIG_MTD_PB1500_USER
15892 fi
15893 + tristate ' Db1x00 MTD support' CONFIG_MTD_DB1X00
15894 + if [ "$CONFIG_MTD_DB1X00" = "y" -o "$CONFIG_MTD_DB1X00" = "m" ]; then
15895 + bool ' Db1x00 boot flash device' CONFIG_MTD_DB1X00_BOOT
15896 + bool ' Db1x00 user flash device (2nd bank)' CONFIG_MTD_DB1X00_USER
15897 + fi
15898 + tristate ' Pb1550 MTD support' CONFIG_MTD_PB1550
15899 + if [ "$CONFIG_MTD_PB1550" = "y" -o "$CONFIG_MTD_PB1550" = "m" ]; then
15900 + bool ' Pb1550 Boot Flash' CONFIG_MTD_PB1550_BOOT
15901 + bool ' Pb1550 User Parameter Flash' CONFIG_MTD_PB1550_USER
15902 + fi
15903 + dep_tristate ' Hydrogen 3 MTD support' CONFIG_MTD_HYDROGEN3 $CONFIG_MIPS_HYDROGEN3
15904 + dep_tristate ' Mirage MTD support' CONFIG_MTD_MIRAGE $CONFIG_MIPS_MIRAGE
15905 dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS
15906 if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
15907 hex ' Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
15908 Index: linux-2.4.35.4/drivers/mtd/maps/db1x00-flash.c
15909 ===================================================================
15910 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
15911 +++ linux-2.4.35.4/drivers/mtd/maps/db1x00-flash.c 2007-12-15 05:19:44.950982647 +0100
15912 @@ -0,0 +1,283 @@
15913 +/*
15914 + * Flash memory access on Alchemy Db1xxx boards
15915 + *
15916 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
15917 + *
15918 + */
15919 +
15920 +#include <linux/config.h>
15921 +#include <linux/module.h>
15922 +#include <linux/types.h>
15923 +#include <linux/kernel.h>
15924 +
15925 +#include <linux/mtd/mtd.h>
15926 +#include <linux/mtd/map.h>
15927 +#include <linux/mtd/partitions.h>
15928 +
15929 +#include <asm/io.h>
15930 +#include <asm/au1000.h>
15931 +#include <asm/db1x00.h>
15932 +
15933 +#ifdef DEBUG_RW
15934 +#define DBG(x...) printk(x)
15935 +#else
15936 +#define DBG(x...)
15937 +#endif
15938 +
15939 +static unsigned long window_addr;
15940 +static unsigned long window_size;
15941 +static unsigned long flash_size;
15942 +
15943 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
15944 +{
15945 + __u8 ret;
15946 + ret = __raw_readb(map->map_priv_1 + ofs);
15947 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15948 + return ret;
15949 +}
15950 +
15951 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
15952 +{
15953 + __u16 ret;
15954 + ret = __raw_readw(map->map_priv_1 + ofs);
15955 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15956 + return ret;
15957 +}
15958 +
15959 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
15960 +{
15961 + __u32 ret;
15962 + ret = __raw_readl(map->map_priv_1 + ofs);
15963 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15964 + return ret;
15965 +}
15966 +
15967 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
15968 +{
15969 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
15970 + memcpy_fromio(to, map->map_priv_1 + from, len);
15971 +}
15972 +
15973 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
15974 +{
15975 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15976 + __raw_writeb(d, map->map_priv_1 + adr);
15977 + mb();
15978 +}
15979 +
15980 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
15981 +{
15982 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15983 + __raw_writew(d, map->map_priv_1 + adr);
15984 + mb();
15985 +}
15986 +
15987 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
15988 +{
15989 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15990 + __raw_writel(d, map->map_priv_1 + adr);
15991 + mb();
15992 +}
15993 +
15994 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
15995 +{
15996 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
15997 + memcpy_toio(map->map_priv_1 + to, from, len);
15998 +}
15999 +
16000 +static struct map_info db1x00_map = {
16001 + name: "Db1x00 flash",
16002 + read8: physmap_read8,
16003 + read16: physmap_read16,
16004 + read32: physmap_read32,
16005 + copy_from: physmap_copy_from,
16006 + write8: physmap_write8,
16007 + write16: physmap_write16,
16008 + write32: physmap_write32,
16009 + copy_to: physmap_copy_to,
16010 +};
16011 +
16012 +static unsigned char flash_buswidth = 4;
16013 +
16014 +/*
16015 + * The Db1x boards support different flash densities. We setup
16016 + * the mtd_partition structures below for default of 64Mbit
16017 + * flash densities, and override the partitions sizes, if
16018 + * necessary, after we check the board status register.
16019 + */
16020 +
16021 +#ifdef DB1X00_BOTH_BANKS
16022 +/* both banks will be used. Combine the first bank and the first
16023 + * part of the second bank together into a single jffs/jffs2
16024 + * partition.
16025 + */
16026 +static struct mtd_partition db1x00_partitions[] = {
16027 + {
16028 + name: "User FS",
16029 + size: 0x1c00000,
16030 + offset: 0x0000000
16031 + },{
16032 + name: "yamon",
16033 + size: 0x0100000,
16034 + offset: MTDPART_OFS_APPEND,
16035 + mask_flags: MTD_WRITEABLE
16036 + },{
16037 + name: "raw kernel",
16038 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16039 + offset: MTDPART_OFS_APPEND,
16040 + }
16041 +};
16042 +#elif defined(DB1X00_BOOT_ONLY)
16043 +static struct mtd_partition db1x00_partitions[] = {
16044 + {
16045 + name: "User FS",
16046 + size: 0x00c00000,
16047 + offset: 0x0000000
16048 + },{
16049 + name: "yamon",
16050 + size: 0x0100000,
16051 + offset: MTDPART_OFS_APPEND,
16052 + mask_flags: MTD_WRITEABLE
16053 + },{
16054 + name: "raw kernel",
16055 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16056 + offset: MTDPART_OFS_APPEND,
16057 + }
16058 +};
16059 +#elif defined(DB1X00_USER_ONLY)
16060 +static struct mtd_partition db1x00_partitions[] = {
16061 + {
16062 + name: "User FS",
16063 + size: 0x0e00000,
16064 + offset: 0x0000000
16065 + },{
16066 + name: "raw kernel",
16067 + size: MTDPART_SIZ_FULL,
16068 + offset: MTDPART_OFS_APPEND,
16069 + }
16070 +};
16071 +#else
16072 +#error MTD_DB1X00 define combo error /* should never happen */
16073 +#endif
16074 +
16075 +
16076 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16077 +
16078 +static struct mtd_partition *parsed_parts;
16079 +static struct mtd_info *mymtd;
16080 +
16081 +/*
16082 + * Probe the flash density and setup window address and size
16083 + * based on user CONFIG options. There are times when we don't
16084 + * want the MTD driver to be probing the boot or user flash,
16085 + * so having the option to enable only one bank is important.
16086 + */
16087 +int setup_flash_params()
16088 +{
16089 + switch ((bcsr->status >> 14) & 0x3) {
16090 + case 0: /* 64Mbit devices */
16091 + flash_size = 0x800000; /* 8MB per part */
16092 +#if defined(DB1X00_BOTH_BANKS)
16093 + window_addr = 0x1E000000;
16094 + window_size = 0x2000000;
16095 +#elif defined(DB1X00_BOOT_ONLY)
16096 + window_addr = 0x1F000000;
16097 + window_size = 0x1000000;
16098 +#else /* USER ONLY */
16099 + window_addr = 0x1E000000;
16100 + window_size = 0x1000000;
16101 +#endif
16102 + break;
16103 + case 1:
16104 + /* 128 Mbit devices */
16105 + flash_size = 0x1000000; /* 16MB per part */
16106 +#if defined(DB1X00_BOTH_BANKS)
16107 + window_addr = 0x1C000000;
16108 + window_size = 0x4000000;
16109 + /* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
16110 + db1x00_partitions[0].size = 0x3C00000;
16111 +#elif defined(DB1X00_BOOT_ONLY)
16112 + window_addr = 0x1E000000;
16113 + window_size = 0x2000000;
16114 + /* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
16115 + db1x00_partitions[0].size = 0x1C00000;
16116 +#else /* USER ONLY */
16117 + window_addr = 0x1C000000;
16118 + window_size = 0x2000000;
16119 + /* USERFS from 0x1C00 0000 to 0x1DE00000 */
16120 + db1x00_partitions[0].size = 0x1DE0000;
16121 +#endif
16122 + break;
16123 + case 2:
16124 + /* 256 Mbit devices */
16125 + flash_size = 0x4000000; /* 64MB per part */
16126 +#if defined(DB1X00_BOTH_BANKS)
16127 + return 1;
16128 +#elif defined(DB1X00_BOOT_ONLY)
16129 + /* Boot ROM flash bank only; no user bank */
16130 + window_addr = 0x1C000000;
16131 + window_size = 0x4000000;
16132 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
16133 + db1x00_partitions[0].size = 0x3C00000;
16134 +#else /* USER ONLY */
16135 + return 1;
16136 +#endif
16137 + break;
16138 + default:
16139 + return 1;
16140 + }
16141 + return 0;
16142 +}
16143 +
16144 +int __init db1x00_mtd_init(void)
16145 +{
16146 + struct mtd_partition *parts;
16147 + int nb_parts = 0;
16148 + char *part_type;
16149 +
16150 + /* Default flash buswidth */
16151 + db1x00_map.buswidth = flash_buswidth;
16152 +
16153 + if (setup_flash_params())
16154 + return -ENXIO;
16155 +
16156 + /*
16157 + * Static partition definition selection
16158 + */
16159 + part_type = "static";
16160 + parts = db1x00_partitions;
16161 + nb_parts = NB_OF(db1x00_partitions);
16162 + db1x00_map.size = window_size;
16163 +
16164 + /*
16165 + * Now let's probe for the actual flash. Do it here since
16166 + * specific machine settings might have been set above.
16167 + */
16168 + printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n",
16169 + db1x00_map.buswidth*8);
16170 + db1x00_map.map_priv_1 =
16171 + (unsigned long)ioremap(window_addr, window_size);
16172 + mymtd = do_map_probe("cfi_probe", &db1x00_map);
16173 + if (!mymtd) return -ENXIO;
16174 + mymtd->module = THIS_MODULE;
16175 +
16176 + add_mtd_partitions(mymtd, parts, nb_parts);
16177 + return 0;
16178 +}
16179 +
16180 +static void __exit db1x00_mtd_cleanup(void)
16181 +{
16182 + if (mymtd) {
16183 + del_mtd_partitions(mymtd);
16184 + map_destroy(mymtd);
16185 + if (parsed_parts)
16186 + kfree(parsed_parts);
16187 + }
16188 +}
16189 +
16190 +module_init(db1x00_mtd_init);
16191 +module_exit(db1x00_mtd_cleanup);
16192 +
16193 +MODULE_AUTHOR("Pete Popov");
16194 +MODULE_DESCRIPTION("Db1x00 mtd map driver");
16195 +MODULE_LICENSE("GPL");
16196 Index: linux-2.4.35.4/drivers/mtd/maps/hydrogen3-flash.c
16197 ===================================================================
16198 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
16199 +++ linux-2.4.35.4/drivers/mtd/maps/hydrogen3-flash.c 2007-12-15 05:19:44.954982876 +0100
16200 @@ -0,0 +1,189 @@
16201 +/*
16202 + * Flash memory access on Alchemy HydrogenIII boards
16203 + *
16204 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16205 + *
16206 + */
16207 +
16208 +#include <linux/config.h>
16209 +#include <linux/module.h>
16210 +#include <linux/types.h>
16211 +#include <linux/kernel.h>
16212 +
16213 +#include <linux/mtd/mtd.h>
16214 +#include <linux/mtd/map.h>
16215 +#include <linux/mtd/partitions.h>
16216 +
16217 +#include <asm/io.h>
16218 +#include <asm/au1000.h>
16219 +
16220 +#ifdef DEBUG_RW
16221 +#define DBG(x...) printk(x)
16222 +#else
16223 +#define DBG(x...)
16224 +#endif
16225 +
16226 +#define WINDOW_ADDR 0x1E000000
16227 +#define WINDOW_SIZE 0x02000000
16228 +
16229 +
16230 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16231 +{
16232 + __u8 ret;
16233 + ret = __raw_readb(map->map_priv_1 + ofs);
16234 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16235 + return ret;
16236 +}
16237 +
16238 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16239 +{
16240 + __u16 ret;
16241 + ret = __raw_readw(map->map_priv_1 + ofs);
16242 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16243 + return ret;
16244 +}
16245 +
16246 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16247 +{
16248 + __u32 ret;
16249 + ret = __raw_readl(map->map_priv_1 + ofs);
16250 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16251 + return ret;
16252 +}
16253 +
16254 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16255 +{
16256 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16257 + memcpy_fromio(to, map->map_priv_1 + from, len);
16258 +}
16259 +
16260 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16261 +{
16262 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16263 + __raw_writeb(d, map->map_priv_1 + adr);
16264 + mb();
16265 +}
16266 +
16267 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16268 +{
16269 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16270 + __raw_writew(d, map->map_priv_1 + adr);
16271 + mb();
16272 +}
16273 +
16274 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16275 +{
16276 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16277 + __raw_writel(d, map->map_priv_1 + adr);
16278 + mb();
16279 +}
16280 +
16281 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16282 +{
16283 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16284 + memcpy_toio(map->map_priv_1 + to, from, len);
16285 +}
16286 +
16287 +static struct map_info hydrogen3_map = {
16288 + name: "HydrogenIII flash",
16289 + read8: physmap_read8,
16290 + read16: physmap_read16,
16291 + read32: physmap_read32,
16292 + copy_from: physmap_copy_from,
16293 + write8: physmap_write8,
16294 + write16: physmap_write16,
16295 + write32: physmap_write32,
16296 + copy_to: physmap_copy_to,
16297 +};
16298 +
16299 +static unsigned char flash_buswidth = 4;
16300 +
16301 +/* MTDPART_OFS_APPEND is vastly preferred to any attempt at statically lining
16302 + * up the offsets. */
16303 +static struct mtd_partition hydrogen3_partitions[] = {
16304 + {
16305 + name: "User FS",
16306 + size: 0x1c00000,
16307 + offset: 0x0000000
16308 + },{
16309 + name: "yamon",
16310 + size: 0x0100000,
16311 + offset: MTDPART_OFS_APPEND,
16312 + mask_flags: MTD_WRITEABLE
16313 + },{
16314 + name: "raw kernel",
16315 + size: 0x02c0000,
16316 + offset: MTDPART_OFS_APPEND
16317 + }
16318 +};
16319 +
16320 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16321 +
16322 +static struct mtd_partition *parsed_parts;
16323 +static struct mtd_info *mymtd;
16324 +
16325 +int __init hydrogen3_mtd_init(void)
16326 +{
16327 + struct mtd_partition *parts;
16328 + int nb_parts = 0;
16329 + char *part_type;
16330 +
16331 + /* Default flash buswidth */
16332 + hydrogen3_map.buswidth = flash_buswidth;
16333 +
16334 + /*
16335 + * Static partition definition selection
16336 + */
16337 + part_type = "static";
16338 + parts = hydrogen3_partitions;
16339 + nb_parts = NB_OF(hydrogen3_partitions);
16340 + hydrogen3_map.size = WINDOW_SIZE;
16341 +
16342 + /*
16343 + * Now let's probe for the actual flash. Do it here since
16344 + * specific machine settings might have been set above.
16345 + */
16346 + printk(KERN_NOTICE "HydrogenIII flash: probing %d-bit flash bus\n",
16347 + hydrogen3_map.buswidth*8);
16348 + hydrogen3_map.map_priv_1 =
16349 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
16350 + mymtd = do_map_probe("cfi_probe", &hydrogen3_map);
16351 + if (!mymtd) return -ENXIO;
16352 + mymtd->module = THIS_MODULE;
16353 +
16354 + add_mtd_partitions(mymtd, parts, nb_parts);
16355 + return 0;
16356 +}
16357 +
16358 +static void __exit hydrogen3_mtd_cleanup(void)
16359 +{
16360 + if (mymtd) {
16361 + del_mtd_partitions(mymtd);
16362 + map_destroy(mymtd);
16363 + if (parsed_parts)
16364 + kfree(parsed_parts);
16365 + }
16366 +}
16367 +
16368 +/*#ifndef MODULE
16369 +
16370 +static int __init _bootflashonly(char *str)
16371 +{
16372 + bootflashonly = simple_strtol(str, NULL, 0);
16373 + return 1;
16374 +}
16375 +
16376 +
16377 +__setup("bootflashonly=", _bootflashonly);
16378 +
16379 +#endif*/
16380 +
16381 +
16382 +module_init(hydrogen3_mtd_init);
16383 +module_exit(hydrogen3_mtd_cleanup);
16384 +
16385 +MODULE_PARM(bootflashonly, "i");
16386 +MODULE_PARM_DESC(bootflashonly, "1=use \"boot flash only\"");
16387 +MODULE_AUTHOR("Pete Popov");
16388 +MODULE_DESCRIPTION("HydrogenIII mtd map driver");
16389 +MODULE_LICENSE("GPL");
16390 Index: linux-2.4.35.4/drivers/mtd/maps/lasat.c
16391 ===================================================================
16392 --- linux-2.4.35.4.orig/drivers/mtd/maps/lasat.c 2007-12-15 05:19:43.994928166 +0100
16393 +++ linux-2.4.35.4/drivers/mtd/maps/lasat.c 2007-12-15 05:19:44.954982876 +0100
16394 @@ -1,15 +1,6 @@
16395 /*
16396 * Flash device on lasat 100 and 200 boards
16397 *
16398 - * Presumably (C) 2002 Brian Murphy <brian@murphy.dk> or whoever he
16399 - * works for.
16400 - *
16401 - * This program is free software; you can redistribute it and/or
16402 - * modify it under the terms of the GNU General Public License version
16403 - * 2 as published by the Free Software Foundation.
16404 - *
16405 - * $Id: lasat.c,v 1.1 2003/01/24 14:26:38 dwmw2 Exp $
16406 - *
16407 */
16408
16409 #include <linux/module.h>
16410 @@ -21,7 +12,6 @@
16411 #include <linux/mtd/partitions.h>
16412 #include <linux/config.h>
16413 #include <asm/lasat/lasat.h>
16414 -#include <asm/lasat/lasat_mtd.h>
16415
16416 static struct mtd_info *mymtd;
16417
16418 @@ -69,30 +59,33 @@
16419 }
16420
16421 static struct map_info sp_map = {
16422 - .name = "SP flash",
16423 - .buswidth = 4,
16424 - .read8 = sp_read8,
16425 - .read16 = sp_read16,
16426 - .read32 = sp_read32,
16427 - .copy_from = sp_copy_from,
16428 - .write8 = sp_write8,
16429 - .write16 = sp_write16,
16430 - .write32 = sp_write32,
16431 - .copy_to = sp_copy_to
16432 + name: "SP flash",
16433 + buswidth: 4,
16434 + read8: sp_read8,
16435 + read16: sp_read16,
16436 + read32: sp_read32,
16437 + copy_from: sp_copy_from,
16438 + write8: sp_write8,
16439 + write16: sp_write16,
16440 + write32: sp_write32,
16441 + copy_to: sp_copy_to
16442 };
16443
16444 static struct mtd_partition partition_info[LASAT_MTD_LAST];
16445 -static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
16446 +static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
16447
16448 static int __init init_sp(void)
16449 {
16450 int i;
16451 + int nparts = 0;
16452 /* this does not play well with the old flash code which
16453 * protects and uprotects the flash when necessary */
16454 printk(KERN_NOTICE "Unprotecting flash\n");
16455 *lasat_misc->flash_wp_reg |= 1 << lasat_misc->flash_wp_bit;
16456
16457 - sp_map.map_priv_1 = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
16458 + sp_map.map_priv_1 = ioremap_nocache(
16459 + lasat_flash_partition_start(LASAT_MTD_BOOTLOADER),
16460 + lasat_board_info.li_flash_size);
16461 sp_map.size = lasat_board_info.li_flash_size;
16462
16463 printk(KERN_NOTICE "sp flash device: %lx at %lx\n",
16464 @@ -109,12 +102,15 @@
16465
16466 for (i=0; i < LASAT_MTD_LAST; i++) {
16467 size = lasat_flash_partition_size(i);
16468 - partition_info[i].size = size;
16469 - partition_info[i].offset = offset;
16470 - offset += size;
16471 + if (size != 0) {
16472 + nparts++;
16473 + partition_info[i].size = size;
16474 + partition_info[i].offset = offset;
16475 + offset += size;
16476 + }
16477 }
16478
16479 - add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
16480 + add_mtd_partitions( mymtd, partition_info, nparts );
16481 return 0;
16482 }
16483
16484 @@ -124,11 +120,11 @@
16485 static void __exit cleanup_sp(void)
16486 {
16487 if (mymtd) {
16488 - del_mtd_partitions(mymtd);
16489 - map_destroy(mymtd);
16490 + del_mtd_partitions(mymtd);
16491 + map_destroy(mymtd);
16492 }
16493 if (sp_map.map_priv_1) {
16494 - sp_map.map_priv_1 = 0;
16495 + sp_map.map_priv_1 = 0;
16496 }
16497 }
16498
16499 Index: linux-2.4.35.4/drivers/mtd/maps/Makefile
16500 ===================================================================
16501 --- linux-2.4.35.4.orig/drivers/mtd/maps/Makefile 2007-12-15 05:19:43.998928395 +0100
16502 +++ linux-2.4.35.4/drivers/mtd/maps/Makefile 2007-12-15 05:19:44.954982876 +0100
16503 @@ -52,7 +52,13 @@
16504 obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
16505 obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o
16506 obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
16507 +obj-$(CONFIG_MTD_XXS1500) += xxs1500.o
16508 +obj-$(CONFIG_MTD_MTX1) += mtx-1.o
16509 obj-$(CONFIG_MTD_LASAT) += lasat.o
16510 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
16511 +obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
16512 +obj-$(CONFIG_MTD_HYDROGEN3) += hydrogen3-flash.o
16513 +obj-$(CONFIG_MTD_BOSPORUS) += pb1xxx-flash.o
16514 obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
16515 obj-$(CONFIG_MTD_EDB7312) += edb7312.o
16516 obj-$(CONFIG_MTD_IMPA7) += impa7.o
16517 @@ -61,5 +67,6 @@
16518 obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
16519 obj-$(CONFIG_MTD_NETtel) += nettel.o
16520 obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
16521 +obj-$(CONFIG_MTD_MIRAGE) += mirage-flash.o
16522
16523 include $(TOPDIR)/Rules.make
16524 Index: linux-2.4.35.4/drivers/mtd/maps/mirage-flash.c
16525 ===================================================================
16526 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
16527 +++ linux-2.4.35.4/drivers/mtd/maps/mirage-flash.c 2007-12-15 05:19:44.954982876 +0100
16528 @@ -0,0 +1,194 @@
16529 +/*
16530 + * Flash memory access on AMD Mirage board.
16531 + *
16532 + * (C) 2003 Embedded Edge
16533 + * based on mirage-flash.c:
16534 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16535 + *
16536 + */
16537 +
16538 +#include <linux/config.h>
16539 +#include <linux/module.h>
16540 +#include <linux/types.h>
16541 +#include <linux/kernel.h>
16542 +
16543 +#include <linux/mtd/mtd.h>
16544 +#include <linux/mtd/map.h>
16545 +#include <linux/mtd/partitions.h>
16546 +
16547 +#include <asm/io.h>
16548 +#include <asm/au1000.h>
16549 +//#include <asm/mirage.h>
16550 +
16551 +#ifdef DEBUG_RW
16552 +#define DBG(x...) printk(x)
16553 +#else
16554 +#define DBG(x...)
16555 +#endif
16556 +
16557 +static unsigned long window_addr;
16558 +static unsigned long window_size;
16559 +static unsigned long flash_size;
16560 +
16561 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16562 +{
16563 + __u8 ret;
16564 + ret = __raw_readb(map->map_priv_1 + ofs);
16565 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16566 + return ret;
16567 +}
16568 +
16569 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16570 +{
16571 + __u16 ret;
16572 + ret = __raw_readw(map->map_priv_1 + ofs);
16573 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16574 + return ret;
16575 +}
16576 +
16577 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16578 +{
16579 + __u32 ret;
16580 + ret = __raw_readl(map->map_priv_1 + ofs);
16581 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16582 + return ret;
16583 +}
16584 +
16585 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16586 +{
16587 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16588 + memcpy_fromio(to, map->map_priv_1 + from, len);
16589 +}
16590 +
16591 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16592 +{
16593 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16594 + __raw_writeb(d, map->map_priv_1 + adr);
16595 + mb();
16596 +}
16597 +
16598 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16599 +{
16600 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16601 + __raw_writew(d, map->map_priv_1 + adr);
16602 + mb();
16603 +}
16604 +
16605 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16606 +{
16607 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16608 + __raw_writel(d, map->map_priv_1 + adr);
16609 + mb();
16610 +}
16611 +
16612 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16613 +{
16614 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16615 + memcpy_toio(map->map_priv_1 + to, from, len);
16616 +}
16617 +
16618 +static struct map_info mirage_map = {
16619 + name: "Mirage flash",
16620 + read8: physmap_read8,
16621 + read16: physmap_read16,
16622 + read32: physmap_read32,
16623 + copy_from: physmap_copy_from,
16624 + write8: physmap_write8,
16625 + write16: physmap_write16,
16626 + write32: physmap_write32,
16627 + copy_to: physmap_copy_to,
16628 +};
16629 +
16630 +static unsigned char flash_buswidth = 4;
16631 +
16632 +static struct mtd_partition mirage_partitions[] = {
16633 + {
16634 + name: "User FS",
16635 + size: 0x1c00000,
16636 + offset: 0x0000000
16637 + },{
16638 + name: "yamon",
16639 + size: 0x0100000,
16640 + offset: MTDPART_OFS_APPEND,
16641 + mask_flags: MTD_WRITEABLE
16642 + },{
16643 + name: "raw kernel",
16644 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16645 + offset: MTDPART_OFS_APPEND,
16646 + }
16647 +};
16648 +
16649 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16650 +
16651 +static struct mtd_partition *parsed_parts;
16652 +static struct mtd_info *mymtd;
16653 +
16654 +/*
16655 + * Probe the flash density and setup window address and size
16656 + * based on user CONFIG options. There are times when we don't
16657 + * want the MTD driver to be probing the boot or user flash,
16658 + * so having the option to enable only one bank is important.
16659 + */
16660 +int setup_flash_params()
16661 +{
16662 + flash_size = 0x4000000; /* 64MB per part */
16663 + /* Boot ROM flash bank only; no user bank */
16664 + window_addr = 0x1C000000;
16665 + window_size = 0x4000000;
16666 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
16667 + mirage_partitions[0].size = 0x3C00000;
16668 + return 0;
16669 +}
16670 +
16671 +int __init mirage_mtd_init(void)
16672 +{
16673 + struct mtd_partition *parts;
16674 + int nb_parts = 0;
16675 + char *part_type;
16676 +
16677 + /* Default flash buswidth */
16678 + mirage_map.buswidth = flash_buswidth;
16679 +
16680 + if (setup_flash_params())
16681 + return -ENXIO;
16682 +
16683 + /*
16684 + * Static partition definition selection
16685 + */
16686 + part_type = "static";
16687 + parts = mirage_partitions;
16688 + nb_parts = NB_OF(mirage_partitions);
16689 + mirage_map.size = window_size;
16690 +
16691 + /*
16692 + * Now let's probe for the actual flash. Do it here since
16693 + * specific machine settings might have been set above.
16694 + */
16695 + printk(KERN_NOTICE "Mirage flash: probing %d-bit flash bus\n",
16696 + mirage_map.buswidth*8);
16697 + mirage_map.map_priv_1 =
16698 + (unsigned long)ioremap(window_addr, window_size);
16699 + mymtd = do_map_probe("cfi_probe", &mirage_map);
16700 + if (!mymtd) return -ENXIO;
16701 + mymtd->module = THIS_MODULE;
16702 +
16703 + add_mtd_partitions(mymtd, parts, nb_parts);
16704 + return 0;
16705 +}
16706 +
16707 +static void __exit mirage_mtd_cleanup(void)
16708 +{
16709 + if (mymtd) {
16710 + del_mtd_partitions(mymtd);
16711 + map_destroy(mymtd);
16712 + if (parsed_parts)
16713 + kfree(parsed_parts);
16714 + }
16715 +}
16716 +
16717 +module_init(mirage_mtd_init);
16718 +module_exit(mirage_mtd_cleanup);
16719 +
16720 +MODULE_AUTHOR("Embedded Edge");
16721 +MODULE_DESCRIPTION("Mirage mtd map driver");
16722 +MODULE_LICENSE("GPL");
16723 Index: linux-2.4.35.4/drivers/mtd/maps/mtx-1.c
16724 ===================================================================
16725 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
16726 +++ linux-2.4.35.4/drivers/mtd/maps/mtx-1.c 2007-12-15 05:19:44.954982876 +0100
16727 @@ -0,0 +1,181 @@
16728 +/*
16729 + * Flash memory access on 4G Systems MTX-1 board
16730 + *
16731 + * (C) 2003 Pete Popov <ppopov@mvista.com>
16732 + * Bruno Randolf <bruno.randolf@4g-systems.de>
16733 + */
16734 +
16735 +#include <linux/config.h>
16736 +#include <linux/module.h>
16737 +#include <linux/types.h>
16738 +#include <linux/kernel.h>
16739 +
16740 +#include <linux/mtd/mtd.h>
16741 +#include <linux/mtd/map.h>
16742 +#include <linux/mtd/partitions.h>
16743 +
16744 +#include <asm/io.h>
16745 +#include <asm/au1000.h>
16746 +
16747 +#ifdef DEBUG_RW
16748 +#define DBG(x...) printk(x)
16749 +#else
16750 +#define DBG(x...)
16751 +#endif
16752 +
16753 +#ifdef CONFIG_MIPS_MTX1
16754 +#define WINDOW_ADDR 0x1E000000
16755 +#define WINDOW_SIZE 0x2000000
16756 +#endif
16757 +
16758 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16759 +{
16760 + __u8 ret;
16761 + ret = __raw_readb(map->map_priv_1 + ofs);
16762 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16763 + return ret;
16764 +}
16765 +
16766 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16767 +{
16768 + __u16 ret;
16769 + ret = __raw_readw(map->map_priv_1 + ofs);
16770 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16771 + return ret;
16772 +}
16773 +
16774 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16775 +{
16776 + __u32 ret;
16777 + ret = __raw_readl(map->map_priv_1 + ofs);
16778 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16779 + return ret;
16780 +}
16781 +
16782 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16783 +{
16784 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16785 + memcpy_fromio(to, map->map_priv_1 + from, len);
16786 +}
16787 +
16788 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16789 +{
16790 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16791 + __raw_writeb(d, map->map_priv_1 + adr);
16792 + mb();
16793 +}
16794 +
16795 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16796 +{
16797 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16798 + __raw_writew(d, map->map_priv_1 + adr);
16799 + mb();
16800 +}
16801 +
16802 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16803 +{
16804 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16805 + __raw_writel(d, map->map_priv_1 + adr);
16806 + mb();
16807 +}
16808 +
16809 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16810 +{
16811 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16812 + memcpy_toio(map->map_priv_1 + to, from, len);
16813 +}
16814 +
16815 +
16816 +
16817 +static struct map_info mtx1_map = {
16818 + name: "MTX-1 flash",
16819 + read8: physmap_read8,
16820 + read16: physmap_read16,
16821 + read32: physmap_read32,
16822 + copy_from: physmap_copy_from,
16823 + write8: physmap_write8,
16824 + write16: physmap_write16,
16825 + write32: physmap_write32,
16826 + copy_to: physmap_copy_to,
16827 +};
16828 +
16829 +
16830 +static unsigned long flash_size = 0x01000000;
16831 +static unsigned char flash_buswidth = 4;
16832 +static struct mtd_partition mtx1_partitions[] = {
16833 + {
16834 + name: "user fs",
16835 + size: 0x1c00000,
16836 + offset: 0,
16837 + },{
16838 + name: "yamon",
16839 + size: 0x0100000,
16840 + offset: MTDPART_OFS_APPEND,
16841 + mask_flags: MTD_WRITEABLE
16842 + },{
16843 + name: "raw kernel",
16844 + size: 0x02c0000,
16845 + offset: MTDPART_OFS_APPEND,
16846 + },{
16847 + name: "yamon env vars",
16848 + size: 0x0040000,
16849 + offset: MTDPART_OFS_APPEND,
16850 + mask_flags: MTD_WRITEABLE
16851 + }
16852 +};
16853 +
16854 +
16855 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16856 +
16857 +static struct mtd_partition *parsed_parts;
16858 +static struct mtd_info *mymtd;
16859 +
16860 +int __init mtx1_mtd_init(void)
16861 +{
16862 + struct mtd_partition *parts;
16863 + int nb_parts = 0;
16864 + char *part_type;
16865 +
16866 + /* Default flash buswidth */
16867 + mtx1_map.buswidth = flash_buswidth;
16868 +
16869 + /*
16870 + * Static partition definition selection
16871 + */
16872 + part_type = "static";
16873 + parts = mtx1_partitions;
16874 + nb_parts = NB_OF(mtx1_partitions);
16875 + mtx1_map.size = flash_size;
16876 +
16877 + /*
16878 + * Now let's probe for the actual flash. Do it here since
16879 + * specific machine settings might have been set above.
16880 + */
16881 + printk(KERN_NOTICE "MTX-1 flash: probing %d-bit flash bus\n",
16882 + mtx1_map.buswidth*8);
16883 + mtx1_map.map_priv_1 =
16884 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
16885 + mymtd = do_map_probe("cfi_probe", &mtx1_map);
16886 + if (!mymtd) return -ENXIO;
16887 + mymtd->module = THIS_MODULE;
16888 +
16889 + add_mtd_partitions(mymtd, parts, nb_parts);
16890 + return 0;
16891 +}
16892 +
16893 +static void __exit mtx1_mtd_cleanup(void)
16894 +{
16895 + if (mymtd) {
16896 + del_mtd_partitions(mymtd);
16897 + map_destroy(mymtd);
16898 + if (parsed_parts)
16899 + kfree(parsed_parts);
16900 + }
16901 +}
16902 +
16903 +module_init(mtx1_mtd_init);
16904 +module_exit(mtx1_mtd_cleanup);
16905 +
16906 +MODULE_AUTHOR("Pete Popov");
16907 +MODULE_DESCRIPTION("MTX-1 CFI map driver");
16908 +MODULE_LICENSE("GPL");
16909 Index: linux-2.4.35.4/drivers/mtd/maps/pb1550-flash.c
16910 ===================================================================
16911 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
16912 +++ linux-2.4.35.4/drivers/mtd/maps/pb1550-flash.c 2007-12-15 05:19:44.958983106 +0100
16913 @@ -0,0 +1,270 @@
16914 +/*
16915 + * Flash memory access on Alchemy Pb1550 board
16916 + *
16917 + * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
16918 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16919 + *
16920 + */
16921 +
16922 +#include <linux/config.h>
16923 +#include <linux/module.h>
16924 +#include <linux/types.h>
16925 +#include <linux/kernel.h>
16926 +
16927 +#include <linux/mtd/mtd.h>
16928 +#include <linux/mtd/map.h>
16929 +#include <linux/mtd/partitions.h>
16930 +
16931 +#include <asm/io.h>
16932 +#include <asm/au1000.h>
16933 +#include <asm/pb1550.h>
16934 +
16935 +#ifdef DEBUG_RW
16936 +#define DBG(x...) printk(x)
16937 +#else
16938 +#define DBG(x...)
16939 +#endif
16940 +
16941 +static unsigned long window_addr;
16942 +static unsigned long window_size;
16943 +
16944 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16945 +{
16946 + __u8 ret;
16947 + ret = __raw_readb(map->map_priv_1 + ofs);
16948 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16949 + return ret;
16950 +}
16951 +
16952 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16953 +{
16954 + __u16 ret;
16955 + ret = __raw_readw(map->map_priv_1 + ofs);
16956 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16957 + return ret;
16958 +}
16959 +
16960 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16961 +{
16962 + __u32 ret;
16963 + ret = __raw_readl(map->map_priv_1 + ofs);
16964 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16965 + return ret;
16966 +}
16967 +
16968 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16969 +{
16970 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16971 + memcpy_fromio(to, map->map_priv_1 + from, len);
16972 +}
16973 +
16974 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16975 +{
16976 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16977 + __raw_writeb(d, map->map_priv_1 + adr);
16978 + mb();
16979 +}
16980 +
16981 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16982 +{
16983 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16984 + __raw_writew(d, map->map_priv_1 + adr);
16985 + mb();
16986 +}
16987 +
16988 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16989 +{
16990 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16991 + __raw_writel(d, map->map_priv_1 + adr);
16992 + mb();
16993 +}
16994 +
16995 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16996 +{
16997 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16998 + memcpy_toio(map->map_priv_1 + to, from, len);
16999 +}
17000 +
17001 +static struct map_info pb1550_map = {
17002 + name: "Pb1550 flash",
17003 + read8: physmap_read8,
17004 + read16: physmap_read16,
17005 + read32: physmap_read32,
17006 + copy_from: physmap_copy_from,
17007 + write8: physmap_write8,
17008 + write16: physmap_write16,
17009 + write32: physmap_write32,
17010 + copy_to: physmap_copy_to,
17011 +};
17012 +
17013 +static unsigned char flash_buswidth = 4;
17014 +
17015 +/*
17016 + * Support only 64MB NOR Flash parts
17017 + */
17018 +
17019 +#ifdef PB1550_BOTH_BANKS
17020 +/* both banks will be used. Combine the first bank and the first
17021 + * part of the second bank together into a single jffs/jffs2
17022 + * partition.
17023 + */
17024 +static struct mtd_partition pb1550_partitions[] = {
17025 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
17026 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
17027 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
17028 + */
17029 + {
17030 + name: "User FS",
17031 + size: (0x1FC00000 - 0x18000000),
17032 + offset: 0x0000000
17033 + },{
17034 + name: "yamon",
17035 + size: 0x0100000,
17036 + offset: MTDPART_OFS_APPEND,
17037 + mask_flags: MTD_WRITEABLE
17038 + },{
17039 + name: "raw kernel",
17040 + size: (0x300000 - 0x40000), /* last 256KB is yamon env */
17041 + offset: MTDPART_OFS_APPEND,
17042 + }
17043 +};
17044 +#elif defined(PB1550_BOOT_ONLY)
17045 +static struct mtd_partition pb1550_partitions[] = {
17046 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
17047 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
17048 + */
17049 + {
17050 + name: "User FS",
17051 + size: 0x03c00000,
17052 + offset: 0x0000000
17053 + },{
17054 + name: "yamon",
17055 + size: 0x0100000,
17056 + offset: MTDPART_OFS_APPEND,
17057 + mask_flags: MTD_WRITEABLE
17058 + },{
17059 + name: "raw kernel",
17060 + size: (0x300000-0x40000), /* last 256KB is yamon env */
17061 + offset: MTDPART_OFS_APPEND,
17062 + }
17063 +};
17064 +#elif defined(PB1550_USER_ONLY)
17065 +static struct mtd_partition pb1550_partitions[] = {
17066 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
17067 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
17068 + */
17069 + {
17070 + name: "User FS",
17071 + size: (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
17072 + offset: 0x0000000
17073 + },{
17074 + name: "raw kernel",
17075 + size: MTDPART_SIZ_FULL,
17076 + offset: MTDPART_OFS_APPEND,
17077 + }
17078 +};
17079 +#else
17080 +#error MTD_PB1550 define combo error /* should never happen */
17081 +#endif
17082 +
17083 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
17084 +
17085 +static struct mtd_partition *parsed_parts;
17086 +static struct mtd_info *mymtd;
17087 +
17088 +/*
17089 + * Probe the flash density and setup window address and size
17090 + * based on user CONFIG options. There are times when we don't
17091 + * want the MTD driver to be probing the boot or user flash,
17092 + * so having the option to enable only one bank is important.
17093 + */
17094 +int setup_flash_params()
17095 +{
17096 + u16 boot_swapboot;
17097 + boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
17098 + ((bcsr->status >> 6) & 0x1);
17099 + printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
17100 +
17101 + switch (boot_swapboot) {
17102 + case 0: /* 512Mbit devices, both enabled */
17103 + case 1:
17104 + case 8:
17105 + case 9:
17106 +#if defined(PB1550_BOTH_BANKS)
17107 + window_addr = 0x18000000;
17108 + window_size = 0x8000000;
17109 +#elif defined(PB1550_BOOT_ONLY)
17110 + window_addr = 0x1C000000;
17111 + window_size = 0x4000000;
17112 +#else /* USER ONLY */
17113 + window_addr = 0x1E000000;
17114 + window_size = 0x1000000;
17115 +#endif
17116 + break;
17117 + case 0xC:
17118 + case 0xD:
17119 + case 0xE:
17120 + case 0xF:
17121 + /* 64 MB Boot NOR Flash is disabled */
17122 + /* and the start address is moved to 0x0C00000 */
17123 + window_addr = 0x0C000000;
17124 + window_size = 0x4000000;
17125 + default:
17126 + printk("Pb1550 MTD: unsupported boot:swap setting\n");
17127 + return 1;
17128 + }
17129 + return 0;
17130 +}
17131 +
17132 +int __init pb1550_mtd_init(void)
17133 +{
17134 + struct mtd_partition *parts;
17135 + int nb_parts = 0;
17136 + char *part_type;
17137 +
17138 + /* Default flash buswidth */
17139 + pb1550_map.buswidth = flash_buswidth;
17140 +
17141 + if (setup_flash_params())
17142 + return -ENXIO;
17143 +
17144 + /*
17145 + * Static partition definition selection
17146 + */
17147 + part_type = "static";
17148 + parts = pb1550_partitions;
17149 + nb_parts = NB_OF(pb1550_partitions);
17150 + pb1550_map.size = window_size;
17151 +
17152 + /*
17153 + * Now let's probe for the actual flash. Do it here since
17154 + * specific machine settings might have been set above.
17155 + */
17156 + printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n",
17157 + pb1550_map.buswidth*8);
17158 + pb1550_map.map_priv_1 =
17159 + (unsigned long)ioremap(window_addr, window_size);
17160 + mymtd = do_map_probe("cfi_probe", &pb1550_map);
17161 + if (!mymtd) return -ENXIO;
17162 + mymtd->module = THIS_MODULE;
17163 +
17164 + add_mtd_partitions(mymtd, parts, nb_parts);
17165 + return 0;
17166 +}
17167 +
17168 +static void __exit pb1550_mtd_cleanup(void)
17169 +{
17170 + if (mymtd) {
17171 + del_mtd_partitions(mymtd);
17172 + map_destroy(mymtd);
17173 + if (parsed_parts)
17174 + kfree(parsed_parts);
17175 + }
17176 +}
17177 +
17178 +module_init(pb1550_mtd_init);
17179 +module_exit(pb1550_mtd_cleanup);
17180 +
17181 +MODULE_AUTHOR("Embedded Edge, LLC");
17182 +MODULE_DESCRIPTION("Pb1550 mtd map driver");
17183 +MODULE_LICENSE("GPL");
17184 Index: linux-2.4.35.4/drivers/mtd/maps/pb1xxx-flash.c
17185 ===================================================================
17186 --- linux-2.4.35.4.orig/drivers/mtd/maps/pb1xxx-flash.c 2007-12-15 05:19:44.026929991 +0100
17187 +++ linux-2.4.35.4/drivers/mtd/maps/pb1xxx-flash.c 2007-12-15 05:19:44.958983106 +0100
17188 @@ -192,6 +192,34 @@
17189 #else
17190 #error MTD_PB1500 define combo error /* should never happen */
17191 #endif
17192 +#elif defined(CONFIG_MTD_BOSPORUS)
17193 +static unsigned char flash_buswidth = 2;
17194 +static unsigned long flash_size = 0x02000000;
17195 +#define WINDOW_ADDR 0x1F000000
17196 +#define WINDOW_SIZE 0x2000000
17197 +static struct mtd_partition pb1xxx_partitions[] = {
17198 + {
17199 + name: "User FS",
17200 + size: 0x00400000,
17201 + offset: 0x00000000,
17202 + },{
17203 + name: "Yamon-2",
17204 + size: 0x00100000,
17205 + offset: 0x00400000,
17206 + },{
17207 + name: "Root FS",
17208 + size: 0x00700000,
17209 + offset: 0x00500000,
17210 + },{
17211 + name: "Yamon-1",
17212 + size: 0x00100000,
17213 + offset: 0x00C00000,
17214 + },{
17215 + name: "Kernel",
17216 + size: 0x00300000,
17217 + offset: 0x00D00000,
17218 + }
17219 +};
17220 #else
17221 #error Unsupported board
17222 #endif
17223 Index: linux-2.4.35.4/drivers/mtd/maps/xxs1500.c
17224 ===================================================================
17225 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
17226 +++ linux-2.4.35.4/drivers/mtd/maps/xxs1500.c 2007-12-15 05:19:44.958983106 +0100
17227 @@ -0,0 +1,186 @@
17228 +/*
17229 + * Flash memory access on MyCable XXS1500 board
17230 + *
17231 + * (C) 2003 Pete Popov <ppopov@mvista.com>
17232 + *
17233 + * $Id: xxs1500.c,v 1.1.2.1 2003/06/13 21:15:46 ppopov Exp $
17234 + */
17235 +
17236 +#include <linux/config.h>
17237 +#include <linux/module.h>
17238 +#include <linux/types.h>
17239 +#include <linux/kernel.h>
17240 +
17241 +#include <linux/mtd/mtd.h>
17242 +#include <linux/mtd/map.h>
17243 +#include <linux/mtd/partitions.h>
17244 +
17245 +#include <asm/io.h>
17246 +#include <asm/au1000.h>
17247 +
17248 +#ifdef DEBUG_RW
17249 +#define DBG(x...) printk(x)
17250 +#else
17251 +#define DBG(x...)
17252 +#endif
17253 +
17254 +#ifdef CONFIG_MIPS_XXS1500
17255 +#define WINDOW_ADDR 0x1F000000
17256 +#define WINDOW_SIZE 0x1000000
17257 +#endif
17258 +
17259 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
17260 +{
17261 + __u8 ret;
17262 + ret = __raw_readb(map->map_priv_1 + ofs);
17263 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
17264 + return ret;
17265 +}
17266 +
17267 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
17268 +{
17269 + __u16 ret;
17270 + ret = __raw_readw(map->map_priv_1 + ofs);
17271 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
17272 + return ret;
17273 +}
17274 +
17275 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
17276 +{
17277 + __u32 ret;
17278 + ret = __raw_readl(map->map_priv_1 + ofs);
17279 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
17280 + return ret;
17281 +}
17282 +
17283 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
17284 +{
17285 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
17286 + memcpy_fromio(to, map->map_priv_1 + from, len);
17287 +}
17288 +
17289 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
17290 +{
17291 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
17292 + __raw_writeb(d, map->map_priv_1 + adr);
17293 + mb();
17294 +}
17295 +
17296 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
17297 +{
17298 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
17299 + __raw_writew(d, map->map_priv_1 + adr);
17300 + mb();
17301 +}
17302 +
17303 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
17304 +{
17305 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
17306 + __raw_writel(d, map->map_priv_1 + adr);
17307 + mb();
17308 +}
17309 +
17310 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
17311 +{
17312 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
17313 + memcpy_toio(map->map_priv_1 + to, from, len);
17314 +}
17315 +
17316 +
17317 +
17318 +static struct map_info xxs1500_map = {
17319 + name: "XXS1500 flash",
17320 + read8: physmap_read8,
17321 + read16: physmap_read16,
17322 + read32: physmap_read32,
17323 + copy_from: physmap_copy_from,
17324 + write8: physmap_write8,
17325 + write16: physmap_write16,
17326 + write32: physmap_write32,
17327 + copy_to: physmap_copy_to,
17328 +};
17329 +
17330 +
17331 +static unsigned long flash_size = 0x00800000;
17332 +static unsigned char flash_buswidth = 4;
17333 +static struct mtd_partition xxs1500_partitions[] = {
17334 + {
17335 + name: "kernel image",
17336 + size: 0x00200000,
17337 + offset: 0,
17338 + },{
17339 + name: "user fs 0",
17340 + size: (0x00C00000-0x200000),
17341 + offset: MTDPART_OFS_APPEND,
17342 + },{
17343 + name: "yamon",
17344 + size: 0x00100000,
17345 + offset: MTDPART_OFS_APPEND,
17346 + mask_flags: MTD_WRITEABLE
17347 + },{
17348 + name: "user fs 1",
17349 + size: 0x2c0000,
17350 + offset: MTDPART_OFS_APPEND,
17351 + },{
17352 + name: "yamon env vars",
17353 + size: 0x040000,
17354 + offset: MTDPART_OFS_APPEND,
17355 + mask_flags: MTD_WRITEABLE
17356 + }
17357 +};
17358 +
17359 +
17360 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
17361 +
17362 +static struct mtd_partition *parsed_parts;
17363 +static struct mtd_info *mymtd;
17364 +
17365 +int __init xxs1500_mtd_init(void)
17366 +{
17367 + struct mtd_partition *parts;
17368 + int nb_parts = 0;
17369 + char *part_type;
17370 +
17371 + /* Default flash buswidth */
17372 + xxs1500_map.buswidth = flash_buswidth;
17373 +
17374 + /*
17375 + * Static partition definition selection
17376 + */
17377 + part_type = "static";
17378 + parts = xxs1500_partitions;
17379 + nb_parts = NB_OF(xxs1500_partitions);
17380 + xxs1500_map.size = flash_size;
17381 +
17382 + /*
17383 + * Now let's probe for the actual flash. Do it here since
17384 + * specific machine settings might have been set above.
17385 + */
17386 + printk(KERN_NOTICE "XXS1500 flash: probing %d-bit flash bus\n",
17387 + xxs1500_map.buswidth*8);
17388 + xxs1500_map.map_priv_1 =
17389 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
17390 + mymtd = do_map_probe("cfi_probe", &xxs1500_map);
17391 + if (!mymtd) return -ENXIO;
17392 + mymtd->module = THIS_MODULE;
17393 +
17394 + add_mtd_partitions(mymtd, parts, nb_parts);
17395 + return 0;
17396 +}
17397 +
17398 +static void __exit xxs1500_mtd_cleanup(void)
17399 +{
17400 + if (mymtd) {
17401 + del_mtd_partitions(mymtd);
17402 + map_destroy(mymtd);
17403 + if (parsed_parts)
17404 + kfree(parsed_parts);
17405 + }
17406 +}
17407 +
17408 +module_init(xxs1500_mtd_init);
17409 +module_exit(xxs1500_mtd_cleanup);
17410 +
17411 +MODULE_AUTHOR("Pete Popov");
17412 +MODULE_DESCRIPTION("XXS1500 CFI map driver");
17413 +MODULE_LICENSE("GPL");
17414 Index: linux-2.4.35.4/drivers/net/defxx.c
17415 ===================================================================
17416 --- linux-2.4.35.4.orig/drivers/net/defxx.c 2007-12-15 05:19:44.042930901 +0100
17417 +++ linux-2.4.35.4/drivers/net/defxx.c 2007-12-15 05:19:44.962983332 +0100
17418 @@ -10,24 +10,18 @@
17419 *
17420 * Abstract:
17421 * A Linux device driver supporting the Digital Equipment Corporation
17422 - * FDDI EISA and PCI controller families. Supported adapters include:
17423 + * FDDI TURBOchannel, EISA and PCI controller families. Supported
17424 + * adapters include:
17425 *
17426 - * DEC FDDIcontroller/EISA (DEFEA)
17427 - * DEC FDDIcontroller/PCI (DEFPA)
17428 + * DEC FDDIcontroller/TURBOchannel (DEFTA)
17429 + * DEC FDDIcontroller/EISA (DEFEA)
17430 + * DEC FDDIcontroller/PCI (DEFPA)
17431 *
17432 - * Maintainers:
17433 - * LVS Lawrence V. Stefani
17434 - *
17435 - * Contact:
17436 - * The author may be reached at:
17437 + * The original author:
17438 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
17439 *
17440 - * Inet: stefani@lkg.dec.com
17441 - * (NOTE! this address no longer works -jgarzik)
17442 - *
17443 - * Mail: Digital Equipment Corporation
17444 - * 550 King Street
17445 - * M/S: LKG1-3/M07
17446 - * Littleton, MA 01460
17447 + * Maintainers:
17448 + * macro Maciej W. Rozycki <macro@linux-mips.org>
17449 *
17450 * Credits:
17451 * I'd like to thank Patricia Cross for helping me get started with
17452 @@ -197,16 +191,16 @@
17453 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
17454 * Feb 2001 Skb allocation fixes
17455 * Feb 2001 davej PCI enable cleanups.
17456 + * 04 Aug 2003 macro Converted to the DMA API.
17457 + * 14 Aug 2004 macro Fix device names reported.
17458 + * 26 Sep 2004 macro TURBOchannel support.
17459 */
17460
17461 /* Include files */
17462
17463 #include <linux/module.h>
17464 -
17465 #include <linux/kernel.h>
17466 -#include <linux/sched.h>
17467 #include <linux/string.h>
17468 -#include <linux/ptrace.h>
17469 #include <linux/errno.h>
17470 #include <linux/ioport.h>
17471 #include <linux/slab.h>
17472 @@ -215,19 +209,33 @@
17473 #include <linux/delay.h>
17474 #include <linux/init.h>
17475 #include <linux/netdevice.h>
17476 +#include <linux/fddidevice.h>
17477 +#include <linux/skbuff.h>
17478 +
17479 #include <asm/byteorder.h>
17480 #include <asm/bitops.h>
17481 #include <asm/io.h>
17482
17483 -#include <linux/fddidevice.h>
17484 -#include <linux/skbuff.h>
17485 +#ifdef CONFIG_TC
17486 +#include <asm/dec/tc.h>
17487 +#else
17488 +static int search_tc_card(const char *name) { return -ENODEV; }
17489 +static void claim_tc_card(int slot) { }
17490 +static void release_tc_card(int slot) { }
17491 +static unsigned long get_tc_base_addr(int slot) { return 0; }
17492 +static unsigned long get_tc_irq_nr(int slot) { return -1; }
17493 +#endif
17494
17495 #include "defxx.h"
17496
17497 -/* Version information string - should be updated prior to each new release!!! */
17498 +/* Version information string should be updated prior to each new release! */
17499 +#define DRV_NAME "defxx"
17500 +#define DRV_VERSION "v1.07T"
17501 +#define DRV_RELDATE "2004/09/26"
17502
17503 static char version[] __devinitdata =
17504 - "defxx.c:v1.05e 2001/02/03 Lawrence V. Stefani and others\n";
17505 + DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
17506 + " Lawrence V. Stefani and others\n";
17507
17508 #define DYNAMIC_BUFFERS 1
17509
17510 @@ -243,7 +251,7 @@
17511 static void dfx_bus_init(struct net_device *dev);
17512 static void dfx_bus_config_check(DFX_board_t *bp);
17513
17514 -static int dfx_driver_init(struct net_device *dev);
17515 +static int dfx_driver_init(struct net_device *dev, const char *print_name);
17516 static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
17517
17518 static int dfx_open(struct net_device *dev);
17519 @@ -337,48 +345,84 @@
17520 int offset,
17521 u8 data
17522 )
17523 +{
17524 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17525 + {
17526 + volatile u8 *addr = (void *)(bp->base_addr + offset);
17527
17528 + *addr = data;
17529 + mb();
17530 + }
17531 + else
17532 {
17533 u16 port = bp->base_addr + offset;
17534
17535 outb(data, port);
17536 }
17537 +}
17538
17539 static inline void dfx_port_read_byte(
17540 DFX_board_t *bp,
17541 int offset,
17542 u8 *data
17543 )
17544 +{
17545 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17546 + {
17547 + volatile u8 *addr = (void *)(bp->base_addr + offset);
17548
17549 + mb();
17550 + *data = *addr;
17551 + }
17552 + else
17553 {
17554 u16 port = bp->base_addr + offset;
17555
17556 *data = inb(port);
17557 }
17558 +}
17559
17560 static inline void dfx_port_write_long(
17561 DFX_board_t *bp,
17562 int offset,
17563 u32 data
17564 )
17565 +{
17566 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17567 + {
17568 + volatile u32 *addr = (void *)(bp->base_addr + offset);
17569
17570 + *addr = data;
17571 + mb();
17572 + }
17573 + else
17574 {
17575 u16 port = bp->base_addr + offset;
17576
17577 outl(data, port);
17578 }
17579 +}
17580
17581 static inline void dfx_port_read_long(
17582 DFX_board_t *bp,
17583 int offset,
17584 u32 *data
17585 )
17586 +{
17587 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17588 + {
17589 + volatile u32 *addr = (void *)(bp->base_addr + offset);
17590
17591 + mb();
17592 + *data = *addr;
17593 + }
17594 + else
17595 {
17596 u16 port = bp->base_addr + offset;
17597
17598 *data = inl(port);
17599 }
17600 +}
17601
17602 \f
17603 /*
17604 @@ -393,8 +437,9 @@
17605 * Condition code
17606 *
17607 * Arguments:
17608 - * pdev - pointer to pci device information (NULL for EISA)
17609 - * ioaddr - pointer to port (NULL for PCI)
17610 + * pdev - pointer to pci device information (NULL for EISA or TURBOchannel)
17611 + * bus_type - bus type (one of DFX_BUS_TYPE_*)
17612 + * handle - bus-specific data: slot (TC), pointer to port (EISA), NULL (PCI)
17613 *
17614 * Functional Description:
17615 *
17616 @@ -410,54 +455,68 @@
17617 * initialized and the board resources are read and stored in
17618 * the device structure.
17619 */
17620 -static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
17621 +static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, u32 bus_type, long handle)
17622 {
17623 + static int version_disp;
17624 + char *print_name = DRV_NAME;
17625 struct net_device *dev;
17626 DFX_board_t *bp; /* board pointer */
17627 + long ioaddr; /* pointer to port */
17628 + unsigned long len; /* resource length */
17629 + int alloc_size; /* total buffer size used */
17630 int err;
17631
17632 -#ifndef MODULE
17633 - static int version_disp;
17634 -
17635 - if (!version_disp) /* display version info if adapter is found */
17636 - {
17637 + if (!version_disp) { /* display version info if adapter is found */
17638 version_disp = 1; /* set display flag to TRUE so that */
17639 printk(version); /* we only display this string ONCE */
17640 }
17641 -#endif
17642
17643 - /*
17644 - * init_fddidev() allocates a device structure with private data, clears the device structure and private data,
17645 - * and calls fddi_setup() and register_netdev(). Not much left to do for us here.
17646 - */
17647 - dev = init_fddidev(NULL, sizeof(*bp));
17648 + if (pdev != NULL)
17649 + print_name = pdev->slot_name;
17650 +
17651 + dev = alloc_fddidev(sizeof(*bp));
17652 if (!dev) {
17653 - printk (KERN_ERR "defxx: unable to allocate fddidev, aborting\n");
17654 + printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n",
17655 + print_name);
17656 return -ENOMEM;
17657 }
17658
17659 /* Enable PCI device. */
17660 - if (pdev != NULL) {
17661 + if (bus_type == DFX_BUS_TYPE_PCI) {
17662 err = pci_enable_device (pdev);
17663 if (err) goto err_out;
17664 ioaddr = pci_resource_start (pdev, 1);
17665 }
17666
17667 SET_MODULE_OWNER(dev);
17668 + SET_NETDEV_DEV(dev, &pdev->dev);
17669
17670 bp = dev->priv;
17671
17672 - if (!request_region (ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, dev->name)) {
17673 - printk (KERN_ERR "%s: Cannot reserve I/O resource 0x%x @ 0x%lx, aborting\n",
17674 - dev->name, PFI_K_CSR_IO_LEN, ioaddr);
17675 + if (bus_type == DFX_BUS_TYPE_TC) {
17676 + /* TURBOchannel board */
17677 + bp->slot = handle;
17678 + claim_tc_card(bp->slot);
17679 + ioaddr = get_tc_base_addr(handle) + PI_TC_K_CSR_OFFSET;
17680 + len = PI_TC_K_CSR_LEN;
17681 + } else if (bus_type == DFX_BUS_TYPE_EISA) {
17682 + /* EISA board */
17683 + ioaddr = handle;
17684 + len = PI_ESIC_K_CSR_IO_LEN;
17685 + } else
17686 + /* PCI board */
17687 + len = PFI_K_CSR_IO_LEN;
17688 + dev->base_addr = ioaddr; /* save port (I/O) base address */
17689 +
17690 + if (!request_region(ioaddr, len, print_name)) {
17691 + printk(KERN_ERR "%s: Cannot reserve I/O resource "
17692 + "0x%lx @ 0x%lx, aborting\n", print_name, len, ioaddr);
17693 err = -EBUSY;
17694 goto err_out;
17695 }
17696
17697 /* Initialize new device structure */
17698
17699 - dev->base_addr = ioaddr; /* save port (I/O) base address */
17700 -
17701 dev->get_stats = dfx_ctl_get_stats;
17702 dev->open = dfx_open;
17703 dev->stop = dfx_close;
17704 @@ -465,37 +524,54 @@
17705 dev->set_multicast_list = dfx_ctl_set_multicast_list;
17706 dev->set_mac_address = dfx_ctl_set_mac_address;
17707
17708 - if (pdev == NULL) {
17709 - /* EISA board */
17710 - bp->bus_type = DFX_BUS_TYPE_EISA;
17711 + bp->bus_type = bus_type;
17712 + if (bus_type == DFX_BUS_TYPE_TC || bus_type == DFX_BUS_TYPE_EISA) {
17713 + /* TURBOchannel or EISA board */
17714 bp->next = root_dfx_eisa_dev;
17715 root_dfx_eisa_dev = dev;
17716 } else {
17717 /* PCI board */
17718 - bp->bus_type = DFX_BUS_TYPE_PCI;
17719 bp->pci_dev = pdev;
17720 pci_set_drvdata (pdev, dev);
17721 pci_set_master (pdev);
17722 }
17723
17724 - if (dfx_driver_init(dev) != DFX_K_SUCCESS) {
17725 +
17726 + if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) {
17727 err = -ENODEV;
17728 goto err_out_region;
17729 }
17730
17731 + err = register_netdev(dev);
17732 + if (err)
17733 + goto err_out_kfree;
17734 +
17735 + printk("%s: registered as %s\n", print_name, dev->name);
17736 return 0;
17737
17738 +err_out_kfree:
17739 + alloc_size = sizeof(PI_DESCR_BLOCK) +
17740 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
17741 +#ifndef DYNAMIC_BUFFERS
17742 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
17743 +#endif
17744 + sizeof(PI_CONSUMER_BLOCK) +
17745 + (PI_ALIGN_K_DESC_BLK - 1);
17746 + if (bp->kmalloced)
17747 + pci_free_consistent(pdev, alloc_size,
17748 + bp->kmalloced, bp->kmalloced_dma);
17749 err_out_region:
17750 - release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN);
17751 + release_region(ioaddr, len);
17752 err_out:
17753 - unregister_netdev(dev);
17754 - kfree(dev);
17755 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17756 + release_tc_card(bp->slot);
17757 + free_netdev(dev);
17758 return err;
17759 }
17760
17761 static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
17762 {
17763 - return dfx_init_one_pci_or_eisa(pdev, 0);
17764 + return dfx_init_one_pci_or_eisa(pdev, DFX_BUS_TYPE_PCI, 0);
17765 }
17766
17767 static int __init dfx_eisa_init(void)
17768 @@ -507,6 +583,7 @@
17769
17770 DBG_printk("In dfx_eisa_init...\n");
17771
17772 +#ifdef CONFIG_EISA
17773 /* Scan for FDDI EISA controllers */
17774
17775 for (i=0; i < DFX_MAX_EISA_SLOTS; i++) /* only scan for up to 16 EISA slots */
17776 @@ -517,9 +594,27 @@
17777 {
17778 port = (i << 12); /* recalc base addr */
17779
17780 - if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
17781 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_EISA, port) == 0) rc = 0;
17782 }
17783 }
17784 +#endif
17785 + return rc;
17786 +}
17787 +
17788 +static int __init dfx_tc_init(void)
17789 +{
17790 + int rc = -ENODEV;
17791 + int slot; /* TC slot number */
17792 +
17793 + DBG_printk("In dfx_tc_init...\n");
17794 +
17795 + /* Scan for FDDI TC controllers */
17796 + while ((slot = search_tc_card("PMAF-F")) >= 0) {
17797 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_TC, slot) == 0)
17798 + rc = 0;
17799 + else
17800 + break;
17801 + }
17802 return rc;
17803 }
17804 \f
17805 @@ -583,8 +678,9 @@
17806
17807 /* Initialize adapter based on bus type */
17808
17809 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
17810 - {
17811 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
17812 + dev->irq = get_tc_irq_nr(bp->slot);
17813 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
17814 /* Get the interrupt level from the ESIC chip */
17815
17816 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
17817 @@ -766,6 +862,7 @@
17818 *
17819 * Arguments:
17820 * dev - pointer to device information
17821 + * print_name - printable device name
17822 *
17823 * Functional Description:
17824 * This function allocates additional resources such as the host memory
17825 @@ -780,20 +877,21 @@
17826 * or read adapter MAC address
17827 *
17828 * Assumptions:
17829 - * Memory allocated from kmalloc() call is physically contiguous, locked
17830 - * memory whose physical address equals its virtual address.
17831 + * Memory allocated from pci_alloc_consistent() call is physically
17832 + * contiguous, locked memory.
17833 *
17834 * Side Effects:
17835 * Adapter is reset and should be in DMA_UNAVAILABLE state before
17836 * returning from this routine.
17837 */
17838
17839 -static int __devinit dfx_driver_init(struct net_device *dev)
17840 +static int __devinit dfx_driver_init(struct net_device *dev,
17841 + const char *print_name)
17842 {
17843 DFX_board_t *bp = dev->priv;
17844 int alloc_size; /* total buffer size needed */
17845 char *top_v, *curr_v; /* virtual addrs into memory block */
17846 - u32 top_p, curr_p; /* physical addrs into memory block */
17847 + dma_addr_t top_p, curr_p; /* physical addrs into memory block */
17848 u32 data; /* host data register value */
17849
17850 DBG_printk("In dfx_driver_init...\n");
17851 @@ -837,26 +935,20 @@
17852
17853 /* Read the factory MAC address from the adapter then save it */
17854
17855 - if (dfx_hw_port_ctrl_req(bp,
17856 - PI_PCTRL_M_MLA,
17857 - PI_PDATA_A_MLA_K_LO,
17858 - 0,
17859 - &data) != DFX_K_SUCCESS)
17860 - {
17861 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
17862 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
17863 + &data) != DFX_K_SUCCESS) {
17864 + printk("%s: Could not read adapter factory MAC address!\n",
17865 + print_name);
17866 return(DFX_K_FAILURE);
17867 - }
17868 + }
17869 memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32));
17870
17871 - if (dfx_hw_port_ctrl_req(bp,
17872 - PI_PCTRL_M_MLA,
17873 - PI_PDATA_A_MLA_K_HI,
17874 - 0,
17875 - &data) != DFX_K_SUCCESS)
17876 - {
17877 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
17878 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
17879 + &data) != DFX_K_SUCCESS) {
17880 + printk("%s: Could not read adapter factory MAC address!\n",
17881 + print_name);
17882 return(DFX_K_FAILURE);
17883 - }
17884 + }
17885 memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16));
17886
17887 /*
17888 @@ -867,28 +959,27 @@
17889 */
17890
17891 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
17892 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
17893 - printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17894 - dev->name,
17895 - dev->base_addr,
17896 - dev->irq,
17897 - dev->dev_addr[0],
17898 - dev->dev_addr[1],
17899 - dev->dev_addr[2],
17900 - dev->dev_addr[3],
17901 - dev->dev_addr[4],
17902 - dev->dev_addr[5]);
17903 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17904 + printk("%s: DEFTA at addr = 0x%lX, IRQ = %d, "
17905 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17906 + print_name, dev->base_addr, dev->irq,
17907 + dev->dev_addr[0], dev->dev_addr[1],
17908 + dev->dev_addr[2], dev->dev_addr[3],
17909 + dev->dev_addr[4], dev->dev_addr[5]);
17910 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
17911 + printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, "
17912 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17913 + print_name, dev->base_addr, dev->irq,
17914 + dev->dev_addr[0], dev->dev_addr[1],
17915 + dev->dev_addr[2], dev->dev_addr[3],
17916 + dev->dev_addr[4], dev->dev_addr[5]);
17917 else
17918 - printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17919 - dev->name,
17920 - dev->base_addr,
17921 - dev->irq,
17922 - dev->dev_addr[0],
17923 - dev->dev_addr[1],
17924 - dev->dev_addr[2],
17925 - dev->dev_addr[3],
17926 - dev->dev_addr[4],
17927 - dev->dev_addr[5]);
17928 + printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, "
17929 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17930 + print_name, dev->base_addr, dev->irq,
17931 + dev->dev_addr[0], dev->dev_addr[1],
17932 + dev->dev_addr[2], dev->dev_addr[3],
17933 + dev->dev_addr[4], dev->dev_addr[5]);
17934
17935 /*
17936 * Get memory for descriptor block, consumer block, and other buffers
17937 @@ -903,14 +994,15 @@
17938 #endif
17939 sizeof(PI_CONSUMER_BLOCK) +
17940 (PI_ALIGN_K_DESC_BLK - 1);
17941 - bp->kmalloced = top_v = (char *) kmalloc(alloc_size, GFP_KERNEL);
17942 - if (top_v == NULL)
17943 - {
17944 - printk("%s: Could not allocate memory for host buffers and structures!\n", dev->name);
17945 + bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size,
17946 + &bp->kmalloced_dma);
17947 + if (top_v == NULL) {
17948 + printk("%s: Could not allocate memory for host buffers "
17949 + "and structures!\n", print_name);
17950 return(DFX_K_FAILURE);
17951 - }
17952 + }
17953 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
17954 - top_p = virt_to_bus(top_v); /* get physical address of buffer */
17955 + top_p = bp->kmalloced_dma; /* get physical address of buffer */
17956
17957 /*
17958 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
17959 @@ -924,7 +1016,7 @@
17960 * for allocating the needed memory.
17961 */
17962
17963 - curr_p = (u32) (ALIGN(top_p, PI_ALIGN_K_DESC_BLK));
17964 + curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
17965 curr_v = top_v + (curr_p - top_p);
17966
17967 /* Reserve space for descriptor block */
17968 @@ -965,14 +1057,20 @@
17969
17970 /* Display virtual and physical addresses if debug driver */
17971
17972 - DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n", dev->name, (long)bp->descr_block_virt, bp->descr_block_phys);
17973 - DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
17974 - DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
17975 - DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
17976 - DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->cons_block_virt, bp->cons_block_phys);
17977 + DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
17978 + print_name,
17979 + (long)bp->descr_block_virt, bp->descr_block_phys);
17980 + DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
17981 + print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
17982 + DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
17983 + print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
17984 + DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
17985 + print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
17986 + DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
17987 + print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
17988
17989 return(DFX_K_SUCCESS);
17990 - }
17991 +}
17992
17993 \f
17994 /*
17995 @@ -1218,7 +1316,9 @@
17996
17997 /* Register IRQ - support shared interrupts by passing device ptr */
17998
17999 - ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev);
18000 + ret = request_irq(dev->irq, (void *)dfx_interrupt,
18001 + (bp->bus_type == DFX_BUS_TYPE_TC) ? 0 : SA_SHIRQ,
18002 + dev->name, dev);
18003 if (ret) {
18004 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
18005 return ret;
18006 @@ -1737,7 +1837,7 @@
18007 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
18008 (PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB));
18009 }
18010 - else
18011 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
18012 {
18013 /* Disable interrupts at the ESIC */
18014
18015 @@ -1755,6 +1855,13 @@
18016 tmp |= PI_CONFIG_STAT_0_M_INT_ENB;
18017 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp);
18018 }
18019 + else {
18020 + /* TC doesn't share interrupts so no need to disable them */
18021 +
18022 + /* Call interrupt service routine for this adapter */
18023 +
18024 + dfx_int_common(dev);
18025 + }
18026
18027 spin_unlock(&bp->lock);
18028 }
18029 @@ -2663,12 +2770,12 @@
18030
18031 static void my_skb_align(struct sk_buff *skb, int n)
18032 {
18033 - u32 x=(u32)skb->data; /* We only want the low bits .. */
18034 - u32 v;
18035 + unsigned long x = (unsigned long)skb->data;
18036 + unsigned long v;
18037
18038 - v=(x+n-1)&~(n-1); /* Where we want to be */
18039 + v = ALIGN(x, n); /* Where we want to be */
18040
18041 - skb_reserve(skb, v-x);
18042 + skb_reserve(skb, v - x);
18043 }
18044
18045 \f
18046 @@ -2745,7 +2852,10 @@
18047 */
18048
18049 my_skb_align(newskb, 128);
18050 - bp->descr_block_virt->rcv_data[i+j].long_1 = virt_to_bus(newskb->data);
18051 + bp->descr_block_virt->rcv_data[i + j].long_1 =
18052 + (u32)pci_map_single(bp->pci_dev, newskb->data,
18053 + NEW_SKB_SIZE,
18054 + PCI_DMA_FROMDEVICE);
18055 /*
18056 * p_rcv_buff_va is only used inside the
18057 * kernel so we put the skb pointer here.
18058 @@ -2859,9 +2969,17 @@
18059
18060 my_skb_align(newskb, 128);
18061 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
18062 + pci_unmap_single(bp->pci_dev,
18063 + bp->descr_block_virt->rcv_data[entry].long_1,
18064 + NEW_SKB_SIZE,
18065 + PCI_DMA_FROMDEVICE);
18066 skb_reserve(skb, RCV_BUFF_K_PADDING);
18067 bp->p_rcv_buff_va[entry] = (char *)newskb;
18068 - bp->descr_block_virt->rcv_data[entry].long_1 = virt_to_bus(newskb->data);
18069 + bp->descr_block_virt->rcv_data[entry].long_1 =
18070 + (u32)pci_map_single(bp->pci_dev,
18071 + newskb->data,
18072 + NEW_SKB_SIZE,
18073 + PCI_DMA_FROMDEVICE);
18074 } else
18075 skb = NULL;
18076 } else
18077 @@ -2934,7 +3052,7 @@
18078 * is contained in a single physically contiguous buffer
18079 * in which the virtual address of the start of packet
18080 * (skb->data) can be converted to a physical address
18081 - * by using virt_to_bus().
18082 + * by using pci_map_single().
18083 *
18084 * Since the adapter architecture requires a three byte
18085 * packet request header to prepend the start of packet,
18086 @@ -3082,12 +3200,13 @@
18087 * skb->data.
18088 * 6. The physical address of the start of packet
18089 * can be determined from the virtual address
18090 - * by using virt_to_bus() and is only 32-bits
18091 + * by using pci_map_single() and is only 32-bits
18092 * wide.
18093 */
18094
18095 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
18096 - p_xmt_descr->long_1 = (u32) virt_to_bus(skb->data);
18097 + p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data,
18098 + skb->len, PCI_DMA_TODEVICE);
18099
18100 /*
18101 * Verify that descriptor is actually available
18102 @@ -3171,6 +3290,7 @@
18103 {
18104 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
18105 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
18106 + u8 comp; /* local transmit completion index */
18107 int freed = 0; /* buffers freed */
18108
18109 /* Service all consumed transmit frames */
18110 @@ -3188,7 +3308,11 @@
18111 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
18112
18113 /* Return skb to operating system */
18114 -
18115 + comp = bp->rcv_xmt_reg.index.xmt_comp;
18116 + pci_unmap_single(bp->pci_dev,
18117 + bp->descr_block_virt->xmt_data[comp].long_1,
18118 + p_xmt_drv_descr->p_skb->len,
18119 + PCI_DMA_TODEVICE);
18120 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
18121
18122 /*
18123 @@ -3297,6 +3421,7 @@
18124 {
18125 u32 prod_cons; /* rcv/xmt consumer block longword */
18126 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
18127 + u8 comp; /* local transmit completion index */
18128
18129 /* Flush all outstanding transmit frames */
18130
18131 @@ -3307,7 +3432,11 @@
18132 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
18133
18134 /* Return skb to operating system */
18135 -
18136 + comp = bp->rcv_xmt_reg.index.xmt_comp;
18137 + pci_unmap_single(bp->pci_dev,
18138 + bp->descr_block_virt->xmt_data[comp].long_1,
18139 + p_xmt_drv_descr->p_skb->len,
18140 + PCI_DMA_TODEVICE);
18141 dev_kfree_skb(p_xmt_drv_descr->p_skb);
18142
18143 /* Increment transmit error counter */
18144 @@ -3337,12 +3466,36 @@
18145
18146 static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev)
18147 {
18148 - DFX_board_t *bp = dev->priv;
18149 + DFX_board_t *bp = dev->priv;
18150 + unsigned long len; /* resource length */
18151 + int alloc_size; /* total buffer size used */
18152
18153 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
18154 + /* TURBOchannel board */
18155 + len = PI_TC_K_CSR_LEN;
18156 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
18157 + /* EISA board */
18158 + len = PI_ESIC_K_CSR_IO_LEN;
18159 + } else {
18160 + len = PFI_K_CSR_IO_LEN;
18161 + }
18162 unregister_netdev(dev);
18163 - release_region(dev->base_addr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
18164 - if (bp->kmalloced) kfree(bp->kmalloced);
18165 - kfree(dev);
18166 + release_region(dev->base_addr, len);
18167 +
18168 + if (bp->bus_type == DFX_BUS_TYPE_TC)
18169 + release_tc_card(bp->slot);
18170 +
18171 + alloc_size = sizeof(PI_DESCR_BLOCK) +
18172 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
18173 +#ifndef DYNAMIC_BUFFERS
18174 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
18175 +#endif
18176 + sizeof(PI_CONSUMER_BLOCK) +
18177 + (PI_ALIGN_K_DESC_BLK - 1);
18178 + if (bp->kmalloced)
18179 + pci_free_consistent(pdev, alloc_size, bp->kmalloced,
18180 + bp->kmalloced_dma);
18181 + free_netdev(dev);
18182 }
18183
18184 static void __devexit dfx_remove_one (struct pci_dev *pdev)
18185 @@ -3353,21 +3506,22 @@
18186 pci_set_drvdata(pdev, NULL);
18187 }
18188
18189 -static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
18190 +static struct pci_device_id dfx_pci_tbl[] = {
18191 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
18192 { 0, }
18193 };
18194 MODULE_DEVICE_TABLE(pci, dfx_pci_tbl);
18195
18196 static struct pci_driver dfx_driver = {
18197 - name: "defxx",
18198 - probe: dfx_init_one,
18199 - remove: __devexit_p(dfx_remove_one),
18200 - id_table: dfx_pci_tbl,
18201 + .name = "defxx",
18202 + .probe = dfx_init_one,
18203 + .remove = __devexit_p(dfx_remove_one),
18204 + .id_table = dfx_pci_tbl,
18205 };
18206
18207 static int dfx_have_pci;
18208 static int dfx_have_eisa;
18209 +static int dfx_have_tc;
18210
18211
18212 static void __exit dfx_eisa_cleanup(void)
18213 @@ -3388,12 +3542,7 @@
18214
18215 static int __init dfx_init(void)
18216 {
18217 - int rc_pci, rc_eisa;
18218 -
18219 -/* when a module, this is printed whether or not devices are found in probe */
18220 -#ifdef MODULE
18221 - printk(version);
18222 -#endif
18223 + int rc_pci, rc_eisa, rc_tc;
18224
18225 rc_pci = pci_module_init(&dfx_driver);
18226 if (rc_pci >= 0) dfx_have_pci = 1;
18227 @@ -3401,20 +3550,27 @@
18228 rc_eisa = dfx_eisa_init();
18229 if (rc_eisa >= 0) dfx_have_eisa = 1;
18230
18231 - return ((rc_eisa < 0) ? 0 : rc_eisa) + ((rc_pci < 0) ? 0 : rc_pci);
18232 + rc_tc = dfx_tc_init();
18233 + if (rc_tc >= 0) dfx_have_tc = 1;
18234 +
18235 + return ((rc_tc < 0) ? 0 : rc_tc) +
18236 + ((rc_eisa < 0) ? 0 : rc_eisa) +
18237 + ((rc_pci < 0) ? 0 : rc_pci);
18238 }
18239
18240 static void __exit dfx_cleanup(void)
18241 {
18242 if (dfx_have_pci)
18243 pci_unregister_driver(&dfx_driver);
18244 - if (dfx_have_eisa)
18245 + if (dfx_have_eisa || dfx_have_tc)
18246 dfx_eisa_cleanup();
18247 -
18248 }
18249
18250 module_init(dfx_init);
18251 module_exit(dfx_cleanup);
18252 +MODULE_AUTHOR("Lawrence V. Stefani");
18253 +MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver "
18254 + DRV_VERSION " " DRV_RELDATE);
18255 MODULE_LICENSE("GPL");
18256
18257 \f
18258 Index: linux-2.4.35.4/drivers/net/defxx.h
18259 ===================================================================
18260 --- linux-2.4.35.4.orig/drivers/net/defxx.h 2007-12-15 05:19:44.050931357 +0100
18261 +++ linux-2.4.35.4/drivers/net/defxx.h 2007-12-15 05:19:44.962983332 +0100
18262 @@ -12,17 +12,11 @@
18263 * Contains all definitions specified by port specification and required
18264 * by the defxx.c driver.
18265 *
18266 - * Maintainers:
18267 - * LVS Lawrence V. Stefani
18268 - *
18269 - * Contact:
18270 - * The author may be reached at:
18271 + * The original author:
18272 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
18273 *
18274 - * Inet: stefani@lkg.dec.com
18275 - * Mail: Digital Equipment Corporation
18276 - * 550 King Street
18277 - * M/S: LKG1-3/M07
18278 - * Littleton, MA 01460
18279 + * Maintainers:
18280 + * macro Maciej W. Rozycki <macro@linux-mips.org>
18281 *
18282 * Modification History:
18283 * Date Name Description
18284 @@ -30,6 +24,7 @@
18285 * 09-Sep-96 LVS Added group_prom field. Moved read/write I/O
18286 * macros to DEFXX.C.
18287 * 12-Sep-96 LVS Removed packet request header pointers.
18288 + * 04 Aug 2003 macro Converted to the DMA API.
18289 */
18290
18291 #ifndef _DEFXX_H_
18292 @@ -1467,6 +1462,11 @@
18293
18294 #endif /* #ifndef BIG_ENDIAN */
18295
18296 +/* Define TC PDQ CSR offset and length */
18297 +
18298 +#define PI_TC_K_CSR_OFFSET 0x100000
18299 +#define PI_TC_K_CSR_LEN 0x80 /* 128 bytes */
18300 +
18301 /* Define EISA controller register offsets */
18302
18303 #define PI_ESIC_K_BURST_HOLDOFF 0x040
18304 @@ -1634,6 +1634,7 @@
18305
18306 #define DFX_BUS_TYPE_PCI 0 /* type code for DEC FDDIcontroller/PCI */
18307 #define DFX_BUS_TYPE_EISA 1 /* type code for DEC FDDIcontroller/EISA */
18308 +#define DFX_BUS_TYPE_TC 2 /* type code for DEC FDDIcontroller/TURBOchannel */
18309
18310 #define DFX_FC_PRH2_PRH1_PRH0 0x54003820 /* Packet Request Header bytes + FC */
18311 #define DFX_PRH0_BYTE 0x20 /* Packet Request Header byte 0 */
18312 @@ -1704,17 +1705,19 @@
18313 {
18314 /* Keep virtual and physical pointers to locked, physically contiguous memory */
18315
18316 - char *kmalloced; /* kfree this on unload */
18317 + char *kmalloced; /* pci_free_consistent this on unload */
18318 + dma_addr_t kmalloced_dma;
18319 + /* DMA handle for the above */
18320 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */
18321 - u32 descr_block_phys; /* PDQ descriptor block phys address */
18322 + dma_addr_t descr_block_phys; /* PDQ descriptor block phys address */
18323 PI_DMA_CMD_REQ *cmd_req_virt; /* Command request buffer virt address */
18324 - u32 cmd_req_phys; /* Command request buffer phys address */
18325 + dma_addr_t cmd_req_phys; /* Command request buffer phys address */
18326 PI_DMA_CMD_RSP *cmd_rsp_virt; /* Command response buffer virt address */
18327 - u32 cmd_rsp_phys; /* Command response buffer phys address */
18328 + dma_addr_t cmd_rsp_phys; /* Command response buffer phys address */
18329 char *rcv_block_virt; /* LLC host receive queue buf blk virt */
18330 - u32 rcv_block_phys; /* LLC host receive queue buf blk phys */
18331 + dma_addr_t rcv_block_phys; /* LLC host receive queue buf blk phys */
18332 PI_CONSUMER_BLOCK *cons_block_virt; /* PDQ consumer block virt address */
18333 - u32 cons_block_phys; /* PDQ consumer block phys address */
18334 + dma_addr_t cons_block_phys; /* PDQ consumer block phys address */
18335
18336 /* Keep local copies of Type 1 and Type 2 register data */
18337
18338 @@ -1758,8 +1761,9 @@
18339
18340 struct net_device *dev; /* pointer to device structure */
18341 struct net_device *next;
18342 - u32 bus_type; /* bus type (0 == PCI, 1 == EISA) */
18343 - u16 base_addr; /* base I/O address (same as dev->base_addr) */
18344 + u32 bus_type; /* bus type (0 == PCI, 1 == EISA, 2 == TC) */
18345 + long base_addr; /* base I/O address (same as dev->base_addr) */
18346 + int slot; /* TC slot number */
18347 struct pci_dev * pci_dev;
18348 u32 full_duplex_enb; /* FDDI Full Duplex enable (1 == on, 2 == off) */
18349 u32 req_ttrt; /* requested TTRT value (in 80ns units) */
18350 Index: linux-2.4.35.4/drivers/net/hamradio/hdlcdrv.c
18351 ===================================================================
18352 --- linux-2.4.35.4.orig/drivers/net/hamradio/hdlcdrv.c 2007-12-15 05:19:44.058931815 +0100
18353 +++ linux-2.4.35.4/drivers/net/hamradio/hdlcdrv.c 2007-12-15 05:19:44.962983332 +0100
18354 @@ -587,6 +587,8 @@
18355 return -EINVAL;
18356 s = (struct hdlcdrv_state *)dev->priv;
18357
18358 + netif_stop_queue(dev);
18359 +
18360 if (s->ops && s->ops->close)
18361 i = s->ops->close(dev);
18362 if (s->skb)
18363 Index: linux-2.4.35.4/drivers/net/irda/au1k_ir.c
18364 ===================================================================
18365 --- linux-2.4.35.4.orig/drivers/net/irda/au1k_ir.c 2007-12-15 05:19:44.066932270 +0100
18366 +++ linux-2.4.35.4/drivers/net/irda/au1k_ir.c 2007-12-15 05:19:44.966983561 +0100
18367 @@ -81,10 +81,6 @@
18368
18369 #define RUN_AT(x) (jiffies + (x))
18370
18371 -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
18372 -static BCSR * const bcsr = (BCSR *)0xAE000000;
18373 -#endif
18374 -
18375 static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
18376
18377 /*
18378 Index: linux-2.4.35.4/drivers/net/sgiseeq.c
18379 ===================================================================
18380 --- linux-2.4.35.4.orig/drivers/net/sgiseeq.c 2007-12-15 05:19:44.074932725 +0100
18381 +++ linux-2.4.35.4/drivers/net/sgiseeq.c 2007-12-15 05:19:44.966983561 +0100
18382 @@ -24,16 +24,16 @@
18383 #include <asm/io.h>
18384 #include <asm/system.h>
18385 #include <asm/bitops.h>
18386 +#include <asm/paccess.h>
18387 #include <asm/page.h>
18388 #include <asm/pgtable.h>
18389 +#include <asm/sgi/mc.h>
18390 #include <asm/sgi/hpc3.h>
18391 #include <asm/sgi/ip22.h>
18392 #include <asm/sgialib.h>
18393
18394 #include "sgiseeq.h"
18395
18396 -static char *version = "sgiseeq.c: David S. Miller (dm@engr.sgi.com)\n";
18397 -
18398 static char *sgiseeqstr = "SGI Seeq8003";
18399
18400 /*
18401 @@ -113,9 +113,9 @@
18402
18403 static inline void hpc3_eth_reset(struct hpc3_ethregs *hregs)
18404 {
18405 - hregs->rx_reset = HPC3_ERXRST_CRESET | HPC3_ERXRST_CLRIRQ;
18406 + hregs->reset = HPC3_ERST_CRESET | HPC3_ERST_CLRIRQ;
18407 udelay(20);
18408 - hregs->rx_reset = 0;
18409 + hregs->reset = 0;
18410 }
18411
18412 static inline void reset_hpc3_and_seeq(struct hpc3_ethregs *hregs,
18413 @@ -238,7 +238,6 @@
18414
18415 #define TSTAT_INIT_SEEQ (SEEQ_TCMD_IPT|SEEQ_TCMD_I16|SEEQ_TCMD_IC|SEEQ_TCMD_IUF)
18416 #define TSTAT_INIT_EDLC ((TSTAT_INIT_SEEQ) | SEEQ_TCMD_RB2)
18417 -#define RDMACFG_INIT (HPC3_ERXDCFG_FRXDC | HPC3_ERXDCFG_FEOP | HPC3_ERXDCFG_FIRQ)
18418
18419 static int init_seeq(struct net_device *dev, struct sgiseeq_private *sp,
18420 struct sgiseeq_regs *sregs)
18421 @@ -260,8 +259,6 @@
18422 sregs->tstat = TSTAT_INIT_SEEQ;
18423 }
18424
18425 - hregs->rx_dconfig |= RDMACFG_INIT;
18426 -
18427 hregs->rx_ndptr = PHYSADDR(&sp->srings.rx_desc[0]);
18428 hregs->tx_ndptr = PHYSADDR(&sp->srings.tx_desc[0]);
18429
18430 @@ -432,7 +429,7 @@
18431 spin_lock(&sp->tx_lock);
18432
18433 /* Ack the IRQ and set software state. */
18434 - hregs->rx_reset = HPC3_ERXRST_CLRIRQ;
18435 + hregs->reset = HPC3_ERST_CLRIRQ;
18436
18437 /* Always check for received packets. */
18438 sgiseeq_rx(dev, sp, hregs, sregs);
18439 @@ -616,7 +613,7 @@
18440
18441 #define ALIGNED(x) ((((unsigned long)(x)) + 0xf) & ~(0xf))
18442
18443 -int sgiseeq_init(struct hpc3_regs* regs, int irq)
18444 +int sgiseeq_init(struct hpc3_regs* hpcregs, int irq, int has_eeprom)
18445 {
18446 struct net_device *dev;
18447 struct sgiseeq_private *sp;
18448 @@ -629,7 +626,7 @@
18449 goto err_out;
18450 }
18451 /* Make private data page aligned */
18452 - sp = (struct sgiseeq_private *) get_zeroed_page(GFP_KERNEL);
18453 + sp = (struct sgiseeq_private *) get_zeroed_page(GFP_KERNEL);
18454 if (!sp) {
18455 printk(KERN_ERR "Sgiseeq: Page alloc failed, aborting.\n");
18456 err = -ENOMEM;
18457 @@ -644,7 +641,9 @@
18458
18459 #define EADDR_NVOFS 250
18460 for (i = 0; i < 3; i++) {
18461 - unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i);
18462 + unsigned short tmp = has_eeprom ?
18463 + ip22_eeprom_read(&hpcregs->eeprom, EADDR_NVOFS / 2+i) :
18464 + ip22_nvram_read(EADDR_NVOFS / 2+i);
18465
18466 dev->dev_addr[2 * i] = tmp >> 8;
18467 dev->dev_addr[2 * i + 1] = tmp & 0xff;
18468 @@ -654,8 +653,8 @@
18469 gpriv = sp;
18470 gdev = dev;
18471 #endif
18472 - sp->sregs = (struct sgiseeq_regs *) &hpc3c0->eth_ext[0];
18473 - sp->hregs = &hpc3c0->ethregs;
18474 + sp->sregs = (struct sgiseeq_regs *) &hpcregs->eth_ext[0];
18475 + sp->hregs = &hpcregs->ethregs;
18476 sp->name = sgiseeqstr;
18477 sp->mode = SEEQ_RCMD_RBCAST;
18478
18479 @@ -672,6 +671,11 @@
18480 setup_rx_ring(sp->srings.rx_desc, SEEQ_RX_BUFFERS);
18481 setup_tx_ring(sp->srings.tx_desc, SEEQ_TX_BUFFERS);
18482
18483 + /* Setup PIO and DMA transfer timing */
18484 + sp->hregs->pconfig = 0x161;
18485 + sp->hregs->dconfig = HPC3_EDCFG_FIRQ | HPC3_EDCFG_FEOP |
18486 + HPC3_EDCFG_FRXDC | HPC3_EDCFG_PTO | 0x026;
18487 +
18488 /* Reset the chip. */
18489 hpc3_eth_reset(sp->hregs);
18490
18491 @@ -699,7 +703,7 @@
18492 goto err_out_free_irq;
18493 }
18494
18495 - printk(KERN_INFO "%s: SGI Seeq8003 ", dev->name);
18496 + printk(KERN_INFO "%s: %s ", dev->name, sgiseeqstr);
18497 for (i = 0; i < 6; i++)
18498 printk("%2.2x%c", dev->dev_addr[i], i == 5 ? '\n' : ':');
18499
18500 @@ -721,10 +725,22 @@
18501
18502 static int __init sgiseeq_probe(void)
18503 {
18504 - printk(version);
18505 + unsigned int tmp, ret1, ret2 = 0;
18506
18507 /* On board adapter on 1st HPC is always present */
18508 - return sgiseeq_init(hpc3c0, SGI_ENET_IRQ);
18509 + ret1 = sgiseeq_init(hpc3c0, SGI_ENET_IRQ, 0);
18510 + /* Let's see if second HPC is there */
18511 + if (!(ip22_is_fullhouse()) &&
18512 + get_dbe(tmp, (unsigned int *)&hpc3c1->pbdma[1]) == 0) {
18513 + sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 |
18514 + SGIMC_GIOPAR_EXP164 |
18515 + SGIMC_GIOPAR_HPC264;
18516 + hpc3c1->pbus_piocfg[0][0] = 0x3ffff;
18517 + /* interrupt/config register on Challenge S Mezz board */
18518 + hpc3c1->pbus_extregs[0][0] = 0x30;
18519 + ret2 = sgiseeq_init(hpc3c1, SGI_GIO_0_IRQ, 1);
18520 + }
18521 + return (ret1 & ret2) ? ret1 : 0;
18522 }
18523
18524 static void __exit sgiseeq_exit(void)
18525 @@ -747,4 +763,6 @@
18526 module_init(sgiseeq_probe);
18527 module_exit(sgiseeq_exit);
18528
18529 +MODULE_DESCRIPTION("SGI Seeq 8003 driver");
18530 +MODULE_AUTHOR("David S. Miller");
18531 MODULE_LICENSE("GPL");
18532 Index: linux-2.4.35.4/drivers/pci/pci.c
18533 ===================================================================
18534 --- linux-2.4.35.4.orig/drivers/pci/pci.c 2007-12-15 05:19:44.082933181 +0100
18535 +++ linux-2.4.35.4/drivers/pci/pci.c 2007-12-15 05:19:44.966983561 +0100
18536 @@ -1281,11 +1281,17 @@
18537 {
18538 unsigned int buses;
18539 unsigned short cr;
18540 + unsigned short bctl;
18541 struct pci_bus *child;
18542 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
18543
18544 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
18545 DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
18546 + /* Disable MasterAbortMode during probing to avoid reporting
18547 + of bus errors (in some architectures) */
18548 + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
18549 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
18550 + bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
18551 if ((buses & 0xffff00) && !pcibios_assign_all_busses()) {
18552 /*
18553 * Bus already configured by firmware, process it in the first
18554 @@ -1351,6 +1357,7 @@
18555 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
18556 pci_write_config_word(dev, PCI_COMMAND, cr);
18557 }
18558 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
18559 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
18560 return max;
18561 }
18562 Index: linux-2.4.35.4/drivers/pcmcia/au1000_db1x00.c
18563 ===================================================================
18564 --- linux-2.4.35.4.orig/drivers/pcmcia/au1000_db1x00.c 2007-12-15 05:19:44.090933636 +0100
18565 +++ linux-2.4.35.4/drivers/pcmcia/au1000_db1x00.c 2007-12-15 05:19:44.970983787 +0100
18566 @@ -1,6 +1,6 @@
18567 /*
18568 *
18569 - * Alchemy Semi Db1x00 boards specific pcmcia routines.
18570 + * AMD Alchemy DUAL-SLOT Db1x00 boards' specific pcmcia routines.
18571 *
18572 * Copyright 2002 MontaVista Software Inc.
18573 * Author: MontaVista Software, Inc.
18574 @@ -54,9 +54,20 @@
18575 #include <asm/au1000.h>
18576 #include <asm/au1000_pcmcia.h>
18577
18578 +#if defined(CONFIG_MIPS_PB1200)
18579 +#include <asm/pb1200.h>
18580 +#elif defined(CONFIG_MIPS_DB1200)
18581 +#include <asm/db1200.h>
18582 +#else
18583 #include <asm/db1x00.h>
18584 +#endif
18585
18586 -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
18587 +#define PCMCIA_MAX_SOCK 1
18588 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
18589 +
18590 +/* VPP/VCC */
18591 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
18592 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
18593
18594 static int db1x00_pcmcia_init(struct pcmcia_init *init)
18595 {
18596 @@ -76,7 +87,7 @@
18597 db1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
18598 {
18599 u32 inserted;
18600 - unsigned char vs;
18601 + u16 vs;
18602
18603 if(sock > PCMCIA_MAX_SOCK) return -1;
18604
18605 @@ -87,11 +98,11 @@
18606
18607 if (sock == 0) {
18608 vs = bcsr->status & 0x3;
18609 - inserted = !(bcsr->status & (1<<4));
18610 + inserted = BOARD_CARD_INSERTED(0);
18611 }
18612 else {
18613 vs = (bcsr->status & 0xC)>>2;
18614 - inserted = !(bcsr->status & (1<<5));
18615 + inserted = BOARD_CARD_INSERTED(1);
18616 }
18617
18618 DEBUG(KERN_DEBUG "db1x00 socket %d: inserted %d, vs %d\n",
18619 @@ -144,16 +155,9 @@
18620 if(info->sock > PCMCIA_MAX_SOCK) return -1;
18621
18622 if(info->sock == 0)
18623 -#ifdef CONFIG_MIPS_DB1550
18624 - info->irq = AU1000_GPIO_3;
18625 + info->irq = BOARD_PC0_INT;
18626 else
18627 - info->irq = AU1000_GPIO_5;
18628 -#else
18629 - info->irq = AU1000_GPIO_2;
18630 - else
18631 - info->irq = AU1000_GPIO_5;
18632 -#endif
18633 -
18634 + info->irq = BOARD_PC1_INT;
18635 return 0;
18636 }
18637
18638 Index: linux-2.4.35.4/drivers/pcmcia/Config.in
18639 ===================================================================
18640 --- linux-2.4.35.4.orig/drivers/pcmcia/Config.in 2007-12-15 05:19:44.098934094 +0100
18641 +++ linux-2.4.35.4/drivers/pcmcia/Config.in 2007-12-15 05:19:44.974984016 +0100
18642 @@ -30,16 +30,14 @@
18643 dep_tristate ' M8xx support' CONFIG_PCMCIA_M8XX $CONFIG_PCMCIA
18644 fi
18645 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
18646 - dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
18647 - if [ "$CONFIG_PCMCIA_AU1X00" != "n" ]; then
18648 - bool ' Pb1x00 board support' CONFIG_PCMCIA_PB1X00
18649 - bool ' Db1x00 board support' CONFIG_PCMCIA_DB1X00
18650 - bool ' XXS1500 board support' CONFIG_PCMCIA_XXS1500
18651 - fi
18652 + dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
18653 fi
18654 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
18655 dep_bool ' SiByte PCMCIA support' CONFIG_PCMCIA_SIBYTE $CONFIG_PCMCIA $CONFIG_BLK_DEV_IDE_SIBYTE
18656 fi
18657 + if [ "$CONFIG_VRC4171" = "y" -o "$CONFIG_VRC4171" = "m" ]; then
18658 + dep_tristate ' NEC VRC4171 Card Controllers support' CONFIG_PCMCIA_VRC4171 $CONFIG_PCMCIA
18659 + fi
18660 if [ "$CONFIG_VRC4173" = "y" -o "$CONFIG_VRC4173" = "m" ]; then
18661 dep_tristate ' NEC VRC4173 CARDU support' CONFIG_PCMCIA_VRC4173 $CONFIG_PCMCIA
18662 fi
18663 Index: linux-2.4.35.4/drivers/pcmcia/Makefile
18664 ===================================================================
18665 --- linux-2.4.35.4.orig/drivers/pcmcia/Makefile 2007-12-15 05:19:44.106934550 +0100
18666 +++ linux-2.4.35.4/drivers/pcmcia/Makefile 2007-12-15 05:19:44.974984016 +0100
18667 @@ -61,9 +61,18 @@
18668
18669 obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o
18670 au1000_ss-objs-y := au1000_generic.o
18671 -au1000_ss-objs-$(CONFIG_PCMCIA_PB1X00) += au1000_pb1x00.o
18672 -au1000_ss-objs-$(CONFIG_PCMCIA_DB1X00) += au1000_db1x00.o
18673 -au1000_ss-objs-$(CONFIG_PCMCIA_XXS1500) += au1000_xxs1500.o
18674 +au1000_ss-objs-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o
18675 +au1000_ss-objs-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o
18676 +au1000_ss-objs-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o
18677 +au1000_ss-objs-$(CONFIG_MIPS_PB1550) += au1000_pb1550.o
18678 +au1000_ss-objs-$(CONFIG_MIPS_PB1200) += au1000_db1x00.o
18679 +au1000_ss-objs-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o
18680 +au1000_ss-objs-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o
18681 +au1000_ss-objs-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o
18682 +au1000_ss-objs-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o
18683 +au1000_ss-objs-$(CONFIG_MIPS_DB1200) += au1000_db1x00.o
18684 +au1000_ss-objs-$(CONFIG_MIPS_HYDROGEN3) += au1000_hydrogen3.o
18685 +au1000_ss-objs-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o
18686
18687 obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o
18688 obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
18689 @@ -89,6 +98,7 @@
18690 sa1100_cs-objs-$(CONFIG_SA1100_XP860) += sa1100_xp860.o sa1111_generic.o
18691 sa1100_cs-objs-$(CONFIG_SA1100_YOPY) += sa1100_yopy.o
18692
18693 +obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o
18694 obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o
18695
18696 include $(TOPDIR)/Rules.make
18697 Index: linux-2.4.35.4/drivers/pcmcia/vrc4171_card.c
18698 ===================================================================
18699 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
18700 +++ linux-2.4.35.4/drivers/pcmcia/vrc4171_card.c 2007-12-15 05:19:44.978984245 +0100
18701 @@ -0,0 +1,886 @@
18702 +/*
18703 + * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
18704 + *
18705 + * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
18706 + *
18707 + * This program is free software; you can redistribute it and/or modify
18708 + * it under the terms of the GNU General Public License as published by
18709 + * the Free Software Foundation; either version 2 of the License, or
18710 + * (at your option) any later version.
18711 + *
18712 + * This program is distributed in the hope that it will be useful,
18713 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
18714 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18715 + * GNU General Public License for more details.
18716 + *
18717 + * You should have received a copy of the GNU General Public License
18718 + * along with this program; if not, write to the Free Software
18719 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18720 + */
18721 +#include <linux/init.h>
18722 +#include <linux/ioport.h>
18723 +#include <linux/irq.h>
18724 +#include <linux/module.h>
18725 +#include <linux/spinlock.h>
18726 +#include <linux/sched.h>
18727 +#include <linux/types.h>
18728 +
18729 +#include <asm/io.h>
18730 +#include <asm/vr41xx/vrc4171.h>
18731 +
18732 +#include <pcmcia/ss.h>
18733 +
18734 +#include "i82365.h"
18735 +
18736 +MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
18737 +MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
18738 +MODULE_LICENSE("GPL");
18739 +
18740 +#define CARD_MAX_SLOTS 2
18741 +#define CARD_SLOTA 0
18742 +#define CARD_SLOTB 1
18743 +#define CARD_SLOTB_OFFSET 0x40
18744 +
18745 +#define CARD_MEM_START 0x10000000
18746 +#define CARD_MEM_END 0x13ffffff
18747 +#define CARD_MAX_MEM_OFFSET 0x3ffffff
18748 +#define CARD_MAX_MEM_SPEED 1000
18749 +
18750 +#define CARD_CONTROLLER_INDEX 0x03e0
18751 +#define CARD_CONTROLLER_DATA 0x03e1
18752 +#define CARD_CONTROLLER_SIZE 2
18753 + /* Power register */
18754 + #define VPP_GET_VCC 0x01
18755 + #define POWER_ENABLE 0x10
18756 + #define CARD_VOLTAGE_SENSE 0x1f
18757 + #define VCC_3VORXV_CAPABLE 0x00
18758 + #define VCC_XV_ONLY 0x01
18759 + #define VCC_3V_CAPABLE 0x02
18760 + #define VCC_5V_ONLY 0x03
18761 + #define CARD_VOLTAGE_SELECT 0x2f
18762 + #define VCC_3V 0x01
18763 + #define VCC_5V 0x00
18764 + #define VCC_XV 0x02
18765 + #define VCC_STATUS_3V 0x02
18766 + #define VCC_STATUS_5V 0x01
18767 + #define VCC_STATUS_XV 0x03
18768 + #define GLOBAL_CONTROL 0x1e
18769 + #define EXWRBK 0x04
18770 + #define IRQPM_EN 0x08
18771 + #define CLRPMIRQ 0x10
18772 +
18773 +#define IO_MAX_MAPS 2
18774 +#define MEM_MAX_MAPS 5
18775 +
18776 +enum {
18777 + SLOTB_PROBE = 0,
18778 + SLOTB_NOPROBE_IO,
18779 + SLOTB_NOPROBE_MEM,
18780 + SLOTB_NOPROBE_ALL
18781 +};
18782 +
18783 +typedef struct vrc4171_socket {
18784 + int noprobe;
18785 + void (*handler)(void *, unsigned int);
18786 + void *info;
18787 + socket_cap_t cap;
18788 + spinlock_t event_lock;
18789 + uint16_t events;
18790 + struct socket_info_t *pcmcia_socket;
18791 + struct tq_struct tq_task;
18792 + char name[24];
18793 + int csc_irq;
18794 + int io_irq;
18795 +} vrc4171_socket_t;
18796 +
18797 +static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
18798 +static int vrc4171_slotb = SLOTB_IS_NONE;
18799 +static unsigned int vrc4171_irq;
18800 +static uint16_t vrc4171_irq_mask = 0xdeb8;
18801 +
18802 +extern struct socket_info_t *pcmcia_register_socket(int slot,
18803 + struct pccard_operations *vtable,
18804 + int use_bus_pm);
18805 +extern void pcmcia_unregister_socket(struct socket_info_t *s);
18806 +
18807 +static inline uint8_t exca_read_byte(int slot, uint8_t index)
18808 +{
18809 + if (slot == CARD_SLOTB)
18810 + index += CARD_SLOTB_OFFSET;
18811 +
18812 + outb(index, CARD_CONTROLLER_INDEX);
18813 + return inb(CARD_CONTROLLER_DATA);
18814 +}
18815 +
18816 +static inline uint16_t exca_read_word(int slot, uint8_t index)
18817 +{
18818 + uint16_t data;
18819 +
18820 + if (slot == CARD_SLOTB)
18821 + index += CARD_SLOTB_OFFSET;
18822 +
18823 + outb(index++, CARD_CONTROLLER_INDEX);
18824 + data = inb(CARD_CONTROLLER_DATA);
18825 +
18826 + outb(index, CARD_CONTROLLER_INDEX);
18827 + data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
18828 +
18829 + return data;
18830 +}
18831 +
18832 +static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
18833 +{
18834 + if (slot == CARD_SLOTB)
18835 + index += CARD_SLOTB_OFFSET;
18836 +
18837 + outb(index, CARD_CONTROLLER_INDEX);
18838 + outb(data, CARD_CONTROLLER_DATA);
18839 +
18840 + return data;
18841 +}
18842 +
18843 +static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
18844 +{
18845 + if (slot == CARD_SLOTB)
18846 + index += CARD_SLOTB_OFFSET;
18847 +
18848 + outb(index++, CARD_CONTROLLER_INDEX);
18849 + outb(data, CARD_CONTROLLER_DATA);
18850 +
18851 + outb(index, CARD_CONTROLLER_INDEX);
18852 + outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
18853 +
18854 + return data;
18855 +}
18856 +
18857 +static inline int search_nonuse_irq(void)
18858 +{
18859 + int i;
18860 +
18861 + for (i = 0; i < 16; i++) {
18862 + if (vrc4171_irq_mask & (1 << i)) {
18863 + vrc4171_irq_mask &= ~(1 << i);
18864 + return i;
18865 + }
18866 + }
18867 +
18868 + return -1;
18869 +}
18870 +
18871 +static int pccard_init(unsigned int slot)
18872 +{
18873 + vrc4171_socket_t *socket = &vrc4171_sockets[slot];
18874 +
18875 + socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
18876 + socket->cap.irq_mask = 0;
18877 + socket->cap.pci_irq = vrc4171_irq;
18878 + socket->cap.map_size = 0x1000;
18879 + socket->events = 0;
18880 + spin_lock_init(socket->event_lock);
18881 + socket->csc_irq = search_nonuse_irq();
18882 + socket->io_irq = search_nonuse_irq();
18883 +
18884 + return 0;
18885 +}
18886 +
18887 +static int pccard_suspend(unsigned int slot)
18888 +{
18889 + return -EINVAL;
18890 +}
18891 +
18892 +static int pccard_register_callback(unsigned int slot,
18893 + void (*handler)(void *, unsigned int),
18894 + void *info)
18895 +{
18896 + vrc4171_socket_t *socket;
18897 +
18898 + if (slot >= CARD_MAX_SLOTS)
18899 + return -EINVAL;
18900 +
18901 + socket = &vrc4171_sockets[slot];
18902 +
18903 + socket->handler = handler;
18904 + socket->info = info;
18905 +
18906 + if (handler)
18907 + MOD_INC_USE_COUNT;
18908 + else
18909 + MOD_DEC_USE_COUNT;
18910 +
18911 + return 0;
18912 +}
18913 +
18914 +static int pccard_inquire_socket(unsigned int slot, socket_cap_t *cap)
18915 +{
18916 + vrc4171_socket_t *socket;
18917 +
18918 + if (slot >= CARD_MAX_SLOTS || cap == NULL)
18919 + return -EINVAL;
18920 +
18921 + socket = &vrc4171_sockets[slot];
18922 +
18923 + *cap = socket->cap;
18924 +
18925 + return 0;
18926 +}
18927 +
18928 +static int pccard_get_status(unsigned int slot, u_int *value)
18929 +{
18930 + uint8_t status, sense;
18931 + u_int val = 0;
18932 +
18933 + if (slot >= CARD_MAX_SLOTS || value == NULL)
18934 + return -EINVAL;
18935 +
18936 + status = exca_read_byte(slot, I365_STATUS);
18937 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
18938 + if (status & I365_CS_STSCHG)
18939 + val |= SS_STSCHG;
18940 + } else {
18941 + if (!(status & I365_CS_BVD1))
18942 + val |= SS_BATDEAD;
18943 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
18944 + val |= SS_BATWARN;
18945 + }
18946 + if ((status & I365_CS_DETECT) == I365_CS_DETECT)
18947 + val |= SS_DETECT;
18948 + if (status & I365_CS_WRPROT)
18949 + val |= SS_WRPROT;
18950 + if (status & I365_CS_READY)
18951 + val |= SS_READY;
18952 + if (status & I365_CS_POWERON)
18953 + val |= SS_POWERON;
18954 +
18955 + sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
18956 + switch (sense) {
18957 + case VCC_3VORXV_CAPABLE:
18958 + val |= SS_3VCARD | SS_XVCARD;
18959 + break;
18960 + case VCC_XV_ONLY:
18961 + val |= SS_XVCARD;
18962 + break;
18963 + case VCC_3V_CAPABLE:
18964 + val |= SS_3VCARD;
18965 + break;
18966 + default:
18967 + /* 5V only */
18968 + break;
18969 + }
18970 +
18971 + *value = val;
18972 +
18973 + return 0;
18974 +}
18975 +
18976 +static inline u_char get_Vcc_value(uint8_t voltage)
18977 +{
18978 + switch (voltage) {
18979 + case VCC_STATUS_3V:
18980 + return 33;
18981 + case VCC_STATUS_5V:
18982 + return 50;
18983 + default:
18984 + break;
18985 + }
18986 +
18987 + return 0;
18988 +}
18989 +
18990 +static inline u_char get_Vpp_value(uint8_t power, u_char Vcc)
18991 +{
18992 + if ((power & 0x03) == 0x01 || (power & 0x03) == 0x02)
18993 + return Vcc;
18994 +
18995 + return 0;
18996 +}
18997 +
18998 +static int pccard_get_socket(unsigned int slot, socket_state_t *state)
18999 +{
19000 + vrc4171_socket_t *socket;
19001 + uint8_t power, voltage, control, cscint;
19002 +
19003 + if (slot >= CARD_MAX_SLOTS || state == NULL)
19004 + return -EINVAL;
19005 +
19006 + socket = &vrc4171_sockets[slot];
19007 +
19008 + power = exca_read_byte(slot, I365_POWER);
19009 + voltage = exca_read_byte(slot, CARD_VOLTAGE_SELECT);
19010 +
19011 + state->Vcc = get_Vcc_value(voltage);
19012 + state->Vpp = get_Vpp_value(power, state->Vcc);
19013 +
19014 + state->flags = 0;
19015 + if (power & POWER_ENABLE)
19016 + state->flags |= SS_PWR_AUTO;
19017 + if (power & I365_PWR_OUT)
19018 + state->flags |= SS_OUTPUT_ENA;
19019 +
19020 + control = exca_read_byte(slot, I365_INTCTL);
19021 + if (control & I365_PC_IOCARD)
19022 + state->flags |= SS_IOCARD;
19023 + if (!(control & I365_PC_RESET))
19024 + state->flags |= SS_RESET;
19025 +
19026 + cscint = exca_read_byte(slot, I365_CSCINT);
19027 + state->csc_mask = 0;
19028 + if (state->flags & SS_IOCARD) {
19029 + if (cscint & I365_CSC_STSCHG)
19030 + state->flags |= SS_STSCHG;
19031 + } else {
19032 + if (cscint & I365_CSC_BVD1)
19033 + state->csc_mask |= SS_BATDEAD;
19034 + if (cscint & I365_CSC_BVD2)
19035 + state->csc_mask |= SS_BATWARN;
19036 + }
19037 + if (cscint & I365_CSC_READY)
19038 + state->csc_mask |= SS_READY;
19039 + if (cscint & I365_CSC_DETECT)
19040 + state->csc_mask |= SS_DETECT;
19041 +
19042 + return 0;
19043 +}
19044 +
19045 +static inline uint8_t set_Vcc_value(u_char Vcc)
19046 +{
19047 + switch (Vcc) {
19048 + case 33:
19049 + return VCC_3V;
19050 + case 50:
19051 + return VCC_5V;
19052 + }
19053 +
19054 + /* Small voltage is chosen for safety. */
19055 + return VCC_3V;
19056 +}
19057 +
19058 +static int pccard_set_socket(unsigned int slot, socket_state_t *state)
19059 +{
19060 + vrc4171_socket_t *socket;
19061 + uint8_t voltage, power, control, cscint;
19062 +
19063 + if (slot >= CARD_MAX_SLOTS ||
19064 + (state->Vpp != state->Vcc && state->Vpp != 0) ||
19065 + (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
19066 + return -EINVAL;
19067 +
19068 + socket = &vrc4171_sockets[slot];
19069 +
19070 + spin_lock_irq(&socket->event_lock);
19071 +
19072 + voltage = set_Vcc_value(state->Vcc);
19073 + exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
19074 +
19075 + power = POWER_ENABLE;
19076 + if (state->Vpp == state->Vcc)
19077 + power |= VPP_GET_VCC;
19078 + if (state->flags & SS_OUTPUT_ENA)
19079 + power |= I365_PWR_OUT;
19080 + exca_write_byte(slot, I365_POWER, power);
19081 +
19082 + control = 0;
19083 + if (state->io_irq != 0)
19084 + control |= socket->io_irq;
19085 + if (state->flags & SS_IOCARD)
19086 + control |= I365_PC_IOCARD;
19087 + if (state->flags & SS_RESET)
19088 + control &= ~I365_PC_RESET;
19089 + else
19090 + control |= I365_PC_RESET;
19091 + exca_write_byte(slot, I365_INTCTL, control);
19092 +
19093 + cscint = 0;
19094 + exca_write_byte(slot, I365_CSCINT, cscint);
19095 + exca_read_byte(slot, I365_CSC); /* clear CardStatus change */
19096 + if (state->csc_mask != 0)
19097 + cscint |= socket->csc_irq << 8;
19098 + if (state->flags & SS_IOCARD) {
19099 + if (state->csc_mask & SS_STSCHG)
19100 + cscint |= I365_CSC_STSCHG;
19101 + } else {
19102 + if (state->csc_mask & SS_BATDEAD)
19103 + cscint |= I365_CSC_BVD1;
19104 + if (state->csc_mask & SS_BATWARN)
19105 + cscint |= I365_CSC_BVD2;
19106 + }
19107 + if (state->csc_mask & SS_READY)
19108 + cscint |= I365_CSC_READY;
19109 + if (state->csc_mask & SS_DETECT)
19110 + cscint |= I365_CSC_DETECT;
19111 + exca_write_byte(slot, I365_CSCINT, cscint);
19112 +
19113 + spin_unlock_irq(&socket->event_lock);
19114 +
19115 + return 0;
19116 +}
19117 +
19118 +static int pccard_get_io_map(unsigned int slot, struct pccard_io_map *io)
19119 +{
19120 + vrc4171_socket_t *socket;
19121 + uint8_t ioctl, addrwin;
19122 + u_char map;
19123 +
19124 + if (slot >= CARD_MAX_SLOTS || io == NULL ||
19125 + io->map >= IO_MAX_MAPS)
19126 + return -EINVAL;
19127 +
19128 + socket = &vrc4171_sockets[slot];
19129 + map = io->map;
19130 +
19131 + io->start = exca_read_word(slot, I365_IO(map)+I365_W_START);
19132 + io->stop = exca_read_word(slot, I365_IO(map)+I365_W_STOP);
19133 +
19134 + ioctl = exca_read_byte(slot, I365_IOCTL);
19135 + if (io->flags & I365_IOCTL_WAIT(map))
19136 + io->speed = 1;
19137 + else
19138 + io->speed = 0;
19139 +
19140 + io->flags = 0;
19141 + if (ioctl & I365_IOCTL_16BIT(map))
19142 + io->flags |= MAP_16BIT;
19143 + if (ioctl & I365_IOCTL_IOCS16(map))
19144 + io->flags |= MAP_AUTOSZ;
19145 + if (ioctl & I365_IOCTL_0WS(map))
19146 + io->flags |= MAP_0WS;
19147 +
19148 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19149 + if (addrwin & I365_ENA_IO(map))
19150 + io->flags |= MAP_ACTIVE;
19151 +
19152 + return 0;
19153 +}
19154 +
19155 +static int pccard_set_io_map(unsigned int slot, struct pccard_io_map *io)
19156 +{
19157 + vrc4171_socket_t *socket;
19158 + uint8_t ioctl, addrwin;
19159 + u_char map;
19160 +
19161 + if (slot >= CARD_MAX_SLOTS ||
19162 + io == NULL || io->map >= IO_MAX_MAPS ||
19163 + io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
19164 + return -EINVAL;
19165 +
19166 + socket = &vrc4171_sockets[slot];
19167 + map = io->map;
19168 +
19169 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19170 + if (addrwin & I365_ENA_IO(map)) {
19171 + addrwin &= ~I365_ENA_IO(map);
19172 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19173 + }
19174 +
19175 + exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
19176 + exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
19177 +
19178 + ioctl = 0;
19179 + if (io->speed > 0)
19180 + ioctl |= I365_IOCTL_WAIT(map);
19181 + if (io->flags & MAP_16BIT)
19182 + ioctl |= I365_IOCTL_16BIT(map);
19183 + if (io->flags & MAP_AUTOSZ)
19184 + ioctl |= I365_IOCTL_IOCS16(map);
19185 + if (io->flags & MAP_0WS)
19186 + ioctl |= I365_IOCTL_0WS(map);
19187 + exca_write_byte(slot, I365_IOCTL, ioctl);
19188 +
19189 + if (io->flags & MAP_ACTIVE) {
19190 + addrwin |= I365_ENA_IO(map);
19191 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19192 + }
19193 +
19194 + return 0;
19195 +}
19196 +
19197 +static int pccard_get_mem_map(unsigned int slot, struct pccard_mem_map *mem)
19198 +{
19199 + vrc4171_socket_t *socket;
19200 + uint8_t addrwin;
19201 + u_long start, stop;
19202 + u_int offset;
19203 + u_char map;
19204 +
19205 + if (slot >= CARD_MAX_SLOTS || mem == NULL || mem->map >= MEM_MAX_MAPS)
19206 + return -EINVAL;
19207 +
19208 + socket = &vrc4171_sockets[slot];
19209 + map = mem->map;
19210 +
19211 + mem->flags = 0;
19212 + mem->speed = 0;
19213 +
19214 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19215 + if (addrwin & I365_ENA_MEM(map))
19216 + mem->flags |= MAP_ACTIVE;
19217 +
19218 + start = exca_read_word(slot, I365_MEM(map)+I365_W_START);
19219 + if (start & I365_MEM_16BIT)
19220 + mem->flags |= MAP_16BIT;
19221 + mem->sys_start = (start & 0x3fffUL) << 12;
19222 +
19223 + stop = exca_read_word(slot, I365_MEM(map)+I365_W_STOP);
19224 + if (start & I365_MEM_WS0)
19225 + mem->speed += 1;
19226 + if (start & I365_MEM_WS1)
19227 + mem->speed += 2;
19228 + mem->sys_stop = ((stop & 0x3fffUL) << 12) + 0xfffUL;
19229 +
19230 + offset = exca_read_word(slot, I365_MEM(map)+I365_W_OFF);
19231 + if (offset & I365_MEM_REG)
19232 + mem->flags |= MAP_ATTRIB;
19233 + if (offset & I365_MEM_WRPROT)
19234 + mem->flags |= MAP_WRPROT;
19235 + mem->card_start = (offset & 0x3fffUL) << 12;
19236 +
19237 + mem->sys_start += CARD_MEM_START;
19238 + mem->sys_stop += CARD_MEM_START;
19239 +
19240 + return 0;
19241 +}
19242 +
19243 +static int pccard_set_mem_map(unsigned int slot, struct pccard_mem_map *mem)
19244 +{
19245 + vrc4171_socket_t *socket;
19246 + uint16_t start, stop, offset;
19247 + uint8_t addrwin;
19248 + u_char map;
19249 +
19250 + if (slot >= CARD_MAX_SLOTS ||
19251 + mem == NULL || mem->map >= MEM_MAX_MAPS ||
19252 + mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END ||
19253 + mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END ||
19254 + mem->sys_start > mem->sys_stop ||
19255 + mem->card_start > CARD_MAX_MEM_OFFSET ||
19256 + mem->speed > CARD_MAX_MEM_SPEED)
19257 + return -EINVAL;
19258 +
19259 + socket = &vrc4171_sockets[slot];
19260 + map = mem->map;
19261 +
19262 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19263 + if (addrwin & I365_ENA_MEM(map)) {
19264 + addrwin &= ~I365_ENA_MEM(map);
19265 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19266 + }
19267 +
19268 + start = (mem->sys_start >> 12) & 0x3fff;
19269 + if (mem->flags & MAP_16BIT)
19270 + start |= I365_MEM_16BIT;
19271 + exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
19272 +
19273 + stop = (mem->sys_stop >> 12) & 0x3fff;
19274 + switch (mem->speed) {
19275 + case 0:
19276 + break;
19277 + case 1:
19278 + stop |= I365_MEM_WS0;
19279 + break;
19280 + case 2:
19281 + stop |= I365_MEM_WS1;
19282 + break;
19283 + default:
19284 + stop |= I365_MEM_WS0 | I365_MEM_WS1;
19285 + break;
19286 + }
19287 + exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
19288 +
19289 + offset = (mem->card_start >> 12) & 0x3fff;
19290 + if (mem->flags & MAP_ATTRIB)
19291 + offset |= I365_MEM_REG;
19292 + if (mem->flags & MAP_WRPROT)
19293 + offset |= I365_MEM_WRPROT;
19294 + exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
19295 +
19296 + if (mem->flags & MAP_ACTIVE) {
19297 + addrwin |= I365_ENA_MEM(map);
19298 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19299 + }
19300 +
19301 + return 0;
19302 +}
19303 +
19304 +static void pccard_proc_setup(unsigned int slot, struct proc_dir_entry *base)
19305 +{
19306 +}
19307 +
19308 +static struct pccard_operations vrc4171_pccard_operations = {
19309 + .init = pccard_init,
19310 + .suspend = pccard_suspend,
19311 + .register_callback = pccard_register_callback,
19312 + .inquire_socket = pccard_inquire_socket,
19313 + .get_status = pccard_get_status,
19314 + .get_socket = pccard_get_socket,
19315 + .set_socket = pccard_set_socket,
19316 + .get_io_map = pccard_get_io_map,
19317 + .set_io_map = pccard_set_io_map,
19318 + .get_mem_map = pccard_get_mem_map,
19319 + .set_mem_map = pccard_set_mem_map,
19320 + .proc_setup = pccard_proc_setup,
19321 +};
19322 +
19323 +static void pccard_bh(void *data)
19324 +{
19325 + vrc4171_socket_t *socket = (vrc4171_socket_t *)data;
19326 + uint16_t events;
19327 +
19328 + spin_lock_irq(&socket->event_lock);
19329 + events = socket->events;
19330 + socket->events = 0;
19331 + spin_unlock_irq(&socket->event_lock);
19332 +
19333 + if (socket->handler)
19334 + socket->handler(socket->info, events);
19335 +}
19336 +
19337 +static inline uint16_t get_events(int slot)
19338 +{
19339 + uint16_t events = 0;
19340 + uint8_t status, csc;
19341 +
19342 + status = exca_read_byte(slot, I365_STATUS);
19343 + csc = exca_read_byte(slot, I365_CSC);
19344 +
19345 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
19346 + if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
19347 + events |= SS_STSCHG;
19348 + } else {
19349 + if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
19350 + if (!(status & I365_CS_BVD1))
19351 + events |= SS_BATDEAD;
19352 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
19353 + events |= SS_BATWARN;
19354 + }
19355 + }
19356 + if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
19357 + events |= SS_READY;
19358 + if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
19359 + events |= SS_DETECT;
19360 +
19361 + return events;
19362 +}
19363 +
19364 +static void pccard_status_change(int slot, vrc4171_socket_t *socket)
19365 +{
19366 + uint16_t events;
19367 +
19368 + socket->tq_task.routine = pccard_bh;
19369 + socket->tq_task.data = socket;
19370 +
19371 + events = get_events(slot);
19372 + if (events) {
19373 + spin_lock(&socket->event_lock);
19374 + socket->events |= events;
19375 + spin_unlock(&socket->event_lock);
19376 + schedule_task(&socket->tq_task);
19377 + }
19378 +}
19379 +
19380 +static void pccard_interrupt(int irq, void *dev_id, struct pt_regs *regs)
19381 +{
19382 + vrc4171_socket_t *socket;
19383 + uint16_t status;
19384 +
19385 + status = vrc4171_get_irq_status();
19386 + if (status & IRQ_A) {
19387 + socket = &vrc4171_sockets[CARD_SLOTA];
19388 + if (socket->noprobe == SLOTB_PROBE) {
19389 + if (status & (1 << socket->csc_irq))
19390 + pccard_status_change(CARD_SLOTA, socket);
19391 + }
19392 + }
19393 +
19394 + if (status & IRQ_B) {
19395 + socket = &vrc4171_sockets[CARD_SLOTB];
19396 + if (socket->noprobe == SLOTB_PROBE) {
19397 + if (status & (1 << socket->csc_irq))
19398 + pccard_status_change(CARD_SLOTB, socket);
19399 + }
19400 + }
19401 +}
19402 +
19403 +static inline void reserve_using_irq(int slot)
19404 +{
19405 + unsigned int irq;
19406 +
19407 + irq = exca_read_byte(slot, I365_INTCTL);
19408 + irq &= 0x0f;
19409 + vrc4171_irq_mask &= ~(1 << irq);
19410 +
19411 + irq = exca_read_byte(slot, I365_CSCINT);
19412 + irq = (irq & 0xf0) >> 4;
19413 + vrc4171_irq_mask &= ~(1 << irq);
19414 +}
19415 +
19416 +static int __devinit vrc4171_add_socket(int slot)
19417 +{
19418 + vrc4171_socket_t *socket;
19419 +
19420 + if (slot >= CARD_MAX_SLOTS)
19421 + return -EINVAL;
19422 +
19423 + socket = &vrc4171_sockets[slot];
19424 + if (socket->noprobe != SLOTB_PROBE) {
19425 + uint8_t addrwin;
19426 +
19427 + switch (socket->noprobe) {
19428 + case SLOTB_NOPROBE_MEM:
19429 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19430 + addrwin &= 0x1f;
19431 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19432 + break;
19433 + case SLOTB_NOPROBE_IO:
19434 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
19435 + addrwin &= 0xc0;
19436 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
19437 + break;
19438 + default:
19439 + break;
19440 + }
19441 +
19442 + reserve_using_irq(slot);
19443 +
19444 + return 0;
19445 + }
19446 +
19447 + sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
19448 +
19449 + socket->pcmcia_socket = pcmcia_register_socket(slot, &vrc4171_pccard_operations, 1);
19450 + if (socket->pcmcia_socket == NULL)
19451 + return -ENOMEM;
19452 +
19453 + exca_write_byte(slot, I365_ADDRWIN, 0);
19454 +
19455 + exca_write_byte(slot, GLOBAL_CONTROL, 0);
19456 +
19457 + return 0;
19458 +}
19459 +
19460 +static void vrc4171_remove_socket(int slot)
19461 +{
19462 + vrc4171_socket_t *socket;
19463 +
19464 + if (slot >= CARD_MAX_SLOTS)
19465 + return;
19466 +
19467 + socket = &vrc4171_sockets[slot];
19468 +
19469 + if (socket->pcmcia_socket != NULL) {
19470 + pcmcia_unregister_socket(socket->pcmcia_socket);
19471 + socket->pcmcia_socket = NULL;
19472 + }
19473 +}
19474 +
19475 +static int __devinit vrc4171_card_setup(char *options)
19476 +{
19477 + if (options == NULL || *options == '\0')
19478 + return 0;
19479 +
19480 + if (strncmp(options, "irq:", 4) == 0) {
19481 + int irq;
19482 + options += 4;
19483 + irq = simple_strtoul(options, &options, 0);
19484 + if (irq >= 0 && irq < NR_IRQS)
19485 + vrc4171_irq = irq;
19486 +
19487 + if (*options != ',')
19488 + return 0;
19489 + options++;
19490 + }
19491 +
19492 + if (strncmp(options, "slota:", 6) == 0) {
19493 + options += 6;
19494 + if (*options != '\0') {
19495 + if (strncmp(options, "noprobe", 7) == 0) {
19496 + vrc4171_sockets[CARD_SLOTA].noprobe = 1;
19497 + options += 7;
19498 + }
19499 +
19500 + if (*options != ',')
19501 + return 0;
19502 + options++;
19503 + } else
19504 + return 0;
19505 +
19506 + }
19507 +
19508 + if (strncmp(options, "slotb:", 6) == 0) {
19509 + options += 6;
19510 + if (*options != '\0') {
19511 + if (strncmp(options, "pccard", 6) == 0) {
19512 + vrc4171_slotb = SLOTB_IS_PCCARD;
19513 + options += 6;
19514 + } else if (strncmp(options, "cf", 2) == 0) {
19515 + vrc4171_slotb = SLOTB_IS_CF;
19516 + options += 2;
19517 + } else if (strncmp(options, "flashrom", 8) == 0) {
19518 + vrc4171_slotb = SLOTB_IS_FLASHROM;
19519 + options += 8;
19520 + } else if (strncmp(options, "none", 4) == 0) {
19521 + vrc4171_slotb = SLOTB_IS_NONE;
19522 + options += 4;
19523 + }
19524 +
19525 + if (*options != ',')
19526 + return 0;
19527 + options++;
19528 +
19529 + if ( strncmp(options, "memnoprobe", 10) == 0)
19530 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_MEM;
19531 + if ( strncmp(options, "ionoprobe", 9) == 0)
19532 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_IO;
19533 + if ( strncmp(options, "noprobe", 7) == 0)
19534 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_ALL;
19535 + }
19536 + }
19537 +
19538 + return 0;
19539 +}
19540 +
19541 +__setup("vrc4171_card=", vrc4171_card_setup);
19542 +
19543 +static int __devinit vrc4171_card_init(void)
19544 +{
19545 + int retval, slot;
19546 +
19547 + vrc4171_set_multifunction_pin(vrc4171_slotb);
19548 +
19549 + if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE,
19550 + "NEC VRC4171 Card Controller") == NULL)
19551 + return -EBUSY;
19552 +
19553 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
19554 + if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
19555 + break;
19556 +
19557 + retval = vrc4171_add_socket(slot);
19558 + if (retval != 0)
19559 + return retval;
19560 + }
19561 +
19562 + retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
19563 + "NEC VRC4171 Card Controller", vrc4171_sockets);
19564 + if (retval < 0) {
19565 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
19566 + vrc4171_remove_socket(slot);
19567 +
19568 + return retval;
19569 + }
19570 +
19571 + printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq);
19572 +
19573 + return 0;
19574 +}
19575 +
19576 +static void __devexit vrc4171_card_exit(void)
19577 +{
19578 + int slot;
19579 +
19580 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
19581 + vrc4171_remove_socket(slot);
19582 +
19583 + release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE);
19584 +}
19585 +
19586 +module_init(vrc4171_card_init);
19587 +module_exit(vrc4171_card_exit);
19588 Index: linux-2.4.35.4/drivers/scsi/NCR53C9x.h
19589 ===================================================================
19590 --- linux-2.4.35.4.orig/drivers/scsi/NCR53C9x.h 2007-12-15 05:19:44.122935460 +0100
19591 +++ linux-2.4.35.4/drivers/scsi/NCR53C9x.h 2007-12-15 05:19:44.978984245 +0100
19592 @@ -144,12 +144,7 @@
19593
19594 #ifndef MULTIPLE_PAD_SIZES
19595
19596 -#ifdef CONFIG_CPU_HAS_WB
19597 -#include <asm/wbflush.h>
19598 -#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
19599 -#else
19600 -#define esp_write(__reg, __val) ((__reg) = (__val))
19601 -#endif
19602 +#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
19603 #define esp_read(__reg) (__reg)
19604
19605 struct ESP_regs {
19606 Index: linux-2.4.35.4/drivers/sound/au1550_i2s.c
19607 ===================================================================
19608 --- linux-2.4.35.4.orig/drivers/sound/au1550_i2s.c 2007-12-15 05:19:44.126935690 +0100
19609 +++ linux-2.4.35.4/drivers/sound/au1550_i2s.c 2007-12-15 05:19:44.982984472 +0100
19610 @@ -41,6 +41,7 @@
19611 * 675 Mass Ave, Cambridge, MA 02139, USA.
19612 *
19613 */
19614 +
19615 #include <linux/version.h>
19616 #include <linux/module.h>
19617 #include <linux/string.h>
19618 @@ -62,7 +63,45 @@
19619 #include <asm/uaccess.h>
19620 #include <asm/hardirq.h>
19621 #include <asm/au1000.h>
19622 +
19623 +#if defined(CONFIG_SOC_AU1550)
19624 #include <asm/pb1550.h>
19625 +#endif
19626 +
19627 +#if defined(CONFIG_MIPS_PB1200)
19628 +#define WM8731
19629 +#define WM_MODE_USB
19630 +#include <asm/pb1200.h>
19631 +#endif
19632 +
19633 +#if defined(CONFIG_MIPS_FICMMP)
19634 +#define WM8721
19635 +#define WM_MODE_NORMAL
19636 +#include <asm/ficmmp.h>
19637 +#endif
19638 +
19639 +
19640 +#define WM_VOLUME_MIN 47
19641 +#define WM_VOLUME_SCALE 80
19642 +
19643 +#if defined(WM8731)
19644 + /* OSS interface to the wm i2s.. */
19645 + #define CODEC_NAME "Wolfson WM8731 I2S"
19646 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM | SOUND_MASK_LINE)
19647 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK | SOUND_MASK_MIC)
19648 + #define WM_I2S_RECORD_MASK (SOUND_MASK_MIC | SOUND_MASK_LINE1 | SOUND_MASK_LINE)
19649 +#elif defined(WM8721)
19650 + #define CODEC_NAME "Wolfson WM8721 I2S"
19651 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM)
19652 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK)
19653 + #define WM_I2S_RECORD_MASK (0)
19654 +#endif
19655 +
19656 +
19657 +#define supported_mixer(FOO) ((FOO >= 0) && \
19658 + (FOO < SOUND_MIXER_NRDEVICES) && \
19659 + WM_I2S_SUPPORTED_MASK & (1<<FOO) )
19660 +
19661 #include <asm/au1xxx_psc.h>
19662 #include <asm/au1xxx_dbdma.h>
19663
19664 @@ -98,13 +137,51 @@
19665 * 0 = no VRA, 1 = use VRA if codec supports it
19666 * The framework is here, but we currently force no VRA.
19667 */
19668 +#if defined(CONFIG_MIPS_PB1200) | defined(CONFIG_MIPS_PB1550)
19669 static int vra = 0;
19670 +#elif defined(CONFIG_MIPS_FICMMP)
19671 +static int vra = 1;
19672 +#endif
19673 +
19674 +#define WM_REG_L_HEADPHONE_OUT 0x02
19675 +#define WM_REG_R_HEADPHONE_OUT 0x03
19676 +#define WM_REG_ANALOGUE_AUDIO_PATH_CTRL 0x04
19677 +#define WM_REG_DIGITAL_AUDIO_PATH_CTRL 0x05
19678 +#define WM_REG_POWER_DOWN_CTRL 0x06
19679 +#define WM_REG_DIGITAL_AUDIO_IF 0x07
19680 +#define WM_REG_SAMPLING_CONTROL 0x08
19681 +#define WM_REG_ACTIVE_CTRL 0x09
19682 +#define WM_REG_RESET 0x0F
19683 +#define WM_SC_SR_96000 (0x7<<2)
19684 +#define WM_SC_SR_88200 (0xF<<2)
19685 +#define WM_SC_SR_48000 (0x0<<2)
19686 +#define WM_SC_SR_44100 (0x8<<2)
19687 +#define WM_SC_SR_32000 (0x6<<2)
19688 +#define WM_SC_SR_8018 (0x9<<2)
19689 +#define WM_SC_SR_8000 (0x1<<2)
19690 +#define WM_SC_MODE_USB 1
19691 +#define WM_SC_MODE_NORMAL 0
19692 +#define WM_SC_BOSR_250FS (0<<1)
19693 +#define WM_SC_BOSR_272FS (1<<1)
19694 +#define WM_SC_BOSR_256FS (0<<1)
19695 +#define WM_SC_BOSR_128FS (0<<1)
19696 +#define WM_SC_BOSR_384FS (1<<1)
19697 +#define WM_SC_BOSR_192FS (1<<1)
19698 +
19699 +#define WS_64FS 31
19700 +#define WS_96FS 47
19701 +#define WS_128FS 63
19702 +#define WS_192FS 95
19703 +
19704 +#define MIN_Q_COUNT 2
19705 +
19706 MODULE_PARM(vra, "i");
19707 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
19708
19709 static struct au1550_state {
19710 /* soundcore stuff */
19711 int dev_audio;
19712 + int dev_mixer;
19713
19714 spinlock_t lock;
19715 struct semaphore open_sem;
19716 @@ -114,6 +191,11 @@
19717 int no_vra;
19718 volatile psc_i2s_t *psc_addr;
19719
19720 + int level_line;
19721 + int level_mic;
19722 + int level_left;
19723 + int level_right;
19724 +
19725 struct dmabuf {
19726 u32 dmanr;
19727 unsigned sample_rate;
19728 @@ -195,60 +277,224 @@
19729 }
19730 }
19731
19732 -/* Just a place holder. The Wolfson codec is a write only device,
19733 - * so we would have to keep a local copy of the data.
19734 - */
19735 -#if 0
19736 -static u8
19737 -rdcodec(u8 addr)
19738 -{
19739 - return 0 /* data */;
19740 -}
19741 -#endif
19742 -
19743 -
19744 static void
19745 -wrcodec(u8 ctlreg, u8 val)
19746 +wrcodec(u8 ctlreg, u16 val)
19747 {
19748 int rcnt;
19749 extern int pb1550_wm_codec_write(u8 addr, u8 reg, u8 val);
19750 -
19751 /* The codec is a write only device, with a 16-bit control/data
19752 * word. Although it is written as two bytes on the I2C, the
19753 * format is actually 7 bits of register and 9 bits of data.
19754 * The ls bit of the first byte is the ms bit of the data.
19755 */
19756 rcnt = 0;
19757 - while ((pb1550_wm_codec_write((0x36 >> 1), ctlreg, val) != 1)
19758 - && (rcnt < 50)) {
19759 + while ((pb1550_wm_codec_write((0x36 >> 1),
19760 + (ctlreg << 1) | ((val >> 8) & 0x01),
19761 + (u8) (val & 0x00FF)) != 1) &&
19762 + (rcnt < 50)) {
19763 rcnt++;
19764 -#if 0
19765 - printk("Codec write retry %02x %02x\n", ctlreg, val);
19766 -#endif
19767 }
19768 +
19769 + au1550_delay(10);
19770 +}
19771 +
19772 +static int
19773 +au1550_open_mixdev(struct inode *inode, struct file *file)
19774 +{
19775 + file->private_data = &au1550_state;
19776 + return 0;
19777 +}
19778 +
19779 +static int
19780 +au1550_release_mixdev(struct inode *inode, struct file *file)
19781 +{
19782 + return 0;
19783 +}
19784 +
19785 +static int wm_i2s_read_mixer(struct au1550_state *s, int oss_channel)
19786 +{
19787 + int ret = 0;
19788 +
19789 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
19790 + /* nice stereo mixers .. */
19791 +
19792 + ret = s->level_left | (s->level_right << 8);
19793 + } else if (oss_channel == SOUND_MIXER_MIC) {
19794 + ret = 0;
19795 + /* TODO: Implement read mixer for input/output codecs */
19796 + }
19797 +
19798 + return ret;
19799 }
19800
19801 +static void wm_i2s_write_mixer(struct au1550_state *s, int oss_channel, unsigned int left, unsigned int right)
19802 +{
19803 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
19804 + /* stereo mixers */
19805 + s->level_left = left;
19806 + s->level_right = right;
19807 +
19808 + right = (right * WM_VOLUME_SCALE) / 100;
19809 + left = (left * WM_VOLUME_SCALE) / 100;
19810 + if (right > WM_VOLUME_SCALE)
19811 + right = WM_VOLUME_SCALE;
19812 + if (left > WM_VOLUME_SCALE)
19813 + left = WM_VOLUME_SCALE;
19814 +
19815 + right += WM_VOLUME_MIN;
19816 + left += WM_VOLUME_MIN;
19817 +
19818 + wrcodec(WM_REG_L_HEADPHONE_OUT, left);
19819 + wrcodec(WM_REG_R_HEADPHONE_OUT, right);
19820 +
19821 + }else if (oss_channel == SOUND_MIXER_MIC) {
19822 + /* TODO: implement write mixer for input/output codecs */
19823 + }
19824 +}
19825 +
19826 +/* a thin wrapper for write_mixer */
19827 +static void wm_i2s_set_mixer(struct au1550_state *s, unsigned int oss_mixer, unsigned int val )
19828 +{
19829 + unsigned int left,right;
19830 +
19831 + /* cleanse input a little */
19832 + right = ((val >> 8) & 0xff) ;
19833 + left = (val & 0xff) ;
19834 +
19835 + if (right > 100) right = 100;
19836 + if (left > 100) left = 100;
19837 +
19838 + wm_i2s_write_mixer(s, oss_mixer, left, right);
19839 +}
19840 +
19841 +static int
19842 +au1550_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
19843 +{
19844 + struct au1550_state *s = (struct au1550_state *)file->private_data;
19845 +
19846 + int i, val = 0;
19847 +
19848 + if (cmd == SOUND_MIXER_INFO) {
19849 + mixer_info info;
19850 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
19851 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
19852 + info.modify_counter = 0;
19853 + if (copy_to_user((void *)arg, &info, sizeof(info)))
19854 + return -EFAULT;
19855 + return 0;
19856 + }
19857 + if (cmd == SOUND_OLD_MIXER_INFO) {
19858 + _old_mixer_info info;
19859 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
19860 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
19861 + if (copy_to_user((void *)arg, &info, sizeof(info)))
19862 + return -EFAULT;
19863 + return 0;
19864 + }
19865 +
19866 + if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
19867 + return -EINVAL;
19868 +
19869 + if (cmd == OSS_GETVERSION)
19870 + return put_user(SOUND_VERSION, (int *)arg);
19871 +
19872 + if (_SIOC_DIR(cmd) == _SIOC_READ) {
19873 + switch (_IOC_NR(cmd)) {
19874 + case SOUND_MIXER_RECSRC: /* give them the current record src */
19875 + val = 0;
19876 + /*
19877 + if (!codec->recmask_io) {
19878 + val = 0;
19879 + } else {
19880 + val = codec->recmask_io(codec, 1, 0);
19881 + }*/
19882 + break;
19883 +
19884 + case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
19885 + val = WM_I2S_SUPPORTED_MASK;
19886 + break;
19887 +
19888 + case SOUND_MIXER_RECMASK:
19889 + /* Arg contains a bit for each supported recording
19890 + * source */
19891 + val = WM_I2S_RECORD_MASK;
19892 + break;
19893 +
19894 + case SOUND_MIXER_STEREODEVS:
19895 + /* Mixer channels supporting stereo */
19896 + val = WM_I2S_STEREO_MASK;
19897 + break;
19898 +
19899 + case SOUND_MIXER_CAPS:
19900 + val = SOUND_CAP_EXCL_INPUT;
19901 + break;
19902 +
19903 + default: /* read a specific mixer */
19904 + i = _IOC_NR(cmd);
19905 +
19906 + if (!supported_mixer(i))
19907 + return -EINVAL;
19908 +
19909 + val = wm_i2s_read_mixer(s, i);
19910 + break;
19911 + }
19912 + return put_user(val, (int *)arg);
19913 + }
19914 +
19915 + if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
19916 + if (get_user(val, (int *)arg))
19917 + return -EFAULT;
19918 +
19919 + switch (_IOC_NR(cmd)) {
19920 + case SOUND_MIXER_RECSRC:
19921 + /* Arg contains a bit for each recording source */
19922 + if (!WM_I2S_RECORD_MASK)
19923 + return -EINVAL;
19924 + if (!val)
19925 + return 0;
19926 + if (!(val &= WM_I2S_RECORD_MASK))
19927 + return -EINVAL;
19928 +
19929 + return 0;
19930 + default: /* write a specific mixer */
19931 + i = _IOC_NR(cmd);
19932 +
19933 + if (!supported_mixer(i))
19934 + return -EINVAL;
19935 +
19936 + wm_i2s_set_mixer(s, i, val);
19937 +
19938 + return 0;
19939 + }
19940 +}
19941 + return -EINVAL;
19942 +}
19943 +
19944 +static loff_t
19945 +au1550_llseek(struct file *file, loff_t offset, int origin)
19946 +{
19947 + return -ESPIPE;
19948 +}
19949 +
19950 +static /*const */ struct file_operations au1550_mixer_fops = {
19951 + owner:THIS_MODULE,
19952 + llseek:au1550_llseek,
19953 + ioctl:au1550_ioctl_mixdev,
19954 + open:au1550_open_mixdev,
19955 + release:au1550_release_mixdev,
19956 +};
19957 +
19958 void
19959 -codec_init(void)
19960 +codec_init(struct au1550_state *s)
19961 {
19962 - wrcodec(0x1e, 0x00); /* Reset */
19963 - au1550_delay(200);
19964 - wrcodec(0x0c, 0x00); /* Power up everything */
19965 - au1550_delay(10);
19966 - wrcodec(0x12, 0x00); /* Deactivate codec */
19967 - au1550_delay(10);
19968 - wrcodec(0x08, 0x10); /* Select DAC outputs to line out */
19969 - au1550_delay(10);
19970 - wrcodec(0x0a, 0x00); /* Disable output mute */
19971 - au1550_delay(10);
19972 - wrcodec(0x05, 0x70); /* lower output volume on headphone */
19973 - au1550_delay(10);
19974 - wrcodec(0x0e, 0x02); /* Set slave, 16-bit, I2S modes */
19975 - au1550_delay(10);
19976 - wrcodec(0x10, 0x01); /* 12MHz (USB), 250fs */
19977 - au1550_delay(10);
19978 - wrcodec(0x12, 0x01); /* Activate codec */
19979 - au1550_delay(10);
19980 + wrcodec(WM_REG_RESET, 0x00); /* Reset */
19981 + wrcodec(WM_REG_POWER_DOWN_CTRL, 0x00); /* Power up everything */
19982 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00); /* Deactivate codec */
19983 + wrcodec(WM_REG_ANALOGUE_AUDIO_PATH_CTRL, 0x10); /* Select DAC outputs to line out */
19984 + wrcodec(WM_REG_DIGITAL_AUDIO_PATH_CTRL, 0x00); /* Disable output mute */
19985 + wm_i2s_write_mixer(s, SOUND_MIXER_PCM, 74, 74);
19986 + wrcodec(WM_REG_DIGITAL_AUDIO_IF, 0x02); /* Set slave, 16-bit, I2S modes */
19987 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01); /* Activate codec */
19988 }
19989
19990 /* stop the ADC before calling */
19991 @@ -256,27 +502,16 @@
19992 set_adc_rate(struct au1550_state *s, unsigned rate)
19993 {
19994 struct dmabuf *adc = &s->dma_adc;
19995 - struct dmabuf *dac = &s->dma_dac;
19996
19997 - if (s->no_vra) {
19998 - /* calc SRC factor
19999 - */
20000 + #if defined(WM_MODE_USB)
20001 adc->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
20002 adc->sample_rate = SAMP_RATE / adc->src_factor;
20003 return;
20004 - }
20005 + #else
20006 + //TODO: Need code for normal mode
20007 + #endif
20008
20009 adc->src_factor = 1;
20010 -
20011 -
20012 -#if 0
20013 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
20014 -
20015 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
20016 -
20017 - adc->sample_rate = rate;
20018 - dac->sample_rate = rate;
20019 -#endif
20020 }
20021
20022 /* stop the DAC before calling */
20023 @@ -284,26 +519,89 @@
20024 set_dac_rate(struct au1550_state *s, unsigned rate)
20025 {
20026 struct dmabuf *dac = &s->dma_dac;
20027 - struct dmabuf *adc = &s->dma_adc;
20028
20029 - if (s->no_vra) {
20030 - /* calc SRC factor
20031 - */
20032 - dac->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
20033 - dac->sample_rate = SAMP_RATE / dac->src_factor;
20034 - return;
20035 + u16 sr, ws, div, bosr, mode;
20036 + volatile psc_i2s_t* ip = (volatile psc_i2s_t *)I2S_PSC_BASE;
20037 + u32 cfg;
20038 +
20039 + #if defined(CONFIG_MIPS_FICMMP)
20040 + rate = ficmmp_set_i2s_sample_rate(rate);
20041 + #endif
20042 +
20043 + switch(rate)
20044 + {
20045 + case 96000:
20046 + sr = WM_SC_SR_96000;
20047 + ws = WS_64FS;
20048 + div = PSC_I2SCFG_DIV2;
20049 + break;
20050 + case 88200:
20051 + sr = WM_SC_SR_88200;
20052 + ws = WS_64FS;
20053 + div = PSC_I2SCFG_DIV2;
20054 + break;
20055 + case 44100:
20056 + sr = WM_SC_SR_44100;
20057 + ws = WS_128FS;
20058 + div = PSC_I2SCFG_DIV2;
20059 + break;
20060 + case 48000:
20061 + sr = WM_SC_SR_48000;
20062 + ws = WS_128FS;
20063 + div = PSC_I2SCFG_DIV2;
20064 + break;
20065 + case 32000:
20066 + sr = WM_SC_SR_32000;
20067 + ws = WS_96FS;
20068 + div = PSC_I2SCFG_DIV4;
20069 + break;
20070 + case 8018:
20071 + sr = WM_SC_SR_8018;
20072 + ws = WS_128FS;
20073 + div = PSC_I2SCFG_DIV2;
20074 + break;
20075 + case 8000:
20076 + default:
20077 + sr = WM_SC_SR_8000;
20078 + ws = WS_96FS;
20079 + div = PSC_I2SCFG_DIV16;
20080 + break;
20081 }
20082
20083 + #if defined(WM_MODE_USB)
20084 + mode = WM_SC_MODE_USB;
20085 + #else
20086 + mode = WM_SC_MODE_NORMAL;
20087 + #endif
20088 +
20089 + bosr = 0;
20090 +
20091 dac->src_factor = 1;
20092 + dac->sample_rate = rate;
20093
20094 -#if 0
20095 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
20096 + /* Deactivate codec */
20097 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00);
20098
20099 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
20100 + /* Disable I2S controller */
20101 + ip->psc_i2scfg &= ~PSC_I2SCFG_DE_ENABLE;
20102 + /* Wait for device disabled */
20103 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 1);
20104 +
20105 + cfg = ip->psc_i2scfg;
20106 + /* Clear WS and DIVIDER values */
20107 + cfg &= ~(PSC_I2SCFG_WS_MASK | PSC_I2SCFG_DIV_MASK);
20108 + cfg |= PSC_I2SCFG_WS(ws) | div;
20109 + /* Reconfigure and enable */
20110 + ip->psc_i2scfg = cfg | PSC_I2SCFG_DE_ENABLE;
20111
20112 - adc->sample_rate = rate;
20113 - dac->sample_rate = rate;
20114 -#endif
20115 + /* Wait for device enabled */
20116 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 0);
20117 +
20118 + /* Set appropriate sampling rate */
20119 + wrcodec(WM_REG_SAMPLING_CONTROL, bosr | mode | sr);
20120 +
20121 + /* Activate codec */
20122 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01);
20123 }
20124
20125 static void
20126 @@ -354,8 +652,7 @@
20127 ip->psc_i2spcr = PSC_I2SPCR_RP;
20128 au_sync();
20129
20130 - /* Wait for Receive Busy to show disabled.
20131 - */
20132 + /* Wait for Receive Busy to show disabled. */
20133 do {
20134 stat = ip->psc_i2sstat;
20135 au_sync();
20136 @@ -463,7 +760,6 @@
20137 if (db->num_channels == 1)
20138 db->cnt_factor *= 2;
20139 db->cnt_factor *= db->src_factor;
20140 -
20141 db->count = 0;
20142 db->dma_qcount = 0;
20143 db->nextIn = db->nextOut = db->rawbuf;
20144 @@ -546,12 +842,13 @@
20145 if (i2s_stat & (PSC_I2SSTAT_TF | PSC_I2SSTAT_TR | PSC_I2SSTAT_TF))
20146 dbg("I2S status = 0x%08x", i2s_stat);
20147 #endif
20148 +
20149 db->dma_qcount--;
20150
20151 if (db->count >= db->fragsize) {
20152 - if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20153 - db->fragsize) == 0) {
20154 - err("qcount < 2 and no ring room!");
20155 + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, db->fragsize) == 0)
20156 + {
20157 + err("qcount < MIN_Q_COUNT and no ring room!");
20158 }
20159 db->nextOut += db->fragsize;
20160 if (db->nextOut >= db->rawbuf + db->dmasize)
20161 @@ -606,65 +903,43 @@
20162
20163 }
20164
20165 -static loff_t
20166 -au1550_llseek(struct file *file, loff_t offset, int origin)
20167 -{
20168 - return -ESPIPE;
20169 -}
20170 -
20171 -
20172 -#if 0
20173 -static int
20174 -au1550_open_mixdev(struct inode *inode, struct file *file)
20175 -{
20176 - file->private_data = &au1550_state;
20177 - return 0;
20178 -}
20179 -
20180 -static int
20181 -au1550_release_mixdev(struct inode *inode, struct file *file)
20182 -{
20183 - return 0;
20184 -}
20185 -
20186 -static int
20187 -mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
20188 - unsigned long arg)
20189 -{
20190 - return codec->mixer_ioctl(codec, cmd, arg);
20191 -}
20192 -
20193 -static int
20194 -au1550_ioctl_mixdev(struct inode *inode, struct file *file,
20195 - unsigned int cmd, unsigned long arg)
20196 -{
20197 - struct au1550_state *s = (struct au1550_state *)file->private_data;
20198 - struct ac97_codec *codec = s->codec;
20199 -
20200 - return mixdev_ioctl(codec, cmd, arg);
20201 -}
20202 -
20203 -static /*const */ struct file_operations au1550_mixer_fops = {
20204 - owner:THIS_MODULE,
20205 - llseek:au1550_llseek,
20206 - ioctl:au1550_ioctl_mixdev,
20207 - open:au1550_open_mixdev,
20208 - release:au1550_release_mixdev,
20209 -};
20210 -#endif
20211 -
20212 static int
20213 drain_dac(struct au1550_state *s, int nonblock)
20214 {
20215 unsigned long flags;
20216 int count, tmo;
20217
20218 + struct dmabuf *db = &s->dma_dac;
20219 +
20220 + //DPRINTF();
20221 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
20222 return 0;
20223
20224 for (;;) {
20225 spin_lock_irqsave(&s->lock, flags);
20226 - count = s->dma_dac.count;
20227 + count = db->count;
20228 +
20229 + /* Pad the ddma buffer with zeros if the amount remaining
20230 + * is not a multiple of fragsize */
20231 + if(count % db->fragsize != 0)
20232 + {
20233 + int pad = db->fragsize - (count % db->fragsize);
20234 + char* bufptr = db->nextIn;
20235 + char* bufend = db->rawbuf + db->dmasize;
20236 +
20237 + if((bufend - bufptr) < pad)
20238 + printk("Error! ddma padding is bigger than available ring space!\n");
20239 + else
20240 + {
20241 + memset((void*)bufptr, 0, pad);
20242 + count += pad;
20243 + db->nextIn += pad;
20244 + db->count += pad;
20245 + if (db->dma_qcount == 0)
20246 + start_dac(s);
20247 + db->dma_qcount++;
20248 + }
20249 + }
20250 spin_unlock_irqrestore(&s->lock, flags);
20251 if (count <= 0)
20252 break;
20253 @@ -672,9 +947,9 @@
20254 break;
20255 if (nonblock)
20256 return -EBUSY;
20257 - tmo = 1000 * count / (s->no_vra ?
20258 - SAMP_RATE : s->dma_dac.sample_rate);
20259 + tmo = 1000 * count / s->dma_dac.sample_rate;
20260 tmo /= s->dma_dac.dma_bytes_per_sample;
20261 +
20262 au1550_delay(tmo);
20263 }
20264 if (signal_pending(current))
20265 @@ -698,8 +973,7 @@
20266 * If interpolating (no VRA), duplicate every audio frame src_factor times.
20267 */
20268 static int
20269 -translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
20270 - int dmacount)
20271 +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, int dmacount)
20272 {
20273 int sample, i;
20274 int interp_bytes_per_sample;
20275 @@ -737,11 +1011,12 @@
20276
20277 /* duplicate every audio frame src_factor times
20278 */
20279 - for (i = 0; i < db->src_factor; i++)
20280 + for (i = 0; i < db->src_factor; i++) {
20281 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
20282 + dmabuf += interp_bytes_per_sample;
20283 + }
20284
20285 userbuf += db->user_bytes_per_sample;
20286 - dmabuf += interp_bytes_per_sample;
20287 }
20288
20289 return num_samples * interp_bytes_per_sample;
20290 @@ -996,15 +1271,14 @@
20291 * on the dma queue. If the queue count reaches zero,
20292 * we know the dma has stopped.
20293 */
20294 - while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
20295 + while ((db->dma_qcount < MIN_Q_COUNT) && (db->count >= db->fragsize)) {
20296 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20297 db->fragsize) == 0) {
20298 - err("qcount < 2 and no ring room!");
20299 + err("qcount < MIN_Q_COUNT and no ring room!");
20300 }
20301 db->nextOut += db->fragsize;
20302 if (db->nextOut >= db->rawbuf + db->dmasize)
20303 db->nextOut -= db->dmasize;
20304 - db->count -= db->fragsize;
20305 db->total_bytes += db->dma_fragsize;
20306 if (db->dma_qcount == 0)
20307 start_dac(s);
20308 @@ -1017,7 +1291,6 @@
20309 buffer += usercnt;
20310 ret += usercnt;
20311 } /* while (count > 0) */
20312 -
20313 out:
20314 up(&s->sem);
20315 out2:
20316 @@ -1371,9 +1644,6 @@
20317 s->dma_dac.cnt_factor;
20318 abinfo.fragstotal = s->dma_dac.numfrag;
20319 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
20320 -#ifdef AU1000_VERBOSE_DEBUG
20321 - dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
20322 -#endif
20323 return copy_to_user((void *) arg, &abinfo,
20324 sizeof(abinfo)) ? -EFAULT : 0;
20325
20326 @@ -1536,13 +1806,9 @@
20327 case SNDCTL_DSP_SETSYNCRO:
20328 case SOUND_PCM_READ_FILTER:
20329 return -EINVAL;
20330 + default: break;
20331 }
20332 -
20333 -#if 0
20334 - return mixdev_ioctl(s->codec, cmd, arg);
20335 -#else
20336 return 0;
20337 -#endif
20338 }
20339
20340
20341 @@ -1664,15 +1930,15 @@
20342 MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
20343 MODULE_DESCRIPTION("Au1550 Audio Driver");
20344
20345 +#if defined(WM_MODE_USB)
20346 /* Set up an internal clock for the PSC3. This will then get
20347 * driven out of the Au1550 as the master.
20348 */
20349 static void
20350 intclk_setup(void)
20351 {
20352 - uint clk, rate, stat;
20353 -
20354 - /* Wire up Freq4 as a clock for the PSC3.
20355 + uint clk, rate;
20356 + /* Wire up Freq4 as a clock for the PSC.
20357 * We know SMBus uses Freq3.
20358 * By making changes to this rate, plus the word strobe
20359 * size, we can make fine adjustments to the actual data rate.
20360 @@ -1700,11 +1966,17 @@
20361 */
20362 clk = au_readl(SYS_CLKSRC);
20363 au_sync();
20364 +#if defined(CONFIG_SOC_AU1550)
20365 clk &= ~0x01f00000;
20366 clk |= (6 << 22);
20367 +#elif defined(CONFIG_SOC_AU1200)
20368 + clk &= ~0x3e000000;
20369 + clk |= (6 << 27);
20370 +#endif
20371 au_writel(clk, SYS_CLKSRC);
20372 au_sync();
20373 }
20374 +#endif
20375
20376 static int __devinit
20377 au1550_probe(void)
20378 @@ -1724,6 +1996,11 @@
20379 init_MUTEX(&s->open_sem);
20380 spin_lock_init(&s->lock);
20381
20382 + /* CPLD Mux for I2s */
20383 +
20384 +#if defined(CONFIG_MIPS_PB1200)
20385 + bcsr->resets |= BCSR_RESETS_PCS1MUX;
20386 +#endif
20387
20388 s->psc_addr = (volatile psc_i2s_t *)I2S_PSC_BASE;
20389 ip = s->psc_addr;
20390 @@ -1765,9 +2042,8 @@
20391
20392 if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
20393 goto err_dev1;
20394 -#if 0
20395 - if ((s->codec->dev_mixer =
20396 - register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
20397 +#if 1
20398 + if ((s->dev_mixer = register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
20399 goto err_dev2;
20400 #endif
20401
20402 @@ -1777,7 +2053,6 @@
20403 proc_au1550_dump, NULL);
20404 #endif /* AU1550_DEBUG */
20405
20406 - intclk_setup();
20407
20408 /* The GPIO for the appropriate PSC was configured by the
20409 * board specific start up.
20410 @@ -1786,7 +2061,12 @@
20411 */
20412 ip->psc_ctrl = PSC_CTRL_DISABLE; /* Disable PSC */
20413 au_sync();
20414 +#if defined(WM_MODE_USB)
20415 + intclk_setup();
20416 ip->psc_sel = (PSC_SEL_CLK_INTCLK | PSC_SEL_PS_I2SMODE);
20417 +#else
20418 + ip->psc_sel = (PSC_SEL_CLK_EXTCLK | PSC_SEL_PS_I2SMODE);
20419 +#endif
20420 au_sync();
20421
20422 /* Enable PSC
20423 @@ -1806,42 +2086,18 @@
20424 * Actual I2S mode (first bit delayed by one clock).
20425 * Master mode (We provide the clock from the PSC).
20426 */
20427 - val = PSC_I2SCFG_SET_LEN(16);
20428 -#ifdef TRY_441KHz
20429 - /* This really should be 250, but it appears that all of the
20430 - * PLLs, dividers and so on in the chain shift it. That's the
20431 - * problem with sourceing the clock instead of letting the very
20432 - * stable codec provide it. But, the PSC doesn't appear to want
20433 - * to work in slave mode, so this is what we get. It's not
20434 - * studio quality timing, but it's good enough for listening
20435 - * to mp3s.
20436 - */
20437 - val |= PSC_I2SCFG_SET_WS(252);
20438 -#else
20439 - val |= PSC_I2SCFG_SET_WS(250);
20440 -#endif
20441 - val |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
20442 +
20443 + val = PSC_I2SCFG_SET_LEN(16) | PSC_I2SCFG_WS(WS_128FS) | PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
20444 PSC_I2SCFG_BI | PSC_I2SCFG_XM;
20445
20446 - ip->psc_i2scfg = val;
20447 - au_sync();
20448 - val |= PSC_I2SCFG_DE_ENABLE;
20449 - ip->psc_i2scfg = val;
20450 - au_sync();
20451 + ip->psc_i2scfg = val | PSC_I2SCFG_DE_ENABLE;
20452
20453 - /* Wait for Device ready.
20454 - */
20455 - do {
20456 - val = ip->psc_i2sstat;
20457 - au_sync();
20458 - } while ((val & PSC_I2SSTAT_DR) == 0);
20459 + set_dac_rate(s, 8000); //Set default rate
20460
20461 - val = ip->psc_i2scfg;
20462 - au_sync();
20463 + codec_init(s);
20464
20465 - codec_init();
20466 + s->no_vra = vra ? 0 : 1;
20467
20468 - s->no_vra = 1;
20469 if (s->no_vra)
20470 info("no VRA, interpolating and decimating");
20471
20472 @@ -1866,6 +2122,8 @@
20473 err_dev2:
20474 unregister_sound_dsp(s->dev_audio);
20475 #endif
20476 + err_dev2:
20477 + unregister_sound_dsp(s->dev_audio);
20478 err_dev1:
20479 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
20480 err_dma2:
20481 Index: linux-2.4.35.4/drivers/sound/au1550_psc.c
20482 ===================================================================
20483 --- linux-2.4.35.4.orig/drivers/sound/au1550_psc.c 2007-12-15 05:19:44.134936145 +0100
20484 +++ linux-2.4.35.4/drivers/sound/au1550_psc.c 2007-12-15 05:19:44.982984472 +0100
20485 @@ -30,6 +30,7 @@
20486 * 675 Mass Ave, Cambridge, MA 02139, USA.
20487 *
20488 */
20489 +
20490 #include <linux/version.h>
20491 #include <linux/module.h>
20492 #include <linux/string.h>
20493 @@ -63,6 +64,14 @@
20494 #include <asm/db1x00.h>
20495 #endif
20496
20497 +#ifdef CONFIG_MIPS_PB1200
20498 +#include <asm/pb1200.h>
20499 +#endif
20500 +
20501 +#ifdef CONFIG_MIPS_DB1200
20502 +#include <asm/db1200.h>
20503 +#endif
20504 +
20505 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
20506
20507 #define AU1550_MODULE_NAME "Au1550 psc audio"
20508 @@ -521,7 +530,14 @@
20509 spin_unlock_irqrestore(&s->lock, flags);
20510 }
20511
20512 -
20513 +/*
20514 + NOTE: The xmit slots cannot be changed on the fly when in full-duplex
20515 + because the AC'97 block must be stopped/started. When using this driver
20516 + in full-duplex (in & out at the same time), the DMA engine will stop if
20517 + you disable the block.
20518 + TODO: change implementation to properly restart adc/dac after setting
20519 + xmit slots.
20520 +*/
20521 static void
20522 set_xmit_slots(int num_channels)
20523 {
20524 @@ -565,6 +581,14 @@
20525 } while ((stat & PSC_AC97STAT_DR) == 0);
20526 }
20527
20528 +/*
20529 + NOTE: The recv slots cannot be changed on the fly when in full-duplex
20530 + because the AC'97 block must be stopped/started. When using this driver
20531 + in full-duplex (in & out at the same time), the DMA engine will stop if
20532 + you disable the block.
20533 + TODO: change implementation to properly restart adc/dac after setting
20534 + recv slots.
20535 +*/
20536 static void
20537 set_recv_slots(int num_channels)
20538 {
20539 @@ -608,7 +632,6 @@
20540
20541 spin_lock_irqsave(&s->lock, flags);
20542
20543 - set_xmit_slots(db->num_channels);
20544 au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
20545 au_sync();
20546 au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
20547 @@ -640,7 +663,6 @@
20548 db->nextIn -= db->dmasize;
20549 }
20550
20551 - set_recv_slots(db->num_channels);
20552 au1xxx_dbdma_start(db->dmanr);
20553 au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
20554 au_sync();
20555 @@ -752,12 +774,16 @@
20556 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
20557 dbg("AC97C status = 0x%08x", ac97c_stat);
20558 #endif
20559 + /* There is a possiblity that we are getting 1 interrupt for
20560 + multiple descriptors. Use ddma api to find out how many
20561 + completed.
20562 + */
20563 db->dma_qcount--;
20564
20565 if (db->count >= db->fragsize) {
20566 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20567 db->fragsize) == 0) {
20568 - err("qcount < 2 and no ring room!");
20569 + err("qcount < 2 and no ring room1!");
20570 }
20571 db->nextOut += db->fragsize;
20572 if (db->nextOut >= db->rawbuf + db->dmasize)
20573 @@ -941,11 +967,12 @@
20574
20575 /* duplicate every audio frame src_factor times
20576 */
20577 - for (i = 0; i < db->src_factor; i++)
20578 + for (i = 0; i < db->src_factor; i++) {
20579 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
20580 + dmabuf += interp_bytes_per_sample;
20581 + }
20582
20583 userbuf += db->user_bytes_per_sample;
20584 - dmabuf += interp_bytes_per_sample;
20585 }
20586
20587 return num_samples * interp_bytes_per_sample;
20588 @@ -1203,7 +1230,7 @@
20589 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
20590 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
20591 db->fragsize) == 0) {
20592 - err("qcount < 2 and no ring room!");
20593 + err("qcount < 2 and no ring room!0");
20594 }
20595 db->nextOut += db->fragsize;
20596 if (db->nextOut >= db->rawbuf + db->dmasize)
20597 @@ -1481,6 +1508,7 @@
20598 return -EINVAL;
20599 stop_adc(s);
20600 s->dma_adc.num_channels = val;
20601 + set_recv_slots(val);
20602 if ((ret = prog_dmabuf_adc(s)))
20603 return ret;
20604 }
20605 @@ -1538,6 +1566,7 @@
20606 }
20607
20608 s->dma_dac.num_channels = val;
20609 + set_xmit_slots(val);
20610 if ((ret = prog_dmabuf_dac(s)))
20611 return ret;
20612 }
20613 @@ -1832,10 +1861,8 @@
20614 down(&s->open_sem);
20615 }
20616
20617 - stop_dac(s);
20618 - stop_adc(s);
20619 -
20620 if (file->f_mode & FMODE_READ) {
20621 + stop_adc(s);
20622 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
20623 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
20624 s->dma_adc.num_channels = 1;
20625 @@ -1846,6 +1873,7 @@
20626 }
20627
20628 if (file->f_mode & FMODE_WRITE) {
20629 + stop_dac(s);
20630 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
20631 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
20632 s->dma_dac.num_channels = 1;
20633 @@ -2091,6 +2119,9 @@
20634 ac97_read_proc, &s->codec);
20635 #endif
20636
20637 + set_xmit_slots(1);
20638 + set_recv_slots(1);
20639 +
20640 return 0;
20641
20642 err_dev3:
20643 Index: linux-2.4.35.4/drivers/sound/Config.in
20644 ===================================================================
20645 --- linux-2.4.35.4.orig/drivers/sound/Config.in 2007-12-15 05:19:44.142936600 +0100
20646 +++ linux-2.4.35.4/drivers/sound/Config.in 2007-12-15 05:19:44.982984472 +0100
20647 @@ -72,10 +72,15 @@
20648 if [ "$CONFIG_DDB5477" = "y" ]; then
20649 dep_tristate ' NEC Vrc5477 AC97 sound' CONFIG_SOUND_VRC5477 $CONFIG_SOUND
20650 fi
20651 -if [ "$CONFIG_SOC_AU1X00" = "y" -o "$CONFIG_SOC_AU1500" = "y" ]; then
20652 - dep_tristate ' Au1x00 Sound' CONFIG_SOUND_AU1X00 $CONFIG_SOUND
20653 - dep_tristate ' Au1550 PSC Sound' CONFIG_SOUND_AU1550_PSC $CONFIG_SOUND
20654 - dep_tristate ' Au1550 I2S Sound' CONFIG_SOUND_AU1550_I2S $CONFIG_SOUND
20655 +if [ "$CONFIG_SOC_AU1000" = "y" -o \
20656 + "$CONFIG_SOC_AU1500" = "y" -o \
20657 + "$CONFIG_SOC_AU1100" = "y" ]; then
20658 + dep_tristate ' Au1x00 AC97 Sound' CONFIG_SOUND_AU1X00 $CONFIG_SOUND
20659 +fi
20660 +if [ "$CONFIG_SOC_AU1550" = "y" -o \
20661 + "$CONFIG_SOC_AU1200" = "y" ]; then
20662 + dep_tristate ' Au1550/Au1200 PSC AC97 Sound' CONFIG_SOUND_AU1550_PSC $CONFIG_SOUND
20663 + dep_tristate ' Au1550/Au1200 PSC I2S Sound' CONFIG_SOUND_AU1550_I2S $CONFIG_SOUND
20664 fi
20665
20666 dep_tristate ' Trident 4DWave DX/NX, SiS 7018 or ALi 5451 PCI Audio Core' CONFIG_SOUND_TRIDENT $CONFIG_SOUND $CONFIG_PCI
20667 Index: linux-2.4.35.4/drivers/tc/lk201.c
20668 ===================================================================
20669 --- linux-2.4.35.4.orig/drivers/tc/lk201.c 2007-12-15 05:19:44.150937056 +0100
20670 +++ linux-2.4.35.4/drivers/tc/lk201.c 2007-12-15 05:19:44.986984701 +0100
20671 @@ -5,7 +5,7 @@
20672 * for more details.
20673 *
20674 * Copyright (C) 1999-2002 Harald Koerfgen <hkoerfg@web.de>
20675 - * Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
20676 + * Copyright (C) 2001, 2002, 2003, 2004 Maciej W. Rozycki
20677 */
20678
20679 #include <linux/config.h>
20680 @@ -23,8 +23,8 @@
20681 #include <asm/keyboard.h>
20682 #include <asm/dec/tc.h>
20683 #include <asm/dec/machtype.h>
20684 +#include <asm/dec/serial.h>
20685
20686 -#include "zs.h"
20687 #include "lk201.h"
20688
20689 /*
20690 @@ -55,19 +55,20 @@
20691 unsigned char kbd_sysrq_key = -1;
20692 #endif
20693
20694 -#define KEYB_LINE 3
20695 +#define KEYB_LINE_ZS 3
20696 +#define KEYB_LINE_DZ 0
20697
20698 -static int __init lk201_init(struct dec_serial *);
20699 -static void __init lk201_info(struct dec_serial *);
20700 -static void lk201_kbd_rx_char(unsigned char, unsigned char);
20701 +static int __init lk201_init(void *);
20702 +static void __init lk201_info(void *);
20703 +static void lk201_rx_char(unsigned char, unsigned char);
20704
20705 -struct zs_hook lk201_kbdhook = {
20706 +static struct dec_serial_hook lk201_hook = {
20707 .init_channel = lk201_init,
20708 .init_info = lk201_info,
20709 .rx_char = NULL,
20710 .poll_rx_char = NULL,
20711 .poll_tx_char = NULL,
20712 - .cflags = B4800 | CS8 | CSTOPB | CLOCAL
20713 + .cflags = B4800 | CS8 | CSTOPB | CLOCAL,
20714 };
20715
20716 /*
20717 @@ -93,28 +94,28 @@
20718 LK_CMD_ENB_BELL, LK_PARAM_VOLUME(4),
20719 };
20720
20721 -static struct dec_serial* lk201kbd_info;
20722 +static void *lk201_handle;
20723
20724 -static int lk201_send(struct dec_serial *info, unsigned char ch)
20725 +static int lk201_send(unsigned char ch)
20726 {
20727 - if (info->hook->poll_tx_char(info, ch)) {
20728 + if (lk201_hook.poll_tx_char(lk201_handle, ch)) {
20729 printk(KERN_ERR "lk201: transmit timeout\n");
20730 return -EIO;
20731 }
20732 return 0;
20733 }
20734
20735 -static inline int lk201_get_id(struct dec_serial *info)
20736 +static inline int lk201_get_id(void)
20737 {
20738 - return lk201_send(info, LK_CMD_REQ_ID);
20739 + return lk201_send(LK_CMD_REQ_ID);
20740 }
20741
20742 -static int lk201_reset(struct dec_serial *info)
20743 +static int lk201_reset(void)
20744 {
20745 int i, r;
20746
20747 for (i = 0; i < sizeof(lk201_reset_string); i++) {
20748 - r = lk201_send(info, lk201_reset_string[i]);
20749 + r = lk201_send(lk201_reset_string[i]);
20750 if (r < 0)
20751 return r;
20752 }
20753 @@ -203,24 +204,26 @@
20754
20755 static int write_kbd_rate(struct kbd_repeat *rep)
20756 {
20757 - struct dec_serial* info = lk201kbd_info;
20758 int delay, rate;
20759 int i;
20760
20761 delay = rep->delay / 5;
20762 rate = rep->rate;
20763 for (i = 0; i < 4; i++) {
20764 - if (info->hook->poll_tx_char(info, LK_CMD_RPT_RATE(i)))
20765 + if (lk201_hook.poll_tx_char(lk201_handle,
20766 + LK_CMD_RPT_RATE(i)))
20767 return 1;
20768 - if (info->hook->poll_tx_char(info, LK_PARAM_DELAY(delay)))
20769 + if (lk201_hook.poll_tx_char(lk201_handle,
20770 + LK_PARAM_DELAY(delay)))
20771 return 1;
20772 - if (info->hook->poll_tx_char(info, LK_PARAM_RATE(rate)))
20773 + if (lk201_hook.poll_tx_char(lk201_handle,
20774 + LK_PARAM_RATE(rate)))
20775 return 1;
20776 }
20777 return 0;
20778 }
20779
20780 -static int lk201kbd_rate(struct kbd_repeat *rep)
20781 +static int lk201_kbd_rate(struct kbd_repeat *rep)
20782 {
20783 if (rep == NULL)
20784 return -EINVAL;
20785 @@ -237,10 +240,8 @@
20786 return 0;
20787 }
20788
20789 -static void lk201kd_mksound(unsigned int hz, unsigned int ticks)
20790 +static void lk201_kd_mksound(unsigned int hz, unsigned int ticks)
20791 {
20792 - struct dec_serial* info = lk201kbd_info;
20793 -
20794 if (!ticks)
20795 return;
20796
20797 @@ -253,20 +254,19 @@
20798 ticks = 7;
20799 ticks = 7 - ticks;
20800
20801 - if (info->hook->poll_tx_char(info, LK_CMD_ENB_BELL))
20802 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_ENB_BELL))
20803 return;
20804 - if (info->hook->poll_tx_char(info, LK_PARAM_VOLUME(ticks)))
20805 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_VOLUME(ticks)))
20806 return;
20807 - if (info->hook->poll_tx_char(info, LK_CMD_BELL))
20808 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_BELL))
20809 return;
20810 }
20811
20812 void kbd_leds(unsigned char leds)
20813 {
20814 - struct dec_serial* info = lk201kbd_info;
20815 unsigned char l = 0;
20816
20817 - if (!info) /* FIXME */
20818 + if (!lk201_handle) /* FIXME */
20819 return;
20820
20821 /* FIXME -- Only Hold and Lock LEDs for now. --macro */
20822 @@ -275,13 +275,13 @@
20823 if (leds & LED_CAP)
20824 l |= LK_LED_LOCK;
20825
20826 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_ON))
20827 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_ON))
20828 return;
20829 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(l)))
20830 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(l)))
20831 return;
20832 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_OFF))
20833 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_OFF))
20834 return;
20835 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(~l)))
20836 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(~l)))
20837 return;
20838 }
20839
20840 @@ -307,7 +307,7 @@
20841 return 0x80;
20842 }
20843
20844 -static void lk201_kbd_rx_char(unsigned char ch, unsigned char stat)
20845 +static void lk201_rx_char(unsigned char ch, unsigned char fl)
20846 {
20847 static unsigned char id[6];
20848 static int id_i;
20849 @@ -316,9 +316,8 @@
20850 static int prev_scancode;
20851 unsigned char c = scancodeRemap[ch];
20852
20853 - if (stat && stat != TTY_OVERRUN) {
20854 - printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n",
20855 - stat);
20856 + if (fl != TTY_NORMAL && fl != TTY_OVERRUN) {
20857 + printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n", fl);
20858 return;
20859 }
20860
20861 @@ -335,7 +334,7 @@
20862 /* OK, the power-up concluded. */
20863 lk201_report(id);
20864 if (id[2] == LK_STAT_PWRUP_OK)
20865 - lk201_get_id(lk201kbd_info);
20866 + lk201_get_id();
20867 else {
20868 id_i = 0;
20869 printk(KERN_ERR "lk201: keyboard power-up "
20870 @@ -345,7 +344,7 @@
20871 /* We got the ID; report it and start operation. */
20872 id_i = 0;
20873 lk201_id(id);
20874 - lk201_reset(lk201kbd_info);
20875 + lk201_reset();
20876 }
20877 return;
20878 }
20879 @@ -398,29 +397,28 @@
20880 tasklet_schedule(&keyboard_tasklet);
20881 }
20882
20883 -static void __init lk201_info(struct dec_serial *info)
20884 +static void __init lk201_info(void *handle)
20885 {
20886 }
20887
20888 -static int __init lk201_init(struct dec_serial *info)
20889 +static int __init lk201_init(void *handle)
20890 {
20891 /* First install handlers. */
20892 - lk201kbd_info = info;
20893 - kbd_rate = lk201kbd_rate;
20894 - kd_mksound = lk201kd_mksound;
20895 + lk201_handle = handle;
20896 + kbd_rate = lk201_kbd_rate;
20897 + kd_mksound = lk201_kd_mksound;
20898
20899 - info->hook->rx_char = lk201_kbd_rx_char;
20900 + lk201_hook.rx_char = lk201_rx_char;
20901
20902 /* Then just issue a reset -- the handlers will do the rest. */
20903 - lk201_send(info, LK_CMD_POWER_UP);
20904 + lk201_send(LK_CMD_POWER_UP);
20905
20906 return 0;
20907 }
20908
20909 void __init kbd_init_hw(void)
20910 {
20911 - extern int register_zs_hook(unsigned int, struct zs_hook *);
20912 - extern int unregister_zs_hook(unsigned int);
20913 + int keyb_line;
20914
20915 /* Maxine uses LK501 at the Access.Bus. */
20916 if (!LK_IFACE)
20917 @@ -428,19 +426,15 @@
20918
20919 printk(KERN_INFO "lk201: DECstation LK keyboard driver v0.05.\n");
20920
20921 - if (LK_IFACE_ZS) {
20922 - /*
20923 - * kbd_init_hw() is being called before
20924 - * rs_init() so just register the kbd hook
20925 - * and let zs_init do the rest :-)
20926 - */
20927 - if(!register_zs_hook(KEYB_LINE, &lk201_kbdhook))
20928 - unregister_zs_hook(KEYB_LINE);
20929 - } else {
20930 - /*
20931 - * TODO: modify dz.c to allow similar hooks
20932 - * for LK201 handling on DS2100, DS3100, and DS5000/200
20933 - */
20934 - printk(KERN_ERR "lk201: support for DZ11 not yet ready.\n");
20935 - }
20936 + /*
20937 + * kbd_init_hw() is being called before
20938 + * rs_init() so just register the kbd hook
20939 + * and let zs_init do the rest :-)
20940 + */
20941 + if (LK_IFACE_ZS)
20942 + keyb_line = KEYB_LINE_ZS;
20943 + else
20944 + keyb_line = KEYB_LINE_DZ;
20945 + if (!register_dec_serial_hook(keyb_line, &lk201_hook))
20946 + unregister_dec_serial_hook(keyb_line);
20947 }
20948 Index: linux-2.4.35.4/drivers/tc/zs.c
20949 ===================================================================
20950 --- linux-2.4.35.4.orig/drivers/tc/zs.c 2007-12-15 05:19:44.158937514 +0100
20951 +++ linux-2.4.35.4/drivers/tc/zs.c 2007-12-15 05:19:44.986984701 +0100
20952 @@ -68,6 +68,8 @@
20953 #include <asm/bitops.h>
20954 #include <asm/uaccess.h>
20955 #include <asm/bootinfo.h>
20956 +#include <asm/dec/serial.h>
20957 +
20958 #ifdef CONFIG_DECSTATION
20959 #include <asm/dec/interrupts.h>
20960 #include <asm/dec/machtype.h>
20961 @@ -160,8 +162,8 @@
20962 #ifdef CONFIG_SERIAL_DEC_CONSOLE
20963 static struct console sercons;
20964 #endif
20965 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) \
20966 - && !defined(MODULE)
20967 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20968 + !defined(MODULE)
20969 static unsigned long break_pressed; /* break, really ... */
20970 #endif
20971
20972 @@ -196,7 +198,6 @@
20973 /*
20974 * Debugging.
20975 */
20976 -#undef SERIAL_DEBUG_INTR
20977 #undef SERIAL_DEBUG_OPEN
20978 #undef SERIAL_DEBUG_FLOW
20979 #undef SERIAL_DEBUG_THROTTLE
20980 @@ -221,10 +222,6 @@
20981 static struct termios *serial_termios[NUM_CHANNELS];
20982 static struct termios *serial_termios_locked[NUM_CHANNELS];
20983
20984 -#ifndef MIN
20985 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
20986 -#endif
20987 -
20988 /*
20989 * tmp_buf is used as a temporary buffer by serial_write. We need to
20990 * lock it in case the copy_from_user blocks while swapping in a page,
20991 @@ -386,8 +383,6 @@
20992 * -----------------------------------------------------------------------
20993 */
20994
20995 -static int tty_break; /* Set whenever BREAK condition is detected. */
20996 -
20997 /*
20998 * This routine is used by the interrupt handler to schedule
20999 * processing in the software interrupt portion of the driver.
21000 @@ -414,20 +409,15 @@
21001 if (!tty && (!info->hook || !info->hook->rx_char))
21002 continue;
21003
21004 - if (tty_break) {
21005 - tty_break = 0;
21006 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
21007 - if (info->line == sercons.index) {
21008 - if (!break_pressed) {
21009 - break_pressed = jiffies;
21010 - goto ignore_char;
21011 - }
21012 - break_pressed = 0;
21013 - }
21014 -#endif
21015 + flag = TTY_NORMAL;
21016 + if (info->tty_break) {
21017 + info->tty_break = 0;
21018 flag = TTY_BREAK;
21019 if (info->flags & ZILOG_SAK)
21020 do_SAK(tty);
21021 + /* Ignore the null char got when BREAK is removed. */
21022 + if (ch == 0)
21023 + continue;
21024 } else {
21025 if (stat & Rx_OVR) {
21026 flag = TTY_OVERRUN;
21027 @@ -435,20 +425,22 @@
21028 flag = TTY_FRAME;
21029 } else if (stat & PAR_ERR) {
21030 flag = TTY_PARITY;
21031 - } else
21032 - flag = 0;
21033 - if (flag)
21034 + }
21035 + if (flag != TTY_NORMAL)
21036 /* reset the error indication */
21037 write_zsreg(info->zs_channel, R0, ERR_RES);
21038 }
21039
21040 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
21041 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
21042 + !defined(MODULE)
21043 if (break_pressed && info->line == sercons.index) {
21044 - if (ch != 0 &&
21045 - time_before(jiffies, break_pressed + HZ*5)) {
21046 + /* Ignore the null char got when BREAK is removed. */
21047 + if (ch == 0)
21048 + continue;
21049 + if (time_before(jiffies, break_pressed + HZ * 5)) {
21050 handle_sysrq(ch, regs, NULL, NULL);
21051 break_pressed = 0;
21052 - goto ignore_char;
21053 + continue;
21054 }
21055 break_pressed = 0;
21056 }
21057 @@ -459,23 +451,7 @@
21058 return;
21059 }
21060
21061 - if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
21062 - static int flip_buf_ovf;
21063 - ++flip_buf_ovf;
21064 - continue;
21065 - }
21066 - tty->flip.count++;
21067 - {
21068 - static int flip_max_cnt;
21069 - if (flip_max_cnt < tty->flip.count)
21070 - flip_max_cnt = tty->flip.count;
21071 - }
21072 -
21073 - *tty->flip.flag_buf_ptr++ = flag;
21074 - *tty->flip.char_buf_ptr++ = ch;
21075 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
21076 - ignore_char:
21077 -#endif
21078 + tty_insert_flip_char(tty, ch, flag);
21079 }
21080 if (tty)
21081 tty_flip_buffer_push(tty);
21082 @@ -517,11 +493,15 @@
21083 /* Get status from Read Register 0 */
21084 stat = read_zsreg(info->zs_channel, R0);
21085
21086 - if (stat & BRK_ABRT) {
21087 -#ifdef SERIAL_DEBUG_INTR
21088 - printk("handling break....");
21089 + if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
21090 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
21091 + !defined(MODULE)
21092 + if (info->line == sercons.index) {
21093 + if (!break_pressed)
21094 + break_pressed = jiffies;
21095 + } else
21096 #endif
21097 - tty_break = 1;
21098 + info->tty_break = 1;
21099 }
21100
21101 if (info->zs_channel != info->zs_chan_a) {
21102 @@ -957,7 +937,7 @@
21103 save_flags(flags);
21104 while (1) {
21105 cli();
21106 - c = MIN(count, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
21107 + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
21108 SERIAL_XMIT_SIZE - info->xmit_head));
21109 if (c <= 0)
21110 break;
21111 @@ -965,7 +945,7 @@
21112 if (from_user) {
21113 down(&tmp_buf_sem);
21114 copy_from_user(tmp_buf, buf, c);
21115 - c = MIN(c, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
21116 + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
21117 SERIAL_XMIT_SIZE - info->xmit_head));
21118 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
21119 up(&tmp_buf_sem);
21120 @@ -1282,46 +1262,48 @@
21121 }
21122
21123 switch (cmd) {
21124 - case TIOCMGET:
21125 - error = verify_area(VERIFY_WRITE, (void *) arg,
21126 - sizeof(unsigned int));
21127 - if (error)
21128 - return error;
21129 - return get_modem_info(info, (unsigned int *) arg);
21130 - case TIOCMBIS:
21131 - case TIOCMBIC:
21132 - case TIOCMSET:
21133 - return set_modem_info(info, cmd, (unsigned int *) arg);
21134 - case TIOCGSERIAL:
21135 - error = verify_area(VERIFY_WRITE, (void *) arg,
21136 - sizeof(struct serial_struct));
21137 - if (error)
21138 - return error;
21139 - return get_serial_info(info,
21140 - (struct serial_struct *) arg);
21141 - case TIOCSSERIAL:
21142 - return set_serial_info(info,
21143 - (struct serial_struct *) arg);
21144 - case TIOCSERGETLSR: /* Get line status register */
21145 - error = verify_area(VERIFY_WRITE, (void *) arg,
21146 - sizeof(unsigned int));
21147 - if (error)
21148 - return error;
21149 - else
21150 - return get_lsr_info(info, (unsigned int *) arg);
21151 + case TIOCMGET:
21152 + error = verify_area(VERIFY_WRITE, (void *)arg,
21153 + sizeof(unsigned int));
21154 + if (error)
21155 + return error;
21156 + return get_modem_info(info, (unsigned int *)arg);
21157
21158 - case TIOCSERGSTRUCT:
21159 - error = verify_area(VERIFY_WRITE, (void *) arg,
21160 - sizeof(struct dec_serial));
21161 - if (error)
21162 - return error;
21163 - copy_from_user((struct dec_serial *) arg,
21164 - info, sizeof(struct dec_serial));
21165 - return 0;
21166 + case TIOCMBIS:
21167 + case TIOCMBIC:
21168 + case TIOCMSET:
21169 + return set_modem_info(info, cmd, (unsigned int *)arg);
21170
21171 - default:
21172 - return -ENOIOCTLCMD;
21173 - }
21174 + case TIOCGSERIAL:
21175 + error = verify_area(VERIFY_WRITE, (void *)arg,
21176 + sizeof(struct serial_struct));
21177 + if (error)
21178 + return error;
21179 + return get_serial_info(info, (struct serial_struct *)arg);
21180 +
21181 + case TIOCSSERIAL:
21182 + return set_serial_info(info, (struct serial_struct *)arg);
21183 +
21184 + case TIOCSERGETLSR: /* Get line status register */
21185 + error = verify_area(VERIFY_WRITE, (void *)arg,
21186 + sizeof(unsigned int));
21187 + if (error)
21188 + return error;
21189 + else
21190 + return get_lsr_info(info, (unsigned int *)arg);
21191 +
21192 + case TIOCSERGSTRUCT:
21193 + error = verify_area(VERIFY_WRITE, (void *)arg,
21194 + sizeof(struct dec_serial));
21195 + if (error)
21196 + return error;
21197 + copy_from_user((struct dec_serial *)arg, info,
21198 + sizeof(struct dec_serial));
21199 + return 0;
21200 +
21201 + default:
21202 + return -ENOIOCTLCMD;
21203 + }
21204 return 0;
21205 }
21206
21207 @@ -1446,7 +1428,8 @@
21208 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
21209 {
21210 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
21211 - unsigned long orig_jiffies, char_time;
21212 + unsigned long orig_jiffies;
21213 + int char_time;
21214
21215 if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
21216 return;
21217 @@ -1462,7 +1445,7 @@
21218 if (char_time == 0)
21219 char_time = 1;
21220 if (timeout)
21221 - char_time = MIN(char_time, timeout);
21222 + char_time = min(char_time, timeout);
21223 while ((read_zsreg(info->zs_channel, 1) & Tx_BUF_EMP) == 0) {
21224 current->state = TASK_INTERRUPTIBLE;
21225 schedule_timeout(char_time);
21226 @@ -1714,7 +1697,7 @@
21227
21228 static void __init show_serial_version(void)
21229 {
21230 - printk("DECstation Z8530 serial driver version 0.08\n");
21231 + printk("DECstation Z8530 serial driver version 0.09\n");
21232 }
21233
21234 /* Initialize Z8530s zs_channels
21235 @@ -1994,8 +1977,9 @@
21236 * polling I/O routines
21237 */
21238 static int
21239 -zs_poll_tx_char(struct dec_serial *info, unsigned char ch)
21240 +zs_poll_tx_char(void *handle, unsigned char ch)
21241 {
21242 + struct dec_serial *info = handle;
21243 struct dec_zschannel *chan = info->zs_channel;
21244 int ret;
21245
21246 @@ -2017,8 +2001,9 @@
21247 }
21248
21249 static int
21250 -zs_poll_rx_char(struct dec_serial *info)
21251 +zs_poll_rx_char(void *handle)
21252 {
21253 + struct dec_serial *info = handle;
21254 struct dec_zschannel *chan = info->zs_channel;
21255 int ret;
21256
21257 @@ -2038,12 +2023,13 @@
21258 return -ENODEV;
21259 }
21260
21261 -unsigned int register_zs_hook(unsigned int channel, struct zs_hook *hook)
21262 +int register_zs_hook(unsigned int channel, struct dec_serial_hook *hook)
21263 {
21264 struct dec_serial *info = &zs_soft[channel];
21265
21266 if (info->hook) {
21267 - printk(__FUNCTION__": line %d has already a hook registered\n", channel);
21268 + printk("%s: line %d has already a hook registered\n",
21269 + __FUNCTION__, channel);
21270
21271 return 0;
21272 } else {
21273 @@ -2055,7 +2041,7 @@
21274 }
21275 }
21276
21277 -unsigned int unregister_zs_hook(unsigned int channel)
21278 +int unregister_zs_hook(unsigned int channel)
21279 {
21280 struct dec_serial *info = &zs_soft[channel];
21281
21282 @@ -2063,8 +2049,8 @@
21283 info->hook = NULL;
21284 return 1;
21285 } else {
21286 - printk(__FUNCTION__": trying to unregister hook on line %d,"
21287 - " but none is registered\n", channel);
21288 + printk("%s: trying to unregister hook on line %d,"
21289 + " but none is registered\n", __FUNCTION__, channel);
21290 return 0;
21291 }
21292 }
21293 @@ -2319,22 +2305,23 @@
21294 write_zsreg(chan, 9, nine);
21295 }
21296
21297 -static int kgdbhook_init_channel(struct dec_serial* info)
21298 +static int kgdbhook_init_channel(void *handle)
21299 {
21300 return 0;
21301 }
21302
21303 -static void kgdbhook_init_info(struct dec_serial* info)
21304 +static void kgdbhook_init_info(void *handle)
21305 {
21306 }
21307
21308 -static void kgdbhook_rx_char(struct dec_serial* info,
21309 - unsigned char ch, unsigned char stat)
21310 +static void kgdbhook_rx_char(void *handle, unsigned char ch, unsigned char fl)
21311 {
21312 + struct dec_serial *info = handle;
21313 +
21314 + if (fl != TTY_NORMAL)
21315 + return;
21316 if (ch == 0x03 || ch == '$')
21317 breakpoint();
21318 - if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
21319 - write_zsreg(info->zs_channel, 0, ERR_RES);
21320 }
21321
21322 /* This sets up the serial port we're using, and turns on
21323 @@ -2360,11 +2347,11 @@
21324 * for /dev/ttyb which is determined in setup_arch() from the
21325 * boot command line flags.
21326 */
21327 -struct zs_hook zs_kgdbhook = {
21328 - init_channel : kgdbhook_init_channel,
21329 - init_info : kgdbhook_init_info,
21330 - cflags : B38400|CS8|CLOCAL,
21331 - rx_char : kgdbhook_rx_char,
21332 +struct dec_serial_hook zs_kgdbhook = {
21333 + .init_channel = kgdbhook_init_channel,
21334 + .init_info = kgdbhook_init_info,
21335 + .rx_char = kgdbhook_rx_char,
21336 + .cflags = B38400 | CS8 | CLOCAL,
21337 }
21338
21339 void __init zs_kgdb_hook(int tty_num)
21340 Index: linux-2.4.35.4/drivers/tc/zs.h
21341 ===================================================================
21342 --- linux-2.4.35.4.orig/drivers/tc/zs.h 2007-12-15 05:19:44.166937969 +0100
21343 +++ linux-2.4.35.4/drivers/tc/zs.h 2007-12-15 05:19:44.986984701 +0100
21344 @@ -1,14 +1,18 @@
21345 /*
21346 - * macserial.h: Definitions for the Macintosh Z8530 serial driver.
21347 + * drivers/tc/zs.h: Definitions for the DECstation Z85C30 serial driver.
21348 *
21349 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
21350 + * Adapted from drivers/macintosh/macserial.h by Harald Koerfgen.
21351 *
21352 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
21353 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
21354 + * Copyright (C) 2004 Maciej W. Rozycki
21355 */
21356 #ifndef _DECSERIAL_H
21357 #define _DECSERIAL_H
21358
21359 +#include <asm/dec/serial.h>
21360 +
21361 #define NUM_ZSREGS 16
21362
21363 struct serial_struct {
21364 @@ -89,63 +93,50 @@
21365 unsigned char curregs[NUM_ZSREGS];
21366 };
21367
21368 -struct dec_serial;
21369 -
21370 -struct zs_hook {
21371 - int (*init_channel)(struct dec_serial* info);
21372 - void (*init_info)(struct dec_serial* info);
21373 - void (*rx_char)(unsigned char ch, unsigned char stat);
21374 - int (*poll_rx_char)(struct dec_serial* info);
21375 - int (*poll_tx_char)(struct dec_serial* info,
21376 - unsigned char ch);
21377 - unsigned cflags;
21378 -};
21379 -
21380 struct dec_serial {
21381 - struct dec_serial *zs_next; /* For IRQ servicing chain */
21382 - struct dec_zschannel *zs_channel; /* Channel registers */
21383 - struct dec_zschannel *zs_chan_a; /* A side registers */
21384 - unsigned char read_reg_zero;
21385 -
21386 - char soft_carrier; /* Use soft carrier on this channel */
21387 - char break_abort; /* Is serial console in, so process brk/abrt */
21388 - struct zs_hook *hook; /* Hook on this channel */
21389 - char is_cons; /* Is this our console. */
21390 - unsigned char tx_active; /* character is being xmitted */
21391 - unsigned char tx_stopped; /* output is suspended */
21392 -
21393 - /* We need to know the current clock divisor
21394 - * to read the bps rate the chip has currently
21395 - * loaded.
21396 + struct dec_serial *zs_next; /* For IRQ servicing chain. */
21397 + struct dec_zschannel *zs_channel; /* Channel registers. */
21398 + struct dec_zschannel *zs_chan_a; /* A side registers. */
21399 + unsigned char read_reg_zero;
21400 +
21401 + struct dec_serial_hook *hook; /* Hook on this channel. */
21402 + int tty_break; /* Set on BREAK condition. */
21403 + int is_cons; /* Is this our console. */
21404 + int tx_active; /* Char is being xmitted. */
21405 + int tx_stopped; /* Output is suspended. */
21406 +
21407 + /*
21408 + * We need to know the current clock divisor
21409 + * to read the bps rate the chip has currently loaded.
21410 */
21411 - unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
21412 - int zs_baud;
21413 + int clk_divisor; /* May be 1, 16, 32, or 64. */
21414 + int zs_baud;
21415
21416 - char change_needed;
21417 + char change_needed;
21418
21419 int magic;
21420 int baud_base;
21421 int port;
21422 int irq;
21423 - int flags; /* defined in tty.h */
21424 - int type; /* UART type */
21425 + int flags; /* Defined in tty.h. */
21426 + int type; /* UART type. */
21427 struct tty_struct *tty;
21428 int read_status_mask;
21429 int ignore_status_mask;
21430 int timeout;
21431 int xmit_fifo_size;
21432 int custom_divisor;
21433 - int x_char; /* xon/xoff character */
21434 + int x_char; /* XON/XOFF character. */
21435 int close_delay;
21436 unsigned short closing_wait;
21437 unsigned short closing_wait2;
21438 unsigned long event;
21439 unsigned long last_active;
21440 int line;
21441 - int count; /* # of fd on device */
21442 - int blocked_open; /* # of blocked opens */
21443 - long session; /* Session of opening process */
21444 - long pgrp; /* pgrp of opening process */
21445 + int count; /* # of fds on device. */
21446 + int blocked_open; /* # of blocked opens. */
21447 + long session; /* Sess of opening process. */
21448 + long pgrp; /* Pgrp of opening process. */
21449 unsigned char *xmit_buf;
21450 int xmit_head;
21451 int xmit_tail;
21452 Index: linux-2.4.35.4/drivers/video/au1200fb.c
21453 ===================================================================
21454 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
21455 +++ linux-2.4.35.4/drivers/video/au1200fb.c 2007-12-15 05:19:44.990984927 +0100
21456 @@ -0,0 +1,1564 @@
21457 +/*
21458 + * BRIEF MODULE DESCRIPTION
21459 + * Au1200 LCD Driver.
21460 + *
21461 + * Copyright 2004 AMD
21462 + * Author: AMD
21463 + *
21464 + * Based on:
21465 + * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
21466 + * Created 28 Dec 1997 by Geert Uytterhoeven
21467 + *
21468 + * This program is free software; you can redistribute it and/or modify it
21469 + * under the terms of the GNU General Public License as published by the
21470 + * Free Software Foundation; either version 2 of the License, or (at your
21471 + * option) any later version.
21472 + *
21473 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21474 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21475 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
21476 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21477 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21478 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21479 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21480 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21481 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21482 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21483 + *
21484 + * You should have received a copy of the GNU General Public License along
21485 + * with this program; if not, write to the Free Software Foundation, Inc.,
21486 + * 675 Mass Ave, Cambridge, MA 02139, USA.
21487 + */
21488 +
21489 +#include <linux/module.h>
21490 +#include <linux/kernel.h>
21491 +#include <linux/errno.h>
21492 +#include <linux/string.h>
21493 +#include <linux/mm.h>
21494 +#include <linux/tty.h>
21495 +#include <linux/slab.h>
21496 +#include <linux/delay.h>
21497 +#include <linux/fb.h>
21498 +#include <linux/init.h>
21499 +#include <asm/uaccess.h>
21500 +
21501 +#include <asm/au1000.h>
21502 +#include <asm/au1xxx_gpio.h>
21503 +#include "au1200fb.h"
21504 +
21505 +#include <video/fbcon.h>
21506 +#include <video/fbcon-cfb16.h>
21507 +#include <video/fbcon-cfb32.h>
21508 +#define CMAPSIZE 16
21509 +
21510 +#define AU1200_LCD_GET_WINENABLE 1
21511 +#define AU1200_LCD_SET_WINENABLE 2
21512 +#define AU1200_LCD_GET_WINLOCATION 3
21513 +#define AU1200_LCD_SET_WINLOCATION 4
21514 +#define AU1200_LCD_GET_WINSIZE 5
21515 +#define AU1200_LCD_SET_WINSIZE 6
21516 +#define AU1200_LCD_GET_BACKCOLOR 7
21517 +#define AU1200_LCD_SET_BACKCOLOR 8
21518 +#define AU1200_LCD_GET_COLORKEY 9
21519 +#define AU1200_LCD_SET_COLORKEY 10
21520 +#define AU1200_LCD_GET_PANEL 11
21521 +#define AU1200_LCD_SET_PANEL 12
21522 +
21523 +typedef struct au1200_lcd_getset_t
21524 +{
21525 + unsigned int subcmd;
21526 + union {
21527 + struct {
21528 + int enable;
21529 + } winenable;
21530 + struct {
21531 + int x, y;
21532 + } winlocation;
21533 + struct {
21534 + int hsz, vsz;
21535 + } winsize;
21536 + struct {
21537 + unsigned int color;
21538 + } backcolor;
21539 + struct {
21540 + unsigned int key;
21541 + unsigned int mask;
21542 + } colorkey;
21543 + struct {
21544 + int panel;
21545 + char desc[80];
21546 + } panel;
21547 + };
21548 +} au1200_lcd_getset_t;
21549 +
21550 +AU1200_LCD *lcd = (AU1200_LCD *)AU1200_LCD_ADDR;
21551 +static int window_index = 0; /* default is zero */
21552 +static int panel_index = -1; /* default is call board_au1200fb_panel */
21553 +
21554 +struct window_settings
21555 +{
21556 + unsigned char name[64];
21557 + uint32 mode_backcolor;
21558 + uint32 mode_colorkey;
21559 + uint32 mode_colorkeymsk;
21560 + struct
21561 + {
21562 + int xres;
21563 + int yres;
21564 + int xpos;
21565 + int ypos;
21566 + uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
21567 + uint32 mode_winenable;
21568 + } w[4];
21569 +};
21570 +
21571 +struct panel_settings
21572 +{
21573 + unsigned char name[64];
21574 + /* panel physical dimensions */
21575 + uint32 Xres;
21576 + uint32 Yres;
21577 + /* panel timings */
21578 + uint32 mode_screen;
21579 + uint32 mode_horztiming;
21580 + uint32 mode_verttiming;
21581 + uint32 mode_clkcontrol;
21582 + uint32 mode_pwmdiv;
21583 + uint32 mode_pwmhi;
21584 + uint32 mode_outmask;
21585 + uint32 mode_fifoctrl;
21586 + uint32 mode_toyclksrc;
21587 + uint32 mode_backlight;
21588 + uint32 mode_auxpll;
21589 + int (*device_init)(void);
21590 + int (*device_shutdown)(void);
21591 +};
21592 +
21593 +#if defined(__BIG_ENDIAN)
21594 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00
21595 +#else
21596 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01
21597 +#endif
21598 +
21599 +extern int board_au1200fb_panel (void);
21600 +extern int board_au1200fb_panel_init (void);
21601 +extern int board_au1200fb_panel_shutdown (void);
21602 +
21603 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
21604 +extern int board_au1200fb_focus_init_hdtv(void);
21605 +extern int board_au1200fb_focus_init_component(void);
21606 +extern int board_au1200fb_focus_init_cvsv(void);
21607 +extern int board_au1200fb_focus_shutdown(void);
21608 +#endif
21609 +
21610 +/*
21611 + * Default window configurations
21612 + */
21613 +static struct window_settings windows[] =
21614 +{
21615 + { /* Index 0 */
21616 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
21617 + /* mode_backcolor */ 0x006600ff,
21618 + /* mode_colorkey,msk*/ 0, 0,
21619 + {
21620 + {
21621 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21622 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21623 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
21624 + },
21625 + {
21626 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21627 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21628 + /* mode_winenable*/ 0,
21629 + },
21630 + {
21631 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21632 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21633 + /* mode_winenable*/ 0,
21634 + },
21635 + {
21636 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21637 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21638 + /* mode_winenable*/ 0,
21639 + },
21640 + },
21641 + },
21642 +
21643 + { /* Index 1 */
21644 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
21645 + /* mode_backcolor */ 0x006600ff,
21646 + /* mode_colorkey,msk*/ 0, 0,
21647 + {
21648 + {
21649 + /* xres, yres, xpos, ypos */ 320, 240, 5, 5,
21650 +#if 0
21651 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21652 +#endif
21653 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP|LCD_WINCTRL1_PO_00,
21654 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
21655 + },
21656 + {
21657 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21658 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21659 + /* mode_winenable*/ 0,
21660 + },
21661 + {
21662 + /* xres, yres, xpos, ypos */ 100, 100, 0, 0,
21663 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21664 + /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
21665 + },
21666 + {
21667 + /* xres, yres, xpos, ypos */ 200, 25, 0, 0,
21668 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21669 + /* mode_winenable*/ 0,
21670 + },
21671 + },
21672 + },
21673 + /* Need VGA 640 @ 24bpp, @ 32bpp */
21674 + /* Need VGA 800 @ 24bpp, @ 32bpp */
21675 + /* Need VGA 1024 @ 24bpp, @ 32bpp */
21676 +} ;
21677 +
21678 +/*
21679 + * Controller configurations for various panels.
21680 + */
21681 +static struct panel_settings panels[] =
21682 +{
21683 + { /* Index 0: QVGA 320x240 H:33.3kHz V:110Hz */
21684 + "VGA_320x240",
21685 + 320, 240,
21686 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
21687 + /* mode_horztiming */ 0x00c4623b,
21688 + /* mode_verttiming */ 0x00502814,
21689 + /* mode_clkcontrol */ 0x00020002, /* /4=24Mhz */
21690 + /* mode_pwmdiv */ 0x00000000,
21691 + /* mode_pwmhi */ 0x00000000,
21692 + /* mode_outmask */ 0x00FFFFFF,
21693 + /* mode_fifoctrl */ 0x2f2f2f2f,
21694 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21695 + /* mode_backlight */ 0x00000000,
21696 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21697 + /* device_init */ NULL,
21698 + /* device_shutdown */ NULL,
21699 + },
21700 +
21701 + { /* Index 1: VGA 640x480 H:30.3kHz V:58Hz */
21702 + "VGA_640x480",
21703 + 640, 480,
21704 + /* mode_screen */ 0x13f9df80,
21705 + /* mode_horztiming */ 0x003c5859,
21706 + /* mode_verttiming */ 0x00741201,
21707 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
21708 + /* mode_pwmdiv */ 0x00000000,
21709 + /* mode_pwmhi */ 0x00000000,
21710 + /* mode_outmask */ 0x00FFFFFF,
21711 + /* mode_fifoctrl */ 0x2f2f2f2f,
21712 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21713 + /* mode_backlight */ 0x00000000,
21714 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21715 + /* device_init */ NULL,
21716 + /* device_shutdown */ NULL,
21717 + },
21718 +
21719 + { /* Index 2: SVGA 800x600 H:46.1kHz V:69Hz */
21720 + "SVGA_800x600",
21721 + 800, 600,
21722 + /* mode_screen */ 0x18fa5780,
21723 + /* mode_horztiming */ 0x00dc7e77,
21724 + /* mode_verttiming */ 0x00584805,
21725 + /* mode_clkcontrol */ 0x00020000, /* /2=48Mhz */
21726 + /* mode_pwmdiv */ 0x00000000,
21727 + /* mode_pwmhi */ 0x00000000,
21728 + /* mode_outmask */ 0x00FFFFFF,
21729 + /* mode_fifoctrl */ 0x2f2f2f2f,
21730 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21731 + /* mode_backlight */ 0x00000000,
21732 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21733 + /* device_init */ NULL,
21734 + /* device_shutdown */ NULL,
21735 + },
21736 +
21737 + { /* Index 3: XVGA 1024x768 H:56.2kHz V:70Hz */
21738 + "XVGA_1024x768",
21739 + 1024, 768,
21740 + /* mode_screen */ 0x1ffaff80,
21741 + /* mode_horztiming */ 0x007d0e57,
21742 + /* mode_verttiming */ 0x00740a01,
21743 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
21744 + /* mode_pwmdiv */ 0x00000000,
21745 + /* mode_pwmhi */ 0x00000000,
21746 + /* mode_outmask */ 0x00FFFFFF,
21747 + /* mode_fifoctrl */ 0x2f2f2f2f,
21748 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21749 + /* mode_backlight */ 0x00000000,
21750 + /* mode_auxpll */ 6, /* 72MHz AUXPLL */
21751 + /* device_init */ NULL,
21752 + /* device_shutdown */ NULL,
21753 + },
21754 +
21755 + { /* Index 4: XVGA 1280x1024 H:68.5kHz V:65Hz */
21756 + "XVGA_1280x1024",
21757 + 1280, 1024,
21758 + /* mode_screen */ 0x27fbff80,
21759 + /* mode_horztiming */ 0x00cdb2c7,
21760 + /* mode_verttiming */ 0x00600002,
21761 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
21762 + /* mode_pwmdiv */ 0x00000000,
21763 + /* mode_pwmhi */ 0x00000000,
21764 + /* mode_outmask */ 0x00FFFFFF,
21765 + /* mode_fifoctrl */ 0x2f2f2f2f,
21766 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21767 + /* mode_backlight */ 0x00000000,
21768 + /* mode_auxpll */ 10, /* 120MHz AUXPLL */
21769 + /* device_init */ NULL,
21770 + /* device_shutdown */ NULL,
21771 + },
21772 +
21773 + { /* Index 5: Samsung 1024x768 TFT */
21774 + "Samsung_1024x768_TFT",
21775 + 1024, 768,
21776 + /* mode_screen */ 0x1ffaff80,
21777 + /* mode_horztiming */ 0x018cc677,
21778 + /* mode_verttiming */ 0x00241217,
21779 + /* mode_clkcontrol */ 0x00000000, /* SCB 0x1 /4=24Mhz */
21780 + /* mode_pwmdiv */ 0x8000063f, /* SCB 0x0 */
21781 + /* mode_pwmhi */ 0x03400000, /* SCB 0x0 */
21782 + /* mode_outmask */ 0x00fcfcfc,
21783 + /* mode_fifoctrl */ 0x2f2f2f2f,
21784 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21785 + /* mode_backlight */ 0x00000000,
21786 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21787 + /* device_init */ board_au1200fb_panel_init,
21788 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21789 + },
21790 +
21791 + { /* Index 6: Toshiba 640x480 TFT */
21792 + "Toshiba_640x480_TFT",
21793 + 640, 480,
21794 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21795 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(96) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51),
21796 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32) ,
21797 + /* mode_clkcontrol */ 0x00000000, /* /4=24Mhz */
21798 + /* mode_pwmdiv */ 0x8000063f,
21799 + /* mode_pwmhi */ 0x03400000,
21800 + /* mode_outmask */ 0x00fcfcfc,
21801 + /* mode_fifoctrl */ 0x2f2f2f2f,
21802 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21803 + /* mode_backlight */ 0x00000000,
21804 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21805 + /* device_init */ board_au1200fb_panel_init,
21806 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21807 + },
21808 +
21809 + { /* Index 7: Sharp 320x240 TFT */
21810 + "Sharp_320x240_TFT",
21811 + 320, 240,
21812 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
21813 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(60) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2),
21814 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5) ,
21815 + /* mode_clkcontrol */ LCD_CLKCONTROL_PCD_N(7), /* /16=6Mhz */
21816 + /* mode_pwmdiv */ 0x8000063f,
21817 + /* mode_pwmhi */ 0x03400000,
21818 + /* mode_outmask */ 0x00fcfcfc,
21819 + /* mode_fifoctrl */ 0x2f2f2f2f,
21820 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21821 + /* mode_backlight */ 0x00000000,
21822 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21823 + /* device_init */ board_au1200fb_panel_init,
21824 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21825 + },
21826 + { /* Index 8: Toppoly TD070WGCB2 7" 854x480 TFT */
21827 + "Toppoly_TD070WGCB2",
21828 + 854, 480,
21829 + /* mode_screen */ LCD_SCREEN_SX_N(854) | LCD_SCREEN_SY_N(480),
21830 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(44) | LCD_HORZTIMING_HND1_N(44) | LCD_HORZTIMING_HPW_N(114),
21831 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(20) | LCD_VERTTIMING_VND1_N(21) | LCD_VERTTIMING_VPW_N(4),
21832 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
21833 + /* mode_pwmdiv */ 0x8000063f,
21834 + /* mode_pwmhi */ 0x03400000,
21835 + /* mode_outmask */ 0x00FCFCFC,
21836 + /* mode_fifoctrl */ 0x2f2f2f2f,
21837 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21838 + /* mode_backlight */ 0x00000000,
21839 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21840 + /* device_init */ board_au1200fb_panel_init,
21841 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21842 + },
21843 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
21844 + { /* Index 9: Focus FS453 TV-Out 640x480 */
21845 + "FS453_640x480 (Composite/S-Video)",
21846 + 640, 480,
21847 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21848 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
21849 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
21850 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21851 + /* mode_pwmdiv */ 0x00000000,
21852 + /* mode_pwmhi */ 0x00000000,
21853 + /* mode_outmask */ 0x00FFFFFF,
21854 + /* mode_fifoctrl */ 0x2f2f2f2f,
21855 + /* mode_toyclksrc */ 0x00000000,
21856 + /* mode_backlight */ 0x00000000,
21857 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21858 + /* device_init */ board_au1200fb_focus_init_cvsv,
21859 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21860 + },
21861 +
21862 + { /* Index 10: Focus FS453 TV-Out 640x480 */
21863 + "FS453_640x480 (Component Video)",
21864 + 640, 480,
21865 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21866 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
21867 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
21868 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21869 + /* mode_pwmdiv */ 0x00000000,
21870 + /* mode_pwmhi */ 0x00000000,
21871 + /* mode_outmask */ 0x00FFFFFF,
21872 + /* mode_fifoctrl */ 0x2f2f2f2f,
21873 + /* mode_toyclksrc */ 0x00000000,
21874 + /* mode_backlight */ 0x00000000,
21875 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21876 + /* device_init */ board_au1200fb_focus_init_component,
21877 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21878 + },
21879 +
21880 + { /* Index 11: Focus FS453 TV-Out 640x480 */
21881 + "FS453_640x480 (HDTV)",
21882 + 720, 480,
21883 + /* mode_screen */ LCD_SCREEN_SX_N(720) | LCD_SCREEN_SY_N(480),
21884 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(28) | LCD_HORZTIMING_HND1_N(46) | LCD_HORZTIMING_HPW_N(64),
21885 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(7) | LCD_VERTTIMING_VND1_N(31) | LCD_VERTTIMING_VPW_N(7),
21886 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21887 + /* mode_pwmdiv */ 0x00000000,
21888 + /* mode_pwmhi */ 0x00000000,
21889 + /* mode_outmask */ 0x00FFFFFF,
21890 + /* mode_fifoctrl */ 0x2f2f2f2f,
21891 + /* mode_toyclksrc */ 0x00000000,
21892 + /* mode_backlight */ 0x00000000,
21893 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21894 + /* device_init */ board_au1200fb_focus_init_hdtv,
21895 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21896 + },
21897 +#endif
21898 +};
21899 +
21900 +#define NUM_PANELS (sizeof(panels) / sizeof(struct panel_settings))
21901 +
21902 +static struct window_settings *win;
21903 +static struct panel_settings *panel;
21904 +
21905 +struct au1200fb_info {
21906 + struct fb_info_gen gen;
21907 + unsigned long fb_virt_start;
21908 + unsigned long fb_size;
21909 + unsigned long fb_phys;
21910 + int mmaped;
21911 + int nohwcursor;
21912 + int noblanking;
21913 +
21914 + struct { unsigned red, green, blue, pad; } palette[256];
21915 +
21916 +#if defined(FBCON_HAS_CFB16)
21917 + u16 fbcon_cmap16[16];
21918 +#endif
21919 +#if defined(FBCON_HAS_CFB32)
21920 + u32 fbcon_cmap32[16];
21921 +#endif
21922 +};
21923 +
21924 +
21925 +struct au1200fb_par {
21926 + struct fb_var_screeninfo var;
21927 +
21928 + int line_length; /* in bytes */
21929 + int cmap_len; /* color-map length */
21930 +};
21931 +
21932 +#ifndef CONFIG_FB_AU1200_DEVS
21933 +#define CONFIG_FB_AU1200_DEVS 1
21934 +#endif
21935 +
21936 +static struct au1200fb_info fb_infos[CONFIG_FB_AU1200_DEVS];
21937 +static struct au1200fb_par fb_pars[CONFIG_FB_AU1200_DEVS];
21938 +static struct display disps[CONFIG_FB_AU1200_DEVS];
21939 +
21940 +int au1200fb_init(void);
21941 +void au1200fb_setup(char *options, int *ints);
21942 +static int au1200fb_mmap(struct fb_info *fb, struct file *file,
21943 + struct vm_area_struct *vma);
21944 +static int au1200_blank(int blank_mode, struct fb_info_gen *info);
21945 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
21946 + u_long arg, int con, struct fb_info *info);
21947 +
21948 +void au1200_nocursor(struct display *p, int mode, int xx, int yy){};
21949 +
21950 +static int au1200_setlocation (int plane, int xpos, int ypos);
21951 +static int au1200_setsize (int plane, int xres, int yres);
21952 +static void au1200_setmode(int plane);
21953 +static void au1200_setpanel (struct panel_settings *newpanel);
21954 +
21955 +static struct fb_ops au1200fb_ops = {
21956 + owner: THIS_MODULE,
21957 + fb_get_fix: fbgen_get_fix,
21958 + fb_get_var: fbgen_get_var,
21959 + fb_set_var: fbgen_set_var,
21960 + fb_get_cmap: fbgen_get_cmap,
21961 + fb_set_cmap: fbgen_set_cmap,
21962 + fb_pan_display: fbgen_pan_display,
21963 + fb_ioctl: au1200fb_ioctl,
21964 + fb_mmap: au1200fb_mmap,
21965 +};
21966 +
21967 +
21968 +static int
21969 +winbpp (unsigned int winctrl1)
21970 +{
21971 + /* how many bytes of memory are needed for each pixel format */
21972 + switch (winctrl1 & LCD_WINCTRL1_FRM)
21973 + {
21974 + case LCD_WINCTRL1_FRM_1BPP: return 1; break;
21975 + case LCD_WINCTRL1_FRM_2BPP: return 2; break;
21976 + case LCD_WINCTRL1_FRM_4BPP: return 4; break;
21977 + case LCD_WINCTRL1_FRM_8BPP: return 8; break;
21978 + case LCD_WINCTRL1_FRM_12BPP: return 16; break;
21979 + case LCD_WINCTRL1_FRM_16BPP655: return 16; break;
21980 + case LCD_WINCTRL1_FRM_16BPP565: return 16; break;
21981 + case LCD_WINCTRL1_FRM_16BPP556: return 16; break;
21982 + case LCD_WINCTRL1_FRM_16BPPI1555: return 16; break;
21983 + case LCD_WINCTRL1_FRM_16BPPI5551: return 16; break;
21984 + case LCD_WINCTRL1_FRM_16BPPA1555: return 16; break;
21985 + case LCD_WINCTRL1_FRM_16BPPA5551: return 16; break;
21986 + case LCD_WINCTRL1_FRM_24BPP: return 32; break;
21987 + case LCD_WINCTRL1_FRM_32BPP: return 32; break;
21988 + default: return 0; break;
21989 + }
21990 +}
21991 +
21992 +static int
21993 +fbinfo2index (struct fb_info *fb_info)
21994 +{
21995 + int i;
21996 + for (i = 0; i < CONFIG_FB_AU1200_DEVS; ++i)
21997 + {
21998 + if (fb_info == (struct fb_info *)(&fb_infos[i]))
21999 + return i;
22000 + }
22001 + printk("au1200fb: ERROR: fbinfo2index failed!\n");
22002 + return -1;
22003 +}
22004 +
22005 +static void au1200_detect(void)
22006 +{
22007 + /*
22008 + * This function should detect the current video mode settings
22009 + * and store it as the default video mode
22010 + * Yeh, well, we're not going to change any settings so we're
22011 + * always stuck with the default ...
22012 + */
22013 +}
22014 +
22015 +static int au1200_encode_fix(struct fb_fix_screeninfo *fix,
22016 + const void *_par, struct fb_info_gen *_info)
22017 +{
22018 + struct au1200fb_info *info = (struct au1200fb_info *) _info;
22019 + struct au1200fb_par *par = (struct au1200fb_par *) _par;
22020 + int plane;
22021 +
22022 + plane = fbinfo2index(info);
22023 +
22024 + memset(fix, 0, sizeof(struct fb_fix_screeninfo));
22025 +
22026 + fix->smem_start = info->fb_phys;
22027 + fix->smem_len = info->fb_size;
22028 + fix->type = FB_TYPE_PACKED_PIXELS;
22029 + fix->type_aux = 0;
22030 + fix->visual = (par->var.bits_per_pixel == 8) ?
22031 + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
22032 + fix->ywrapstep = 0;
22033 + fix->xpanstep = 1;
22034 + fix->ypanstep = 1;
22035 + /* FIX!!!! why doesn't par->line_length work???? it does for au1100 */
22036 + fix->line_length = fb_pars[plane].line_length; /*par->line_length;*/
22037 + return 0;
22038 +}
22039 +
22040 +static void set_color_bitfields(struct fb_var_screeninfo *var, int plane)
22041 +{
22042 + if (var->bits_per_pixel == 8)
22043 + {
22044 + var->red.offset = 0;
22045 + var->red.length = 8;
22046 + var->green.offset = 0;
22047 + var->green.length = 8;
22048 + var->blue.offset = 0;
22049 + var->blue.length = 8;
22050 + var->transp.offset = 0;
22051 + var->transp.length = 0;
22052 + }
22053 + else
22054 +
22055 + if (var->bits_per_pixel == 16)
22056 + {
22057 + /* FIX!!! How does CCO affect this ? */
22058 + /* FIX!!! Not exactly sure how many of these work with FB */
22059 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
22060 + {
22061 + case LCD_WINCTRL1_FRM_16BPP655:
22062 + var->red.offset = 10;
22063 + var->red.length = 6;
22064 + var->green.offset = 5;
22065 + var->green.length = 5;
22066 + var->blue.offset = 0;
22067 + var->blue.length = 5;
22068 + var->transp.offset = 0;
22069 + var->transp.length = 0;
22070 + break;
22071 +
22072 + case LCD_WINCTRL1_FRM_16BPP565:
22073 + var->red.offset = 11;
22074 + var->red.length = 5;
22075 + var->green.offset = 5;
22076 + var->green.length = 6;
22077 + var->blue.offset = 0;
22078 + var->blue.length = 5;
22079 + var->transp.offset = 0;
22080 + var->transp.length = 0;
22081 + break;
22082 +
22083 + case LCD_WINCTRL1_FRM_16BPP556:
22084 + var->red.offset = 11;
22085 + var->red.length = 5;
22086 + var->green.offset = 6;
22087 + var->green.length = 5;
22088 + var->blue.offset = 0;
22089 + var->blue.length = 6;
22090 + var->transp.offset = 0;
22091 + var->transp.length = 0;
22092 + break;
22093 +
22094 + case LCD_WINCTRL1_FRM_16BPPI1555:
22095 + var->red.offset = 10;
22096 + var->red.length = 5;
22097 + var->green.offset = 5;
22098 + var->green.length = 5;
22099 + var->blue.offset = 0;
22100 + var->blue.length = 5;
22101 + var->transp.offset = 0;
22102 + var->transp.length = 0;
22103 + break;
22104 +
22105 + case LCD_WINCTRL1_FRM_16BPPI5551:
22106 + var->red.offset = 11;
22107 + var->red.length = 5;
22108 + var->green.offset = 6;
22109 + var->green.length = 5;
22110 + var->blue.offset = 1;
22111 + var->blue.length = 5;
22112 + var->transp.offset = 0;
22113 + var->transp.length = 0;
22114 + break;
22115 +
22116 + case LCD_WINCTRL1_FRM_16BPPA1555:
22117 + var->red.offset = 10;
22118 + var->red.length = 5;
22119 + var->green.offset = 5;
22120 + var->green.length = 5;
22121 + var->blue.offset = 0;
22122 + var->blue.length = 5;
22123 + var->transp.offset = 15;
22124 + var->transp.length = 1;
22125 + break;
22126 +
22127 + case LCD_WINCTRL1_FRM_16BPPA5551:
22128 + var->red.offset = 11;
22129 + var->red.length = 5;
22130 + var->green.offset = 6;
22131 + var->green.length = 5;
22132 + var->blue.offset = 1;
22133 + var->blue.length = 5;
22134 + var->transp.offset = 0;
22135 + var->transp.length = 1;
22136 + break;
22137 +
22138 + default:
22139 + printk("ERROR: Invalid PIXEL FORMAT!!!\n"); break;
22140 + }
22141 + }
22142 + else
22143 +
22144 + if (var->bits_per_pixel == 32)
22145 + {
22146 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
22147 + {
22148 + case LCD_WINCTRL1_FRM_24BPP:
22149 + var->red.offset = 16;
22150 + var->red.length = 8;
22151 + var->green.offset = 8;
22152 + var->green.length = 8;
22153 + var->blue.offset = 0;
22154 + var->blue.length = 8;
22155 + var->transp.offset = 0;
22156 + var->transp.length = 0;
22157 + break;
22158 +
22159 + case LCD_WINCTRL1_FRM_32BPP:
22160 + var->red.offset = 16;
22161 + var->red.length = 8;
22162 + var->green.offset = 8;
22163 + var->green.length = 8;
22164 + var->blue.offset = 0;
22165 + var->blue.length = 8;
22166 + var->transp.offset = 24;
22167 + var->transp.length = 8;
22168 + break;
22169 + }
22170 + }
22171 + var->red.msb_right = 0;
22172 + var->green.msb_right = 0;
22173 + var->blue.msb_right = 0;
22174 + var->transp.msb_right = 0;
22175 +#if 0
22176 +printk("set_color_bitfields(a=%d, r=%d..%d, g=%d..%d, b=%d..%d)\n",
22177 + var->transp.offset,
22178 + var->red.offset+var->red.length-1, var->red.offset,
22179 + var->green.offset+var->green.length-1, var->green.offset,
22180 + var->blue.offset+var->blue.length-1, var->blue.offset);
22181 +#endif
22182 +}
22183 +
22184 +static int au1200_decode_var(const struct fb_var_screeninfo *var,
22185 + void *_par, struct fb_info_gen *_info)
22186 +{
22187 + struct au1200fb_par *par = (struct au1200fb_par *)_par;
22188 + int plane, bpp;
22189 +
22190 + plane = fbinfo2index((struct fb_info *)_info);
22191 +
22192 + /*
22193 + * Don't allow setting any of these yet: xres and yres don't
22194 + * make sense for LCD panels.
22195 + */
22196 + if (var->xres != win->w[plane].xres ||
22197 + var->yres != win->w[plane].yres ||
22198 + var->xres != win->w[plane].xres ||
22199 + var->yres != win->w[plane].yres) {
22200 + return -EINVAL;
22201 + }
22202 +
22203 + bpp = winbpp(win->w[plane].mode_winctrl1);
22204 + if(var->bits_per_pixel != bpp) {
22205 + /* on au1200, window pixel format is independent of panel pixel */
22206 + printk("WARNING: bits_per_pizel != panel->bpp\n");
22207 + }
22208 +
22209 + memset(par, 0, sizeof(struct au1200fb_par));
22210 + par->var = *var;
22211 +
22212 + /* FIX!!! */
22213 + switch (var->bits_per_pixel) {
22214 + case 8:
22215 + par->var.bits_per_pixel = 8;
22216 + break;
22217 + case 16:
22218 + par->var.bits_per_pixel = 16;
22219 + break;
22220 + case 24:
22221 + case 32:
22222 + par->var.bits_per_pixel = 32;
22223 + break;
22224 + default:
22225 + printk("color depth %d bpp not supported\n",
22226 + var->bits_per_pixel);
22227 + return -EINVAL;
22228 +
22229 + }
22230 + set_color_bitfields(&par->var, plane);
22231 + /* FIX!!! what is this for 24/32bpp? */
22232 + par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
22233 + return 0;
22234 +}
22235 +
22236 +static int au1200_encode_var(struct fb_var_screeninfo *var,
22237 + const void *par, struct fb_info_gen *_info)
22238 +{
22239 + *var = ((struct au1200fb_par *)par)->var;
22240 + return 0;
22241 +}
22242 +
22243 +static void
22244 +au1200_get_par(void *_par, struct fb_info_gen *_info)
22245 +{
22246 + int index;
22247 +
22248 + index = fbinfo2index((struct fb_info *)_info);
22249 + *(struct au1200fb_par *)_par = fb_pars[index];
22250 +}
22251 +
22252 +static void au1200_set_par(const void *par, struct fb_info_gen *info)
22253 +{
22254 + /* nothing to do: we don't change any settings */
22255 +}
22256 +
22257 +static int au1200_getcolreg(unsigned regno, unsigned *red, unsigned *green,
22258 + unsigned *blue, unsigned *transp,
22259 + struct fb_info *info)
22260 +{
22261 + struct au1200fb_info* i = (struct au1200fb_info*)info;
22262 +
22263 + if (regno > 255)
22264 + return 1;
22265 +
22266 + *red = i->palette[regno].red;
22267 + *green = i->palette[regno].green;
22268 + *blue = i->palette[regno].blue;
22269 + *transp = 0;
22270 +
22271 + return 0;
22272 +}
22273 +
22274 +static int au1200_setcolreg(unsigned regno, unsigned red, unsigned green,
22275 + unsigned blue, unsigned transp,
22276 + struct fb_info *info)
22277 +{
22278 + struct au1200fb_info* i = (struct au1200fb_info *)info;
22279 + u32 rgbcol;
22280 + int plane, bpp;
22281 +
22282 + plane = fbinfo2index((struct fb_info *)info);
22283 + bpp = winbpp(win->w[plane].mode_winctrl1);
22284 +
22285 + if (regno > 255)
22286 + return 1;
22287 +
22288 + i->palette[regno].red = red;
22289 + i->palette[regno].green = green;
22290 + i->palette[regno].blue = blue;
22291 +
22292 + switch(bpp) {
22293 +#ifdef FBCON_HAS_CFB8
22294 + case 8:
22295 + red >>= 10;
22296 + green >>= 10;
22297 + blue >>= 10;
22298 + panel_reg->lcd_pallettebase[regno] = (blue&0x1f) |
22299 + ((green&0x3f)<<5) | ((red&0x1f)<<11);
22300 + break;
22301 +#endif
22302 +#ifdef FBCON_HAS_CFB16
22303 +/* FIX!!!! depends upon pixel format */
22304 + case 16:
22305 + i->fbcon_cmap16[regno] =
22306 + ((red & 0xf800) >> 0) |
22307 + ((green & 0xfc00) >> 5) |
22308 + ((blue & 0xf800) >> 11);
22309 + break;
22310 +#endif
22311 +#ifdef FBCON_HAS_CFB32
22312 + case 32:
22313 + i->fbcon_cmap32[regno] =
22314 + (((u32 )transp & 0xff00) << 16) |
22315 + (((u32 )red & 0xff00) << 8) |
22316 + (((u32 )green & 0xff00)) |
22317 + (((u32 )blue & 0xff00) >> 8);
22318 + break;
22319 +#endif
22320 + default:
22321 + printk("unsupported au1200_setcolreg(%d)\n", bpp);
22322 + break;
22323 + }
22324 +
22325 + return 0;
22326 +}
22327 +
22328 +
22329 +static int au1200_blank(int blank_mode, struct fb_info_gen *_info)
22330 +{
22331 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_info;
22332 + int plane;
22333 +
22334 + /* Short-circuit screen blanking */
22335 + if (fb_info->noblanking)
22336 + return 0;
22337 +
22338 + plane = fbinfo2index((struct fb_info *)_info);
22339 +
22340 + switch (blank_mode) {
22341 + case VESA_NO_BLANKING:
22342 + /* printk("turn on panel\n"); */
22343 + au1200_setpanel(panel);
22344 + break;
22345 +
22346 + case VESA_VSYNC_SUSPEND:
22347 + case VESA_HSYNC_SUSPEND:
22348 + case VESA_POWERDOWN:
22349 + /* printk("turn off panel\n"); */
22350 + au1200_setpanel(NULL);
22351 + break;
22352 + default:
22353 + break;
22354 +
22355 + }
22356 + return 0;
22357 +}
22358 +
22359 +static void au1200_set_disp(const void *unused, struct display *disp,
22360 + struct fb_info_gen *info)
22361 +{
22362 + struct au1200fb_info *fb_info;
22363 + int plane;
22364 +
22365 + fb_info = (struct au1200fb_info *)info;
22366 +
22367 + disp->screen_base = (char *)fb_info->fb_virt_start;
22368 +
22369 + switch (disp->var.bits_per_pixel) {
22370 +#ifdef FBCON_HAS_CFB8
22371 + case 8:
22372 + disp->dispsw = &fbcon_cfb8;
22373 + if (fb_info->nohwcursor)
22374 + fbcon_cfb8.cursor = au1200_nocursor;
22375 + break;
22376 +#endif
22377 +#ifdef FBCON_HAS_CFB16
22378 + case 16:
22379 + disp->dispsw = &fbcon_cfb16;
22380 + disp->dispsw_data = fb_info->fbcon_cmap16;
22381 + if (fb_info->nohwcursor)
22382 + fbcon_cfb16.cursor = au1200_nocursor;
22383 + break;
22384 +#endif
22385 +#ifdef FBCON_HAS_CFB32
22386 + case 32:
22387 + disp->dispsw = &fbcon_cfb32;
22388 + disp->dispsw_data = fb_info->fbcon_cmap32;
22389 + if (fb_info->nohwcursor)
22390 + fbcon_cfb32.cursor = au1200_nocursor;
22391 + break;
22392 +#endif
22393 + default:
22394 + disp->dispsw = &fbcon_dummy;
22395 + disp->dispsw_data = NULL;
22396 + break;
22397 + }
22398 +}
22399 +
22400 +static int
22401 +au1200fb_mmap(struct fb_info *_fb,
22402 + struct file *file,
22403 + struct vm_area_struct *vma)
22404 +{
22405 + unsigned int len;
22406 + unsigned long start=0, off;
22407 +
22408 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_fb;
22409 +
22410 + if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
22411 + return -EINVAL;
22412 + }
22413 +
22414 + start = fb_info->fb_phys & PAGE_MASK;
22415 + len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info->fb_size);
22416 +
22417 + off = vma->vm_pgoff << PAGE_SHIFT;
22418 +
22419 + if ((vma->vm_end - vma->vm_start + off) > len) {
22420 + return -EINVAL;
22421 + }
22422 +
22423 + off += start;
22424 + vma->vm_pgoff = off >> PAGE_SHIFT;
22425 +
22426 + pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
22427 + pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED;
22428 +
22429 + /* This is an IO map - tell maydump to skip this VMA */
22430 + vma->vm_flags |= VM_IO;
22431 +
22432 + if (io_remap_page_range(vma->vm_start, off,
22433 + vma->vm_end - vma->vm_start,
22434 + vma->vm_page_prot)) {
22435 + return -EAGAIN;
22436 + }
22437 +
22438 + fb_info->mmaped = 1;
22439 + return 0;
22440 +}
22441 +
22442 +int au1200_pan_display(const struct fb_var_screeninfo *var,
22443 + struct fb_info_gen *info)
22444 +{
22445 + return 0;
22446 +}
22447 +
22448 +
22449 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
22450 + u_long arg, int con, struct fb_info *info)
22451 +{
22452 + int plane;
22453 +
22454 + plane = fbinfo2index(info);
22455 +
22456 + /* printk("au1200fb: ioctl %d on plane %d\n", cmd, plane); */
22457 +
22458 + if (cmd == 0x46FF)
22459 + {
22460 + au1200_lcd_getset_t iodata;
22461 +
22462 + if (copy_from_user(&iodata, (void *) arg, sizeof(au1200_lcd_getset_t)))
22463 + return -EFAULT;
22464 +
22465 + switch (iodata.subcmd)
22466 + {
22467 + case AU1200_LCD_GET_WINENABLE:
22468 + iodata.winenable.enable = (lcd->winenable & (1<<plane)) ? 1 : 0;
22469 + break;
22470 + case AU1200_LCD_SET_WINENABLE:
22471 + {
22472 + u32 winenable;
22473 + winenable = lcd->winenable;
22474 + winenable &= ~(1<<plane);
22475 + winenable |= (iodata.winenable.enable) ? (1<<plane) : 0;
22476 + lcd->winenable = winenable;
22477 + }
22478 + break;
22479 + case AU1200_LCD_GET_WINLOCATION:
22480 + iodata.winlocation.x =
22481 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;
22482 + iodata.winlocation.y =
22483 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;
22484 + break;
22485 + case AU1200_LCD_SET_WINLOCATION:
22486 + au1200_setlocation(plane, iodata.winlocation.x, iodata.winlocation.y);
22487 + break;
22488 + case AU1200_LCD_GET_WINSIZE:
22489 + iodata.winsize.hsz =
22490 + (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11;
22491 + iodata.winsize.vsz =
22492 + (lcd->window[plane].winctrl0 & LCD_WINCTRL1_SZY) >> 0;
22493 + break;
22494 + case AU1200_LCD_SET_WINSIZE:
22495 + au1200_setsize(plane, iodata.winsize.hsz, iodata.winsize.vsz);
22496 + break;
22497 + case AU1200_LCD_GET_BACKCOLOR:
22498 + iodata.backcolor.color = lcd->backcolor;
22499 + break;
22500 + case AU1200_LCD_SET_BACKCOLOR:
22501 + lcd->backcolor = iodata.backcolor.color;
22502 + break;
22503 + case AU1200_LCD_GET_COLORKEY:
22504 + iodata.colorkey.key = lcd->colorkey;
22505 + iodata.colorkey.mask = lcd->colorkeymsk;
22506 + break;
22507 + case AU1200_LCD_SET_COLORKEY:
22508 + lcd->colorkey = iodata.colorkey.key;
22509 + lcd->colorkeymsk = iodata.colorkey.mask;
22510 + break;
22511 + case AU1200_LCD_GET_PANEL:
22512 + iodata.panel.panel = panel_index;
22513 + break;
22514 + case AU1200_LCD_SET_PANEL:
22515 + if ((iodata.panel.panel >= 0) && (iodata.panel.panel < NUM_PANELS))
22516 + {
22517 + struct panel_settings *newpanel;
22518 + panel_index = iodata.panel.panel;
22519 + newpanel = &panels[panel_index];
22520 + au1200_setpanel(newpanel);
22521 + }
22522 + break;
22523 + }
22524 +
22525 + return copy_to_user((void *) arg, &iodata, sizeof(au1200_lcd_getset_t)) ? -EFAULT : 0;
22526 + }
22527 +
22528 + return -EINVAL;
22529 +}
22530 +
22531 +static struct fbgen_hwswitch au1200_switch = {
22532 + au1200_detect,
22533 + au1200_encode_fix,
22534 + au1200_decode_var,
22535 + au1200_encode_var,
22536 + au1200_get_par,
22537 + au1200_set_par,
22538 + au1200_getcolreg,
22539 + au1200_setcolreg,
22540 + au1200_pan_display,
22541 + au1200_blank,
22542 + au1200_set_disp
22543 +};
22544 +
22545 +static void au1200_setpanel (struct panel_settings *newpanel)
22546 +{
22547 + /*
22548 + * Perform global setup/init of LCD controller
22549 + */
22550 + uint32 winenable;
22551 +
22552 + /* Make sure all windows disabled */
22553 + winenable = lcd->winenable;
22554 + lcd->winenable = 0;
22555 +
22556 + /*
22557 + * Ensure everything is disabled before reconfiguring
22558 + */
22559 + if (lcd->screen & LCD_SCREEN_SEN)
22560 + {
22561 + /* Wait for vertical sync period */
22562 + lcd->intstatus = LCD_INT_SS;
22563 + while ((lcd->intstatus & LCD_INT_SS) == 0)
22564 + ;
22565 +
22566 + lcd->screen &= ~LCD_SCREEN_SEN; /*disable the controller*/
22567 +
22568 + do
22569 + {
22570 + lcd->intstatus = lcd->intstatus; /*clear interrupts*/
22571 + }
22572 + /*wait for controller to shut down*/
22573 + while ((lcd->intstatus & LCD_INT_SD) == 0);
22574 +
22575 + /* Call shutdown of current panel (if up) */
22576 + /* this must occur last, because if an external clock is driving
22577 + the controller, the clock cannot be turned off before first
22578 + shutting down the controller.
22579 + */
22580 + if (panel->device_shutdown != NULL) panel->device_shutdown();
22581 + }
22582 +
22583 + /* Check if only needing to turn off panel */
22584 + if (panel == NULL) return;
22585 +
22586 + panel = newpanel;
22587 +
22588 + printk("Panel(%s), %dx%d\n", panel->name, panel->Xres, panel->Yres);
22589 +
22590 + /*
22591 + * Setup clocking if internal LCD clock source (assumes sys_auxpll valid)
22592 + */
22593 + if (!(panel->mode_clkcontrol & LCD_CLKCONTROL_EXT))
22594 + {
22595 + uint32 sys_clksrc;
22596 + /* WARNING! This should really be a check since other peripherals can
22597 + be affected by changins sys_auxpll */
22598 + au_writel(panel->mode_auxpll, SYS_AUXPLL);
22599 + sys_clksrc = au_readl(SYS_CLKSRC) & ~0x0000001f;
22600 + sys_clksrc |= panel->mode_toyclksrc;
22601 + au_writel(sys_clksrc, SYS_CLKSRC);
22602 + }
22603 +
22604 + /*
22605 + * Configure panel timings
22606 + */
22607 + lcd->screen = panel->mode_screen;
22608 + lcd->horztiming = panel->mode_horztiming;
22609 + lcd->verttiming = panel->mode_verttiming;
22610 + lcd->clkcontrol = panel->mode_clkcontrol;
22611 + lcd->pwmdiv = panel->mode_pwmdiv;
22612 + lcd->pwmhi = panel->mode_pwmhi;
22613 + lcd->outmask = panel->mode_outmask;
22614 + lcd->fifoctrl = panel->mode_fifoctrl;
22615 + au_sync();
22616 +
22617 + /* FIX!!! Check window settings to make sure still valid for new geometry */
22618 + au1200_setlocation(0, win->w[0].xpos, win->w[0].ypos);
22619 + au1200_setlocation(1, win->w[1].xpos, win->w[1].ypos);
22620 + au1200_setlocation(2, win->w[2].xpos, win->w[2].ypos);
22621 + au1200_setlocation(3, win->w[3].xpos, win->w[3].ypos);
22622 + lcd->winenable = winenable;
22623 +
22624 + /*
22625 + * Re-enable screen now that it is configured
22626 + */
22627 + lcd->screen |= LCD_SCREEN_SEN;
22628 + au_sync();
22629 +
22630 + /* Call init of panel */
22631 + if (panel->device_init != NULL) panel->device_init();
22632 +
22633 +#if 0
22634 +#define D(X) printk("%25s: %08X\n", #X, X)
22635 + D(lcd->screen);
22636 + D(lcd->horztiming);
22637 + D(lcd->verttiming);
22638 + D(lcd->clkcontrol);
22639 + D(lcd->pwmdiv);
22640 + D(lcd->pwmhi);
22641 + D(lcd->outmask);
22642 + D(lcd->fifoctrl);
22643 + D(lcd->window[0].winctrl0);
22644 + D(lcd->window[0].winctrl1);
22645 + D(lcd->window[0].winctrl2);
22646 + D(lcd->window[0].winbuf0);
22647 + D(lcd->window[0].winbuf1);
22648 + D(lcd->window[0].winbufctrl);
22649 + D(lcd->window[1].winctrl0);
22650 + D(lcd->window[1].winctrl1);
22651 + D(lcd->window[1].winctrl2);
22652 + D(lcd->window[1].winbuf0);
22653 + D(lcd->window[1].winbuf1);
22654 + D(lcd->window[1].winbufctrl);
22655 + D(lcd->window[2].winctrl0);
22656 + D(lcd->window[2].winctrl1);
22657 + D(lcd->window[2].winctrl2);
22658 + D(lcd->window[2].winbuf0);
22659 + D(lcd->window[2].winbuf1);
22660 + D(lcd->window[2].winbufctrl);
22661 + D(lcd->window[3].winctrl0);
22662 + D(lcd->window[3].winctrl1);
22663 + D(lcd->window[3].winctrl2);
22664 + D(lcd->window[3].winbuf0);
22665 + D(lcd->window[3].winbuf1);
22666 + D(lcd->window[3].winbufctrl);
22667 + D(lcd->winenable);
22668 + D(lcd->intenable);
22669 + D(lcd->intstatus);
22670 + D(lcd->backcolor);
22671 + D(lcd->winenable);
22672 + D(lcd->colorkey);
22673 + D(lcd->colorkeymsk);
22674 + D(lcd->hwc.cursorctrl);
22675 + D(lcd->hwc.cursorpos);
22676 + D(lcd->hwc.cursorcolor0);
22677 + D(lcd->hwc.cursorcolor1);
22678 + D(lcd->hwc.cursorcolor2);
22679 + D(lcd->hwc.cursorcolor3);
22680 +#endif
22681 +}
22682 +
22683 +static int au1200_setsize (int plane, int xres, int yres)
22684 +{
22685 +#if 0
22686 + uint32 winctrl0, winctrl1, winenable;
22687 + int xsz, ysz;
22688 +
22689 + /* FIX!!! X*Y can not surpass allocated memory */
22690 +
22691 + printk("setsize: x %d y %d\n", xres, yres);
22692 + winctrl1 = lcd->window[plane].winctrl1;
22693 + printk("org winctrl1 %08X\n", winctrl1);
22694 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
22695 +
22696 + xres -= 1;
22697 + yres -= 1;
22698 + winctrl1 |= (xres << 11);
22699 + winctrl1 |= (yres << 0);
22700 +
22701 + printk("new winctrl1 %08X\n", winctrl1);
22702 +
22703 + /*winenable = lcd->winenable & (1 << plane); */
22704 + /*lcd->winenable &= ~(1 << plane); */
22705 + lcd->window[plane].winctrl1 = winctrl1;
22706 + /*lcd->winenable |= winenable; */
22707 +#endif
22708 + return 0;
22709 +}
22710 +
22711 +static int au1200_setlocation (int plane, int xpos, int ypos)
22712 +{
22713 + uint32 winctrl0, winctrl1, winenable, fb_offset = 0;
22714 + int xsz, ysz;
22715 +
22716 + /* FIX!!! NOT CHECKING FOR COMPLETE OFFSCREEN YET */
22717 +
22718 + winctrl0 = lcd->window[plane].winctrl0;
22719 + winctrl1 = lcd->window[plane].winctrl1;
22720 + winctrl0 &= (LCD_WINCTRL0_A | LCD_WINCTRL0_AEN);
22721 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
22722 +
22723 + /* Check for off-screen adjustments */
22724 + xsz = win->w[plane].xres;
22725 + ysz = win->w[plane].yres;
22726 + if ((xpos + win->w[plane].xres) > panel->Xres)
22727 + {
22728 + /* Off-screen to the right */
22729 + xsz = panel->Xres - xpos; /* off by 1 ??? */
22730 + /*printk("off screen right\n");*/
22731 + }
22732 +
22733 + if ((ypos + win->w[plane].yres) > panel->Yres)
22734 + {
22735 + /* Off-screen to the bottom */
22736 + ysz = panel->Yres - ypos; /* off by 1 ??? */
22737 + /*printk("off screen bottom\n");*/
22738 + }
22739 +
22740 + if (xpos < 0)
22741 + {
22742 + /* Off-screen to the left */
22743 + xsz = win->w[plane].xres + xpos;
22744 + fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);
22745 + xpos = 0;
22746 + /*printk("off screen left\n");*/
22747 + }
22748 +
22749 + if (ypos < 0)
22750 + {
22751 + /* Off-screen to the top */
22752 + ysz = win->w[plane].yres + ypos;
22753 + fb_offset += ((0 - ypos) * fb_pars[plane].line_length);
22754 + ypos = 0;
22755 + /*printk("off screen top\n");*/
22756 + }
22757 +
22758 + /* record settings */
22759 + win->w[plane].xpos = xpos;
22760 + win->w[plane].ypos = ypos;
22761 +
22762 + xsz -= 1;
22763 + ysz -= 1;
22764 + winctrl0 |= (xpos << 21);
22765 + winctrl0 |= (ypos << 10);
22766 + winctrl1 |= (xsz << 11);
22767 + winctrl1 |= (ysz << 0);
22768 +
22769 + /* Disable the window while making changes, then restore WINEN */
22770 + winenable = lcd->winenable & (1 << plane);
22771 + lcd->winenable &= ~(1 << plane);
22772 + lcd->window[plane].winctrl0 = winctrl0;
22773 + lcd->window[plane].winctrl1 = winctrl1;
22774 + lcd->window[plane].winbuf0 =
22775 + lcd->window[plane].winbuf1 = fb_infos[plane].fb_phys + fb_offset;
22776 + lcd->window[plane].winbufctrl = 0; /* select winbuf0 */
22777 + lcd->winenable |= winenable;
22778 +
22779 + return 0;
22780 +}
22781 +
22782 +static void au1200_setmode(int plane)
22783 +{
22784 + /* Window/plane setup */
22785 + lcd->window[plane].winctrl1 = ( 0
22786 + | LCD_WINCTRL1_PRI_N(plane)
22787 + | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */
22788 + ) ;
22789 +
22790 + au1200_setlocation(plane, win->w[plane].xpos, win->w[plane].ypos);
22791 +
22792 + lcd->window[plane].winctrl2 = ( 0
22793 + | LCD_WINCTRL2_CKMODE_00
22794 + | LCD_WINCTRL2_DBM
22795 +/* | LCD_WINCTRL2_RAM */
22796 + | LCD_WINCTRL2_BX_N(fb_pars[plane].line_length)
22797 + | LCD_WINCTRL2_SCX_1
22798 + | LCD_WINCTRL2_SCY_1
22799 + ) ;
22800 + lcd->winenable |= win->w[plane].mode_winenable;
22801 + au_sync();
22802 +
22803 +}
22804 +
22805 +static unsigned long
22806 +au1200fb_alloc_fbmem (unsigned long size)
22807 +{
22808 + /* __get_free_pages() fulfills a max request of 2MB */
22809 + /* do multiple requests to obtain large contigous mem */
22810 +#define MAX_GFP 0x00200000
22811 +
22812 + unsigned long mem, amem, alloced = 0, allocsize;
22813 +
22814 + size += 0x1000;
22815 + allocsize = (size < MAX_GFP) ? size : MAX_GFP;
22816 +
22817 + /* Get first chunk */
22818 + mem = (unsigned long )
22819 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
22820 + if (mem != 0) alloced = allocsize;
22821 +
22822 + /* Get remaining, contiguous chunks */
22823 + while (alloced < size)
22824 + {
22825 + amem = (unsigned long )
22826 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
22827 + if (amem != 0)
22828 + alloced += allocsize;
22829 +
22830 + /* check for contiguous mem alloced */
22831 + if ((amem == 0) || (amem + allocsize) != mem)
22832 + break;
22833 + else
22834 + mem = amem;
22835 + }
22836 + return mem;
22837 +}
22838 +
22839 +int __init au1200fb_init(void)
22840 +{
22841 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
22842 + struct au1200fb_info *fb_info;
22843 + struct display *disp;
22844 + struct au1200fb_par *par;
22845 + unsigned long page;
22846 + int plane, bpp;
22847 +
22848 + /*
22849 + * Get the panel information/display mode
22850 + */
22851 + if (panel_index < 0)
22852 + panel_index = board_au1200fb_panel();
22853 + if ((panel_index < 0) || (panel_index >= num_panels)) {
22854 + printk("ERROR: INVALID PANEL %d\n", panel_index);
22855 + return -EINVAL;
22856 + }
22857 + panel = &panels[panel_index];
22858 + win = &windows[window_index];
22859 +
22860 + printk("au1200fb: Panel %d %s\n", panel_index, panel->name);
22861 + printk("au1200fb: Win %d %s\n", window_index, win->name);
22862 +
22863 + /* Global setup/init */
22864 + au1200_setpanel(panel);
22865 + lcd->intenable = 0;
22866 + lcd->intstatus = ~0;
22867 + lcd->backcolor = win->mode_backcolor;
22868 + lcd->winenable = 0;
22869 +
22870 + /* Setup Color Key - FIX!!! */
22871 + lcd->colorkey = win->mode_colorkey;
22872 + lcd->colorkeymsk = win->mode_colorkeymsk;
22873 +
22874 + /* Setup HWCursor - FIX!!! Need to support this eventually */
22875 + lcd->hwc.cursorctrl = 0;
22876 + lcd->hwc.cursorpos = 0;
22877 + lcd->hwc.cursorcolor0 = 0;
22878 + lcd->hwc.cursorcolor1 = 0;
22879 + lcd->hwc.cursorcolor2 = 0;
22880 + lcd->hwc.cursorcolor3 = 0;
22881 +
22882 + /* Register each plane as a frame buffer device */
22883 + for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane)
22884 + {
22885 + fb_info = &fb_infos[plane];
22886 + disp = &disps[plane];
22887 + par = &fb_pars[plane];
22888 +
22889 + bpp = winbpp(win->w[plane].mode_winctrl1);
22890 + if (win->w[plane].xres == 0)
22891 + win->w[plane].xres = panel->Xres;
22892 + if (win->w[plane].yres == 0)
22893 + win->w[plane].yres = panel->Yres;
22894 +
22895 + par->var.xres =
22896 + par->var.xres_virtual = win->w[plane].xres;
22897 + par->var.yres =
22898 + par->var.yres_virtual = win->w[plane].yres;
22899 + par->var.bits_per_pixel = bpp;
22900 + par->line_length = win->w[plane].xres * bpp / 8; /* in bytes */
22901 + /*
22902 + * Allocate LCD framebuffer from system memory
22903 + * Set page reserved so that mmap will work. This is necessary
22904 + * since we'll be remapping normal memory.
22905 + */
22906 + fb_info->fb_size = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
22907 + fb_info->fb_virt_start = au1200fb_alloc_fbmem(fb_info->fb_size);
22908 + if (!fb_info->fb_virt_start) {
22909 + printk("Unable to allocate fb memory\n");
22910 + return -ENOMEM;
22911 + }
22912 + fb_info->fb_phys = virt_to_bus((void *)fb_info->fb_virt_start);
22913 + for (page = fb_info->fb_virt_start;
22914 + page < PAGE_ALIGN(fb_info->fb_virt_start + fb_info->fb_size);
22915 + page += PAGE_SIZE) {
22916 + SetPageReserved(virt_to_page(page));
22917 + }
22918 + /* Convert to kseg1 */
22919 + fb_info->fb_virt_start =
22920 + (void *)((u32)fb_info->fb_virt_start | 0xA0000000);
22921 + /* FIX!!! may wish to avoid this to save startup time??? */
22922 + memset((void *)fb_info->fb_virt_start, 0, fb_info->fb_size);
22923 +
22924 + fb_info->gen.parsize = sizeof(struct au1200fb_par);
22925 + fb_info->gen.fbhw = &au1200_switch;
22926 + strcpy(fb_info->gen.info.modename, "Au1200 LCD");
22927 + fb_info->gen.info.changevar = NULL;
22928 + fb_info->gen.info.node = -1;
22929 +
22930 + fb_info->gen.info.fbops = &au1200fb_ops;
22931 + fb_info->gen.info.disp = disp;
22932 + fb_info->gen.info.switch_con = &fbgen_switch;
22933 + fb_info->gen.info.updatevar = &fbgen_update_var;
22934 + fb_info->gen.info.blank = &fbgen_blank;
22935 + fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
22936 +
22937 + fb_info->nohwcursor = 1;
22938 + fb_info->noblanking = 1;
22939 +
22940 + /* This should give a reasonable default video mode */
22941 + fbgen_get_var(&disp->var, -1, &fb_info->gen.info);
22942 + fbgen_do_set_var(&disp->var, 1, &fb_info->gen);
22943 + fbgen_set_disp(-1, &fb_info->gen);
22944 + fbgen_install_cmap(0, &fb_info->gen);
22945 +
22946 + /* Turn on plane */
22947 + au1200_setmode(plane);
22948 +
22949 + if (register_framebuffer(&fb_info->gen.info) < 0)
22950 + return -EINVAL;
22951 +
22952 + printk(KERN_INFO "fb%d: %s plane %d @ %08X (%d x %d x %d)\n",
22953 + GET_FB_IDX(fb_info->gen.info.node),
22954 + fb_info->gen.info.modename, plane, fb_info->fb_phys,
22955 + win->w[plane].xres, win->w[plane].yres, bpp);
22956 + }
22957 + /* uncomment this if your driver cannot be unloaded */
22958 + /* MOD_INC_USE_COUNT; */
22959 + return 0;
22960 +}
22961 +
22962 +void au1200fb_setup(char *options, int *ints)
22963 +{
22964 + char* this_opt;
22965 + int i;
22966 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
22967 +
22968 + if (!options || !*options)
22969 + return;
22970 +
22971 + for(this_opt=strtok(options, ","); this_opt;
22972 + this_opt=strtok(NULL, ",")) {
22973 + if (!strncmp(this_opt, "panel:", 6)) {
22974 + int i;
22975 + long int li;
22976 + char *endptr;
22977 + this_opt += 6;
22978 +
22979 + /* Panel name can be name, "bs" for board-switch, or number/index */
22980 + li = simple_strtol(this_opt, &endptr, 0);
22981 + if (*endptr == '\0') {
22982 + panel_index = (int)li;
22983 + }
22984 + else if (strcmp(this_opt, "bs") == 0) {
22985 + panel_index = board_au1200fb_panel();
22986 + }
22987 + else
22988 + for (i=0; i<num_panels; i++) {
22989 + if (!strcmp(this_opt, panels[i].name)) {
22990 + panel_index = i;
22991 + break;
22992 + }
22993 + }
22994 + }
22995 + else if (!strncmp(this_opt, "nohwcursor", 10)) {
22996 + printk("nohwcursor\n");
22997 + fb_infos[0].nohwcursor = 1;
22998 + }
22999 + }
23000 +
23001 + printk("au1200fb: Panel %d %s\n", panel_index,
23002 + panels[panel_index].name);
23003 +}
23004 +
23005 +
23006 +
23007 +#ifdef MODULE
23008 +MODULE_LICENSE("GPL");
23009 +MODULE_DESCRIPTION("Au1200 LCD framebuffer driver");
23010 +
23011 +void au1200fb_cleanup(struct fb_info *info)
23012 +{
23013 + unregister_framebuffer(info);
23014 +}
23015 +
23016 +module_init(au1200fb_init);
23017 +module_exit(au1200fb_cleanup);
23018 +#endif /* MODULE */
23019 +
23020 +
23021 Index: linux-2.4.35.4/drivers/video/au1200fb.h
23022 ===================================================================
23023 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
23024 +++ linux-2.4.35.4/drivers/video/au1200fb.h 2007-12-15 05:19:44.990984927 +0100
23025 @@ -0,0 +1,288 @@
23026 +/*
23027 + * BRIEF MODULE DESCRIPTION
23028 + * Hardware definitions for the Au1200 LCD controller
23029 + *
23030 + * Copyright 2004 AMD
23031 + * Author: AMD
23032 + *
23033 + * This program is free software; you can redistribute it and/or modify it
23034 + * under the terms of the GNU General Public License as published by the
23035 + * Free Software Foundation; either version 2 of the License, or (at your
23036 + * option) any later version.
23037 + *
23038 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
23039 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23040 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23041 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23042 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23043 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23044 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
23045 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23046 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23047 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23048 + *
23049 + * You should have received a copy of the GNU General Public License along
23050 + * with this program; if not, write to the Free Software Foundation, Inc.,
23051 + * 675 Mass Ave, Cambridge, MA 02139, USA.
23052 + */
23053 +
23054 +#ifndef _AU1200LCD_H
23055 +#define _AU1200LCD_H
23056 +
23057 +/********************************************************************/
23058 +#define AU1200_LCD_ADDR 0xB5000000
23059 +
23060 +#define uint8 unsigned char
23061 +#define uint32 unsigned int
23062 +
23063 +typedef volatile struct
23064 +{
23065 + uint32 reserved0;
23066 + uint32 screen;
23067 + uint32 backcolor;
23068 + uint32 horztiming;
23069 + uint32 verttiming;
23070 + uint32 clkcontrol;
23071 + uint32 pwmdiv;
23072 + uint32 pwmhi;
23073 + uint32 reserved1;
23074 + uint32 winenable;
23075 + uint32 colorkey;
23076 + uint32 colorkeymsk;
23077 + struct
23078 + {
23079 + uint32 cursorctrl;
23080 + uint32 cursorpos;
23081 + uint32 cursorcolor0;
23082 + uint32 cursorcolor1;
23083 + uint32 cursorcolor2;
23084 + uint32 cursorcolor3;
23085 + } hwc;
23086 + uint32 intstatus;
23087 + uint32 intenable;
23088 + uint32 outmask;
23089 + uint32 fifoctrl;
23090 + uint32 reserved2[(0x0100-0x0058)/4];
23091 + struct
23092 + {
23093 + uint32 winctrl0;
23094 + uint32 winctrl1;
23095 + uint32 winctrl2;
23096 + uint32 winbuf0;
23097 + uint32 winbuf1;
23098 + uint32 winbufctrl;
23099 + uint32 winreserved0;
23100 + uint32 winreserved1;
23101 + } window[4];
23102 +
23103 + uint32 reserved3[(0x0400-0x0180)/4];
23104 +
23105 + uint32 palette[(0x0800-0x0400)/4];
23106 +
23107 + uint8 cursorpattern[256];
23108 +
23109 +} AU1200_LCD;
23110 +
23111 +/* lcd_screen */
23112 +#define LCD_SCREEN_SEN (1<<31)
23113 +#define LCD_SCREEN_SX (0x07FF<<19)
23114 +#define LCD_SCREEN_SY (0x07FF<< 8)
23115 +#define LCD_SCREEN_SWP (1<<7)
23116 +#define LCD_SCREEN_SWD (1<<6)
23117 +#define LCD_SCREEN_ST (7<<0)
23118 +#define LCD_SCREEN_ST_TFT (0<<0)
23119 +#define LCD_SCREEN_SX_N(WIDTH) ((WIDTH-1)<<19)
23120 +#define LCD_SCREEN_SY_N(HEIGHT) ((HEIGHT-1)<<8)
23121 +#define LCD_SCREEN_ST_CSTN (1<<0)
23122 +#define LCD_SCREEN_ST_CDSTN (2<<0)
23123 +#define LCD_SCREEN_ST_M8STN (3<<0)
23124 +#define LCD_SCREEN_ST_M4STN (4<<0)
23125 +
23126 +/* lcd_backcolor */
23127 +#define LCD_BACKCOLOR_SBGR (0xFF<<16)
23128 +#define LCD_BACKCOLOR_SBGG (0xFF<<8)
23129 +#define LCD_BACKCOLOR_SBGB (0xFF<<0)
23130 +#define LCD_BACKCOLOR_SBGR_N(N) ((N)<<16)
23131 +#define LCD_BACKCOLOR_SBGG_N(N) ((N)<<8)
23132 +#define LCD_BACKCOLOR_SBGB_N(N) ((N)<<0)
23133 +
23134 +/* lcd_winenable */
23135 +#define LCD_WINENABLE_WEN3 (1<<3)
23136 +#define LCD_WINENABLE_WEN2 (1<<2)
23137 +#define LCD_WINENABLE_WEN1 (1<<1)
23138 +#define LCD_WINENABLE_WEN0 (1<<0)
23139 +
23140 +/* lcd_colorkey */
23141 +#define LCD_COLORKEY_CKR (0xFF<<16)
23142 +#define LCD_COLORKEY_CKG (0xFF<<8)
23143 +#define LCD_COLORKEY_CKB (0xFF<<0)
23144 +#define LCD_COLORKEY_CKR_N(N) ((N)<<16)
23145 +#define LCD_COLORKEY_CKG_N(N) ((N)<<8)
23146 +#define LCD_COLORKEY_CKB_N(N) ((N)<<0)
23147 +
23148 +/* lcd_colorkeymsk */
23149 +#define LCD_COLORKEYMSK_CKMR (0xFF<<16)
23150 +#define LCD_COLORKEYMSK_CKMG (0xFF<<8)
23151 +#define LCD_COLORKEYMSK_CKMB (0xFF<<0)
23152 +#define LCD_COLORKEYMSK_CKMR_N(N) ((N)<<16)
23153 +#define LCD_COLORKEYMSK_CKMG_N(N) ((N)<<8)
23154 +#define LCD_COLORKEYMSK_CKMB_N(N) ((N)<<0)
23155 +
23156 +/* lcd windows control 0 */
23157 +#define LCD_WINCTRL0_OX (0x07FF<<21)
23158 +#define LCD_WINCTRL0_OY (0x07FF<<10)
23159 +#define LCD_WINCTRL0_A (0x00FF<<2)
23160 +#define LCD_WINCTRL0_AEN (1<<1)
23161 +#define LCD_WINCTRL0_OX_N(N) ((N)<<21)
23162 +#define LCD_WINCTRL0_OY_N(N) ((N)<<10)
23163 +#define LCD_WINCTRL0_A_N(N) ((N)<<2)
23164 +
23165 +/* lcd windows control 1 */
23166 +#define LCD_WINCTRL1_PRI (3<<30)
23167 +#define LCD_WINCTRL1_PIPE (1<<29)
23168 +#define LCD_WINCTRL1_FRM (0xF<<25)
23169 +#define LCD_WINCTRL1_CCO (1<<24)
23170 +#define LCD_WINCTRL1_PO (3<<22)
23171 +#define LCD_WINCTRL1_SZX (0x07FF<<11)
23172 +#define LCD_WINCTRL1_SZY (0x07FF<<0)
23173 +#define LCD_WINCTRL1_FRM_1BPP (0<<25)
23174 +#define LCD_WINCTRL1_FRM_2BPP (1<<25)
23175 +#define LCD_WINCTRL1_FRM_4BPP (2<<25)
23176 +#define LCD_WINCTRL1_FRM_8BPP (3<<25)
23177 +#define LCD_WINCTRL1_FRM_12BPP (4<<25)
23178 +#define LCD_WINCTRL1_FRM_16BPP655 (5<<25)
23179 +#define LCD_WINCTRL1_FRM_16BPP565 (6<<25)
23180 +#define LCD_WINCTRL1_FRM_16BPP556 (7<<25)
23181 +#define LCD_WINCTRL1_FRM_16BPPI1555 (8<<25)
23182 +#define LCD_WINCTRL1_FRM_16BPPI5551 (9<<25)
23183 +#define LCD_WINCTRL1_FRM_16BPPA1555 (10<<25)
23184 +#define LCD_WINCTRL1_FRM_16BPPA5551 (11<<25)
23185 +#define LCD_WINCTRL1_FRM_24BPP (12<<25)
23186 +#define LCD_WINCTRL1_FRM_32BPP (13<<25)
23187 +#define LCD_WINCTRL1_PRI_N(N) ((N)<<30)
23188 +#define LCD_WINCTRL1_PO_00 (0<<22)
23189 +#define LCD_WINCTRL1_PO_01 (1<<22)
23190 +#define LCD_WINCTRL1_PO_10 (2<<22)
23191 +#define LCD_WINCTRL1_PO_11 (3<<22)
23192 +#define LCD_WINCTRL1_SZX_N(N) ((N-1)<<11)
23193 +#define LCD_WINCTRL1_SZY_N(N) ((N-1)<<0)
23194 +
23195 +/* lcd windows control 2 */
23196 +#define LCD_WINCTRL2_CKMODE (3<<24)
23197 +#define LCD_WINCTRL2_DBM (1<<23)
23198 +#define LCD_WINCTRL2_RAM (3<<21)
23199 +#define LCD_WINCTRL2_BX (0x1FFF<<8)
23200 +#define LCD_WINCTRL2_SCX (0xF<<4)
23201 +#define LCD_WINCTRL2_SCY (0xF<<0)
23202 +#define LCD_WINCTRL2_CKMODE_00 (0<<24)
23203 +#define LCD_WINCTRL2_CKMODE_01 (1<<24)
23204 +#define LCD_WINCTRL2_CKMODE_10 (2<<24)
23205 +#define LCD_WINCTRL2_CKMODE_11 (3<<24)
23206 +#define LCD_WINCTRL2_RAM_NONE (0<<21)
23207 +#define LCD_WINCTRL2_RAM_PALETTE (1<<21)
23208 +#define LCD_WINCTRL2_RAM_GAMMA (2<<21)
23209 +#define LCD_WINCTRL2_RAM_BUFFER (3<<21)
23210 +#define LCD_WINCTRL2_BX_N(N) ((N)<<8)
23211 +#define LCD_WINCTRL2_SCX_1 (0<<4)
23212 +#define LCD_WINCTRL2_SCX_2 (1<<4)
23213 +#define LCD_WINCTRL2_SCX_4 (2<<4)
23214 +#define LCD_WINCTRL2_SCY_1 (0<<0)
23215 +#define LCD_WINCTRL2_SCY_2 (1<<0)
23216 +#define LCD_WINCTRL2_SCY_4 (2<<0)
23217 +
23218 +/* lcd windows buffer control */
23219 +#define LCD_WINBUFCTRL_DB (1<<1)
23220 +#define LCD_WINBUFCTRL_DBN (1<<0)
23221 +
23222 +/* lcd_intstatus, lcd_intenable */
23223 +#define LCD_INT_IFO (0xF<<14)
23224 +#define LCD_INT_IFU (0xF<<10)
23225 +#define LCD_INT_OFO (1<<9)
23226 +#define LCD_INT_OFU (1<<8)
23227 +#define LCD_INT_WAIT (1<<3)
23228 +#define LCD_INT_SD (1<<2)
23229 +#define LCD_INT_SA (1<<1)
23230 +#define LCD_INT_SS (1<<0)
23231 +
23232 +/* lcd_horztiming */
23233 +#define LCD_HORZTIMING_HND2 (0x1FF<<18)
23234 +#define LCD_HORZTIMING_HND1 (0x1FF<<9)
23235 +#define LCD_HORZTIMING_HPW (0x1FF<<0)
23236 +#define LCD_HORZTIMING_HND2_N(N)(((N)-1)<<18)
23237 +#define LCD_HORZTIMING_HND1_N(N)(((N)-1)<<9)
23238 +#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<0)
23239 +
23240 +/* lcd_verttiming */
23241 +#define LCD_VERTTIMING_VND2 (0x1FF<<18)
23242 +#define LCD_VERTTIMING_VND1 (0x1FF<<9)
23243 +#define LCD_VERTTIMING_VPW (0x1FF<<0)
23244 +#define LCD_VERTTIMING_VND2_N(N)(((N)-1)<<18)
23245 +#define LCD_VERTTIMING_VND1_N(N)(((N)-1)<<9)
23246 +#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<0)
23247 +
23248 +/* lcd_clkcontrol */
23249 +#define LCD_CLKCONTROL_EXT (1<<22)
23250 +#define LCD_CLKCONTROL_DELAY (3<<20)
23251 +#define LCD_CLKCONTROL_CDD (1<<19)
23252 +#define LCD_CLKCONTROL_IB (1<<18)
23253 +#define LCD_CLKCONTROL_IC (1<<17)
23254 +#define LCD_CLKCONTROL_IH (1<<16)
23255 +#define LCD_CLKCONTROL_IV (1<<15)
23256 +#define LCD_CLKCONTROL_BF (0x1F<<10)
23257 +#define LCD_CLKCONTROL_PCD (0x3FF<<0)
23258 +#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
23259 +#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
23260 +
23261 +/* lcd_pwmdiv */
23262 +#define LCD_PWMDIV_EN (1<<31)
23263 +#define LCD_PWMDIV_PWMDIV (0x1FFFF<<0)
23264 +#define LCD_PWMDIV_PWMDIV_N(N) ((N)<<0)
23265 +
23266 +/* lcd_pwmhi */
23267 +#define LCD_PWMHI_PWMHI1 (0xFFFF<<16)
23268 +#define LCD_PWMHI_PWMHI0 (0xFFFF<<0)
23269 +#define LCD_PWMHI_PWMHI1_N(N) ((N)<<16)
23270 +#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
23271 +
23272 +/* lcd_hwccon */
23273 +#define LCD_HWCCON_EN (1<<0)
23274 +
23275 +/* lcd_cursorpos */
23276 +#define LCD_CURSORPOS_HWCXOFF (0x1F<<27)
23277 +#define LCD_CURSORPOS_HWCXPOS (0x07FF<<16)
23278 +#define LCD_CURSORPOS_HWCYOFF (0x1F<<11)
23279 +#define LCD_CURSORPOS_HWCYPOS (0x07FF<<0)
23280 +#define LCD_CURSORPOS_HWCXOFF_N(N) ((N)<<27)
23281 +#define LCD_CURSORPOS_HWCXPOS_N(N) ((N)<<16)
23282 +#define LCD_CURSORPOS_HWCYOFF_N(N) ((N)<<11)
23283 +#define LCD_CURSORPOS_HWCYPOS_N(N) ((N)<<0)
23284 +
23285 +/* lcd_cursorcolor */
23286 +#define LCD_CURSORCOLOR_HWCA (0xFF<<24)
23287 +#define LCD_CURSORCOLOR_HWCR (0xFF<<16)
23288 +#define LCD_CURSORCOLOR_HWCG (0xFF<<8)
23289 +#define LCD_CURSORCOLOR_HWCB (0xFF<<0)
23290 +#define LCD_CURSORCOLOR_HWCA_N(N) ((N)<<24)
23291 +#define LCD_CURSORCOLOR_HWCR_N(N) ((N)<<16)
23292 +#define LCD_CURSORCOLOR_HWCG_N(N) ((N)<<8)
23293 +#define LCD_CURSORCOLOR_HWCB_N(N) ((N)<<0)
23294 +
23295 +/* lcd_fifoctrl */
23296 +#define LCD_FIFOCTRL_F3IF (1<<29)
23297 +#define LCD_FIFOCTRL_F3REQ (0x1F<<24)
23298 +#define LCD_FIFOCTRL_F2IF (1<<29)
23299 +#define LCD_FIFOCTRL_F2REQ (0x1F<<16)
23300 +#define LCD_FIFOCTRL_F1IF (1<<29)
23301 +#define LCD_FIFOCTRL_F1REQ (0x1F<<8)
23302 +#define LCD_FIFOCTRL_F0IF (1<<29)
23303 +#define LCD_FIFOCTRL_F0REQ (0x1F<<0)
23304 +#define LCD_FIFOCTRL_F3REQ_N(N) ((N-1)<<24)
23305 +#define LCD_FIFOCTRL_F2REQ_N(N) ((N-1)<<16)
23306 +#define LCD_FIFOCTRL_F1REQ_N(N) ((N-1)<<8)
23307 +#define LCD_FIFOCTRL_F0REQ_N(N) ((N-1)<<0)
23308 +
23309 +/* lcd_outmask */
23310 +#define LCD_OUTMASK_MASK (0x00FFFFFF)
23311 +
23312 +/********************************************************************/
23313 +#endif /* _AU1200LCD_H */
23314 Index: linux-2.4.35.4/drivers/video/Config.in
23315 ===================================================================
23316 --- linux-2.4.35.4.orig/drivers/video/Config.in 2007-12-15 05:19:44.186939109 +0100
23317 +++ linux-2.4.35.4/drivers/video/Config.in 2007-12-15 05:19:44.990984927 +0100
23318 @@ -87,8 +87,8 @@
23319 if [ "$CONFIG_HP300" = "y" ]; then
23320 define_bool CONFIG_FB_HP300 y
23321 fi
23322 - if [ "$ARCH" = "alpha" ]; then
23323 - tristate ' TGA framebuffer support' CONFIG_FB_TGA
23324 + if [ "$ARCH" = "alpha" -o "$CONFIG_TC" = "y" ]; then
23325 + tristate ' TGA/SFB+ framebuffer support' CONFIG_FB_TGA
23326 fi
23327 if [ "$CONFIG_X86" = "y" ]; then
23328 bool ' VESA VGA graphics console' CONFIG_FB_VESA
23329 @@ -121,6 +121,17 @@
23330 hex ' Framebuffer Base Address' CONFIG_E1355_FB_BASE a8200000
23331 fi
23332 fi
23333 + if [ "$CONFIG_SOC_AU1100" = "y" ]; then
23334 + bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
23335 + fi
23336 +
23337 + if [ "$CONFIG_SOC_AU1200" = "y" ]; then
23338 + bool ' Au1200 LCD Driver' CONFIG_FB_AU1200
23339 + if [ "$CONFIG_FB_AU1200" = "y" ]; then
23340 + int ' Number of planes (1 to 4)' CONFIG_FB_AU1200_DEVS 1
23341 + fi
23342 + fi
23343 +
23344 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
23345 if [ "$CONFIG_PCI" != "n" ]; then
23346 tristate ' Matrox acceleration (EXPERIMENTAL)' CONFIG_FB_MATROX
23347 @@ -178,9 +189,6 @@
23348 bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT
23349 bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT
23350 fi
23351 - if [ "$CONFIG_SOC_AU1100" = "y" ]; then
23352 - bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
23353 - fi
23354 fi
23355 fi
23356 fi
23357 Index: linux-2.4.35.4/drivers/video/fbmem.c
23358 ===================================================================
23359 --- linux-2.4.35.4.orig/drivers/video/fbmem.c 2007-12-15 05:19:44.194939564 +0100
23360 +++ linux-2.4.35.4/drivers/video/fbmem.c 2007-12-15 05:19:44.994985156 +0100
23361 @@ -139,6 +139,8 @@
23362 extern int e1356fb_setup(char*);
23363 extern int au1100fb_init(void);
23364 extern int au1100fb_setup(char*);
23365 +extern int au1200fb_init(void);
23366 +extern int au1200fb_setup(char*);
23367 extern int pvr2fb_init(void);
23368 extern int pvr2fb_setup(char*);
23369 extern int sstfb_init(void);
23370 @@ -331,6 +333,9 @@
23371 #ifdef CONFIG_FB_AU1100
23372 { "au1100fb", au1100fb_init, au1100fb_setup },
23373 #endif
23374 +#ifdef CONFIG_FB_AU1200
23375 + { "au1200fb", au1200fb_init, au1200fb_setup },
23376 +#endif
23377 #ifdef CONFIG_FB_IT8181
23378 { "it8181fb", it8181fb_init, it8181fb_setup },
23379 #endif
23380 Index: linux-2.4.35.4/drivers/video/ims332.h
23381 ===================================================================
23382 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
23383 +++ linux-2.4.35.4/drivers/video/ims332.h 2007-12-15 05:19:44.994985156 +0100
23384 @@ -0,0 +1,275 @@
23385 +/*
23386 + * linux/drivers/video/ims332.h
23387 + *
23388 + * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
23389 + *
23390 + * This file is subject to the terms and conditions of the GNU General
23391 + * Public License. See the file COPYING in the main directory of this
23392 + * archive for more details.
23393 + */
23394 +#include <linux/types.h>
23395 +
23396 +/*
23397 + * IMS332 16-bit wide, 128-bit aligned registers.
23398 + */
23399 +struct _ims332_reg {
23400 + volatile u16 r;
23401 + u16 pad[7];
23402 +};
23403 +
23404 +struct _ims332_regs {
23405 +#define IMS332_BOOT_PLL_MUTLIPLIER 0x00001f
23406 +#define IMS332_BOOT_CLOCK_SOURCE_SEL 0x000020
23407 +#define IMS332_BOOT_ADDRESS_ALIGNMENT 0x000040
23408 +#define IMS332_BOOT_WRITE_ZERO 0xffff80
23409 + struct _ims332_reg boot;
23410 + struct _ims332_reg pad0[0x020 - 0x000];
23411 + struct _ims332_reg half_sync;
23412 + struct _ims332_reg back_porch;
23413 + struct _ims332_reg display;
23414 + struct _ims332_reg short_display;
23415 + struct _ims332_reg broad_pulse;
23416 + struct _ims332_reg vsync;
23417 + struct _ims332_reg vpre_equalise;
23418 + struct _ims332_reg vpost_equalise;
23419 + struct _ims332_reg vblank;
23420 + struct _ims332_reg vdisplay;
23421 + struct _ims332_reg line_time;
23422 + struct _ims332_reg line_start;
23423 + struct _ims332_reg mem_init;
23424 + struct _ims332_reg transfer_delay;
23425 + struct _ims332_reg pad1[0x03f - 0x02e];
23426 + struct _ims332_reg pixel_address_mask;
23427 + struct _ims332_reg pad2[0x05f - 0x040];
23428 +
23429 +#define IMS332_CTRL_A_BOOT_ENABLE_VTG 0x000001
23430 +#define IMS332_CTRL_A_SCREEN_FORMAT 0x000002
23431 +#define IMS332_CTRL_A_INTERLACED_STANDARD 0x000004
23432 +#define IMS332_CTRL_A_OPERATING_MODE 0x000008
23433 +#define IMS332_CTRL_A_FRAME_FLYBACK_PATTERN 0x000010
23434 +#define IMS332_CTRL_A_DIGITAL_SYNC_FORMAT 0x000020
23435 +#define IMS332_CTRL_A_ANALOGUE_VIDEO_FORMAT 0x000040
23436 +#define IMS332_CTRL_A_BLANK_LEVEL 0x000080
23437 +#define IMS332_CTRL_A_BLANK_IO 0x000100
23438 +#define IMS332_CTRL_A_BLANK_FUNCTION_SWITCH 0x000200
23439 +#define IMS332_CTRL_A_FORCE_BLANKING 0x000400
23440 +#define IMS332_CTRL_A_TURN_OFF_BLANKING 0x000800
23441 +#define IMS332_CTRL_A_VRAM_ADDRESS_INCREMENT 0x003000
23442 +#define IMS332_CTRL_A_TURN_OFF_DMA 0x004000
23443 +#define IMS332_CTRL_A_SYNC_DELAY 0x038000
23444 +#define IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING 0x040000
23445 +#define IMS332_CTRL_A_DELAYED_SAMPLING 0x080000
23446 +#define IMS332_CTRL_A_BITS_PER_PIXEL 0x700000
23447 +#define IMS332_CTRL_A_CURSOR_DISABLE 0x800000
23448 + struct _ims332_reg config_control_a;
23449 + struct _ims332_reg pad3[0x06f - 0x060];
23450 +
23451 +#define IMS332_CTRL_B_WRITE_ZERO 0xffffff
23452 + struct _ims332_reg config_control_b;
23453 + struct _ims332_reg pad4[0x07f - 0x070];
23454 + struct _ims332_reg screen_top;
23455 + struct _ims332_reg pad5[0x0a0 - 0x080];
23456 + /* cursor color palette, 3 entries, reg no. 0xa1 - 0xa3 */
23457 + struct _ims332_reg cursor_color_palette0;
23458 + struct _ims332_reg cursor_color_palette1;
23459 + struct _ims332_reg cursor_color_palette2;
23460 + struct _ims332_reg pad6[0x0bf - 0x0a3];
23461 + struct _ims332_reg rgb_frame_checksum0;
23462 + struct _ims332_reg rgb_frame_checksum1;
23463 + struct _ims332_reg rgb_frame_checksum2;
23464 + struct _ims332_reg pad7[0x0c6 - 0x0c2];
23465 + struct _ims332_reg cursor_start;
23466 + struct _ims332_reg pad8[0x0ff - 0x0c7];
23467 + /* color palette, 256 entries of form 0x00BBGGRR, reg no. 0x100 - 0x1ff */
23468 + struct _ims332_reg color_palette[0x1ff - 0x0ff];
23469 + /* hardware cursor bitmap, reg no. 0x200 - 0x3ff */
23470 + struct _ims332_reg cursor_ram[0x3ff - 0x1ff];
23471 +};
23472 +
23473 +/*
23474 + * In the functions below we use some weird looking helper variables to
23475 + * access most members of this struct, otherwise the compiler splits
23476 + * the read/write in two byte accesses.
23477 + */
23478 +struct ims332_regs {
23479 + struct _ims332_regs rw;
23480 + char pad0[0x80000 - sizeof (struct _ims332_regs)];
23481 + struct _ims332_regs r;
23482 + char pad1[0xa0000 - (sizeof (struct _ims332_regs) + 0x80000)];
23483 + struct _ims332_regs w;
23484 +} __attribute__((packed));
23485 +
23486 +static inline void ims332_control_reg_bits(struct ims332_regs *regs, u32 mask,
23487 + u32 val)
23488 +{
23489 + volatile u16 *ctr = &(regs->r.config_control_a.r);
23490 + volatile u16 *ctw = &(regs->w.config_control_a.r);
23491 + u32 ctrl;
23492 +
23493 + mb();
23494 + ctrl = *ctr;
23495 + rmb();
23496 + ctrl |= ((regs->rw.boot.r << 8) & 0x00ff0000);
23497 + ctrl |= val & mask;
23498 + ctrl &= ~(~val & mask);
23499 + wmb();
23500 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
23501 + wmb();
23502 + *ctw = ctrl & 0xffff;
23503 +}
23504 +
23505 +/* FIXME: This is maxinefb specific. */
23506 +static inline void ims332_bootstrap(struct ims332_regs *regs)
23507 +{
23508 + volatile u16 *ctw = &(regs->w.config_control_a.r);
23509 + u32 ctrl = IMS332_CTRL_A_BOOT_ENABLE_VTG | IMS332_CTRL_A_TURN_OFF_DMA;
23510 +
23511 + /* bootstrap sequence */
23512 + mb();
23513 + regs->rw.boot.r = 0;
23514 + wmb();
23515 + *ctw = 0;
23516 +
23517 + /* init control A register */
23518 + wmb();
23519 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
23520 + wmb();
23521 + *ctw = ctrl & 0xffff;
23522 +}
23523 +
23524 +static inline void ims332_blank_screen(struct ims332_regs *regs, int blank)
23525 +{
23526 + ims332_control_reg_bits(regs, IMS332_CTRL_A_FORCE_BLANKING,
23527 + blank ? IMS332_CTRL_A_FORCE_BLANKING : 0);
23528 +}
23529 +
23530 +static inline void ims332_set_color_depth(struct ims332_regs *regs, u32 depth)
23531 +{
23532 + u32 dp;
23533 + u32 mask = (IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING
23534 + | IMS332_CTRL_A_DELAYED_SAMPLING
23535 + | IMS332_CTRL_A_BITS_PER_PIXEL);
23536 +
23537 + switch (depth) {
23538 + case 1: dp = 0 << 20; break;
23539 + case 2: dp = 1 << 20; break;
23540 + case 4: dp = 2 << 20; break;
23541 + case 8: dp = 3 << 20; break;
23542 + case 15: dp = (4 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
23543 + case 16: dp = (5 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
23544 + default: return;
23545 + }
23546 + ims332_control_reg_bits(regs, mask, dp);
23547 +
23548 + if (depth <= 8) {
23549 + volatile u16 *pmask = &(regs->w.pixel_address_mask.r);
23550 + u32 dm = (1 << depth) - 1;
23551 +
23552 + wmb();
23553 + regs->rw.boot.r = dm << 8;
23554 + wmb();
23555 + *pmask = dm << 8 | dm;
23556 + }
23557 +}
23558 +
23559 +static inline void ims332_set_screen_top(struct ims332_regs *regs, u16 top)
23560 +{
23561 + volatile u16 *st = &(regs->w.screen_top.r);
23562 +
23563 + mb();
23564 + *st = top & 0xffff;
23565 +}
23566 +
23567 +static inline void ims332_enable_cursor(struct ims332_regs *regs, int on)
23568 +{
23569 + ims332_control_reg_bits(regs, IMS332_CTRL_A_CURSOR_DISABLE,
23570 + on ? 0 : IMS332_CTRL_A_CURSOR_DISABLE);
23571 +}
23572 +
23573 +static inline void ims332_position_cursor(struct ims332_regs *regs,
23574 + u16 x, u16 y)
23575 +{
23576 + volatile u16 *cp = &(regs->w.cursor_start.r);
23577 + u32 val = ((x & 0xfff) << 12) | (y & 0xfff);
23578 +
23579 + if (x > 2303 || y > 2303)
23580 + return;
23581 +
23582 + mb();
23583 + regs->rw.boot.r = (val >> 8) & 0xff00;
23584 + wmb();
23585 + *cp = val & 0xffff;
23586 +}
23587 +
23588 +static inline void ims332_set_font(struct ims332_regs *regs, u8 fgc,
23589 + u16 width, u16 height)
23590 +{
23591 + volatile u16 *cp0 = &(regs->w.cursor_color_palette0.r);
23592 + int i;
23593 +
23594 + mb();
23595 + for (i = 0; i < 0x200; i++) {
23596 + volatile u16 *cram = &(regs->w.cursor_ram[i].r);
23597 +
23598 + if (height << 6 <= i << 3)
23599 + *cram = 0x0000;
23600 + else if (width <= i % 8 << 3)
23601 + *cram = 0x0000;
23602 + else if (((width >> 3) & 0xffff) > i % 8)
23603 + *cram = 0x5555;
23604 + else
23605 + *cram = 0x5555 & ~(0xffff << (width % 8 << 1));
23606 + wmb();
23607 + }
23608 + regs->rw.boot.r = fgc << 8;
23609 + wmb();
23610 + *cp0 = fgc << 8 | fgc;
23611 +}
23612 +
23613 +static inline void ims332_read_cmap(struct ims332_regs *regs, u8 reg,
23614 + u8* red, u8* green, u8* blue)
23615 +{
23616 + volatile u16 *rptr = &(regs->r.color_palette[reg].r);
23617 + u16 val;
23618 +
23619 + mb();
23620 + val = *rptr;
23621 + *red = val & 0xff;
23622 + *green = (val >> 8) & 0xff;
23623 + rmb();
23624 + *blue = (regs->rw.boot.r >> 8) & 0xff;
23625 +}
23626 +
23627 +static inline void ims332_write_cmap(struct ims332_regs *regs, u8 reg,
23628 + u8 red, u8 green, u8 blue)
23629 +{
23630 + volatile u16 *wptr = &(regs->w.color_palette[reg].r);
23631 +
23632 + mb();
23633 + regs->rw.boot.r = blue << 8;
23634 + wmb();
23635 + *wptr = (green << 8) + red;
23636 +}
23637 +
23638 +static inline void ims332_dump_regs(struct ims332_regs *regs)
23639 +{
23640 + int i;
23641 +
23642 + printk(__FUNCTION__);
23643 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG, 0);
23644 + for (i = 0; i < 0x100; i++) {
23645 + volatile u16 *cpad = (u16 *)((char *)(&regs->r) + sizeof(struct _ims332_reg) * i);
23646 + u32 val;
23647 +
23648 + val = *cpad;
23649 + rmb();
23650 + val |= regs->rw.boot.r << 8;
23651 + rmb();
23652 + if (! (i % 8))
23653 + printk("\n%02x:", i);
23654 + printk(" %06x", val);
23655 + }
23656 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG,
23657 + IMS332_CTRL_A_BOOT_ENABLE_VTG);
23658 + printk("\n");
23659 +}
23660 Index: linux-2.4.35.4/drivers/video/Makefile
23661 ===================================================================
23662 --- linux-2.4.35.4.orig/drivers/video/Makefile 2007-12-15 05:19:44.206940249 +0100
23663 +++ linux-2.4.35.4/drivers/video/Makefile 2007-12-15 05:19:44.994985156 +0100
23664 @@ -87,6 +87,7 @@
23665 obj-$(CONFIG_FB_MAXINE) += maxinefb.o
23666 obj-$(CONFIG_FB_TX3912) += tx3912fb.o
23667 obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o
23668 +obj-$(CONFIG_FB_AU1200) += au1200fb.o fbgen.o
23669 obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o
23670
23671 subdir-$(CONFIG_STI_CONSOLE) += sti
23672 Index: linux-2.4.35.4/drivers/video/maxinefb.h
23673 ===================================================================
23674 --- linux-2.4.35.4.orig/drivers/video/maxinefb.h 2007-12-15 05:19:44.214940704 +0100
23675 +++ /dev/null 1970-01-01 00:00:00.000000000 +0000
23676 @@ -1,38 +0,0 @@
23677 -/*
23678 - * linux/drivers/video/maxinefb.h
23679 - *
23680 - * DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
23681 - * Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
23682 - * This file is subject to the terms and conditions of the GNU General
23683 - * Public License. See the file COPYING in the main directory of this
23684 - * archive for more details.
23685 - */
23686 -
23687 -#include <asm/addrspace.h>
23688 -
23689 -/*
23690 - * IMS332 video controller register base address
23691 - */
23692 -#define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000)
23693 -
23694 -/*
23695 - * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
23696 - * is 1024x768x8
23697 - */
23698 -#define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)
23699 -
23700 -/*
23701 - * The IMS 332 video controller used in the DECstation 5000/xx series
23702 - * uses 32 bits wide registers; the following defines declare the
23703 - * register numbers, to get the real offset, these have to be multiplied
23704 - * by four.
23705 - */
23706 -
23707 -#define IMS332_REG_CURSOR_RAM 0x200 /* hardware cursor bitmap */
23708 -
23709 -/*
23710 - * The color palette entries have the form 0x00BBGGRR
23711 - */
23712 -#define IMS332_REG_COLOR_PALETTE 0x100 /* color palette, 256 entries */
23713 -#define IMS332_REG_CURSOR_COLOR_PALETTE 0x0a1 /* cursor color palette, */
23714 - /* 3 entries */
23715 Index: linux-2.4.35.4/drivers/video/newport_con.c
23716 ===================================================================
23717 --- linux-2.4.35.4.orig/drivers/video/newport_con.c 2007-12-15 05:19:44.222941159 +0100
23718 +++ linux-2.4.35.4/drivers/video/newport_con.c 2007-12-15 05:19:45.002985611 +0100
23719 @@ -22,6 +22,7 @@
23720 #include <linux/module.h>
23721 #include <linux/slab.h>
23722
23723 +#include <asm/io.h>
23724 #include <asm/uaccess.h>
23725 #include <asm/system.h>
23726 #include <asm/page.h>
23727 @@ -77,7 +78,7 @@
23728 static inline void newport_render_background(int xstart, int ystart,
23729 int xend, int yend, int ci)
23730 {
23731 - newport_wait();
23732 + newport_wait(npregs);
23733 npregs->set.wrmask = 0xffffffff;
23734 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23735 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23736 @@ -94,7 +95,7 @@
23737 unsigned short i;
23738
23739 for (i = 0; i < 16; i++) {
23740 - newport_bfwait();
23741 + newport_bfwait(npregs);
23742 newport_cmap_setaddr(npregs, color_table[i]);
23743 newport_cmap_setrgb(npregs,
23744 default_red[i],
23745 @@ -107,7 +108,7 @@
23746 unsigned long i;
23747
23748 for (i = 0; i < LINUX_LOGO_COLORS; i++) {
23749 - newport_bfwait();
23750 + newport_bfwait(npregs);
23751 newport_cmap_setaddr(npregs, i + 0x20);
23752 newport_cmap_setrgb(npregs,
23753 linux_logo_red[i],
23754 @@ -115,13 +116,13 @@
23755 linux_logo_blue[i]);
23756 }
23757
23758 - newport_wait();
23759 + newport_wait(npregs);
23760 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23761 NPORT_DMODE0_CHOST);
23762
23763 npregs->set.xystarti = ((newport_xsize - LOGO_W) << 16) | (0);
23764 npregs->set.xyendi = ((newport_xsize - 1) << 16);
23765 - newport_wait();
23766 + newport_wait(npregs);
23767
23768 for (i = 0; i < LOGO_W * LOGO_H; i++)
23769 npregs->go.hostrw0 = linux_logo[i] << 24;
23770 @@ -133,7 +134,7 @@
23771 if (logo_active)
23772 return;
23773
23774 - newport_wait();
23775 + newport_wait(npregs);
23776 npregs->set.wrmask = 0xffffffff;
23777 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23778 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23779 @@ -155,7 +156,7 @@
23780 unsigned short treg;
23781 int i;
23782
23783 - newport_wait();
23784 + newport_wait(npregs);
23785 treg = newport_vc2_get(npregs, VC2_IREG_CONTROL);
23786 newport_vc2_set(npregs, VC2_IREG_CONTROL,
23787 (treg | VC2_CTRL_EVIDEO));
23788 @@ -165,7 +166,7 @@
23789 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23790 NPORT_DMODE_W2 | VC2_PROTOCOL);
23791 for (i = 0; i < 128; i++) {
23792 - newport_bfwait();
23793 + newport_bfwait(npregs);
23794 if (i == 92 || i == 94)
23795 npregs->set.dcbdata0.byshort.s1 = 0xff00;
23796 else
23797 @@ -205,7 +206,7 @@
23798 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23799 NPORT_DMODE_W2 | VC2_PROTOCOL);
23800 for (i = 0; i < 128; i++) {
23801 - newport_bfwait();
23802 + newport_bfwait(npregs);
23803 linetable[i] = npregs->set.dcbdata0.byshort.s1;
23804 }
23805
23806 @@ -216,12 +217,12 @@
23807 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23808 NPORT_DMODE_W2 | VC2_PROTOCOL);
23809 do {
23810 - newport_bfwait();
23811 + newport_bfwait(npregs);
23812 treg = npregs->set.dcbdata0.byshort.s1;
23813 if ((treg & 1) == 0)
23814 cols += (treg >> 7) & 0xfe;
23815 if ((treg & 0x80) == 0) {
23816 - newport_bfwait();
23817 + newport_bfwait(npregs);
23818 treg = npregs->set.dcbdata0.byshort.s1;
23819 }
23820 } while ((treg & 0x8000) == 0);
23821 @@ -291,16 +292,16 @@
23822
23823 if (!sgi_gfxaddr)
23824 return NULL;
23825 - npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
23826 + npregs = (struct newport_regs *) /* ioremap cannot fail */
23827 + ioremap(sgi_gfxaddr, sizeof(struct newport_regs));
23828 npregs->cset.config = NPORT_CFG_GD0;
23829
23830 - if (newport_wait()) {
23831 - return NULL;
23832 - }
23833 + if (newport_wait(npregs))
23834 + goto out_unmap;
23835
23836 npregs->set.xstarti = TESTVAL;
23837 if (npregs->set._xstart.word != XSTI_TO_FXSTART(TESTVAL))
23838 - return NULL;
23839 + goto out_unmap;
23840
23841 for (i = 0; i < MAX_NR_CONSOLES; i++)
23842 font_data[i] = FONT_DATA;
23843 @@ -310,6 +311,10 @@
23844 newport_get_screensize();
23845
23846 return "SGI Newport";
23847 +
23848 +out_unmap:
23849 + iounmap((void *)npregs);
23850 + return NULL;
23851 }
23852
23853 static void newport_init(struct vc_data *vc, int init)
23854 @@ -363,7 +368,7 @@
23855 (charattr & 0xf0) >> 4);
23856
23857 /* Set the color and drawing mode. */
23858 - newport_wait();
23859 + newport_wait(npregs);
23860 npregs->set.colori = charattr & 0xf;
23861 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23862 NPORT_DMODE0_STOPX | NPORT_DMODE0_ZPENAB |
23863 @@ -372,7 +377,7 @@
23864 /* Set coordinates for bitmap operation. */
23865 npregs->set.xystarti = (xpos << 16) | ((ypos + topscan) & 0x3ff);
23866 npregs->set.xyendi = ((xpos + 7) << 16);
23867 - newport_wait();
23868 + newport_wait(npregs);
23869
23870 /* Go, baby, go... */
23871 RENDER(npregs, p);
23872 @@ -396,7 +401,7 @@
23873 xpos + ((count - 1) << 3), ypos,
23874 (charattr & 0xf0) >> 4);
23875
23876 - newport_wait();
23877 + newport_wait(npregs);
23878
23879 /* Set the color and drawing mode. */
23880 npregs->set.colori = charattr & 0xf;
23881 @@ -407,7 +412,7 @@
23882 for (i = 0; i < count; i++, xpos += 8) {
23883 p = &font_data[vc->vc_num][(scr_readw(s++) & 0xff) << 4];
23884
23885 - newport_wait();
23886 + newport_wait(npregs);
23887
23888 /* Set coordinates for bitmap operation. */
23889 npregs->set.xystarti =
23890 @@ -689,7 +694,7 @@
23891 xe = xs;
23892 xs = tmp;
23893 }
23894 - newport_wait();
23895 + newport_wait(npregs);
23896 npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
23897 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23898 | NPORT_DMODE0_STOPY);
23899 @@ -706,35 +711,35 @@
23900 #define DUMMY (void *) newport_dummy
23901
23902 const struct consw newport_con = {
23903 - con_startup: newport_startup,
23904 - con_init: newport_init,
23905 - con_deinit: newport_deinit,
23906 - con_clear: newport_clear,
23907 - con_putc: newport_putc,
23908 - con_putcs: newport_putcs,
23909 - con_cursor: newport_cursor,
23910 - con_scroll: newport_scroll,
23911 - con_bmove: newport_bmove,
23912 - con_switch: newport_switch,
23913 - con_blank: newport_blank,
23914 - con_font_op: newport_font_op,
23915 - con_set_palette: newport_set_palette,
23916 - con_scrolldelta: newport_scrolldelta,
23917 - con_set_origin: DUMMY,
23918 - con_save_screen: DUMMY
23919 + .con_startup = newport_startup,
23920 + .con_init = newport_init,
23921 + .con_deinit = newport_deinit,
23922 + .con_clear = newport_clear,
23923 + .con_putc = newport_putc,
23924 + .con_putcs = newport_putcs,
23925 + .con_cursor = newport_cursor,
23926 + .con_scroll = newport_scroll,
23927 + .con_bmove = newport_bmove,
23928 + .con_switch = newport_switch,
23929 + .con_blank = newport_blank,
23930 + .con_font_op = newport_font_op,
23931 + .con_set_palette = newport_set_palette,
23932 + .con_scrolldelta = newport_scrolldelta,
23933 + .con_set_origin = DUMMY,
23934 + .con_save_screen = DUMMY
23935 };
23936
23937 #ifdef MODULE
23938 static int __init newport_console_init(void)
23939 {
23940 take_over_console(&newport_con, 0, MAX_NR_CONSOLES - 1, 1);
23941 -
23942 return 0;
23943 }
23944
23945 static void __exit newport_console_exit(void)
23946 {
23947 give_up_console(&newport_con);
23948 + iounmap((void *)npregs);
23949 }
23950
23951 module_init(newport_console_init);
23952 Index: linux-2.4.35.4/drivers/video/tgafb.c
23953 ===================================================================
23954 --- linux-2.4.35.4.orig/drivers/video/tgafb.c 2007-12-15 05:19:44.230941615 +0100
23955 +++ linux-2.4.35.4/drivers/video/tgafb.c 2007-12-15 05:19:45.002985611 +0100
23956 @@ -45,6 +45,15 @@
23957 #include <linux/console.h>
23958 #include <asm/io.h>
23959
23960 +#ifdef CONFIG_TC
23961 +#include <asm/dec/tc.h>
23962 +#else
23963 +static int search_tc_card(const char *) { return -1; }
23964 +static void claim_tc_card(int) { }
23965 +static void release_tc_card(int) { }
23966 +static unsigned long get_tc_base_addr(int) { return 0; }
23967 +#endif
23968 +
23969 #include <video/fbcon.h>
23970 #include <video/fbcon-cfb8.h>
23971 #include <video/fbcon-cfb32.h>
23972 @@ -84,10 +93,10 @@
23973 };
23974
23975 static unsigned int deep_presets[4] = {
23976 - 0x00014000,
23977 - 0x0001440d,
23978 + 0x00004000,
23979 + 0x0000440d,
23980 0xffffffff,
23981 - 0x0001441d
23982 + 0x0000441d
23983 };
23984
23985 static unsigned int rasterop_presets[4] = {
23986 @@ -131,6 +140,13 @@
23987 0,
23988 FB_VMODE_NONINTERLACED
23989 }},
23990 + { "1280x1024-72", { /* mode #0 of PMAGD boards */
23991 + 1280, 1024, 1280, 1024, 0, 0, 0, 0,
23992 + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
23993 + 0, 0, -1, -1, FB_ACCELF_TEXT, 7692, 232, 32, 34, 3, 160, 3,
23994 + FB_SYNC_ON_GREEN,
23995 + FB_VMODE_NONINTERLACED
23996 + }},
23997 { "800x600-56", {
23998 800, 600, 800, 600, 0, 0, 0, 0,
23999 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
24000 @@ -488,7 +504,8 @@
24001 continue;
24002
24003 mb();
24004 - TGA_WRITE_REG(deep_presets[fb_info.tga_type], TGA_DEEP_REG);
24005 + TGA_WRITE_REG(deep_presets[fb_info.tga_type] |
24006 + (par->sync_on_green ? 0x0 : 0x00010000), TGA_DEEP_REG);
24007 while (TGA_READ_REG(TGA_CMD_STAT_REG) & 1) /* wait for not busy */
24008 continue;
24009 mb();
24010 @@ -548,7 +565,7 @@
24011 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
24012 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
24013 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2,
24014 - (par->sync_on_green ? 0x80 : 0x40));
24015 + (par->sync_on_green ? 0xc0 : 0x40));
24016
24017 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
24018 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
24019 @@ -921,19 +938,34 @@
24020 int __init tgafb_init(void)
24021 {
24022 struct pci_dev *pdev;
24023 + int slot;
24024
24025 pdev = pci_find_device(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, NULL);
24026 if (!pdev)
24027 + slot = search_tc_card("PMAGD");
24028 + if (!pdev && slot < 0)
24029 return -ENXIO;
24030
24031 /* divine board type */
24032
24033 - fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start, 0);
24034 - fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
24035 - fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
24036 - fb_info.tga_fb_base = (fb_info.tga_mem_base
24037 + if (pdev) {
24038 + fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start,
24039 + 0);
24040 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
24041 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
24042 + fb_info.tga_fb_base = (fb_info.tga_mem_base
24043 + fb_offset_presets[fb_info.tga_type]);
24044 - pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
24045 + pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
24046 +
24047 + } else {
24048 + claim_tc_card(slot);
24049 + fb_info.tga_mem_base = get_tc_base_addr(slot);
24050 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f; /* ? */
24051 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
24052 + fb_info.tga_fb_base = (fb_info.tga_mem_base
24053 + + fb_offset_presets[fb_info.tga_type]);
24054 + fb_info.tga_chip_rev = TGA_READ_REG(TGA_START_REG) & 0xff;
24055 + }
24056
24057 /* setup framebuffer */
24058
24059 @@ -950,40 +982,62 @@
24060 fb_info.gen.fbhw = &tgafb_hwswitch;
24061 fb_info.gen.fbhw->detect();
24062
24063 - printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", fb_info.tga_chip_rev);
24064 - printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
24065 - pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
24066 + if (pdev) {
24067 + printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
24068 + fb_info.tga_chip_rev);
24069 + printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
24070 + pdev->bus->number,
24071 + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
24072 + } else {
24073 + printk (KERN_INFO "tgafb: SFB+ detected, rev=0x%02x\n",
24074 + fb_info.tga_chip_rev);
24075 + }
24076
24077 switch (fb_info.tga_type)
24078 {
24079 case TGA_TYPE_8PLANE:
24080 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
24081 + if (pdev)
24082 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
24083 + else
24084 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E1");
24085 break;
24086
24087 case TGA_TYPE_24PLANE:
24088 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
24089 + if (pdev)
24090 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
24091 + else
24092 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E2");
24093 break;
24094
24095 case TGA_TYPE_24PLUSZ:
24096 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
24097 + if (pdev)
24098 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
24099 + else
24100 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E3");
24101 break;
24102 }
24103
24104 /* This should give a reasonable default video mode */
24105
24106 if (!default_var_valid) {
24107 - default_var = tgafb_predefined[0].var;
24108 + if (pdev)
24109 + default_var = tgafb_predefined[0].var;
24110 + else
24111 + default_var = tgafb_predefined[1].var;
24112 }
24113 fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
24114 disp.var.activate = FB_ACTIVATE_NOW;
24115 fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
24116 fbgen_set_disp(-1, &fb_info.gen);
24117 fbgen_install_cmap(0, &fb_info.gen);
24118 - if (register_framebuffer(&fb_info.gen.info) < 0)
24119 + if (register_framebuffer(&fb_info.gen.info) < 0) {
24120 + if (slot >= 0)
24121 + release_tc_card(slot);
24122 return -EINVAL;
24123 - printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
24124 + }
24125 + printk(KERN_INFO "fb%d: %s frame buffer device at 0x%llx\n",
24126 GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename,
24127 - pdev->resource[0].start);
24128 + fb_info.tga_mem_base);
24129 return 0;
24130 }
24131
24132 Index: linux-2.4.35.4/drivers/video/tgafb.h
24133 ===================================================================
24134 --- linux-2.4.35.4.orig/drivers/video/tgafb.h 2007-12-15 05:19:44.238942073 +0100
24135 +++ linux-2.4.35.4/drivers/video/tgafb.h 2007-12-15 05:19:45.002985611 +0100
24136 @@ -36,6 +36,7 @@
24137 #define TGA_RASTEROP_REG 0x0034
24138 #define TGA_PIXELSHIFT_REG 0x0038
24139 #define TGA_DEEP_REG 0x0050
24140 +#define TGA_START_REG 0x0054
24141 #define TGA_PIXELMASK_REG 0x005c
24142 #define TGA_CURSOR_BASE_REG 0x0060
24143 #define TGA_HORIZ_REG 0x0064
24144 Index: linux-2.4.35.4/fs/binfmt_elf.c
24145 ===================================================================
24146 --- linux-2.4.35.4.orig/fs/binfmt_elf.c 2007-12-15 05:19:44.246942528 +0100
24147 +++ linux-2.4.35.4/fs/binfmt_elf.c 2007-12-15 05:19:45.006985841 +0100
24148 @@ -665,6 +665,9 @@
24149 bprm->argc++;
24150 }
24151 }
24152 + } else {
24153 + /* Executables without an interpreter also need a personality */
24154 + SET_PERSONALITY(elf_ex, ibcs2_interpreter);
24155 }
24156
24157 /* Flush all traces of the currently running executable */
24158 @@ -1225,7 +1228,11 @@
24159 elf.e_entry = 0;
24160 elf.e_phoff = sizeof(elf);
24161 elf.e_shoff = 0;
24162 +#ifdef ELF_CORE_EFLAGS
24163 + elf.e_flags = ELF_CORE_EFLAGS;
24164 +#else
24165 elf.e_flags = 0;
24166 +#endif
24167 elf.e_ehsize = sizeof(elf);
24168 elf.e_phentsize = sizeof(struct elf_phdr);
24169 elf.e_phnum = segs+1; /* Include notes */
24170 Index: linux-2.4.35.4/fs/partitions/sgi.c
24171 ===================================================================
24172 --- linux-2.4.35.4.orig/fs/partitions/sgi.c 2007-12-15 05:19:44.254942983 +0100
24173 +++ linux-2.4.35.4/fs/partitions/sgi.c 2007-12-15 05:19:45.006985841 +0100
24174 @@ -17,6 +17,11 @@
24175 #include "check.h"
24176 #include "sgi.h"
24177
24178 +#if CONFIG_BLK_DEV_MD
24179 +extern void md_autodetect_dev(kdev_t dev);
24180 +#endif
24181 +
24182 +
24183 int sgi_partition(struct gendisk *hd, struct block_device *bdev, unsigned long first_sector, int current_minor)
24184 {
24185 int i, csum, magic;
24186 @@ -77,6 +82,10 @@
24187 if(!blocks)
24188 continue;
24189 add_gd_partition(hd, current_minor, start, blocks);
24190 +#ifdef CONFIG_BLK_DEV_MD
24191 + if (be32_to_cpu(p->type) == LINUX_RAID_PARTITION)
24192 + md_autodetect_dev(MKDEV(hd->major, current_minor));
24193 +#endif
24194 current_minor++;
24195 }
24196 printk("\n");
24197 Index: linux-2.4.35.4/fs/proc/array.c
24198 ===================================================================
24199 --- linux-2.4.35.4.orig/fs/proc/array.c 2007-12-15 05:19:44.262943439 +0100
24200 +++ linux-2.4.35.4/fs/proc/array.c 2007-12-15 05:19:45.006985841 +0100
24201 @@ -368,15 +368,15 @@
24202 task->cmin_flt,
24203 task->maj_flt,
24204 task->cmaj_flt,
24205 - task->times.tms_utime,
24206 - task->times.tms_stime,
24207 - task->times.tms_cutime,
24208 - task->times.tms_cstime,
24209 + hz_to_std(task->times.tms_utime),
24210 + hz_to_std(task->times.tms_stime),
24211 + hz_to_std(task->times.tms_cutime),
24212 + hz_to_std(task->times.tms_cstime),
24213 priority,
24214 nice,
24215 0UL /* removed */,
24216 task->it_real_value,
24217 - task->start_time,
24218 + hz_to_std(task->start_time),
24219 vsize,
24220 mm ? mm->rss : 0, /* you might want to shift this left 3 */
24221 task->rlim[RLIMIT_RSS].rlim_cur,
24222 @@ -615,14 +615,14 @@
24223
24224 len = sprintf(buffer,
24225 "cpu %lu %lu\n",
24226 - task->times.tms_utime,
24227 - task->times.tms_stime);
24228 + hz_to_std(task->times.tms_utime),
24229 + hz_to_std(task->times.tms_stime));
24230
24231 for (i = 0 ; i < smp_num_cpus; i++)
24232 len += sprintf(buffer + len, "cpu%d %lu %lu\n",
24233 i,
24234 - task->per_cpu_utime[cpu_logical_map(i)],
24235 - task->per_cpu_stime[cpu_logical_map(i)]);
24236 + hz_to_std(task->per_cpu_utime[cpu_logical_map(i)]),
24237 + hz_to_std(task->per_cpu_stime[cpu_logical_map(i)]));
24238
24239 return len;
24240 }
24241 Index: linux-2.4.35.4/fs/proc/proc_misc.c
24242 ===================================================================
24243 --- linux-2.4.35.4.orig/fs/proc/proc_misc.c 2007-12-15 05:19:44.270943894 +0100
24244 +++ linux-2.4.35.4/fs/proc/proc_misc.c 2007-12-15 05:19:45.006985841 +0100
24245 @@ -308,16 +308,16 @@
24246 {
24247 int i, len = 0;
24248 extern unsigned long total_forks;
24249 - unsigned long jif = jiffies;
24250 + unsigned long jif = hz_to_std(jiffies);
24251 unsigned int sum = 0, user = 0, nice = 0, system = 0;
24252 int major, disk;
24253
24254 for (i = 0 ; i < smp_num_cpus; i++) {
24255 int cpu = cpu_logical_map(i), j;
24256
24257 - user += kstat.per_cpu_user[cpu];
24258 - nice += kstat.per_cpu_nice[cpu];
24259 - system += kstat.per_cpu_system[cpu];
24260 + user += hz_to_std(kstat.per_cpu_user[cpu]);
24261 + nice += hz_to_std(kstat.per_cpu_nice[cpu]);
24262 + system += hz_to_std(kstat.per_cpu_system[cpu]);
24263 #if !defined(CONFIG_ARCH_S390)
24264 for (j = 0 ; j < NR_IRQS ; j++)
24265 sum += kstat.irqs[cpu][j];
24266 @@ -331,10 +331,10 @@
24267 proc_sprintf(page, &off, &len,
24268 "cpu%d %u %u %u %lu\n",
24269 i,
24270 - kstat.per_cpu_user[cpu_logical_map(i)],
24271 - kstat.per_cpu_nice[cpu_logical_map(i)],
24272 - kstat.per_cpu_system[cpu_logical_map(i)],
24273 - jif - ( kstat.per_cpu_user[cpu_logical_map(i)] \
24274 + hz_to_std(kstat.per_cpu_user[cpu_logical_map(i)]),
24275 + hz_to_std(kstat.per_cpu_nice[cpu_logical_map(i)]),
24276 + hz_to_std(kstat.per_cpu_system[cpu_logical_map(i)]),
24277 + jif - hz_to_std( kstat.per_cpu_user[cpu_logical_map(i)] \
24278 + kstat.per_cpu_nice[cpu_logical_map(i)] \
24279 + kstat.per_cpu_system[cpu_logical_map(i)]));
24280 proc_sprintf(page, &off, &len,
24281 Index: linux-2.4.35.4/include/asm-alpha/param.h
24282 ===================================================================
24283 --- linux-2.4.35.4.orig/include/asm-alpha/param.h 2007-12-15 05:19:44.278944352 +0100
24284 +++ linux-2.4.35.4/include/asm-alpha/param.h 2007-12-15 05:19:45.010986067 +0100
24285 @@ -13,6 +13,9 @@
24286 # else
24287 # define HZ 1200
24288 # endif
24289 +#ifdef __KERNEL__
24290 +# define hz_to_std(a) (a)
24291 +#endif
24292 #endif
24293
24294 #define EXEC_PAGESIZE 8192
24295 Index: linux-2.4.35.4/include/asm-i386/param.h
24296 ===================================================================
24297 --- linux-2.4.35.4.orig/include/asm-i386/param.h 2007-12-15 05:19:44.290945034 +0100
24298 +++ linux-2.4.35.4/include/asm-i386/param.h 2007-12-15 05:19:45.010986067 +0100
24299 @@ -3,6 +3,9 @@
24300
24301 #ifndef HZ
24302 #define HZ 100
24303 +#ifdef __KERNEL__
24304 +#define hz_to_std(a) (a)
24305 +#endif
24306 #endif
24307
24308 #define EXEC_PAGESIZE 4096
24309 Index: linux-2.4.35.4/include/asm-ia64/param.h
24310 ===================================================================
24311 --- linux-2.4.35.4.orig/include/asm-ia64/param.h 2007-12-15 05:19:44.298945492 +0100
24312 +++ linux-2.4.35.4/include/asm-ia64/param.h 2007-12-15 05:19:45.010986067 +0100
24313 @@ -7,9 +7,15 @@
24314 * Based on <asm-i386/param.h>.
24315 *
24316 * Modified 1998, 1999, 2002-2003
24317 - * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
24318 + * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
24319 */
24320
24321 +#include <linux/config.h>
24322 +
24323 +#ifdef __KERNEL__
24324 +#define hz_to_std(a) (a)
24325 +#endif
24326 +
24327 #define EXEC_PAGESIZE 65536
24328
24329 #ifndef NGROUPS
24330 Index: linux-2.4.35.4/include/asm-m68k/param.h
24331 ===================================================================
24332 --- linux-2.4.35.4.orig/include/asm-m68k/param.h 2007-12-15 05:19:44.306945948 +0100
24333 +++ linux-2.4.35.4/include/asm-m68k/param.h 2007-12-15 05:19:45.010986067 +0100
24334 @@ -3,6 +3,9 @@
24335
24336 #ifndef HZ
24337 #define HZ 100
24338 +#ifdef __KERNEL__
24339 +#define hz_to_std(a) (a)
24340 +#endif
24341 #endif
24342
24343 #define EXEC_PAGESIZE 8192
24344 Index: linux-2.4.35.4/include/asm-mips/au1000_gpio.h
24345 ===================================================================
24346 --- linux-2.4.35.4.orig/include/asm-mips/au1000_gpio.h 2007-12-15 05:19:44.314946403 +0100
24347 +++ linux-2.4.35.4/include/asm-mips/au1000_gpio.h 2007-12-15 05:19:45.014986296 +0100
24348 @@ -30,6 +30,13 @@
24349 * 675 Mass Ave, Cambridge, MA 02139, USA.
24350 */
24351
24352 +/*
24353 + * Revision history
24354 + * 01/31/02 0.01 Initial release. Steve Longerbeam, MontaVista
24355 + * 10/12/03 0.1 Added Au1100/Au1500, GPIO2, and bit operations. K.C. Nishio, AMD
24356 + * 08/05/04 0.11 Added Au1550 and Au1200. K.C. Nishio
24357 + */
24358 +
24359 #ifndef __AU1000_GPIO_H
24360 #define __AU1000_GPIO_H
24361
24362 @@ -44,13 +51,94 @@
24363 #define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
24364 #define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
24365
24366 +// bit operations
24367 +#define AU1000GPIO_BIT_READ _IOW (AU1000GPIO_IOC_MAGIC, 6, int)
24368 +#define AU1000GPIO_BIT_SET _IOW (AU1000GPIO_IOC_MAGIC, 7, int)
24369 +#define AU1000GPIO_BIT_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 8, int)
24370 +#define AU1000GPIO_BIT_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 9, int)
24371 +#define AU1000GPIO_BIT_INIT _IOW (AU1000GPIO_IOC_MAGIC, 10, int)
24372 +#define AU1000GPIO_BIT_TERM _IOW (AU1000GPIO_IOC_MAGIC, 11, int)
24373 +
24374 +/* set this major numer same as the CRIS GPIO driver */
24375 +#define AU1X00_GPIO_MAJOR (120)
24376 +
24377 +#define ENABLED_ZERO (0)
24378 +#define ENABLED_ONE (1)
24379 +#define ENABLED_10 (0x2)
24380 +#define ENABLED_11 (0x3)
24381 +#define ENABLED_111 (0x7)
24382 +#define NOT_AVAIL (-1)
24383 +#define AU1X00_MAX_PRIMARY_GPIO (32)
24384 +
24385 +#define AU1000_GPIO_MINOR_MAX AU1X00_MAX_PRIMARY_GPIO
24386 +/* Au1100, 1500, 1550 and 1200 have the secondary GPIO block */
24387 +#define AU1XX0_GPIO_MINOR_MAX (48)
24388 +
24389 +#define AU1X00_GPIO_NAME "gpio"
24390 +
24391 +/* GPIO pins which are not multiplexed */
24392 +#if defined(CONFIG_SOC_AU1000)
24393 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
24394 + #define NATIVE_GPIO2PIN (0)
24395 +#elif defined(CONFIG_SOC_AU1100)
24396 + #define NATIVE_GPIOPIN ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20) | (1 << 19) | (1 << 18) | \
24397 + (1 << 17) | (1 << 16) | (1 << 7) | (1 << 1) | (1 << 0))
24398 + #define NATIVE_GPIO2PIN (0)
24399 +#elif defined(CONFIG_SOC_AU1500)
24400 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
24401 + /* exclude the PCI reset output signal: GPIO[200], DMA_REQ2 and DMA_REQ3 */
24402 + #define NATIVE_GPIO2PIN (0xfffe & ~((1 << 9) | (1 << 8)))
24403 +#elif defined(CONFIG_SOC_AU1550)
24404 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 6) | (1 << 1) | (1 << 0))
24405 + /* please refere Au1550 Data Book, chapter 15 */
24406 + #define NATIVE_GPIO2PIN (1 << 5)
24407 +#elif defined(CONFIG_SOC_AU1200)
24408 + #define NATIVE_GPIOPIN ((1 << 7) | (1 << 5))
24409 + #define NATIVE_GPIO2PIN (0)
24410 +#endif
24411 +
24412 +/* minor as u32 */
24413 +#define MINOR_TO_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? minor : (minor - AU1X00_MAX_PRIMARY_GPIO))
24414 +#define IS_PRIMARY_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? 1 : 0)
24415 +
24416 +/*
24417 + * pin to minor mapping.
24418 + * GPIO0-GPIO31, minor=0-31.
24419 + * GPIO200-GPIO215, minor=32-47.
24420 + */
24421 +typedef struct _au1x00_gpio_bit_ctl {
24422 + int direction; // The direction of this GPIO pin. 0: IN, 1: OUT.
24423 + int data; // Pin output when itized (0/1), or at the term. 0/1/-1 (tristate).
24424 +} au1x00_gpio_bit_ctl;
24425 +
24426 +typedef struct _au1x00_gpio_driver {
24427 + const char *driver_name;
24428 + const char *name;
24429 + int name_base; /* offset of printed name */
24430 + short major; /* major device number */
24431 + short minor_start; /* start of minor device number*/
24432 + short num; /* number of devices */
24433 +} au1x00_gpio_driver;
24434 +
24435 #ifdef __KERNEL__
24436 -extern u32 get_au1000_avail_gpio_mask(void);
24437 -extern int au1000gpio_tristate(u32 data);
24438 -extern int au1000gpio_in(u32 *data);
24439 -extern int au1000gpio_set(u32 data);
24440 -extern int au1000gpio_clear(u32 data);
24441 -extern int au1000gpio_out(u32 data);
24442 +extern u32 get_au1000_avail_gpio_mask(u32 *avail_gpio2);
24443 +extern int au1000gpio_tristate(u32 minor, u32 data);
24444 +extern int au1000gpio_in(u32 minor, u32 *data);
24445 +extern int au1000gpio_set(u32 minor, u32 data);
24446 +extern int au1000gpio_clear(u32 minor, u32 data);
24447 +extern int au1000gpio_out(u32 minor, u32 data);
24448 +extern int au1000gpio_bit_read(u32 minor, u32 *read_data);
24449 +extern int au1000gpio_bit_set(u32 minor);
24450 +extern int au1000gpio_bit_clear(u32 minor);
24451 +extern int au1000gpio_bit_tristate(u32 minor);
24452 +extern int check_minor_to_gpio(u32 minor);
24453 +extern int au1000gpio_bit_init(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
24454 +extern int au1000gpio_bit_term(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
24455 +
24456 +extern void gpio_register_devfs (au1x00_gpio_driver *driver, unsigned int flags, unsigned minor);
24457 +extern void gpio_unregister_devfs (au1x00_gpio_driver *driver, unsigned minor);
24458 +extern int gpio_register_driver(au1x00_gpio_driver *driver);
24459 +extern int gpio_unregister_driver(au1x00_gpio_driver *driver);
24460 #endif
24461
24462 #endif
24463 Index: linux-2.4.35.4/include/asm-mips/au1000.h
24464 ===================================================================
24465 --- linux-2.4.35.4.orig/include/asm-mips/au1000.h 2007-12-15 05:19:44.322946858 +0100
24466 +++ linux-2.4.35.4/include/asm-mips/au1000.h 2007-12-15 05:19:45.018986525 +0100
24467 @@ -160,28 +160,356 @@
24468 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
24469 #endif
24470
24471 -/* SDRAM Controller */
24472 +/*
24473 + * SDRAM Register Offsets
24474 + */
24475 #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
24476 -#define MEM_SDMODE0 0xB4000000
24477 -#define MEM_SDMODE1 0xB4000004
24478 -#define MEM_SDMODE2 0xB4000008
24479 -
24480 -#define MEM_SDADDR0 0xB400000C
24481 -#define MEM_SDADDR1 0xB4000010
24482 -#define MEM_SDADDR2 0xB4000014
24483 -
24484 -#define MEM_SDREFCFG 0xB4000018
24485 -#define MEM_SDPRECMD 0xB400001C
24486 -#define MEM_SDAUTOREF 0xB4000020
24487 -
24488 -#define MEM_SDWRMD0 0xB4000024
24489 -#define MEM_SDWRMD1 0xB4000028
24490 -#define MEM_SDWRMD2 0xB400002C
24491 +#define MEM_SDMODE0 (0x0000)
24492 +#define MEM_SDMODE1 (0x0004)
24493 +#define MEM_SDMODE2 (0x0008)
24494 +#define MEM_SDADDR0 (0x000C)
24495 +#define MEM_SDADDR1 (0x0010)
24496 +#define MEM_SDADDR2 (0x0014)
24497 +#define MEM_SDREFCFG (0x0018)
24498 +#define MEM_SDPRECMD (0x001C)
24499 +#define MEM_SDAUTOREF (0x0020)
24500 +#define MEM_SDWRMD0 (0x0024)
24501 +#define MEM_SDWRMD1 (0x0028)
24502 +#define MEM_SDWRMD2 (0x002C)
24503 +#define MEM_SDSLEEP (0x0030)
24504 +#define MEM_SDSMCKE (0x0034)
24505 +
24506 +#ifndef ASSEMBLER
24507 +/*typedef volatile struct
24508 +{
24509 + uint32 sdmode0;
24510 + uint32 sdmode1;
24511 + uint32 sdmode2;
24512 + uint32 sdaddr0;
24513 + uint32 sdaddr1;
24514 + uint32 sdaddr2;
24515 + uint32 sdrefcfg;
24516 + uint32 sdautoref;
24517 + uint32 sdwrmd0;
24518 + uint32 sdwrmd1;
24519 + uint32 sdwrmd2;
24520 + uint32 sdsleep;
24521 + uint32 sdsmcke;
24522 +
24523 +} AU1X00_SDRAM;*/
24524 +#endif
24525 +
24526 +/*
24527 + * MEM_SDMODE register content definitions
24528 + */
24529 +#define MEM_SDMODE_F (1<<22)
24530 +#define MEM_SDMODE_SR (1<<21)
24531 +#define MEM_SDMODE_BS (1<<20)
24532 +#define MEM_SDMODE_RS (3<<18)
24533 +#define MEM_SDMODE_CS (7<<15)
24534 +#define MEM_SDMODE_TRAS (15<<11)
24535 +#define MEM_SDMODE_TMRD (3<<9)
24536 +#define MEM_SDMODE_TWR (3<<7)
24537 +#define MEM_SDMODE_TRP (3<<5)
24538 +#define MEM_SDMODE_TRCD (3<<3)
24539 +#define MEM_SDMODE_TCL (7<<0)
24540 +
24541 +#define MEM_SDMODE_BS_2Bank (0<<20)
24542 +#define MEM_SDMODE_BS_4Bank (1<<20)
24543 +#define MEM_SDMODE_RS_11Row (0<<18)
24544 +#define MEM_SDMODE_RS_12Row (1<<18)
24545 +#define MEM_SDMODE_RS_13Row (2<<18)
24546 +#define MEM_SDMODE_RS_N(N) ((N)<<18)
24547 +#define MEM_SDMODE_CS_7Col (0<<15)
24548 +#define MEM_SDMODE_CS_8Col (1<<15)
24549 +#define MEM_SDMODE_CS_9Col (2<<15)
24550 +#define MEM_SDMODE_CS_10Col (3<<15)
24551 +#define MEM_SDMODE_CS_11Col (4<<15)
24552 +#define MEM_SDMODE_CS_N(N) ((N)<<15)
24553 +#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
24554 +#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
24555 +#define MEM_SDMODE_TWR_N(N) ((N)<<7)
24556 +#define MEM_SDMODE_TRP_N(N) ((N)<<5)
24557 +#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
24558 +#define MEM_SDMODE_TCL_N(N) ((N)<<0)
24559 +
24560 +/*
24561 + * MEM_SDADDR register contents definitions
24562 + */
24563 +#define MEM_SDADDR_E (1<<20)
24564 +#define MEM_SDADDR_CSBA (0x03FF<<10)
24565 +#define MEM_SDADDR_CSMASK (0x03FF<<0)
24566 +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
24567 +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
24568 +
24569 +/*
24570 + * MEM_SDREFCFG register content definitions
24571 + */
24572 +#define MEM_SDREFCFG_TRC (15<<28)
24573 +#define MEM_SDREFCFG_TRPM (3<<26)
24574 +#define MEM_SDREFCFG_E (1<<25)
24575 +#define MEM_SDREFCFG_RE (0x1ffffff<<0)
24576 +#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
24577 +#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
24578 +#define MEM_SDREFCFG_REF_N(N) (N)
24579 +#endif
24580 +
24581 +/***********************************************************************/
24582 +
24583 +/*
24584 + * Au1550 SDRAM Register Offsets
24585 + */
24586 +
24587 +/***********************************************************************/
24588 +
24589 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
24590 +#define MEM_SDMODE0 (0x0800)
24591 +#define MEM_SDMODE1 (0x0808)
24592 +#define MEM_SDMODE2 (0x0810)
24593 +#define MEM_SDADDR0 (0x0820)
24594 +#define MEM_SDADDR1 (0x0828)
24595 +#define MEM_SDADDR2 (0x0830)
24596 +#define MEM_SDCONFIGA (0x0840)
24597 +#define MEM_SDCONFIGB (0x0848)
24598 +#define MEM_SDSTAT (0x0850)
24599 +#define MEM_SDERRADDR (0x0858)
24600 +#define MEM_SDSTRIDE0 (0x0860)
24601 +#define MEM_SDSTRIDE1 (0x0868)
24602 +#define MEM_SDSTRIDE2 (0x0870)
24603 +#define MEM_SDWRMD0 (0x0880)
24604 +#define MEM_SDWRMD1 (0x0888)
24605 +#define MEM_SDWRMD2 (0x0890)
24606 +#define MEM_SDPRECMD (0x08C0)
24607 +#define MEM_SDAUTOREF (0x08C8)
24608 +#define MEM_SDSREF (0x08D0)
24609 +#define MEM_SDSLEEP MEM_SDSREF
24610 +
24611 +#ifndef ASSEMBLER
24612 +/*typedef volatile struct
24613 +{
24614 + uint32 sdmode0;
24615 + uint32 reserved0;
24616 + uint32 sdmode1;
24617 + uint32 reserved1;
24618 + uint32 sdmode2;
24619 + uint32 reserved2[3];
24620 + uint32 sdaddr0;
24621 + uint32 reserved3;
24622 + uint32 sdaddr1;
24623 + uint32 reserved4;
24624 + uint32 sdaddr2;
24625 + uint32 reserved5[3];
24626 + uint32 sdconfiga;
24627 + uint32 reserved6;
24628 + uint32 sdconfigb;
24629 + uint32 reserved7;
24630 + uint32 sdstat;
24631 + uint32 reserved8;
24632 + uint32 sderraddr;
24633 + uint32 reserved9;
24634 + uint32 sdstride0;
24635 + uint32 reserved10;
24636 + uint32 sdstride1;
24637 + uint32 reserved11;
24638 + uint32 sdstride2;
24639 + uint32 reserved12[3];
24640 + uint32 sdwrmd0;
24641 + uint32 reserved13;
24642 + uint32 sdwrmd1;
24643 + uint32 reserved14;
24644 + uint32 sdwrmd2;
24645 + uint32 reserved15[11];
24646 + uint32 sdprecmd;
24647 + uint32 reserved16;
24648 + uint32 sdautoref;
24649 + uint32 reserved17;
24650 + uint32 sdsref;
24651 +
24652 +} AU1550_SDRAM;*/
24653 +#endif
24654 +#endif
24655 +
24656 +/*
24657 + * Physical base addresses for integrated peripherals
24658 + */
24659 +
24660 +#ifdef CONFIG_SOC_AU1000
24661 +#define MEM_PHYS_ADDR 0x14000000
24662 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24663 +#define DMA0_PHYS_ADDR 0x14002000
24664 +#define DMA1_PHYS_ADDR 0x14002100
24665 +#define DMA2_PHYS_ADDR 0x14002200
24666 +#define DMA3_PHYS_ADDR 0x14002300
24667 +#define DMA4_PHYS_ADDR 0x14002400
24668 +#define DMA5_PHYS_ADDR 0x14002500
24669 +#define DMA6_PHYS_ADDR 0x14002600
24670 +#define DMA7_PHYS_ADDR 0x14002700
24671 +#define IC0_PHYS_ADDR 0x10400000
24672 +#define IC1_PHYS_ADDR 0x11800000
24673 +#define AC97_PHYS_ADDR 0x10000000
24674 +#define USBH_PHYS_ADDR 0x10100000
24675 +#define USBD_PHYS_ADDR 0x10200000
24676 +#define IRDA_PHYS_ADDR 0x10300000
24677 +#define MAC0_PHYS_ADDR 0x10500000
24678 +#define MAC1_PHYS_ADDR 0x10510000
24679 +#define MACEN_PHYS_ADDR 0x10520000
24680 +#define MACDMA0_PHYS_ADDR 0x14004000
24681 +#define MACDMA1_PHYS_ADDR 0x14004200
24682 +#define I2S_PHYS_ADDR 0x11000000
24683 +#define UART0_PHYS_ADDR 0x11100000
24684 +#define UART1_PHYS_ADDR 0x11200000
24685 +#define UART2_PHYS_ADDR 0x11300000
24686 +#define UART3_PHYS_ADDR 0x11400000
24687 +#define SSI0_PHYS_ADDR 0x11600000
24688 +#define SSI1_PHYS_ADDR 0x11680000
24689 +#define SYS_PHYS_ADDR 0x11900000
24690 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24691 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24692 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24693 +#endif
24694 +
24695 +/********************************************************************/
24696
24697 -#define MEM_SDSLEEP 0xB4000030
24698 -#define MEM_SDSMCKE 0xB4000034
24699 +#ifdef CONFIG_SOC_AU1500
24700 +#define MEM_PHYS_ADDR 0x14000000
24701 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24702 +#define DMA0_PHYS_ADDR 0x14002000
24703 +#define DMA1_PHYS_ADDR 0x14002100
24704 +#define DMA2_PHYS_ADDR 0x14002200
24705 +#define DMA3_PHYS_ADDR 0x14002300
24706 +#define DMA4_PHYS_ADDR 0x14002400
24707 +#define DMA5_PHYS_ADDR 0x14002500
24708 +#define DMA6_PHYS_ADDR 0x14002600
24709 +#define DMA7_PHYS_ADDR 0x14002700
24710 +#define IC0_PHYS_ADDR 0x10400000
24711 +#define IC1_PHYS_ADDR 0x11800000
24712 +#define AC97_PHYS_ADDR 0x10000000
24713 +#define USBH_PHYS_ADDR 0x10100000
24714 +#define USBD_PHYS_ADDR 0x10200000
24715 +#define PCI_PHYS_ADDR 0x14005000
24716 +#define MAC0_PHYS_ADDR 0x11500000
24717 +#define MAC1_PHYS_ADDR 0x11510000
24718 +#define MACEN_PHYS_ADDR 0x11520000
24719 +#define MACDMA0_PHYS_ADDR 0x14004000
24720 +#define MACDMA1_PHYS_ADDR 0x14004200
24721 +#define I2S_PHYS_ADDR 0x11000000
24722 +#define UART0_PHYS_ADDR 0x11100000
24723 +#define UART3_PHYS_ADDR 0x11400000
24724 +#define GPIO2_PHYS_ADDR 0x11700000
24725 +#define SYS_PHYS_ADDR 0x11900000
24726 +#define PCI_MEM_PHYS_ADDR 0x400000000
24727 +#define PCI_IO_PHYS_ADDR 0x500000000
24728 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
24729 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
24730 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24731 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24732 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24733 #endif
24734
24735 +/********************************************************************/
24736 +
24737 +#ifdef CONFIG_SOC_AU1100
24738 +#define MEM_PHYS_ADDR 0x14000000
24739 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24740 +#define DMA0_PHYS_ADDR 0x14002000
24741 +#define DMA1_PHYS_ADDR 0x14002100
24742 +#define DMA2_PHYS_ADDR 0x14002200
24743 +#define DMA3_PHYS_ADDR 0x14002300
24744 +#define DMA4_PHYS_ADDR 0x14002400
24745 +#define DMA5_PHYS_ADDR 0x14002500
24746 +#define DMA6_PHYS_ADDR 0x14002600
24747 +#define DMA7_PHYS_ADDR 0x14002700
24748 +#define IC0_PHYS_ADDR 0x10400000
24749 +#define SD0_PHYS_ADDR 0x10600000
24750 +#define SD1_PHYS_ADDR 0x10680000
24751 +#define IC1_PHYS_ADDR 0x11800000
24752 +#define AC97_PHYS_ADDR 0x10000000
24753 +#define USBH_PHYS_ADDR 0x10100000
24754 +#define USBD_PHYS_ADDR 0x10200000
24755 +#define IRDA_PHYS_ADDR 0x10300000
24756 +#define MAC0_PHYS_ADDR 0x10500000
24757 +#define MACEN_PHYS_ADDR 0x10520000
24758 +#define MACDMA0_PHYS_ADDR 0x14004000
24759 +#define MACDMA1_PHYS_ADDR 0x14004200
24760 +#define I2S_PHYS_ADDR 0x11000000
24761 +#define UART0_PHYS_ADDR 0x11100000
24762 +#define UART1_PHYS_ADDR 0x11200000
24763 +#define UART3_PHYS_ADDR 0x11400000
24764 +#define SSI0_PHYS_ADDR 0x11600000
24765 +#define SSI1_PHYS_ADDR 0x11680000
24766 +#define GPIO2_PHYS_ADDR 0x11700000
24767 +#define SYS_PHYS_ADDR 0x11900000
24768 +#define LCD_PHYS_ADDR 0x15000000
24769 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24770 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24771 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24772 +#endif
24773 +
24774 +/***********************************************************************/
24775 +
24776 +#ifdef CONFIG_SOC_AU1550
24777 +#define MEM_PHYS_ADDR 0x14000000
24778 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24779 +#define IC0_PHYS_ADDR 0x10400000
24780 +#define IC1_PHYS_ADDR 0x11800000
24781 +#define USBH_PHYS_ADDR 0x14020000
24782 +#define USBD_PHYS_ADDR 0x10200000
24783 +#define PCI_PHYS_ADDR 0x14005000
24784 +#define MAC0_PHYS_ADDR 0x10500000
24785 +#define MAC1_PHYS_ADDR 0x10510000
24786 +#define MACEN_PHYS_ADDR 0x10520000
24787 +#define MACDMA0_PHYS_ADDR 0x14004000
24788 +#define MACDMA1_PHYS_ADDR 0x14004200
24789 +#define UART0_PHYS_ADDR 0x11100000
24790 +#define UART1_PHYS_ADDR 0x11200000
24791 +#define UART3_PHYS_ADDR 0x11400000
24792 +#define GPIO2_PHYS_ADDR 0x11700000
24793 +#define SYS_PHYS_ADDR 0x11900000
24794 +#define DDMA_PHYS_ADDR 0x14002000
24795 +#define PE_PHYS_ADDR 0x14008000
24796 +#define PSC0_PHYS_ADDR 0x11A00000
24797 +#define PSC1_PHYS_ADDR 0x11B00000
24798 +#define PSC2_PHYS_ADDR 0x10A00000
24799 +#define PSC3_PHYS_ADDR 0x10B00000
24800 +#define PCI_MEM_PHYS_ADDR 0x400000000
24801 +#define PCI_IO_PHYS_ADDR 0x500000000
24802 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
24803 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
24804 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24805 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24806 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24807 +#endif
24808 +
24809 +/***********************************************************************/
24810 +
24811 +#ifdef CONFIG_SOC_AU1200
24812 +#define MEM_PHYS_ADDR 0x14000000
24813 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24814 +#define AES_PHYS_ADDR 0x10300000
24815 +#define CIM_PHYS_ADDR 0x14004000
24816 +#define IC0_PHYS_ADDR 0x10400000
24817 +#define IC1_PHYS_ADDR 0x11800000
24818 +#define USBM_PHYS_ADDR 0x14020000
24819 +#define USBH_PHYS_ADDR 0x14020100
24820 +#define UART0_PHYS_ADDR 0x11100000
24821 +#define UART1_PHYS_ADDR 0x11200000
24822 +#define GPIO2_PHYS_ADDR 0x11700000
24823 +#define SYS_PHYS_ADDR 0x11900000
24824 +#define DDMA_PHYS_ADDR 0x14002000
24825 +#define PSC0_PHYS_ADDR 0x11A00000
24826 +#define PSC1_PHYS_ADDR 0x11B00000
24827 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24828 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24829 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24830 +#define SD0_PHYS_ADDR 0x10600000
24831 +#define SD1_PHYS_ADDR 0x10680000
24832 +#define LCD_PHYS_ADDR 0x15000000
24833 +#define SWCNT_PHYS_ADDR 0x1110010C
24834 +#define MAEFE_PHYS_ADDR 0x14012000
24835 +#define MAEBE_PHYS_ADDR 0x14010000
24836 +#endif
24837 +
24838 +
24839 /* Static Bus Controller */
24840 #define MEM_STCFG0 0xB4001000
24841 #define MEM_STTIME0 0xB4001004
24842 @@ -367,7 +695,7 @@
24843 #define AU1000_MAC0_ENABLE 0xB0520000
24844 #define AU1000_MAC1_ENABLE 0xB0520004
24845 #define NUM_ETH_INTERFACES 2
24846 -#endif // CONFIG_SOC_AU1000
24847 +#endif /* CONFIG_SOC_AU1000 */
24848
24849 /* Au1500 */
24850 #ifdef CONFIG_SOC_AU1500
24851 @@ -438,7 +766,7 @@
24852 #define AU1500_MAC0_ENABLE 0xB1520000
24853 #define AU1500_MAC1_ENABLE 0xB1520004
24854 #define NUM_ETH_INTERFACES 2
24855 -#endif // CONFIG_SOC_AU1500
24856 +#endif /* CONFIG_SOC_AU1500 */
24857
24858 /* Au1100 */
24859 #ifdef CONFIG_SOC_AU1100
24860 @@ -483,6 +811,22 @@
24861 #define AU1000_GPIO_13 45
24862 #define AU1000_GPIO_14 46
24863 #define AU1000_GPIO_15 47
24864 +#define AU1000_GPIO_16 48
24865 +#define AU1000_GPIO_17 49
24866 +#define AU1000_GPIO_18 50
24867 +#define AU1000_GPIO_19 51
24868 +#define AU1000_GPIO_20 52
24869 +#define AU1000_GPIO_21 53
24870 +#define AU1000_GPIO_22 54
24871 +#define AU1000_GPIO_23 55
24872 +#define AU1000_GPIO_24 56
24873 +#define AU1000_GPIO_25 57
24874 +#define AU1000_GPIO_26 58
24875 +#define AU1000_GPIO_27 59
24876 +#define AU1000_GPIO_28 60
24877 +#define AU1000_GPIO_29 61
24878 +#define AU1000_GPIO_30 62
24879 +#define AU1000_GPIO_31 63
24880
24881 #define UART0_ADDR 0xB1100000
24882 #define UART1_ADDR 0xB1200000
24883 @@ -494,7 +838,7 @@
24884 #define AU1100_ETH0_BASE 0xB0500000
24885 #define AU1100_MAC0_ENABLE 0xB0520000
24886 #define NUM_ETH_INTERFACES 1
24887 -#endif // CONFIG_SOC_AU1100
24888 +#endif /* CONFIG_SOC_AU1100 */
24889
24890 #ifdef CONFIG_SOC_AU1550
24891 #define AU1550_UART0_INT 0
24892 @@ -511,14 +855,14 @@
24893 #define AU1550_PSC1_INT 11
24894 #define AU1550_PSC2_INT 12
24895 #define AU1550_PSC3_INT 13
24896 -#define AU1550_TOY_INT 14
24897 -#define AU1550_TOY_MATCH0_INT 15
24898 -#define AU1550_TOY_MATCH1_INT 16
24899 -#define AU1550_TOY_MATCH2_INT 17
24900 -#define AU1550_RTC_INT 18
24901 -#define AU1550_RTC_MATCH0_INT 19
24902 -#define AU1550_RTC_MATCH1_INT 20
24903 -#define AU1550_RTC_MATCH2_INT 21
24904 +#define AU1000_TOY_INT 14
24905 +#define AU1000_TOY_MATCH0_INT 15
24906 +#define AU1000_TOY_MATCH1_INT 16
24907 +#define AU1000_TOY_MATCH2_INT 17
24908 +#define AU1000_RTC_INT 18
24909 +#define AU1000_RTC_MATCH0_INT 19
24910 +#define AU1000_RTC_MATCH1_INT 20
24911 +#define AU1000_RTC_MATCH2_INT 21
24912 #define AU1550_NAND_INT 23
24913 #define AU1550_USB_DEV_REQ_INT 24
24914 #define AU1550_USB_DEV_SUS_INT 25
24915 @@ -573,7 +917,7 @@
24916 #define AU1550_MAC0_ENABLE 0xB0520000
24917 #define AU1550_MAC1_ENABLE 0xB0520004
24918 #define NUM_ETH_INTERFACES 2
24919 -#endif // CONFIG_SOC_AU1550
24920 +#endif /* CONFIG_SOC_AU1550 */
24921
24922 #ifdef CONFIG_SOC_AU1200
24923 #define AU1200_UART0_INT 0
24924 @@ -590,14 +934,14 @@
24925 #define AU1200_PSC1_INT 11
24926 #define AU1200_AES_INT 12
24927 #define AU1200_CAMERA_INT 13
24928 -#define AU1200_TOY_INT 14
24929 -#define AU1200_TOY_MATCH0_INT 15
24930 -#define AU1200_TOY_MATCH1_INT 16
24931 -#define AU1200_TOY_MATCH2_INT 17
24932 -#define AU1200_RTC_INT 18
24933 -#define AU1200_RTC_MATCH0_INT 19
24934 -#define AU1200_RTC_MATCH1_INT 20
24935 -#define AU1200_RTC_MATCH2_INT 21
24936 +#define AU1000_TOY_INT 14
24937 +#define AU1000_TOY_MATCH0_INT 15
24938 +#define AU1000_TOY_MATCH1_INT 16
24939 +#define AU1000_TOY_MATCH2_INT 17
24940 +#define AU1000_RTC_INT 18
24941 +#define AU1000_RTC_MATCH0_INT 19
24942 +#define AU1000_RTC_MATCH1_INT 20
24943 +#define AU1000_RTC_MATCH2_INT 21
24944 #define AU1200_NAND_INT 23
24945 #define AU1200_GPIO_204 24
24946 #define AU1200_GPIO_205 25
24947 @@ -605,6 +949,7 @@
24948 #define AU1200_GPIO_207 27
24949 #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
24950 #define AU1200_USB_INT 29
24951 +#define AU1000_USB_HOST_INT AU1200_USB_INT
24952 #define AU1200_LCD_INT 30
24953 #define AU1200_MAE_BOTH_INT 31
24954 #define AU1000_GPIO_0 32
24955 @@ -643,21 +988,36 @@
24956 #define UART0_ADDR 0xB1100000
24957 #define UART1_ADDR 0xB1200000
24958
24959 -#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
24960 -#define USB_HOST_CONFIG 0xB4027ffc
24961 +#define USB_UOC_BASE 0x14020020
24962 +#define USB_UOC_LEN 0x20
24963 +#define USB_OHCI_BASE 0x14020100
24964 +#define USB_OHCI_LEN 0x100
24965 +#define USB_EHCI_BASE 0x14020200
24966 +#define USB_EHCI_LEN 0x100
24967 +#define USB_UDC_BASE 0x14022000
24968 +#define USB_UDC_LEN 0x2000
24969 +#define USB_MSR_BASE 0xB4020000
24970 +#define USB_MSR_MCFG 4
24971 +#define USBMSRMCFG_OMEMEN 0
24972 +#define USBMSRMCFG_OBMEN 1
24973 +#define USBMSRMCFG_EMEMEN 2
24974 +#define USBMSRMCFG_EBMEN 3
24975 +#define USBMSRMCFG_DMEMEN 4
24976 +#define USBMSRMCFG_DBMEN 5
24977 +#define USBMSRMCFG_GMEMEN 6
24978 +#define USBMSRMCFG_OHCCLKEN 16
24979 +#define USBMSRMCFG_EHCCLKEN 17
24980 +#define USBMSRMCFG_UDCCLKEN 18
24981 +#define USBMSRMCFG_PHYPLLEN 19
24982 +#define USBMSRMCFG_RDCOMB 30
24983 +#define USBMSRMCFG_PFEN 31
24984
24985 -// these are here for prototyping on au1550 (do not exist on au1200)
24986 -#define AU1200_ETH0_BASE 0xB0500000
24987 -#define AU1200_ETH1_BASE 0xB0510000
24988 -#define AU1200_MAC0_ENABLE 0xB0520000
24989 -#define AU1200_MAC1_ENABLE 0xB0520004
24990 -#define NUM_ETH_INTERFACES 2
24991 -#endif // CONFIG_SOC_AU1200
24992 +#endif /* CONFIG_SOC_AU1200 */
24993
24994 #define AU1000_LAST_INTC0_INT 31
24995 +#define AU1000_LAST_INTC1_INT 63
24996 #define AU1000_MAX_INTR 63
24997
24998 -
24999 /* Programmable Counters 0 and 1 */
25000 #define SYS_BASE 0xB1900000
25001 #define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
25002 @@ -728,6 +1088,8 @@
25003 #define I2S_CONTROL_D (1<<1)
25004 #define I2S_CONTROL_CE (1<<0)
25005
25006 +#ifndef CONFIG_SOC_AU1200
25007 +
25008 /* USB Host Controller */
25009 #define USB_OHCI_LEN 0x00100000
25010
25011 @@ -773,6 +1135,8 @@
25012 #define USBDEV_ENABLE (1<<1)
25013 #define USBDEV_CE (1<<0)
25014
25015 +#endif /* !CONFIG_SOC_AU1200 */
25016 +
25017 /* Ethernet Controllers */
25018
25019 /* 4 byte offsets from AU1000_ETH_BASE */
25020 @@ -1171,6 +1535,37 @@
25021 #define SYS_PF_PSC1_S1 (1 << 1)
25022 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
25023
25024 +/* Au1200 Only */
25025 +#ifdef CONFIG_SOC_AU1200
25026 +#define SYS_PINFUNC_DMA (1<<31)
25027 +#define SYS_PINFUNC_S0A (1<<30)
25028 +#define SYS_PINFUNC_S1A (1<<29)
25029 +#define SYS_PINFUNC_LP0 (1<<28)
25030 +#define SYS_PINFUNC_LP1 (1<<27)
25031 +#define SYS_PINFUNC_LD16 (1<<26)
25032 +#define SYS_PINFUNC_LD8 (1<<25)
25033 +#define SYS_PINFUNC_LD1 (1<<24)
25034 +#define SYS_PINFUNC_LD0 (1<<23)
25035 +#define SYS_PINFUNC_P1A (3<<21)
25036 +#define SYS_PINFUNC_P1B (1<<20)
25037 +#define SYS_PINFUNC_FS3 (1<<19)
25038 +#define SYS_PINFUNC_P0A (3<<17)
25039 +#define SYS_PINFUNC_CS (1<<16)
25040 +#define SYS_PINFUNC_CIM (1<<15)
25041 +#define SYS_PINFUNC_P1C (1<<14)
25042 +#define SYS_PINFUNC_U1T (1<<12)
25043 +#define SYS_PINFUNC_U1R (1<<11)
25044 +#define SYS_PINFUNC_EX1 (1<<10)
25045 +#define SYS_PINFUNC_EX0 (1<<9)
25046 +#define SYS_PINFUNC_U0R (1<<8)
25047 +#define SYS_PINFUNC_MC (1<<7)
25048 +#define SYS_PINFUNC_S0B (1<<6)
25049 +#define SYS_PINFUNC_S0C (1<<5)
25050 +#define SYS_PINFUNC_P0B (1<<4)
25051 +#define SYS_PINFUNC_U0T (1<<3)
25052 +#define SYS_PINFUNC_S1B (1<<2)
25053 +#endif
25054 +
25055 #define SYS_TRIOUTRD 0xB1900100
25056 #define SYS_TRIOUTCLR 0xB1900100
25057 #define SYS_OUTPUTRD 0xB1900108
25058 @@ -1298,7 +1693,6 @@
25059 #define SD1_XMIT_FIFO 0xB0680000
25060 #define SD1_RECV_FIFO 0xB0680004
25061
25062 -
25063 #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
25064 /* Au1500 PCI Controller */
25065 #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
25066 @@ -1388,9 +1782,60 @@
25067
25068 #endif
25069
25070 +#ifndef _LANGUAGE_ASSEMBLY
25071 +typedef volatile struct
25072 +{
25073 + /* 0x0000 */ u32 toytrim;
25074 + /* 0x0004 */ u32 toywrite;
25075 + /* 0x0008 */ u32 toymatch0;
25076 + /* 0x000C */ u32 toymatch1;
25077 + /* 0x0010 */ u32 toymatch2;
25078 + /* 0x0014 */ u32 cntrctrl;
25079 + /* 0x0018 */ u32 scratch0;
25080 + /* 0x001C */ u32 scratch1;
25081 + /* 0x0020 */ u32 freqctrl0;
25082 + /* 0x0024 */ u32 freqctrl1;
25083 + /* 0x0028 */ u32 clksrc;
25084 + /* 0x002C */ u32 pinfunc;
25085 + /* 0x0030 */ u32 reserved0;
25086 + /* 0x0034 */ u32 wakemsk;
25087 + /* 0x0038 */ u32 endian;
25088 + /* 0x003C */ u32 powerctrl;
25089 + /* 0x0040 */ u32 toyread;
25090 + /* 0x0044 */ u32 rtctrim;
25091 + /* 0x0048 */ u32 rtcwrite;
25092 + /* 0x004C */ u32 rtcmatch0;
25093 + /* 0x0050 */ u32 rtcmatch1;
25094 + /* 0x0054 */ u32 rtcmatch2;
25095 + /* 0x0058 */ u32 rtcread;
25096 + /* 0x005C */ u32 wakesrc;
25097 + /* 0x0060 */ u32 cpupll;
25098 + /* 0x0064 */ u32 auxpll;
25099 + /* 0x0068 */ u32 reserved1;
25100 + /* 0x006C */ u32 reserved2;
25101 + /* 0x0070 */ u32 reserved3;
25102 + /* 0x0074 */ u32 reserved4;
25103 + /* 0x0078 */ u32 slppwr;
25104 + /* 0x007C */ u32 sleep;
25105 + /* 0x0080 */ u32 reserved5[32];
25106 + /* 0x0100 */ u32 trioutrd;
25107 +#define trioutclr trioutrd
25108 + /* 0x0104 */ u32 reserved6;
25109 + /* 0x0108 */ u32 outputrd;
25110 +#define outputset outputrd
25111 + /* 0x010C */ u32 outputclr;
25112 + /* 0x0110 */ u32 pinstaterd;
25113 +#define pininputen pinstaterd
25114 +
25115 +} AU1X00_SYS;
25116 +
25117 +static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
25118 +
25119 +#endif
25120 /* Processor information base on prid.
25121 * Copied from PowerPC.
25122 */
25123 +#ifndef _LANGUAGE_ASSEMBLY
25124 struct cpu_spec {
25125 /* CPU is matched via (PRID & prid_mask) == prid_value */
25126 unsigned int prid_mask;
25127 @@ -1404,3 +1849,6 @@
25128 extern struct cpu_spec cpu_specs[];
25129 extern struct cpu_spec *cur_cpu_spec[];
25130 #endif
25131 +
25132 +#endif
25133 +
25134 Index: linux-2.4.35.4/include/asm-mips/au1000_pcmcia.h
25135 ===================================================================
25136 --- linux-2.4.35.4.orig/include/asm-mips/au1000_pcmcia.h 2007-12-15 05:19:44.330947314 +0100
25137 +++ linux-2.4.35.4/include/asm-mips/au1000_pcmcia.h 2007-12-15 05:19:45.022986751 +0100
25138 @@ -38,16 +38,41 @@
25139 #define AU1X_SOCK0_PHYS_MEM 0xF80000000
25140
25141 /* pcmcia socket 1 needs external glue logic so the memory map
25142 - * differs from board to board.
25143 + * differs from board to board. the general rule is that
25144 + * static bus address bit 26 should be used to decode socket 0
25145 + * from socket 1. alas, some boards dont follow this...
25146 + * These really belong in a board-specific header file...
25147 */
25148 -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
25149 -#define AU1X_SOCK1_IO 0xF08000000
25150 -#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
25151 -#define AU1X_SOCK1_PHYS_MEM 0xF88000000
25152 -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
25153 -#define AU1X_SOCK1_IO 0xF04000000
25154 -#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
25155 -#define AU1X_SOCK1_PHYS_MEM 0xF84000000
25156 +#ifdef CONFIG_MIPS_PB1000
25157 +#define SOCK1_DECODE (1<<27)
25158 +#endif
25159 +#ifdef CONFIG_MIPS_DB1000
25160 +#define SOCK1_DECODE (1<<26)
25161 +#endif
25162 +#ifdef CONFIG_MIPS_DB1500
25163 +#define SOCK1_DECODE (1<<26)
25164 +#endif
25165 +#ifdef CONFIG_MIPS_DB1100
25166 +#define SOCK1_DECODE (1<<26)
25167 +#endif
25168 +#ifdef CONFIG_MIPS_DB1550
25169 +#define SOCK1_DECODE (1<<26)
25170 +#endif
25171 +#ifdef CONFIG_MIPS_DB1200
25172 +#define SOCK1_DECODE (1<<26)
25173 +#endif
25174 +#ifdef CONFIG_MIPS_PB1550
25175 +#define SOCK1_DECODE (1<<26)
25176 +#endif
25177 +#ifdef CONFIG_MIPS_PB1200
25178 +#define SOCK1_DECODE (1<<26)
25179 +#endif
25180 +
25181 +/* The board has a second PCMCIA socket */
25182 +#ifdef SOCK1_DECODE
25183 +#define AU1X_SOCK1_IO (0xF00000000|SOCK1_DECODE)
25184 +#define AU1X_SOCK1_PHYS_ATTR (0xF40000000|SOCK1_DECODE)
25185 +#define AU1X_SOCK1_PHYS_MEM (0xF80000000|SOCK1_DECODE)
25186 #endif
25187
25188 struct pcmcia_state {
25189 Index: linux-2.4.35.4/include/asm-mips/au1100_mmc.h
25190 ===================================================================
25191 --- linux-2.4.35.4.orig/include/asm-mips/au1100_mmc.h 2007-12-15 05:19:44.338947772 +0100
25192 +++ linux-2.4.35.4/include/asm-mips/au1100_mmc.h 2007-12-15 05:19:45.022986751 +0100
25193 @@ -39,16 +39,22 @@
25194 #define __ASM_AU1100_MMC_H
25195
25196
25197 -#define NUM_AU1100_MMC_CONTROLLERS 2
25198 -
25199 -
25200 -#define AU1100_SD_IRQ 2
25201 -
25202 +#if defined(CONFIG_SOC_AU1100)
25203 +#define NUM_MMC_CONTROLLERS 2
25204 +#define AU1X_MMC_INT AU1100_SD_INT
25205 +#endif
25206 +
25207 +#if defined(CONFIG_SOC_AU1200)
25208 +#define NUM_MMC_CONTROLLERS 2
25209 +#define AU1X_MMC_INT AU1200_SD_INT
25210 +#endif
25211
25212 #define SD0_BASE 0xB0600000
25213 #define SD1_BASE 0xB0680000
25214
25215
25216 +
25217 +
25218 /*
25219 * Register offsets.
25220 */
25221 @@ -201,5 +207,12 @@
25222 #define SD_CMD_RT_1B (0x00810000)
25223
25224
25225 +/* support routines required on a platform-specific basis */
25226 +extern void mmc_card_inserted(int _n_, int *_res_);
25227 +extern void mmc_card_writable(int _n_, int *_res_);
25228 +extern void mmc_power_on(int _n_);
25229 +extern void mmc_power_off(int _n_);
25230 +
25231 +
25232 #endif /* __ASM_AU1100_MMC_H */
25233
25234 Index: linux-2.4.35.4/include/asm-mips/au1xxx_dbdma.h
25235 ===================================================================
25236 --- linux-2.4.35.4.orig/include/asm-mips/au1xxx_dbdma.h 2007-12-15 05:19:44.342947998 +0100
25237 +++ linux-2.4.35.4/include/asm-mips/au1xxx_dbdma.h 2007-12-15 05:19:45.022986751 +0100
25238 @@ -43,7 +43,7 @@
25239 #define DDMA_GLOBAL_BASE 0xb4003000
25240 #define DDMA_CHANNEL_BASE 0xb4002000
25241
25242 -typedef struct dbdma_global {
25243 +typedef volatile struct dbdma_global {
25244 u32 ddma_config;
25245 u32 ddma_intstat;
25246 u32 ddma_throttle;
25247 @@ -60,7 +60,7 @@
25248
25249 /* The structure of a DMA Channel.
25250 */
25251 -typedef struct au1xxx_dma_channel {
25252 +typedef volatile struct au1xxx_dma_channel {
25253 u32 ddma_cfg; /* See below */
25254 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
25255 u32 ddma_statptr; /* word aligned pointer to status word */
25256 @@ -96,7 +96,7 @@
25257 /* "Standard" DDMA Descriptor.
25258 * Must be 32-byte aligned.
25259 */
25260 -typedef struct au1xxx_ddma_desc {
25261 +typedef volatile struct au1xxx_ddma_desc {
25262 u32 dscr_cmd0; /* See below */
25263 u32 dscr_cmd1; /* See below */
25264 u32 dscr_source0; /* source phys address */
25265 @@ -105,6 +105,12 @@
25266 u32 dscr_dest1; /* See below */
25267 u32 dscr_stat; /* completion status */
25268 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
25269 + /* First 32bytes are HW specific!!!
25270 + Lets have some SW data following.. make sure its 32bytes
25271 + */
25272 + u32 sw_status;
25273 + u32 sw_context;
25274 + u32 sw_reserved[6];
25275 } au1x_ddma_desc_t;
25276
25277 #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
25278 @@ -123,6 +129,8 @@
25279 #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
25280 #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
25281
25282 +#define SW_STATUS_INUSE (1<<0)
25283 +
25284 /* Command 0 device IDs.
25285 */
25286 #ifdef CONFIG_SOC_AU1550
25287 @@ -169,8 +177,8 @@
25288 #define DSCR_CMD0_SDMS_RX0 9
25289 #define DSCR_CMD0_SDMS_TX1 10
25290 #define DSCR_CMD0_SDMS_RX1 11
25291 -#define DSCR_CMD0_AES_TX 12
25292 -#define DSCR_CMD0_AES_RX 13
25293 +#define DSCR_CMD0_AES_TX 13
25294 +#define DSCR_CMD0_AES_RX 12
25295 #define DSCR_CMD0_PSC0_TX 14
25296 #define DSCR_CMD0_PSC0_RX 15
25297 #define DSCR_CMD0_PSC1_TX 16
25298 @@ -189,6 +197,10 @@
25299 #define DSCR_CMD0_THROTTLE 30
25300 #define DSCR_CMD0_ALWAYS 31
25301 #define DSCR_NDEV_IDS 32
25302 +/* THis macro is used to find/create custom device types */
25303 +#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
25304 +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
25305 +
25306
25307 #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
25308 #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
25309 @@ -277,6 +289,43 @@
25310 */
25311 #define NUM_DBDMA_CHANS 16
25312
25313 +/*
25314 + * Ddma API definitions
25315 + * FIXME: may not fit to this header file
25316 + */
25317 +typedef struct dbdma_device_table {
25318 + u32 dev_id;
25319 + u32 dev_flags;
25320 + u32 dev_tsize;
25321 + u32 dev_devwidth;
25322 + u32 dev_physaddr; /* If FIFO */
25323 + u32 dev_intlevel;
25324 + u32 dev_intpolarity;
25325 +} dbdev_tab_t;
25326 +
25327 +
25328 +typedef struct dbdma_chan_config {
25329 + spinlock_t lock;
25330 +
25331 + u32 chan_flags;
25332 + u32 chan_index;
25333 + dbdev_tab_t *chan_src;
25334 + dbdev_tab_t *chan_dest;
25335 + au1x_dma_chan_t *chan_ptr;
25336 + au1x_ddma_desc_t *chan_desc_base;
25337 + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
25338 + void *chan_callparam;
25339 + void (*chan_callback)(int, void *, struct pt_regs *);
25340 +} chan_tab_t;
25341 +
25342 +#define DEV_FLAGS_INUSE (1 << 0)
25343 +#define DEV_FLAGS_ANYUSE (1 << 1)
25344 +#define DEV_FLAGS_OUT (1 << 2)
25345 +#define DEV_FLAGS_IN (1 << 3)
25346 +#define DEV_FLAGS_BURSTABLE (1 << 4)
25347 +#define DEV_FLAGS_SYNC (1 << 5)
25348 +/* end Ddma API definitions */
25349 +
25350 /* External functions for drivers to use.
25351 */
25352 /* Use this to allocate a dbdma channel. The device ids are one of the
25353 @@ -299,8 +348,8 @@
25354
25355 /* Put buffers on source/destination descriptors.
25356 */
25357 -u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
25358 -u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
25359 +u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
25360 +u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
25361
25362 /* Get a buffer from the destination descriptor.
25363 */
25364 @@ -314,5 +363,25 @@
25365 void au1xxx_dbdma_chan_free(u32 chanid);
25366 void au1xxx_dbdma_dump(u32 chanid);
25367
25368 +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
25369 +
25370 +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
25371 +
25372 +/*
25373 + Some compatibilty macros --
25374 + Needed to make changes to API without breaking existing drivers
25375 +*/
25376 +#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
25377 +#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
25378 +
25379 +#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
25380 +#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
25381 +
25382 +/*
25383 + * Flags for the put_source/put_dest functions.
25384 + */
25385 +#define DDMA_FLAGS_IE (1<<0)
25386 +#define DDMA_FLAGS_NOIE (1<<1)
25387 +
25388 #endif /* _LANGUAGE_ASSEMBLY */
25389 #endif /* _AU1000_DBDMA_H_ */
25390 Index: linux-2.4.35.4/include/asm-mips/au1xxx_gpio.h
25391 ===================================================================
25392 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
25393 +++ linux-2.4.35.4/include/asm-mips/au1xxx_gpio.h 2007-12-15 05:19:45.022986751 +0100
25394 @@ -0,0 +1,22 @@
25395 +
25396 +
25397 +#ifndef __AU1XXX_GPIO_H
25398 +#define __AU1XXX_GPIO_H
25399 +
25400 +void au1xxx_gpio1_set_inputs(void);
25401 +void au1xxx_gpio_tristate(int signal);
25402 +void au1xxx_gpio_write(int signal, int value);
25403 +int au1xxx_gpio_read(int signal);
25404 +
25405 +typedef volatile struct
25406 +{
25407 + u32 dir;
25408 + u32 reserved;
25409 + u32 output;
25410 + u32 pinstate;
25411 + u32 inten;
25412 + u32 enable;
25413 +
25414 +} AU1X00_GPIO2;
25415 +
25416 +#endif //__AU1XXX_GPIO_H
25417 Index: linux-2.4.35.4/include/asm-mips/au1xxx_psc.h
25418 ===================================================================
25419 --- linux-2.4.35.4.orig/include/asm-mips/au1xxx_psc.h 2007-12-15 05:19:44.358948912 +0100
25420 +++ linux-2.4.35.4/include/asm-mips/au1xxx_psc.h 2007-12-15 05:19:45.022986751 +0100
25421 @@ -41,6 +41,11 @@
25422 #define PSC3_BASE_ADDR 0xb0d00000
25423 #endif
25424
25425 +#ifdef CONFIG_SOC_AU1200
25426 +#define PSC0_BASE_ADDR 0xb1a00000
25427 +#define PSC1_BASE_ADDR 0xb1b00000
25428 +#endif
25429 +
25430 /* The PSC select and control registers are common to
25431 * all protocols.
25432 */
25433 @@ -226,6 +231,8 @@
25434 #define PSC_I2SCFG_DD_DISABLE (1 << 27)
25435 #define PSC_I2SCFG_DE_ENABLE (1 << 26)
25436 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
25437 +#define PSC_I2SCFG_WS(n) ((n&0xFF)<<16)
25438 +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
25439 #define PSC_I2SCFG_WI (1 << 15)
25440
25441 #define PSC_I2SCFG_DIV_MASK (3 << 13)
25442 Index: linux-2.4.35.4/include/asm-mips/bootinfo.h
25443 ===================================================================
25444 --- linux-2.4.35.4.orig/include/asm-mips/bootinfo.h 2007-12-15 05:19:44.366949367 +0100
25445 +++ linux-2.4.35.4/include/asm-mips/bootinfo.h 2007-12-15 05:19:45.026986980 +0100
25446 @@ -180,6 +180,9 @@
25447 #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
25448 #define MACH_CSB250 8 /* Cogent Au1500 */
25449 #define MACH_PB1550 9 /* Au1550-based eval board */
25450 +#define MACH_PB1200 10 /* Au1200-based eval board */
25451 +#define MACH_DB1550 11 /* Au1550-based eval board */
25452 +#define MACH_DB1200 12 /* Au1200-based eval board */
25453
25454 /*
25455 * Valid machtype for group NEC_VR41XX
25456 Index: linux-2.4.35.4/include/asm-mips/db1200.h
25457 ===================================================================
25458 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
25459 +++ linux-2.4.35.4/include/asm-mips/db1200.h 2007-12-15 05:19:45.026986980 +0100
25460 @@ -0,0 +1,214 @@
25461 +/*
25462 + * AMD Alchemy DB1200 Referrence Board
25463 + * Board Registers defines.
25464 + *
25465 + * ########################################################################
25466 + *
25467 + * This program is free software; you can distribute it and/or modify it
25468 + * under the terms of the GNU General Public License (Version 2) as
25469 + * published by the Free Software Foundation.
25470 + *
25471 + * This program is distributed in the hope it will be useful, but WITHOUT
25472 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
25473 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25474 + * for more details.
25475 + *
25476 + * You should have received a copy of the GNU General Public License along
25477 + * with this program; if not, write to the Free Software Foundation, Inc.,
25478 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
25479 + *
25480 + * ########################################################################
25481 + *
25482 + *
25483 + */
25484 +#ifndef __ASM_DB1200_H
25485 +#define __ASM_DB1200_H
25486 +
25487 +#include <linux/types.h>
25488 +
25489 +// This is defined in au1000.h with bogus value
25490 +#undef AU1X00_EXTERNAL_INT
25491 +
25492 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25493 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25494 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
25495 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
25496 +
25497 +/* SPI and SMB are muxed on the Pb1200 board.
25498 + Refer to board documentation.
25499 + */
25500 +#define SPI_PSC_BASE PSC0_BASE_ADDR
25501 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
25502 +/* AC97 and I2S are muxed on the Pb1200 board.
25503 + Refer to board documentation.
25504 + */
25505 +#define AC97_PSC_BASE PSC1_BASE_ADDR
25506 +#define I2S_PSC_BASE PSC1_BASE_ADDR
25507 +
25508 +#define BCSR_KSEG1_ADDR 0xB9800000
25509 +
25510 +typedef volatile struct
25511 +{
25512 + /*00*/ u16 whoami;
25513 + u16 reserved0;
25514 + /*04*/ u16 status;
25515 + u16 reserved1;
25516 + /*08*/ u16 switches;
25517 + u16 reserved2;
25518 + /*0C*/ u16 resets;
25519 + u16 reserved3;
25520 +
25521 + /*10*/ u16 pcmcia;
25522 + u16 reserved4;
25523 + /*14*/ u16 board;
25524 + u16 reserved5;
25525 + /*18*/ u16 disk_leds;
25526 + u16 reserved6;
25527 + /*1C*/ u16 system;
25528 + u16 reserved7;
25529 +
25530 + /*20*/ u16 intclr;
25531 + u16 reserved8;
25532 + /*24*/ u16 intset;
25533 + u16 reserved9;
25534 + /*28*/ u16 intclr_mask;
25535 + u16 reserved10;
25536 + /*2C*/ u16 intset_mask;
25537 + u16 reserved11;
25538 +
25539 + /*30*/ u16 sig_status;
25540 + u16 reserved12;
25541 + /*34*/ u16 int_status;
25542 + u16 reserved13;
25543 + /*38*/ u16 reserved14;
25544 + u16 reserved15;
25545 + /*3C*/ u16 reserved16;
25546 + u16 reserved17;
25547 +
25548 +} BCSR;
25549 +
25550 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
25551 +
25552 +/*
25553 + * Register bit definitions for the BCSRs
25554 + */
25555 +#define BCSR_WHOAMI_DCID 0x000F
25556 +#define BCSR_WHOAMI_CPLD 0x00F0
25557 +#define BCSR_WHOAMI_BOARD 0x0F00
25558 +
25559 +#define BCSR_STATUS_PCMCIA0VS 0x0003
25560 +#define BCSR_STATUS_PCMCIA1VS 0x000C
25561 +#define BCSR_STATUS_SWAPBOOT 0x0040
25562 +#define BCSR_STATUS_FLASHBUSY 0x0100
25563 +#define BCSR_STATUS_IDECBLID 0x0200
25564 +#define BCSR_STATUS_SD0WP 0x0400
25565 +#define BCSR_STATUS_U0RXD 0x1000
25566 +#define BCSR_STATUS_U1RXD 0x2000
25567 +
25568 +#define BCSR_SWITCHES_OCTAL 0x00FF
25569 +#define BCSR_SWITCHES_DIP_1 0x0080
25570 +#define BCSR_SWITCHES_DIP_2 0x0040
25571 +#define BCSR_SWITCHES_DIP_3 0x0020
25572 +#define BCSR_SWITCHES_DIP_4 0x0010
25573 +#define BCSR_SWITCHES_DIP_5 0x0008
25574 +#define BCSR_SWITCHES_DIP_6 0x0004
25575 +#define BCSR_SWITCHES_DIP_7 0x0002
25576 +#define BCSR_SWITCHES_DIP_8 0x0001
25577 +#define BCSR_SWITCHES_ROTARY 0x0F00
25578 +
25579 +#define BCSR_RESETS_ETH 0x0001
25580 +#define BCSR_RESETS_CAMERA 0x0002
25581 +#define BCSR_RESETS_DC 0x0004
25582 +#define BCSR_RESETS_IDE 0x0008
25583 +#define BCSR_RESETS_TV 0x0010
25584 +/* not resets but in the same register */
25585 +#define BCSR_RESETS_PWMR1mUX 0x0800
25586 +#define BCSR_RESETS_PCS0MUX 0x1000
25587 +#define BCSR_RESETS_PCS1MUX 0x2000
25588 +#define BCSR_RESETS_SPISEL 0x4000
25589 +
25590 +#define BCSR_PCMCIA_PC0VPP 0x0003
25591 +#define BCSR_PCMCIA_PC0VCC 0x000C
25592 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
25593 +#define BCSR_PCMCIA_PC0RST 0x0080
25594 +#define BCSR_PCMCIA_PC1VPP 0x0300
25595 +#define BCSR_PCMCIA_PC1VCC 0x0C00
25596 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
25597 +#define BCSR_PCMCIA_PC1RST 0x8000
25598 +
25599 +#define BCSR_BOARD_LCDVEE 0x0001
25600 +#define BCSR_BOARD_LCDVDD 0x0002
25601 +#define BCSR_BOARD_LCDBL 0x0004
25602 +#define BCSR_BOARD_CAMSNAP 0x0010
25603 +#define BCSR_BOARD_CAMPWR 0x0020
25604 +#define BCSR_BOARD_SD0PWR 0x0040
25605 +
25606 +#define BCSR_LEDS_DECIMALS 0x0003
25607 +#define BCSR_LEDS_LED0 0x0100
25608 +#define BCSR_LEDS_LED1 0x0200
25609 +#define BCSR_LEDS_LED2 0x0400
25610 +#define BCSR_LEDS_LED3 0x0800
25611 +
25612 +#define BCSR_SYSTEM_POWEROFF 0x4000
25613 +#define BCSR_SYSTEM_RESET 0x8000
25614 +
25615 +/* Bit positions for the different interrupt sources */
25616 +#define BCSR_INT_IDE 0x0001
25617 +#define BCSR_INT_ETH 0x0002
25618 +#define BCSR_INT_PC0 0x0004
25619 +#define BCSR_INT_PC0STSCHG 0x0008
25620 +#define BCSR_INT_PC1 0x0010
25621 +#define BCSR_INT_PC1STSCHG 0x0020
25622 +#define BCSR_INT_DC 0x0040
25623 +#define BCSR_INT_FLASHBUSY 0x0080
25624 +#define BCSR_INT_PC0INSERT 0x0100
25625 +#define BCSR_INT_PC0EJECT 0x0200
25626 +#define BCSR_INT_PC1INSERT 0x0400
25627 +#define BCSR_INT_PC1EJECT 0x0800
25628 +#define BCSR_INT_SD0INSERT 0x1000
25629 +#define BCSR_INT_SD0EJECT 0x2000
25630 +
25631 +#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
25632 +#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
25633 +
25634 +#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
25635 +#define AU1XXX_ATA_PHYS_LEN (0x100)
25636 +#define AU1XXX_ATA_REG_OFFSET (5)
25637 +#define AU1XXX_ATA_INT DB1200_IDE_INT
25638 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
25639 +#define AU1XXX_ATA_RQSIZE 128
25640 +
25641 +#define NAND_PHYS_ADDR 0x20000000
25642 +
25643 +/*
25644 + * External Interrupts for Pb1200 as of 8/6/2004.
25645 + * Bit positions in the CPLD registers can be calculated by taking
25646 + * the interrupt define and subtracting the DB1200_INT_BEGIN value.
25647 + * *example: IDE bis pos is = 64 - 64
25648 + ETH bit pos is = 65 - 64
25649 + */
25650 +#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
25651 +#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
25652 +#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
25653 +#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
25654 +#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
25655 +#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
25656 +#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
25657 +#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
25658 +#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
25659 +#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
25660 +#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
25661 +#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
25662 +#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
25663 +#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
25664 +#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
25665 +
25666 +#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
25667 +
25668 +/* For drivers/pcmcia/au1000_db1x00.c */
25669 +#define BOARD_PC0_INT DB1200_PC0_INT
25670 +#define BOARD_PC1_INT DB1200_PC1_INT
25671 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
25672 +
25673 +#endif /* __ASM_DB1200_H */
25674 +
25675 Index: linux-2.4.35.4/include/asm-mips/db1x00.h
25676 ===================================================================
25677 --- linux-2.4.35.4.orig/include/asm-mips/db1x00.h 2007-12-15 05:19:44.378950051 +0100
25678 +++ linux-2.4.35.4/include/asm-mips/db1x00.h 2007-12-15 05:19:45.026986980 +0100
25679 @@ -1,5 +1,5 @@
25680 /*
25681 - * AMD Alchemy DB1x00 Reference Boards
25682 + * AMD Alchemy DB1x00 Reference Boards (BUT NOT DB1200)
25683 *
25684 * Copyright 2001 MontaVista Software Inc.
25685 * Author: MontaVista Software, Inc.
25686 @@ -36,9 +36,18 @@
25687 #define AC97_PSC_BASE PSC1_BASE_ADDR
25688 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
25689 #define I2S_PSC_BASE PSC3_BASE_ADDR
25690 +#define NAND_CS 1
25691 +/* for drivers/pcmcia/au1000_db1x00.c */
25692 +#define BOARD_PC0_INT AU1000_GPIO_3
25693 +#define BOARD_PC1_INT AU1000_GPIO_5
25694 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
25695
25696 #else
25697 #define BCSR_KSEG1_ADDR 0xAE000000
25698 +/* for drivers/pcmcia/au1000_db1x00.c */
25699 +#define BOARD_PC0_INT AU1000_GPIO_2
25700 +#define BOARD_PC1_INT AU1000_GPIO_5
25701 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
25702 #endif
25703
25704 /*
25705 @@ -66,6 +75,7 @@
25706
25707 } BCSR;
25708
25709 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
25710
25711 /*
25712 * Register/mask bit definitions for the BCSRs
25713 @@ -130,14 +140,6 @@
25714
25715 #define BCSR_SWRESET_RESET 0x0080
25716
25717 -/* PCMCIA Db1x00 specific defines */
25718 -#define PCMCIA_MAX_SOCK 1
25719 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
25720 -
25721 -/* VPP/VCC */
25722 -#define SET_VCC_VPP(VCC, VPP, SLOT)\
25723 - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
25724 -
25725 /* MTD CONFIG OPTIONS */
25726 #if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
25727 #define DB1X00_BOTH_BANKS
25728 @@ -147,48 +149,15 @@
25729 #define DB1X00_USER_ONLY
25730 #endif
25731
25732 -/* SD controller macros */
25733 -/*
25734 - * Detect card.
25735 - */
25736 -#define mmc_card_inserted(_n_, _res_) \
25737 - do { \
25738 - BCSR * const bcsr = (BCSR *)0xAE000000; \
25739 - unsigned long mmc_wp, board_specific; \
25740 - if ((_n_)) { \
25741 - mmc_wp = BCSR_BOARD_SD1_WP; \
25742 - } else { \
25743 - mmc_wp = BCSR_BOARD_SD0_WP; \
25744 - } \
25745 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
25746 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
25747 - *(int *)(_res_) = 1; \
25748 - } else { \
25749 - *(int *)(_res_) = 0; \
25750 - } \
25751 - } while (0)
25752 -
25753 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
25754 /*
25755 - * Apply power to card slot(s).
25756 + * Daughter card information.
25757 */
25758 -#define mmc_power_on(_n_) \
25759 - do { \
25760 - BCSR * const bcsr = (BCSR *)0xAE000000; \
25761 - unsigned long mmc_pwr, mmc_wp, board_specific; \
25762 - if ((_n_)) { \
25763 - mmc_pwr = BCSR_BOARD_SD1_PWR; \
25764 - mmc_wp = BCSR_BOARD_SD1_WP; \
25765 - } else { \
25766 - mmc_pwr = BCSR_BOARD_SD0_PWR; \
25767 - mmc_wp = BCSR_BOARD_SD0_WP; \
25768 - } \
25769 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
25770 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
25771 - board_specific |= mmc_pwr; \
25772 - au_writel(board_specific, (int)(&bcsr->specific)); \
25773 - au_sync(); \
25774 - } \
25775 - } while (0)
25776 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_8)
25777 +/* DC_IDE */
25778 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
25779 +#define AU1XXX_ATA_REG_OFFSET (5)
25780 +#endif /* CONFIG_MIPS_DB1550 */
25781
25782 #endif /* __ASM_DB1X00_H */
25783
25784 Index: linux-2.4.35.4/include/asm-mips/elf.h
25785 ===================================================================
25786 --- linux-2.4.35.4.orig/include/asm-mips/elf.h 2007-12-15 05:19:44.386950507 +0100
25787 +++ linux-2.4.35.4/include/asm-mips/elf.h 2007-12-15 05:19:45.026986980 +0100
25788 @@ -66,9 +66,10 @@
25789 #define USE_ELF_CORE_DUMP
25790 #define ELF_EXEC_PAGESIZE PAGE_SIZE
25791
25792 -#define ELF_CORE_COPY_REGS(_dest,_regs) \
25793 - memcpy((char *) &_dest, (char *) _regs, \
25794 - sizeof(struct pt_regs));
25795 +extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
25796 +
25797 +#define ELF_CORE_COPY_REGS(elf_regs, regs) \
25798 + dump_regs((elf_greg_t *)&(elf_regs), regs);
25799
25800 /* This yields a mask that user programs can use to figure out what
25801 instruction set this cpu supports. This could be done in userspace,
25802 Index: linux-2.4.35.4/include/asm-mips/ficmmp.h
25803 ===================================================================
25804 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
25805 +++ linux-2.4.35.4/include/asm-mips/ficmmp.h 2007-12-15 05:19:45.026986980 +0100
25806 @@ -0,0 +1,156 @@
25807 +/*
25808 + * FIC MMP
25809 + *
25810 + * ########################################################################
25811 + *
25812 + * This program is free software; you can distribute it and/or modify it
25813 + * under the terms of the GNU General Public License (Version 2) as
25814 + * published by the Free Software Foundation.
25815 + *
25816 + * This program is distributed in the hope it will be useful, but WITHOUT
25817 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
25818 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25819 + * for more details.
25820 + *
25821 + * You should have received a copy of the GNU General Public License along
25822 + * with this program; if not, write to the Free Software Foundation, Inc.,
25823 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
25824 + *
25825 + * ########################################################################
25826 + *
25827 + *
25828 + */
25829 +#ifndef __ASM_FICMMP_H
25830 +#define __ASM_FICMMP_H
25831 +
25832 +#include <linux/types.h>
25833 +#include <asm/au1000.h>
25834 +#include <asm/au1xxx_gpio.h>
25835 +
25836 +// This is defined in au1000.h with bogus value
25837 +#undef AU1X00_EXTERNAL_INT
25838 +
25839 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25840 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25841 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
25842 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
25843 +/* SPI and SMB are muxed on the Pb1200 board.
25844 + Refer to board documentation.
25845 + */
25846 +#define SPI_PSC_BASE PSC0_BASE_ADDR
25847 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
25848 +/* AC97 and I2S are muxed on the Pb1200 board.
25849 + Refer to board documentation.
25850 + */
25851 +#define AC97_PSC_BASE PSC1_BASE_ADDR
25852 +#define I2S_PSC_BASE PSC1_BASE_ADDR
25853 +
25854 +
25855 +/*
25856 + * SMSC LAN91C111
25857 + */
25858 +#define AU1XXX_SMC91111_PHYS_ADDR (0xAC000300)
25859 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_5
25860 +
25861 +/* DC_IDE and DC_ETHERNET */
25862 +#define FICMMP_IDE_INT AU1000_GPIO_4
25863 +
25864 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
25865 +#define AU1XXX_ATA_REG_OFFSET (5)
25866 +/*
25867 +#define AU1XXX_ATA_BASE (0x0C800000)
25868 +#define AU1XXX_ATA_END (0x0CFFFFFF)
25869 +#define AU1XXX_ATA_MEM_SIZE (AU1XXX_ATA_END - AU1XXX_ATA_BASE +1)
25870 +
25871 +#define AU1XXX_ATA_REG_OFFSET (5)
25872 +*/
25873 +/* VPP/VCC */
25874 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
25875 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
25876 +
25877 +
25878 +#define FICMMP_CONFIG_BASE 0xAD000000
25879 +#define FICMMP_CONFIG_ENABLE 13
25880 +
25881 +#define FICMMP_CONFIG_I2SFREQ(N) (N<<0)
25882 +#define FICMMP_CONFIG_I2SXTAL0 (1<<0)
25883 +#define FICMMP_CONFIG_I2SXTAL1 (1<<1)
25884 +#define FICMMP_CONFIG_I2SXTAL2 (1<<2)
25885 +#define FICMMP_CONFIG_I2SXTAL3 (1<<3)
25886 +#define FICMMP_CONFIG_ADV1 (1<<4)
25887 +#define FICMMP_CONFIG_IDERST (1<<5)
25888 +#define FICMMP_CONFIG_LCMEN (1<<6)
25889 +#define FICMMP_CONFIG_CAMPWDN (1<<7)
25890 +#define FICMMP_CONFIG_USBPWREN (1<<8)
25891 +#define FICMMP_CONFIG_LCMPWREN (1<<9)
25892 +#define FICMMP_CONFIG_TVOUTPWREN (1<<10)
25893 +#define FICMMP_CONFIG_RS232PWREN (1<<11)
25894 +#define FICMMP_CONFIG_LCMDATAOUT (1<<12)
25895 +#define FICMMP_CONFIG_TVODATAOUT (1<<13)
25896 +#define FICMMP_CONFIG_ADV3 (1<<14)
25897 +#define FICMMP_CONFIG_ADV4 (1<<15)
25898 +
25899 +#define I2S_FREQ_8_192 (0x0)
25900 +#define I2S_FREQ_11_2896 (0x1)
25901 +#define I2S_FREQ_12_288 (0x2)
25902 +#define I2S_FREQ_24_576 (0x3)
25903 +//#define I2S_FREQ_12_288 (0x4)
25904 +#define I2S_FREQ_16_9344 (0x5)
25905 +#define I2S_FREQ_18_432 (0x6)
25906 +#define I2S_FREQ_36_864 (0x7)
25907 +#define I2S_FREQ_16_384 (0x8)
25908 +#define I2S_FREQ_22_5792 (0x9)
25909 +//#define I2S_FREQ_24_576 (0x10)
25910 +#define I2S_FREQ_49_152 (0x11)
25911 +//#define I2S_FREQ_24_576 (0x12)
25912 +#define I2S_FREQ_33_8688 (0x13)
25913 +//#define I2S_FREQ_36_864 (0x14)
25914 +#define I2S_FREQ_73_728 (0x15)
25915 +
25916 +#define FICMMP_IDE_PWR 9
25917 +#define FICMMP_FOCUS_RST 2
25918 +
25919 +static __inline void ficmmp_config_set(u16 bits)
25920 +{
25921 + extern u16 ficmmp_config;
25922 + //printk("set_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config | bits);
25923 + ficmmp_config |= bits;
25924 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
25925 +}
25926 +
25927 +static __inline void ficmmp_config_clear(u16 bits)
25928 +{
25929 + extern u16 ficmmp_config;
25930 +// printk("clear_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config & ~bits);
25931 + ficmmp_config &= ~bits;
25932 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
25933 +}
25934 +
25935 +static __inline void ficmmp_config_init(void)
25936 +{
25937 + au1xxx_gpio_write(FICMMP_CONFIG_ENABLE, 0); //Enable configuration latch
25938 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT | FICMMP_CONFIG_TVODATAOUT | FICMMP_CONFIG_IDERST); //Disable display data buffers
25939 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(I2S_FREQ_36_864));
25940 +}
25941 +
25942 +static __inline u32 ficmmp_set_i2s_sample_rate(u32 rate)
25943 +{
25944 + u32 freq;
25945 +
25946 + switch(rate)
25947 + {
25948 + case 88200:
25949 + case 44100:
25950 + case 8018: freq = I2S_FREQ_11_2896; break;
25951 + case 48000:
25952 + case 32000: //freq = I2S_FREQ_18_432; break;
25953 + case 8000: freq = I2S_FREQ_12_288; break;
25954 + default: freq = I2S_FREQ_12_288; rate = 8000;
25955 + }
25956 + ficmmp_config_clear(FICMMP_CONFIG_I2SFREQ(0xF));
25957 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(freq));
25958 + return rate;
25959 +}
25960 +
25961 +#endif /* __ASM_FICMMP_H */
25962 +
25963 Index: linux-2.4.35.4/include/asm-mips/hazards.h
25964 ===================================================================
25965 --- linux-2.4.35.4.orig/include/asm-mips/hazards.h 2007-12-15 05:19:44.398951191 +0100
25966 +++ linux-2.4.35.4/include/asm-mips/hazards.h 2007-12-15 05:19:45.030987207 +0100
25967 @@ -3,7 +3,7 @@
25968 * License. See the file "COPYING" in the main directory of this archive
25969 * for more details.
25970 *
25971 - * Copyright (C) 2003 Ralf Baechle
25972 + * Copyright (C) 2003, 2004 Ralf Baechle
25973 */
25974 #ifndef _ASM_HAZARDS_H
25975 #define _ASM_HAZARDS_H
25976 @@ -12,38 +12,200 @@
25977
25978 #ifdef __ASSEMBLY__
25979
25980 + .macro _ssnop
25981 + sll $0, $0, 1
25982 + .endm
25983 +
25984 /*
25985 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
25986 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
25987 * for data translations should not occur for 3 cpu cycles.
25988 */
25989 #ifdef CONFIG_CPU_RM9000
25990 -#define rm9000_tlb_hazard \
25991 +
25992 +#define mtc0_tlbw_hazard \
25993 .set push; \
25994 .set mips32; \
25995 - ssnop; ssnop; ssnop; ssnop; \
25996 + _ssnop; _ssnop; _ssnop; _ssnop; \
25997 .set pop
25998 +
25999 +#define tlbw_eret_hazard \
26000 + .set push; \
26001 + .set mips32; \
26002 + _ssnop; _ssnop; _ssnop; _ssnop; \
26003 + .set pop
26004 +
26005 #else
26006 -#define rm9000_tlb_hazard
26007 +
26008 +/*
26009 + * The taken branch will result in a two cycle penalty for the two killed
26010 + * instructions on R4000 / R4400. Other processors only have a single cycle
26011 + * hazard so this is nice trick to have an optimal code for a range of
26012 + * processors.
26013 + */
26014 +#define mtc0_tlbw_hazard \
26015 + b . + 8
26016 +#define tlbw_eret_hazard \
26017 + nop
26018 #endif
26019
26020 +/*
26021 + * mtc0->mfc0 hazard
26022 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
26023 + * It is a MIPS32R2 processor so ehb will clear the hazard.
26024 + */
26025 +
26026 +#ifdef CONFIG_CPU_MIPSR2
26027 +/*
26028 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
26029 + */
26030 + .macro ehb
26031 + sll $0, $0, 3
26032 + .endm
26033 +
26034 +#define irq_enable_hazard \
26035 + ehb # irq_enable_hazard
26036 +
26037 +#define irq_disable_hazard \
26038 + ehb # irq_disable_hazard
26039 +
26040 +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
26041 +
26042 +/*
26043 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
26044 + */
26045 +
26046 +#define irq_enable_hazard
26047 +
26048 +#define irq_disable_hazard
26049 +
26050 #else
26051
26052 /*
26053 + * Classic MIPS needs 1 - 3 nops or ssnops
26054 + */
26055 +#define irq_enable_hazard
26056 +#define irq_disable_hazard \
26057 + _ssnop; _ssnop; _ssnop
26058 +
26059 +#endif
26060 +
26061 +#else /* __ASSEMBLY__ */
26062 +
26063 +/*
26064 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
26065 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
26066 * for data translations should not occur for 3 cpu cycles.
26067 */
26068 #ifdef CONFIG_CPU_RM9000
26069 -#define rm9000_tlb_hazard() \
26070 +
26071 +#define mtc0_tlbw_hazard() \
26072 __asm__ __volatile__( \
26073 ".set\tmips32\n\t" \
26074 - "ssnop; ssnop; ssnop; ssnop\n\t" \
26075 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
26076 + ".set\tmips0")
26077 +
26078 +#define tlbw_use_hazard() \
26079 + __asm__ __volatile__( \
26080 + ".set\tmips32\n\t" \
26081 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
26082 ".set\tmips0")
26083 #else
26084 -#define rm9000_tlb_hazard() do { } while (0)
26085 +
26086 +/*
26087 + * Overkill warning ...
26088 + */
26089 +#define mtc0_tlbw_hazard() \
26090 + __asm__ __volatile__( \
26091 + ".set noreorder\n\t" \
26092 + "nop; nop; nop; nop; nop; nop;\n\t" \
26093 + ".set reorder\n\t")
26094 +
26095 +#define tlbw_use_hazard() \
26096 + __asm__ __volatile__( \
26097 + ".set noreorder\n\t" \
26098 + "nop; nop; nop; nop; nop; nop;\n\t" \
26099 + ".set reorder\n\t")
26100 +
26101 #endif
26102
26103 +/*
26104 + * mtc0->mfc0 hazard
26105 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
26106 + * It is a MIPS32R2 processor so ehb will clear the hazard.
26107 + */
26108 +
26109 +#ifdef CONFIG_CPU_MIPSR2
26110 +/*
26111 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
26112 + */
26113 +__asm__(
26114 + " .macro ehb \n\t"
26115 + " sll $0, $0, 3 \n\t"
26116 + " .endm \n\t"
26117 + " \n\t"
26118 + " .macro\tirq_enable_hazard \n\t"
26119 + " ehb \n\t"
26120 + " .endm \n\t"
26121 + " \n\t"
26122 + " .macro\tirq_disable_hazard \n\t"
26123 + " ehb \n\t"
26124 + " .endm");
26125 +
26126 +#define irq_enable_hazard() \
26127 + __asm__ __volatile__( \
26128 + "ehb\t\t\t\t# irq_enable_hazard")
26129 +
26130 +#define irq_disable_hazard() \
26131 + __asm__ __volatile__( \
26132 + "ehb\t\t\t\t# irq_disable_hazard")
26133 +
26134 +#elif defined(CONFIG_CPU_R10000)
26135 +
26136 +/*
26137 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
26138 + */
26139 +
26140 +__asm__(
26141 + " .macro\tirq_enable_hazard \n\t"
26142 + " .endm \n\t"
26143 + " \n\t"
26144 + " .macro\tirq_disable_hazard \n\t"
26145 + " .endm");
26146 +
26147 +#define irq_enable_hazard() do { } while (0)
26148 +#define irq_disable_hazard() do { } while (0)
26149 +
26150 +#else
26151 +
26152 +/*
26153 + * Default for classic MIPS processors. Assume worst case hazards but don't
26154 + * care about the irq_enable_hazard - sooner or later the hardware will
26155 + * enable it and we don't care when exactly.
26156 + */
26157 +
26158 +__asm__(
26159 + " .macro _ssnop \n\t"
26160 + " sll $0, $2, 1 \n\t"
26161 + " .endm \n\t"
26162 + " \n\t"
26163 + " # \n\t"
26164 + " # There is a hazard but we do not care \n\t"
26165 + " # \n\t"
26166 + " .macro\tirq_enable_hazard \n\t"
26167 + " .endm \n\t"
26168 + " \n\t"
26169 + " .macro\tirq_disable_hazard \n\t"
26170 + " _ssnop; _ssnop; _ssnop \n\t"
26171 + " .endm");
26172 +
26173 +#define irq_enable_hazard() do { } while (0)
26174 +#define irq_disable_hazard() \
26175 + __asm__ __volatile__( \
26176 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
26177 +
26178 #endif
26179
26180 +#endif /* __ASSEMBLY__ */
26181 +
26182 #endif /* _ASM_HAZARDS_H */
26183 Index: linux-2.4.35.4/include/asm-mips/ide.h
26184 ===================================================================
26185 --- linux-2.4.35.4.orig/include/asm-mips/ide.h 2007-12-15 05:19:44.406951647 +0100
26186 +++ linux-2.4.35.4/include/asm-mips/ide.h 2007-12-15 05:19:45.030987207 +0100
26187 @@ -32,12 +32,12 @@
26188
26189 extern struct ide_ops *ide_ops;
26190
26191 -static __inline__ int ide_default_irq(ide_ioreg_t base)
26192 +static inline int ide_default_irq(ide_ioreg_t base)
26193 {
26194 return ide_ops->ide_default_irq(base);
26195 }
26196
26197 -static __inline__ ide_ioreg_t ide_default_io_base(int index)
26198 +static inline ide_ioreg_t ide_default_io_base(int index)
26199 {
26200 return ide_ops->ide_default_io_base(index);
26201 }
26202 @@ -48,7 +48,7 @@
26203 ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
26204 }
26205
26206 -static __inline__ void ide_init_default_hwifs(void)
26207 +static inline void ide_init_default_hwifs(void)
26208 {
26209 #ifndef CONFIG_BLK_DEV_IDEPCI
26210 hw_regs_t hw;
26211 @@ -68,7 +68,89 @@
26212 #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
26213 #endif
26214
26215 -#include <asm-generic/ide_iops.h>
26216 +/* MIPS port and memory-mapped I/O string operations. */
26217 +
26218 +static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
26219 +{
26220 + if (cpu_has_dc_aliases) {
26221 + unsigned long end = addr + size;
26222 + for (; addr < end; addr += PAGE_SIZE)
26223 + flush_dcache_page(virt_to_page(addr));
26224 + }
26225 +}
26226 +
26227 +static inline void __ide_insw(unsigned long port, void *addr,
26228 + unsigned int count)
26229 +{
26230 + insw(port, addr, count);
26231 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
26232 +}
26233 +
26234 +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
26235 +{
26236 + insl(port, addr, count);
26237 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
26238 +}
26239 +
26240 +static inline void __ide_outsw(unsigned long port, const void *addr,
26241 + unsigned long count)
26242 +{
26243 + outsw(port, addr, count);
26244 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
26245 +}
26246 +
26247 +static inline void __ide_outsl(unsigned long port, const void *addr,
26248 + unsigned long count)
26249 +{
26250 + outsl(port, addr, count);
26251 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
26252 +}
26253 +
26254 +static inline void __ide_mm_insw(unsigned long port, void *addr, u32 count)
26255 +{
26256 + unsigned long start = (unsigned long) addr;
26257 +
26258 + while (count--) {
26259 + *(u16 *)addr = readw(port);
26260 + addr += 2;
26261 + }
26262 + __ide_flush_dcache_range(start, count * 2);
26263 +}
26264 +
26265 +static inline void __ide_mm_insl(unsigned long port, void *addr, u32 count)
26266 +{
26267 + unsigned long start = (unsigned long) addr;
26268 +
26269 + while (count--) {
26270 + *(u32 *)addr = readl(port);
26271 + addr += 4;
26272 + }
26273 + __ide_flush_dcache_range(start, count * 4);
26274 +}
26275 +
26276 +static inline void __ide_mm_outsw(unsigned long port, const void *addr,
26277 + u32 count)
26278 +{
26279 + unsigned long start = (unsigned long) addr;
26280 +
26281 + while (count--) {
26282 + writew(*(u16 *)addr, port);
26283 + addr += 2;
26284 + }
26285 + __ide_flush_dcache_range(start, count * 2);
26286 +}
26287 +
26288 +static inline void __ide_mm_outsl(unsigned long port, const void *addr,
26289 + u32 count)
26290 +{
26291 + unsigned long start = (unsigned long) addr;
26292 +
26293 + while (count--) {
26294 + writel(*(u32 *)addr, port);
26295 + addr += 4;
26296 + }
26297 + __ide_flush_dcache_range(start, count * 4);
26298 +}
26299
26300 #endif /* __KERNEL__ */
26301
26302 Index: linux-2.4.35.4/include/asm-mips/io.h
26303 ===================================================================
26304 --- linux-2.4.35.4.orig/include/asm-mips/io.h 2007-12-15 05:19:44.414952102 +0100
26305 +++ linux-2.4.35.4/include/asm-mips/io.h 2007-12-15 05:19:45.030987207 +0100
26306 @@ -392,7 +392,8 @@
26307 return __ioswab32(__val);
26308 }
26309
26310 -static inline void __outsb(unsigned long port, void *addr, unsigned int count)
26311 +static inline void __outsb(unsigned long port, const void *addr,
26312 + unsigned int count)
26313 {
26314 while (count--) {
26315 outb(*(u8 *)addr, port);
26316 @@ -408,7 +409,8 @@
26317 }
26318 }
26319
26320 -static inline void __outsw(unsigned long port, void *addr, unsigned int count)
26321 +static inline void __outsw(unsigned long port, const void *addr,
26322 + unsigned int count)
26323 {
26324 while (count--) {
26325 outw(*(u16 *)addr, port);
26326 @@ -424,7 +426,8 @@
26327 }
26328 }
26329
26330 -static inline void __outsl(unsigned long port, void *addr, unsigned int count)
26331 +static inline void __outsl(unsigned long port, const void *addr,
26332 + unsigned int count)
26333 {
26334 while (count--) {
26335 outl(*(u32 *)addr, port);
26336 Index: linux-2.4.35.4/include/asm-mips/mipsregs.h
26337 ===================================================================
26338 --- linux-2.4.35.4.orig/include/asm-mips/mipsregs.h 2007-12-15 05:19:44.422952557 +0100
26339 +++ linux-2.4.35.4/include/asm-mips/mipsregs.h 2007-12-15 05:19:45.038987665 +0100
26340 @@ -757,10 +757,18 @@
26341 #define read_c0_config1() __read_32bit_c0_register($16, 1)
26342 #define read_c0_config2() __read_32bit_c0_register($16, 2)
26343 #define read_c0_config3() __read_32bit_c0_register($16, 3)
26344 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
26345 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
26346 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
26347 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
26348 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
26349 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
26350 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
26351 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
26352 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
26353 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
26354 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
26355 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
26356
26357 /*
26358 * The WatchLo register. There may be upto 8 of them.
26359 @@ -874,42 +882,34 @@
26360 */
26361 static inline void tlb_probe(void)
26362 {
26363 - rm9000_tlb_hazard();
26364 __asm__ __volatile__(
26365 ".set noreorder\n\t"
26366 "tlbp\n\t"
26367 ".set reorder");
26368 - rm9000_tlb_hazard();
26369 }
26370
26371 static inline void tlb_read(void)
26372 {
26373 - rm9000_tlb_hazard();
26374 __asm__ __volatile__(
26375 ".set noreorder\n\t"
26376 "tlbr\n\t"
26377 ".set reorder");
26378 - rm9000_tlb_hazard();
26379 }
26380
26381 static inline void tlb_write_indexed(void)
26382 {
26383 - rm9000_tlb_hazard();
26384 __asm__ __volatile__(
26385 ".set noreorder\n\t"
26386 "tlbwi\n\t"
26387 ".set reorder");
26388 - rm9000_tlb_hazard();
26389 }
26390
26391 static inline void tlb_write_random(void)
26392 {
26393 - rm9000_tlb_hazard();
26394 __asm__ __volatile__(
26395 ".set noreorder\n\t"
26396 "tlbwr\n\t"
26397 ".set reorder");
26398 - rm9000_tlb_hazard();
26399 }
26400
26401 /*
26402 Index: linux-2.4.35.4/include/asm-mips/mmu_context.h
26403 ===================================================================
26404 --- linux-2.4.35.4.orig/include/asm-mips/mmu_context.h 2007-12-15 05:19:44.430953013 +0100
26405 +++ linux-2.4.35.4/include/asm-mips/mmu_context.h 2007-12-15 05:19:45.038987665 +0100
26406 @@ -27,7 +27,7 @@
26407 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
26408 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
26409 #define TLBMISS_HANDLER_SETUP() \
26410 - write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
26411 + write_c0_context((unsigned long) smp_processor_id() << 23); \
26412 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
26413 extern unsigned long pgd_current[];
26414
26415 Index: linux-2.4.35.4/include/asm-mips/pb1100.h
26416 ===================================================================
26417 --- linux-2.4.35.4.orig/include/asm-mips/pb1100.h 2007-12-15 05:19:44.438953471 +0100
26418 +++ linux-2.4.35.4/include/asm-mips/pb1100.h 2007-12-15 05:19:45.038987665 +0100
26419 @@ -1,5 +1,5 @@
26420 /*
26421 - * Alchemy Semi PB1100 Referrence Board
26422 + * AMD Alchemy PB1100 Reference Boards
26423 *
26424 * Copyright 2001 MontaVista Software Inc.
26425 * Author: MontaVista Software, Inc.
26426 @@ -27,55 +27,108 @@
26427 #ifndef __ASM_PB1100_H
26428 #define __ASM_PB1100_H
26429
26430 -#define PB1100_IDENT 0xAE000000
26431 -#define BOARD_STATUS_REG 0xAE000004
26432 - #define PB1100_ROM_SEL (1<<15)
26433 - #define PB1100_ROM_SIZ (1<<14)
26434 - #define PB1100_SWAP_BOOT (1<<13)
26435 - #define PB1100_FLASH_WP (1<<12)
26436 - #define PB1100_ROM_H_STS (1<<11)
26437 - #define PB1100_ROM_L_STS (1<<10)
26438 - #define PB1100_FLASH_H_STS (1<<9)
26439 - #define PB1100_FLASH_L_STS (1<<8)
26440 - #define PB1100_SRAM_SIZ (1<<7)
26441 - #define PB1100_TSC_BUSY (1<<6)
26442 - #define PB1100_PCMCIA_VS_MASK (3<<4)
26443 - #define PB1100_RS232_CD (1<<3)
26444 - #define PB1100_RS232_CTS (1<<2)
26445 - #define PB1100_RS232_DSR (1<<1)
26446 - #define PB1100_RS232_RI (1<<0)
26447 -
26448 -#define PB1100_IRDA_RS232 0xAE00000C
26449 - #define PB1100_IRDA_FULL (0<<14) /* full power */
26450 - #define PB1100_IRDA_SHUTDOWN (1<<14)
26451 - #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
26452 - #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
26453 - #define PB1100_IRDA_FIR (1<<13)
26454 -
26455 -#define PCMCIA_BOARD_REG 0xAE000010
26456 - #define PB1100_SD_WP1_RO (1<<15) /* read only */
26457 - #define PB1100_SD_WP0_RO (1<<14) /* read only */
26458 - #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
26459 - #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
26460 - #define PB1100_SEL_SD_CONN1 (1<<9)
26461 - #define PB1100_SEL_SD_CONN0 (1<<8)
26462 - #define PC_DEASSERT_RST (1<<7)
26463 - #define PC_DRV_EN (1<<4)
26464 -
26465 -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
26466 -
26467 -#define PB1100_RST_VDDI 0xAE00001C
26468 - #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
26469 - #define PB1100_VDDI_MASK (0x1F)
26470 +#define BCSR_KSEG1_ADDR 0xAE000000
26471 +
26472 +/*
26473 + * Overlay data structure of the Pb1100 board registers.
26474 + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
26475 + */
26476 +typedef volatile struct
26477 +{
26478 + /*00*/ unsigned short whoami;
26479 + unsigned short reserved0;
26480 + /*04*/ unsigned short status;
26481 + unsigned short reserved1;
26482 + /*08*/ unsigned short switches;
26483 + unsigned short reserved2;
26484 + /*0C*/ unsigned short resets;
26485 + unsigned short reserved3;
26486 + /*10*/ unsigned short pcmcia;
26487 + unsigned short reserved4;
26488 + /*14*/ unsigned short graphics;
26489 + unsigned short reserved5;
26490 + /*18*/ unsigned short leds;
26491 + unsigned short reserved6;
26492 + /*1C*/ unsigned short swreset;
26493 + unsigned short reserved7;
26494 +
26495 +} BCSR;
26496
26497 -#define PB1100_LEDS 0xAE000018
26498
26499 -/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
26500 - * 7:0 is the LED Display's decimal points.
26501 +/*
26502 + * Register/mask bit definitions for the BCSRs
26503 */
26504 -#define PB1100_HEX_LED 0xAE000018
26505 +#define BCSR_WHOAMI_DCID 0x000F
26506 +#define BCSR_WHOAMI_CPLD 0x00F0
26507 +#define BCSR_WHOAMI_BOARD 0x0F00
26508 +
26509 +#define BCSR_STATUS_RS232_RI 0x0001
26510 +#define BCSR_STATUS_RS232_DSR 0x0002
26511 +#define BCSR_STATUS_RS232_CTS 0x0004
26512 +#define BCSR_STATUS_RS232_CD 0x0008
26513 +#define BCSR_STATUS_PCMCIA_VS_MASK 0x0030
26514 +#define BCSR_STATUS_TSC_BUSY 0x0040
26515 +#define BCSR_STATUS_SRAM_SIZ 0x0080
26516 +#define BCSR_STATUS_FLASH_L_STS 0x0100
26517 +#define BCSR_STATUS_FLASH_H_STS 0x0200
26518 +#define BCSR_STATUS_ROM_H_STS 0x0400
26519 +#define BCSR_STATUS_ROM_L_STS 0x0800
26520 +#define BCSR_STATUS_FLASH_WP 0x1000
26521 +#define BCSR_STATUS_SWAP_BOOT 0x2000
26522 +#define BCSR_STATUS_ROM_SIZ 0x4000
26523 +#define BCSR_STATUS_ROM_SEL 0x8000
26524 +
26525 +#define BCSR_SWITCHES_DIP 0x00FF
26526 +#define BCSR_SWITCHES_DIP_1 0x0080
26527 +#define BCSR_SWITCHES_DIP_2 0x0040
26528 +#define BCSR_SWITCHES_DIP_3 0x0020
26529 +#define BCSR_SWITCHES_DIP_4 0x0010
26530 +#define BCSR_SWITCHES_DIP_5 0x0008
26531 +#define BCSR_SWITCHES_DIP_6 0x0004
26532 +#define BCSR_SWITCHES_DIP_7 0x0002
26533 +#define BCSR_SWITCHES_DIP_8 0x0001
26534 +#define BCSR_SWITCHES_ROTARY 0x0F00
26535 +#define BCSR_SWITCHES_SDO_CL 0x8000
26536 +
26537 +#define BCSR_RESETS_PHY0 0x0001
26538 +#define BCSR_RESETS_PHY1 0x0002
26539 +#define BCSR_RESETS_DC 0x0004
26540 +#define BCSR_RESETS_RS232_RTS 0x0100
26541 +#define BCSR_RESETS_RS232_DTR 0x0200
26542 +#define BCSR_RESETS_FIR_SEL 0x2000
26543 +#define BCSR_RESETS_IRDA_MODE_MASK 0xC000
26544 +#define BCSR_RESETS_IRDA_MODE_FULL 0x0000
26545 +#define BCSR_RESETS_IRDA_MODE_OFF 0x4000
26546 +#define BCSR_RESETS_IRDA_MODE_2_3 0x8000
26547 +#define BCSR_RESETS_IRDA_MODE_1_3 0xC000
26548 +
26549 +#define BCSR_PCMCIA_PC0VPP 0x0003
26550 +#define BCSR_PCMCIA_PC0VCC 0x000C
26551 +#define BCSR_PCMCIA_PC0_DR_VEN 0x0010
26552 +#define BCSR_PCMCIA_PC0RST 0x0080
26553 +#define BCSR_PCMCIA_SEL_SD_CON0 0x0100
26554 +#define BCSR_PCMCIA_SEL_SD_CON1 0x0200
26555 +#define BCSR_PCMCIA_SD0_PWR 0x0400
26556 +#define BCSR_PCMCIA_SD1_PWR 0x0800
26557 +#define BCSR_PCMCIA_SD0_WP 0x4000
26558 +#define BCSR_PCMCIA_SD1_WP 0x8000
26559 +
26560 +#define PB1100_G_CONTROL 0xAE000014
26561 +#define BCSR_GRAPHICS_GPX_SMPASS 0x0010
26562 +#define BCSR_GRAPHICS_GPX_BIG_ENDIAN 0x0020
26563 +#define BCSR_GRAPHICS_GPX_RST 0x0040
26564 +
26565 +#define BCSR_LEDS_DECIMALS 0x00FF
26566 +#define BCSR_LEDS_LED0 0x0100
26567 +#define BCSR_LEDS_LED1 0x0200
26568 +#define BCSR_LEDS_LED2 0x0400
26569 +#define BCSR_LEDS_LED3 0x0800
26570 +
26571 +#define BCSR_SWRESET_RESET 0x0080
26572 +#define BCSR_VDDI_VDI 0x001F
26573
26574 -/* PCMCIA PB1100 specific defines */
26575 +
26576 + /* PCMCIA Pb1x00 specific defines */
26577 #define PCMCIA_MAX_SOCK 0
26578 #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
26579
26580 @@ -83,3 +136,4 @@
26581 #define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
26582
26583 #endif /* __ASM_PB1100_H */
26584 +
26585 Index: linux-2.4.35.4/include/asm-mips/pb1200.h
26586 ===================================================================
26587 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
26588 +++ linux-2.4.35.4/include/asm-mips/pb1200.h 2007-12-15 05:19:45.038987665 +0100
26589 @@ -0,0 +1,244 @@
26590 +/*
26591 + * AMD Alchemy PB1200 Referrence Board
26592 + * Board Registers defines.
26593 + *
26594 + * ########################################################################
26595 + *
26596 + * This program is free software; you can distribute it and/or modify it
26597 + * under the terms of the GNU General Public License (Version 2) as
26598 + * published by the Free Software Foundation.
26599 + *
26600 + * This program is distributed in the hope it will be useful, but WITHOUT
26601 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26602 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26603 + * for more details.
26604 + *
26605 + * You should have received a copy of the GNU General Public License along
26606 + * with this program; if not, write to the Free Software Foundation, Inc.,
26607 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
26608 + *
26609 + * ########################################################################
26610 + *
26611 + *
26612 + */
26613 +#ifndef __ASM_PB1200_H
26614 +#define __ASM_PB1200_H
26615 +
26616 +#include <linux/types.h>
26617 +
26618 +// This is defined in au1000.h with bogus value
26619 +#undef AU1X00_EXTERNAL_INT
26620 +
26621 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
26622 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
26623 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
26624 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
26625 +
26626 +/* SPI and SMB are muxed on the Pb1200 board.
26627 + Refer to board documentation.
26628 + */
26629 +#define SPI_PSC_BASE PSC0_BASE_ADDR
26630 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
26631 +/* AC97 and I2S are muxed on the Pb1200 board.
26632 + Refer to board documentation.
26633 + */
26634 +#define AC97_PSC_BASE PSC1_BASE_ADDR
26635 +#define I2S_PSC_BASE PSC1_BASE_ADDR
26636 +
26637 +#define BCSR_KSEG1_ADDR 0xAD800000
26638 +
26639 +typedef volatile struct
26640 +{
26641 + /*00*/ u16 whoami;
26642 + u16 reserved0;
26643 + /*04*/ u16 status;
26644 + u16 reserved1;
26645 + /*08*/ u16 switches;
26646 + u16 reserved2;
26647 + /*0C*/ u16 resets;
26648 + u16 reserved3;
26649 +
26650 + /*10*/ u16 pcmcia;
26651 + u16 reserved4;
26652 + /*14*/ u16 board;
26653 + u16 reserved5;
26654 + /*18*/ u16 disk_leds;
26655 + u16 reserved6;
26656 + /*1C*/ u16 system;
26657 + u16 reserved7;
26658 +
26659 + /*20*/ u16 intclr;
26660 + u16 reserved8;
26661 + /*24*/ u16 intset;
26662 + u16 reserved9;
26663 + /*28*/ u16 intclr_mask;
26664 + u16 reserved10;
26665 + /*2C*/ u16 intset_mask;
26666 + u16 reserved11;
26667 +
26668 + /*30*/ u16 sig_status;
26669 + u16 reserved12;
26670 + /*34*/ u16 int_status;
26671 + u16 reserved13;
26672 + /*38*/ u16 reserved14;
26673 + u16 reserved15;
26674 + /*3C*/ u16 reserved16;
26675 + u16 reserved17;
26676 +
26677 +} BCSR;
26678 +
26679 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
26680 +
26681 +/*
26682 + * Register bit definitions for the BCSRs
26683 + */
26684 +#define BCSR_WHOAMI_DCID 0x000F
26685 +#define BCSR_WHOAMI_CPLD 0x00F0
26686 +#define BCSR_WHOAMI_BOARD 0x0F00
26687 +
26688 +#define BCSR_STATUS_PCMCIA0VS 0x0003
26689 +#define BCSR_STATUS_PCMCIA1VS 0x000C
26690 +#define BCSR_STATUS_SWAPBOOT 0x0040
26691 +#define BCSR_STATUS_FLASHBUSY 0x0100
26692 +#define BCSR_STATUS_IDECBLID 0x0200
26693 +#define BCSR_STATUS_SD0WP 0x0400
26694 +#define BCSR_STATUS_SD1WP 0x0800
26695 +#define BCSR_STATUS_U0RXD 0x1000
26696 +#define BCSR_STATUS_U1RXD 0x2000
26697 +
26698 +#define BCSR_SWITCHES_OCTAL 0x00FF
26699 +#define BCSR_SWITCHES_DIP_1 0x0080
26700 +#define BCSR_SWITCHES_DIP_2 0x0040
26701 +#define BCSR_SWITCHES_DIP_3 0x0020
26702 +#define BCSR_SWITCHES_DIP_4 0x0010
26703 +#define BCSR_SWITCHES_DIP_5 0x0008
26704 +#define BCSR_SWITCHES_DIP_6 0x0004
26705 +#define BCSR_SWITCHES_DIP_7 0x0002
26706 +#define BCSR_SWITCHES_DIP_8 0x0001
26707 +#define BCSR_SWITCHES_ROTARY 0x0F00
26708 +
26709 +#define BCSR_RESETS_ETH 0x0001
26710 +#define BCSR_RESETS_CAMERA 0x0002
26711 +#define BCSR_RESETS_DC 0x0004
26712 +#define BCSR_RESETS_IDE 0x0008
26713 +/* not resets but in the same register */
26714 +#define BCSR_RESETS_WSCFSM 0x0800
26715 +#define BCSR_RESETS_PCS0MUX 0x1000
26716 +#define BCSR_RESETS_PCS1MUX 0x2000
26717 +#define BCSR_RESETS_SPISEL 0x4000
26718 +#define BCSR_RESETS_SD1MUX 0x8000
26719 +
26720 +#define BCSR_PCMCIA_PC0VPP 0x0003
26721 +#define BCSR_PCMCIA_PC0VCC 0x000C
26722 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
26723 +#define BCSR_PCMCIA_PC0RST 0x0080
26724 +#define BCSR_PCMCIA_PC1VPP 0x0300
26725 +#define BCSR_PCMCIA_PC1VCC 0x0C00
26726 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
26727 +#define BCSR_PCMCIA_PC1RST 0x8000
26728 +
26729 +#define BCSR_BOARD_LCDVEE 0x0001
26730 +#define BCSR_BOARD_LCDVDD 0x0002
26731 +#define BCSR_BOARD_LCDBL 0x0004
26732 +#define BCSR_BOARD_CAMSNAP 0x0010
26733 +#define BCSR_BOARD_CAMPWR 0x0020
26734 +#define BCSR_BOARD_SD0PWR 0x0040
26735 +#define BCSR_BOARD_SD1PWR 0x0080
26736 +
26737 +#define BCSR_LEDS_DECIMALS 0x00FF
26738 +#define BCSR_LEDS_LED0 0x0100
26739 +#define BCSR_LEDS_LED1 0x0200
26740 +#define BCSR_LEDS_LED2 0x0400
26741 +#define BCSR_LEDS_LED3 0x0800
26742 +
26743 +#define BCSR_SYSTEM_VDDI 0x001F
26744 +#define BCSR_SYSTEM_POWEROFF 0x4000
26745 +#define BCSR_SYSTEM_RESET 0x8000
26746 +
26747 +/* Bit positions for the different interrupt sources */
26748 +#define BCSR_INT_IDE 0x0001
26749 +#define BCSR_INT_ETH 0x0002
26750 +#define BCSR_INT_PC0 0x0004
26751 +#define BCSR_INT_PC0STSCHG 0x0008
26752 +#define BCSR_INT_PC1 0x0010
26753 +#define BCSR_INT_PC1STSCHG 0x0020
26754 +#define BCSR_INT_DC 0x0040
26755 +#define BCSR_INT_FLASHBUSY 0x0080
26756 +#define BCSR_INT_PC0INSERT 0x0100
26757 +#define BCSR_INT_PC0EJECT 0x0200
26758 +#define BCSR_INT_PC1INSERT 0x0400
26759 +#define BCSR_INT_PC1EJECT 0x0800
26760 +#define BCSR_INT_SD0INSERT 0x1000
26761 +#define BCSR_INT_SD0EJECT 0x2000
26762 +#define BCSR_INT_SD1INSERT 0x4000
26763 +#define BCSR_INT_SD1EJECT 0x8000
26764 +
26765 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
26766 +#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
26767 +
26768 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
26769 +#define AU1XXX_ATA_PHYS_LEN (0x100)
26770 +#define AU1XXX_ATA_REG_OFFSET (5)
26771 +#define AU1XXX_ATA_INT PB1200_IDE_INT
26772 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
26773 +#define AU1XXX_ATA_RQSIZE 128
26774 +
26775 +#define NAND_PHYS_ADDR 0x1C000000
26776 +
26777 +/* Timing values as described in databook, * ns value stripped of
26778 + * lower 2 bits.
26779 + * These defines are here rather than an SOC1200 generic file because
26780 + * the parts chosen on another board may be different and may require
26781 + * different timings.
26782 + */
26783 +#define NAND_T_H (18 >> 2)
26784 +#define NAND_T_PUL (30 >> 2)
26785 +#define NAND_T_SU (30 >> 2)
26786 +#define NAND_T_WH (30 >> 2)
26787 +
26788 +/* Bitfield shift amounts */
26789 +#define NAND_T_H_SHIFT 0
26790 +#define NAND_T_PUL_SHIFT 4
26791 +#define NAND_T_SU_SHIFT 8
26792 +#define NAND_T_WH_SHIFT 12
26793 +
26794 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
26795 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
26796 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
26797 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
26798 +
26799 +
26800 +/*
26801 + * External Interrupts for Pb1200 as of 8/6/2004.
26802 + * Bit positions in the CPLD registers can be calculated by taking
26803 + * the interrupt define and subtracting the PB1200_INT_BEGIN value.
26804 + * *example: IDE bis pos is = 64 - 64
26805 + ETH bit pos is = 65 - 64
26806 + */
26807 +#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
26808 +#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
26809 +#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
26810 +#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
26811 +#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
26812 +#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
26813 +#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
26814 +#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
26815 +#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
26816 +#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
26817 +#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
26818 +#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
26819 +#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
26820 +#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
26821 +#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
26822 +#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
26823 +#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
26824 +
26825 +#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
26826 +
26827 +/* For drivers/pcmcia/au1000_db1x00.c */
26828 +#define BOARD_PC0_INT PB1200_PC0_INT
26829 +#define BOARD_PC1_INT PB1200_PC1_INT
26830 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
26831 +
26832 +#endif /* __ASM_PB1200_H */
26833 +
26834 Index: linux-2.4.35.4/include/asm-mips/pb1550.h
26835 ===================================================================
26836 --- linux-2.4.35.4.orig/include/asm-mips/pb1550.h 2007-12-15 05:19:44.450954152 +0100
26837 +++ linux-2.4.35.4/include/asm-mips/pb1550.h 2007-12-15 05:19:45.042987891 +0100
26838 @@ -30,13 +30,11 @@
26839
26840 #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
26841 #define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
26842 -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
26843 -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
26844 -
26845 #define SPI_PSC_BASE PSC0_BASE_ADDR
26846 #define AC97_PSC_BASE PSC1_BASE_ADDR
26847 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
26848 #define I2S_PSC_BASE PSC3_BASE_ADDR
26849 +#define NAND_CS 1
26850
26851 #define BCSR_PHYS_ADDR 0xAF000000
26852
26853 @@ -160,9 +158,23 @@
26854 #define NAND_T_SU_SHIFT 8
26855 #define NAND_T_WH_SHIFT 12
26856
26857 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
26858 - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
26859 - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
26860 - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
26861 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
26862 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
26863 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
26864 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
26865 +
26866 +/*
26867 + * Daughter card information.
26868 + */
26869 +#define DAUGHTER_CARD_BASE (0xAC000000)
26870 +#define DAUGHTER_CARD_MEM_SIZE (0xADFFFFFF - DAUGHTER_CARD_BASE + 1)
26871 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_3)
26872 +
26873 +/* DC_IDE and DC_ETHERNET */
26874 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
26875 +#define AU1XXX_ATA_REG_OFFSET (5)
26876 +
26877 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0C000300)
26878 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_3
26879
26880 #endif /* __ASM_PB1550_H */
26881 Index: linux-2.4.35.4/include/asm-mips/reg.h
26882 ===================================================================
26883 --- linux-2.4.35.4.orig/include/asm-mips/reg.h 2007-12-15 05:19:44.458954611 +0100
26884 +++ linux-2.4.35.4/include/asm-mips/reg.h 2007-12-15 05:19:45.042987891 +0100
26885 @@ -45,6 +45,9 @@
26886 /*
26887 * k0/k1 unsaved
26888 */
26889 +#define EF_REG26 32
26890 +#define EF_REG27 33
26891 +
26892 #define EF_REG28 34
26893 #define EF_REG29 35
26894 #define EF_REG30 36
26895 @@ -60,6 +63,7 @@
26896 #define EF_CP0_BADVADDR 41
26897 #define EF_CP0_STATUS 42
26898 #define EF_CP0_CAUSE 43
26899 +#define EF_UNUSED0 44
26900
26901 #define EF_SIZE 180 /* size in bytes */
26902
26903 Index: linux-2.4.35.4/include/asm-mips/sgi/hpc3.h
26904 ===================================================================
26905 --- linux-2.4.35.4.orig/include/asm-mips/sgi/hpc3.h 2007-12-15 05:19:44.466955066 +0100
26906 +++ linux-2.4.35.4/include/asm-mips/sgi/hpc3.h 2007-12-15 05:19:45.042987891 +0100
26907 @@ -128,26 +128,26 @@
26908 volatile u32 rx_gfptr; /* current GIO fifo ptr */
26909 volatile u32 rx_dfptr; /* current device fifo ptr */
26910 u32 _unused1; /* padding */
26911 - volatile u32 rx_reset; /* reset register */
26912 -#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */
26913 -#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */
26914 -#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
26915 -
26916 - volatile u32 rx_dconfig; /* DMA configuration register */
26917 -#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
26918 -#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
26919 -#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
26920 -#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
26921 -#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
26922 -#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
26923 -#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
26924 -#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */
26925 -
26926 - volatile u32 rx_pconfig; /* PIO configuration register */
26927 -#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
26928 -#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
26929 -#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
26930 -#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
26931 + volatile u32 reset; /* reset register */
26932 +#define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */
26933 +#define HPC3_ERST_CLRIRQ 0x2 /* Clear channel interrupt */
26934 +#define HPC3_ERST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
26935 +
26936 + volatile u32 dconfig; /* DMA configuration register */
26937 +#define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
26938 +#define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
26939 +#define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
26940 +#define HPC3_EDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
26941 +#define HPC3_EDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
26942 +#define HPC3_EDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
26943 +#define HPC3_EDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
26944 +#define HPC3_EDCFG_PTO 0x30000 /* Programmed timeout value for above two */
26945 +
26946 + volatile u32 pconfig; /* PIO configuration register */
26947 +#define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
26948 +#define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
26949 +#define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
26950 +#define HPC3_EPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
26951
26952 u32 _unused2[0x1000/4 - 8]; /* padding */
26953
26954 @@ -221,7 +221,7 @@
26955 #define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
26956
26957 u32 _unused1[0x14000/4 - 5]; /* padding */
26958 -
26959 +
26960 /* Now direct PIO per-HPC3 peripheral access to external regs. */
26961 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
26962 u32 _unused2[0x7c00/4];
26963 @@ -304,7 +304,7 @@
26964 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
26965 };
26966
26967 -/*
26968 +/*
26969 * It is possible to have two HPC3's within the address space on
26970 * one machine, though only having one is more likely on an Indy.
26971 */
26972 Index: linux-2.4.35.4/include/asm-mips/tx4927/tx4927.h
26973 ===================================================================
26974 --- linux-2.4.35.4.orig/include/asm-mips/tx4927/tx4927.h 2007-12-15 05:19:44.474955521 +0100
26975 +++ linux-2.4.35.4/include/asm-mips/tx4927/tx4927.h 2007-12-15 05:19:45.042987891 +0100
26976 @@ -88,8 +88,8 @@
26977
26978
26979 /* TX4927 Configuration registers (64-bit registers) */
26980 -#define TX4927_CONFIG_BASE 0xe300
26981 -#define TX4927_CONFIG_CCFG 0xe300
26982 +#define TX4927_CONFIG_BASE 0xe000
26983 +#define TX4927_CONFIG_CCFG 0xe000
26984 #define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
26985 #define TX4927_CONFIG_CCFG_WDRST BM_41_41
26986 #define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
26987 @@ -124,14 +124,14 @@
26988 #define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
26989 #define TX4927_CONFIG_CCFG_ARMODE BM_01_01
26990 #define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
26991 -#define TX4927_CONFIG_REVID 0xe308
26992 +#define TX4927_CONFIG_REVID 0xe008
26993 #define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
26994 #define TX4927_CONFIG_REVID_PCODE BM_16_31
26995 #define TX4927_CONFIG_REVID_MJERREV BM_12_15
26996 #define TX4927_CONFIG_REVID_MINEREV BM_08_11
26997 #define TX4927_CONFIG_REVID_MJREV BM_04_07
26998 #define TX4927_CONFIG_REVID_MINREV BM_00_03
26999 -#define TX4927_CONFIG_PCFG 0xe310
27000 +#define TX4927_CONFIG_PCFG 0xe010
27001 #define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
27002 #define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
27003 #define TX4927_CONFIG_PCFG_DRVCB BM_55_55
27004 @@ -197,10 +197,10 @@
27005 #define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
27006 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
27007 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
27008 -#define TX4927_CONFIG_TOEA 0xe318
27009 +#define TX4927_CONFIG_TOEA 0xe018
27010 #define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
27011 #define TX4927_CONFIG_TOEA_TOEA BM_00_35
27012 -#define TX4927_CONFIG_CLKCTR 0xe320
27013 +#define TX4927_CONFIG_CLKCTR 0xe020
27014 #define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
27015 #define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
27016 #define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
27017 @@ -223,7 +223,7 @@
27018 #define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
27019 #define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
27020 #define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
27021 -#define TX4927_CONFIG_GARBC 0xe330
27022 +#define TX4927_CONFIG_GARBC 0xe030
27023 #define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
27024 #define TX4927_CONFIG_GARBC_SET_09 BM_09_09
27025 #define TX4927_CONFIG_GARBC_ARBMD BM_08_08
27026 @@ -243,7 +243,7 @@
27027 #define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
27028 #define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
27029 #define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
27030 -#define TX4927_CONFIG_RAMP 0xe348
27031 +#define TX4927_CONFIG_RAMP 0xe048
27032 #define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
27033 #define TX4927_CONFIG_RAMP_RAMP BM_00_19
27034 #define TX4927_CONFIG_LIMIT 0xefff
27035 @@ -456,7 +456,7 @@
27036 #define TX4927_ACLC_ACINTSTS 0xf710
27037 #define TX4927_ACLC_ACINTMSTS 0xf714
27038 #define TX4927_ACLC_ACINTEN 0xf718
27039 -#define TX4927_ACLC_ACINTDIS 0xfR71c
27040 +#define TX4927_ACLC_ACINTDIS 0xf71c
27041 #define TX4927_ACLC_ACSEMAPH 0xf720
27042 #define TX4927_ACLC_ACGPIDAT 0xf740
27043 #define TX4927_ACLC_ACGPODAT 0xf744
27044 Index: linux-2.4.35.4/include/asm-mips/unistd.h
27045 ===================================================================
27046 --- linux-2.4.35.4.orig/include/asm-mips/unistd.h 2007-12-15 05:19:44.482955977 +0100
27047 +++ linux-2.4.35.4/include/asm-mips/unistd.h 2007-12-15 05:19:45.046988120 +0100
27048 @@ -760,7 +760,7 @@
27049 if (__a3 == 0) \
27050 return (type) __v0; \
27051 errno = __v0; \
27052 - return -1; \
27053 + return (type)-1; \
27054 }
27055
27056 /*
27057 @@ -788,7 +788,7 @@
27058 if (__a3 == 0) \
27059 return (type) __v0; \
27060 errno = __v0; \
27061 - return -1; \
27062 + return (type)-1; \
27063 }
27064
27065 #define _syscall2(type,name,atype,a,btype,b) \
27066 @@ -813,7 +813,7 @@
27067 if (__a3 == 0) \
27068 return (type) __v0; \
27069 errno = __v0; \
27070 - return -1; \
27071 + return (type)-1; \
27072 }
27073
27074 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
27075 @@ -839,7 +839,7 @@
27076 if (__a3 == 0) \
27077 return (type) __v0; \
27078 errno = __v0; \
27079 - return -1; \
27080 + return (type)-1; \
27081 }
27082
27083 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
27084 @@ -865,7 +865,7 @@
27085 if (__a3 == 0) \
27086 return (type) __v0; \
27087 errno = __v0; \
27088 - return -1; \
27089 + return (type)-1; \
27090 }
27091
27092 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
27093 @@ -902,7 +902,7 @@
27094 if (__a3 == 0) \
27095 return (type) __v0; \
27096 errno = __v0; \
27097 - return -1; \
27098 + return (type)-1; \
27099 }
27100
27101 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
27102 @@ -935,7 +935,7 @@
27103 if (__a3 == 0) \
27104 return (type) __v0; \
27105 errno = __v0; \
27106 - return -1; \
27107 + return (type)-1; \
27108 }
27109
27110 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
27111 @@ -966,7 +966,7 @@
27112 if (__a3 == 0) \
27113 return (type) __v0; \
27114 errno = __v0; \
27115 - return -1; \
27116 + return (type)-1; \
27117 }
27118
27119 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
27120 @@ -995,7 +995,7 @@
27121 if (__a3 == 0) \
27122 return (type) __v0; \
27123 errno = __v0; \
27124 - return -1; \
27125 + return (type)-1; \
27126 }
27127
27128 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
27129 Index: linux-2.4.35.4/include/asm-mips64/checksum.h
27130 ===================================================================
27131 --- linux-2.4.35.4.orig/include/asm-mips64/checksum.h 2007-12-15 05:19:44.490956432 +0100
27132 +++ linux-2.4.35.4/include/asm-mips64/checksum.h 2007-12-15 05:19:45.046988120 +0100
27133 @@ -144,7 +144,7 @@
27134 "daddu\t%0, %4\n\t"
27135 "dsll32\t$1, %0, 0\n\t"
27136 "daddu\t%0, $1\n\t"
27137 - "dsrl32\t%0, %0, 0\n\t"
27138 + "dsra32\t%0, %0, 0\n\t"
27139 ".set\tat"
27140 : "=&r" (sum)
27141 : "0" (daddr), "r"(saddr),
27142 Index: linux-2.4.35.4/include/asm-mips64/elf.h
27143 ===================================================================
27144 --- linux-2.4.35.4.orig/include/asm-mips64/elf.h 2007-12-15 05:19:44.498956890 +0100
27145 +++ linux-2.4.35.4/include/asm-mips64/elf.h 2007-12-15 05:19:45.046988120 +0100
27146 @@ -64,9 +64,10 @@
27147 #define USE_ELF_CORE_DUMP
27148 #define ELF_EXEC_PAGESIZE PAGE_SIZE
27149
27150 -#define ELF_CORE_COPY_REGS(_dest,_regs) \
27151 - memcpy((char *) &_dest, (char *) _regs, \
27152 - sizeof(struct pt_regs));
27153 +extern void dump_regs(elf_greg_t *, struct pt_regs *regs);
27154 +
27155 +#define ELF_CORE_COPY_REGS(elf_regs, regs) \
27156 + dump_regs((elf_greg_t *)&(elf_regs), regs);
27157
27158 /* This yields a mask that user programs can use to figure out what
27159 instruction set this cpu supports. This could be done in userspace,
27160 Index: linux-2.4.35.4/include/asm-mips64/hazards.h
27161 ===================================================================
27162 --- linux-2.4.35.4.orig/include/asm-mips64/hazards.h 2007-12-15 05:19:44.506957346 +0100
27163 +++ linux-2.4.35.4/include/asm-mips64/hazards.h 2007-12-15 05:19:45.046988120 +0100
27164 @@ -3,7 +3,7 @@
27165 * License. See the file "COPYING" in the main directory of this archive
27166 * for more details.
27167 *
27168 - * Copyright (C) 2003 Ralf Baechle
27169 + * Copyright (C) 2003, 2004 Ralf Baechle
27170 */
27171 #ifndef _ASM_HAZARDS_H
27172 #define _ASM_HAZARDS_H
27173 @@ -12,37 +12,200 @@
27174
27175 #ifdef __ASSEMBLY__
27176
27177 + .macro _ssnop
27178 + sll $0, $0, 1
27179 + .endm
27180 +
27181 /*
27182 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
27183 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
27184 * for data translations should not occur for 3 cpu cycles.
27185 */
27186 #ifdef CONFIG_CPU_RM9000
27187 -#define rm9000_tlb_hazard \
27188 +
27189 +#define mtc0_tlbw_hazard \
27190 + .set push; \
27191 .set mips32; \
27192 - ssnop; ssnop; ssnop; ssnop; \
27193 - .set mips0
27194 + _ssnop; _ssnop; _ssnop; _ssnop; \
27195 + .set pop
27196 +
27197 +#define tlbw_eret_hazard \
27198 + .set push; \
27199 + .set mips32; \
27200 + _ssnop; _ssnop; _ssnop; _ssnop; \
27201 + .set pop
27202 +
27203 #else
27204 -#define rm9000_tlb_hazard
27205 +
27206 +/*
27207 + * The taken branch will result in a two cycle penalty for the two killed
27208 + * instructions on R4000 / R4400. Other processors only have a single cycle
27209 + * hazard so this is nice trick to have an optimal code for a range of
27210 + * processors.
27211 + */
27212 +#define mtc0_tlbw_hazard \
27213 + b . + 8
27214 +#define tlbw_eret_hazard \
27215 + nop
27216 #endif
27217
27218 +/*
27219 + * mtc0->mfc0 hazard
27220 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
27221 + * It is a MIPS32R2 processor so ehb will clear the hazard.
27222 + */
27223 +
27224 +#ifdef CONFIG_CPU_MIPSR2
27225 +/*
27226 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
27227 + */
27228 + .macro ehb
27229 + sll $0, $0, 3
27230 + .endm
27231 +
27232 +#define irq_enable_hazard \
27233 + ehb # irq_enable_hazard
27234 +
27235 +#define irq_disable_hazard \
27236 + ehb # irq_disable_hazard
27237 +
27238 +#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
27239 +
27240 +/*
27241 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
27242 + */
27243 +
27244 +#define irq_enable_hazard
27245 +
27246 +#define irq_disable_hazard
27247 +
27248 #else
27249
27250 /*
27251 + * Classic MIPS needs 1 - 3 nops or ssnops
27252 + */
27253 +#define irq_enable_hazard
27254 +#define irq_disable_hazard \
27255 + _ssnop; _ssnop; _ssnop
27256 +
27257 +#endif
27258 +
27259 +#else /* __ASSEMBLY__ */
27260 +
27261 +/*
27262 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
27263 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
27264 * for data translations should not occur for 3 cpu cycles.
27265 */
27266 #ifdef CONFIG_CPU_RM9000
27267 -#define rm9000_tlb_hazard() \
27268 +
27269 +#define mtc0_tlbw_hazard() \
27270 + __asm__ __volatile__( \
27271 + ".set\tmips32\n\t" \
27272 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
27273 + ".set\tmips0")
27274 +
27275 +#define tlbw_use_hazard() \
27276 __asm__ __volatile__( \
27277 ".set\tmips32\n\t" \
27278 - "ssnop; ssnop; ssnop; ssnop\n\t" \
27279 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
27280 ".set\tmips0")
27281 #else
27282 -#define rm9000_tlb_hazard() do { } while (0)
27283 +
27284 +/*
27285 + * Overkill warning ...
27286 + */
27287 +#define mtc0_tlbw_hazard() \
27288 + __asm__ __volatile__( \
27289 + ".set noreorder\n\t" \
27290 + "nop; nop; nop; nop; nop; nop;\n\t" \
27291 + ".set reorder\n\t")
27292 +
27293 +#define tlbw_use_hazard() \
27294 + __asm__ __volatile__( \
27295 + ".set noreorder\n\t" \
27296 + "nop; nop; nop; nop; nop; nop;\n\t" \
27297 + ".set reorder\n\t")
27298 +
27299 #endif
27300
27301 +/*
27302 + * mtc0->mfc0 hazard
27303 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
27304 + * It is a MIPS32R2 processor so ehb will clear the hazard.
27305 + */
27306 +
27307 +#ifdef CONFIG_CPU_MIPSR2
27308 +/*
27309 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
27310 + */
27311 +__asm__(
27312 + " .macro ehb \n\t"
27313 + " sll $0, $0, 3 \n\t"
27314 + " .endm \n\t"
27315 + " \n\t"
27316 + " .macro\tirq_enable_hazard \n\t"
27317 + " ehb \n\t"
27318 + " .endm \n\t"
27319 + " \n\t"
27320 + " .macro\tirq_disable_hazard \n\t"
27321 + " ehb \n\t"
27322 + " .endm");
27323 +
27324 +#define irq_enable_hazard() \
27325 + __asm__ __volatile__( \
27326 + "ehb\t\t\t\t# irq_enable_hazard")
27327 +
27328 +#define irq_disable_hazard() \
27329 + __asm__ __volatile__( \
27330 + "ehb\t\t\t\t# irq_disable_hazard")
27331 +
27332 +#elif defined(CONFIG_CPU_R10000)
27333 +
27334 +/*
27335 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
27336 + */
27337 +
27338 +__asm__(
27339 + " .macro\tirq_enable_hazard \n\t"
27340 + " .endm \n\t"
27341 + " \n\t"
27342 + " .macro\tirq_disable_hazard \n\t"
27343 + " .endm");
27344 +
27345 +#define irq_enable_hazard() do { } while (0)
27346 +#define irq_disable_hazard() do { } while (0)
27347 +
27348 +#else
27349 +
27350 +/*
27351 + * Default for classic MIPS processors. Assume worst case hazards but don't
27352 + * care about the irq_enable_hazard - sooner or later the hardware will
27353 + * enable it and we don't care when exactly.
27354 + */
27355 +
27356 +__asm__(
27357 + " .macro _ssnop \n\t"
27358 + " sll $0, $2, 1 \n\t"
27359 + " .endm \n\t"
27360 + " \n\t"
27361 + " # \n\t"
27362 + " # There is a hazard but we do not care \n\t"
27363 + " # \n\t"
27364 + " .macro\tirq_enable_hazard \n\t"
27365 + " .endm \n\t"
27366 + " \n\t"
27367 + " .macro\tirq_disable_hazard \n\t"
27368 + " _ssnop; _ssnop; _ssnop \n\t"
27369 + " .endm");
27370 +
27371 +#define irq_enable_hazard() do { } while (0)
27372 +#define irq_disable_hazard() \
27373 + __asm__ __volatile__( \
27374 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
27375 +
27376 #endif
27377
27378 +#endif /* __ASSEMBLY__ */
27379 +
27380 #endif /* _ASM_HAZARDS_H */
27381 Index: linux-2.4.35.4/include/asm-mips64/ide.h
27382 ===================================================================
27383 --- linux-2.4.35.4.orig/include/asm-mips64/ide.h 2007-12-15 05:19:44.514957801 +0100
27384 +++ linux-2.4.35.4/include/asm-mips64/ide.h 2007-12-15 05:19:45.050988346 +0100
27385 @@ -32,12 +32,12 @@
27386
27387 extern struct ide_ops *ide_ops;
27388
27389 -static __inline__ int ide_default_irq(ide_ioreg_t base)
27390 +static inline int ide_default_irq(ide_ioreg_t base)
27391 {
27392 return ide_ops->ide_default_irq(base);
27393 }
27394
27395 -static __inline__ ide_ioreg_t ide_default_io_base(int index)
27396 +static inline ide_ioreg_t ide_default_io_base(int index)
27397 {
27398 return ide_ops->ide_default_io_base(index);
27399 }
27400 @@ -48,7 +48,7 @@
27401 ide_ops->ide_init_hwif_ports(hw, data_port, ctrl_port, irq);
27402 }
27403
27404 -static __inline__ void ide_init_default_hwifs(void)
27405 +static inline void ide_init_default_hwifs(void)
27406 {
27407 #ifndef CONFIG_BLK_DEV_IDEPCI
27408 hw_regs_t hw;
27409 @@ -68,7 +68,89 @@
27410 #define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
27411 #endif
27412
27413 -#include <asm-generic/ide_iops.h>
27414 +/* MIPS port and memory-mapped I/O string operations. */
27415 +
27416 +static inline void __ide_flush_dcache_range(unsigned long addr, unsigned long size)
27417 +{
27418 + if (cpu_has_dc_aliases) {
27419 + unsigned long end = addr + size;
27420 + for (; addr < end; addr += PAGE_SIZE)
27421 + flush_dcache_page(virt_to_page(addr));
27422 + }
27423 +}
27424 +
27425 +static inline void __ide_insw(unsigned long port, void *addr,
27426 + unsigned int count)
27427 +{
27428 + insw(port, addr, count);
27429 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
27430 +}
27431 +
27432 +static inline void __ide_insl(unsigned long port, void *addr, unsigned int count)
27433 +{
27434 + insl(port, addr, count);
27435 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
27436 +}
27437 +
27438 +static inline void __ide_outsw(unsigned long port, const void *addr,
27439 + unsigned long count)
27440 +{
27441 + outsw(port, addr, count);
27442 + __ide_flush_dcache_range((unsigned long)addr, count * 2);
27443 +}
27444 +
27445 +static inline void __ide_outsl(unsigned long port, const void *addr,
27446 + unsigned long count)
27447 +{
27448 + outsl(port, addr, count);
27449 + __ide_flush_dcache_range((unsigned long)addr, count * 4);
27450 +}
27451 +
27452 +static inline void __ide_mm_insw(unsigned long port, void *addr, u32 count)
27453 +{
27454 + unsigned long start = (unsigned long) addr;
27455 +
27456 + while (count--) {
27457 + *(u16 *)addr = readw(port);
27458 + addr += 2;
27459 + }
27460 + __ide_flush_dcache_range(start, count * 2);
27461 +}
27462 +
27463 +static inline void __ide_mm_insl(unsigned long port, void *addr, u32 count)
27464 +{
27465 + unsigned long start = (unsigned long) addr;
27466 +
27467 + while (count--) {
27468 + *(u32 *)addr = readl(port);
27469 + addr += 4;
27470 + }
27471 + __ide_flush_dcache_range(start, count * 4);
27472 +}
27473 +
27474 +static inline void __ide_mm_outsw(unsigned long port, const void *addr,
27475 + u32 count)
27476 +{
27477 + unsigned long start = (unsigned long) addr;
27478 +
27479 + while (count--) {
27480 + writew(*(u16 *)addr, port);
27481 + addr += 2;
27482 + }
27483 + __ide_flush_dcache_range(start, count * 2);
27484 +}
27485 +
27486 +static inline void __ide_mm_outsl(unsigned long port, const void *addr,
27487 + u32 count)
27488 +{
27489 + unsigned long start = (unsigned long) addr;
27490 +
27491 + while (count--) {
27492 + writel(*(u32 *)addr, port);
27493 + addr += 4;
27494 + }
27495 + __ide_flush_dcache_range(start, count * 4);
27496 +}
27497
27498 #endif /* __KERNEL__ */
27499
27500 Index: linux-2.4.35.4/include/asm-mips64/io.h
27501 ===================================================================
27502 --- linux-2.4.35.4.orig/include/asm-mips64/io.h 2007-12-15 05:19:44.522958256 +0100
27503 +++ linux-2.4.35.4/include/asm-mips64/io.h 2007-12-15 05:19:45.050988346 +0100
27504 @@ -414,7 +414,8 @@
27505 return __ioswab32(__val);
27506 }
27507
27508 -static inline void __outsb(unsigned long port, void *addr, unsigned int count)
27509 +static inline void __outsb(unsigned long port, const void *addr,
27510 + unsigned int count)
27511 {
27512 while (count--) {
27513 outb(*(u8 *)addr, port);
27514 @@ -430,7 +431,8 @@
27515 }
27516 }
27517
27518 -static inline void __outsw(unsigned long port, void *addr, unsigned int count)
27519 +static inline void __outsw(unsigned long port, const void *addr,
27520 + unsigned int count)
27521 {
27522 while (count--) {
27523 outw(*(u16 *)addr, port);
27524 @@ -446,7 +448,8 @@
27525 }
27526 }
27527
27528 -static inline void __outsl(unsigned long port, void *addr, unsigned int count)
27529 +static inline void __outsl(unsigned long port, const void *addr,
27530 + unsigned int count)
27531 {
27532 while (count--) {
27533 outl(*(u32 *)addr, port);
27534 Index: linux-2.4.35.4/include/asm-mips64/mipsregs.h
27535 ===================================================================
27536 --- linux-2.4.35.4.orig/include/asm-mips64/mipsregs.h 2007-12-15 05:19:44.530958712 +0100
27537 +++ linux-2.4.35.4/include/asm-mips64/mipsregs.h 2007-12-15 05:19:45.050988346 +0100
27538 @@ -757,10 +757,18 @@
27539 #define read_c0_config1() __read_32bit_c0_register($16, 1)
27540 #define read_c0_config2() __read_32bit_c0_register($16, 2)
27541 #define read_c0_config3() __read_32bit_c0_register($16, 3)
27542 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
27543 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
27544 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
27545 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
27546 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
27547 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
27548 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
27549 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
27550 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
27551 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
27552 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
27553 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
27554
27555 /*
27556 * The WatchLo register. There may be upto 8 of them.
27557 @@ -856,42 +864,34 @@
27558 */
27559 static inline void tlb_probe(void)
27560 {
27561 - rm9000_tlb_hazard();
27562 __asm__ __volatile__(
27563 ".set noreorder\n\t"
27564 "tlbp\n\t"
27565 ".set reorder");
27566 - rm9000_tlb_hazard();
27567 }
27568
27569 static inline void tlb_read(void)
27570 {
27571 - rm9000_tlb_hazard();
27572 __asm__ __volatile__(
27573 ".set noreorder\n\t"
27574 "tlbr\n\t"
27575 ".set reorder");
27576 - rm9000_tlb_hazard();
27577 }
27578
27579 static inline void tlb_write_indexed(void)
27580 {
27581 - rm9000_tlb_hazard();
27582 __asm__ __volatile__(
27583 ".set noreorder\n\t"
27584 "tlbwi\n\t"
27585 ".set reorder");
27586 - rm9000_tlb_hazard();
27587 }
27588
27589 static inline void tlb_write_random(void)
27590 {
27591 - rm9000_tlb_hazard();
27592 __asm__ __volatile__(
27593 ".set noreorder\n\t"
27594 "tlbwr\n\t"
27595 ".set reorder");
27596 - rm9000_tlb_hazard();
27597 }
27598
27599 /*
27600 Index: linux-2.4.35.4/include/asm-mips64/reg.h
27601 ===================================================================
27602 --- linux-2.4.35.4.orig/include/asm-mips64/reg.h 2007-12-15 05:19:44.538959170 +0100
27603 +++ linux-2.4.35.4/include/asm-mips64/reg.h 2007-12-15 05:19:45.050988346 +0100
27604 @@ -46,6 +46,9 @@
27605 /*
27606 * k0/k1 unsaved
27607 */
27608 +#define EF_REG26 26
27609 +#define EF_REG27 27
27610 +
27611 #define EF_REG28 28
27612 #define EF_REG29 29
27613 #define EF_REG30 30
27614 Index: linux-2.4.35.4/include/asm-mips64/sgi/hpc3.h
27615 ===================================================================
27616 --- linux-2.4.35.4.orig/include/asm-mips64/sgi/hpc3.h 2007-12-15 05:19:44.546959625 +0100
27617 +++ linux-2.4.35.4/include/asm-mips64/sgi/hpc3.h 2007-12-15 05:19:45.050988346 +0100
27618 @@ -128,26 +128,26 @@
27619 volatile u32 rx_gfptr; /* current GIO fifo ptr */
27620 volatile u32 rx_dfptr; /* current device fifo ptr */
27621 u32 _unused1; /* padding */
27622 - volatile u32 rx_reset; /* reset register */
27623 -#define HPC3_ERXRST_CRESET 0x1 /* Reset dma channel and external controller */
27624 -#define HPC3_ERXRST_CLRIRQ 0x2 /* Clear channel interrupt */
27625 -#define HPC3_ERXRST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
27626 -
27627 - volatile u32 rx_dconfig; /* DMA configuration register */
27628 -#define HPC3_ERXDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
27629 -#define HPC3_ERXDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
27630 -#define HPC3_ERXDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
27631 -#define HPC3_ERXDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
27632 -#define HPC3_ERXDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
27633 -#define HPC3_ERXDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
27634 -#define HPC3_ERXDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
27635 -#define HPC3_ERXDCFG_PTO 0x30000 /* Programmed timeout value for above two */
27636 -
27637 - volatile u32 rx_pconfig; /* PIO configuration register */
27638 -#define HPC3_ERXPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
27639 -#define HPC3_ERXPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
27640 -#define HPC3_ERXPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
27641 -#define HPC3_ERXPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
27642 + volatile u32 reset; /* reset register */
27643 +#define HPC3_ERST_CRESET 0x1 /* Reset dma channel and external controller */
27644 +#define HPC3_ERST_CLRIRQ 0x2 /* Clear channel interrupt */
27645 +#define HPC3_ERST_LBACK 0x4 /* Enable diagnostic loopback mode of Seeq8003 */
27646 +
27647 + volatile u32 dconfig; /* DMA configuration register */
27648 +#define HPC3_EDCFG_D1 0x0000f /* Cycles to spend in D1 state for PIO */
27649 +#define HPC3_EDCFG_D2 0x000f0 /* Cycles to spend in D2 state for PIO */
27650 +#define HPC3_EDCFG_D3 0x00f00 /* Cycles to spend in D3 state for PIO */
27651 +#define HPC3_EDCFG_WCTRL 0x01000 /* Enable writes of desc into ex ctrl port */
27652 +#define HPC3_EDCFG_FRXDC 0x02000 /* Clear eop stat bits upon rxdc, hw seeq fix */
27653 +#define HPC3_EDCFG_FEOP 0x04000 /* Bad packet marker timeout enable */
27654 +#define HPC3_EDCFG_FIRQ 0x08000 /* Another bad packet timeout enable */
27655 +#define HPC3_EDCFG_PTO 0x30000 /* Programmed timeout value for above two */
27656 +
27657 + volatile u32 pconfig; /* PIO configuration register */
27658 +#define HPC3_EPCFG_P1 0x000f /* Cycles to spend in P1 state for PIO */
27659 +#define HPC3_EPCFG_P2 0x00f0 /* Cycles to spend in P2 state for PIO */
27660 +#define HPC3_EPCFG_P3 0x0f00 /* Cycles to spend in P3 state for PIO */
27661 +#define HPC3_EPCFG_TST 0x1000 /* Diagnistic ram test feature bit */
27662
27663 u32 _unused2[0x1000/4 - 8]; /* padding */
27664
27665 @@ -221,7 +221,7 @@
27666 #define HPC3_BESTAT_PIDMASK 0x3f700 /* DMA channel parity identifier */
27667
27668 u32 _unused1[0x14000/4 - 5]; /* padding */
27669 -
27670 +
27671 /* Now direct PIO per-HPC3 peripheral access to external regs. */
27672 volatile u32 scsi0_ext[256]; /* SCSI channel 0 external regs */
27673 u32 _unused2[0x7c00/4];
27674 @@ -304,7 +304,7 @@
27675 volatile u32 bbram[8192-50-14]; /* Battery backed ram */
27676 };
27677
27678 -/*
27679 +/*
27680 * It is possible to have two HPC3's within the address space on
27681 * one machine, though only having one is more likely on an Indy.
27682 */
27683 Index: linux-2.4.35.4/include/asm-mips64/sn/nmi.h
27684 ===================================================================
27685 --- linux-2.4.35.4.orig/include/asm-mips64/sn/nmi.h 2007-12-15 05:19:44.554960080 +0100
27686 +++ linux-2.4.35.4/include/asm-mips64/sn/nmi.h 2007-12-15 05:19:45.054988575 +0100
27687 @@ -8,7 +8,7 @@
27688 #ifndef __ASM_SN_NMI_H
27689 #define __ASM_SN_NMI_H
27690
27691 -#ident "$Revision: 1.2.4.2 $"
27692 +#ident "$Revision: 1.2.4.1 $"
27693
27694 #include <asm/sn/addrs.h>
27695
27696 Index: linux-2.4.35.4/include/asm-mips64/unistd.h
27697 ===================================================================
27698 --- linux-2.4.35.4.orig/include/asm-mips64/unistd.h 2007-12-15 05:19:44.562960536 +0100
27699 +++ linux-2.4.35.4/include/asm-mips64/unistd.h 2007-12-15 05:19:45.054988575 +0100
27700 @@ -760,7 +760,7 @@
27701 if (__a3 == 0) \
27702 return (type) __v0; \
27703 errno = __v0; \
27704 - return -1; \
27705 + return (type)-1; \
27706 }
27707
27708 /*
27709 @@ -788,7 +788,7 @@
27710 if (__a3 == 0) \
27711 return (type) __v0; \
27712 errno = __v0; \
27713 - return -1; \
27714 + return (type)-1; \
27715 }
27716
27717 #define _syscall2(type,name,atype,a,btype,b) \
27718 @@ -813,7 +813,7 @@
27719 if (__a3 == 0) \
27720 return (type) __v0; \
27721 errno = __v0; \
27722 - return -1; \
27723 + return (type)-1; \
27724 }
27725
27726 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
27727 @@ -839,7 +839,7 @@
27728 if (__a3 == 0) \
27729 return (type) __v0; \
27730 errno = __v0; \
27731 - return -1; \
27732 + return (type)-1; \
27733 }
27734
27735 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
27736 @@ -865,7 +865,7 @@
27737 if (__a3 == 0) \
27738 return (type) __v0; \
27739 errno = __v0; \
27740 - return -1; \
27741 + return (type)-1; \
27742 }
27743
27744 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
27745 @@ -902,7 +902,7 @@
27746 if (__a3 == 0) \
27747 return (type) __v0; \
27748 errno = __v0; \
27749 - return -1; \
27750 + return (type)-1; \
27751 }
27752
27753 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
27754 @@ -935,7 +935,7 @@
27755 if (__a3 == 0) \
27756 return (type) __v0; \
27757 errno = __v0; \
27758 - return -1; \
27759 + return (type)-1; \
27760 }
27761
27762 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
27763 @@ -966,7 +966,7 @@
27764 if (__a3 == 0) \
27765 return (type) __v0; \
27766 errno = __v0; \
27767 - return -1; \
27768 + return (type)-1; \
27769 }
27770
27771 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
27772 @@ -995,7 +995,7 @@
27773 if (__a3 == 0) \
27774 return (type) __v0; \
27775 errno = __v0; \
27776 - return -1; \
27777 + return (type)-1; \
27778 }
27779
27780 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
27781 Index: linux-2.4.35.4/include/asm-ppc/param.h
27782 ===================================================================
27783 --- linux-2.4.35.4.orig/include/asm-ppc/param.h 2007-12-15 05:19:44.570960991 +0100
27784 +++ linux-2.4.35.4/include/asm-ppc/param.h 2007-12-15 05:19:45.054988575 +0100
27785 @@ -3,6 +3,9 @@
27786
27787 #ifndef HZ
27788 #define HZ 100
27789 +#ifdef __KERNEL__
27790 +#define hz_to_std(a) (a)
27791 +#endif
27792 #endif
27793
27794 #define EXEC_PAGESIZE 4096
27795 Index: linux-2.4.35.4/include/asm-s390/param.h
27796 ===================================================================
27797 --- linux-2.4.35.4.orig/include/asm-s390/param.h 2007-12-15 05:19:44.578961449 +0100
27798 +++ linux-2.4.35.4/include/asm-s390/param.h 2007-12-15 05:19:45.054988575 +0100
27799 @@ -11,6 +11,9 @@
27800
27801 #ifndef HZ
27802 #define HZ 100
27803 +#ifdef __KERNEL__
27804 +#define hz_to_std(a) (a)
27805 +#endif
27806 #endif
27807
27808 #define EXEC_PAGESIZE 4096
27809 Index: linux-2.4.35.4/include/asm-sh/param.h
27810 ===================================================================
27811 --- linux-2.4.35.4.orig/include/asm-sh/param.h 2007-12-15 05:19:44.590962131 +0100
27812 +++ linux-2.4.35.4/include/asm-sh/param.h 2007-12-15 05:19:45.054988575 +0100
27813 @@ -3,6 +3,9 @@
27814
27815 #ifndef HZ
27816 #define HZ 100
27817 +#ifdef __KERNEL__
27818 +#define hz_to_std(a) (a)
27819 +#endif
27820 #endif
27821
27822 #define EXEC_PAGESIZE 4096
27823 Index: linux-2.4.35.4/include/asm-sparc/param.h
27824 ===================================================================
27825 --- linux-2.4.35.4.orig/include/asm-sparc/param.h 2007-12-15 05:19:44.598962589 +0100
27826 +++ linux-2.4.35.4/include/asm-sparc/param.h 2007-12-15 05:19:45.058988805 +0100
27827 @@ -4,6 +4,9 @@
27828
27829 #ifndef HZ
27830 #define HZ 100
27831 +#ifdef __KERNEL__
27832 +#define hz_to_std(a) (a)
27833 +#endif
27834 #endif
27835
27836 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
27837 Index: linux-2.4.35.4/include/asm-sparc64/param.h
27838 ===================================================================
27839 --- linux-2.4.35.4.orig/include/asm-sparc64/param.h 2007-12-15 05:19:44.606963045 +0100
27840 +++ linux-2.4.35.4/include/asm-sparc64/param.h 2007-12-15 05:19:45.058988805 +0100
27841 @@ -4,6 +4,9 @@
27842
27843 #ifndef HZ
27844 #define HZ 100
27845 +#ifdef __KERNEL__
27846 +#define hz_to_std(a) (a)
27847 +#endif
27848 #endif
27849
27850 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
27851 Index: linux-2.4.35.4/include/linux/i2c-algo-au1550.h
27852 ===================================================================
27853 --- /dev/null 1970-01-01 00:00:00.000000000 +0000
27854 +++ linux-2.4.35.4/include/linux/i2c-algo-au1550.h 2007-12-15 05:19:45.058988805 +0100
27855 @@ -0,0 +1,31 @@
27856 +/*
27857 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
27858 + *
27859 + * This program is free software; you can redistribute it and/or modify
27860 + * it under the terms of the GNU General Public License as published by
27861 + * the Free Software Foundation; either version 2 of the License, or
27862 + * (at your option) any later version.
27863 + *
27864 + * This program is distributed in the hope that it will be useful,
27865 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
27866 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27867 + * GNU General Public License for more details.
27868 + *
27869 + * You should have received a copy of the GNU General Public License
27870 + * along with this program; if not, write to the Free Software
27871 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27872 + */
27873 +
27874 +#ifndef I2C_ALGO_AU1550_H
27875 +#define I2C_ALGO_AU1550_H 1
27876 +
27877 +struct i2c_algo_au1550_data {
27878 + u32 psc_base;
27879 + int xfer_timeout;
27880 + int ack_timeout;
27881 +};
27882 +
27883 +int i2c_au1550_add_bus(struct i2c_adapter *);
27884 +int i2c_au1550_del_bus(struct i2c_adapter *);
27885 +
27886 +#endif /* I2C_ALGO_AU1550_H */
27887 Index: linux-2.4.35.4/include/linux/i2c-id.h
27888 ===================================================================
27889 --- linux-2.4.35.4.orig/include/linux/i2c-id.h 2007-12-15 05:19:44.618963729 +0100
27890 +++ linux-2.4.35.4/include/linux/i2c-id.h 2007-12-15 05:19:45.062989031 +0100
27891 @@ -155,6 +155,8 @@
27892 #define I2C_ALGO_SIBYTE 0x150000 /* Broadcom SiByte SOCs */
27893 #define I2C_ALGO_SGI 0x160000 /* SGI algorithm */
27894
27895 +#define I2C_ALGO_AU1550 0x140000 /* Alchemy Au1550 PSC */
27896 +
27897 #define I2C_ALGO_EXP 0x800000 /* experimental */
27898
27899 #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */
27900 @@ -203,6 +205,9 @@
27901 #define I2C_HW_SGI_VINO 0x00
27902 #define I2C_HW_SGI_MACE 0x01
27903
27904 +/* --- Au1550 PSC adapters */
27905 +#define I2C_HW_AU1550_PSC 0x00
27906 +
27907 /* --- SMBus only adapters */
27908 #define I2C_HW_SMBUS_PIIX4 0x00
27909 #define I2C_HW_SMBUS_ALI15X3 0x01
27910 Index: linux-2.4.35.4/include/linux/sched.h
27911 ===================================================================
27912 --- linux-2.4.35.4.orig/include/linux/sched.h 2007-12-15 05:19:44.626964184 +0100
27913 +++ linux-2.4.35.4/include/linux/sched.h 2007-12-15 05:19:45.066989260 +0100
27914 @@ -617,6 +617,10 @@
27915 extern int in_group_p(gid_t);
27916 extern int in_egroup_p(gid_t);
27917
27918 +extern ATTRIB_NORET void cpu_idle(void);
27919 +
27920 +extern void release_task(struct task_struct * p);
27921 +
27922 extern void proc_caches_init(void);
27923 extern void flush_signals(struct task_struct *);
27924 extern void flush_signal_handlers(struct task_struct *);
27925 Index: linux-2.4.35.4/include/linux/serial.h
27926 ===================================================================
27927 --- linux-2.4.35.4.orig/include/linux/serial.h 2007-12-15 05:19:44.634964640 +0100
27928 +++ linux-2.4.35.4/include/linux/serial.h 2007-12-15 05:19:45.066989260 +0100
27929 @@ -75,7 +75,8 @@
27930 #define PORT_16654 11
27931 #define PORT_16850 12
27932 #define PORT_RSA 13 /* RSA-DV II/S card */
27933 -#define PORT_MAX 13
27934 +#define PORT_SB1250 14
27935 +#define PORT_MAX 14
27936
27937 #define SERIAL_IO_PORT 0
27938 #define SERIAL_IO_HUB6 1
27939 Index: linux-2.4.35.4/include/linux/swap.h
27940 ===================================================================
27941 --- linux-2.4.35.4.orig/include/linux/swap.h 2007-12-15 05:19:44.642965095 +0100
27942 +++ linux-2.4.35.4/include/linux/swap.h 2007-12-15 05:19:45.066989260 +0100
27943 @@ -1,6 +1,12 @@
27944 #ifndef _LINUX_SWAP_H
27945 #define _LINUX_SWAP_H
27946
27947 +#include <linux/config.h>
27948 +
27949 +#define MAX_SWAPFILES 32
27950 +
27951 +#ifdef __KERNEL__
27952 +
27953 #include <linux/spinlock.h>
27954 #include <asm/page.h>
27955
27956 @@ -8,8 +14,6 @@
27957 #define SWAP_FLAG_PRIO_MASK 0x7fff
27958 #define SWAP_FLAG_PRIO_SHIFT 0
27959
27960 -#define MAX_SWAPFILES 32
27961 -
27962 /*
27963 * Magic header for a swap area. The first part of the union is
27964 * what the swap magic looks like for the old (limited to 128MB)
27965 @@ -39,8 +43,6 @@
27966 } info;
27967 };
27968
27969 -#ifdef __KERNEL__
27970 -
27971 /*
27972 * Max bad pages in the new format..
27973 */
27974 Index: linux-2.4.35.4/include/video/newport.h
27975 ===================================================================
27976 --- linux-2.4.35.4.orig/include/video/newport.h 2007-12-15 05:19:44.650965550 +0100
27977 +++ linux-2.4.35.4/include/video/newport.h 2007-12-15 05:19:45.066989260 +0100
27978 @@ -291,8 +291,6 @@
27979 unsigned int _unused2[0x1ef];
27980 struct newport_cregs cgo;
27981 };
27982 -extern struct newport_regs *npregs;
27983 -
27984
27985 typedef struct {
27986 unsigned int drawmode1;
27987 @@ -450,38 +448,26 @@
27988
27989 /* Miscellaneous NEWPORT routines. */
27990 #define BUSY_TIMEOUT 100000
27991 -static __inline__ int newport_wait(void)
27992 +static __inline__ int newport_wait(struct newport_regs *regs)
27993 {
27994 - int i = 0;
27995 + int t = BUSY_TIMEOUT;
27996
27997 - while(i < BUSY_TIMEOUT)
27998 - if(!(npregs->cset.status & NPORT_STAT_GBUSY))
27999 + while (t--)
28000 + if (!(regs->cset.status & NPORT_STAT_GBUSY))
28001 break;
28002 - if(i == BUSY_TIMEOUT)
28003 - return 1;
28004 - return 0;
28005 + return !t;
28006 }
28007
28008 -static __inline__ int newport_bfwait(void)
28009 +static __inline__ int newport_bfwait(struct newport_regs *regs)
28010 {
28011 - int i = 0;
28012 + int t = BUSY_TIMEOUT;
28013
28014 - while(i < BUSY_TIMEOUT)
28015 - if(!(npregs->cset.status & NPORT_STAT_BBUSY))
28016 + while (t--)
28017 + if(!(regs->cset.status & NPORT_STAT_BBUSY))
28018 break;
28019 - if(i == BUSY_TIMEOUT)
28020 - return 1;
28021 - return 0;
28022 + return !t;
28023 }
28024
28025 -/* newport.c and cons_newport.c routines */
28026 -extern struct graphics_ops *newport_probe (int, const char **);
28027 -
28028 -void newport_save (void *);
28029 -void newport_restore (void *);
28030 -void newport_reset (void);
28031 -int newport_ioctl (int card, int cmd, unsigned long arg);
28032 -
28033 /*
28034 * DCBMODE register defines:
28035 */
28036 @@ -564,7 +550,7 @@
28037 {
28038 rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
28039 DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
28040 - newport_bfwait ();
28041 + newport_bfwait (rex);
28042
28043 while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
28044 ;
28045 Index: linux-2.4.35.4/init/main.c
28046 ===================================================================
28047 --- linux-2.4.35.4.orig/init/main.c 2007-12-15 05:19:44.662966235 +0100
28048 +++ linux-2.4.35.4/init/main.c 2007-12-15 05:19:45.070989486 +0100
28049 @@ -296,7 +296,6 @@
28050
28051
28052 extern void setup_arch(char **);
28053 -extern void cpu_idle(void);
28054
28055 unsigned long wait_init_idle;
28056
28057 Index: linux-2.4.35.4/kernel/exit.c
28058 ===================================================================
28059 --- linux-2.4.35.4.orig/kernel/exit.c 2007-12-15 05:19:44.666966464 +0100
28060 +++ linux-2.4.35.4/kernel/exit.c 2007-12-15 05:19:45.070989486 +0100
28061 @@ -26,7 +26,7 @@
28062
28063 int getrusage(struct task_struct *, int, struct rusage *);
28064
28065 -static void release_task(struct task_struct * p)
28066 +void release_task(struct task_struct * p)
28067 {
28068 if (p != current) {
28069 #ifdef CONFIG_SMP
28070 Index: linux-2.4.35.4/kernel/signal.c
28071 ===================================================================
28072 --- linux-2.4.35.4.orig/kernel/signal.c 2007-12-15 05:19:44.674966919 +0100
28073 +++ linux-2.4.35.4/kernel/signal.c 2007-12-15 05:19:45.070989486 +0100
28074 @@ -14,6 +14,7 @@
28075 #include <linux/init.h>
28076 #include <linux/sched.h>
28077
28078 +#include <asm/param.h>
28079 #include <asm/uaccess.h>
28080
28081 /*
28082 @@ -28,6 +29,14 @@
28083 #define SIG_SLAB_DEBUG 0
28084 #endif
28085
28086 +#define DEBUG_SIG 0
28087 +
28088 +#if DEBUG_SIG
28089 +#define SIG_SLAB_DEBUG (SLAB_DEBUG_FREE | SLAB_RED_ZONE /* | SLAB_POISON */)
28090 +#else
28091 +#define SIG_SLAB_DEBUG 0
28092 +#endif
28093 +
28094 static kmem_cache_t *sigqueue_cachep;
28095
28096 atomic_t nr_queued_signals;
28097 @@ -270,6 +279,11 @@
28098 signal_pending(current));
28099 #endif
28100
28101 +#if DEBUG_SIG
28102 +printk("SIG dequeue (%s:%d): %d ", current->comm, current->pid,
28103 + signal_pending(current));
28104 +#endif
28105 +
28106 sig = next_signal(current, mask);
28107 if (sig) {
28108 if (current->notifier) {
28109 @@ -293,6 +307,10 @@
28110 printk(" %d -> %d\n", signal_pending(current), sig);
28111 #endif
28112
28113 +#if DEBUG_SIG
28114 +printk(" %d -> %d\n", signal_pending(current), sig);
28115 +#endif
28116 +
28117 return sig;
28118 }
28119
28120 @@ -540,6 +558,11 @@
28121 printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
28122 #endif
28123
28124 +
28125 +#if DEBUG_SIG
28126 +printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
28127 +#endif
28128 +
28129 ret = -EINVAL;
28130 if (sig < 0 || sig > _NSIG)
28131 goto out_nolock;
28132 @@ -778,8 +801,8 @@
28133 info.si_uid = tsk->uid;
28134
28135 /* FIXME: find out whether or not this is supposed to be c*time. */
28136 - info.si_utime = tsk->times.tms_utime;
28137 - info.si_stime = tsk->times.tms_stime;
28138 + info.si_utime = hz_to_std(tsk->times.tms_utime);
28139 + info.si_stime = hz_to_std(tsk->times.tms_stime);
28140
28141 status = tsk->exit_code & 0x7f;
28142 why = SI_KERNEL; /* shouldn't happen */
28143 Index: linux-2.4.35.4/kernel/sys.c
28144 ===================================================================
28145 --- linux-2.4.35.4.orig/kernel/sys.c 2007-12-15 05:19:44.682967375 +0100
28146 +++ linux-2.4.35.4/kernel/sys.c 2007-12-15 05:19:45.074989715 +0100
28147 @@ -801,16 +801,23 @@
28148
28149 asmlinkage long sys_times(struct tms * tbuf)
28150 {
28151 + struct tms temp;
28152 +
28153 /*
28154 * In the SMP world we might just be unlucky and have one of
28155 * the times increment as we use it. Since the value is an
28156 * atomically safe type this is just fine. Conceptually its
28157 * as if the syscall took an instant longer to occur.
28158 */
28159 - if (tbuf)
28160 - if (copy_to_user(tbuf, &current->times, sizeof(struct tms)))
28161 + if (tbuf) {
28162 + temp.tms_utime = hz_to_std(current->times.tms_utime);
28163 + temp.tms_stime = hz_to_std(current->times.tms_stime);
28164 + temp.tms_cutime = hz_to_std(current->times.tms_cutime);
28165 + temp.tms_cstime = hz_to_std(current->times.tms_cstime);
28166 + if (copy_to_user(tbuf, &temp, sizeof(struct tms)))
28167 return -EFAULT;
28168 - return jiffies;
28169 + }
28170 + return hz_to_std(jiffies);
28171 }
28172
28173 /*
28174 Index: linux-2.4.35.4/lib/Makefile
28175 ===================================================================
28176 --- linux-2.4.35.4.orig/lib/Makefile 2007-12-15 05:19:44.694968059 +0100
28177 +++ linux-2.4.35.4/lib/Makefile 2007-12-15 05:19:45.074989715 +0100
28178 @@ -27,6 +27,7 @@
28179 subdir-$(CONFIG_ZLIB_INFLATE) += zlib_inflate
28180 subdir-$(CONFIG_ZLIB_DEFLATE) += zlib_deflate
28181
28182 +-include $(TOPDIR)/arch/$(ARCH)/Makefile.lib
28183 include $(TOPDIR)/drivers/net/Makefile.lib
28184 include $(TOPDIR)/drivers/usb/Makefile.lib
28185 include $(TOPDIR)/drivers/bluetooth/Makefile.lib
28186 Index: linux-2.4.35.4/Makefile
28187 ===================================================================
28188 --- linux-2.4.35.4.orig/Makefile 2007-12-15 05:19:44.702968514 +0100
28189 +++ linux-2.4.35.4/Makefile 2007-12-15 05:19:45.074989715 +0100
28190 @@ -469,10 +469,11 @@
28191 $(MAKE) -C Documentation/DocBook mrproper
28192
28193 distclean: mrproper
28194 - rm -f core `find . \( -not -type d \) -and \
28195 - \( -name '*.orig' -o -name '*.rej' -o -name '*~' \
28196 - -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
28197 - -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags
28198 + find . \( -not -type d \) -and \
28199 + \( -name core -o -name '*.orig' -o -name '*.rej' \
28200 + -o -name '*~' -o -name '*.bak' -o -name '#*#' \
28201 + -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \
28202 + -o -name TAGS -o -name tags \) -print | env -i xargs rm -f
28203
28204 backup: mrproper
28205 cd .. && tar cf - linux/ | gzip -9 > backup.gz
28206 @@ -499,7 +500,7 @@
28207 $(MAKE) -C Documentation/DocBook man
28208
28209 sums:
28210 - find . -type f -print | sort | xargs sum > .SUMS
28211 + find . -type f -print | sort | env -i xargs sum > .SUMS
28212
28213 dep-files: scripts/mkdep archdep include/linux/version.h
28214 rm -f .depend .hdepend
Personal OpenWRT clone
This page took 1.142363 seconds and 3 git commands to generate.