target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include <linux/lockdep.h>
  33 #include "ar8216.h"
  34
  35 /* size of the vlan table */
  36 #define AR8X16_MAX_VLANS        128
  37 #define AR8X16_PROBE_RETRIES    10
  38
  39 struct ar8216_priv {
  40         struct switch_dev dev;
  41         struct phy_device *phy;
  42         u32 (*read)(struct ar8216_priv *priv, int reg);
  43         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  44         const struct net_device_ops *ndo_old;
  45         struct net_device_ops ndo;
  46         struct mutex reg_mutex;
  47         int chip;
  48         bool initialized;
  49         bool port4_phy;
  50         char buf[80];
  51
  52         bool init;
  53
  54         /* all fields below are cleared on reset */
  55         bool vlan;
  56         u16 vlan_id[AR8X16_MAX_VLANS];
  57         u8 vlan_table[AR8X16_MAX_VLANS];
  58         u8 vlan_tagged;
  59         u16 pvid[AR8216_NUM_PORTS];
  60 };
  61
  62 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  63
  64 static inline void
  65 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  66 {
  67         regaddr >>= 1;
  68         *r1 = regaddr & 0x1e;
  69
  70         regaddr >>= 5;
  71         *r2 = regaddr & 0x7;
  72
  73         regaddr >>= 3;
  74         *page = regaddr & 0x1ff;
  75 }
  76
  77 static u32
  78 ar8216_mii_read(struct ar8216_priv *priv, int reg)
  79 {
  80         struct phy_device *phy = priv->phy;
  81         struct mii_bus *bus = phy->bus;
  82         u16 r1, r2, page;
  83         u16 lo, hi;
  84
  85         split_addr((u32) reg, &r1, &r2, &page);
  86
  87         mutex_lock(&bus->mdio_lock);
  88
  89         bus->write(bus, 0x18, 0, page);
  90         msleep(1); /* wait for the page switch to propagate */
  91         lo = bus->read(bus, 0x10 | r2, r1);
  92         hi = bus->read(bus, 0x10 | r2, r1 + 1);
  93
  94         mutex_unlock(&bus->mdio_lock);
  95
  96         return (hi << 16) | lo;
  97 }
  98
  99 static void
 100 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 101 {
 102         struct phy_device *phy = priv->phy;
 103         struct mii_bus *bus = phy->bus;
 104         u16 r1, r2, r3;
 105         u16 lo, hi;
 106
 107         split_addr((u32) reg, &r1, &r2, &r3);
 108         lo = val & 0xffff;
 109         hi = (u16) (val >> 16);
 110
 111         mutex_lock(&bus->mdio_lock);
 112
 113         bus->write(bus, 0x18, 0, r3);
 114         msleep(1); /* wait for the page switch to propagate */
 115         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 116         bus->write(bus, 0x10 | r2, r1, lo);
 117
 118         mutex_unlock(&bus->mdio_lock);
 119 }
 120
 121 static u32
 122 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 123 {
 124         u32 v;
 125
 126         lockdep_assert_held(&priv->reg_mutex);
 127
 128         v = priv->read(priv, reg);
 129         v &= ~mask;
 130         v |= val;
 131         priv->write(priv, reg, v);
 132
 133         return v;
 134 }
 135
 136 static inline int
 137 ar8216_id_chip(struct ar8216_priv *priv)
 138 {
 139         u32 val;
 140         u16 id;
 141         int i;
 142
 143         priv->chip = UNKNOWN;
 144
 145         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 146         if (val == ~0)
 147                 return -ENODEV;
 148
 149         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 150         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 151                 u16 t;
 152
 153                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 154                 if (val == ~0)
 155                         return -ENODEV;
 156
 157                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 158                 if (t != id)
 159                         return -ENODEV;
 160         }
 161
 162         switch (id) {
 163         case 0x0101:
 164                 priv->chip = AR8216;
 165                 break;
 166         case 0x0301:
 167                 priv->chip = AR8236;
 168                 break;
 169         case 0x1000:
 170         case 0x1001:
 171                 priv->chip = AR8316;
 172                 break;
 173         default:
 174                 printk(KERN_DEBUG
 175                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 176                         (int)(id >> AR8216_CTRL_VERSION_S),
 177                         (int)(id & AR8216_CTRL_REVISION),
 178                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 179                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 180
 181                 return -ENODEV;
 182         }
 183
 184         return 0;
 185 }
 186
 187 static void
 188 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 189                       struct switch_port_link *link)
 190 {
 191         u32 status;
 192         u32 speed;
 193
 194         memset(link, '\0', sizeof(*link));
 195
 196         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 197
 198         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 199         if (link->aneg) {
 200                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 201                 if (!link->link)
 202                         return;
 203         } else {
 204                 link->link = true;
 205         }
 206
 207         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 208         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 209         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 210
 211         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 212                  AR8216_PORT_STATUS_SPEED_S;
 213
 214         switch (speed) {
 215         case AR8216_PORT_SPEED_10M:
 216                 link->speed = SWITCH_PORT_SPEED_10;
 217                 break;
 218         case AR8216_PORT_SPEED_100M:
 219                 link->speed = SWITCH_PORT_SPEED_100;
 220                 break;
 221         case AR8216_PORT_SPEED_1000M:
 222                 link->speed = SWITCH_PORT_SPEED_1000;
 223                 break;
 224         default:
 225                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 226                 break;
 227         }
 228 }
 229
 230 static int
 231 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 232                 struct switch_val *val)
 233 {
 234         struct ar8216_priv *priv = to_ar8216(dev);
 235         priv->vlan = !!val->value.i;
 236         return 0;
 237 }
 238
 239 static int
 240 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 241                 struct switch_val *val)
 242 {
 243         struct ar8216_priv *priv = to_ar8216(dev);
 244         val->value.i = priv->vlan;
 245         return 0;
 246 }
 247
 248
 249 static int
 250 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 251 {
 252         struct ar8216_priv *priv = to_ar8216(dev);
 253
 254         /* make sure no invalid PVIDs get set */
 255
 256         if (vlan >= dev->vlans)
 257                 return -EINVAL;
 258
 259         priv->pvid[port] = vlan;
 260         return 0;
 261 }
 262
 263 static int
 264 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 265 {
 266         struct ar8216_priv *priv = to_ar8216(dev);
 267         *vlan = priv->pvid[port];
 268         return 0;
 269 }
 270
 271 static int
 272 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 273                struct switch_val *val)
 274 {
 275         struct ar8216_priv *priv = to_ar8216(dev);
 276         priv->vlan_id[val->port_vlan] = val->value.i;
 277         return 0;
 278 }
 279
 280 static int
 281 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 282                struct switch_val *val)
 283 {
 284         struct ar8216_priv *priv = to_ar8216(dev);
 285         val->value.i = priv->vlan_id[val->port_vlan];
 286         return 0;
 287 }
 288
 289 static int
 290 ar8216_get_port_link(struct switch_dev *dev, int port,
 291                      struct switch_port_link *link)
 292 {
 293         struct ar8216_priv *priv = to_ar8216(dev);
 294
 295         ar8216_read_port_link(priv, port, link);
 296         return 0;
 297 }
 298
 299 static int
 300 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 301 {
 302         struct ar8216_priv *priv = dev->phy_ptr;
 303         unsigned char *buf;
 304
 305         if (unlikely(!priv))
 306                 goto error;
 307
 308         if (!priv->vlan)
 309                 goto send;
 310
 311         if (unlikely(skb_headroom(skb) < 2)) {
 312                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 313                         goto error;
 314         }
 315
 316         buf = skb_push(skb, 2);
 317         buf[0] = 0x10;
 318         buf[1] = 0x80;
 319
 320 send:
 321         return priv->ndo_old->ndo_start_xmit(skb, dev);
 322
 323 error:
 324         dev_kfree_skb_any(skb);
 325         return 0;
 326 }
 327
 328 static int
 329 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 330 {
 331         struct ar8216_priv *priv;
 332         struct net_device *dev;
 333         unsigned char *buf;
 334         int port, vlan;
 335
 336         dev = skb->dev;
 337         if (!dev)
 338                 goto error;
 339
 340         priv = dev->phy_ptr;
 341         if (!priv)
 342                 goto error;
 343
 344         /* don't strip the header if vlan mode is disabled */
 345         if (!priv->vlan)
 346                 goto recv;
 347
 348         /* strip header, get vlan id */
 349         buf = skb->data;
 350         skb_pull(skb, 2);
 351
 352         /* check for vlan header presence */
 353         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 354                 goto recv;
 355
 356         port = buf[0] & 0xf;
 357
 358         /* no need to fix up packets coming from a tagged source */
 359         if (priv->vlan_tagged & (1 << port))
 360                 goto recv;
 361
 362         /* lookup port vid from local table, the switch passes an invalid vlan id */
 363         vlan = priv->vlan_id[priv->pvid[port]];
 364
 365         buf[14 + 2] &= 0xf0;
 366         buf[14 + 2] |= vlan >> 8;
 367         buf[15 + 2] = vlan & 0xff;
 368
 369 recv:
 370         skb->protocol = eth_type_trans(skb, skb->dev);
 371
 372         if (napi)
 373                 return netif_receive_skb(skb);
 374         else
 375                 return netif_rx(skb);
 376
 377 error:
 378         /* no vlan? eat the packet! */
 379         dev_kfree_skb_any(skb);
 380         return NET_RX_DROP;
 381 }
 382
 383 static int
 384 ar8216_netif_rx(struct sk_buff *skb)
 385 {
 386         return ar8216_mangle_rx(skb, 0);
 387 }
 388
 389 static int
 390 ar8216_netif_receive_skb(struct sk_buff *skb)
 391 {
 392         return ar8216_mangle_rx(skb, 1);
 393 }
 394
 395
 396 static struct switch_attr ar8216_globals[] = {
 397         {
 398                 .type = SWITCH_TYPE_INT,
 399                 .name = "enable_vlan",
 400                 .description = "Enable VLAN mode",
 401                 .set = ar8216_set_vlan,
 402                 .get = ar8216_get_vlan,
 403                 .max = 1
 404         },
 405 };
 406
 407 static struct switch_attr ar8216_port[] = {
 408 };
 409
 410 static struct switch_attr ar8216_vlan[] = {
 411         {
 412                 .type = SWITCH_TYPE_INT,
 413                 .name = "vid",
 414                 .description = "VLAN ID (0-4094)",
 415                 .set = ar8216_set_vid,
 416                 .get = ar8216_get_vid,
 417                 .max = 4094,
 418         },
 419 };
 420
 421
 422 static int
 423 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 424 {
 425         struct ar8216_priv *priv = to_ar8216(dev);
 426         u8 ports = priv->vlan_table[val->port_vlan];
 427         int i;
 428
 429         val->len = 0;
 430         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 431                 struct switch_port *p;
 432
 433                 if (!(ports & (1 << i)))
 434                         continue;
 435
 436                 p = &val->value.ports[val->len++];
 437                 p->id = i;
 438                 if (priv->vlan_tagged & (1 << i))
 439                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 440                 else
 441                         p->flags = 0;
 442         }
 443         return 0;
 444 }
 445
 446 static int
 447 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 448 {
 449         struct ar8216_priv *priv = to_ar8216(dev);
 450         u8 *vt = &priv->vlan_table[val->port_vlan];
 451         int i, j;
 452
 453         *vt = 0;
 454         for (i = 0; i < val->len; i++) {
 455                 struct switch_port *p = &val->value.ports[i];
 456
 457                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
 458                         priv->vlan_tagged |= (1 << p->id);
 459                 } else {
 460                         priv->vlan_tagged &= ~(1 << p->id);
 461                         priv->pvid[p->id] = val->port_vlan;
 462
 463                         /* make sure that an untagged port does not
 464                          * appear in other vlans */
 465                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 466                                 if (j == val->port_vlan)
 467                                         continue;
 468                                 priv->vlan_table[j] &= ~(1 << p->id);
 469                         }
 470                 }
 471
 472                 *vt |= 1 << p->id;
 473         }
 474         return 0;
 475 }
 476
 477 static int
 478 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 479 {
 480         int timeout = 20;
 481         u32 t = 0;
 482
 483         while (1) {
 484                 t = priv->read(priv, reg);
 485                 if ((t & mask) == val)
 486                         return 0;
 487
 488                 if (timeout-- <= 0)
 489                         break;
 490
 491                 udelay(10);
 492         }
 493
 494         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 495                (unsigned int) reg, t, mask, val);
 496         return -ETIMEDOUT;
 497 }
 498
 499 static void
 500 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 501 {
 502         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 503                 return;
 504         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 505                 val &= AR8216_VTUDATA_MEMBER;
 506                 val |= AR8216_VTUDATA_VALID;
 507                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 508         }
 509         op |= AR8216_VTU_ACTIVE;
 510         priv->write(priv, AR8216_REG_VTU, op);
 511 }
 512
 513 static void
 514 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 515                   u32 members, u32 pvid)
 516 {
 517         u32 header;
 518
 519         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
 520                 header = AR8216_PORT_CTRL_HEADER;
 521         else
 522                 header = 0;
 523
 524         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 525                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 526                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 527                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 528                    AR8216_PORT_CTRL_LEARN | header |
 529                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 530                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 531
 532         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 533                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 534                    AR8216_PORT_VLAN_DEFAULT_ID,
 535                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 536                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 537                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 538 }
 539
 540 static void
 541 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 542                   u32 members, u32 pvid)
 543 {
 544         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 545                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 546                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 547                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 548                    AR8216_PORT_CTRL_LEARN |
 549                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 550                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 551
 552         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 553                    AR8236_PORT_VLAN_DEFAULT_ID,
 554                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 555
 556         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 557                    AR8236_PORT_VLAN2_VLAN_MODE |
 558                    AR8236_PORT_VLAN2_MEMBER,
 559                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 560                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 561 }
 562
 563 static int
 564 ar8216_hw_apply(struct switch_dev *dev)
 565 {
 566         struct ar8216_priv *priv = to_ar8216(dev);
 567         u8 portmask[AR8216_NUM_PORTS];
 568         int i, j;
 569
 570         mutex_lock(&priv->reg_mutex);
 571         /* flush all vlan translation unit entries */
 572         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 573
 574         memset(portmask, 0, sizeof(portmask));
 575         if (!priv->init) {
 576                 /* calculate the port destination masks and load vlans
 577                  * into the vlan translation unit */
 578                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 579                         u8 vp = priv->vlan_table[j];
 580
 581                         if (!vp)
 582                                 continue;
 583
 584                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 585                                 u8 mask = (1 << i);
 586                                 if (vp & mask)
 587                                         portmask[i] |= vp & ~mask;
 588                         }
 589
 590                         ar8216_vtu_op(priv,
 591                                 AR8216_VTU_OP_LOAD |
 592                                 (priv->vlan_id[j] << AR8216_VTU_VID_S),
 593                                 priv->vlan_table[j]);
 594                 }
 595         } else {
 596                 /* vlan disabled:
 597                  * isolate all ports, but connect them to the cpu port */
 598                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 599                         if (i == AR8216_PORT_CPU)
 600                                 continue;
 601
 602                         portmask[i] = 1 << AR8216_PORT_CPU;
 603                         portmask[AR8216_PORT_CPU] |= (1 << i);
 604                 }
 605         }
 606
 607         /* update the port destination mask registers and tag settings */
 608         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 609                 int egress, ingress;
 610                 int pvid;
 611
 612                 if (priv->vlan)
 613                         pvid = priv->vlan_id[priv->pvid[i]];
 614                 else
 615                         pvid = i;
 616
 617                 if (priv->vlan) {
 618                         if (priv->vlan_tagged & (1 << i))
 619                                 egress = AR8216_OUT_ADD_VLAN;
 620                         else
 621                                 egress = AR8216_OUT_STRIP_VLAN;
 622                 } else {
 623                         egress = AR8216_OUT_KEEP;
 624                 }
 625
 626                 if (priv->vlan)
 627                         ingress = AR8216_IN_SECURE;
 628                 else
 629                         ingress = AR8216_IN_PORT_ONLY;
 630
 631                 if (priv->chip == AR8236)
 632                         ar8236_setup_port(priv, i, egress, ingress, portmask[i],
 633                                           pvid);
 634                 else
 635                         ar8216_setup_port(priv, i, egress, ingress, portmask[i],
 636                                           pvid);
 637         }
 638         mutex_unlock(&priv->reg_mutex);
 639         return 0;
 640 }
 641
 642 static int
 643 ar8216_hw_init(struct ar8216_priv *priv)
 644 {
 645         /* XXX: undocumented magic from atheros, required! */
 646         priv->write(priv, 0x38, 0xc000050e);
 647
 648         ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 649                    AR8216_GCTRL_MTU, 1518 + 8 + 2);
 650         return 0;
 651 }
 652
 653 static int
 654 ar8236_hw_init(struct ar8216_priv *priv)
 655 {
 656         int i;
 657         struct mii_bus *bus;
 658
 659         if (priv->initialized)
 660                 return 0;
 661
 662         /* Initialize the PHYs */
 663         bus = priv->phy->bus;
 664         for (i = 0; i < 5; i++) {
 665                 mdiobus_write(bus, i, MII_ADVERTISE,
 666                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 667                               ADVERTISE_PAUSE_ASYM);
 668                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 669         }
 670         msleep(1000);
 671
 672         /* enable jumbo frames */
 673         ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 674                    AR8316_GCTRL_MTU, 9018 + 8 + 2);
 675
 676         priv->initialized = true;
 677         return 0;
 678 }
 679
 680 static int
 681 ar8316_hw_init(struct ar8216_priv *priv)
 682 {
 683         int i;
 684         u32 val, newval;
 685         struct mii_bus *bus;
 686
 687         val = priv->read(priv, 0x8);
 688
 689         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 690                 if (priv->port4_phy) {
 691                         /* value taken from Ubiquiti RouterStation Pro */
 692                         newval = 0x81461bea;
 693                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 694                 } else {
 695                         newval = 0x01261be2;
 696                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 697                 }
 698         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 699                 /* value taken from AVM Fritz!Box 7390 sources */
 700                 newval = 0x010e5b71;
 701         } else {
 702                 /* no known value for phy interface */
 703                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 704                         priv->phy->interface);
 705                 return -EINVAL;
 706         }
 707
 708         if (val == newval)
 709                 goto out;
 710
 711         priv->write(priv, 0x8, newval);
 712
 713         /* standard atheros magic */
 714         priv->write(priv, 0x38, 0xc000050e);
 715
 716         /* Initialize the ports */
 717         bus = priv->phy->bus;
 718         for (i = 0; i < 5; i++) {
 719                 if ((i == 4) && priv->port4_phy &&
 720                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 721                         /* work around for phy4 rgmii mode */
 722                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
 723                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
 724                         /* rx delay */
 725                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
 726                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
 727                         /* tx delay */
 728                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
 729                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
 730                         msleep(1000);
 731                 }
 732
 733                 /* initialize the port itself */
 734                 mdiobus_write(bus, i, MII_ADVERTISE,
 735                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 736                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 737                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 738                 msleep(1000);
 739         }
 740
 741         /* enable jumbo frames */
 742         ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 743                    AR8316_GCTRL_MTU, 9018 + 8 + 2);
 744
 745         /* enable cpu port to receive multicast and broadcast frames */
 746         priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 747
 748 out:
 749         priv->initialized = true;
 750         return 0;
 751 }
 752
 753 static void
 754 ar8216_init_port(struct ar8216_priv *priv, int port)
 755 {
 756         /* Enable port learning and tx */
 757         priv->write(priv, AR8216_REG_PORT_CTRL(port),
 758                 AR8216_PORT_CTRL_LEARN |
 759                 (4 << AR8216_PORT_CTRL_STATE_S));
 760
 761         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
 762
 763         if (port == AR8216_PORT_CPU) {
 764                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 765                         AR8216_PORT_STATUS_LINK_UP |
 766                         ((priv->chip == AR8316) ?
 767                                 AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
 768                         AR8216_PORT_STATUS_TXMAC |
 769                         AR8216_PORT_STATUS_RXMAC |
 770                         ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 771                         ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 772                         AR8216_PORT_STATUS_DUPLEX);
 773         } else {
 774                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 775                         AR8216_PORT_STATUS_LINK_AUTO);
 776         }
 777 }
 778
 779 static int
 780 ar8216_reset_switch(struct switch_dev *dev)
 781 {
 782         struct ar8216_priv *priv = to_ar8216(dev);
 783         int i;
 784
 785         mutex_lock(&priv->reg_mutex);
 786         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 787                 offsetof(struct ar8216_priv, vlan));
 788
 789         for (i = 0; i < AR8X16_MAX_VLANS; i++)
 790                 priv->vlan_id[i] = i;
 791
 792         /* Configure all ports */
 793         for (i = 0; i < AR8216_NUM_PORTS; i++)
 794                 ar8216_init_port(priv, i);
 795
 796         mutex_unlock(&priv->reg_mutex);
 797         return ar8216_hw_apply(dev);
 798 }
 799
 800
 801 static const struct switch_dev_ops ar8216_ops = {
 802         .attr_global = {
 803                 .attr = ar8216_globals,
 804                 .n_attr = ARRAY_SIZE(ar8216_globals),
 805         },
 806         .attr_port = {
 807                 .attr = ar8216_port,
 808                 .n_attr = ARRAY_SIZE(ar8216_port),
 809         },
 810         .attr_vlan = {
 811                 .attr = ar8216_vlan,
 812                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 813         },
 814         .get_port_pvid = ar8216_get_pvid,
 815         .set_port_pvid = ar8216_set_pvid,
 816         .get_vlan_ports = ar8216_get_ports,
 817         .set_vlan_ports = ar8216_set_ports,
 818         .apply_config = ar8216_hw_apply,
 819         .reset_switch = ar8216_reset_switch,
 820         .get_port_link = ar8216_get_port_link,
 821 };
 822
 823 static int
 824 ar8216_config_init(struct phy_device *pdev)
 825 {
 826         struct ar8216_priv *priv = pdev->priv;
 827         struct net_device *dev = pdev->attached_dev;
 828         struct switch_dev *swdev;
 829         int ret;
 830
 831         if (!priv) {
 832                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 833                 if (priv == NULL)
 834                         return -ENOMEM;
 835         }
 836
 837         priv->phy = pdev;
 838
 839         ret = ar8216_id_chip(priv);
 840         if (ret)
 841                 goto err_free_priv;
 842
 843         if (pdev->addr != 0) {
 844                 if (priv->chip == AR8316) {
 845                         pdev->supported |= SUPPORTED_1000baseT_Full;
 846                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 847
 848                         /* check if we're attaching to the switch twice */
 849                         pdev = pdev->bus->phy_map[0];
 850                         if (!pdev) {
 851                                 kfree(priv);
 852                                 return 0;
 853                         }
 854
 855                         /* switch device has not been initialized, reuse priv */
 856                         if (!pdev->priv) {
 857                                 priv->port4_phy = true;
 858                                 pdev->priv = priv;
 859                                 return 0;
 860                         }
 861
 862                         kfree(priv);
 863
 864                         /* switch device has been initialized, reinit */
 865                         priv = pdev->priv;
 866                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 867                         priv->initialized = false;
 868                         priv->port4_phy = true;
 869                         ar8316_hw_init(priv);
 870                         return 0;
 871                 }
 872
 873                 kfree(priv);
 874                 return 0;
 875         }
 876
 877         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 878                 pdev->attached_dev->name, priv->chip);
 879
 880         pdev->supported = priv->chip == AR8316 ?
 881                 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
 882         pdev->advertising = pdev->supported;
 883
 884         mutex_init(&priv->reg_mutex);
 885         priv->read = ar8216_mii_read;
 886         priv->write = ar8216_mii_write;
 887
 888         pdev->priv = priv;
 889
 890         swdev = &priv->dev;
 891         swdev->cpu_port = AR8216_PORT_CPU;
 892         swdev->ops = &ar8216_ops;
 893         swdev->ports = AR8216_NUM_PORTS;
 894
 895         if (priv->chip == AR8316) {
 896                 swdev->name = "Atheros AR8316";
 897                 swdev->vlans = AR8X16_MAX_VLANS;
 898
 899                 if (priv->port4_phy) {
 900                         /* port 5 connected to the other mac, therefore unusable */
 901                         swdev->ports = (AR8216_NUM_PORTS - 1);
 902                 }
 903         } else if (priv->chip == AR8236) {
 904                 swdev->name = "Atheros AR8236";
 905                 swdev->vlans = AR8216_NUM_VLANS;
 906                 swdev->ports = AR8216_NUM_PORTS;
 907         } else {
 908                 swdev->name = "Atheros AR8216";
 909                 swdev->vlans = AR8216_NUM_VLANS;
 910         }
 911
 912         ret = register_switch(&priv->dev, pdev->attached_dev);
 913         if (ret)
 914                 goto err_free_priv;
 915
 916         priv->init = true;
 917
 918         ret = 0;
 919         if (priv->chip == AR8216)
 920                 ret = ar8216_hw_init(priv);
 921         else if (priv->chip == AR8236)
 922                 ret = ar8236_hw_init(priv);
 923         else if (priv->chip == AR8316)
 924                 ret = ar8316_hw_init(priv);
 925
 926         if (ret)
 927                 goto err_free_priv;
 928
 929         ret = ar8216_reset_switch(&priv->dev);
 930         if (ret)
 931                 goto err_free_priv;
 932
 933         dev->phy_ptr = priv;
 934
 935         /* VID fixup only needed on ar8216 */
 936         if (pdev->addr == 0 && priv->chip == AR8216) {
 937                 pdev->pkt_align = 2;
 938                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
 939                 pdev->netif_rx = ar8216_netif_rx;
 940                 priv->ndo_old = dev->netdev_ops;
 941                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
 942                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
 943                 dev->netdev_ops = &priv->ndo;
 944         }
 945
 946         priv->init = false;
 947
 948         return 0;
 949
 950 err_free_priv:
 951         kfree(priv);
 952         return ret;
 953 }
 954
 955 static int
 956 ar8216_read_status(struct phy_device *phydev)
 957 {
 958         struct ar8216_priv *priv = phydev->priv;
 959         struct switch_port_link link;
 960         int ret;
 961
 962         if (phydev->addr != 0)
 963                 return genphy_read_status(phydev);
 964
 965         ar8216_read_port_link(priv, phydev->addr, &link);
 966         phydev->link = !!link.link;
 967         if (!phydev->link)
 968                 return 0;
 969
 970         switch (link.speed) {
 971         case SWITCH_PORT_SPEED_10:
 972                 phydev->speed = SPEED_10;
 973                 break;
 974         case SWITCH_PORT_SPEED_100:
 975                 phydev->speed = SPEED_100;
 976                 break;
 977         case SWITCH_PORT_SPEED_1000:
 978                 phydev->speed = SPEED_1000;
 979                 break;
 980         default:
 981                 phydev->speed = 0;
 982         }
 983         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
 984
 985         /* flush the address translation unit */
 986         mutex_lock(&priv->reg_mutex);
 987         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
 988         if (!ret)
 989                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
 990         mutex_unlock(&priv->reg_mutex);
 991
 992         phydev->state = PHY_RUNNING;
 993         netif_carrier_on(phydev->attached_dev);
 994         phydev->adjust_link(phydev->attached_dev);
 995
 996         return ret;
 997 }
 998
 999 static int
1000 ar8216_config_aneg(struct phy_device *phydev)
1001 {
1002         if (phydev->addr == 0)
1003                 return 0;
1004
1005         return genphy_config_aneg(phydev);
1006 }
1007
1008 static int
1009 ar8216_probe(struct phy_device *pdev)
1010 {
1011         struct ar8216_priv priv;
1012
1013         priv.phy = pdev;
1014         return ar8216_id_chip(&priv);
1015 }
1016
1017 static void
1018 ar8216_remove(struct phy_device *pdev)
1019 {
1020         struct ar8216_priv *priv = pdev->priv;
1021         struct net_device *dev = pdev->attached_dev;
1022
1023         if (!priv)
1024                 return;
1025
1026         if (priv->ndo_old && dev)
1027                 dev->netdev_ops = priv->ndo_old;
1028         if (pdev->addr == 0)
1029                 unregister_switch(&priv->dev);
1030         kfree(priv);
1031 }
1032
1033 static struct phy_driver ar8216_driver = {
1034         .phy_id         = 0x004d0000,
1035         .name           = "Atheros AR8216/AR8236/AR8316",
1036         .phy_id_mask    = 0xffff0000,
1037         .features       = PHY_BASIC_FEATURES,
1038         .probe          = ar8216_probe,
1039         .remove         = ar8216_remove,
1040         .config_init    = &ar8216_config_init,
1041         .config_aneg    = &ar8216_config_aneg,
1042         .read_status    = &ar8216_read_status,
1043         .driver         = { .owner = THIS_MODULE },
1044 };
1045
1046 int __init
1047 ar8216_init(void)
1048 {
1049         return phy_driver_register(&ar8216_driver);
1050 }
1051
1052 void __exit
1053 ar8216_exit(void)
1054 {
1055         phy_driver_unregister(&ar8216_driver);
1056 }
1057
1058 module_init(ar8216_init);
1059 module_exit(ar8216_exit);
1060 MODULE_LICENSE("GPL");
1061