[ar71xx] register eth1 device on the AP83 board
[openwrt.git] / target / linux / ppc40x / patches / 005-magicboxv1.patch
1 diff -Nur a/arch/powerpc/boot/cuboot-magicboxv1.c b/arch/powerpc/boot/cuboot-magicboxv1.c
2 --- a/arch/powerpc/boot/cuboot-magicboxv1.c 1970-01-01 01:00:00.000000000 +0100
3 +++ b/arch/powerpc/boot/cuboot-magicboxv1.c 2008-11-23 20:13:57.000000000 +0100
4 @@ -0,0 +1,40 @@
5 +/*
6 + * Old U-boot compatibility for Magicbox v1
7 + *
8 + * Author: Imre Kaloz <kaloz@openwrt.org>
9 + *
10 + * This program is free software; you can redistribute it and/or modify it
11 + * under the terms of the GNU General Public License version 2 as published
12 + * by the Free Software Foundation.
13 + */
14 +
15 +#include "ops.h"
16 +#include "io.h"
17 +#include "dcr.h"
18 +#include "stdio.h"
19 +#include "4xx.h"
20 +#include "44x.h"
21 +#include "cuboot.h"
22 +
23 +#define TARGET_4xx
24 +#define TARGET_405EP
25 +#include "ppcboot.h"
26 +
27 +static bd_t bd;
28 +
29 +static void magicboxv1_fixups(void)
30 +{
31 + ibm405ep_fixup_clocks(25000000);
32 + ibm4xx_sdram_fixup_memsize();
33 + dt_fixup_mac_addresses(&bd.bi_enetaddr);
34 +}
35 +
36 +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
37 + unsigned long r6, unsigned long r7)
38 +{
39 + CUBOOT_INIT();
40 + platform_ops.fixups = magicboxv1_fixups;
41 + platform_ops.exit = ibm40x_dbcr_reset;
42 + fdt_init(_dtb_start);
43 + serial_console_init();
44 +}
45 diff -Nur a/arch/powerpc/boot/dts/magicboxv1.dts b/arch/powerpc/boot/dts/magicboxv1.dts
46 --- a/arch/powerpc/boot/dts/magicboxv1.dts 1970-01-01 01:00:00.000000000 +0100
47 +++ b/arch/powerpc/boot/dts/magicboxv1.dts 2008-11-26 09:14:46.000000000 +0100
48 @@ -0,0 +1,217 @@
49 +/*
50 + * Device Tree Source for Magicbox v1
51 + *
52 + * Copyright 2008 Imre Kaloz <kaloz@openwrt.org>
53 + *
54 + * Based on walnut.dts
55 + *
56 + * This file is licensed under the terms of the GNU General Public
57 + * License version 2. This program is licensed "as is" without
58 + * any warranty of any kind, whether express or implied.
59 + */
60 +
61 +/dts-v1/;
62 +
63 +/ {
64 + #address-cells = <1>;
65 + #size-cells = <1>;
66 + model = "magicboxv1";
67 + compatible = "magicboxv1";
68 + dcr-parent = <&{/cpus/cpu@0}>;
69 +
70 + aliases {
71 + ethernet0 = &EMAC;
72 + serial0 = &UART;
73 + };
74 +
75 + cpus {
76 + #address-cells = <1>;
77 + #size-cells = <0>;
78 +
79 + cpu@0 {
80 + device_type = "cpu";
81 + model = "PowerPC,405EP";
82 + reg = <0x00000000>;
83 + clock-frequency = <0xbebc200>; /* Filled in by zImage */
84 + timebase-frequency = <0>; /* Filled in by zImage */
85 + i-cache-line-size = <20>;
86 + d-cache-line-size = <20>;
87 + i-cache-size = <4000>;
88 + d-cache-size = <4000>;
89 + dcr-controller;
90 + dcr-access-method = "native";
91 + };
92 + };
93 +
94 + memory {
95 + device_type = "memory";
96 + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
97 + };
98 +
99 + UIC0: interrupt-controller {
100 + compatible = "ibm,uic";
101 + interrupt-controller;
102 + cell-index = <0>;
103 + dcr-reg = <0x0c0 0x009>;
104 + #address-cells = <0>;
105 + #size-cells = <0>;
106 + #interrupt-cells = <2>;
107 + };
108 +
109 + plb {
110 + compatible = "ibm,plb3";
111 + #address-cells = <1>;
112 + #size-cells = <1>;
113 + ranges;
114 + clock-frequency = <0>; /* Filled in by zImage */
115 +
116 + SDRAM0: memory-controller {
117 + compatible = "ibm,sdram-405ep";
118 + dcr-reg = <0x010 0x002>;
119 + };
120 +
121 + MAL: mcmal {
122 + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
123 + dcr-reg = <0x180 0x062>;
124 + num-tx-chans = <4>;
125 + num-rx-chans = <2>;
126 + interrupt-parent = <&UIC0>;
127 + interrupts = <
128 + 0xb 0x4 /* TXEOB */
129 + 0xc 0x4 /* RXEOB */
130 + 0xa 0x4 /* SERR */
131 + 0xd 0x4 /* TXDE */
132 + 0xe 0x4 /* RXDE */>;
133 + };
134 +
135 + POB0: opb {
136 + compatible = "ibm,opb-405ep", "ibm,opb";
137 + #address-cells = <1>;
138 + #size-cells = <1>;
139 + ranges = <0xef600000 0xef600000 0x00a00000>;
140 + dcr-reg = <0x0a0 0x005>;
141 + clock-frequency = <0>; /* Filled in by zImage */
142 +
143 + UART: serial@ef600300 {
144 + device_type = "serial";
145 + compatible = "ns16550";
146 + reg = <0xef600300 0x00000008>;
147 + virtual-reg = <0xef600300>;
148 + clock-frequency = <0>; /* Filled in by zImage */
149 + current-speed = <115200>;
150 + interrupt-parent = <&UIC0>;
151 + interrupts = <0x0 0x4>;
152 + };
153 +
154 + IIC: i2c@ef600500 {
155 + compatible = "ibm,iic-405ep", "ibm,iic";
156 + reg = <0xef600500 0x00000011>;
157 + interrupt-parent = <&UIC0>;
158 + interrupts = <0x2 0x4>;
159 + };
160 +
161 + GPIO: gpio@ef600700 {
162 + compatible = "ibm,gpio-405ep";
163 + reg = <0xef600700 0x00000020>;
164 + };
165 +
166 + EMAC: ethernet@ef600800 {
167 + linux,network-index = <0x0>;
168 + device_type = "network";
169 + compatible = "ibm,emac-405ep", "ibm,emac";
170 + interrupt-parent = <&UIC0>;
171 + interrupts = <
172 + 0xf 0x4 /* Ethernet */
173 + 0x9 0x4 /* Ethernet Wake Up */>;
174 + local-mac-address = [000000000000]; /* Filled in by zImage */
175 + reg = <0xef600800 0x00000070>;
176 + mal-device = <&MAL>;
177 + mal-tx-channel = <0>;
178 + mal-rx-channel = <0>;
179 + cell-index = <0>;
180 + max-frame-size = <0x5dc>;
181 + rx-fifo-size = <0x1000>;
182 + tx-fifo-size = <0x800>;
183 + phy-mode = "mii";
184 + phy-map = <0x00000000>;
185 + };
186 +
187 + };
188 +
189 + EBC0: ebc {
190 + compatible = "ibm,ebc-405ep", "ibm,ebc";
191 + dcr-reg = <0x012 0x002>;
192 + #address-cells = <2>;
193 + #size-cells = <1>;
194 + /* The ranges property is supplied by the bootwrapper
195 + * and is based on the firmware's configuration of the
196 + * EBC bridge
197 + */
198 + clock-frequency = <0>; /* Filled in by zImage */
199 +
200 + nor_flash@ffc00000 {
201 + compatible = "cfi-flash";
202 + bank-width = <2>;
203 + reg = <0x00000000 0xffc00000 0x00400000>;
204 + #address-cells = <1>;
205 + #size-cells = <1>;
206 + partition@0 {
207 + label = "linux";
208 + reg = <0x0 0x3c0000>;
209 + };
210 + partition@100000 {
211 + label = "rootfs";
212 + reg = <0x100000 0x2c0000>;
213 + };
214 + partition@3c0000 {
215 + label = "u-boot";
216 + reg = <0x3c0000 0x30000>;
217 + read-only;
218 + };
219 + };
220 + };
221 +
222 + PCI0: pci@ec000000 {
223 + device_type = "pci";
224 + #interrupt-cells = <1>;
225 + #size-cells = <2>;
226 + #address-cells = <3>;
227 + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
228 + primary;
229 + reg = <0xeec00000 0x00000008 /* Config space access */
230 + 0xeed80000 0x00000004 /* IACK */
231 + 0xeed80000 0x00000004 /* Special cycle */
232 + 0xef480000 0x00000040>; /* Internal registers */
233 +
234 + /* Outbound ranges, one memory and one IO,
235 + * later cannot be changed. Chip supports a second
236 + * IO range but we don't use it for now
237 + */
238 + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
239 + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
240 +
241 + /* Inbound 2GB range starting at 0 */
242 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
243 +
244 + /* Magicbox v1 has all 4 IRQ pins tied together per slot */
245 + interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
246 + interrupt-map = <
247 + /* IDSEL 1 */
248 + 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
249 +
250 + /* IDSEL 2 */
251 + 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
252 +
253 + /* IDSEL 3 */
254 + 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
255 +
256 + /* IDSEL 4 */
257 + 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
258 + >;
259 + };
260 + };
261 +
262 + chosen {
263 + linux,stdout-path = "/plb/opb/serial@ef600300";
264 + };
265 +};
266 diff -Nur a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
267 --- a/arch/powerpc/boot/Makefile 2008-11-26 09:14:31.000000000 +0100
268 +++ b/arch/powerpc/boot/Makefile 2008-11-22 21:21:01.000000000 +0100
269 @@ -69,7 +69,7 @@
270 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
271 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
272 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
273 - cuboot-acadia.c
274 + cuboot-acadia.c cuboot-magicboxv1.c
275 src-boot := $(src-wlib) $(src-plat) empty.c
276
277 src-boot := $(addprefix $(obj)/, $(src-boot))
278 @@ -213,6 +213,7 @@
279 image-$(CONFIG_EP405) += dtbImage.ep405
280 image-$(CONFIG_WALNUT) += treeImage.walnut
281 image-$(CONFIG_ACADIA) += cuImage.acadia
282 +image-$(CONFIG_MAGICBOXV1) += cuImage.magicboxv1
283
284 # Board ports in arch/powerpc/platform/44x/Kconfig
285 image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
286 diff -Nur a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
287 --- a/arch/powerpc/platforms/40x/Kconfig 2008-11-26 09:14:31.000000000 +0100
288 +++ b/arch/powerpc/platforms/40x/Kconfig 2008-11-18 14:28:06.000000000 +0100
289 @@ -41,6 +41,16 @@
290 help
291 This option enables support for the AMCC PPC405EX evaluation board.
292
293 +config MAGICBOXV1
294 + bool "Magicbox v1"
295 + depends on 40x
296 + default n
297 + select PPC40x_SIMPLE
298 + select 405EP
299 + select PCI
300 + help
301 + This option enables support for the Magicbox v1 board.
302 +
303 config MAKALU
304 bool "Makalu"
305 depends on 40x
306 diff -Nur a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
307 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-11-26 09:14:31.000000000 +0100
308 +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c 2008-11-18 14:29:59.000000000 +0100
309 @@ -51,7 +51,8 @@
310 * board.c file for it rather than adding it to this list.
311 */
312 static char *board[] __initdata = {
313 - "amcc,acadia"
314 + "amcc,acadia",
315 + "magicboxv1"
316 };
317
318 static int __init ppc40x_probe(void)
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