target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/bcmsrom.h

   1 /*
   2  * Misc useful routines to access NIC local SROM/OTP .
   3  *
   4  * Copyright 2006, Broadcom Corporation
   5  * All Rights Reserved.
   6  *
   7  * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
   8  * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
   9  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
  10  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
  11  *
  12  * $Id: bcmsrom.h,v 1.1.1.13 2006/04/15 01:29:08 michael Exp $
  13  */
  14
  15 #ifndef _bcmsrom_h_
  16 #define _bcmsrom_h_
  17
  18 /* Maximum srom: 4 Kilobits == 512 bytes */
  19 #define SROM_MAX        512
  20
  21 /* SROM Rev 4: Reallocate the software part of the srom to accomodate
  22  * MIMO features. It assumes up to two PCIE functions and 440 bytes
  23  * of useable srom i.e. the useable storage in chips with OTP that
  24  * implements hardware redundancy.
  25  */
  26
  27 #define SROM4_WORDS             220
  28
  29 #define SROM4_SIGN              32
  30 #define SROM4_SIGNATURE         0x5372
  31
  32 #define SROM4_BREV              33
  33
  34 #define SROM4_BFL0              34
  35 #define SROM4_BFL1              35
  36 #define SROM4_BFL2              36
  37 #define SROM4_BFL3              37
  38
  39 #define SROM4_MACHI             38
  40 #define SROM4_MACMID            39
  41 #define SROM4_MACLO             40
  42
  43 #define SROM4_CCODE             41
  44 #define SROM4_REGREV            42
  45
  46 #define SROM4_LEDBH10           43
  47 #define SROM4_LEDBH32           44
  48
  49 #define SROM4_LEDDC             45
  50
  51 #define SROM4_AA                46
  52 #define SROM4_AA2G_MASK         0x00ff
  53 #define SROM4_AA2G_SHIFT        0
  54 #define SROM4_AA5G_MASK         0xff00
  55 #define SROM4_AA5G_SHIFT        8
  56
  57 #define SROM4_AG10              47
  58 #define SROM4_AG32              48
  59
  60 #define SROM4_TXPID2G           49
  61 #define SROM4_TXPID5G           51
  62 #define SROM4_TXPID5GL          53
  63 #define SROM4_TXPID5GH          55
  64
  65 /* Per-path fields */
  66 #define MAX_PATH                4
  67 #define SROM4_PATH0             64
  68 #define SROM4_PATH1             87
  69 #define SROM4_PATH2             110
  70 #define SROM4_PATH3             133
  71
  72 #define SROM4_2G_ITT_MAXP       0
  73 #define SROM4_2G_PA             1
  74 #define SROM4_5G_ITT_MAXP       5
  75 #define SROM4_5GLH_MAXP         6
  76 #define SROM4_5G_PA             7
  77 #define SROM4_5GL_PA            11
  78 #define SROM4_5GH_PA            15
  79
  80 /* Fields in the ITT_MAXP and 5GLH_MAXP words */
  81 #define B2G_MAXP_MASK           0xff
  82 #define B2G_ITT_SHIFT           8
  83 #define B5G_MAXP_MASK           0xff
  84 #define B5G_ITT_SHIFT           8
  85 #define B5GH_MAXP_MASK          0xff
  86 #define B5GL_MAXP_SHIFT         8
  87
  88 /* All the miriad power offsets */
  89 #define SROM4_2G_CCKPO          156
  90 #define SROM4_2G_OFDMPO         157
  91 #define SROM4_5G_OFDMPO         159
  92 #define SROM4_5GL_OFDMPO        161
  93 #define SROM4_5GH_OFDMPO        163
  94 #define SROM4_2G_MCSPO          165
  95 #define SROM4_5G_MCSPO          173
  96 #define SROM4_5GL_MCSPO         181
  97 #define SROM4_5GH_MCSPO         189
  98 #define SROM4_CCDPO             197
  99 #define SROM4_STBCPO            198
 100 #define SROM4_BW40PO            199
 101 #define SROM4_BWDUPPO           200
 102
 103 extern int srom_var_init(void *sbh, uint bus, void *curmap, osl_t *osh, char **vars, uint *count);
 104
 105 extern int srom_read(uint bus, void *curmap, osl_t *osh, uint byteoff, uint nbytes, uint16 *buf);
 106 extern int srom_write(uint bus, void *curmap, osl_t *osh, uint byteoff, uint nbytes, uint16 *buf);
 107
 108 #endif  /* _bcmsrom_h_ */