target/linux/brcm-2.4/files/arch/mips/bcm947xx/include/sbsocram.h

   1 /*
   2  * BCM47XX Sonics SiliconBackplane embedded ram core
   3  *
   4  * Copyright 2006, Broadcom Corporation
   5  * All Rights Reserved.
   6  *
   7  * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
   8  * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
   9  * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
  10  * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
  11  *
  12  * $Id: sbsocram.h,v 1.1.1.3 2006/02/27 03:43:16 honor Exp $
  13  */
  14
  15 #ifndef _SBSOCRAM_H
  16 #define _SBSOCRAM_H
  17
  18 #define SR_COREINFO             0x00
  19 #define SR_BWALLOC              0x04
  20 #define SR_BISTSTAT             0x0c
  21 #define SR_BANKINDEX            0x10
  22 #define SR_BANKSTBYCTL          0x14
  23
  24
  25 #ifndef _LANGUAGE_ASSEMBLY
  26
  27 /* Memcsocram core registers */
  28 typedef volatile struct sbsocramregs {
  29         uint32  coreinfo;
  30         uint32  bwalloc;
  31         uint32  PAD;
  32         uint32  biststat;
  33         uint32  bankidx;
  34         uint32  standbyctrl;
  35 } sbsocramregs_t;
  36
  37 #endif
  38
  39 /* Coreinfo register */
  40 #define SRCI_PT_MASK            0x30000
  41 #define SRCI_PT_SHIFT           16
  42
  43 /* In corerev 0, the memory size is 2 to the power of the
  44  * base plus 16 plus to the contents of the memsize field plus 1.
  45  */
  46 #define SRCI_MS0_MASK           0xf
  47 #define SR_MS0_BASE             16
  48
  49 /*
  50  * In corerev 1 the bank size is 2 ^ the bank size field plus 14,
  51  * the memory size is number of banks times bank size.
  52  * The same applies to rom size.
  53  */
  54 #define SRCI_ROMNB_MASK         0xf000
  55 #define SRCI_ROMNB_SHIFT        12
  56 #define SRCI_ROMBSZ_MASK        0xf00
  57 #define SRCI_ROMBSZ_SHIFT       8
  58 #define SRCI_SRNB_MASK          0xf0
  59 #define SRCI_SRNB_SHIFT         4
  60 #define SRCI_SRBSZ_MASK         0xf
  61 #define SRCI_SRBSZ_SHIFT        0
  62
  63 #define SR_BSZ_BASE             14
  64 #endif  /* _SBSOCRAM_H */