package/uboot-xburst/files/cpu/mips/nanonote_gpm940b0.h

   1 /*
   2  * JzRISC lcd controller
   3  *
   4  * xiangfu liu <xiangfu.z@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __QI_LB60_GPM940B0_H__
  23 #define __QI_LB60_GPM940B0_H__
  24
  25 #include <asm/io.h>
  26
  27 #define mdelay(n)       udelay((n)*1000)
  28
  29 #define NR_PALETTE      256
  30
  31 struct lcd_desc{
  32         unsigned int next_desc; /* LCDDAx */
  33         unsigned int databuf;   /* LCDSAx */
  34         unsigned int frame_id;  /* LCDFIDx */
  35         unsigned int cmd;       /* LCDCMDx */
  36 };
  37
  38 #define MODE_MASK               0x0f
  39 #define MODE_TFT_GEN            0x00
  40 #define MODE_TFT_SHARP          0x01
  41 #define MODE_TFT_CASIO          0x02
  42 #define MODE_TFT_SAMSUNG        0x03
  43 #define MODE_CCIR656_NONINT     0x04
  44 #define MODE_CCIR656_INT        0x05
  45 #define MODE_STN_COLOR_SINGLE   0x08
  46 #define MODE_STN_MONO_SINGLE    0x09
  47 #define MODE_STN_COLOR_DUAL     0x0a
  48 #define MODE_STN_MONO_DUAL      0x0b
  49 #define MODE_8BIT_SERIAL_TFT    0x0c
  50
  51 #define MODE_TFT_18BIT          (1<<7)
  52
  53 #define STN_DAT_PIN1    (0x00 << 4)
  54 #define STN_DAT_PIN2    (0x01 << 4)
  55 #define STN_DAT_PIN4    (0x02 << 4)
  56 #define STN_DAT_PIN8    (0x03 << 4)
  57 #define STN_DAT_PINMASK STN_DAT_PIN8
  58
  59 #define STFT_PSHI       (1 << 15)
  60 #define STFT_CLSHI      (1 << 14)
  61 #define STFT_SPLHI      (1 << 13)
  62 #define STFT_REVHI      (1 << 12)
  63
  64 #define SYNC_MASTER     (0 << 16)
  65 #define SYNC_SLAVE      (1 << 16)
  66
  67 #define DE_P            (0 << 9)
  68 #define DE_N            (1 << 9)
  69
  70 #define PCLK_P          (0 << 10)
  71 #define PCLK_N          (1 << 10)
  72
  73 #define HSYNC_P         (0 << 11)
  74 #define HSYNC_N         (1 << 11)
  75
  76 #define VSYNC_P         (0 << 8)
  77 #define VSYNC_N         (1 << 8)
  78
  79 #define DATA_NORMAL     (0 << 17)
  80 #define DATA_INVERSE    (1 << 17)
  81
  82
  83 /* Jz LCDFB supported I/O controls. */
  84 #define FBIOSETBACKLIGHT        0x4688
  85 #define FBIODISPON              0x4689
  86 #define FBIODISPOFF             0x468a
  87 #define FBIORESET               0x468b
  88 #define FBIOPRINT_REG           0x468c
  89
  90 /*
  91  * LCD panel specific definition
  92  */
  93 #define MODE    0xc9            /* 8bit serial RGB */
  94 #define SPEN    (32*2+21)       /*LCD_SPL */
  95 #define SPCK    (32*2+23)       /*LCD_CLS */
  96 #define SPDA    (32*2+22)       /*LCD_D12 */
  97 #define LCD_RET (32*3+27)
  98
  99 #define __spi_write_reg1(reg, val) \
 100 do { \
 101         unsigned char no;\
 102         unsigned short value;\
 103         unsigned char a=0;\
 104         unsigned char b=0;\
 105         a=reg;\
 106         b=val;\
 107         __gpio_set_pin(SPEN);\
 108         __gpio_set_pin(SPCK);\
 109         __gpio_clear_pin(SPDA);\
 110         __gpio_clear_pin(SPEN);\
 111         udelay(25);\
 112         value=((a<<8)|(b&0xFF));\
 113         for(no=0;no<16;no++)\
 114         {\
 115                 __gpio_clear_pin(SPCK);\
 116                 if((value&0x8000)==0x8000)\
 117                 __gpio_set_pin(SPDA);\
 118                 else\
 119                 __gpio_clear_pin(SPDA);\
 120                 udelay(25);\
 121                 __gpio_set_pin(SPCK);\
 122                 value=(value<<1); \
 123                 udelay(25);\
 124          }\
 125         __gpio_set_pin(SPEN);\
 126         udelay(100);\
 127 } while (0)
 128
 129 #define __spi_write_reg(reg, val) \
 130 do {\
 131         __spi_write_reg1((reg<<2|2), val);\
 132         udelay(100); \
 133 }while(0)
 134
 135 #define __lcd_special_pin_init() \
 136 do { \
 137         __gpio_as_output(SPEN); /* use SPDA */\
 138         __gpio_as_output(SPCK); /* use SPCK */\
 139         __gpio_as_output(SPDA); /* use SPDA */\
 140         __gpio_as_output(LCD_RET);\
 141 } while (0)
 142
 143 #define __lcd_special_on() \
 144 do { \
 145         udelay(50);\
 146         __spi_write_reg1(0x05, 0x16); \
 147         __spi_write_reg1(0x04, 0x0b); \
 148         __spi_write_reg1(0x07, 0x8d); \
 149         __spi_write_reg1(0x01, 0x95); \
 150         __spi_write_reg1(0x08, 0xc0); \
 151         __spi_write_reg1(0x03, 0x40); \
 152         __spi_write_reg1(0x06, 0x75); \
 153         __spi_write_reg1(0x13, 0x01); \
 154         __spi_write_reg1(0x05, 0x57); \
 155 } while (0)
 156
 157 #define __lcd_special_off() \
 158 do {                                    \
 159         __spi_write_reg1(0x05, 0x5e);   \
 160 } while (0)
 161
 162 #define __lcd_display_pin_init() \
 163 do { \
 164         __lcd_special_pin_init();\
 165         __gpio_as_pwm();\
 166         __lcd_set_backlight_level(8);\
 167 } while (0)
 168
 169 #define __lcd_display_on() \
 170 do { \
 171         __lcd_set_backlight_level(8); \
 172         __lcd_special_on();\
 173 } while (0)
 174
 175 #define __lcd_display_off() \
 176 do { \
 177         __lcd_set_backlight_level(0); \
 178         __lcd_special_off();\
 179 } while (0)
 180
 181 #define __lcd_set_backlight_level(n)\
 182 do { \
 183         __gpio_as_output(LCD_RET); \
 184         __gpio_set_pin(LCD_RET); \
 185 } while (0)
 186
 187 #if defined(CONFIG_SAKC)
 188 #define __lcd_close_backlight() \
 189 do { \
 190         __gpio_as_output(GPIO_PWM); \
 191         __gpio_clear_pin(GPIO_PWM); \
 192 } while (0)
 193 #endif
 194
 195 #if defined(CONFIG_SAKC)
 196 #define __lcd_display_pin_init() \
 197 do { \
 198         __cpm_start_tcu(); \
 199         __lcd_special_pin_init(); \
 200 } while (0)
 201
 202 #define __lcd_display_on() \
 203 do { \
 204         __lcd_special_on(); \
 205 } while (0)
 206
 207 #define __lcd_display_off() \
 208 do { \
 209         __lcd_special_off(); \
 210 } while (0)
 211 #else
 212 #define __lcd_display_pin_init() \
 213 do { \
 214         __cpm_start_tcu(); \
 215         __lcd_special_pin_init(); \
 216 } while (0)
 217
 218 #define __lcd_display_on() \
 219 do { \
 220         __gpio_set_pin(GPIO_DISP_OFF_N); \
 221         __lcd_special_on(); \
 222 } while (0)
 223
 224 #define __lcd_display_off() \
 225 do { \
 226         __lcd_special_off(); \
 227         __gpio_clear_pin(GPIO_DISP_OFF_N); \
 228 } while (0)
 229 #endif
 230
 231 #endif /* __QI_LB60_GPM940B0_H__ */