atheros: fix ath5k support on ar2315/2317
[openwrt.git] / target / linux / etrax / patches-2.6.32 / 201-flashsize.patch
1 --- a/arch/cris/arch-v10/drivers/axisflashmap.c
2 +++ b/arch/cris/arch-v10/drivers/axisflashmap.c
3 @@ -113,7 +113,7 @@ static struct map_info map_cse1 = {
4
5 /* If no partition-table was found, we use this default-set. */
6 #define MAX_PARTITIONS 7
7 -#define NUM_DEFAULT_PARTITIONS 3
8 +#define NUM_DEFAULT_PARTITIONS 2
9
10 /*
11 * Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
12 @@ -122,19 +122,14 @@ static struct map_info map_cse1 = {
13 */
14 static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
15 {
16 - .name = "boot firmware",
17 - .size = CONFIG_ETRAX_PTABLE_SECTOR,
18 - .offset = 0
19 - },
20 - {
21 .name = "kernel",
22 - .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
23 - .offset = CONFIG_ETRAX_PTABLE_SECTOR
24 + .size = 0x00,
25 + .offset = 0
26 },
27 {
28 - .name = "filesystem",
29 - .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
30 - .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
31 + .name = "rootfs",
32 + .size = 0x200000,
33 + .offset = 0x200000
34 }
35 };
36
37 @@ -281,6 +276,11 @@ static int __init init_axis_flash(void)
38 struct partitiontable_entry *ptable;
39 int use_default_ptable = 1; /* Until proven otherwise. */
40 const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
41 + unsigned int kernel_part_size = 0;
42 + unsigned char *flash_mem = (unsigned char*)(FLASH_CACHED_ADDR);
43 + unsigned int flash_scan_count = 0;
44 + const char *part_magic = "ACME_PART_MAGIC";
45 + unsigned int magic_len = strlen(part_magic);
46
47 if (!(mymtd = flash_probe())) {
48 /* There's no reason to use this module if no flash chip can
49 @@ -293,6 +293,31 @@ static int __init init_axis_flash(void)
50 axisflash_mtd = mymtd;
51 }
52
53 + /* scan flash to findout where out partition starts */
54 +
55 + printk(KERN_INFO "Scanning flash for end of kernel magic\n");
56 + for(flash_scan_count = 0; flash_scan_count < 100000; flash_scan_count++) {
57 + if(strncmp(&flash_mem[flash_scan_count], part_magic, magic_len - 1) == 0) {
58 + kernel_part_size = flash_mem[flash_scan_count + magic_len ];
59 + kernel_part_size <<= 8;
60 + kernel_part_size += flash_mem[flash_scan_count + magic_len + 2];
61 + kernel_part_size <<= 8;
62 + kernel_part_size += flash_mem[flash_scan_count + magic_len + 1];
63 + kernel_part_size <<= 8;
64 + kernel_part_size += flash_mem[flash_scan_count + magic_len + 3];
65 + printk(KERN_INFO "Kernel ends at 0x%.08X\n", kernel_part_size);
66 + flash_scan_count = 1100000;
67 + }
68 + }
69 +
70 +
71 + if(kernel_part_size){
72 + kernel_part_size = (kernel_part_size & 0xffff0000);
73 + axis_default_partitions[0].size = kernel_part_size;
74 + axis_default_partitions[1].size = mymtd->size - axis_default_partitions[0].size;
75 + axis_default_partitions[1].offset = axis_default_partitions[0].size;
76 + }
77 +
78 if (mymtd) {
79 mymtd->owner = THIS_MODULE;
80 ptable_head = (struct partitiontable_head *)(FLASH_CACHED_ADDR +
81 --- a/arch/cris/arch-v10/lib/hw_settings.S
82 +++ b/arch/cris/arch-v10/lib/hw_settings.S
83 @@ -60,3 +60,5 @@
84 .dword R_PORT_PB_SET
85 .dword PB_SET_VALUE
86 .dword 0 ; No more register values
87 + .ascii "ACME_PART_MAGIC"
88 + .dword 0xdeadc0de
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