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[openwrt.git] / target / linux / danube / files / drivers / char / danube_gpio.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) 2005 infineon
17 * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
18 *
19 */
20
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/errno.h>
24 #include <linux/proc_fs.h>
25 #include <linux/init.h>
26 #include <linux/ioctl.h>
27 #include <asm/semaphore.h>
28 #include <asm/uaccess.h>
29 #include <asm/danube/danube.h>
30 #include <asm/danube/danube_ioctl.h>
31
32
33 #define DANUBE_PORT_OUT_REG 0x00000010
34 #define DANUBE_PORT_IN_REG 0x00000014
35 #define DANUBE_PORT_DIR_REG 0x00000018
36 #define DANUBE_PORT_ALTSEL0_REG 0x0000001C
37 #define DANUBE_PORT_ALTSEL1_REG 0x00000020
38 #define DANUBE_PORT_OD_REG 0x00000024
39 #define DANUBE_PORT_STOFF_REG 0x00000028
40 #define DANUBE_PORT_PUDSEL_REG 0x0000002C
41 #define DANUBE_PORT_PUDEN_REG 0x00000030
42
43 #define PORT_MODULE_ID 0xff
44
45 #define PORT_WRITE_REG(reg, value) \
46 *((volatile u32*)(reg)) = (u32)value;
47
48 #define PORT_READ_REG(reg, value) \
49 value = (u32)*((volatile u32*)(reg));
50
51 #define PORT_IOC_CALL(ret,port,pin,func) \
52 ret=danube_port_reserve_pin(port,pin,PORT_MODULE_ID); \
53 if (ret == 0) ret=func(port,pin,PORT_MODULE_ID); \
54 if (ret == 0) ret=danube_port_free_pin(port,pin,PORT_MODULE_ID);
55
56
57 #define MAX_PORTS 2 // Number of ports in system
58 #define PINS_PER_PORT 16 // Number of available pins per port
59
60 static int port_major = 0;
61 static int danube_port_pin_usage[MAX_PORTS][PINS_PER_PORT]; // Map for pin usage
62 static u32 danube_port_bases[MAX_PORTS]
63 = { DANUBE_GPIO_BASE_ADDR, DANUBE_GPIO_P0_PUDEN };
64
65 static struct semaphore port_sem;
66
67 int
68 danube_port_reserve_pin (int port, int pin, int module_id)
69 {
70 if (port < 0 || pin < 0)
71 return -EINVAL;
72 if (port > MAX_PORTS || pin > PINS_PER_PORT)
73 return -EINVAL;
74
75 if (danube_port_pin_usage[port][pin] == 0) {
76 danube_port_pin_usage[port][pin] = module_id;
77 }
78 else {
79 return -EBUSY;
80 }
81
82 return 0;
83 }
84
85 int
86 danube_port_free_pin (int port, int pin, int module_id)
87 {
88
89 if (port < 0 || pin < 0)
90 return -EINVAL;
91 if (port > MAX_PORTS || pin > PINS_PER_PORT)
92 return -EINVAL;
93
94 if (danube_port_pin_usage[port][pin] != module_id)
95 return -EBUSY;
96 danube_port_pin_usage[port][pin] = 0;
97
98 return 0;
99 }
100
101 int
102 danube_port_set_open_drain (int port, int pin, int module_id)
103 {
104 u32 reg;
105
106 if (port < 0 || pin < 0)
107 return -EINVAL;
108 if (port > MAX_PORTS || pin > PINS_PER_PORT)
109 return -EINVAL;
110
111 if (danube_port_pin_usage[port][pin] != module_id)
112 return -EBUSY;
113
114 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
115 reg |= (1 << pin);
116 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
117
118 return 0;
119 }
120
121 int
122 danube_port_clear_open_drain (int port, int pin, int module_id)
123 {
124 u32 reg;
125
126 if (port < 0 || pin < 0)
127 return -EINVAL;
128 if (port > MAX_PORTS || pin > PINS_PER_PORT)
129 return -EINVAL;
130
131 if (danube_port_pin_usage[port][pin] != module_id)
132 return -EBUSY;
133
134 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
135 reg &= ~(1 << pin);
136 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OD_REG, reg);
137
138 return 0;
139 }
140
141 int
142 danube_port_set_pudsel (int port, int pin, int module_id)
143 {
144 u32 reg;
145
146 if (port < 0 || pin < 0)
147 return -EINVAL;
148 if (port > MAX_PORTS || pin > PINS_PER_PORT)
149 return -EINVAL;
150
151 if (danube_port_pin_usage[port][pin] != module_id)
152 return -EBUSY;
153
154 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG, reg);
155 reg |= (1 << pin);
156 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG,
157 reg);
158
159 return 0;
160 }
161
162 int
163 danube_port_clear_pudsel (int port, int pin, int module_id)
164 {
165 u32 reg;
166
167 if (port < 0 || pin < 0)
168 return -EINVAL;
169 if (port > MAX_PORTS || pin > PINS_PER_PORT)
170 return -EINVAL;
171
172 if (danube_port_pin_usage[port][pin] != module_id)
173 return -EBUSY;
174
175 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG, reg);
176 reg &= ~(1 << pin);
177 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDSEL_REG,
178 reg);
179
180 return 0;
181 }
182
183 int
184 danube_port_set_puden (int port, int pin, int module_id)
185 {
186 u32 reg;
187
188 if (port < 0 || pin < 0)
189 return -EINVAL;
190 if (port > MAX_PORTS || pin > PINS_PER_PORT)
191 return -EINVAL;
192
193 if (danube_port_pin_usage[port][pin] != module_id)
194 return -EBUSY;
195
196 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
197 reg |= (1 << pin);
198 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
199
200 return 0;
201 }
202
203 int
204 danube_port_clear_puden (int port, int pin, int module_id)
205 {
206 u32 reg;
207
208 if (port < 0 || pin < 0)
209 return -EINVAL;
210 if (port > MAX_PORTS || pin > PINS_PER_PORT)
211 return -EINVAL;
212
213 if (danube_port_pin_usage[port][pin] != module_id)
214 return -EBUSY;
215
216 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
217 reg &= ~(1 << pin);
218 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_PUDEN_REG, reg);
219
220 return 0;
221 }
222
223 int
224 danube_port_set_stoff (int port, int pin, int module_id)
225 {
226 u32 reg;
227
228 if (port < 0 || pin < 0)
229 return -EINVAL;
230 if (port > MAX_PORTS || pin > PINS_PER_PORT)
231 return -EINVAL;
232
233 if (danube_port_pin_usage[port][pin] != module_id)
234 return -EBUSY;
235
236 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
237 reg |= (1 << pin);
238 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
239
240 return 0;
241 }
242
243 int
244 danube_port_clear_stoff (int port, int pin, int module_id)
245 {
246 u32 reg;
247
248 if (port < 0 || pin < 0)
249 return -EINVAL;
250 if (port > MAX_PORTS || pin > PINS_PER_PORT)
251 return -EINVAL;
252
253 if (danube_port_pin_usage[port][pin] != module_id)
254 return -EBUSY;
255
256 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
257 reg &= ~(1 << pin);
258 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_STOFF_REG, reg);
259
260 return 0;
261 }
262
263 int
264 danube_port_set_dir_out (int port, int pin, int module_id)
265 {
266 u32 reg;
267
268 if (port < 0 || pin < 0)
269 return -EINVAL;
270 if (port > MAX_PORTS || pin > PINS_PER_PORT)
271 return -EINVAL;
272
273 if (danube_port_pin_usage[port][pin] != module_id)
274 return -EBUSY;
275
276 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
277 reg |= (1 << pin);
278 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
279
280 return 0;
281 }
282
283 int
284 danube_port_set_dir_in (int port, int pin, int module_id)
285 {
286 u32 reg;
287
288 if (port < 0 || pin < 0)
289 return -EINVAL;
290 if (port > MAX_PORTS || pin > PINS_PER_PORT)
291 return -EINVAL;
292
293 if (danube_port_pin_usage[port][pin] != module_id)
294 return -EBUSY;
295
296 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
297 reg &= ~(1 << pin);
298 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_DIR_REG, reg);
299
300 return 0;
301 }
302
303 int
304 danube_port_set_output (int port, int pin, int module_id)
305 {
306 u32 reg;
307
308 if (port < 0 || pin < 0)
309 return -EINVAL;
310 if (port > MAX_PORTS || pin > PINS_PER_PORT)
311 return -EINVAL;
312
313 if (danube_port_pin_usage[port][pin] != module_id)
314 return -EBUSY;
315
316 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
317 reg |= (1 << pin);
318 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
319
320 return 0;
321 }
322
323 int
324 danube_port_clear_output (int port, int pin, int module_id)
325 {
326 u32 reg;
327
328 if (port < 0 || pin < 0)
329 return -EINVAL;
330 if (port > MAX_PORTS || pin > PINS_PER_PORT)
331 return -EINVAL;
332
333 if (danube_port_pin_usage[port][pin] != module_id)
334 return -EBUSY;
335
336 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
337 reg &= ~(1 << pin);
338 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_OUT_REG, reg);
339
340 return 0;
341 }
342
343 int
344 danube_port_get_input (int port, int pin, int module_id)
345 {
346 u32 reg;
347
348 if (port < 0 || pin < 0)
349 return -EINVAL;
350 if (port > MAX_PORTS || pin > PINS_PER_PORT)
351 return -EINVAL;
352
353 if (danube_port_pin_usage[port][pin] != module_id)
354 return -EBUSY;
355
356 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_IN_REG, reg);
357 reg &= (1 << pin);
358 if (reg == 0x00)
359 return 0;
360 else
361 return 1;
362 }
363
364 int
365 danube_port_set_altsel0 (int port, int pin, int module_id)
366 {
367 u32 reg;
368
369 if (port < 0 || pin < 0)
370 return -EINVAL;
371 if (port > MAX_PORTS || pin > PINS_PER_PORT)
372 return -EINVAL;
373
374 if (danube_port_pin_usage[port][pin] != module_id)
375 return -EBUSY;
376
377 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
378 reg);
379 reg |= (1 << pin);
380 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
381 reg);
382
383 return 0;
384 }
385
386 int
387 danube_port_clear_altsel0 (int port, int pin, int module_id)
388 {
389 u32 reg;
390
391 if (port < 0 || pin < 0)
392 return -EINVAL;
393 if (port > MAX_PORTS || pin > PINS_PER_PORT)
394 return -EINVAL;
395
396 if (danube_port_pin_usage[port][pin] != module_id)
397 return -EBUSY;
398
399 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
400 reg);
401 reg &= ~(1 << pin);
402 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL0_REG,
403 reg);
404
405 return 0;
406 }
407
408 int
409 danube_port_set_altsel1 (int port, int pin, int module_id)
410 {
411 u32 reg;
412
413 if (port < 0 || pin < 0)
414 return -EINVAL;
415 if (port > MAX_PORTS || pin > PINS_PER_PORT)
416 return -EINVAL;
417
418 if (danube_port_pin_usage[port][pin] != module_id)
419 return -EBUSY;
420
421 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
422 reg);
423 reg |= (1 << pin);
424 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
425 reg);
426
427 return 0;
428 }
429
430 int
431 danube_port_clear_altsel1 (int port, int pin, int module_id)
432 {
433 u32 reg;
434
435 if (port < 0 || pin < 0)
436 return -EINVAL;
437 if (port > MAX_PORTS || pin > PINS_PER_PORT)
438 return -EINVAL;
439
440 if (danube_port_pin_usage[port][pin] != module_id)
441 return -EBUSY;
442
443 PORT_READ_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
444 reg);
445 reg &= ~(1 << pin);
446 PORT_WRITE_REG (danube_port_bases[port] + DANUBE_PORT_ALTSEL1_REG,
447 reg);
448
449 return 0;
450 }
451
452 int
453 danube_port_read_procmem (char *buf, char **start, off_t offset, int count,
454 int *eof, void *data)
455 {
456 long len = 0;
457 int t = 0;
458 u32 bit = 0;
459 u32 reg = 0;
460
461 len = sprintf (buf, "\nDanube Port Settings\n");
462
463 len = len + sprintf (buf + len,
464 " 3 2 1 0\n");
465 len = len + sprintf (buf + len,
466 " 10987654321098765432109876543210\n");
467 len = len + sprintf (buf + len,
468 "----------------------------------------\n");
469
470 len = len + sprintf (buf + len, "\nP0-OUT: ");
471 PORT_READ_REG (DANUBE_GPIO_P0_OUT, reg);
472 bit = 0x80000000;
473 for (t = 0; t < 32; t++) {
474 if ((reg & bit) > 0)
475 len = len + sprintf (buf + len, "X");
476 else
477 len = len + sprintf (buf + len, " ");
478 bit = bit >> 1;
479 }
480
481 len = len + sprintf (buf + len, "\nP1-OUT: ");
482 PORT_READ_REG (DANUBE_GPIO_P1_OUT, reg);
483 bit = 0x80000000;
484 for (t = 0; t < 32; t++) {
485 if ((reg & bit) > 0)
486 len = len + sprintf (buf + len, "X");
487 else
488 len = len + sprintf (buf + len, " ");
489 bit = bit >> 1;
490 }
491
492 len = len + sprintf (buf + len, "\nP0-IN: ");
493 PORT_READ_REG (DANUBE_GPIO_P0_IN, reg);
494 bit = 0x80000000;
495 for (t = 0; t < 32; t++) {
496 if ((reg & bit) > 0)
497 len = len + sprintf (buf + len, "X");
498 else
499 len = len + sprintf (buf + len, " ");
500 bit = bit >> 1;
501 }
502
503 len = len + sprintf (buf + len, "\nP1-IN: ");
504 PORT_READ_REG (DANUBE_GPIO_P1_IN, reg);
505 bit = 0x80000000;
506 for (t = 0; t < 32; t++) {
507 if ((reg & bit) > 0)
508 len = len + sprintf (buf + len, "X");
509 else
510 len = len + sprintf (buf + len, " ");
511 bit = bit >> 1;
512 }
513
514 len = len + sprintf (buf + len, "\nP0-DIR: ");
515 PORT_READ_REG (DANUBE_GPIO_P0_DIR, reg);
516 bit = 0x80000000;
517 for (t = 0; t < 32; t++) {
518 if ((reg & bit) > 0)
519 len = len + sprintf (buf + len, "X");
520 else
521 len = len + sprintf (buf + len, " ");
522 bit = bit >> 1;
523 }
524
525 len = len + sprintf (buf + len, "\nP1-DIR: ");
526 PORT_READ_REG (DANUBE_GPIO_P1_DIR, reg);
527 bit = 0x80000000;
528 for (t = 0; t < 32; t++) {
529 if ((reg & bit) > 0)
530 len = len + sprintf (buf + len, "X");
531 else
532 len = len + sprintf (buf + len, " ");
533 bit = bit >> 1;
534 }
535
536 len = len + sprintf (buf + len, "\nP0-STO: ");
537 PORT_READ_REG (DANUBE_GPIO_P0_STOFF, reg);
538 bit = 0x80000000;
539 for (t = 0; t < 32; t++) {
540 if ((reg & bit) > 0)
541 len = len + sprintf (buf + len, "X");
542 else
543 len = len + sprintf (buf + len, " ");
544 bit = bit >> 1;
545 }
546
547 len = len + sprintf (buf + len, "\nP1-STO: ");
548 PORT_READ_REG (DANUBE_GPIO_P1_STOFF, reg);
549 bit = 0x80000000;
550 for (t = 0; t < 32; t++) {
551 if ((reg & bit) > 0)
552 len = len + sprintf (buf + len, "X");
553 else
554 len = len + sprintf (buf + len, " ");
555 bit = bit >> 1;
556 }
557
558 len = len + sprintf (buf + len, "\nP0-PUDE:");
559 PORT_READ_REG (DANUBE_GPIO_P0_PUDEN, reg);
560 bit = 0x80000000;
561 for (t = 0; t < 32; t++) {
562 if ((reg & bit) > 0)
563 len = len + sprintf (buf + len, "X");
564 else
565 len = len + sprintf (buf + len, " ");
566 bit = bit >> 1;
567 }
568
569 len = len + sprintf (buf + len, "\nP1-PUDE:");
570 PORT_READ_REG (DANUBE_GPIO_P1_PUDEN, reg);
571 bit = 0x80000000;
572 for (t = 0; t < 32; t++) {
573 if ((reg & bit) > 0)
574 len = len + sprintf (buf + len, "X");
575 else
576 len = len + sprintf (buf + len, " ");
577 bit = bit >> 1;
578 }
579
580 len = len + sprintf (buf + len, "\nP0-OD: ");
581 PORT_READ_REG (DANUBE_GPIO_P0_OD, reg);
582 bit = 0x80000000;
583 for (t = 0; t < 32; t++) {
584 if ((reg & bit) > 0)
585 len = len + sprintf (buf + len, "X");
586 else
587 len = len + sprintf (buf + len, " ");
588 bit = bit >> 1;
589 }
590
591 len = len + sprintf (buf + len, "\nP1-OD: ");
592 PORT_READ_REG (DANUBE_GPIO_P1_OD, reg);
593 bit = 0x80000000;
594 for (t = 0; t < 32; t++) {
595 if ((reg & bit) > 0)
596 len = len + sprintf (buf + len, "X");
597 else
598 len = len + sprintf (buf + len, " ");
599 bit = bit >> 1;
600 }
601
602 len = len + sprintf (buf + len, "\nP0-PUDS:");
603 PORT_READ_REG (DANUBE_GPIO_P0_PUDSEL, reg);
604 bit = 0x80000000;
605 for (t = 0; t < 32; t++) {
606 if ((reg & bit) > 0)
607 len = len + sprintf (buf + len, "X");
608 else
609 len = len + sprintf (buf + len, " ");
610 bit = bit >> 1;
611 }
612
613 len = len + sprintf (buf + len, "\nP1-PUDS:");
614 PORT_READ_REG (DANUBE_GPIO_P1_PUDSEL, reg);
615 bit = 0x80000000;
616 for (t = 0; t < 32; t++) {
617 if ((reg & bit) > 0)
618 len = len + sprintf (buf + len, "X");
619 else
620 len = len + sprintf (buf + len, " ");
621 bit = bit >> 1;
622 }
623
624 len = len + sprintf (buf + len, "\nP0_ALT0:");
625 PORT_READ_REG (DANUBE_GPIO_P0_ALTSEL0, reg);
626 bit = 0x80000000;
627 for (t = 0; t < 32; t++) {
628 if ((reg & bit) > 0)
629 len = len + sprintf (buf + len, "X");
630 else
631 len = len + sprintf (buf + len, " ");
632 bit = bit >> 1;
633 }
634
635 len = len + sprintf (buf + len, "\nP0_ALT1:");
636 PORT_READ_REG (DANUBE_GPIO_P0_ALTSEL1, reg);
637 bit = 0x80000000;
638 for (t = 0; t < 32; t++) {
639 if ((reg & bit) > 0)
640 len = len + sprintf (buf + len, "X");
641 else
642 len = len + sprintf (buf + len, " ");
643 bit = bit >> 1;
644 }
645
646 len = len + sprintf (buf + len, "\nP1_ALT0:");
647 PORT_READ_REG (DANUBE_GPIO_P1_ALTSEL0, reg);
648 bit = 0x80000000;
649 for (t = 0; t < 32; t++) {
650 if ((reg & bit) > 0)
651 len = len + sprintf (buf + len, "X");
652 else
653 len = len + sprintf (buf + len, " ");
654 bit = bit >> 1;
655 }
656
657 len = len + sprintf (buf + len, "\nP1_ALT1:");
658 PORT_READ_REG (DANUBE_GPIO_P1_ALTSEL1, reg);
659 bit = 0x80000000;
660 for (t = 0; t < 32; t++) {
661 if ((reg & bit) > 0)
662 len = len + sprintf (buf + len, "X");
663 else
664 len = len + sprintf (buf + len, " ");
665 bit = bit >> 1;
666 }
667
668 len = len + sprintf (buf + len, "\n\n");
669
670 *eof = 1; // No more data available
671 return len;
672 }
673
674 static int
675 danube_port_open (struct inode *inode, struct file *filep)
676 {
677 return 0;
678 }
679
680 static int
681 danube_port_release (struct inode *inode, struct file *filelp)
682 {
683 return 0;
684 }
685
686 static int
687 danube_port_ioctl (struct inode *inode, struct file *filp,
688 unsigned int cmd, unsigned long arg)
689 {
690 int ret = 0;
691 volatile struct danube_port_ioctl_parm parm;
692
693 if (_IOC_TYPE (cmd) != DANUBE_PORT_IOC_MAGIC)
694 return -EINVAL;
695
696 if (_IOC_DIR (cmd) & _IOC_WRITE) {
697 if (!access_ok
698 (VERIFY_READ, arg,
699 sizeof (struct danube_port_ioctl_parm)))
700 return -EFAULT;
701 ret = copy_from_user ((void *) &parm, (void *) arg,
702 sizeof (struct danube_port_ioctl_parm));
703 }
704 if (_IOC_DIR (cmd) & _IOC_READ) {
705 if (!access_ok
706 (VERIFY_WRITE, arg,
707 sizeof (struct danube_port_ioctl_parm)))
708 return -EFAULT;
709 }
710
711 if (down_trylock (&port_sem) != 0)
712 return -EBUSY;
713
714 switch (cmd) {
715 case DANUBE_PORT_IOCOD:
716 if (parm.value == 0x00) {
717 PORT_IOC_CALL (ret, parm.port, parm.pin,
718 danube_port_clear_open_drain);
719 }
720 else {
721 PORT_IOC_CALL (ret, parm.port, parm.pin,
722 danube_port_set_open_drain);
723 }
724 break;
725 case DANUBE_PORT_IOCPUDSEL:
726 if (parm.value == 0x00) {
727 PORT_IOC_CALL (ret, parm.port, parm.pin,
728 danube_port_clear_pudsel);
729 }
730 else {
731 PORT_IOC_CALL (ret, parm.port, parm.pin,
732 danube_port_set_pudsel);
733 }
734 break;
735 case DANUBE_PORT_IOCPUDEN:
736 if (parm.value == 0x00) {
737 PORT_IOC_CALL (ret, parm.port, parm.pin,
738 danube_port_clear_puden);
739 }
740 else {
741 PORT_IOC_CALL (ret, parm.port, parm.pin,
742 danube_port_set_puden);
743 }
744 break;
745 case DANUBE_PORT_IOCSTOFF:
746 if (parm.value == 0x00) {
747 PORT_IOC_CALL (ret, parm.port, parm.pin,
748 danube_port_clear_stoff);
749 }
750 else {
751 PORT_IOC_CALL (ret, parm.port, parm.pin,
752 danube_port_set_stoff);
753 }
754 break;
755 case DANUBE_PORT_IOCDIR:
756 if (parm.value == 0x00) {
757 PORT_IOC_CALL (ret, parm.port, parm.pin,
758 danube_port_set_dir_in);
759 }
760 else {
761 PORT_IOC_CALL (ret, parm.port, parm.pin,
762 danube_port_set_dir_out);
763 }
764 break;
765 case DANUBE_PORT_IOCOUTPUT:
766 if (parm.value == 0x00) {
767 PORT_IOC_CALL (ret, parm.port, parm.pin,
768 danube_port_clear_output);
769 }
770 else {
771 PORT_IOC_CALL (ret, parm.port, parm.pin,
772 danube_port_set_output);
773 }
774 break;
775 case DANUBE_PORT_IOCALTSEL0:
776 if (parm.value == 0x00) {
777 PORT_IOC_CALL (ret, parm.port, parm.pin,
778 danube_port_clear_altsel0);
779 }
780 else {
781 PORT_IOC_CALL (ret, parm.port, parm.pin,
782 danube_port_set_altsel0);
783 }
784 break;
785 case DANUBE_PORT_IOCALTSEL1:
786 if (parm.value == 0x00) {
787 PORT_IOC_CALL (ret, parm.port, parm.pin,
788 danube_port_clear_altsel1);
789 }
790 else {
791 PORT_IOC_CALL (ret, parm.port, parm.pin,
792 danube_port_set_altsel1);
793 }
794 break;
795 case DANUBE_PORT_IOCINPUT:
796 ret = danube_port_reserve_pin (parm.port, parm.pin,
797 PORT_MODULE_ID);
798 if (ret == 0)
799 parm.value =
800 danube_port_get_input (parm.port, parm.pin,
801 PORT_MODULE_ID);
802 ret = danube_port_free_pin (parm.port, parm.pin,
803 PORT_MODULE_ID);
804 copy_to_user ((void *) arg, (void *) &parm,
805 sizeof (struct danube_port_ioctl_parm));
806 break;
807 default:
808 ret = -EINVAL;
809 }
810
811 up (&port_sem);
812
813 return ret;
814 }
815
816 static struct file_operations port_fops = {
817 open:danube_port_open,
818 release:danube_port_release,
819 ioctl:danube_port_ioctl
820 };
821
822 int __init
823 danube_port_init (void)
824 {
825 int t = 0;
826 int i = 0;
827 int err = 0;
828 printk ("Danube Port Initialization\n");
829
830 sema_init (&port_sem, 1);
831
832 /* Check ports for available pins */
833 for (t = 0; t < MAX_PORTS; t++) {
834 for (i = 0; i < PINS_PER_PORT; i++)
835 danube_port_pin_usage[t][i] = 0;
836 }
837
838 /* register port device */
839 err = register_chrdev (0, "danube-port", &port_fops);
840 if (err > 0)
841 port_major = err;
842 else {
843 printk ("danube-port: Error! Could not register port device. #%d\n", err);
844 return err;
845 }
846
847 /* Create proc file */
848 create_proc_read_entry ("driver/danube_port", 0, NULL,
849 danube_port_read_procmem, NULL);
850
851 return 0;
852 }
853
854 module_init (danube_port_init);
855
856 EXPORT_SYMBOL (danube_port_reserve_pin);
857 EXPORT_SYMBOL (danube_port_free_pin);
858 EXPORT_SYMBOL (danube_port_set_open_drain);
859 EXPORT_SYMBOL (danube_port_clear_open_drain);
860 EXPORT_SYMBOL (danube_port_set_pudsel);
861 EXPORT_SYMBOL (danube_port_clear_pudsel);
862 EXPORT_SYMBOL (danube_port_set_puden);
863 EXPORT_SYMBOL (danube_port_clear_puden);
864 EXPORT_SYMBOL (danube_port_set_stoff);
865 EXPORT_SYMBOL (danube_port_clear_stoff);
866 EXPORT_SYMBOL (danube_port_set_dir_out);
867 EXPORT_SYMBOL (danube_port_set_dir_in);
868 EXPORT_SYMBOL (danube_port_set_output);
869 EXPORT_SYMBOL (danube_port_clear_output);
870 EXPORT_SYMBOL (danube_port_get_input);
871
872 EXPORT_SYMBOL (danube_port_set_altsel0);
873 EXPORT_SYMBOL (danube_port_clear_altsel0);
874 EXPORT_SYMBOL (danube_port_set_altsel1);
875 EXPORT_SYMBOL (danube_port_clear_altsel1);
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