target/linux/au1000-2.6/patches/001-au1x00_gpio.patch

   1 diff -urN linux-2.6.21.1/arch/mips/au1000/common/gpio.c linux-2.6.21.1.new/arch/mips/au1000/common/gpio.c
   2 --- linux-2.6.21.1/arch/mips/au1000/common/gpio.c       2007-04-27 23:49:26.000000000 +0200
   3 +++ linux-2.6.21.1.new/arch/mips/au1000/common/gpio.c   2007-05-22 21:41:55.000000000 +0200
   4 @@ -1,4 +1,7 @@
   5  /*
   6 + *  Copyright (C) 2007, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
   7 + *     Architecture specific GPIO support
   8 + *
   9   *  This program is free software; you can redistribute         it and/or modify it
  10   *  under  the terms of         the GNU General  Public License as published by the
  11   *  Free Software Foundation;  either version 2 of the License, or (at your
  12 @@ -18,101 +21,133 @@
  13   *  You should have received a copy of the  GNU General Public License along
  14   *  with this program; if not, write  to the Free Software Foundation, Inc.,
  15   *  675 Mass Ave, Cambridge, MA 02139, USA.
  16 + *
  17 + *  Notes :
  18 + *     au1000 SoC have only one GPIO line : GPIO1
  19 + *     others have a second one : GPIO2
  20   */
  21 +
  22 +#include <linux/autoconf.h>
  23 +#include <linux/init.h>
  24 +#include <linux/types.h>
  25  #include <linux/module.h>
  26 -#include <au1000.h>
  27 -#include <au1xxx_gpio.h>
  28 +
  29 +#include <asm/addrspace.h>
  30 +#include <asm/io.h>
  31 +
  32 +#include <asm/mach-au1x00/au1000.h>
  33 +#include <asm/gpio.h>
  34
  35  #define gpio1 sys
  36  #if !defined(CONFIG_SOC_AU1000)
  37  static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
  38 +#define GPIO2_OUTPUT_ENABLE_MASK       0x00010000
  39
  40 -#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
  41 -
  42 -int au1xxx_gpio2_read(int signal)
  43 +static int au1xxx_gpio2_read(unsigned gpio)
  44  {
  45 -       signal -= 200;
  46 -/*     gpio2->dir &= ~(0x01 << signal);                                                //Set GPIO to input */
  47 -       return ((gpio2->pinstate >> signal) & 0x01);
  48 +       gpio -= AU1XXX_GPIO_BASE;
  49 +       return ((gpio2->pinstate >> gpio) & 0x01);
  50  }
  51
  52 -void au1xxx_gpio2_write(int signal, int value)
  53 +static void au1xxx_gpio2_write(unsigned gpio, int value)
  54  {
  55 -       signal -= 200;
  56 +       gpio -= AU1XXX_GPIO_BASE;
  57
  58 -       gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
  59 -               (value << signal);
  60 +       gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) |
  61 +                       (value << gpio);
  62  }
  63
  64 -void au1xxx_gpio2_tristate(int signal)
  65 +static int au1xxx_gpio2_direction_input(unsigned gpio)
  66  {
  67 -       signal -= 200;
  68 -       gpio2->dir &= ~(0x01 << signal);        /* Set GPIO to input */
  69 +       gpio -= AU1XXX_GPIO_BASE;
  70 +       gpio2->dir &= ~(0x01 << gpio);
  71 +       return 0;
  72  }
  73 -#endif
  74
  75 -int au1xxx_gpio1_read(int signal)
  76 +static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
  77 +{
  78 +       gpio -= AU1XXX_GPIO_BASE;
  79 +       gpio2->dir = (0x01 << gpio) | (value << gpio);
  80 +       return 0;
  81 +}
  82 +
  83 +#endif /* !defined(CONFIG_SOC_AU1000) */
  84 +
  85 +static int au1xxx_gpio1_read(unsigned gpio)
  86  {
  87 -/*     gpio1->trioutclr |= (0x01 << signal); */
  88 -       return ((gpio1->pinstaterd >> signal) & 0x01);
  89 +       return ((gpio1->pinstaterd >> gpio) & 0x01);
  90  }
  91
  92 -void au1xxx_gpio1_write(int signal, int value)
  93 +static void au1xxx_gpio1_write(unsigned gpio, int value)
  94  {
  95         if(value)
  96 -               gpio1->outputset = (0x01 << signal);
  97 +               gpio1->outputset = (0x01 << gpio);
  98         else
  99 -               gpio1->outputclr = (0x01 << signal);    /* Output a Zero */
 100 +               /* Output a zero */
 101 +               gpio1->outputclr = (0x01 << gpio);
 102  }
 103
 104 -void au1xxx_gpio1_tristate(int signal)
 105 +static int au1xxx_gpio1_direction_input(unsigned gpio)
 106  {
 107 -       gpio1->trioutclr = (0x01 << signal);            /* Tristate signal */
 108 +       gpio1->pininputen = (0x01 << gpio);
 109 +       return 0;
 110  }
 111
 112 +static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
 113 +{
 114 +       gpio1->trioutclr = (0x01 & gpio);
 115 +       return 0;
 116 +}
 117
 118 -int au1xxx_gpio_read(int signal)
 119 +int au1xxx_gpio_get_value(unsigned gpio)
 120  {
 121 -       if(signal >= 200)
 122 +       if(gpio >= AU1XXX_GPIO_BASE)
 123  #if defined(CONFIG_SOC_AU1000)
 124                 return 0;
 125  #else
 126 -               return au1xxx_gpio2_read(signal);
 127 +               return au1xxx_gpio2_read(gpio);
 128  #endif
 129         else
 130 -               return au1xxx_gpio1_read(signal);
 131 +               return au1xxx_gpio1_read(gpio);
 132  }
 133
 134 -void au1xxx_gpio_write(int signal, int value)
 135 +void au1xxx_gpio_set_value(unsigned gpio, int value)
 136  {
 137 -       if(signal >= 200)
 138 +       if(gpio >= AU1XXX_GPIO_BASE)
 139  #if defined(CONFIG_SOC_AU1000)
 140                 ;
 141  #else
 142 -               au1xxx_gpio2_write(signal, value);
 143 +               au1xxx_gpio2_write(gpio, value);
 144  #endif
 145         else
 146 -               au1xxx_gpio1_write(signal, value);
 147 +               au1xxx_gpio1_write(gpio, value);
 148  }
 149
 150 -void au1xxx_gpio_tristate(int signal)
 151 +int au1xxx_gpio_direction_input(unsigned gpio)
 152  {
 153 -       if(signal >= 200)
 154 +       if (gpio >= AU1XXX_GPIO_BASE)
 155  #if defined(CONFIG_SOC_AU1000)
 156                 ;
 157  #else
 158 -               au1xxx_gpio2_tristate(signal);
 159 +               return au1xxx_gpio2_direction_input(gpio);
 160  #endif
 161         else
 162 -               au1xxx_gpio1_tristate(signal);
 163 +               return au1xxx_gpio1_direction_input(gpio);
 164  }
 165
 166 -void au1xxx_gpio1_set_inputs(void)
 167 +int au1xxx_gpio_direction_output(unsigned gpio, int value)
 168  {
 169 -       gpio1->pininputen = 0;
 170 +       if (gpio >= AU1XXX_GPIO_BASE)
 171 +#if defined(CONFIG_SOC_AU1000)
 172 +               ;
 173 +#else
 174 +               return au1xxx_gpio2_direction_output(gpio, value);
 175 +#endif
 176 +       else
 177 +               return au1xxx_gpio1_direction_output(gpio, value);
 178  }
 179
 180 -EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
 181 -EXPORT_SYMBOL(au1xxx_gpio_tristate);
 182 -EXPORT_SYMBOL(au1xxx_gpio_write);
 183 -EXPORT_SYMBOL(au1xxx_gpio_read);
 184 +EXPORT_SYMBOL(au1xxx_gpio_direction_output);
 185 +EXPORT_SYMBOL(au1xxx_gpio_direction_input);
 186 +EXPORT_SYMBOL(au1xxx_gpio_get_value);
 187 +EXPORT_SYMBOL(au1xxx_gpio_set_value);
 188 --- linux-2.6.21.1/arch/mips/Kconfig    2007-04-27 23:49:26.000000000 +0200
 189 +++ linux-2.6.21.1.new/arch/mips/Kconfig        2007-05-21 08:04:42.000000000 +0200
 190 @@ -1044,6 +1044,7 @@
 191         select SYS_SUPPORTS_32BIT_KERNEL
 192         select SYS_SUPPORTS_APM_EMULATION
 193         select SYS_SUPPORTS_KGDB
 194 +       select GENERIC_GPIO
 195
 196  config PNX8550
 197         bool
 198 diff -urN linux-2.6.21.1/include/asm-mips/mach-au1x00/au1xxx_gpio.h linux-2.6.21.1.new/include/asm-mips/mach-au1x00/au1xxx_gpio.h
 199 --- linux-2.6.21.1/include/asm-mips/mach-au1x00/au1xxx_gpio.h   2007-04-27 23:49:26.000000000 +0200
 200 +++ linux-2.6.21.1.new/include/asm-mips/mach-au1x00/au1xxx_gpio.h       1970-01-01 01:00:00.000000000 +0100
 201 @@ -1,20 +0,0 @@
 202 -#ifndef __AU1XXX_GPIO_H
 203 -#define __AU1XXX_GPIO_H
 204 -
 205 -void au1xxx_gpio1_set_inputs(void);
 206 -void au1xxx_gpio_tristate(int signal);
 207 -void au1xxx_gpio_write(int signal, int value);
 208 -int  au1xxx_gpio_read(int signal);
 209 -
 210 -typedef volatile struct
 211 -{
 212 -       u32 dir;
 213 -       u32 reserved;
 214 -       u32 output;
 215 -       u32 pinstate;
 216 -       u32 inten;
 217 -       u32 enable;
 218 -
 219 -} AU1X00_GPIO2;
 220 -
 221 -#endif //__AU1XXX_GPIO_H
 222 diff -urN linux-2.6.21.1/include/asm-mips/mach-au1x00/gpio.h linux-2.6.21.1.new/include/asm-mips/mach-au1x00/gpio.h
 223 --- linux-2.6.21.1/include/asm-mips/mach-au1x00/gpio.h  1970-01-01 01:00:00.000000000 +0100
 224 +++ linux-2.6.21.1.new/include/asm-mips/mach-au1x00/gpio.h      2007-05-21 01:10:22.000000000 +0200
 225 @@ -0,0 +1,69 @@
 226 +#ifndef _AU1XXX_GPIO_H_
 227 +#define _AU1XXX_GPIO_H_
 228 +
 229 +#define AU1XXX_GPIO_BASE       200
 230 +
 231 +typedef volatile struct
 232 +{
 233 +       u32 dir;
 234 +       u32 reserved;
 235 +       u32 output;
 236 +       u32 pinstate;
 237 +       u32 inten;
 238 +       u32 enable;
 239 +
 240 +} AU1X00_GPIO2;
 241 +
 242 +extern int au1xxx_gpio_get_value(unsigned gpio);
 243 +extern void au1xxx_gpio_set_value(unsigned gpio, int value);
 244 +extern int au1xxx_gpio_direction_input(unsigned gpio);
 245 +extern int au1xxx_gpio_direction_output(unsigned gpio, int value);
 246 +
 247 +
 248 +/* Wrappers for the arch-neutral GPIO API */
 249 +
 250 +static inline int gpio_request(unsigned gpio, const char *label)
 251 +{
 252 +       /* Not yet implemented */
 253 +       return 0;
 254 +}
 255 +
 256 +static inline void gpio_free(unsigned gpio)
 257 +{
 258 +       /* Not yet implemented */
 259 +}
 260 +
 261 +static inline int gpio_direction_input(unsigned gpio)
 262 +{
 263 +       return au1xxx_gpio_direction_input(gpio);
 264 +}
 265 +
 266 +static inline int gpio_direction_output(unsigned gpio, int value)
 267 +{
 268 +       return au1xxx_gpio_direction_output(gpio, value);
 269 +}
 270 +
 271 +static inline int gpio_get_value(unsigned gpio)
 272 +{
 273 +       return au1xxx_gpio_get_value(gpio);
 274 +}
 275 +
 276 +static inline void gpio_set_value(unsigned gpio, int value)
 277 +{
 278 +       au1xxx_gpio_set_value(gpio, value);
 279 +}
 280 +
 281 +static inline int gpio_to_irq(unsigned gpio)
 282 +{
 283 +       return gpio;
 284 +}
 285 +
 286 +static inline int irq_to_gpio(unsigned irq)
 287 +{
 288 +       return irq;
 289 +}
 290 +
 291 +/* For cansleep */
 292 +#include <asm-generic/gpio.h>
 293 +
 294 +#endif /* _AU1XXX_GPIO_H_ */