target/linux/ar71xx/files/arch/mips/ar71xx/dev-ap91-pci.c

   1 /*
   2  *  Atheros AP91 reference board PCI initialization
   3  *
   4  *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/pci.h>
  12 #include <linux/ath9k_platform.h>
  13 #include <linux/delay.h>
  14
  15 #include <asm/mach-ar71xx/ar71xx.h>
  16 #include <asm/mach-ar71xx/pci.h>
  17
  18 #include "dev-ap91-pci.h"
  19
  20 static struct ath9k_platform_data ap91_wmac_data;
  21 static char ap91_wmac_mac[6];
  22 static int ap91_pci_fixup_enabled;
  23
  24 static struct ar71xx_pci_irq ap91_pci_irqs[] __initdata = {
  25         {
  26                 .slot   = 0,
  27                 .pin    = 1,
  28                 .irq    = AR71XX_PCI_IRQ_DEV0,
  29         }
  30 };
  31
  32 static int ap91_pci_plat_dev_init(struct pci_dev *dev)
  33 {
  34         switch(PCI_SLOT(dev->devfn)) {
  35         case 0:
  36                 dev->dev.platform_data = &ap91_wmac_data;
  37                 break;
  38         }
  39
  40         return 0;
  41 }
  42
  43 static void ap91_pci_fixup(struct pci_dev *dev)
  44 {
  45         void __iomem *mem;
  46         u16 *cal_data;
  47         u16 cmd;
  48         u32 val;
  49
  50         if (!ap91_pci_fixup_enabled)
  51                 return;
  52
  53         printk(KERN_INFO "PCI: fixup device %s\n", pci_name(dev));
  54
  55         cal_data = ap91_wmac_data.eeprom_data;
  56         if (*cal_data != 0xa55a) {
  57                 printk(KERN_ERR "PCI: no calibration data found for %s\n",
  58                        pci_name(dev));
  59                 return;
  60         }
  61
  62         mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000);
  63         if (!mem) {
  64                 printk(KERN_ERR "PCI: ioremap error for device %s\n",
  65                        pci_name(dev));
  66                 return;
  67         }
  68
  69         /* Setup the PCI device to allow access to the internal registers */
  70         pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff);
  71         pci_read_config_word(dev, PCI_COMMAND, &cmd);
  72         cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
  73         pci_write_config_word(dev, PCI_COMMAND, cmd);
  74
  75         /* set pointer to first reg address */
  76         cal_data += 3;
  77         while (*cal_data != 0xffff) {
  78                 u32 reg;
  79                 reg = *cal_data++;
  80                 val = *cal_data++;
  81                 val |= (*cal_data++) << 16;
  82
  83                 __raw_writel(val, mem + reg);
  84                 udelay(100);
  85         }
  86
  87         pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
  88         dev->vendor = val & 0xffff;
  89         dev->device = (val >> 16) & 0xffff;
  90
  91         pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
  92         dev->revision = val & 0xff;
  93         dev->class = val >> 8; /* upper 3 bytes */
  94
  95         iounmap(mem);
  96 }
  97 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ap91_pci_fixup);
  98
  99 void __init ap91_pci_init(u8 *cal_data, u8 *mac_addr)
 100 {
 101         if (cal_data)
 102                 memcpy(ap91_wmac_data.eeprom_data, cal_data,
 103                        sizeof(ap91_wmac_data.eeprom_data));
 104
 105         if (mac_addr) {
 106                 memcpy(ap91_wmac_mac, mac_addr, sizeof(ap91_wmac_mac));
 107                 ap91_wmac_data.macaddr = ap91_wmac_mac;
 108         }
 109
 110         ar71xx_pci_plat_dev_init = ap91_pci_plat_dev_init;
 111         ar71xx_pci_init(ARRAY_SIZE(ap91_pci_irqs), ap91_pci_irqs);
 112
 113         ap91_pci_fixup_enabled = 1;
 114 }