target/linux/brcm63xx/files/arch/mips/pci/ops-bcm63xx.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/delay.h>
  14 #include <linux/io.h>
  15
  16 #include "pci-bcm63xx.h"
  17
  18 /*
  19  * swizzle 32bits data to return only the needed part
  20  */
  21 static int postprocess_read(u32 data, int where, unsigned int size)
  22 {
  23         u32 ret;
  24
  25         ret = 0;
  26         switch (size) {
  27         case 1:
  28                 ret = (data >> ((where & 3) << 3)) & 0xff;
  29                 break;
  30         case 2:
  31                 ret = (data >> ((where & 3) << 3)) & 0xffff;
  32                 break;
  33         case 4:
  34                 ret = data;
  35                 break;
  36         }
  37         return ret;
  38 }
  39
  40 static int preprocess_write(u32 orig_data, u32 val, int where,
  41                             unsigned int size)
  42 {
  43         u32 ret;
  44
  45         ret = 0;
  46         switch (size) {
  47         case 1:
  48                 ret = (orig_data & ~(0xff << ((where & 3) << 3))) |
  49                         (val << ((where & 3) << 3));
  50                 break;
  51         case 2:
  52                 ret = (orig_data & ~(0xffff << ((where & 3) << 3))) |
  53                         (val << ((where & 3) << 3));
  54                 break;
  55         case 4:
  56                 ret = val;
  57                 break;
  58         }
  59         return ret;
  60 }
  61
  62 /*
  63  * setup hardware for a configuration cycle with given parameters
  64  */
  65 static int bcm63xx_setup_cfg_access(int type, unsigned int busn,
  66                                     unsigned int devfn, int where)
  67 {
  68         unsigned int slot, func, reg;
  69         u32 val;
  70
  71         slot = PCI_SLOT(devfn);
  72         func = PCI_FUNC(devfn);
  73         reg = where >> 2;
  74
  75         /* sanity check */
  76         if (slot > (MPI_L2PCFG_DEVNUM_MASK >> MPI_L2PCFG_DEVNUM_SHIFT))
  77                 return 1;
  78
  79         if (func > (MPI_L2PCFG_FUNC_MASK >> MPI_L2PCFG_FUNC_SHIFT))
  80                 return 1;
  81
  82         if (reg > (MPI_L2PCFG_REG_MASK >> MPI_L2PCFG_REG_SHIFT))
  83                 return 1;
  84
  85         /* ok, setup config access */
  86         val = (reg << MPI_L2PCFG_REG_SHIFT);
  87         val |= (func << MPI_L2PCFG_FUNC_SHIFT);
  88         val |= (slot << MPI_L2PCFG_DEVNUM_SHIFT);
  89         val |= MPI_L2PCFG_CFG_USEREG_MASK;
  90         val |= MPI_L2PCFG_CFG_SEL_MASK;
  91         /* type 0 cycle for local bus, type 1 cycle for anything else */
  92         if (type != 0) {
  93                 /* FIXME: how to specify bus ??? */
  94                 val |= (1 << MPI_L2PCFG_CFG_TYPE_SHIFT);
  95         }
  96         bcm_mpi_writel(val, MPI_L2PCFG_REG);
  97
  98         return 0;
  99 }
 100
 101 static int bcm63xx_do_cfg_read(int type, unsigned int busn,
 102                                 unsigned int devfn, int where, int size,
 103                                 u32 *val)
 104 {
 105         u32 data;
 106
 107         /* two phase cycle, first we write address, then read data at
 108          * another location, caller already has a spinlock so no need
 109          * to add one here  */
 110         if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
 111                 return PCIBIOS_DEVICE_NOT_FOUND;
 112         iob();
 113         data = le32_to_cpu(__raw_readl(pci_iospace_start));
 114         /* restore IO space normal behaviour */
 115         bcm_mpi_writel(0, MPI_L2PCFG_REG);
 116
 117         *val = postprocess_read(data, where, size);
 118
 119         return PCIBIOS_SUCCESSFUL;
 120 }
 121
 122 static int bcm63xx_do_cfg_write(int type, unsigned int busn,
 123                                  unsigned int devfn, int where, int size,
 124                                  u32 val)
 125 {
 126         u32 data;
 127
 128         /* two phase cycle, first we write address, then write data to
 129          * another location, caller already has a spinlock so no need
 130          * to add one here  */
 131         if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
 132                 return PCIBIOS_DEVICE_NOT_FOUND;
 133         iob();
 134
 135         data = le32_to_cpu(__raw_readl(pci_iospace_start));
 136         data = preprocess_write(data, val, where, size);
 137
 138         __raw_writel(cpu_to_le32(data), pci_iospace_start);
 139         wmb();
 140         /* no way to know the access is done, we have to wait */
 141         udelay(500);
 142         /* restore IO space normal behaviour */
 143         bcm_mpi_writel(0, MPI_L2PCFG_REG);
 144
 145         return PCIBIOS_SUCCESSFUL;
 146 }
 147
 148 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
 149                              int where, int size, u32 *val)
 150 {
 151         int type;
 152
 153         type = bus->parent ? 1 : 0;
 154
 155         if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
 156                 return PCIBIOS_DEVICE_NOT_FOUND;
 157
 158         return bcm63xx_do_cfg_read(type, bus->number, devfn,
 159                                     where, size, val);
 160 }
 161
 162 static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn,
 163                               int where, int size, u32 val)
 164 {
 165         int type;
 166
 167         type = bus->parent ? 1 : 0;
 168
 169         if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
 170                 return PCIBIOS_DEVICE_NOT_FOUND;
 171
 172         return bcm63xx_do_cfg_write(type, bus->number, devfn,
 173                                      where, size, val);
 174 }
 175
 176 struct pci_ops bcm63xx_pci_ops = {
 177         .read   = bcm63xx_pci_read,
 178         .write  = bcm63xx_pci_write
 179 };