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[openwrt.git] / target / linux / danube / files / drivers / char / danube_ssc.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
15 *
16 * Copyright (C) 2006 infineon
17 * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
18 *
19 */
20
21 // ### TO DO: general issues:
22 // - power management
23 // - interrupt handling (direct/indirect)
24 // - pin/mux-handling (just overall concept due to project dependency)
25 // - multiple instances capability
26 // - slave functionality
27
28 #include <linux/module.h>
29 #include <linux/errno.h>
30 #include <linux/signal.h>
31 #include <linux/sched.h>
32 #include <linux/timer.h>
33 #include <linux/interrupt.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fs.h>
37 #include <linux/proc_fs.h>
38 #include <linux/fcntl.h>
39 #include <linux/ptrace.h>
40 #include <linux/mm.h>
41 #include <linux/ioport.h>
42 #include <linux/init.h>
43 #include <linux/delay.h>
44 #include <linux/spinlock.h>
45 #include <linux/slab.h>
46
47 #include <asm/system.h>
48 #include <asm/io.h>
49 #include <asm/irq.h>
50 #include <asm/uaccess.h>
51 #include <asm/bitops.h>
52
53 #include <linux/types.h>
54 #include <linux/kernel.h>
55 #include <linux/version.h>
56
57 #include <asm/danube/danube.h>
58 #include <asm/danube/danube_irq.h>
59 #include <asm/danube/ifx_ssc_defines.h>
60 #include <asm/danube/ifx_ssc.h>
61
62 #ifdef SSC_FRAME_INT_ENABLE
63 #undef SSC_FRAME_INT_ENABLE
64 #endif
65
66 #define not_yet
67
68 #define SPI_VINETIC
69
70
71
72 /* allow the user to set the major device number */
73 static int maj = 0;
74
75 /*
76 * This is the per-channel data structure containing pointers, flags
77 * and variables for the port. This driver supports a maximum of PORT_CNT.
78 * isp is allocated in ifx_ssc_init() based on the chip version.
79 */
80 static struct ifx_ssc_port *isp;
81
82 /* prototypes for fops */
83 static ssize_t ifx_ssc_read (struct file *, char *, size_t, loff_t *);
84 static ssize_t ifx_ssc_write (struct file *, const char *, size_t, loff_t *);
85 //static unsigned int ifx_ssc_poll(struct file *, struct poll_table_struct *);
86 int ifx_ssc_ioctl (struct inode *, struct file *, unsigned int,
87 unsigned long);
88 int ifx_ssc_open (struct inode *, struct file *);
89 int ifx_ssc_close (struct inode *, struct file *);
90
91 /* other forward declarations */
92 static unsigned int ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info);
93 #ifdef SSC_FRAME_INT_ENABLE
94 static void ifx_ssc_frm_int (int, void *, struct pt_regs *);
95 #endif
96 static void tx_int (struct ifx_ssc_port *);
97 static int ifx_ssc1_read_proc (char *, char **, off_t, int, int *, void *);
98 static void ifx_gpio_init (void);
99 /************************************************************************
100 * Function declaration
101 ************************************************************************/
102 //interrupt.c
103 extern unsigned int danube_get_fpi_hz (void);
104 extern void disable_danube_irq (unsigned int irq_nr);
105 extern void enable_danube_irq (unsigned int irq_nr);
106 extern void mask_and_ack_danube_irq (unsigned int irq_nr);
107
108 /*****************************************************************/
109 typedef struct {
110 int (*request) (unsigned int, irq_handler_t handler,
111 unsigned long, const char *, void *);
112 void (*free) (unsigned int irq, void *dev_id);
113 void (*enable) (unsigned int irq);
114 void (*disable) (unsigned int irq);
115 void (*clear) (unsigned int irq);
116 } ifx_int_wrapper_t;
117
118 static ifx_int_wrapper_t ifx_int_wrapper = {
119 request:request_irq, // IM action: enable int
120 free:free_irq, // IM action: disable int
121 enable:enable_danube_irq,
122 disable:disable_danube_irq,
123 clear:mask_and_ack_danube_irq,
124 //end:
125 };
126
127 /* Fops-struct */
128 static struct file_operations ifx_ssc_fops = {
129 owner:THIS_MODULE,
130 read:ifx_ssc_read, /* read */
131 write:ifx_ssc_write, /* write */
132 // poll: ifx_ssc_poll, /* poll */
133 ioctl:ifx_ssc_ioctl, /* ioctl */
134 open:ifx_ssc_open, /* open */
135 release:ifx_ssc_close, /* release */
136 };
137
138 static inline unsigned int
139 ifx_ssc_get_kernel_clk (struct ifx_ssc_port *info)
140 { // ATTENTION: This function assumes that the CLC register is set with the
141 // appropriate value for RMC.
142 unsigned int rmc;
143
144 rmc = (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_CLC) &
145 IFX_CLC_RUN_DIVIDER_MASK) >> IFX_CLC_RUN_DIVIDER_OFFSET;
146 if (rmc == 0) {
147 printk ("ifx_ssc_get_kernel_clk rmc==0 \n");
148 return (0);
149 }
150 return (danube_get_fpi_hz () / rmc);
151 }
152
153 #ifndef not_yet
154 #ifdef IFX_SSC_INT_USE_BH
155 /*
156 * This routine is used by the interrupt handler to schedule
157 * processing in the software interrupt portion of the driver
158 * (also known as the "bottom half"). This can be called any
159 * number of times for any channel without harm.
160 */
161 static inline void
162 ifx_ssc_sched_event (struct ifx_ssc_port *info, int event)
163 {
164 info->event |= 1 << event; /* remember what kind of event and who */
165 queue_task (&info->tqueue, &tq_cyclades); /* it belongs to */
166 mark_bh (CYCLADES_BH); /* then trigger event */
167 } /* ifx_ssc_sched_event */
168
169 /*
170 * This routine is used to handle the "bottom half" processing for the
171 * serial driver, known also the "software interrupt" processing.
172 * This processing is done at the kernel interrupt level, after the
173 * cy#/_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
174 * is where time-consuming activities which can not be done in the
175 * interrupt driver proper are done; the interrupt driver schedules
176 * them using ifx_ssc_sched_event(), and they get done here.
177 *
178 * This is done through one level of indirection--the task queue.
179 * When a hardware interrupt service routine wants service by the
180 * driver's bottom half, it enqueues the appropriate tq_struct (one
181 * per port) to the tq_cyclades work queue and sets a request flag
182 * via mark_bh for processing that queue. When the time is right,
183 * do_ifx_ssc_bh is called (because of the mark_bh) and it requests
184 * that the work queue be processed.
185 *
186 * Although this may seem unwieldy, it gives the system a way to
187 * pass an argument (in this case the pointer to the ifx_ssc_port
188 * structure) to the bottom half of the driver. Previous kernels
189 * had to poll every port to see if that port needed servicing.
190 */
191 static void
192 do_ifx_ssc_bh (void)
193 {
194 run_task_queue (&tq_cyclades);
195 } /* do_ifx_ssc_bh */
196
197 static void
198 do_softint (void *private_)
199 {
200 struct ifx_ssc_port *info = (struct ifx_ssc_port *) private_;
201
202 if (test_and_clear_bit (Cy_EVENT_HANGUP, &info->event)) {
203 wake_up_interruptible (&info->open_wait);
204 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CALLOUT_ACTIVE);
205 }
206 if (test_and_clear_bit (Cy_EVENT_OPEN_WAKEUP, &info->event)) {
207 wake_up_interruptible (&info->open_wait);
208 }
209 if (test_and_clear_bit (Cy_EVENT_DELTA_WAKEUP, &info->event)) {
210 wake_up_interruptible (&info->delta_msr_wait);
211 }
212 if (test_and_clear_bit (Cy_EVENT_WRITE_WAKEUP, &info->event)) {
213 wake_up_interruptible (&tty->write_wait);
214 }
215 #ifdef Z_WAKE
216 if (test_and_clear_bit (Cy_EVENT_SHUTDOWN_WAKEUP, &info->event)) {
217 wake_up_interruptible (&info->shutdown_wait);
218 }
219 #endif
220 } /* do_softint */
221 #endif /* IFX_SSC_INT_USE_BH */
222 #endif // not_yet
223
224 inline static void
225 rx_int (struct ifx_ssc_port *info)
226 {
227 int fifo_fill_lev, bytes_in_buf, i;
228 unsigned long tmp_val;
229 unsigned long *tmp_ptr;
230 unsigned int rx_valid_cnt;
231 /* number of words waiting in the RX FIFO */
232 fifo_fill_lev = (READ_PERIPHERAL_REGISTER (info->mapbase +
233 IFX_SSC_FSTAT) &
234 IFX_SSC_FSTAT_RECEIVED_WORDS_MASK) >>
235 IFX_SSC_FSTAT_RECEIVED_WORDS_OFFSET;
236 // Note: There are always 32 bits in a fifo-entry except for the last
237 // word of a contigous transfer block and except for not in rx-only
238 // mode and CON.ENBV set. But for this case it should be a convention
239 // in software which helps:
240 // In tx or rx/tx mode all transfers from the buffer to the FIFO are
241 // 32-bit wide, except for the last three bytes, which could be a
242 // combination of 16- and 8-bit access.
243 // => The whole block is received as 32-bit words as a contigous stream,
244 // even if there was a gap in tx which has the fifo run out of data!
245 // Just the last fifo entry *may* be partially filled (0, 1, 2 or 3 bytes)!
246
247 /* free space in the RX buffer */
248 bytes_in_buf = info->rxbuf_end - info->rxbuf_ptr;
249 // transfer with 32 bits per entry
250 while ((bytes_in_buf >= 4) && (fifo_fill_lev > 0)) {
251 tmp_ptr = (unsigned long *) info->rxbuf_ptr;
252 *tmp_ptr =
253 READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_RB);
254 info->rxbuf_ptr += 4;
255 info->stats.rxBytes += 4;
256 fifo_fill_lev--;
257 bytes_in_buf -= 4;
258 } // while ((bytes_in_buf >= 4) && (fifo_fill_lev > 0))
259 // now do the rest as mentioned in STATE.RXBV
260 while ((bytes_in_buf > 0) && (fifo_fill_lev > 0)) {
261 rx_valid_cnt =
262 (READ_PERIPHERAL_REGISTER
263 (info->mapbase +
264 IFX_SSC_STATE) & IFX_SSC_STATE_RX_BYTE_VALID_MASK)
265 >> IFX_SSC_STATE_RX_BYTE_VALID_OFFSET;
266 if (rx_valid_cnt == 0)
267 break;
268 if (rx_valid_cnt > bytes_in_buf) {
269 // ### TO DO: warning message: not block aligned data, other data
270 // in this entry will be lost
271 rx_valid_cnt = bytes_in_buf;
272 }
273 tmp_val =
274 READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_RB);
275
276 for (i = 0; i < rx_valid_cnt; i++) {
277 *info->rxbuf_ptr =
278 (tmp_val >> (8 * (rx_valid_cnt - i - 1))) &
279 0xff;
280 /*
281 *info->rxbuf_ptr = tmp_val & 0xff;
282 tmp_val >>= 8;
283 */
284 bytes_in_buf--;
285
286 info->rxbuf_ptr++;
287 }
288 info->stats.rxBytes += rx_valid_cnt;
289 } // while ((bytes_in_buf > 0) && (fifo_fill_lev > 0))
290
291 // check if transfer is complete
292 if (info->rxbuf_ptr >= info->rxbuf_end) {
293 ifx_int_wrapper.disable (info->rxirq);
294 /* wakeup any processes waiting in read() */
295 wake_up_interruptible (&info->rwait);
296 /* and in poll() */
297 //wake_up_interruptible(&info->pwait);
298 }
299 else if ((info->opts.modeRxTx == IFX_SSC_MODE_RX) &&
300 (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_RXCNT) ==
301 0)) {
302 // if buffer not filled completely and rx request done initiate new transfer
303 /*
304 if (info->rxbuf_end - info->rxbuf_ptr < 65536)
305 */
306 if (info->rxbuf_end - info->rxbuf_ptr <
307 IFX_SSC_RXREQ_BLOCK_SIZE)
308 WRITE_PERIPHERAL_REGISTER ((info->rxbuf_end -
309 info->
310 rxbuf_ptr) <<
311 IFX_SSC_RXREQ_RXCOUNT_OFFSET,
312 info->mapbase +
313 IFX_SSC_RXREQ);
314 else
315 WRITE_PERIPHERAL_REGISTER (IFX_SSC_RXREQ_BLOCK_SIZE <<
316 IFX_SSC_RXREQ_RXCOUNT_OFFSET,
317 info->mapbase +
318 IFX_SSC_RXREQ);
319 }
320 } // rx_int
321
322 inline static void
323 tx_int (struct ifx_ssc_port *info)
324 {
325
326 int fifo_space, fill, i;
327 fifo_space = ((READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_ID) &
328 IFX_SSC_PERID_TXFS_MASK) >> IFX_SSC_PERID_TXFS_OFFSET)
329 -
330 ((READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_FSTAT) &
331 IFX_SSC_FSTAT_TRANSMIT_WORDS_MASK) >>
332 IFX_SSC_FSTAT_TRANSMIT_WORDS_OFFSET);
333
334 if (fifo_space == 0)
335 return;
336
337 fill = info->txbuf_end - info->txbuf_ptr;
338
339 if (fill > fifo_space * 4)
340 fill = fifo_space * 4;
341
342 for (i = 0; i < fill / 4; i++) {
343 // at first 32 bit access
344 WRITE_PERIPHERAL_REGISTER (*(UINT32 *) info->txbuf_ptr,
345 info->mapbase + IFX_SSC_TB);
346 info->txbuf_ptr += 4;
347 }
348
349 fifo_space -= fill / 4;
350 info->stats.txBytes += fill & ~0x3;
351 fill &= 0x3;
352 if ((fifo_space > 0) & (fill > 1)) {
353 // trailing 16 bit access
354 WRITE_PERIPHERAL_REGISTER_16 (*(UINT16 *) info->txbuf_ptr,
355 info->mapbase + IFX_SSC_TB);
356 info->txbuf_ptr += 2;
357 info->stats.txBytes += 2;
358 fifo_space--;
359 /* added by bingtao */
360 fill -= 2;
361 }
362 if ((fifo_space > 0) & (fill > 0)) {
363 // trailing 8 bit access
364 WRITE_PERIPHERAL_REGISTER_8 (*(UINT8 *) info->txbuf_ptr,
365 info->mapbase + IFX_SSC_TB);
366 info->txbuf_ptr++;
367 info->stats.txBytes++;
368 /*
369 fifo_space --;
370 */
371 }
372
373 // check if transmission complete
374 if (info->txbuf_ptr >= info->txbuf_end) {
375 ifx_int_wrapper.disable (info->txirq);
376 kfree (info->txbuf);
377 info->txbuf = NULL;
378 /* wake up any process waiting in poll() */
379 //wake_up_interruptible(&info->pwait);
380 }
381
382 } // tx_int
383
384 irqreturn_t
385 ifx_ssc_rx_int (int irq, void *dev_id)
386 {
387 struct ifx_ssc_port *info = (struct ifx_ssc_port *) dev_id;
388 rx_int (info);
389
390 return IRQ_HANDLED;
391 }
392
393 irqreturn_t
394 ifx_ssc_tx_int (int irq, void *dev_id)
395 {
396 struct ifx_ssc_port *info = (struct ifx_ssc_port *) dev_id;
397 tx_int (info);
398
399 return IRQ_HANDLED;
400 }
401
402 irqreturn_t
403 ifx_ssc_err_int (int irq, void *dev_id)
404 {
405 struct ifx_ssc_port *info = (struct ifx_ssc_port *) dev_id;
406 unsigned int state;
407 unsigned int write_back = 0;
408 unsigned long flags;
409
410 local_irq_save (flags);
411 state = READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE);
412
413 if ((state & IFX_SSC_STATE_RX_UFL) != 0) {
414 info->stats.rxUnErr++;
415 write_back |= IFX_SSC_WHBSTATE_CLR_RX_UFL_ERROR;
416 }
417 if ((state & IFX_SSC_STATE_RX_OFL) != 0) {
418 info->stats.rxOvErr++;
419 write_back |= IFX_SSC_WHBSTATE_CLR_RX_OFL_ERROR;
420 }
421 if ((state & IFX_SSC_STATE_TX_OFL) != 0) {
422 info->stats.txOvErr++;
423 write_back |= IFX_SSC_WHBSTATE_CLR_TX_OFL_ERROR;
424 }
425 if ((state & IFX_SSC_STATE_TX_UFL) != 0) {
426 info->stats.txUnErr++;
427 write_back |= IFX_SSC_WHBSTATE_CLR_TX_UFL_ERROR;
428 }
429 // if ((state & IFX_SSC_STATE_ABORT_ERR) != 0) {
430 // info->stats.abortErr++;
431 // write_back |= IFX_SSC_WHBSTATE_CLR_ABORT_ERROR;
432 // }
433 if ((state & IFX_SSC_STATE_MODE_ERR) != 0) {
434 info->stats.modeErr++;
435 write_back |= IFX_SSC_WHBSTATE_CLR_MODE_ERROR;
436 }
437
438 if (write_back)
439 WRITE_PERIPHERAL_REGISTER (write_back,
440 info->mapbase + IFX_SSC_WHBSTATE);
441
442 local_irq_restore (flags);
443
444 return IRQ_HANDLED;
445 }
446
447 #ifdef SSC_FRAME_INT_ENABLE
448 static void
449 ifx_ssc_frm_int (int irq, void *dev_id, struct pt_regs *regs)
450 {
451 // ### TO DO: wake up framing wait-queue in conjunction with batch execution
452 }
453 #endif
454
455 static void
456 ifx_ssc_abort (struct ifx_ssc_port *info)
457 {
458 unsigned long flags;
459 bool enabled;
460
461 local_irq_save (flags);
462
463 // disable all int's
464 ifx_int_wrapper.disable (info->rxirq);
465 ifx_int_wrapper.disable (info->txirq);
466 ifx_int_wrapper.disable (info->errirq);
467 /*
468 ifx_int_wrapper.disable(info->frmirq);
469 */
470 local_irq_restore (flags);
471
472 // disable SSC (also aborts a receive request!)
473 // ### TO DO: Perhaps it's better to abort after the receiption of a
474 // complete word. The disable cuts the transmission immediatly and
475 // releases the chip selects. This could result in unpredictable
476 // behavior of connected external devices!
477 enabled = (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE)
478 & IFX_SSC_STATE_IS_ENABLED) != 0;
479 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ENABLE,
480 info->mapbase + IFX_SSC_WHBSTATE);
481
482 // flush fifos
483 WRITE_PERIPHERAL_REGISTER (IFX_SSC_XFCON_FIFO_FLUSH,
484 info->mapbase + IFX_SSC_TXFCON);
485 WRITE_PERIPHERAL_REGISTER (IFX_SSC_XFCON_FIFO_FLUSH,
486 info->mapbase + IFX_SSC_RXFCON);
487
488 // free txbuf
489 if (info->txbuf != NULL) {
490 kfree (info->txbuf);
491 info->txbuf = NULL;
492 }
493
494 // wakeup read process
495 if (info->rxbuf != NULL)
496 wake_up_interruptible (&info->rwait);
497
498 // clear pending int's
499 ifx_int_wrapper.clear (info->rxirq);
500 ifx_int_wrapper.clear (info->txirq);
501 ifx_int_wrapper.clear (info->errirq);
502 /*
503 ifx_int_wrapper.clear(info->frmirq);
504 */
505
506 // clear error flags
507 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR,
508 info->mapbase + IFX_SSC_WHBSTATE);
509
510 //printk("IFX SSC%d: Transmission aborted\n", info->port_nr);
511 // enable SSC
512 if (enabled)
513 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE,
514 info->mapbase + IFX_SSC_WHBSTATE);
515
516 } // ifx_ssc_abort
517
518 /*
519 * This routine is called whenever a port is opened. It enforces
520 * exclusive opening of a port and enables interrupts, etc.
521 */
522 int
523 ifx_ssc_open (struct inode *inode, struct file *filp)
524 {
525 struct ifx_ssc_port *info;
526 int line;
527 int from_kernel = 0;
528
529 if ((inode == (struct inode *) 0) || (inode == (struct inode *) 1)) {
530 from_kernel = 1;
531 line = (int) inode;
532 }
533 else {
534 line = MINOR (filp->f_dentry->d_inode->i_rdev);
535 filp->f_op = &ifx_ssc_fops;
536 }
537
538 /* don't open more minor devices than we can support */
539 if (line < 0 || line >= PORT_CNT)
540 return -ENXIO;
541
542 info = &isp[line];
543
544 /* exclusive open */
545 if (info->port_is_open != 0)
546 return -EBUSY;
547 info->port_is_open++;
548
549 ifx_int_wrapper.disable (info->rxirq);
550 ifx_int_wrapper.disable (info->txirq);
551 ifx_int_wrapper.disable (info->errirq);
552 /*
553 ifx_int_wrapper.disable(info->frmirq);
554 */
555
556 /* Flush and enable TX/RX FIFO */
557 WRITE_PERIPHERAL_REGISTER ((IFX_SSC_DEF_TXFIFO_FL <<
558 IFX_SSC_XFCON_ITL_OFFSET) |
559 IFX_SSC_XFCON_FIFO_FLUSH |
560 IFX_SSC_XFCON_FIFO_ENABLE,
561 info->mapbase + IFX_SSC_TXFCON);
562 WRITE_PERIPHERAL_REGISTER ((IFX_SSC_DEF_RXFIFO_FL <<
563 IFX_SSC_XFCON_ITL_OFFSET) |
564 IFX_SSC_XFCON_FIFO_FLUSH |
565 IFX_SSC_XFCON_FIFO_ENABLE,
566 info->mapbase + IFX_SSC_RXFCON);
567
568 /* logically flush the software FIFOs */
569 info->rxbuf_ptr = 0;
570 info->txbuf_ptr = 0;
571
572 /* clear all error bits */
573 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ALL_ERROR,
574 info->mapbase + IFX_SSC_WHBSTATE);
575
576 // clear pending interrupts
577 ifx_int_wrapper.clear (info->rxirq);
578 ifx_int_wrapper.clear (info->txirq);
579 ifx_int_wrapper.clear (info->errirq);
580 /*
581 ifx_int_wrapper.clear(info->frmirq);
582 */
583
584 // enable SSC
585 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE,
586 info->mapbase + IFX_SSC_WHBSTATE);
587
588 return 0;
589 } /* ifx_ssc_open */
590
591 EXPORT_SYMBOL (ifx_ssc_open);
592
593 /*
594 * This routine is called when a particular device is closed.
595 */
596 int
597 ifx_ssc_close (struct inode *inode, struct file *filp)
598 {
599 struct ifx_ssc_port *info;
600 int idx;
601
602 if ((inode == (struct inode *) 0) || (inode == (struct inode *) 1))
603 idx = (int) inode;
604 else
605 idx = MINOR (filp->f_dentry->d_inode->i_rdev);
606
607 if (idx < 0 || idx >= PORT_CNT)
608 return -ENXIO;
609
610 info = &isp[idx];
611 if (!info)
612 return -ENXIO;
613
614 // disable SSC
615 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ENABLE,
616 info->mapbase + IFX_SSC_WHBSTATE);
617
618 // call abort function to disable int's, flush fifos...
619 ifx_ssc_abort (info);
620
621 info->port_is_open--;
622
623 return 0;
624 } /* ifx_ssc_close */
625
626 EXPORT_SYMBOL (ifx_ssc_close);
627
628 /* added by bingtao */
629 /* helper routine to handle reads from the kernel or user-space */
630 /* info->rxbuf : never kfree and contains valid data */
631 /* should be points to NULL after copying data !!! */
632 static ssize_t
633 ifx_ssc_read_helper_poll (struct ifx_ssc_port *info, char *buf, size_t len,
634 int from_kernel)
635 {
636 ssize_t ret_val;
637 unsigned long flags;
638
639 if (info->opts.modeRxTx == IFX_SSC_MODE_TX)
640 return -EFAULT;
641 local_irq_save (flags);
642 info->rxbuf_ptr = info->rxbuf;
643 info->rxbuf_end = info->rxbuf + len;
644 local_irq_restore (flags);
645 /* Vinetic driver always works in IFX_SSC_MODE_RXTX */
646 /* TXRX in poll mode */
647 while (info->rxbuf_ptr < info->rxbuf_end) {
648 /* This is the key point, if you don't check this condition
649 kfree (NULL) will happen
650 because tx only need write into FIFO, it's much fast than rx
651 So when rx still waiting , tx already finish and release buf
652 */
653 if (info->txbuf_ptr < info->txbuf_end) {
654 tx_int (info);
655 }
656
657 rx_int (info);
658 };
659
660 ret_val = info->rxbuf_ptr - info->rxbuf;
661 return (ret_val);
662 } // ifx_ssc_read_helper_poll
663
664 /* helper routine to handle reads from the kernel or user-space */
665 /* info->rx_buf : never kfree and contains valid data */
666 /* should be points to NULL after copying data !!! */
667 static ssize_t
668 ifx_ssc_read_helper (struct ifx_ssc_port *info, char *buf, size_t len,
669 int from_kernel)
670 {
671 ssize_t ret_val;
672 unsigned long flags;
673 DECLARE_WAITQUEUE (wait, current);
674
675 if (info->opts.modeRxTx == IFX_SSC_MODE_TX)
676 return -EFAULT;
677 local_irq_save (flags);
678 info->rxbuf_ptr = info->rxbuf;
679 info->rxbuf_end = info->rxbuf + len;
680 if (info->opts.modeRxTx == IFX_SSC_MODE_RXTX) {
681 if ((info->txbuf == NULL) ||
682 (info->txbuf != info->txbuf_ptr) ||
683 (info->txbuf_end != len + info->txbuf)) {
684 local_irq_restore (flags);
685 printk ("IFX SSC - %s: write must be called before calling " "read in combined RX/TX!\n", __FUNCTION__);
686 return -EFAULT;
687 }
688 local_irq_restore (flags);
689 /* should enable tx, right? */
690 tx_int (info);
691 if (info->txbuf_ptr < info->txbuf_end) {
692 ifx_int_wrapper.enable (info->txirq);
693 }
694
695 ifx_int_wrapper.enable (info->rxirq);
696 }
697 else { // rx mode
698 local_irq_restore (flags);
699 if (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_RXCNT) &
700 IFX_SSC_RXCNT_TODO_MASK)
701 return -EBUSY;
702 ifx_int_wrapper.enable (info->rxirq);
703 // rx request limited to ' bytes
704 /*
705 if (len < 65536)
706 */
707 if (len < IFX_SSC_RXREQ_BLOCK_SIZE)
708 WRITE_PERIPHERAL_REGISTER (len <<
709 IFX_SSC_RXREQ_RXCOUNT_OFFSET,
710 info->mapbase +
711 IFX_SSC_RXREQ);
712 else
713 WRITE_PERIPHERAL_REGISTER (IFX_SSC_RXREQ_BLOCK_SIZE <<
714 IFX_SSC_RXREQ_RXCOUNT_OFFSET,
715 info->mapbase +
716 IFX_SSC_RXREQ);
717 }
718
719 __add_wait_queue (&info->rwait, &wait);
720 set_current_state (TASK_INTERRUPTIBLE);
721 // wakeup done in rx_int
722
723 do {
724 local_irq_save (flags);
725 if (info->rxbuf_ptr >= info->rxbuf_end)
726 break;
727 local_irq_restore (flags);
728
729 // if (filp->f_flags & O_NONBLOCK)
730 // {
731 // N = -EAGAIN;
732 // goto out;
733 // }
734 if (signal_pending (current)) {
735 ret_val = -ERESTARTSYS;
736 goto out;
737 }
738 schedule ();
739 } while (1);
740
741 ret_val = info->rxbuf_ptr - info->rxbuf; // should be equal to len
742 local_irq_restore (flags);
743
744 out:
745 current->state = TASK_RUNNING;
746 __remove_wait_queue (&info->rwait, &wait);
747 return (ret_val);
748 } // ifx_ssc_read_helper
749
750
751 /* helper routine to handle writes to the kernel or user-space */
752 /* info->txbuf has two cases:
753 * 1) return value < 0 (-EFAULT), not touched at all
754 * 2) kfree and points to NULL in interrupt routine (but maybe later )
755 */
756 static ssize_t
757 ifx_ssc_write_helper (struct ifx_ssc_port *info, const char *buf,
758 size_t len, int from_kernel)
759 {
760 // check if in tx or tx/rx mode
761 if (info->opts.modeRxTx == IFX_SSC_MODE_RX)
762 return -EFAULT;
763
764 info->txbuf_ptr = info->txbuf;
765 info->txbuf_end = len + info->txbuf;
766 /* start the transmission (not in rx/tx, see read helper) */
767 if (info->opts.modeRxTx == IFX_SSC_MODE_TX) {
768 tx_int (info);
769 if (info->txbuf_ptr < info->txbuf_end) {
770 ifx_int_wrapper.enable (info->txirq);
771 }
772 }
773 //local_irq_restore(flags);
774 return len;
775 }
776
777 /*
778 * kernel interfaces for read and write.
779 * The caller must set port to: n for SSC<m> with n=m-1 (e.g. n=0 for SSC1)
780 */
781 ssize_t
782 ifx_ssc_kread (int port, char *kbuf, size_t len)
783 {
784 struct ifx_ssc_port *info;
785 ssize_t ret_val;
786
787 if (port < 0 || port >= PORT_CNT)
788 return -ENXIO;
789
790 if (len == 0)
791 return 0;
792
793 info = &isp[port];
794
795 // check if reception in progress
796 if (info->rxbuf != NULL) {
797 printk ("SSC device busy\n");
798 return -EBUSY;
799 }
800
801 info->rxbuf = kbuf;
802 if (info->rxbuf == NULL) {
803 printk ("SSC device error\n");
804 return -EINVAL;
805 }
806
807 /* changed by bingtao */
808 /* change by TaiCheng */
809 //if (!in_irq()){
810 if (0) {
811 ret_val = ifx_ssc_read_helper (info, kbuf, len, 1);
812 }
813 else {
814 ret_val = ifx_ssc_read_helper_poll (info, kbuf, len, 1);
815 };
816 info->rxbuf = NULL;
817
818 // ### TO DO: perhaps warn if ret_val != len
819 ifx_int_wrapper.disable (info->rxirq);
820
821 return (ret_val);
822 } // ifx_ssc_kread
823
824 EXPORT_SYMBOL (ifx_ssc_kread);
825
826 ssize_t
827 ifx_ssc_kwrite (int port, const char *kbuf, size_t len)
828 {
829 struct ifx_ssc_port *info;
830 ssize_t ret_val;
831
832 if (port < 0 || port >= PORT_CNT)
833 return -ENXIO;
834
835 if (len == 0)
836 return 0;
837
838 info = &isp[port];
839
840 // check if transmission in progress
841 if (info->txbuf != NULL)
842 return -EBUSY;
843 info->txbuf = (char *) kbuf;
844
845 ret_val = ifx_ssc_write_helper (info, info->txbuf, len, 1);
846 if (ret_val < 0) {
847 info->txbuf = NULL;
848 }
849 return ret_val;
850 }
851
852 EXPORT_SYMBOL (ifx_ssc_kwrite);
853
854 /*
855 * user interfaces to read and write
856 */
857 static ssize_t
858 ifx_ssc_read (struct file *filp, char *ubuf, size_t len, loff_t * off)
859 {
860 ssize_t ret_val;
861 int idx;
862 struct ifx_ssc_port *info;
863
864 /*
865 if (len == 0)
866 return (0);
867 */
868 idx = MINOR (filp->f_dentry->d_inode->i_rdev);
869 info = &isp[idx];
870
871 // check if reception in progress
872 if (info->rxbuf != NULL)
873 return -EBUSY;
874
875 info->rxbuf = kmalloc (len + 3, GFP_KERNEL);
876 if (info->rxbuf == NULL)
877 return -ENOMEM;
878
879 ret_val = ifx_ssc_read_helper (info, info->rxbuf, len, 0);
880 // ### TO DO: perhaps warn if ret_val != len
881 if (copy_to_user ((void *) ubuf, info->rxbuf, ret_val) != 0)
882 ret_val = -EFAULT;
883
884 ifx_int_wrapper.disable (info->rxirq);
885
886 kfree (info->rxbuf);
887 info->rxbuf = NULL;
888 return (ret_val);
889 } // ifx_ssc_read
890
891 /*
892 * As many bytes as we have free space for are copied from the user
893 * into txbuf and the actual byte count is returned. The transmission is
894 * always kicked off by calling the appropriate TX routine.
895 */
896 static ssize_t
897 ifx_ssc_write (struct file *filp, const char *ubuf, size_t len, loff_t * off)
898 {
899 int idx;
900 struct ifx_ssc_port *info;
901 int ret_val;
902
903 if (len == 0)
904 return (0);
905
906 idx = MINOR (filp->f_dentry->d_inode->i_rdev);
907 info = &isp[idx];
908
909 // check if transmission in progress
910 if (info->txbuf != NULL)
911 return -EBUSY;
912
913 info->txbuf = kmalloc (len + 3, GFP_KERNEL);
914 if (info->txbuf == NULL)
915 return -ENOMEM;
916
917 ret_val = copy_from_user (info->txbuf, ubuf, len);
918 if (ret_val == 0)
919 ret_val = ifx_ssc_write_helper (info, info->txbuf, len, 0);
920 else
921 ret_val = -EFAULT;
922 if (ret_val < 0) {
923 kfree (info->txbuf); // otherwise will be done in ISR
924 info->txbuf = NULL;
925 }
926 return (ret_val);
927 } /* ifx_ssc_write */
928
929 /*
930 * ------------------------------------------------------------
931 * ifx_ssc_ioctl() and friends
932 * ------------------------------------------------------------
933 */
934
935 /*-----------------------------------------------------------------------------
936 FUNC-NAME : ifx_ssc_frm_status_get
937 LONG-NAME : framing status get
938 PURPOSE : Get the actual status of the framing.
939
940 PARAMETER : *info pointer to the port-specific structure ifx_ssc_port.
941
942 RESULT : pointer to a structure ifx_ssc_frm_status which holds busy and
943 count values.
944
945 REMARKS : Returns a register value independent of framing is enabled or
946 not! Changes structure inside of info, so the return value isn't
947 needed at all, but could be used for simple access.
948 -----------------------------------------------------------------------------*/
949 static struct ifx_ssc_frm_status *
950 ifx_ssc_frm_status_get (struct ifx_ssc_port *info)
951 {
952 unsigned long tmp;
953
954 tmp = READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_SFSTAT);
955 info->frm_status.DataBusy = (tmp & IFX_SSC_SFSTAT_IN_DATA) > 0;
956 info->frm_status.PauseBusy = (tmp & IFX_SSC_SFSTAT_IN_PAUSE) > 0;
957 info->frm_status.DataCount = (tmp & IFX_SSC_SFSTAT_DATA_COUNT_MASK)
958 >> IFX_SSC_SFSTAT_DATA_COUNT_OFFSET;
959 info->frm_status.PauseCount = (tmp & IFX_SSC_SFSTAT_PAUSE_COUNT_MASK)
960 >> IFX_SSC_SFSTAT_PAUSE_COUNT_OFFSET;
961 tmp = READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_SFCON);
962 info->frm_status.EnIntAfterData =
963 (tmp & IFX_SSC_SFCON_FIR_ENABLE_BEFORE_PAUSE) > 0;
964 info->frm_status.EnIntAfterPause =
965 (tmp & IFX_SSC_SFCON_FIR_ENABLE_AFTER_PAUSE) > 0;
966 return (&info->frm_status);
967 } // ifx_ssc_frm_status_get
968
969 /*-----------------------------------------------------------------------------
970 FUNC-NAME : ifx_ssc_frm_control_get
971 LONG-NAME : framing control get
972 PURPOSE : Get the actual control values of the framing.
973
974 PARAMETER : *info pointer to the port-specific structure ifx_ssc_port.
975
976 RESULT : pointer to a structure ifx_ssc_frm_opts which holds control bits
977 and count reload values.
978
979 REMARKS : Changes structure inside of info, so the return value isn't
980 needed at all, but could be used for simple access.
981 -----------------------------------------------------------------------------*/
982 static struct ifx_ssc_frm_opts *
983 ifx_ssc_frm_control_get (struct ifx_ssc_port *info)
984 {
985 unsigned long tmp;
986
987 tmp = READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_SFCON);
988 info->frm_opts.FrameEnable = (tmp & IFX_SSC_SFCON_SF_ENABLE) > 0;
989 info->frm_opts.DataLength = (tmp & IFX_SSC_SFCON_DATA_LENGTH_MASK)
990 >> IFX_SSC_SFCON_DATA_LENGTH_OFFSET;
991 info->frm_opts.PauseLength = (tmp & IFX_SSC_SFCON_PAUSE_LENGTH_MASK)
992 >> IFX_SSC_SFCON_PAUSE_LENGTH_OFFSET;
993 info->frm_opts.IdleData = (tmp & IFX_SSC_SFCON_PAUSE_DATA_MASK)
994 >> IFX_SSC_SFCON_PAUSE_DATA_OFFSET;
995 info->frm_opts.IdleClock = (tmp & IFX_SSC_SFCON_PAUSE_CLOCK_MASK)
996 >> IFX_SSC_SFCON_PAUSE_CLOCK_OFFSET;
997 info->frm_opts.StopAfterPause =
998 (tmp & IFX_SSC_SFCON_STOP_AFTER_PAUSE) > 0;
999 return (&info->frm_opts);
1000 } // ifx_ssc_frm_control_get
1001
1002 /*-----------------------------------------------------------------------------
1003 FUNC-NAME : ifx_ssc_frm_control_set
1004 LONG-NAME : framing control set
1005 PURPOSE : Set the actual control values of the framing.
1006
1007 PARAMETER : *info pointer to the port-specific structure ifx_ssc_port.
1008
1009 RESULT : pointer to a structure ifx_ssc_frm_opts which holds control bits
1010 and count reload values.
1011
1012 REMARKS :
1013 -----------------------------------------------------------------------------*/
1014 static int
1015 ifx_ssc_frm_control_set (struct ifx_ssc_port *info)
1016 {
1017 unsigned long tmp;
1018
1019 // check parameters
1020 if ((info->frm_opts.DataLength > IFX_SSC_SFCON_DATA_LENGTH_MAX) ||
1021 (info->frm_opts.DataLength < 1) ||
1022 (info->frm_opts.PauseLength > IFX_SSC_SFCON_PAUSE_LENGTH_MAX) ||
1023 (info->frm_opts.PauseLength < 1) ||
1024 ((info->frm_opts.IdleData & ~(IFX_SSC_SFCON_PAUSE_DATA_MASK >>
1025 IFX_SSC_SFCON_PAUSE_DATA_OFFSET)) !=
1026 0)
1027 ||
1028 ((info->frm_opts.
1029 IdleClock & ~(IFX_SSC_SFCON_PAUSE_CLOCK_MASK >>
1030 IFX_SSC_SFCON_PAUSE_CLOCK_OFFSET)) != 0))
1031 return -EINVAL;
1032
1033 // read interrupt bits (they're not changed here)
1034 tmp = READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_SFCON) &
1035 (IFX_SSC_SFCON_FIR_ENABLE_BEFORE_PAUSE |
1036 IFX_SSC_SFCON_FIR_ENABLE_AFTER_PAUSE);
1037
1038 // set all values with respect to it's bit position (for data and pause
1039 // length set N-1)
1040 tmp = (info->frm_opts.DataLength -
1041 1) << IFX_SSC_SFCON_DATA_LENGTH_OFFSET;
1042 tmp |= (info->frm_opts.PauseLength -
1043 1) << IFX_SSC_SFCON_PAUSE_LENGTH_OFFSET;
1044 tmp |= info->frm_opts.IdleData << IFX_SSC_SFCON_PAUSE_DATA_OFFSET;
1045 tmp |= info->frm_opts.IdleClock << IFX_SSC_SFCON_PAUSE_CLOCK_OFFSET;
1046 tmp |= info->frm_opts.FrameEnable * IFX_SSC_SFCON_SF_ENABLE;
1047 tmp |= info->frm_opts.StopAfterPause * IFX_SSC_SFCON_STOP_AFTER_PAUSE;
1048
1049 WRITE_PERIPHERAL_REGISTER (tmp, info->mapbase + IFX_SSC_SFCON);
1050
1051 return 0;
1052 } // ifx_ssc_frm_control_set
1053
1054 /*-----------------------------------------------------------------------------
1055 FUNC-NAME : ifx_ssc_rxtx_mode_set
1056 LONG-NAME : rxtx mode set
1057 PURPOSE : Set the transmission mode.
1058
1059 PARAMETER : *info pointer to the port-specific structure ifx_ssc_port.
1060
1061 RESULT : Returns error code
1062
1063 REMARKS : Assumes that SSC not used (SSC disabled, device not opened yet
1064 or just closed)
1065 -----------------------------------------------------------------------------*/
1066 static int
1067 ifx_ssc_rxtx_mode_set (struct ifx_ssc_port *info, unsigned int val)
1068 {
1069 unsigned long tmp;
1070
1071 // check parameters
1072 if (!(info) || (val & ~(IFX_SSC_MODE_MASK)))
1073 return -EINVAL;
1074 /*check BUSY and RXCNT */
1075 if (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE) &
1076 IFX_SSC_STATE_BUSY
1077 || READ_PERIPHERAL_REGISTER (info->mapbase +
1078 IFX_SSC_RXCNT) &
1079 IFX_SSC_RXCNT_TODO_MASK)
1080 return -EBUSY;
1081 // modify
1082 tmp = (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_CON) &
1083 ~(IFX_SSC_CON_RX_OFF | IFX_SSC_CON_TX_OFF)) | (val);
1084 WRITE_PERIPHERAL_REGISTER (tmp, info->mapbase + IFX_SSC_CON);
1085 info->opts.modeRxTx = val;
1086 /*
1087 printk(KERN_DEBUG "IFX SSC%d: Setting mode to %s%s\n",
1088 info->port_nr,
1089 ((val & IFX_SSC_CON_RX_OFF) == 0) ? "rx ":"",
1090 ((val & IFX_SSC_CON_TX_OFF) == 0) ? "tx":"");
1091 */
1092 return 0;
1093 } // ifx_ssc_rxtx_mode_set
1094
1095 void
1096 ifx_gpio_init (void)
1097 {
1098 /* TODO: P0.9 SPI_CS4, P0.10 SPI_CS5, P 0.11 SPI_CS6, because of ASC0 */
1099 /* p0.15 SPI_CS1(EEPROM), P0.13 SPI_CS3, */
1100 /* Set p0.15 to alternative 01, others to 00 (In/OUT) */
1101 *(DANUBE_GPIO_P0_DIR) = (*DANUBE_GPIO_P0_DIR) | (0xA000);
1102 *(DANUBE_GPIO_P0_ALTSEL0) =
1103 (((*DANUBE_GPIO_P0_ALTSEL0) | (0x8000)) & (~(0x2000)));
1104 *(DANUBE_GPIO_P0_ALTSEL1) =
1105 (((*DANUBE_GPIO_P0_ALTSEL1) & (~0x8000)) & (~(0x2000)));
1106 *(DANUBE_GPIO_P0_OD) = (*DANUBE_GPIO_P0_OD) | 0xA000;
1107
1108 /* p1.6 SPI_CS2(SFLASH), p1.0 SPI_DIN, p1.1 SPI_DOUT, p1.2 SPI_CLK */
1109 *(DANUBE_GPIO_P1_DIR) = ((*DANUBE_GPIO_P1_DIR) | (0x46)) & (~1);
1110 *(DANUBE_GPIO_P1_ALTSEL0) = ((*DANUBE_GPIO_P1_ALTSEL0) | (0x47));
1111 *(DANUBE_GPIO_P1_ALTSEL1) = (*DANUBE_GPIO_P1_ALTSEL1) & (~0x47);
1112 *(DANUBE_GPIO_P1_OD) = (*DANUBE_GPIO_P1_OD) | 0x0046;
1113
1114 /*CS3 */
1115 /*TODO: CS4 CS5 CS6 */
1116 *DANUBE_GPIO_P0_OUT = ((*DANUBE_GPIO_P0_OUT) | 0x2000);
1117
1118 }
1119
1120 /*
1121 * This routine intializes the SSC appropriately depending
1122 * on slave/master and full-/half-duplex mode.
1123 * It assumes that the SSC is disabled and the fifo's and buffers
1124 * are flushes later on.
1125 */
1126 static int
1127 ifx_ssc_sethwopts (struct ifx_ssc_port *info)
1128 {
1129 unsigned long flags, bits;
1130 struct ifx_ssc_hwopts *opts = &info->opts;
1131
1132 /* sanity checks */
1133 if ((opts->dataWidth < IFX_SSC_MIN_DATA_WIDTH) ||
1134 (opts->dataWidth > IFX_SSC_MAX_DATA_WIDTH)) {
1135 printk ("%s: sanity check failed\n", __FUNCTION__);
1136 return -EINVAL;
1137 }
1138 bits = (opts->dataWidth - 1) << IFX_SSC_CON_DATA_WIDTH_OFFSET;
1139 bits |= IFX_SSC_CON_ENABLE_BYTE_VALID;
1140 // if (opts->abortErrDetect)
1141 // bits |= IFX_SSC_CON_ABORT_ERR_CHECK;
1142 if (opts->rxOvErrDetect)
1143 bits |= IFX_SSC_CON_RX_OFL_CHECK;
1144 if (opts->rxUndErrDetect)
1145 bits |= IFX_SSC_CON_RX_UFL_CHECK;
1146 if (opts->txOvErrDetect)
1147 bits |= IFX_SSC_CON_TX_OFL_CHECK;
1148 if (opts->txUndErrDetect)
1149 bits |= IFX_SSC_CON_TX_UFL_CHECK;
1150 if (opts->loopBack)
1151 bits |= IFX_SSC_CON_LOOPBACK_MODE;
1152 if (opts->echoMode)
1153 bits |= IFX_SSC_CON_ECHO_MODE_ON;
1154 if (opts->headingControl)
1155 bits |= IFX_SSC_CON_MSB_FIRST;
1156 if (opts->clockPhase)
1157 bits |= IFX_SSC_CON_LATCH_THEN_SHIFT;
1158 if (opts->clockPolarity)
1159 bits |= IFX_SSC_CON_CLOCK_FALL;
1160 switch (opts->modeRxTx) {
1161 case IFX_SSC_MODE_TX:
1162 bits |= IFX_SSC_CON_RX_OFF;
1163 break;
1164 case IFX_SSC_MODE_RX:
1165 bits |= IFX_SSC_CON_TX_OFF;
1166 break;
1167 } // switch (opts->modeRxT)
1168 local_irq_save (flags);
1169 WRITE_PERIPHERAL_REGISTER (bits, info->mapbase + IFX_SSC_CON);
1170 WRITE_PERIPHERAL_REGISTER ((info->opts.
1171 gpoCs << IFX_SSC_GPOCON_ISCSB0_POS) |
1172 (info->opts.
1173 gpoInv << IFX_SSC_GPOCON_INVOUT0_POS),
1174 info->mapbase + IFX_SSC_GPOCON);
1175 /*TODO: disable cs */
1176 WRITE_PERIPHERAL_REGISTER (info->opts.
1177 gpoCs << IFX_SSC_WHBGPOSTAT_SETOUT0_POS,
1178 info->mapbase + IFX_SSC_WHBGPOSTAT);
1179
1180 //master mode
1181 if (opts->masterSelect) {
1182 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_MASTER_SELECT,
1183 info->mapbase + IFX_SSC_WHBSTATE);
1184 }
1185 else {
1186 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_MASTER_SELECT,
1187 info->mapbase + IFX_SSC_WHBSTATE);
1188 }
1189 // init serial framing
1190 WRITE_PERIPHERAL_REGISTER (0, info->mapbase + IFX_SSC_SFCON);
1191 /* set up the port pins */
1192 //check for general requirements to switch (external) pad/pin characteristics
1193 ifx_gpio_init ();
1194 local_irq_restore (flags);
1195
1196 return 0;
1197 } // ifx_ssc_sethwopts
1198
1199 static int
1200 ifx_ssc_set_baud (struct ifx_ssc_port *info, unsigned int baud)
1201 {
1202 unsigned int ifx_ssc_clock;
1203 unsigned int br;
1204 unsigned long flags;
1205 bool enabled;
1206
1207 ifx_ssc_clock = ifx_ssc_get_kernel_clk (info);
1208 if (ifx_ssc_clock == 0)
1209 return -EINVAL;
1210 local_irq_save (flags);
1211 /* have to disable the SSC to set the baudrate */
1212 enabled = (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE)
1213 & IFX_SSC_STATE_IS_ENABLED) != 0;
1214 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ENABLE,
1215 info->mapbase + IFX_SSC_WHBSTATE);
1216
1217 // compute divider
1218 br = (((ifx_ssc_clock >> 1) + baud / 2) / baud) - 1;
1219 asm ("SYNC");
1220 if (br > 0xffff ||
1221 ((br == 0) &&
1222 ((READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE) &
1223 IFX_SSC_STATE_IS_MASTER) == 0))) {
1224 local_irq_restore (flags);
1225 printk ("%s: illegal baudrate %u\n", __FUNCTION__, baud);
1226 return -EINVAL;
1227 }
1228 WRITE_PERIPHERAL_REGISTER (br, info->mapbase + IFX_SSC_BR);
1229 if (enabled)
1230 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE,
1231 info->mapbase + IFX_SSC_WHBSTATE);
1232
1233 local_irq_restore (flags);
1234 return 0;
1235 } // ifx_ssc_set_baud
1236
1237 static int
1238 ifx_ssc_hwinit (struct ifx_ssc_port *info)
1239 {
1240 unsigned long flags;
1241 bool enabled;
1242
1243 /* have to disable the SSC */
1244 enabled = (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE)
1245 & IFX_SSC_STATE_IS_ENABLED) != 0;
1246 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ENABLE,
1247 info->mapbase + IFX_SSC_WHBSTATE);
1248
1249 if (ifx_ssc_sethwopts (info) < 0) {
1250 printk ("%s: setting the hardware options failed\n",
1251 __FUNCTION__);
1252 return -EINVAL;
1253 }
1254
1255 if (ifx_ssc_set_baud (info, info->baud) < 0) {
1256 printk ("%s: setting the baud rate failed\n", __FUNCTION__);
1257 return -EINVAL;
1258 }
1259 local_irq_save (flags);
1260 /* TX FIFO */
1261 WRITE_PERIPHERAL_REGISTER ((IFX_SSC_DEF_TXFIFO_FL <<
1262 IFX_SSC_XFCON_ITL_OFFSET) |
1263 IFX_SSC_XFCON_FIFO_ENABLE,
1264 info->mapbase + IFX_SSC_TXFCON);
1265 /* RX FIFO */
1266 WRITE_PERIPHERAL_REGISTER ((IFX_SSC_DEF_RXFIFO_FL <<
1267 IFX_SSC_XFCON_ITL_OFFSET) |
1268 IFX_SSC_XFCON_FIFO_ENABLE,
1269 info->mapbase + IFX_SSC_RXFCON);
1270 local_irq_restore (flags);
1271 if (enabled)
1272 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_SET_ENABLE,
1273 info->mapbase + IFX_SSC_WHBSTATE);
1274 return 0;
1275 } // ifx_ssc_hwinit
1276
1277 /*-----------------------------------------------------------------------------
1278 FUNC-NAME : ifx_ssc_batch_exec
1279 LONG-NAME :
1280 PURPOSE :
1281
1282 PARAMETER : *info pointer to the port-specific structure ifx_ssc_port.
1283
1284 RESULT : Returns error code
1285
1286 REMARKS :
1287 -----------------------------------------------------------------------------*/
1288 static int
1289 ifx_ssc_batch_exec (struct ifx_ssc_port *info,
1290 struct ifx_ssc_batch_list *batch_anchor)
1291 {
1292 // ### TO DO: implement user space batch execution
1293 // first, copy the whole linked list from user to kernel space
1294 // save some hardware options
1295 // execute list
1296 // restore hardware options if selected
1297 return -EFAULT;
1298 } // ifx_ssc_batch_exec
1299
1300 /*
1301 * This routine allows the driver to implement device-
1302 * specific ioctl's. If the ioctl number passed in cmd is
1303 * not recognized by the driver, it should return ENOIOCTLCMD.
1304 */
1305 int
1306 ifx_ssc_ioctl (struct inode *inode, struct file *filp, unsigned int cmd,
1307 unsigned long data)
1308 {
1309 struct ifx_ssc_port *info;
1310 int line, ret_val = 0;
1311 unsigned long flags;
1312 unsigned long tmp;
1313 int from_kernel = 0;
1314
1315 if ((inode == (struct inode *) 0) || (inode == (struct inode *) 1)) {
1316 from_kernel = 1;
1317 line = (int) inode;
1318 }
1319 else
1320 line = MINOR (filp->f_dentry->d_inode->i_rdev);
1321
1322 /* don't use more minor devices than we can support */
1323 if (line < 0 || line >= PORT_CNT)
1324 return -ENXIO;
1325
1326 info = &isp[line];
1327
1328 switch (cmd) {
1329 case IFX_SSC_STATS_READ:
1330 /* data must be a pointer to a struct ifx_ssc_statistics */
1331 if (from_kernel)
1332 memcpy ((void *) data, (void *) &info->stats,
1333 sizeof (struct ifx_ssc_statistics));
1334 else if (copy_to_user ((void *) data,
1335 (void *) &info->stats,
1336 sizeof (struct ifx_ssc_statistics)))
1337 ret_val = -EFAULT;
1338 break;
1339 case IFX_SSC_STATS_RESET:
1340 /* just resets the statistics counters */
1341 memset ((void *) &info->stats, 0,
1342 sizeof (struct ifx_ssc_statistics));
1343 break;
1344 case IFX_SSC_BAUD_SET:
1345 /* if the buffers are not empty then the port is */
1346 /* busy and we shouldn't change things on-the-fly! */
1347 if (!info->txbuf || !info->rxbuf ||
1348 (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE)
1349 & IFX_SSC_STATE_BUSY)) {
1350 ret_val = -EBUSY;
1351 break;
1352 }
1353 /* misuse flags */
1354 if (from_kernel)
1355 flags = *((unsigned long *) data);
1356 else if (copy_from_user ((void *) &flags,
1357 (void *) data, sizeof (flags))) {
1358 ret_val = -EFAULT;
1359 break;
1360 }
1361 if (flags == 0) {
1362 ret_val = -EINVAL;
1363 break;
1364 }
1365 if (ifx_ssc_set_baud (info, flags) < 0) {
1366 ret_val = -EINVAL;
1367 break;
1368 }
1369 info->baud = flags;
1370 break;
1371 case IFX_SSC_BAUD_GET:
1372 if (from_kernel)
1373 *((unsigned int *) data) = info->baud;
1374 else if (copy_to_user ((void *) data,
1375 (void *) &info->baud,
1376 sizeof (unsigned long)))
1377 ret_val = -EFAULT;
1378 break;
1379 case IFX_SSC_RXTX_MODE_SET:
1380 if (from_kernel)
1381 tmp = *((unsigned long *) data);
1382 else if (copy_from_user ((void *) &tmp,
1383 (void *) data, sizeof (tmp))) {
1384 ret_val = -EFAULT;
1385 break;
1386 }
1387 ret_val = ifx_ssc_rxtx_mode_set (info, tmp);
1388 break;
1389 case IFX_SSC_RXTX_MODE_GET:
1390 tmp = READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_CON) &
1391 (~(IFX_SSC_CON_RX_OFF | IFX_SSC_CON_TX_OFF));
1392 if (from_kernel)
1393 *((unsigned int *) data) = tmp;
1394 else if (copy_to_user ((void *) data,
1395 (void *) &tmp, sizeof (tmp)))
1396 ret_val = -EFAULT;
1397 break;
1398
1399 case IFX_SSC_ABORT:
1400 ifx_ssc_abort (info);
1401 break;
1402
1403 case IFX_SSC_GPO_OUT_SET:
1404 if (from_kernel)
1405 tmp = *((unsigned long *) data);
1406 else if (copy_from_user ((void *) &tmp,
1407 (void *) data, sizeof (tmp))) {
1408 ret_val = -EFAULT;
1409 break;
1410 }
1411 if (tmp > IFX_SSC_MAX_GPO_OUT)
1412 ret_val = -EINVAL;
1413 else
1414 WRITE_PERIPHERAL_REGISTER
1415 (1 << (tmp + IFX_SSC_WHBGPOSTAT_SETOUT0_POS),
1416 info->mapbase + IFX_SSC_WHBGPOSTAT);
1417 break;
1418 case IFX_SSC_GPO_OUT_CLR:
1419 if (from_kernel)
1420 tmp = *((unsigned long *) data);
1421 else if (copy_from_user ((void *) &tmp,
1422 (void *) data, sizeof (tmp))) {
1423 ret_val = -EFAULT;
1424 break;
1425 }
1426 if (tmp > IFX_SSC_MAX_GPO_OUT)
1427 ret_val = -EINVAL;
1428 else {
1429 WRITE_PERIPHERAL_REGISTER
1430 (1 << (tmp + IFX_SSC_WHBGPOSTAT_CLROUT0_POS),
1431 info->mapbase + IFX_SSC_WHBGPOSTAT);
1432 }
1433 break;
1434 case IFX_SSC_GPO_OUT_GET:
1435 tmp = READ_PERIPHERAL_REGISTER
1436 (info->mapbase + IFX_SSC_GPOSTAT);
1437 if (from_kernel)
1438 *((unsigned int *) data) = tmp;
1439 else if (copy_to_user ((void *) data,
1440 (void *) &tmp, sizeof (tmp)))
1441 ret_val = -EFAULT;
1442 break;
1443 case IFX_SSC_FRM_STATUS_GET:
1444 ifx_ssc_frm_status_get (info);
1445 if (from_kernel)
1446 memcpy ((void *) data, (void *) &info->frm_status,
1447 sizeof (struct ifx_ssc_frm_status));
1448 else if (copy_to_user ((void *) data,
1449 (void *) &info->frm_status,
1450 sizeof (struct ifx_ssc_frm_status)))
1451 ret_val = -EFAULT;
1452 break;
1453 case IFX_SSC_FRM_CONTROL_GET:
1454 ifx_ssc_frm_control_get (info);
1455 if (from_kernel)
1456 memcpy ((void *) data, (void *) &info->frm_opts,
1457 sizeof (struct ifx_ssc_frm_opts));
1458 else if (copy_to_user ((void *) data,
1459 (void *) &info->frm_opts,
1460 sizeof (struct ifx_ssc_frm_opts)))
1461 ret_val = -EFAULT;
1462 break;
1463 case IFX_SSC_FRM_CONTROL_SET:
1464 if (from_kernel)
1465 memcpy ((void *) &info->frm_opts, (void *) data,
1466 sizeof (struct ifx_ssc_frm_opts));
1467 else if (copy_to_user ((void *) &info->frm_opts,
1468 (void *) data,
1469 sizeof (struct ifx_ssc_frm_opts))) {
1470 ret_val = -EFAULT;
1471 break;
1472 }
1473 ret_val = ifx_ssc_frm_control_set (info);
1474 break;
1475 case IFX_SSC_HWOPTS_SET:
1476 /* data must be a pointer to a struct ifx_ssc_hwopts */
1477 /* if the buffers are not empty then the port is */
1478 /* busy and we shouldn't change things on-the-fly! */
1479 if (!info->txbuf || !info->rxbuf ||
1480 (READ_PERIPHERAL_REGISTER (info->mapbase + IFX_SSC_STATE)
1481 & IFX_SSC_STATE_BUSY)) {
1482 ret_val = -EBUSY;
1483 break;
1484 }
1485 if (from_kernel)
1486 memcpy ((void *) &info->opts, (void *) data,
1487 sizeof (struct ifx_ssc_hwopts));
1488 else if (copy_from_user ((void *) &info->opts,
1489 (void *) data,
1490 sizeof (struct ifx_ssc_hwopts))) {
1491 ret_val = -EFAULT;
1492 break;
1493 }
1494 if (ifx_ssc_hwinit (info) < 0) {
1495 ret_val = -EIO;
1496 }
1497 break;
1498 case IFX_SSC_HWOPTS_GET:
1499 /* data must be a pointer to a struct ifx_ssc_hwopts */
1500 if (from_kernel)
1501 memcpy ((void *) data, (void *) &info->opts,
1502 sizeof (struct ifx_ssc_hwopts));
1503 else if (copy_to_user ((void *) data,
1504 (void *) &info->opts,
1505 sizeof (struct ifx_ssc_hwopts)))
1506 ret_val = -EFAULT;
1507 break;
1508 default:
1509 ret_val = -ENOIOCTLCMD;
1510 }
1511
1512 return ret_val;
1513 } /* ifx_ssc_ioctl */
1514
1515 EXPORT_SYMBOL (ifx_ssc_ioctl);
1516
1517 ///* the poll routine */
1518 //static unsigned int
1519 //ifx_ssc_poll(struct file *filp, struct poll_table_struct *pts)
1520 //{
1521 // int unit = MINOR(filp->f_dentry->d_inode->i_rdev);
1522 // struct ifx_ssc_port *info;
1523 // unsigned int mask = 0;
1524 // int spc;
1525 //
1526 // info = &isp[unit];
1527 //
1528 // /* add event to the wait queues */
1529 // /* DO NOT FORGET TO DO A WAKEUP ON THESE !!!! */
1530 // poll_wait(filp, &info->pwait, pts);
1531 //
1532 // /* are there bytes in the RX SW-FIFO? */
1533 // if (info->rxrp != info->rxwp)
1534 // mask |= POLLIN | POLLRDNORM;
1535 //
1536 // /* free space in the TX SW-FIFO */
1537 // spc = info->txrp - info->txwp - 1;
1538 // if (spc < 0)
1539 // spc += TX_BUFSIZE;
1540 //#ifdef IFX_SSC_USEDMA
1541 // /* writing always works, except in the DMA case when all descriptors */
1542 // /* are used up */
1543 // if (unit == 1 && info->dma_freecnt == 0)
1544 // spc = 0;
1545 //#endif
1546 // if (spc > 0)
1547 // mask |= POLLOUT | POLLWRNORM;
1548 //
1549 // return (mask);
1550 //}
1551
1552 static int
1553 ifx_ssc1_read_proc (char *page, char **start, off_t offset, int count,
1554 int *eof, void *data)
1555 {
1556 int off = 0;
1557 unsigned long flags;
1558
1559 /* don't want any interrupts here */
1560 local_save_flags(flags);
1561 local_irq_disable();
1562
1563 /* print statistics */
1564 off += sprintf (page + off,
1565 "Statistics for Infineon Synchronous Serial Controller SSC1\n");
1566 off += sprintf (page + off, "RX overflow errors %d\n",
1567 isp[0].stats.rxOvErr);
1568 off += sprintf (page + off, "RX underflow errors %d\n",
1569 isp[0].stats.rxUnErr);
1570 off += sprintf (page + off, "TX overflow errors %d\n",
1571 isp[0].stats.txOvErr);
1572 off += sprintf (page + off, "TX underflow errors %d\n",
1573 isp[0].stats.txUnErr);
1574 off += sprintf (page + off, "Abort errors %d\n",
1575 isp[0].stats.abortErr);
1576 off += sprintf (page + off, "Mode errors %d\n", isp[0].stats.modeErr);
1577 off += sprintf (page + off, "RX Bytes %d\n", isp[0].stats.rxBytes);
1578 off += sprintf (page + off, "TX Bytes %d\n", isp[0].stats.txBytes);
1579
1580 local_irq_restore(flags); /* XXXXX */
1581 *eof = 1;
1582 return (off);
1583 }
1584
1585 /*
1586 * This routine prints out the appropriate serial driver version number
1587 */
1588 static inline void
1589 show_version (void)
1590 {
1591 #if 0
1592 printk ("Infineon Technologies Synchronous Serial Controller (SSC) driver\n" " version %s - built %s %s\n", IFX_SSC_DRV_VERSION, __DATE__, __TIME__);
1593 #endif
1594 } /* show_version */
1595
1596 /*
1597 * Due to the fact that a port can be dynamically switched between slave
1598 * and master mode using an IOCTL the hardware is not initialized here,
1599 * but in ifx_ssc_hwinit() as a result of an IOCTL.
1600 */
1601 int __init
1602 ifx_ssc_init (void)
1603 {
1604 struct ifx_ssc_port *info;
1605 int i, nbytes;
1606 unsigned long flags;
1607 int ret_val;
1608
1609 // ### TO DO: dynamic port count evaluation due to pin multiplexing
1610
1611 ret_val = -ENOMEM;
1612 nbytes = PORT_CNT * sizeof (struct ifx_ssc_port);
1613 isp = (struct ifx_ssc_port *) kmalloc (nbytes, GFP_KERNEL);
1614 if (isp == NULL) {
1615 printk ("%s: no memory for isp\n", __FUNCTION__);
1616 return (ret_val);
1617 }
1618 memset (isp, 0, nbytes);
1619
1620 show_version ();
1621
1622 /* register the device */
1623 ret_val = -ENXIO;
1624 /*
1625 i = maj;
1626 */
1627 if ((i = register_chrdev (maj, "ssc", &ifx_ssc_fops)) < 0) {
1628 printk ("Unable to register major %d for the Infineon SSC\n",
1629 maj);
1630 if (maj == 0) {
1631 goto errout;
1632 }
1633 else {
1634 maj = 0;
1635 if ((i =
1636 register_chrdev (maj, "ssc",
1637 &ifx_ssc_fops)) < 0) {
1638 printk ("Unable to register major %d for the Infineon SSC\n", maj);
1639 goto errout;
1640 }
1641 }
1642 }
1643 if (maj == 0)
1644 maj = i;
1645 //printk("registered major %d for Infineon SSC\n", maj);
1646
1647 /* set default values in ifx_ssc_port */
1648 for (i = 0; i < PORT_CNT; i++) {
1649 info = &isp[i];
1650 info->port_nr = i;
1651 /* default values for the HwOpts */
1652 info->opts.AbortErrDetect = IFX_SSC_DEF_ABRT_ERR_DETECT;
1653 info->opts.rxOvErrDetect = IFX_SSC_DEF_RO_ERR_DETECT;
1654 info->opts.rxUndErrDetect = IFX_SSC_DEF_RU_ERR_DETECT;
1655 info->opts.txOvErrDetect = IFX_SSC_DEF_TO_ERR_DETECT;
1656 info->opts.txUndErrDetect = IFX_SSC_DEF_TU_ERR_DETECT;
1657 info->opts.loopBack = IFX_SSC_DEF_LOOP_BACK;
1658 info->opts.echoMode = IFX_SSC_DEF_ECHO_MODE;
1659 info->opts.idleValue = IFX_SSC_DEF_IDLE_DATA;
1660 info->opts.clockPolarity = IFX_SSC_DEF_CLOCK_POLARITY;
1661 info->opts.clockPhase = IFX_SSC_DEF_CLOCK_PHASE;
1662 info->opts.headingControl = IFX_SSC_DEF_HEADING_CONTROL;
1663 info->opts.dataWidth = IFX_SSC_DEF_DATA_WIDTH;
1664 info->opts.modeRxTx = IFX_SSC_DEF_MODE_RXTX;
1665 info->opts.gpoCs = IFX_SSC_DEF_GPO_CS;
1666 info->opts.gpoInv = IFX_SSC_DEF_GPO_INV;
1667 info->opts.masterSelect = IFX_SSC_DEF_MASTERSLAVE;
1668 info->baud = IFX_SSC_DEF_BAUDRATE;
1669 info->rxbuf = NULL;
1670 info->txbuf = NULL;
1671 /* values specific to SSC1 */
1672 if (i == 0) {
1673 info->mapbase = DANUBE_SSC1_BASE_ADDR;
1674 // ### TO DO: power management
1675
1676 // setting interrupt vectors
1677 info->txirq = DANUBE_SSC_TIR;
1678 info->rxirq = DANUBE_SSC_RIR;
1679 info->errirq = DANUBE_SSC_EIR;
1680 /*
1681 info->frmirq = IFX_SSC_FIR;
1682 */
1683 }
1684 /* activate SSC */
1685 /* CLC.DISS = 0 */
1686 WRITE_PERIPHERAL_REGISTER (IFX_SSC_DEF_RMC <<
1687 IFX_CLC_RUN_DIVIDER_OFFSET,
1688 info->mapbase + IFX_SSC_CLC);
1689
1690 // ### TO DO: multiple instances
1691
1692 init_waitqueue_head (&info->rwait);
1693 //init_waitqueue_head(&info->pwait);
1694
1695 local_irq_save (flags);
1696
1697 // init serial framing register
1698 WRITE_PERIPHERAL_REGISTER (IFX_SSC_DEF_SFCON,
1699 info->mapbase + IFX_SSC_SFCON);
1700
1701 /* try to get the interrupts */
1702 // ### TO DO: interrupt handling with multiple instances
1703 ret_val =
1704 ifx_int_wrapper.request (info->txirq, ifx_ssc_tx_int, SA_INTERRUPT, "ifx_ssc_tx", info);
1705 if (ret_val) {
1706 printk ("%s: unable to get irq %d\n", __FUNCTION__,
1707 info->txirq);
1708 local_irq_restore (flags);
1709 goto errout;
1710 }
1711 ret_val =
1712 ifx_int_wrapper.request (info->rxirq, ifx_ssc_rx_int, SA_INTERRUPT, "ifx_ssc_rx", info);
1713 if (ret_val) {
1714 printk ("%s: unable to get irq %d\n", __FUNCTION__,
1715 info->rxirq);
1716 local_irq_restore (flags);
1717 goto irqerr;
1718 }
1719 ret_val =
1720 ifx_int_wrapper.request (info->errirq, ifx_ssc_err_int, SA_INTERRUPT,"ifx_ssc_err", info);
1721 if (ret_val) {
1722 printk ("%s: unable to get irq %d\n", __FUNCTION__,
1723 info->errirq);
1724 local_irq_restore (flags);
1725 goto irqerr;
1726 }
1727 /*
1728 ret_val = ifx_int_wrapper.request(info->frmirq, ifx_ssc_frm_int,
1729 0, "ifx_ssc_frm", info);
1730 if (ret_val){
1731 printk("%s: unable to get irq %d\n", __FUNCTION__,
1732 info->frmirq);
1733 local_irq_restore(flags);
1734 goto irqerr;
1735 }
1736
1737 */
1738 WRITE_PERIPHERAL_REGISTER (IFX_SSC_DEF_IRNEN,
1739 info->mapbase + IFX_SSC_IRN_EN);
1740 ifx_int_wrapper.enable (info->txirq);
1741 ifx_int_wrapper.enable (info->rxirq);
1742 ifx_int_wrapper.enable (info->errirq);
1743
1744 local_irq_restore (flags);
1745 } // for (i = 0; i < PORT_CNT; i++)
1746
1747 /* init the SSCs with default values */
1748 for (i = 0; i < PORT_CNT; i++) {
1749 info = &isp[i];
1750 if (ifx_ssc_hwinit (info) < 0) {
1751 printk ("%s: hardware init failed for port %d\n",
1752 __FUNCTION__, i);
1753 goto irqerr;
1754 }
1755 }
1756
1757 /* register /proc read handler */
1758 // ### TO DO: multiple instances
1759 /* for SSC1, which is always present */
1760 create_proc_read_entry ("driver/ssc1", 0, NULL, ifx_ssc1_read_proc,
1761 NULL);
1762 return 0;
1763
1764 irqerr:
1765 // ### TO DO: multiple instances
1766 ifx_int_wrapper.free (isp[0].txirq, &isp[0]);
1767 ifx_int_wrapper.free (isp[0].rxirq, &isp[0]);
1768 ifx_int_wrapper.free (isp[0].errirq, &isp[0]);
1769 /*
1770 ifx_int_wrapper.free(isp[0].frmirq, &isp[0]);
1771 */
1772 errout:
1773 /* free up any allocated memory in the error case */
1774 kfree (isp);
1775 return (ret_val);
1776 } /* ifx_ssc_init */
1777
1778 void
1779 ifx_ssc_cleanup_module (void)
1780 {
1781 int i;
1782
1783 /* free up any allocated memory */
1784 for (i = 0; i < PORT_CNT; i++) {
1785 /* disable the SSC */
1786 WRITE_PERIPHERAL_REGISTER (IFX_SSC_WHBSTATE_CLR_ENABLE,
1787 isp[i].mapbase + IFX_SSC_WHBSTATE);
1788 /* free the interrupts */
1789 ifx_int_wrapper.free (isp[i].txirq, &isp[i]);
1790 ifx_int_wrapper.free (isp[i].rxirq, &isp[i]);
1791 ifx_int_wrapper.free (isp[i].errirq, &isp[i]);
1792 /*
1793 ifx_int_wrapper.free(isp[i].frmirq, &isp[i]);
1794
1795 if (isp[i].rxbuf != NULL)
1796 kfree(isp[i].rxbuf);
1797 if (isp[i].txbuf != NULL)
1798 kfree(isp[i].txbuf);
1799 */
1800 }
1801 kfree (isp);
1802 /* unregister the device */
1803 // if (unregister_chrdev (maj, "ssc")) {
1804 // printk ("Unable to unregister major %d for the SSC\n", maj);
1805 // }
1806 /* delete /proc read handler */
1807 remove_proc_entry ("driver/ssc1", NULL);
1808 remove_proc_entry ("driver/ssc2", NULL);
1809 } /* ifx_ssc_cleanup_module */
1810
1811 module_exit (ifx_ssc_cleanup_module);
1812
1813 /* Module entry-points */
1814 module_init (ifx_ssc_init);
1815
1816 #ifndef MODULE
1817 static int __init
1818 ifx_ssc_set_maj (char *str)
1819 {
1820 maj = simple_strtol (str, NULL, 0);
1821 return 1;
1822 }
1823
1824 __setup ("ssc_maj=", ifx_ssc_set_maj);
1825 #endif /* !MODULE */
1826
1827 #define DANUBE_SSC_EMSG(fmt,arg...) printk("%s: "fmt,__FUNCTION__, ##arg)
1828 /* Brief: chip select enable
1829 */
1830 inline int
1831 ifx_ssc_cs_low (u32 pin)
1832 {
1833 int ret = 0;
1834 if ((ret =
1835 ifx_ssc_ioctl ((struct inode *) 0, NULL, IFX_SSC_GPO_OUT_CLR,
1836 (unsigned long) &pin))) {
1837 DANUBE_SSC_EMSG ("clear CS %d fails\n", pin);
1838 }
1839 wmb ();
1840 return ret;
1841 }
1842
1843 EXPORT_SYMBOL (ifx_ssc_cs_low);
1844 /* Brief: chip select disable
1845 */
1846 inline int
1847 ifx_ssc_cs_high (u32 pin)
1848 {
1849 int ret = 0;
1850 if ((ret =
1851 ifx_ssc_ioctl ((struct inode *) 0, NULL, IFX_SSC_GPO_OUT_SET,
1852 (unsigned long) &pin))) {
1853 DANUBE_SSC_EMSG ("set CS %d fails\n", pin);
1854 }
1855 wmb ();
1856 return ret;
1857 }
1858
1859 EXPORT_SYMBOL (ifx_ssc_cs_high);
1860 /* Brief: one SSC session
1861 * Parameter:
1862 * tx_buf
1863 * tx_len
1864 * rx_buf
1865 * rx_len
1866 * session_mode: IFX_SSC_MODE_RXTX or IFX_SSC_MODE_TX
1867 * Return: >=0 number of bytes received (if rx_buf != 0) or transmitted
1868 * <0 error code
1869 * Description:
1870 * 0. copy data to internal buffer
1871 * 1. Write command
1872 * 2a. If SSC_SESSION_MODE_TXONLY, read tx_len data
1873 * 2b. If not Read back (tx_len + rx_len) data
1874 * 3. copy internal buffer to rx buf if necessary
1875 */
1876 static int
1877 ssc_session (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
1878 {
1879 int ret = 0;
1880
1881 char *ssc_tx_buf = NULL;
1882 char *ssc_rx_buf = NULL;
1883
1884 // volatile char ssc_tx_buf[128]={0};
1885 // volatile char ssc_rx_buf[128]={0};
1886
1887 int eff_size = 0;
1888 u8 mode = 0;
1889
1890 if (tx_buf == NULL && tx_len == 0 && rx_buf == NULL && rx_len == 0) {
1891 DANUBE_SSC_EMSG ("invalid parameters\n");
1892 ret = -EINVAL;
1893 goto ssc_session_exit;
1894 }
1895 else if (tx_buf == NULL || tx_len == 0) {
1896 if (rx_buf != NULL && rx_len != 0) {
1897 mode = IFX_SSC_MODE_RX;
1898 }
1899 else {
1900 DANUBE_SSC_EMSG ("invalid parameters\n");
1901 ret = -EINVAL;
1902 goto ssc_session_exit;
1903 }
1904 }
1905 else if (rx_buf == NULL || rx_len == 0) {
1906 if (tx_buf != NULL && tx_len != 0) {
1907 mode = IFX_SSC_MODE_TX;
1908 }
1909 else {
1910 DANUBE_SSC_EMSG ("invalid parameters\n");
1911 ret = -EINVAL;
1912 goto ssc_session_exit;
1913 }
1914 }
1915 else {
1916 mode = IFX_SSC_MODE_RXTX;
1917 }
1918
1919 if (mode == IFX_SSC_MODE_RXTX) {
1920 eff_size = tx_len + rx_len;
1921 }
1922 else if (mode == IFX_SSC_MODE_RX) {
1923 eff_size = rx_len;
1924 }
1925 else {
1926 eff_size = tx_len;
1927 }
1928
1929 //4 bytes alignment, required by driver
1930 /* change by TaiCheng */
1931 //if (in_irq()){
1932 if (1) {
1933 ssc_tx_buf =
1934 (char *) kmalloc (sizeof (char) *
1935 ((eff_size + 3) & (~3)),
1936 GFP_ATOMIC);
1937 ssc_rx_buf =
1938 (char *) kmalloc (sizeof (char) *
1939 ((eff_size + 3) & (~3)),
1940 GFP_ATOMIC);
1941 }
1942 else {
1943 ssc_tx_buf =
1944 (char *) kmalloc (sizeof (char) *
1945 ((eff_size + 3) & (~3)),
1946 GFP_KERNEL);
1947 ssc_rx_buf =
1948 (char *) kmalloc (sizeof (char) *
1949 ((eff_size + 3) & (~3)),
1950 GFP_KERNEL);
1951 }
1952 if (ssc_tx_buf == NULL || ssc_rx_buf == NULL) {
1953 DANUBE_SSC_EMSG ("no memory for size of %d\n", eff_size);
1954 ret = -ENOMEM;
1955 goto ssc_session_exit;
1956 }
1957 memset ((void *) ssc_tx_buf, 0, eff_size);
1958 memset ((void *) ssc_rx_buf, 0, eff_size);
1959
1960 if (tx_len > 0) {
1961 memcpy (ssc_tx_buf, tx_buf, tx_len);
1962 }
1963
1964 ret = ifx_ssc_kwrite (0, ssc_tx_buf, eff_size);
1965
1966 if (ret > 0) {
1967 ssc_tx_buf = NULL; //should be freed by ifx_ssc_kwrite
1968 }
1969
1970 if (ret != eff_size) {
1971 DANUBE_SSC_EMSG ("ifx_ssc_write return %d\n", ret);
1972 goto ssc_session_exit;
1973 }
1974 ret = ifx_ssc_kread (0, ssc_rx_buf, eff_size);
1975 if (ret != eff_size) {
1976 DANUBE_SSC_EMSG ("ifx_ssc_read return %d\n", ret);
1977 goto ssc_session_exit;
1978 }
1979
1980 memcpy (rx_buf, ssc_rx_buf + tx_len, rx_len);
1981
1982 if (mode == IFX_SSC_MODE_TX) {
1983 ret = tx_len;
1984 }
1985 else {
1986 ret = rx_len;
1987 }
1988 ssc_session_exit:
1989
1990 if (ssc_tx_buf != NULL)
1991 kfree (ssc_tx_buf);
1992 if (ssc_rx_buf != NULL)
1993 kfree (ssc_rx_buf);
1994
1995 if (ret < 0) {
1996 printk ("ssc session fails\n");
1997 }
1998 return ret;
1999 }
2000
2001 /* Brief: TX-RX session
2002 * Parameter:
2003 * tx_buf
2004 * tx_len
2005 * rx_buf
2006 * rx_len
2007 * Return: >=0 number of bytes received
2008 * <0 error code
2009 * Description:
2010 * 1. TX session
2011 * 2. RX session
2012 */
2013 int
2014 ifx_ssc_txrx (char *tx_buf, u32 tx_len, char *rx_buf, u32 rx_len)
2015 {
2016 return ssc_session (tx_buf, tx_len, rx_buf, rx_len);
2017 }
2018
2019 EXPORT_SYMBOL (ifx_ssc_txrx);
2020 /* Brief: TX only session
2021 * Parameter:
2022 * tx_buf
2023 * tx_len
2024 * Return: >=0 number of bytes transmitted
2025 * <0 error code
2026 */
2027 int
2028 ifx_ssc_tx (char *tx_buf, u32 tx_len)
2029 {
2030 return ssc_session (tx_buf, tx_len, NULL, 0);
2031 }
2032
2033 EXPORT_SYMBOL (ifx_ssc_tx);
2034 /* Brief: RX only session
2035 * Parameter:
2036 * rx_buf
2037 * rx_len
2038 * Return: >=0 number of bytes received
2039 * <0 error code
2040 */
2041 int
2042 ifx_ssc_rx (char *rx_buf, u32 rx_len)
2043 {
2044 return ssc_session (NULL, 0, rx_buf, rx_len);
2045 }
2046
2047 EXPORT_SYMBOL (ifx_ssc_rx);
2048
2049 MODULE_LICENSE("GPL");
2050 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
2051 MODULE_DESCRIPTION("danube ssc driver");
2052
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