projects / openwrt.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
switch to et source package, linksys 3.37.2 without robo_qos, but with patch from...
[openwrt.git] / openwrt / package / linux / kernel-patches / 000-linux-mips-2_4_30.patch
1 diff -Nur linux-2.4.30/Makefile linux-2.4.30-mips/Makefile
2 --- linux-2.4.30/Makefile 2005-04-04 03:42:20.000000000 +0200
3 +++ linux-2.4.30-mips/Makefile 2005-04-05 21:09:54.000000000 +0200
4 @@ -5,7 +5,7 @@
5
6 KERNELRELEASE=$(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
7
8 -ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/)
9 +ARCH = mips
10 KERNELPATH=kernel-$(shell echo $(KERNELRELEASE) | sed -e "s/-//g")
11
12 CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
13 @@ -462,10 +462,11 @@
14 $(MAKE) -C Documentation/DocBook mrproper
15
16 distclean: mrproper
17 - rm -f core `find . \( -not -type d \) -and \
18 - \( -name '*.orig' -o -name '*.rej' -o -name '*~' \
19 - -o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
20 - -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \) -type f -print` TAGS tags
21 + find . \( -not -type d \) -and \
22 + \( -name core -o -name '*.orig' -o -name '*.rej' \
23 + -o -name '*~' -o -name '*.bak' -o -name '#*#' \
24 + -o -name '.*.rej' -o -name '.SUMS' -o -size 0 \
25 + -o -name TAGS -o -name tags \) -print | env -i xargs rm -f
26
27 backup: mrproper
28 cd .. && tar cf - linux/ | gzip -9 > backup.gz
29 @@ -492,7 +493,7 @@
30 $(MAKE) -C Documentation/DocBook man
31
32 sums:
33 - find . -type f -print | sort | xargs sum > .SUMS
34 + find . -type f -print | sort | env -i xargs sum > .SUMS
35
36 dep-files: scripts/mkdep archdep include/linux/version.h
37 rm -f .depend .hdepend
38 diff -Nur linux-2.4.30/arch/mips/Makefile linux-2.4.30-mips/arch/mips/Makefile
39 --- linux-2.4.30/arch/mips/Makefile 2005-01-19 15:09:26.000000000 +0100
40 +++ linux-2.4.30-mips/arch/mips/Makefile 2005-01-30 09:01:26.000000000 +0100
41 @@ -211,7 +211,7 @@
42 endif
43
44 #
45 -# Au1000 (Alchemy Semi PB1000) eval board
46 +# Au1x AMD Alchemy eval boards
47 #
48 ifdef CONFIG_MIPS_PB1000
49 LIBS += arch/mips/au1000/pb1000/pb1000.o \
50 @@ -220,9 +220,6 @@
51 LOADADDR := 0x80100000
52 endif
53
54 -#
55 -# Au1100 (Alchemy Semi PB1100) eval board
56 -#
57 ifdef CONFIG_MIPS_PB1100
58 LIBS += arch/mips/au1000/pb1100/pb1100.o \
59 arch/mips/au1000/common/au1000.o
60 @@ -230,9 +227,6 @@
61 LOADADDR += 0x80100000
62 endif
63
64 -#
65 -# Au1500 (Alchemy Semi PB1500) eval board
66 -#
67 ifdef CONFIG_MIPS_PB1500
68 LIBS += arch/mips/au1000/pb1500/pb1500.o \
69 arch/mips/au1000/common/au1000.o
70 @@ -240,9 +234,6 @@
71 LOADADDR := 0x80100000
72 endif
73
74 -#
75 -# Au1x00 (AMD/Alchemy) eval boards
76 -#
77 ifdef CONFIG_MIPS_DB1000
78 LIBS += arch/mips/au1000/db1x00/db1x00.o \
79 arch/mips/au1000/common/au1000.o
80 @@ -313,6 +304,27 @@
81 LOADADDR += 0x80100000
82 endif
83
84 +ifdef CONFIG_MIPS_PB1200
85 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
86 + arch/mips/au1000/common/au1000.o
87 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
88 +LOADADDR += 0x80100000
89 +endif
90 +
91 +ifdef CONFIG_MIPS_DB1200
92 +LIBS += arch/mips/au1000/pb1200/pb1200.o \
93 + arch/mips/au1000/common/au1000.o
94 +SUBDIRS += arch/mips/au1000/pb1200 arch/mips/au1000/common
95 +LOADADDR += 0x80100000
96 +endif
97 +
98 +ifdef CONFIG_MIPS_FICMMP
99 +LIBS += arch/mips/au1000/ficmmp/ficmmp.o \
100 + arch/mips/au1000/common/au1000.o
101 +SUBDIRS += arch/mips/au1000/ficmmp arch/mips/au1000/common
102 +LOADADDR += 0x80100000
103 +endif
104 +
105
106 #
107 # Cogent CSB250
108 diff -Nur linux-2.4.30/arch/mips/au1000/common/Makefile linux-2.4.30-mips/arch/mips/au1000/common/Makefile
109 --- linux-2.4.30/arch/mips/au1000/common/Makefile 2005-01-19 15:09:26.000000000 +0100
110 +++ linux-2.4.30-mips/arch/mips/au1000/common/Makefile 2005-01-30 09:01:27.000000000 +0100
111 @@ -19,9 +19,9 @@
112 export-objs = prom.o clocks.o power.o usbdev.o
113
114 obj-y := prom.o int-handler.o irq.o puts.o time.o reset.o cputable.o \
115 - au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o
116 + au1xxx_irqmap.o clocks.o power.o setup.o sleeper.o dma.o dbdma.o gpio.o
117
118 -export-objs += dma.o dbdma.o
119 +export-objs += dma.o dbdma.o gpio.o
120
121 obj-$(CONFIG_AU1X00_USB_DEVICE) += usbdev.o
122 obj-$(CONFIG_KGDB) += dbg_io.o
123 diff -Nur linux-2.4.30/arch/mips/au1000/common/au1xxx_irqmap.c linux-2.4.30-mips/arch/mips/au1000/common/au1xxx_irqmap.c
124 --- linux-2.4.30/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-19 15:09:26.000000000 +0100
125 +++ linux-2.4.30-mips/arch/mips/au1000/common/au1xxx_irqmap.c 2005-01-30 09:01:27.000000000 +0100
126 @@ -172,14 +172,14 @@
127 { AU1550_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
128 { AU1550_PSC2_INT, INTC_INT_HIGH_LEVEL, 0},
129 { AU1550_PSC3_INT, INTC_INT_HIGH_LEVEL, 0},
130 - { AU1550_TOY_INT, INTC_INT_RISE_EDGE, 0 },
131 - { AU1550_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
132 - { AU1550_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
133 - { AU1550_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
134 - { AU1550_RTC_INT, INTC_INT_RISE_EDGE, 0 },
135 - { AU1550_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
136 - { AU1550_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
137 - { AU1550_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
138 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
139 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
140 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
141 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
142 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
143 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
144 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
145 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
146 { AU1550_NAND_INT, INTC_INT_RISE_EDGE, 0},
147 { AU1550_USB_DEV_REQ_INT, INTC_INT_HIGH_LEVEL, 0 },
148 { AU1550_USB_DEV_SUS_INT, INTC_INT_RISE_EDGE, 0 },
149 @@ -200,14 +200,14 @@
150 { AU1200_PSC1_INT, INTC_INT_HIGH_LEVEL, 0},
151 { AU1200_AES_INT, INTC_INT_HIGH_LEVEL, 0},
152 { AU1200_CAMERA_INT, INTC_INT_HIGH_LEVEL, 0},
153 - { AU1200_TOY_INT, INTC_INT_RISE_EDGE, 0 },
154 - { AU1200_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
155 - { AU1200_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
156 - { AU1200_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
157 - { AU1200_RTC_INT, INTC_INT_RISE_EDGE, 0 },
158 - { AU1200_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
159 - { AU1200_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
160 - { AU1200_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
161 + { AU1000_TOY_INT, INTC_INT_RISE_EDGE, 0 },
162 + { AU1000_TOY_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
163 + { AU1000_TOY_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
164 + { AU1000_TOY_MATCH2_INT, INTC_INT_RISE_EDGE, 1 },
165 + { AU1000_RTC_INT, INTC_INT_RISE_EDGE, 0 },
166 + { AU1000_RTC_MATCH0_INT, INTC_INT_RISE_EDGE, 0 },
167 + { AU1000_RTC_MATCH1_INT, INTC_INT_RISE_EDGE, 0 },
168 + { AU1000_RTC_MATCH2_INT, INTC_INT_RISE_EDGE, 0 },
169 { AU1200_NAND_INT, INTC_INT_RISE_EDGE, 0},
170 { AU1200_USB_INT, INTC_INT_HIGH_LEVEL, 0 },
171 { AU1200_LCD_INT, INTC_INT_HIGH_LEVEL, 0},
172 diff -Nur linux-2.4.30/arch/mips/au1000/common/cputable.c linux-2.4.30-mips/arch/mips/au1000/common/cputable.c
173 --- linux-2.4.30/arch/mips/au1000/common/cputable.c 2005-01-19 15:09:26.000000000 +0100
174 +++ linux-2.4.30-mips/arch/mips/au1000/common/cputable.c 2005-01-30 09:01:27.000000000 +0100
175 @@ -39,7 +39,8 @@
176 { 0xffffffff, 0x02030203, "Au1100 BD", 0, 1 },
177 { 0xffffffff, 0x02030204, "Au1100 BE", 0, 1 },
178 { 0xffffffff, 0x03030200, "Au1550 AA", 0, 1 },
179 - { 0xffffffff, 0x04030200, "Au1200 AA", 0, 1 },
180 + { 0xffffffff, 0x04030200, "Au1200 AB", 0, 0 },
181 + { 0xffffffff, 0x04030201, "Au1200 AC", 0, 0 },
182 { 0x00000000, 0x00000000, "Unknown Au1xxx", 1, 0 },
183 };
184
185 diff -Nur linux-2.4.30/arch/mips/au1000/common/dbdma.c linux-2.4.30-mips/arch/mips/au1000/common/dbdma.c
186 --- linux-2.4.30/arch/mips/au1000/common/dbdma.c 2005-01-19 15:09:26.000000000 +0100
187 +++ linux-2.4.30-mips/arch/mips/au1000/common/dbdma.c 2005-02-08 07:28:37.000000000 +0100
188 @@ -41,6 +41,8 @@
189 #include <asm/au1xxx_dbdma.h>
190 #include <asm/system.h>
191
192 +#include <linux/module.h>
193 +
194 #if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
195
196 /*
197 @@ -60,37 +62,10 @@
198 */
199 #define ALIGN_ADDR(x, a) ((((u32)(x)) + (a-1)) & ~(a-1))
200
201 -static volatile dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
202 -static int dbdma_initialized;
203 +static dbdma_global_t *dbdma_gptr = (dbdma_global_t *)DDMA_GLOBAL_BASE;
204 +static int dbdma_initialized=0;
205 static void au1xxx_dbdma_init(void);
206
207 -typedef struct dbdma_device_table {
208 - u32 dev_id;
209 - u32 dev_flags;
210 - u32 dev_tsize;
211 - u32 dev_devwidth;
212 - u32 dev_physaddr; /* If FIFO */
213 - u32 dev_intlevel;
214 - u32 dev_intpolarity;
215 -} dbdev_tab_t;
216 -
217 -typedef struct dbdma_chan_config {
218 - u32 chan_flags;
219 - u32 chan_index;
220 - dbdev_tab_t *chan_src;
221 - dbdev_tab_t *chan_dest;
222 - au1x_dma_chan_t *chan_ptr;
223 - au1x_ddma_desc_t *chan_desc_base;
224 - au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
225 - void *chan_callparam;
226 - void (*chan_callback)(int, void *, struct pt_regs *);
227 -} chan_tab_t;
228 -
229 -#define DEV_FLAGS_INUSE (1 << 0)
230 -#define DEV_FLAGS_ANYUSE (1 << 1)
231 -#define DEV_FLAGS_OUT (1 << 2)
232 -#define DEV_FLAGS_IN (1 << 3)
233 -
234 static dbdev_tab_t dbdev_tab[] = {
235 #ifdef CONFIG_SOC_AU1550
236 /* UARTS */
237 @@ -156,13 +131,13 @@
238 { DSCR_CMD0_MAE_BOTH, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
239 { DSCR_CMD0_LCD, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
240
241 - { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
242 - { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
243 - { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
244 - { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
245 + { DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 },
246 + { DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 },
247 + { DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 },
248 + { DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 },
249
250 - { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 },
251 - { DSCR_CMD0_AES_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
252 + { DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 },
253 + { DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 },
254
255 { DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 },
256 { DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 },
257 @@ -172,9 +147,9 @@
258 { DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 },
259 { DSCR_CMD0_PSC1_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
260
261 - { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
262 - { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
263 - { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
264 + { DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 },
265 + { DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 },
266 + { DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 },
267 { DSCR_CMD0_CIM_SYNC, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
268
269 { DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 },
270 @@ -183,6 +158,24 @@
271
272 { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
273 { DSCR_CMD0_ALWAYS, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 },
274 +
275 + /* Provide 16 user definable device types */
276 + { 0, 0, 0, 0, 0, 0, 0 },
277 + { 0, 0, 0, 0, 0, 0, 0 },
278 + { 0, 0, 0, 0, 0, 0, 0 },
279 + { 0, 0, 0, 0, 0, 0, 0 },
280 + { 0, 0, 0, 0, 0, 0, 0 },
281 + { 0, 0, 0, 0, 0, 0, 0 },
282 + { 0, 0, 0, 0, 0, 0, 0 },
283 + { 0, 0, 0, 0, 0, 0, 0 },
284 + { 0, 0, 0, 0, 0, 0, 0 },
285 + { 0, 0, 0, 0, 0, 0, 0 },
286 + { 0, 0, 0, 0, 0, 0, 0 },
287 + { 0, 0, 0, 0, 0, 0, 0 },
288 + { 0, 0, 0, 0, 0, 0, 0 },
289 + { 0, 0, 0, 0, 0, 0, 0 },
290 + { 0, 0, 0, 0, 0, 0, 0 },
291 + { 0, 0, 0, 0, 0, 0, 0 },
292 };
293
294 #define DBDEV_TAB_SIZE (sizeof(dbdev_tab) / sizeof(dbdev_tab_t))
295 @@ -202,6 +195,30 @@
296 return NULL;
297 }
298
299 +u32
300 +au1xxx_ddma_add_device(dbdev_tab_t *dev)
301 +{
302 + u32 ret = 0;
303 + dbdev_tab_t *p=NULL;
304 + static u16 new_id=0x1000;
305 +
306 + p = find_dbdev_id(0);
307 + if ( NULL != p )
308 + {
309 + memcpy(p, dev, sizeof(dbdev_tab_t));
310 + p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id);
311 + ret = p->dev_id;
312 + new_id++;
313 +#if 0
314 + printk("add_device: id:%x flags:%x padd:%x\n",
315 + p->dev_id, p->dev_flags, p->dev_physaddr );
316 +#endif
317 + }
318 +
319 + return ret;
320 +}
321 +EXPORT_SYMBOL(au1xxx_ddma_add_device);
322 +
323 /* Allocate a channel and return a non-zero descriptor if successful.
324 */
325 u32
326 @@ -214,7 +231,7 @@
327 int i;
328 dbdev_tab_t *stp, *dtp;
329 chan_tab_t *ctp;
330 - volatile au1x_dma_chan_t *cp;
331 + au1x_dma_chan_t *cp;
332
333 /* We do the intialization on the first channel allocation.
334 * We have to wait because of the interrupt handler initialization
335 @@ -224,9 +241,6 @@
336 au1xxx_dbdma_init();
337 dbdma_initialized = 1;
338
339 - if ((srcid > DSCR_NDEV_IDS) || (destid > DSCR_NDEV_IDS))
340 - return 0;
341 -
342 if ((stp = find_dbdev_id(srcid)) == NULL) return 0;
343 if ((dtp = find_dbdev_id(destid)) == NULL) return 0;
344
345 @@ -268,9 +282,9 @@
346 /* If kmalloc fails, it is caught below same
347 * as a channel not available.
348 */
349 - ctp = (chan_tab_t *)kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
350 + ctp = (chan_tab_t *)
351 + kmalloc(sizeof(chan_tab_t), GFP_KERNEL);
352 chan_tab_ptr[i] = ctp;
353 - ctp->chan_index = chan = i;
354 break;
355 }
356 }
357 @@ -278,10 +292,11 @@
358
359 if (ctp != NULL) {
360 memset(ctp, 0, sizeof(chan_tab_t));
361 + ctp->chan_index = chan = i;
362 dcp = DDMA_CHANNEL_BASE;
363 dcp += (0x0100 * chan);
364 ctp->chan_ptr = (au1x_dma_chan_t *)dcp;
365 - cp = (volatile au1x_dma_chan_t *)dcp;
366 + cp = (au1x_dma_chan_t *)dcp;
367 ctp->chan_src = stp;
368 ctp->chan_dest = dtp;
369 ctp->chan_callback = callback;
370 @@ -298,6 +313,9 @@
371 i |= DDMA_CFG_DED;
372 if (dtp->dev_intpolarity)
373 i |= DDMA_CFG_DP;
374 + if ((stp->dev_flags & DEV_FLAGS_SYNC) ||
375 + (dtp->dev_flags & DEV_FLAGS_SYNC))
376 + i |= DDMA_CFG_SYNC;
377 cp->ddma_cfg = i;
378 au_sync();
379
380 @@ -308,14 +326,14 @@
381 rv = (u32)(&chan_tab_ptr[chan]);
382 }
383 else {
384 - /* Release devices.
385 - */
386 + /* Release devices */
387 stp->dev_flags &= ~DEV_FLAGS_INUSE;
388 dtp->dev_flags &= ~DEV_FLAGS_INUSE;
389 }
390 }
391 return rv;
392 }
393 +EXPORT_SYMBOL(au1xxx_dbdma_chan_alloc);
394
395 /* Set the device width if source or destination is a FIFO.
396 * Should be 8, 16, or 32 bits.
397 @@ -343,6 +361,7 @@
398
399 return rv;
400 }
401 +EXPORT_SYMBOL(au1xxx_dbdma_set_devwidth);
402
403 /* Allocate a descriptor ring, initializing as much as possible.
404 */
405 @@ -369,7 +388,8 @@
406 * and if we try that first we are likely to not waste larger
407 * slabs of memory.
408 */
409 - desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t), GFP_KERNEL);
410 + desc_base = (u32)kmalloc(entries * sizeof(au1x_ddma_desc_t),
411 + GFP_KERNEL|GFP_DMA);
412 if (desc_base == 0)
413 return 0;
414
415 @@ -380,7 +400,7 @@
416 kfree((const void *)desc_base);
417 i = entries * sizeof(au1x_ddma_desc_t);
418 i += (sizeof(au1x_ddma_desc_t) - 1);
419 - if ((desc_base = (u32)kmalloc(i, GFP_KERNEL)) == 0)
420 + if ((desc_base = (u32)kmalloc(i, GFP_KERNEL|GFP_DMA)) == 0)
421 return 0;
422
423 desc_base = ALIGN_ADDR(desc_base, sizeof(au1x_ddma_desc_t));
424 @@ -460,9 +480,14 @@
425 /* If source input is fifo, set static address.
426 */
427 if (stp->dev_flags & DEV_FLAGS_IN) {
428 - src0 = stp->dev_physaddr;
429 - src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
430 + if ( stp->dev_flags & DEV_FLAGS_BURSTABLE )
431 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_BURST);
432 + else
433 + src1 |= DSCR_SRC1_SAM(DSCR_xAM_STATIC);
434 +
435 }
436 + if (stp->dev_physaddr)
437 + src0 = stp->dev_physaddr;
438
439 /* Set up dest1. For now, assume no stride and increment.
440 * A channel attribute update can change this later.
441 @@ -486,10 +511,18 @@
442 /* If destination output is fifo, set static address.
443 */
444 if (dtp->dev_flags & DEV_FLAGS_OUT) {
445 - dest0 = dtp->dev_physaddr;
446 + if ( dtp->dev_flags & DEV_FLAGS_BURSTABLE )
447 + dest1 |= DSCR_DEST1_DAM(DSCR_xAM_BURST);
448 + else
449 dest1 |= DSCR_DEST1_DAM(DSCR_xAM_STATIC);
450 }
451 + if (dtp->dev_physaddr)
452 + dest0 = dtp->dev_physaddr;
453
454 +#if 0
455 + printk("did:%x sid:%x cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
456 + dtp->dev_id, stp->dev_id, cmd0, cmd1, src0, src1, dest0, dest1 );
457 +#endif
458 for (i=0; i<entries; i++) {
459 dp->dscr_cmd0 = cmd0;
460 dp->dscr_cmd1 = cmd1;
461 @@ -498,6 +531,7 @@
462 dp->dscr_dest0 = dest0;
463 dp->dscr_dest1 = dest1;
464 dp->dscr_stat = 0;
465 + dp->sw_context = dp->sw_status = 0;
466 dp->dscr_nxtptr = DSCR_NXTPTR(virt_to_phys(dp + 1));
467 dp++;
468 }
469 @@ -510,13 +544,14 @@
470
471 return (u32)(ctp->chan_desc_base);
472 }
473 +EXPORT_SYMBOL(au1xxx_dbdma_ring_alloc);
474
475 /* Put a source buffer into the DMA ring.
476 * This updates the source pointer and byte count. Normally used
477 * for memory to fifo transfers.
478 */
479 u32
480 -au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes)
481 +_au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags)
482 {
483 chan_tab_t *ctp;
484 au1x_ddma_desc_t *dp;
485 @@ -543,24 +578,40 @@
486 */
487 dp->dscr_source0 = virt_to_phys(buf);
488 dp->dscr_cmd1 = nbytes;
489 - dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
490 - ctp->chan_ptr->ddma_dbell = 0xffffffff; /* Make it go */
491 -
492 + /* Check flags */
493 + if (flags & DDMA_FLAGS_IE)
494 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
495 + if (flags & DDMA_FLAGS_NOIE)
496 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
497 /* Get next descriptor pointer.
498 */
499 ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
500
501 + /*
502 + * There is an errata on the Au1200/Au1550 parts that could result
503 + * in "stale" data being DMA'd. It has to do with the snoop logic on
504 + * the dache eviction buffer. NONCOHERENT_IO is on by default for
505 + * these parts. If it is fixedin the future, these dma_cache_inv will
506 + * just be nothing more than empty macros. See io.h.
507 + * */
508 + dma_cache_wback_inv(buf,nbytes);
509 + dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
510 + au_sync();
511 + dma_cache_wback_inv(dp, sizeof(dp));
512 + ctp->chan_ptr->ddma_dbell = 0;
513 +
514 /* return something not zero.
515 */
516 return nbytes;
517 }
518 +EXPORT_SYMBOL(_au1xxx_dbdma_put_source);
519
520 /* Put a destination buffer into the DMA ring.
521 * This updates the destination pointer and byte count. Normally used
522 * to place an empty buffer into the ring for fifo to memory transfers.
523 */
524 u32
525 -au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes)
526 +_au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags)
527 {
528 chan_tab_t *ctp;
529 au1x_ddma_desc_t *dp;
530 @@ -582,11 +633,33 @@
531 if (dp->dscr_cmd0 & DSCR_CMD0_V)
532 return 0;
533
534 - /* Load up buffer address and byte count.
535 - */
536 + /* Load up buffer address and byte count */
537 +
538 + /* Check flags */
539 + if (flags & DDMA_FLAGS_IE)
540 + dp->dscr_cmd0 |= DSCR_CMD0_IE;
541 + if (flags & DDMA_FLAGS_NOIE)
542 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
543 +
544 dp->dscr_dest0 = virt_to_phys(buf);
545 dp->dscr_cmd1 = nbytes;
546 +#if 0
547 + printk("cmd0:%x cmd1:%x source0:%x source1:%x dest0:%x dest1:%x\n",
548 + dp->dscr_cmd0, dp->dscr_cmd1, dp->dscr_source0,
549 + dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1 );
550 +#endif
551 + /*
552 + * There is an errata on the Au1200/Au1550 parts that could result in
553 + * "stale" data being DMA'd. It has to do with the snoop logic on the
554 + * dache eviction buffer. NONCOHERENT_IO is on by default for these
555 + * parts. If it is fixedin the future, these dma_cache_inv will just
556 + * be nothing more than empty macros. See io.h.
557 + * */
558 + dma_cache_inv(buf,nbytes);
559 dp->dscr_cmd0 |= DSCR_CMD0_V; /* Let it rip */
560 + au_sync();
561 + dma_cache_wback_inv(dp, sizeof(dp));
562 + ctp->chan_ptr->ddma_dbell = 0;
563
564 /* Get next descriptor pointer.
565 */
566 @@ -596,6 +669,7 @@
567 */
568 return nbytes;
569 }
570 +EXPORT_SYMBOL(_au1xxx_dbdma_put_dest);
571
572 /* Get a destination buffer into the DMA ring.
573 * Normally used to get a full buffer from the ring during fifo
574 @@ -645,7 +719,7 @@
575 au1xxx_dbdma_stop(u32 chanid)
576 {
577 chan_tab_t *ctp;
578 - volatile au1x_dma_chan_t *cp;
579 + au1x_dma_chan_t *cp;
580 int halt_timeout = 0;
581
582 ctp = *((chan_tab_t **)chanid);
583 @@ -665,6 +739,7 @@
584 cp->ddma_stat |= (DDMA_STAT_DB | DDMA_STAT_V);
585 au_sync();
586 }
587 +EXPORT_SYMBOL(au1xxx_dbdma_stop);
588
589 /* Start using the current descriptor pointer. If the dbdma encounters
590 * a not valid descriptor, it will stop. In this case, we can just
591 @@ -674,17 +749,17 @@
592 au1xxx_dbdma_start(u32 chanid)
593 {
594 chan_tab_t *ctp;
595 - volatile au1x_dma_chan_t *cp;
596 + au1x_dma_chan_t *cp;
597
598 ctp = *((chan_tab_t **)chanid);
599 -
600 cp = ctp->chan_ptr;
601 cp->ddma_desptr = virt_to_phys(ctp->cur_ptr);
602 cp->ddma_cfg |= DDMA_CFG_EN; /* Enable channel */
603 au_sync();
604 - cp->ddma_dbell = 0xffffffff; /* Make it go */
605 + cp->ddma_dbell = 0;
606 au_sync();
607 }
608 +EXPORT_SYMBOL(au1xxx_dbdma_start);
609
610 void
611 au1xxx_dbdma_reset(u32 chanid)
612 @@ -703,15 +778,21 @@
613
614 do {
615 dp->dscr_cmd0 &= ~DSCR_CMD0_V;
616 + /* reset our SW status -- this is used to determine
617 + * if a descriptor is in use by upper level SW. Since
618 + * posting can reset 'V' bit.
619 + */
620 + dp->sw_status = 0;
621 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
622 } while (dp != ctp->chan_desc_base);
623 }
624 +EXPORT_SYMBOL(au1xxx_dbdma_reset);
625
626 u32
627 au1xxx_get_dma_residue(u32 chanid)
628 {
629 chan_tab_t *ctp;
630 - volatile au1x_dma_chan_t *cp;
631 + au1x_dma_chan_t *cp;
632 u32 rv;
633
634 ctp = *((chan_tab_t **)chanid);
635 @@ -746,15 +827,16 @@
636
637 kfree(ctp);
638 }
639 +EXPORT_SYMBOL(au1xxx_dbdma_chan_free);
640
641 static void
642 dbdma_interrupt(int irq, void *dev_id, struct pt_regs *regs)
643 {
644 - u32 intstat;
645 + u32 intstat, flags;
646 u32 chan_index;
647 chan_tab_t *ctp;
648 au1x_ddma_desc_t *dp;
649 - volatile au1x_dma_chan_t *cp;
650 + au1x_dma_chan_t *cp;
651
652 intstat = dbdma_gptr->ddma_intstat;
653 au_sync();
654 @@ -773,18 +855,26 @@
655 (ctp->chan_callback)(irq, ctp->chan_callparam, regs);
656
657 ctp->cur_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
658 -
659 }
660
661 -static void
662 -au1xxx_dbdma_init(void)
663 +static void au1xxx_dbdma_init(void)
664 {
665 + int irq_nr;
666 +
667 dbdma_gptr->ddma_config = 0;
668 dbdma_gptr->ddma_throttle = 0;
669 dbdma_gptr->ddma_inten = 0xffff;
670 au_sync();
671
672 - if (request_irq(AU1550_DDMA_INT, dbdma_interrupt, SA_INTERRUPT,
673 +#if defined(CONFIG_SOC_AU1550)
674 + irq_nr = AU1550_DDMA_INT;
675 +#elif defined(CONFIG_SOC_AU1200)
676 + irq_nr = AU1200_DDMA_INT;
677 +#else
678 + #error Unknown Au1x00 SOC
679 +#endif
680 +
681 + if (request_irq(irq_nr, dbdma_interrupt, SA_INTERRUPT,
682 "Au1xxx dbdma", (void *)dbdma_gptr))
683 printk("Can't get 1550 dbdma irq");
684 }
685 @@ -795,7 +885,8 @@
686 chan_tab_t *ctp;
687 au1x_ddma_desc_t *dp;
688 dbdev_tab_t *stp, *dtp;
689 - volatile au1x_dma_chan_t *cp;
690 + au1x_dma_chan_t *cp;
691 + u32 i = 0;
692
693 ctp = *((chan_tab_t **)chanid);
694 stp = ctp->chan_src;
695 @@ -820,15 +911,64 @@
696 dp = ctp->chan_desc_base;
697
698 do {
699 - printk("dp %08x, cmd0 %08x, cmd1 %08x\n",
700 - (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
701 - printk("src0 %08x, src1 %08x, dest0 %08x\n",
702 - dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0);
703 - printk("dest1 %08x, stat %08x, nxtptr %08x\n",
704 - dp->dscr_dest1, dp->dscr_stat, dp->dscr_nxtptr);
705 + printk("Dp[%d]= %08x, cmd0 %08x, cmd1 %08x\n",
706 + i++, (u32)dp, dp->dscr_cmd0, dp->dscr_cmd1);
707 + printk("src0 %08x, src1 %08x, dest0 %08x, dest1 %08x\n",
708 + dp->dscr_source0, dp->dscr_source1, dp->dscr_dest0, dp->dscr_dest1);
709 + printk("stat %08x, nxtptr %08x\n",
710 + dp->dscr_stat, dp->dscr_nxtptr);
711 dp = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
712 } while (dp != ctp->chan_desc_base);
713 }
714
715 +/* Put a descriptor into the DMA ring.
716 + * This updates the source/destination pointers and byte count.
717 + */
718 +u32
719 +au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr )
720 +{
721 + chan_tab_t *ctp;
722 + au1x_ddma_desc_t *dp;
723 + u32 nbytes=0;
724 +
725 + /* I guess we could check this to be within the
726 + * range of the table......
727 + */
728 + ctp = *((chan_tab_t **)chanid);
729 +
730 + /* We should have multiple callers for a particular channel,
731 + * an interrupt doesn't affect this pointer nor the descriptor,
732 + * so no locking should be needed.
733 + */
734 + dp = ctp->put_ptr;
735 +
736 + /* If the descriptor is valid, we are way ahead of the DMA
737 + * engine, so just return an error condition.
738 + */
739 + if (dp->dscr_cmd0 & DSCR_CMD0_V)
740 + return 0;
741 +
742 + /* Load up buffer addresses and byte count.
743 + */
744 + dp->dscr_dest0 = dscr->dscr_dest0;
745 + dp->dscr_source0 = dscr->dscr_source0;
746 + dp->dscr_dest1 = dscr->dscr_dest1;
747 + dp->dscr_source1 = dscr->dscr_source1;
748 + dp->dscr_cmd1 = dscr->dscr_cmd1;
749 + nbytes = dscr->dscr_cmd1;
750 + /* Allow the caller to specifiy if an interrupt is generated */
751 + dp->dscr_cmd0 &= ~DSCR_CMD0_IE;
752 + dp->dscr_cmd0 |= dscr->dscr_cmd0 | DSCR_CMD0_V;
753 + ctp->chan_ptr->ddma_dbell = 0;
754 +
755 + /* Get next descriptor pointer.
756 + */
757 + ctp->put_ptr = phys_to_virt(DSCR_GET_NXTPTR(dp->dscr_nxtptr));
758 +
759 + /* return something not zero.
760 + */
761 + return nbytes;
762 +}
763 +
764 #endif /* defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200) */
765
766 diff -Nur linux-2.4.30/arch/mips/au1000/common/gpio.c linux-2.4.30-mips/arch/mips/au1000/common/gpio.c
767 --- linux-2.4.30/arch/mips/au1000/common/gpio.c 1970-01-01 01:00:00.000000000 +0100
768 +++ linux-2.4.30-mips/arch/mips/au1000/common/gpio.c 2005-01-30 09:01:27.000000000 +0100
769 @@ -0,0 +1,118 @@
770 +/*
771 + * This program is free software; you can redistribute it and/or modify it
772 + * under the terms of the GNU General Public License as published by the
773 + * Free Software Foundation; either version 2 of the License, or (at your
774 + * option) any later version.
775 + *
776 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
777 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
778 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
779 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
780 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
781 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
782 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
783 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
784 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
785 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
786 + *
787 + * You should have received a copy of the GNU General Public License along
788 + * with this program; if not, write to the Free Software Foundation, Inc.,
789 + * 675 Mass Ave, Cambridge, MA 02139, USA.
790 + */
791 +
792 +#include <asm/au1000.h>
793 +#include <asm/au1xxx_gpio.h>
794 +
795 +#define gpio1 sys
796 +#if !defined(CONFIG_SOC_AU1000)
797 +static AU1X00_GPIO2 * const gpio2 = (AU1X00_GPIO2 *)GPIO2_BASE;
798 +
799 +#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
800 +
801 +int au1xxx_gpio2_read(int signal)
802 +{
803 + signal -= 200;
804 +/* gpio2->dir &= ~(0x01 << signal); //Set GPIO to input */
805 + return ((gpio2->pinstate >> signal) & 0x01);
806 +}
807 +
808 +void au1xxx_gpio2_write(int signal, int value)
809 +{
810 + signal -= 200;
811 +
812 + gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << signal) |
813 + (value << signal);
814 +}
815 +
816 +void au1xxx_gpio2_tristate(int signal)
817 +{
818 + signal -= 200;
819 + gpio2->dir &= ~(0x01 << signal); /* Set GPIO to input */
820 +}
821 +#endif
822 +
823 +int au1xxx_gpio1_read(int signal)
824 +{
825 +/* gpio1->trioutclr |= (0x01 << signal); */
826 + return ((gpio1->pinstaterd >> signal) & 0x01);
827 +}
828 +
829 +void au1xxx_gpio1_write(int signal, int value)
830 +{
831 + if(value)
832 + gpio1->outputset = (0x01 << signal);
833 + else
834 + gpio1->outputclr = (0x01 << signal); /* Output a Zero */
835 +}
836 +
837 +void au1xxx_gpio1_tristate(int signal)
838 +{
839 + gpio1->trioutclr = (0x01 << signal); /* Tristate signal */
840 +}
841 +
842 +
843 +int au1xxx_gpio_read(int signal)
844 +{
845 + if(signal >= 200)
846 +#if defined(CONFIG_SOC_AU1000)
847 + return 0;
848 +#else
849 + return au1xxx_gpio2_read(signal);
850 +#endif
851 + else
852 + return au1xxx_gpio1_read(signal);
853 +}
854 +
855 +void au1xxx_gpio_write(int signal, int value)
856 +{
857 + if(signal >= 200)
858 +#if defined(CONFIG_SOC_AU1000)
859 + ;
860 +#else
861 + au1xxx_gpio2_write(signal, value);
862 +#endif
863 + else
864 + au1xxx_gpio1_write(signal, value);
865 +}
866 +
867 +void au1xxx_gpio_tristate(int signal)
868 +{
869 + if(signal >= 200)
870 +#if defined(CONFIG_SOC_AU1000)
871 + ;
872 +#else
873 + au1xxx_gpio2_tristate(signal);
874 +#endif
875 + else
876 + au1xxx_gpio1_tristate(signal);
877 +}
878 +
879 +void au1xxx_gpio1_set_inputs(void)
880 +{
881 + gpio1->pininputen = 0;
882 +}
883 +
884 +EXPORT_SYMBOL(au1xxx_gpio1_set_inputs);
885 +EXPORT_SYMBOL(au1xxx_gpio_tristate);
886 +EXPORT_SYMBOL(au1xxx_gpio_write);
887 +EXPORT_SYMBOL(au1xxx_gpio_read);
888 diff -Nur linux-2.4.30/arch/mips/au1000/common/irq.c linux-2.4.30-mips/arch/mips/au1000/common/irq.c
889 --- linux-2.4.30/arch/mips/au1000/common/irq.c 2005-01-19 15:09:26.000000000 +0100
890 +++ linux-2.4.30-mips/arch/mips/au1000/common/irq.c 2005-03-13 08:56:57.000000000 +0100
891 @@ -303,8 +303,30 @@
892 };
893
894 #ifdef CONFIG_PM
895 -void startup_match20_interrupt(void)
896 +void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *))
897 {
898 + static struct irqaction action;
899 + /* This is a big problem.... since we didn't use request_irq
900 + when kernel/irq.c calls probe_irq_xxx this interrupt will
901 + be probed for usage. This will end up disabling the device :(
902 +
903 + Give it a bogus "action" pointer -- this will keep it from
904 + getting auto-probed!
905 +
906 + By setting the status to match that of request_irq() we
907 + can avoid it. --cgray
908 + */
909 + action.dev_id = handler;
910 + action.flags = 0;
911 + action.mask = 0;
912 + action.name = "Au1xxx TOY";
913 + action.handler = handler;
914 + action.next = NULL;
915 +
916 + irq_desc[AU1000_TOY_MATCH2_INT].action = &action;
917 + irq_desc[AU1000_TOY_MATCH2_INT].status
918 + &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS);
919 +
920 local_enable_irq(AU1000_TOY_MATCH2_INT);
921 }
922 #endif
923 @@ -508,6 +530,7 @@
924
925 if (!intc0_req0) return;
926
927 +#ifdef AU1000_USB_DEV_REQ_INT
928 /*
929 * Because of the tight timing of SETUP token to reply
930 * transactions, the USB devices-side packet complete
931 @@ -518,6 +541,7 @@
932 do_IRQ(AU1000_USB_DEV_REQ_INT, regs);
933 return;
934 }
935 +#endif
936
937 irq = au_ffs(intc0_req0) - 1;
938 intc0_req0 &= ~(1<<irq);
939 @@ -536,17 +560,7 @@
940
941 irq = au_ffs(intc0_req1) - 1;
942 intc0_req1 &= ~(1<<irq);
943 -#ifdef CONFIG_PM
944 - if (irq == AU1000_TOY_MATCH2_INT) {
945 - mask_and_ack_rise_edge_irq(irq);
946 - counter0_irq(irq, NULL, regs);
947 - local_enable_irq(irq);
948 - }
949 - else
950 -#endif
951 - {
952 - do_IRQ(irq, regs);
953 - }
954 + do_IRQ(irq, regs);
955 }
956
957
958 diff -Nur linux-2.4.30/arch/mips/au1000/common/pci_fixup.c linux-2.4.30-mips/arch/mips/au1000/common/pci_fixup.c
959 --- linux-2.4.30/arch/mips/au1000/common/pci_fixup.c 2005-01-19 15:09:26.000000000 +0100
960 +++ linux-2.4.30-mips/arch/mips/au1000/common/pci_fixup.c 2004-12-03 09:00:32.000000000 +0100
961 @@ -75,9 +75,13 @@
962
963 #ifdef CONFIG_NONCOHERENT_IO
964 /*
965 - * Set the NC bit in controller for pre-AC silicon
966 + * Set the NC bit in controller for Au1500 pre-AC silicon
967 */
968 - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
969 + u32 prid = read_c0_prid();
970 + if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) {
971 + au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG);
972 + printk("Non-coherent PCI accesses enabled\n");
973 + }
974 printk("Non-coherent PCI accesses enabled\n");
975 #endif
976
977 diff -Nur linux-2.4.30/arch/mips/au1000/common/pci_ops.c linux-2.4.30-mips/arch/mips/au1000/common/pci_ops.c
978 --- linux-2.4.30/arch/mips/au1000/common/pci_ops.c 2004-02-18 14:36:30.000000000 +0100
979 +++ linux-2.4.30-mips/arch/mips/au1000/common/pci_ops.c 2005-02-27 23:14:24.000000000 +0100
980 @@ -162,6 +162,7 @@
981 static int config_access(unsigned char access_type, struct pci_dev *dev,
982 unsigned char where, u32 * data)
983 {
984 + int error = PCIBIOS_SUCCESSFUL;
985 #if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 )
986 unsigned char bus = dev->bus->number;
987 unsigned int dev_fn = dev->devfn;
988 @@ -170,7 +171,6 @@
989 unsigned long offset, status;
990 unsigned long cfg_base;
991 unsigned long flags;
992 - int error = PCIBIOS_SUCCESSFUL;
993 unsigned long entryLo0, entryLo1;
994
995 if (device > 19) {
996 @@ -205,9 +205,8 @@
997 last_entryLo0 = last_entryLo1 = 0xffffffff;
998 }
999
1000 - /* Since the Au1xxx doesn't do the idsel timing exactly to spec,
1001 - * many board vendors implement their own off-chip idsel, so call
1002 - * it now. If it doesn't succeed, may as well bail out at this point.
1003 + /* Allow board vendors to implement their own off-chip idsel.
1004 + * If it doesn't succeed, may as well bail out at this point.
1005 */
1006 if (board_pci_idsel) {
1007 if (board_pci_idsel(device, 1) == 0) {
1008 @@ -271,8 +270,11 @@
1009 }
1010
1011 local_irq_restore(flags);
1012 - return error;
1013 +#else
1014 + /* Fake out Config space access with no responder */
1015 + *data = 0xFFFFFFFF;
1016 #endif
1017 + return error;
1018 }
1019 #endif
1020
1021 diff -Nur linux-2.4.30/arch/mips/au1000/common/power.c linux-2.4.30-mips/arch/mips/au1000/common/power.c
1022 --- linux-2.4.30/arch/mips/au1000/common/power.c 2005-01-19 15:09:26.000000000 +0100
1023 +++ linux-2.4.30-mips/arch/mips/au1000/common/power.c 2005-04-07 02:37:19.000000000 +0200
1024 @@ -50,7 +50,6 @@
1025
1026 static void calibrate_delay(void);
1027
1028 -extern void set_au1x00_speed(unsigned int new_freq);
1029 extern unsigned int get_au1x00_speed(void);
1030 extern unsigned long get_au1x00_uart_baud_base(void);
1031 extern void set_au1x00_uart_baud_base(unsigned long new_baud_base);
1032 @@ -116,6 +115,7 @@
1033 sleep_uart0_clkdiv = au_readl(UART0_ADDR + UART_CLK);
1034 sleep_uart0_enable = au_readl(UART0_ADDR + UART_MOD_CNTRL);
1035
1036 +#ifndef CONFIG_SOC_AU1200
1037 /* Shutdown USB host/device.
1038 */
1039 sleep_usbhost_enable = au_readl(USB_HOST_CONFIG);
1040 @@ -127,6 +127,7 @@
1041
1042 sleep_usbdev_enable = au_readl(USBD_ENABLE);
1043 au_writel(0, USBD_ENABLE); au_sync();
1044 +#endif
1045
1046 /* Save interrupt controller state.
1047 */
1048 @@ -212,14 +213,12 @@
1049 int au_sleep(void)
1050 {
1051 unsigned long wakeup, flags;
1052 - extern void save_and_sleep(void);
1053 + extern unsigned int save_and_sleep(void);
1054
1055 spin_lock_irqsave(&pm_lock,flags);
1056
1057 save_core_regs();
1058
1059 - flush_cache_all();
1060 -
1061 /** The code below is all system dependent and we should probably
1062 ** have a function call out of here to set this up. You need
1063 ** to configure the GPIO or timer interrupts that will bring
1064 @@ -227,27 +226,26 @@
1065 ** For testing, the TOY counter wakeup is useful.
1066 **/
1067
1068 -#if 0
1069 +#if 1
1070 au_writel(au_readl(SYS_PINSTATERD) & ~(1 << 11), SYS_PINSTATERD);
1071
1072 /* gpio 6 can cause a wake up event */
1073 wakeup = au_readl(SYS_WAKEMSK);
1074 wakeup &= ~(1 << 8); /* turn off match20 wakeup */
1075 - wakeup |= 1 << 6; /* turn on gpio 6 wakeup */
1076 + wakeup = 1 << 5; /* turn on gpio 6 wakeup */
1077 #else
1078 - /* For testing, allow match20 to wake us up.
1079 - */
1080 + /* For testing, allow match20 to wake us up. */
1081 #ifdef SLEEP_TEST_TIMEOUT
1082 wakeup_counter0_set(sleep_ticks);
1083 #endif
1084 wakeup = 1 << 8; /* turn on match20 wakeup */
1085 wakeup = 0;
1086 #endif
1087 - au_writel(1, SYS_WAKESRC); /* clear cause */
1088 + au_writel(0, SYS_WAKESRC); /* clear cause */
1089 au_sync();
1090 au_writel(wakeup, SYS_WAKEMSK);
1091 au_sync();
1092 -
1093 + DPRINTK("Entering sleep!\n");
1094 save_and_sleep();
1095
1096 /* after a wakeup, the cpu vectors back to 0x1fc00000 so
1097 @@ -255,6 +253,7 @@
1098 */
1099 restore_core_regs();
1100 spin_unlock_irqrestore(&pm_lock, flags);
1101 + DPRINTK("Leaving sleep!\n");
1102 return 0;
1103 }
1104
1105 @@ -285,7 +284,6 @@
1106
1107 if (retval)
1108 return retval;
1109 -
1110 au_sleep();
1111 retval = pm_send_all(PM_RESUME, (void *) 0);
1112 }
1113 @@ -296,7 +294,6 @@
1114 void *buffer, size_t * len)
1115 {
1116 int retval = 0;
1117 - void au1k_wait(void);
1118
1119 if (!write) {
1120 *len = 0;
1121 @@ -305,119 +302,9 @@
1122 if (retval)
1123 return retval;
1124 suspend_mode = 1;
1125 - au1k_wait();
1126 - retval = pm_send_all(PM_RESUME, (void *) 0);
1127 - }
1128 - return retval;
1129 -}
1130
1131 -
1132 -static int pm_do_freq(ctl_table * ctl, int write, struct file *file,
1133 - void *buffer, size_t * len)
1134 -{
1135 - int retval = 0, i;
1136 - unsigned long val, pll;
1137 -#define TMPBUFLEN 64
1138 -#define MAX_CPU_FREQ 396
1139 - char buf[TMPBUFLEN], *p;
1140 - unsigned long flags, intc0_mask, intc1_mask;
1141 - unsigned long old_baud_base, old_cpu_freq, baud_rate, old_clk,
1142 - old_refresh;
1143 - unsigned long new_baud_base, new_cpu_freq, new_clk, new_refresh;
1144 -
1145 - spin_lock_irqsave(&pm_lock, flags);
1146 - if (!write) {
1147 - *len = 0;
1148 - } else {
1149 - /* Parse the new frequency */
1150 - if (*len > TMPBUFLEN - 1) {
1151 - spin_unlock_irqrestore(&pm_lock, flags);
1152 - return -EFAULT;
1153 - }
1154 - if (copy_from_user(buf, buffer, *len)) {
1155 - spin_unlock_irqrestore(&pm_lock, flags);
1156 - return -EFAULT;
1157 - }
1158 - buf[*len] = 0;
1159 - p = buf;
1160 - val = simple_strtoul(p, &p, 0);
1161 - if (val > MAX_CPU_FREQ) {
1162 - spin_unlock_irqrestore(&pm_lock, flags);
1163 - return -EFAULT;
1164 - }
1165 -
1166 - pll = val / 12;
1167 - if ((pll > 33) || (pll < 7)) { /* 396 MHz max, 84 MHz min */
1168 - /* revisit this for higher speed cpus */
1169 - spin_unlock_irqrestore(&pm_lock, flags);
1170 - return -EFAULT;
1171 - }
1172 -
1173 - old_baud_base = get_au1x00_uart_baud_base();
1174 - old_cpu_freq = get_au1x00_speed();
1175 -
1176 - new_cpu_freq = pll * 12 * 1000000;
1177 - new_baud_base = (new_cpu_freq / (2 * ((int)(au_readl(SYS_POWERCTRL)&0x03) + 2) * 16));
1178 - set_au1x00_speed(new_cpu_freq);
1179 - set_au1x00_uart_baud_base(new_baud_base);
1180 -
1181 - old_refresh = au_readl(MEM_SDREFCFG) & 0x1ffffff;
1182 - new_refresh =
1183 - ((old_refresh * new_cpu_freq) /
1184 - old_cpu_freq) | (au_readl(MEM_SDREFCFG) & ~0x1ffffff);
1185 -
1186 - au_writel(pll, SYS_CPUPLL);
1187 - au_sync_delay(1);
1188 - au_writel(new_refresh, MEM_SDREFCFG);
1189 - au_sync_delay(1);
1190 -
1191 - for (i = 0; i < 4; i++) {
1192 - if (au_readl
1193 - (UART_BASE + UART_MOD_CNTRL +
1194 - i * 0x00100000) == 3) {
1195 - old_clk =
1196 - au_readl(UART_BASE + UART_CLK +
1197 - i * 0x00100000);
1198 - // baud_rate = baud_base/clk
1199 - baud_rate = old_baud_base / old_clk;
1200 - /* we won't get an exact baud rate and the error
1201 - * could be significant enough that our new
1202 - * calculation will result in a clock that will
1203 - * give us a baud rate that's too far off from
1204 - * what we really want.
1205 - */
1206 - if (baud_rate > 100000)
1207 - baud_rate = 115200;
1208 - else if (baud_rate > 50000)
1209 - baud_rate = 57600;
1210 - else if (baud_rate > 30000)
1211 - baud_rate = 38400;
1212 - else if (baud_rate > 17000)
1213 - baud_rate = 19200;
1214 - else
1215 - (baud_rate = 9600);
1216 - // new_clk = new_baud_base/baud_rate
1217 - new_clk = new_baud_base / baud_rate;
1218 - au_writel(new_clk,
1219 - UART_BASE + UART_CLK +
1220 - i * 0x00100000);
1221 - au_sync_delay(10);
1222 - }
1223 - }
1224 + retval = pm_send_all(PM_RESUME, (void *) 0);
1225 }
1226 -
1227 -
1228 - /* We don't want _any_ interrupts other than
1229 - * match20. Otherwise our calibrate_delay()
1230 - * calculation will be off, potentially a lot.
1231 - */
1232 - intc0_mask = save_local_and_disable(0);
1233 - intc1_mask = save_local_and_disable(1);
1234 - local_enable_irq(AU1000_TOY_MATCH2_INT);
1235 - spin_unlock_irqrestore(&pm_lock, flags);
1236 - calibrate_delay();
1237 - restore_local_and_enable(0, intc0_mask);
1238 - restore_local_and_enable(1, intc1_mask);
1239 return retval;
1240 }
1241
1242 @@ -425,7 +312,6 @@
1243 static struct ctl_table pm_table[] = {
1244 {ACPI_S1_SLP_TYP, "suspend", NULL, 0, 0600, NULL, &pm_do_suspend},
1245 {ACPI_SLEEP, "sleep", NULL, 0, 0600, NULL, &pm_do_sleep},
1246 - {CTL_ACPI, "freq", NULL, 0, 0600, NULL, &pm_do_freq},
1247 {0}
1248 };
1249
1250 diff -Nur linux-2.4.30/arch/mips/au1000/common/reset.c linux-2.4.30-mips/arch/mips/au1000/common/reset.c
1251 --- linux-2.4.30/arch/mips/au1000/common/reset.c 2005-01-19 15:09:26.000000000 +0100
1252 +++ linux-2.4.30-mips/arch/mips/au1000/common/reset.c 2005-03-19 08:17:51.000000000 +0100
1253 @@ -37,8 +37,6 @@
1254 #include <asm/system.h>
1255 #include <asm/au1000.h>
1256
1257 -extern int au_sleep(void);
1258 -
1259 void au1000_restart(char *command)
1260 {
1261 /* Set all integrated peripherals to disabled states */
1262 @@ -144,6 +142,26 @@
1263 au_writel(0x00, 0xb1900064); /* sys_auxpll */
1264 au_writel(0x00, 0xb1900100); /* sys_pininputen */
1265 break;
1266 + case 0x04000000: /* Au1200 */
1267 + au_writel(0x00, 0xb400300c); /* ddma */
1268 + au_writel(0x00, 0xb1a00004); /* psc 0 */
1269 + au_writel(0x00, 0xb1b00004); /* psc 1 */
1270 + au_writel(0x00d02000, 0xb4020004); /* ehci, ohci, udc, otg */
1271 + au_writel(0x00, 0xb5000004); /* lcd */
1272 + au_writel(0x00, 0xb060000c); /* sd0 */
1273 + au_writel(0x00, 0xb068000c); /* sd1 */
1274 + au_writel(0x00, 0xb1100100); /* swcnt */
1275 + au_writel(0x00, 0xb0300000); /* aes */
1276 + au_writel(0x00, 0xb4004000); /* cim */
1277 + au_writel(0x00, 0xb1100100); /* uart0_enable */
1278 + au_writel(0x00, 0xb1200100); /* uart1_enable */
1279 + au_writel(0x00, 0xb1900020); /* sys_freqctrl0 */
1280 + au_writel(0x00, 0xb1900024); /* sys_freqctrl1 */
1281 + au_writel(0x00, 0xb1900028); /* sys_clksrc */
1282 + au_writel(0x10, 0xb1900060); /* sys_cpupll */
1283 + au_writel(0x00, 0xb1900064); /* sys_auxpll */
1284 + au_writel(0x00, 0xb1900100); /* sys_pininputen */
1285 + break;
1286
1287 default:
1288 break;
1289 @@ -163,32 +181,23 @@
1290
1291 void au1000_halt(void)
1292 {
1293 -#if defined(CONFIG_MIPS_PB1550)
1294 - /* power off system */
1295 - printk("\n** Powering off Pb1550\n");
1296 - au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
1297 - au_sync();
1298 - while(1); /* should not get here */
1299 -#endif
1300 - printk(KERN_NOTICE "\n** You can safely turn off the power\n");
1301 -#ifdef CONFIG_MIPS_MIRAGE
1302 - au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
1303 -#endif
1304 -#ifdef CONFIG_PM
1305 - au_sleep();
1306 -
1307 - /* should not get here */
1308 - printk(KERN_ERR "Unable to put cpu in sleep mode\n");
1309 - while(1);
1310 -#else
1311 - while (1)
1312 + /* Use WAIT in a low-power infinite spin loop */
1313 + while (1) {
1314 __asm__(".set\tmips3\n\t"
1315 "wait\n\t"
1316 ".set\tmips0");
1317 -#endif
1318 + }
1319 }
1320
1321 void au1000_power_off(void)
1322 {
1323 + extern void board_power_off (void);
1324 +
1325 + printk(KERN_NOTICE "\n** You can safely turn off the power\n");
1326 +
1327 + /* Give board a chance to power-off */
1328 + board_power_off();
1329 +
1330 + /* If board can't power-off, spin forever */
1331 au1000_halt();
1332 }
1333 diff -Nur linux-2.4.30/arch/mips/au1000/common/setup.c linux-2.4.30-mips/arch/mips/au1000/common/setup.c
1334 --- linux-2.4.30/arch/mips/au1000/common/setup.c 2005-01-19 15:09:26.000000000 +0100
1335 +++ linux-2.4.30-mips/arch/mips/au1000/common/setup.c 2005-01-30 09:01:27.000000000 +0100
1336 @@ -174,6 +174,40 @@
1337 initrd_end = (unsigned long)&__rd_end;
1338 #endif
1339
1340 +#if defined(CONFIG_SOC_AU1200)
1341 +#ifdef CONFIG_USB_EHCI_HCD
1342 + if ((argptr = strstr(argptr, "usb_ehci=")) == NULL) {
1343 + char usb_args[80];
1344 + argptr = prom_getcmdline();
1345 + memset(usb_args, 0, sizeof(usb_args));
1346 + sprintf(usb_args, " usb_ehci=base:0x%x,len:0x%x,irq:%d",
1347 + USB_EHCI_BASE, USB_EHCI_LEN, AU1000_USB_HOST_INT);
1348 + strcat(argptr, usb_args);
1349 + }
1350 +#ifdef CONFIG_USB_AMD5536UDC
1351 + /* enable EHC + OHC + UDC clocks, memory and bus mastering */
1352 +/* au_writel( 0x00DF207F, USB_MSR_BASE + 4); */
1353 + au_writel( 0xC0DF207F, USB_MSR_BASE + 4); // incl. prefetch
1354 +#else
1355 + /* enable EHC + OHC clocks, memory and bus mastering */
1356 +/* au_writel( 0x00DB200F, USB_MSR_BASE + 4); */
1357 + au_writel( 0xC0DB200F, USB_MSR_BASE + 4); /* incl. prefetch */
1358 +#endif
1359 + udelay(1000);
1360 +
1361 +#else /* CONFIG_USB_EHCI_HCD */
1362 +
1363 +#ifdef CONFIG_USB_AMD5536UDC
1364 +#ifndef CONFIG_USB_OHCI
1365 + /* enable UDC clocks, memory and bus mastering */
1366 +/* au_writel( 0x00DC2070, USB_MSR_BASE + 4); */
1367 + au_writel( 0xC0DC2070, USB_MSR_BASE + 4); // incl. prefetch
1368 + udelay(1000);
1369 +#endif
1370 +#endif
1371 +#endif /* CONFIG_USB_EHCI_HCD */
1372 +#endif /* CONFIG_SOC_AU1200 */
1373 +
1374 #if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1375 #ifdef CONFIG_USB_OHCI
1376 if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
1377 @@ -187,19 +221,38 @@
1378 #endif
1379
1380 #ifdef CONFIG_USB_OHCI
1381 - // enable host controller and wait for reset done
1382 +#if defined(CONFIG_SOC_AU1200)
1383 +#ifndef CONFIG_USB_EHCI_HCD
1384 +#ifdef CONFIG_USB_AMD5536UDC
1385 + /* enable OHC + UDC clocks, memory and bus mastering */
1386 +/* au_writel( 0x00DD2073, USB_MSR_BASE + 4); */
1387 + au_writel( 0xC0DD2073, USB_MSR_BASE + 4); // incl. prefetch
1388 +#else
1389 + /* enable OHC clocks, memory and bus mastering */
1390 + au_writel( 0x00D12003, USB_MSR_BASE + 4);
1391 +#endif
1392 + udelay(1000);
1393 +printk("DEBUG: Reading Au1200 USB2 reg 0x%x\n", au_readl(USB_MSR_BASE + 4));
1394 +#endif
1395 +#else
1396 + /* Au1000, Au1500, Au1100, Au1550 */
1397 + /* enable host controller and wait for reset done */
1398 au_writel(0x08, USB_HOST_CONFIG);
1399 udelay(1000);
1400 au_writel(0x0E, USB_HOST_CONFIG);
1401 udelay(1000);
1402 - au_readl(USB_HOST_CONFIG); // throw away first read
1403 + au_readl(USB_HOST_CONFIG); /* throw away first read */
1404 while (!(au_readl(USB_HOST_CONFIG) & 0x10))
1405 au_readl(USB_HOST_CONFIG);
1406 +#endif /* CONFIG_SOC_AU1200 */
1407 #endif
1408 -#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE)
1409 +#else
1410 +
1411 +#endif /* defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1X00_USB_DEVICE) */
1412 +
1413
1414 #ifdef CONFIG_FB
1415 - // Needed if PCI video card in use
1416 + /* Needed if PCI video card in use */
1417 conswitchp = &dummy_con;
1418 #endif
1419
1420 @@ -209,8 +262,7 @@
1421 #endif
1422
1423 #ifdef CONFIG_BLK_DEV_IDE
1424 - /* Board setup takes precedence for unique devices.
1425 - */
1426 + /* Board setup takes precedence for unique devices. */
1427 if ((ide_ops == NULL) || (ide_ops == &no_ide_ops))
1428 ide_ops = &std_ide_ops;
1429 #endif
1430 diff -Nur linux-2.4.30/arch/mips/au1000/common/sleeper.S linux-2.4.30-mips/arch/mips/au1000/common/sleeper.S
1431 --- linux-2.4.30/arch/mips/au1000/common/sleeper.S 2004-02-18 14:36:30.000000000 +0100
1432 +++ linux-2.4.30-mips/arch/mips/au1000/common/sleeper.S 2005-01-30 09:01:27.000000000 +0100
1433 @@ -15,17 +15,48 @@
1434 #include <asm/addrspace.h>
1435 #include <asm/regdef.h>
1436 #include <asm/stackframe.h>
1437 +#include <asm/au1000.h>
1438 +
1439 +/*
1440 + * Note: This file is *not* conditional on CONFIG_PM since Alchemy sleep
1441 + * need not be tied to any particular power management scheme.
1442 + */
1443 +
1444 + .extern ___flush_cache_all
1445
1446 .text
1447 - .set macro
1448 - .set noat
1449 .align 5
1450
1451 -/* Save all of the processor general registers and go to sleep.
1452 - * A wakeup condition will get us back here to restore the registers.
1453 +/*
1454 + * Save the processor general registers and go to sleep. A wakeup
1455 + * condition will get us back here to restore the registers.
1456 */
1457 -LEAF(save_and_sleep)
1458
1459 +/* still need to fix alignment issues here */
1460 +save_and_sleep_frmsz = 48
1461 +NESTED(save_and_sleep, save_and_sleep_frmsz, ra)
1462 + .set noreorder
1463 + .set nomacro
1464 + .set noat
1465 + subu sp, save_and_sleep_frmsz
1466 + sw ra, save_and_sleep_frmsz-4(sp)
1467 + sw s0, save_and_sleep_frmsz-8(sp)
1468 + sw s1, save_and_sleep_frmsz-12(sp)
1469 + sw s2, save_and_sleep_frmsz-16(sp)
1470 + sw s3, save_and_sleep_frmsz-20(sp)
1471 + sw s4, save_and_sleep_frmsz-24(sp)
1472 + sw s5, save_and_sleep_frmsz-28(sp)
1473 + sw s6, save_and_sleep_frmsz-32(sp)
1474 + sw s7, save_and_sleep_frmsz-36(sp)
1475 + sw s8, save_and_sleep_frmsz-40(sp)
1476 + sw gp, save_and_sleep_frmsz-44(sp)
1477 +
1478 + /* We only need to save the registers that the calling function
1479 + * hasn't saved for us. 0 is always zero. 8 - 15, 24 and 25 are
1480 + * temporaries and can be used without saving. 26 and 27 are reserved
1481 + * for interrupt/trap handling and expected to change. 29 is the
1482 + * stack pointer which is handled as a special case here.
1483 + */
1484 subu sp, PT_SIZE
1485 sw $1, PT_R1(sp)
1486 sw $2, PT_R2(sp)
1487 @@ -34,14 +65,6 @@
1488 sw $5, PT_R5(sp)
1489 sw $6, PT_R6(sp)
1490 sw $7, PT_R7(sp)
1491 - sw $8, PT_R8(sp)
1492 - sw $9, PT_R9(sp)
1493 - sw $10, PT_R10(sp)
1494 - sw $11, PT_R11(sp)
1495 - sw $12, PT_R12(sp)
1496 - sw $13, PT_R13(sp)
1497 - sw $14, PT_R14(sp)
1498 - sw $15, PT_R15(sp)
1499 sw $16, PT_R16(sp)
1500 sw $17, PT_R17(sp)
1501 sw $18, PT_R18(sp)
1502 @@ -50,32 +73,47 @@
1503 sw $21, PT_R21(sp)
1504 sw $22, PT_R22(sp)
1505 sw $23, PT_R23(sp)
1506 - sw $24, PT_R24(sp)
1507 - sw $25, PT_R25(sp)
1508 - sw $26, PT_R26(sp)
1509 - sw $27, PT_R27(sp)
1510 sw $28, PT_R28(sp)
1511 - sw $29, PT_R29(sp)
1512 sw $30, PT_R30(sp)
1513 sw $31, PT_R31(sp)
1514 +#define PT_C0STATUS PT_LO
1515 +#define PT_CONTEXT PT_HI
1516 +#define PT_PAGEMASK PT_EPC
1517 +#define PT_CONFIG PT_BVADDR
1518 mfc0 k0, CP0_STATUS
1519 - sw k0, 0x20(sp)
1520 + sw k0, PT_C0STATUS(sp) // 0x20
1521 mfc0 k0, CP0_CONTEXT
1522 - sw k0, 0x1c(sp)
1523 + sw k0, PT_CONTEXT(sp) // 0x1c
1524 mfc0 k0, CP0_PAGEMASK
1525 - sw k0, 0x18(sp)
1526 + sw k0, PT_PAGEMASK(sp) // 0x18
1527 mfc0 k0, CP0_CONFIG
1528 - sw k0, 0x14(sp)
1529 + sw k0, PT_CONFIG(sp) // 0x14
1530 +
1531 + .set macro
1532 + .set at
1533 +
1534 + li t0, SYS_SLPPWR
1535 + sw zero, 0(t0) /* Get the processor ready to sleep */
1536 + sync
1537
1538 /* Now set up the scratch registers so the boot rom will
1539 * return to this point upon wakeup.
1540 + * sys_scratch0 : SP
1541 + * sys_scratch1 : RA
1542 + */
1543 + li t0, SYS_SCRATCH0
1544 + li t1, SYS_SCRATCH1
1545 + sw sp, 0(t0)
1546 + la k0, resume_from_sleep
1547 + sw k0, 0(t1)
1548 +
1549 +/*
1550 + * Flush DCACHE to make sure context is in memory
1551 */
1552 - la k0, 1f
1553 - lui k1, 0xb190
1554 - ori k1, 0x18
1555 - sw sp, 0(k1)
1556 - ori k1, 0x1c
1557 - sw k0, 0(k1)
1558 + la t1,___flush_cache_all /* _flush_cache_all is a function pointer */
1559 + lw t0,0(t1)
1560 + jal t0
1561 + nop
1562
1563 /* Put SDRAM into self refresh. Preload instructions into cache,
1564 * issue a precharge, then auto refresh, then sleep commands to it.
1565 @@ -88,30 +126,65 @@
1566 cache 0x14, 96(t0)
1567 .set mips0
1568
1569 + /* Put SDRAM to sleep */
1570 sdsleep:
1571 - lui k0, 0xb400
1572 - sw zero, 0x001c(k0) /* Precharge */
1573 - sw zero, 0x0020(k0) /* Auto refresh */
1574 - sw zero, 0x0030(k0) /* SDRAM sleep */
1575 + li a0, MEM_PHYS_ADDR
1576 + or a0, a0, 0xA0000000
1577 +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100) || defined(CONFIG_SOC_AU1500)
1578 + lw k0, MEM_SDMODE0(a0)
1579 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1580 + sw zero, MEM_SDAUTOREF(a0) /* Auto Refresh */
1581 + sw zero, MEM_SDSLEEP(a0) /* Sleep */
1582 sync
1583 -
1584 - lui k1, 0xb190
1585 - sw zero, 0x0078(k1) /* get ready to sleep */
1586 +#endif
1587 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
1588 + sw zero, MEM_SDPRECMD(a0) /* Precharge */
1589 + sw zero, MEM_SDSREF(a0)
1590 +
1591 + #lw t0, MEM_SDSTAT(a0)
1592 + #and t0, t0, 0x01000000
1593 + li t0, 0x01000000
1594 +refresh_not_set:
1595 + lw t1, MEM_SDSTAT(a0)
1596 + and t2, t1, t0
1597 + beq zero, t2, refresh_not_set
1598 + nop
1599 +
1600 + li t0, ~0x30000000
1601 + lw t1, MEM_SDCONFIGA(a0)
1602 + and t1, t0, t1
1603 + sw t1, MEM_SDCONFIGA(a0)
1604 sync
1605 - sw zero, 0x007c(k1) /* Put processor to sleep */
1606 +#endif
1607 +
1608 + li t0, SYS_SLEEP
1609 + sw zero, 0(t0) /* Put processor to sleep */
1610 sync
1611 + nop
1612 + nop
1613 + nop
1614 + nop
1615 + nop
1616 + nop
1617 + nop
1618 + nop
1619 +
1620
1621 /* This is where we return upon wakeup.
1622 * Reload all of the registers and return.
1623 */
1624 -1: nop
1625 - lw k0, 0x20(sp)
1626 +resume_from_sleep:
1627 + nop
1628 + .set nomacro
1629 + .set noat
1630 +
1631 + lw k0, PT_C0STATUS(sp) // 0x20
1632 mtc0 k0, CP0_STATUS
1633 - lw k0, 0x1c(sp)
1634 + lw k0, PT_CONTEXT(sp) // 0x1c
1635 mtc0 k0, CP0_CONTEXT
1636 - lw k0, 0x18(sp)
1637 + lw k0, PT_PAGEMASK(sp) // 0x18
1638 mtc0 k0, CP0_PAGEMASK
1639 - lw k0, 0x14(sp)
1640 + lw k0, PT_CONFIG(sp) // 0x14
1641 mtc0 k0, CP0_CONFIG
1642 lw $1, PT_R1(sp)
1643 lw $2, PT_R2(sp)
1644 @@ -120,14 +193,6 @@
1645 lw $5, PT_R5(sp)
1646 lw $6, PT_R6(sp)
1647 lw $7, PT_R7(sp)
1648 - lw $8, PT_R8(sp)
1649 - lw $9, PT_R9(sp)
1650 - lw $10, PT_R10(sp)
1651 - lw $11, PT_R11(sp)
1652 - lw $12, PT_R12(sp)
1653 - lw $13, PT_R13(sp)
1654 - lw $14, PT_R14(sp)
1655 - lw $15, PT_R15(sp)
1656 lw $16, PT_R16(sp)
1657 lw $17, PT_R17(sp)
1658 lw $18, PT_R18(sp)
1659 @@ -136,15 +201,36 @@
1660 lw $21, PT_R21(sp)
1661 lw $22, PT_R22(sp)
1662 lw $23, PT_R23(sp)
1663 - lw $24, PT_R24(sp)
1664 - lw $25, PT_R25(sp)
1665 - lw $26, PT_R26(sp)
1666 - lw $27, PT_R27(sp)
1667 lw $28, PT_R28(sp)
1668 - lw $29, PT_R29(sp)
1669 lw $30, PT_R30(sp)
1670 lw $31, PT_R31(sp)
1671 +
1672 + .set macro
1673 + .set at
1674 +
1675 + /* clear the wake source, but save it as the return value of the function */
1676 + li t0, SYS_WAKESRC
1677 + lw v0, 0(t0)
1678 + sw v0, PT_R2(sp)
1679 + sw zero, 0(t0)
1680 +
1681 addiu sp, PT_SIZE
1682
1683 + lw gp, save_and_sleep_frmsz-44(sp)
1684 + lw s8, save_and_sleep_frmsz-40(sp)
1685 + lw s7, save_and_sleep_frmsz-36(sp)
1686 + lw s6, save_and_sleep_frmsz-32(sp)
1687 + lw s5, save_and_sleep_frmsz-28(sp)
1688 + lw s4, save_and_sleep_frmsz-24(sp)
1689 + lw s3, save_and_sleep_frmsz-20(sp)
1690 + lw s2, save_and_sleep_frmsz-16(sp)
1691 + lw s1, save_and_sleep_frmsz-12(sp)
1692 + lw s0, save_and_sleep_frmsz-8(sp)
1693 + lw ra, save_and_sleep_frmsz-4(sp)
1694 +
1695 + addu sp, save_and_sleep_frmsz
1696 jr ra
1697 + nop
1698 + .set reorder
1699 END(save_and_sleep)
1700 +
1701 diff -Nur linux-2.4.30/arch/mips/au1000/common/time.c linux-2.4.30-mips/arch/mips/au1000/common/time.c
1702 --- linux-2.4.30/arch/mips/au1000/common/time.c 2005-01-19 15:09:26.000000000 +0100
1703 +++ linux-2.4.30-mips/arch/mips/au1000/common/time.c 2005-04-08 10:33:17.000000000 +0200
1704 @@ -50,7 +50,6 @@
1705 #include <linux/mc146818rtc.h>
1706 #include <linux/timex.h>
1707
1708 -extern void startup_match20_interrupt(void);
1709 extern void do_softirq(void);
1710 extern volatile unsigned long wall_jiffies;
1711 unsigned long missed_heart_beats = 0;
1712 @@ -59,14 +58,14 @@
1713 static unsigned long r4k_cur; /* What counter should be at next timer irq */
1714 extern rwlock_t xtime_lock;
1715 int no_au1xxx_32khz;
1716 -void (*au1k_wait_ptr)(void);
1717 +extern int allow_au1k_wait; /* default off for CP0 Counter */
1718
1719 /* Cycle counter value at the previous timer interrupt.. */
1720 static unsigned int timerhi = 0, timerlo = 0;
1721
1722 #ifdef CONFIG_PM
1723 #define MATCH20_INC 328
1724 -extern void startup_match20_interrupt(void);
1725 +extern void startup_match20_interrupt(void (*handler)(int, void *, struct pt_regs *));
1726 static unsigned long last_pc0, last_match20;
1727 #endif
1728
1729 @@ -385,7 +384,6 @@
1730 {
1731 unsigned int est_freq;
1732 extern unsigned long (*do_gettimeoffset)(void);
1733 - extern void au1k_wait(void);
1734
1735 printk("calculating r4koff... ");
1736 r4k_offset = cal_r4koff();
1737 @@ -437,9 +435,6 @@
1738 au_writel(0, SYS_TOYWRITE);
1739 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S);
1740
1741 - au_writel(au_readl(SYS_WAKEMSK) | (1<<8), SYS_WAKEMSK);
1742 - au_writel(~0, SYS_WAKESRC);
1743 - au_sync();
1744 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1745
1746 /* setup match20 to interrupt once every 10ms */
1747 @@ -447,13 +442,13 @@
1748 au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2);
1749 au_sync();
1750 while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20);
1751 - startup_match20_interrupt();
1752 + startup_match20_interrupt(counter0_irq);
1753
1754 do_gettimeoffset = do_fast_pm_gettimeoffset;
1755
1756 /* We can use the real 'wait' instruction.
1757 */
1758 - au1k_wait_ptr = au1k_wait;
1759 + allow_au1k_wait = 1;
1760 }
1761
1762 #else
1763 diff -Nur linux-2.4.30/arch/mips/au1000/db1x00/Makefile linux-2.4.30-mips/arch/mips/au1000/db1x00/Makefile
1764 --- linux-2.4.30/arch/mips/au1000/db1x00/Makefile 2005-01-19 15:09:26.000000000 +0100
1765 +++ linux-2.4.30-mips/arch/mips/au1000/db1x00/Makefile 2005-01-30 09:06:19.000000000 +0100
1766 @@ -17,4 +17,11 @@
1767 obj-y := init.o board_setup.o irqmap.o
1768 obj-$(CONFIG_WM97XX_COMODULE) += mirage_ts.o
1769
1770 +ifdef CONFIG_MIPS_DB1100
1771 +ifdef CONFIG_MMC
1772 +obj-y += mmc_support.o
1773 +export-objs += mmc_support.o
1774 +endif
1775 +endif
1776 +
1777 include $(TOPDIR)/Rules.make
1778 diff -Nur linux-2.4.30/arch/mips/au1000/db1x00/board_setup.c linux-2.4.30-mips/arch/mips/au1000/db1x00/board_setup.c
1779 --- linux-2.4.30/arch/mips/au1000/db1x00/board_setup.c 2005-01-19 15:09:26.000000000 +0100
1780 +++ linux-2.4.30-mips/arch/mips/au1000/db1x00/board_setup.c 2005-03-19 08:17:51.000000000 +0100
1781 @@ -46,10 +46,22 @@
1782 #include <asm/au1000.h>
1783 #include <asm/db1x00.h>
1784
1785 -extern struct rtc_ops no_rtc_ops;
1786 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1787 +#include <asm/au1xxx_dbdma.h>
1788 +extern struct ide_ops *ide_ops;
1789 +extern struct ide_ops au1xxx_ide_ops;
1790 +extern u32 au1xxx_ide_virtbase;
1791 +extern u64 au1xxx_ide_physbase;
1792 +extern int au1xxx_ide_irq;
1793 +
1794 +/* Ddma */
1795 +chan_tab_t *ide_read_ch, *ide_write_ch;
1796 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
1797 +
1798 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
1799 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
1800
1801 -/* not correct for db1550 */
1802 -static BCSR * const bcsr = (BCSR *)0xAE000000;
1803 +extern struct rtc_ops no_rtc_ops;
1804
1805 void board_reset (void)
1806 {
1807 @@ -57,6 +69,13 @@
1808 au_writel(0x00000000, 0xAE00001C);
1809 }
1810
1811 +void board_power_off (void)
1812 +{
1813 +#ifdef CONFIG_MIPS_MIRAGE
1814 + au_writel((1 << 26) | (1 << 10), GPIO2_OUTPUT);
1815 +#endif
1816 +}
1817 +
1818 void __init board_setup(void)
1819 {
1820 u32 pin_func;
1821 @@ -108,8 +127,42 @@
1822 au_writel(0x02000200, GPIO2_OUTPUT);
1823 #endif
1824
1825 +#if defined(CONFIG_AU1XXX_SMC91111)
1826 +#define CPLD_CONTROL (0xAF00000C)
1827 + {
1828 + extern uint32_t au1xxx_smc91111_base;
1829 + extern unsigned int au1xxx_smc91111_irq;
1830 + extern int au1xxx_smc91111_nowait;
1831 +
1832 + au1xxx_smc91111_base = 0xAC000300;
1833 + au1xxx_smc91111_irq = AU1000_GPIO_8;
1834 + au1xxx_smc91111_nowait = 1;
1835 +
1836 + /* set up the Static Bus timing - only 396Mhz */
1837 + bcsr->resets |= 0x7;
1838 + au_writel(0x00010003, MEM_STCFG0);
1839 + au_writel(0x000c00c0, MEM_STCFG2);
1840 + au_writel(0x85E1900D, MEM_STTIME2);
1841 + }
1842 +#endif /* end CONFIG_SMC91111 */
1843 au_sync();
1844
1845 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
1846 + /*
1847 + * Iniz IDE parameters
1848 + */
1849 + ide_ops = &au1xxx_ide_ops;
1850 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;
1851 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
1852 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
1853 +
1854 + /*
1855 + * change PIO or PIO+Ddma
1856 + * check the GPIO-6 pin condition. db1550:s6_dot
1857 + */
1858 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
1859 +#endif
1860 +
1861 #ifdef CONFIG_MIPS_DB1000
1862 printk("AMD Alchemy Au1000/Db1000 Board\n");
1863 #endif
1864 diff -Nur linux-2.4.30/arch/mips/au1000/db1x00/irqmap.c linux-2.4.30-mips/arch/mips/au1000/db1x00/irqmap.c
1865 --- linux-2.4.30/arch/mips/au1000/db1x00/irqmap.c 2005-01-19 15:09:26.000000000 +0100
1866 +++ linux-2.4.30-mips/arch/mips/au1000/db1x00/irqmap.c 2005-01-30 09:06:19.000000000 +0100
1867 @@ -53,6 +53,7 @@
1868 #ifdef CONFIG_MIPS_DB1550
1869 { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 IRQ#
1870 { AU1000_GPIO_5, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 1 IRQ#
1871 + { AU1000_GPIO_8, INTC_INT_LOW_LEVEL, 0 }, // Daughtercard IRQ#
1872 #else
1873 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 Fully_Interted#
1874 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 }, // PCMCIA Card 0 STSCHG#
1875 diff -Nur linux-2.4.30/arch/mips/au1000/db1x00/mmc_support.c linux-2.4.30-mips/arch/mips/au1000/db1x00/mmc_support.c
1876 --- linux-2.4.30/arch/mips/au1000/db1x00/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
1877 +++ linux-2.4.30-mips/arch/mips/au1000/db1x00/mmc_support.c 2005-01-30 09:07:01.000000000 +0100
1878 @@ -0,0 +1,126 @@
1879 +/*
1880 + * BRIEF MODULE DESCRIPTION
1881 + *
1882 + * MMC support routines for DB1100.
1883 + *
1884 + *
1885 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
1886 + * Author: Embedded Edge, LLC.
1887 + * Contact: dan@embeddededge.com
1888 + *
1889 + * This program is free software; you can redistribute it and/or modify it
1890 + * under the terms of the GNU General Public License as published by the
1891 + * Free Software Foundation; either version 2 of the License, or (at your
1892 + * option) any later version.
1893 + *
1894 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
1895 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
1896 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
1897 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1898 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
1899 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
1900 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
1901 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
1902 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
1903 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
1904 + *
1905 + * You should have received a copy of the GNU General Public License along
1906 + * with this program; if not, write to the Free Software Foundation, Inc.,
1907 + * 675 Mass Ave, Cambridge, MA 02139, USA.
1908 + *
1909 + */
1910 +
1911 +
1912 +#include <linux/config.h>
1913 +#include <linux/kernel.h>
1914 +#include <linux/module.h>
1915 +#include <linux/init.h>
1916 +
1917 +#include <asm/irq.h>
1918 +#include <asm/au1000.h>
1919 +#include <asm/au1100_mmc.h>
1920 +#include <asm/db1x00.h>
1921 +
1922 +
1923 +/* SD/MMC controller support functions */
1924 +
1925 +/*
1926 + * Detect card.
1927 + */
1928 +void mmc_card_inserted(int _n_, int *_res_)
1929 +{
1930 + u32 gpios = au_readl(SYS_PINSTATERD);
1931 + u32 emptybit = (_n_) ? (1<<20) : (1<<19);
1932 + *_res_ = ((gpios & emptybit) == 0);
1933 +}
1934 +
1935 +/*
1936 + * Check card write protection.
1937 + */
1938 +void mmc_card_writable(int _n_, int *_res_)
1939 +{
1940 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1941 + unsigned long mmc_wp, board_specific;
1942 +
1943 + if (_n_) {
1944 + mmc_wp = BCSR_BOARD_SD1_WP;
1945 + } else {
1946 + mmc_wp = BCSR_BOARD_SD0_WP;
1947 + }
1948 +
1949 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1950 +
1951 + if (!(board_specific & mmc_wp)) {/* low means card writable */
1952 + *_res_ = 1;
1953 + } else {
1954 + *_res_ = 0;
1955 + }
1956 +}
1957 +
1958 +/*
1959 + * Apply power to card slot.
1960 + */
1961 +void mmc_power_on(int _n_)
1962 +{
1963 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1964 + unsigned long mmc_pwr, board_specific;
1965 +
1966 + if (_n_) {
1967 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1968 + } else {
1969 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1970 + }
1971 +
1972 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1973 + board_specific |= mmc_pwr;
1974 +
1975 + au_writel(board_specific, (int)(&bcsr->specific));
1976 + au_sync_delay(1);
1977 +}
1978 +
1979 +/*
1980 + * Remove power from card slot.
1981 + */
1982 +void mmc_power_off(int _n_)
1983 +{
1984 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
1985 + unsigned long mmc_pwr, board_specific;
1986 +
1987 + if (_n_) {
1988 + mmc_pwr = BCSR_BOARD_SD1_PWR;
1989 + } else {
1990 + mmc_pwr = BCSR_BOARD_SD0_PWR;
1991 + }
1992 +
1993 + board_specific = au_readl((unsigned long)(&bcsr->specific));
1994 + board_specific &= ~mmc_pwr;
1995 +
1996 + au_writel(board_specific, (int)(&bcsr->specific));
1997 + au_sync_delay(1);
1998 +}
1999 +
2000 +EXPORT_SYMBOL(mmc_card_inserted);
2001 +EXPORT_SYMBOL(mmc_card_writable);
2002 +EXPORT_SYMBOL(mmc_power_on);
2003 +EXPORT_SYMBOL(mmc_power_off);
2004 +
2005 diff -Nur linux-2.4.30/arch/mips/au1000/ficmmp/Makefile linux-2.4.30-mips/arch/mips/au1000/ficmmp/Makefile
2006 --- linux-2.4.30/arch/mips/au1000/ficmmp/Makefile 1970-01-01 01:00:00.000000000 +0100
2007 +++ linux-2.4.30-mips/arch/mips/au1000/ficmmp/Makefile 2005-01-30 09:01:27.000000000 +0100
2008 @@ -0,0 +1,25 @@
2009 +#
2010 +# Copyright 2000 MontaVista Software Inc.
2011 +# Author: MontaVista Software, Inc.
2012 +# ppopov@mvista.com or source@mvista.com
2013 +#
2014 +# Makefile for the Alchemy Semiconductor FIC board.
2015 +#
2016 +# Note! Dependencies are done automagically by 'make dep', which also
2017 +# removes any old dependencies. DON'T put your own dependencies here
2018 +# unless it's something special (ie not a .c file).
2019 +#
2020 +
2021 +USE_STANDARD_AS_RULE := true
2022 +
2023 +O_TARGET := ficmmp.o
2024 +
2025 +obj-y := init.o board_setup.o irqmap.o au1200_ibutton.o au1xxx_dock.o
2026 +
2027 +ifdef CONFIG_MMC
2028 +obj-y += mmc_support.o
2029 +export-objs +=mmc_support.o
2030 +endif
2031 +
2032 +
2033 +include $(TOPDIR)/Rules.make
2034 diff -Nur linux-2.4.30/arch/mips/au1000/ficmmp/au1200_ibutton.c linux-2.4.30-mips/arch/mips/au1000/ficmmp/au1200_ibutton.c
2035 --- linux-2.4.30/arch/mips/au1000/ficmmp/au1200_ibutton.c 1970-01-01 01:00:00.000000000 +0100
2036 +++ linux-2.4.30-mips/arch/mips/au1000/ficmmp/au1200_ibutton.c 2005-02-03 07:35:29.000000000 +0100
2037 @@ -0,0 +1,270 @@
2038 +/* ----------------------------------------------------------------------
2039 + * mtwilson_keys.c
2040 + *
2041 + * Copyright (C) 2003 Intrinsyc Software Inc.
2042 + *
2043 + * Intel Personal Media Player buttons
2044 + *
2045 + * This program is free software; you can redistribute it and/or modify
2046 + * it under the terms of the GNU General Public License version 2 as
2047 + * published by the Free Software Foundation.
2048 + *
2049 + * May 02, 2003 : Initial version [FB]
2050 + *
2051 + ------------------------------------------------------------------------*/
2052 +
2053 +#include <linux/config.h>
2054 +#include <linux/module.h>
2055 +#include <linux/kernel.h>
2056 +#include <linux/init.h>
2057 +#include <linux/fs.h>
2058 +#include <linux/sched.h>
2059 +#include <linux/miscdevice.h>
2060 +#include <linux/errno.h>
2061 +#include <linux/poll.h>
2062 +#include <linux/delay.h>
2063 +#include <linux/input.h>
2064 +
2065 +#include <asm/au1000.h>
2066 +#include <asm/uaccess.h>
2067 +#include <asm/au1xxx_gpio.h>
2068 +#include <asm/irq.h>
2069 +#include <asm/keyboard.h>
2070 +#include <linux/time.h>
2071 +
2072 +#define DRIVER_VERSION "V1.0"
2073 +#define DRIVER_AUTHOR "FIC"
2074 +#define DRIVER_DESC "FIC Travis Media Player Button Driver"
2075 +#define DRIVER_NAME "Au1200Button"
2076 +
2077 +#define BUTTON_MAIN (1<<1)
2078 +#define BUTTON_SELECT (1<<6)
2079 +#define BUTTON_GUIDE (1<<12)
2080 +#define BUTTON_DOWN (1<<17)
2081 +#define BUTTON_LEFT (1<<19)
2082 +#define BUTTON_RIGHT (1<<26)
2083 +#define BUTTON_UP (1<<28)
2084 +
2085 +#define BUTTON_MASK (\
2086 + BUTTON_MAIN \
2087 + | BUTTON_SELECT \
2088 + | BUTTON_GUIDE \
2089 + | BUTTON_DOWN \
2090 + | BUTTON_LEFT \
2091 + | BUTTON_RIGHT \
2092 + | BUTTON_UP \
2093 + )
2094 +
2095 +#define BUTTON_INVERT (\
2096 + BUTTON_MAIN \
2097 + | 0 \
2098 + | BUTTON_GUIDE \
2099 + | 0 \
2100 + | 0 \
2101 + | 0 \
2102 + | 0 \
2103 + )
2104 +
2105 +char button_map[32]={0,KEY_S,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
2106 +//char button_map[32]={0,0,0,0,0,0,KEY_ENTER,0,0,0,0,0,KEY_G,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
2107 +
2108 +//char button_map[32]={0,KEY_TAB,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
2109 +//char button_map[32]={0,0,0,0,0,0,KEY_M,0,0,0,0,0,KEY_S,0,0,0,0,KEY_DOWN,0,KEY_LEFT,0,0,0,0,0,0,KEY_RIGHT,0,KEY_UP,0,0,0};
2110 +
2111 +#define BUTTON_COUNT (sizeof (button_map) / sizeof (button_map[0]))
2112 +
2113 +struct input_dev dev;
2114 +struct timeval cur_tv;
2115 +
2116 +static unsigned int old_tv_usec = 0;
2117 +
2118 +static unsigned int read_button_state(void)
2119 +{
2120 + unsigned int state;
2121 +
2122 + state = au_readl(SYS_PINSTATERD) & BUTTON_MASK; /* get gpio status */
2123 +
2124 + state ^= BUTTON_INVERT; /* invert main & guide button */
2125 +
2126 + /* printk("au1200_ibutton.c: button state [0x%X]\r\n",state); */
2127 + return state;
2128 +}
2129 +
2130 +//This function returns 0 if the allowed microseconds have elapsed since the last call to ths function, otherwise it returns 1 to indicate a bounce condition
2131 +static unsigned int bounce()
2132 +{
2133 +
2134 + unsigned int elapsed_time;
2135 +
2136 + do_gettimeofday (&cur_tv);
2137 +
2138 + if (!old_tv_usec) {
2139 + old_tv_usec = cur_tv.tv_usec;
2140 + return 0;
2141 + }
2142 +
2143 + if(cur_tv.tv_usec > old_tv_usec) {
2144 + /* If there hasn't been rollover */
2145 + elapsed_time = ((cur_tv.tv_usec - old_tv_usec));
2146 + }
2147 + else {
2148 + /* Accounting for rollover */
2149 + elapsed_time = ((1000000 - old_tv_usec + cur_tv.tv_usec));
2150 + }
2151 +
2152 + if (elapsed_time > 250000) {
2153 + old_tv_usec = 0; /* reset the bounce time */
2154 + return 0;
2155 + }
2156 +
2157 + return 1;
2158 +}
2159 +
2160 +/* button interrupt handler */
2161 +static void button_interrupt(int irq, void *dev, struct pt_regs *regs)
2162 +{
2163 +
2164 + unsigned int i,bit_mask, key_choice;
2165 + u32 button_state;
2166 +
2167 + /* Report state to upper level */
2168 +
2169 + button_state = read_button_state() & BUTTON_MASK; /* get new gpio status */
2170 +
2171 + /* Return if this is a repeated (bouncing) event */
2172 + if(bounce())
2173 + return;
2174 +
2175 + /* we want to make keystrokes */
2176 + for( i=0; i< BUTTON_COUNT; i++) {
2177 + bit_mask = 1<<i;
2178 + if (button_state & bit_mask) {
2179 + key_choice = button_map[i];
2180 + /* toggle key down */
2181 + input_report_key(dev, key_choice, 1);
2182 + /* toggle key up */
2183 + input_report_key(dev, key_choice, 0);
2184 + printk("ibutton gpio %d stat %x scan code %d\r\n",
2185 + i, button_state, key_choice);
2186 + /* Only report the first key event; it doesn't make
2187 + * sense for two keys to be pressed at the same time,
2188 + * and causes problems with the directional keys
2189 + * return;
2190 + */
2191 + }
2192 + }
2193 +}
2194 +
2195 +static int
2196 +button_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
2197 +{
2198 + static int prev_scancode;
2199 +
2200 + printk( "ibutton.c: translate: scancode=%x raw_mode=%x\n",
2201 + scancode, raw_mode);
2202 +
2203 + if (scancode == 0xe0 || scancode == 0xe1) {
2204 + prev_scancode = scancode;
2205 + return 0;
2206 + }
2207 +
2208 + if (scancode == 0x00 || scancode == 0xff) {
2209 + prev_scancode = 0;
2210 + return 0;
2211 + }
2212 +
2213 + *keycode = scancode;
2214 +
2215 + return 1;
2216 +}
2217 +
2218 +/* init button hardware */
2219 +static int button_hw_init(void)
2220 +{
2221 + unsigned int ipinfunc=0;
2222 +
2223 + printk("au1200_ibutton.c: Initializing buttons hardware\n");
2224 +
2225 + // initialize GPIO pin function assignments
2226 +
2227 + ipinfunc = au_readl(SYS_PINFUNC);
2228 +
2229 + ipinfunc &= ~(SYS_PINFUNC_DMA | SYS_PINFUNC_S0A | SYS_PINFUNC_S0B);
2230 + au_writel( ipinfunc ,SYS_PINFUNC);
2231 +
2232 + ipinfunc |= (SYS_PINFUNC_S0C);
2233 + au_writel( ipinfunc ,SYS_PINFUNC);
2234 +
2235 + return 0;
2236 +}
2237 +
2238 +/* button driver init */
2239 +static int __init button_init(void)
2240 +{
2241 + int ret, i;
2242 + unsigned int flag=0;
2243 +
2244 + printk("au1200_ibutton.c: button_init()\r\n");
2245 +
2246 + button_hw_init();
2247 +
2248 + /* register all button irq handler */
2249 +
2250 + for(i=0; i< sizeof(button_map)/sizeof(button_map[0]); i++)
2251 + {
2252 + /* register irq <-- gpio 1 ,6 ,12 , 17 ,19 , 26 ,28 */
2253 + if(button_map[i] != 0)
2254 + {
2255 + ret = request_irq(AU1000_GPIO_0 + i ,
2256 + &button_interrupt , SA_INTERRUPT ,
2257 + DRIVER_NAME , &dev);
2258 + if(ret) flag |= 1<<i;
2259 + }
2260 + }
2261 +
2262 + printk("au1200_ibutton.c: request_irq,ret:0x%x\r\n",ret);
2263 +
2264 + if (ret) {
2265 + printk("au1200_ibutton.c: request_irq:%X failed\r\n",flag);
2266 + return ret;
2267 + }
2268 +
2269 + dev.name = DRIVER_NAME;
2270 + dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
2271 +
2272 + for (i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2273 + {
2274 + dev.keybit[LONG(button_map[i])] |= BIT(button_map[i]);
2275 + }
2276 +
2277 + input_register_device(&dev);
2278 +
2279 + /* ready to receive interrupts */
2280 +
2281 + return 0;
2282 +}
2283 +
2284 +/* button driver exit */
2285 +static void __exit button_exit(void)
2286 +{
2287 + int i;
2288 +
2289 + for(i=0;i<sizeof(button_map)/sizeof(button_map[0]);i++)
2290 + {
2291 + if(button_map[i] != 0)
2292 + {
2293 + free_irq( AU1000_GPIO_0 + i, &dev);
2294 + }
2295 + }
2296 +
2297 + input_unregister_device(&dev);
2298 +
2299 + printk("au1200_ibutton.c: button_exit()\r\n");
2300 +}
2301 +
2302 +module_init(button_init);
2303 +module_exit(button_exit);
2304 +
2305 +MODULE_AUTHOR( DRIVER_AUTHOR );
2306 +MODULE_DESCRIPTION( DRIVER_DESC );
2307 +MODULE_LICENSE("GPL");
2308 diff -Nur linux-2.4.30/arch/mips/au1000/ficmmp/au1xxx_dock.c linux-2.4.30-mips/arch/mips/au1000/ficmmp/au1xxx_dock.c
2309 --- linux-2.4.30/arch/mips/au1000/ficmmp/au1xxx_dock.c 1970-01-01 01:00:00.000000000 +0100
2310 +++ linux-2.4.30-mips/arch/mips/au1000/ficmmp/au1xxx_dock.c 2005-01-30 09:01:27.000000000 +0100
2311 @@ -0,0 +1,261 @@
2312 +/*
2313 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2314 + *
2315 + * This program is free software; you can redistribute it and/or modify
2316 + * it under the terms of the GNU General Public License version 2 as
2317 + * published by the Free Software Foundation.
2318 + */
2319 +
2320 +#include <linux/config.h>
2321 +#include <linux/module.h>
2322 +#include <linux/init.h>
2323 +#include <linux/fs.h>
2324 +#include <linux/sched.h>
2325 +#include <linux/miscdevice.h>
2326 +#include <linux/errno.h>
2327 +#include <linux/poll.h>
2328 +#include <asm/au1000.h>
2329 +#include <asm/uaccess.h>
2330 +#include <asm/au1xxx_gpio.h>
2331 +
2332 +
2333 +#if defined(CONFIG_MIPS_FICMMP)
2334 + #define DOCK_GPIO 215
2335 +#else
2336 + #error Unsupported Au1xxx Platform
2337 +#endif
2338 +
2339 +#define MAKE_FLAG 0x20
2340 +
2341 +#undef DEBUG
2342 +
2343 +#define DEBUG 0
2344 +//#define DEBUG 1
2345 +
2346 +#if DEBUG
2347 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
2348 +#else
2349 +#define DPRINTK(format, args...) do { } while (0)
2350 +#endif
2351 +
2352 +/* Please note that this driver is based on a timer and is not interrupt
2353 + * driven. If you are going to make use of this driver, you will need to have
2354 + * your application open the dock listing from the /dev directory first.
2355 + */
2356 +
2357 +struct au1xxx_dock {
2358 + struct fasync_struct *fasync;
2359 + wait_queue_head_t read_wait;
2360 + int open_count;
2361 + unsigned int debounce;
2362 + unsigned int current;
2363 + unsigned int last;
2364 +};
2365 +
2366 +static struct au1xxx_dock dock_info;
2367 +
2368 +
2369 +static void dock_timer_periodic(void *data);
2370 +
2371 +static struct tq_struct dock_task = {
2372 + routine: dock_timer_periodic,
2373 + data: NULL
2374 +};
2375 +
2376 +static int cleanup_flag = 0;
2377 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
2378 +
2379 +
2380 +static unsigned int read_dock_state(void)
2381 +{
2382 + u32 state;
2383 +
2384 + state = au1xxx_gpio_read(DOCK_GPIO);
2385 +
2386 + /* printk( "Current Dock State: %d\n", state ); */
2387 +
2388 + return state;
2389 +}
2390 +
2391 +
2392 +static void dock_timer_periodic(void *data)
2393 +{
2394 + struct au1xxx_dock *dock = (struct au1xxx_dock *)data;
2395 + unsigned long dock_state;
2396 +
2397 + /* If cleanup wants us to die */
2398 + if (cleanup_flag) {
2399 + /* now cleanup_module can return */
2400 + wake_up(&cleanup_wait_queue);
2401 + } else {
2402 + /* put ourselves back in the task queue */
2403 + queue_task(&dock_task, &tq_timer);
2404 + }
2405 +
2406 + /* read current dock */
2407 + dock_state = read_dock_state();
2408 +
2409 + /* if dock states hasn't changed */
2410 + /* save time and be done. */
2411 + if (dock_state == dock->current) {
2412 + return;
2413 + }
2414 +
2415 + if (dock_state == dock->debounce) {
2416 + dock->current = dock_state;
2417 + } else {
2418 + dock->debounce = dock_state;
2419 + }
2420 + if (dock->current != dock->last) {
2421 + if (waitqueue_active(&dock->read_wait)) {
2422 + wake_up_interruptible(&dock->read_wait);
2423 + }
2424 + }
2425 +}
2426 +
2427 +
2428 +static ssize_t au1xxx_dock_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
2429 +{
2430 + struct au1xxx_dock *dock = filp->private_data;
2431 + char event[3];
2432 + int last;
2433 + int cur;
2434 + int err;
2435 +
2436 +try_again:
2437 +
2438 + while (dock->current == dock->last) {
2439 + if (filp->f_flags & O_NONBLOCK) {
2440 + return -EAGAIN;
2441 + }
2442 + interruptible_sleep_on(&dock->read_wait);
2443 + if (signal_pending(current)) {
2444 + return -ERESTARTSYS;
2445 + }
2446 + }
2447 +
2448 + cur = dock->current;
2449 + last = dock->last;
2450 +
2451 + if(cur != last)
2452 + {
2453 + event[0] = cur ? 'D' : 'U';
2454 + event[1] = '\r';
2455 + event[2] = '\n';
2456 + }
2457 + else
2458 + goto try_again;
2459 +
2460 + dock->last = cur;
2461 + err = copy_to_user(buffer, &event, 3);
2462 + if (err) {
2463 + return err;
2464 + }
2465 +
2466 + return 3;
2467 +}
2468 +
2469 +
2470 +static int au1xxx_dock_open(struct inode *inode, struct file *filp)
2471 +{
2472 + struct au1xxx_dock *dock = &dock_info;
2473 +
2474 + MOD_INC_USE_COUNT;
2475 +
2476 + filp->private_data = dock;
2477 +
2478 + if (dock->open_count++ == 0) {
2479 + dock_task.data = dock;
2480 + cleanup_flag = 0;
2481 + queue_task(&dock_task, &tq_timer);
2482 + }
2483 +
2484 + return 0;
2485 +}
2486 +
2487 +
2488 +static unsigned int au1xxx_dock_poll(struct file *filp, poll_table *wait)
2489 +{
2490 + struct au1xxx_dock *dock = filp->private_data;
2491 + int ret = 0;
2492 +
2493 + DPRINTK("start\n");
2494 + poll_wait(filp, &dock->read_wait, wait);
2495 + if (dock->current != dock->last) {
2496 + ret = POLLIN | POLLRDNORM;
2497 + }
2498 + return ret;
2499 +}
2500 +
2501 +
2502 +static int au1xxx_dock_release(struct inode *inode, struct file *filp)
2503 +{
2504 + struct au1xxx_dock *dock = filp->private_data;
2505 +
2506 + DPRINTK("start\n");
2507 +
2508 + if (--dock->open_count == 0) {
2509 + cleanup_flag = 1;
2510 + sleep_on(&cleanup_wait_queue);
2511 + }
2512 + MOD_DEC_USE_COUNT;
2513 +
2514 + return 0;
2515 +}
2516 +
2517 +
2518 +
2519 +static struct file_operations au1xxx_dock_fops = {
2520 + owner: THIS_MODULE,
2521 + read: au1xxx_dock_read,
2522 + poll: au1xxx_dock_poll,
2523 + open: au1xxx_dock_open,
2524 + release: au1xxx_dock_release,
2525 +};
2526 +
2527 +/*
2528 + * The au1xxx dock is a misc device:
2529 + * Major 10 char
2530 + * Minor 22 /dev/dock
2531 + *
2532 + * This is /dev/misc/dock if devfs is used.
2533 + */
2534 +
2535 +static struct miscdevice au1xxx_dock_dev = {
2536 + minor: 23,
2537 + name: "dock",
2538 + fops: &au1xxx_dock_fops,
2539 +};
2540 +
2541 +static int __init au1xxx_dock_init(void)
2542 +{
2543 + struct au1xxx_dock *dock = &dock_info;
2544 + int ret;
2545 +
2546 + DPRINTK("Initializing dock driver\n");
2547 + dock->open_count = 0;
2548 + cleanup_flag = 0;
2549 + init_waitqueue_head(&dock->read_wait);
2550 +
2551 +
2552 + /* yamon configures GPIO pins for the dock
2553 + * no initialization needed
2554 + */
2555 +
2556 + ret = misc_register(&au1xxx_dock_dev);
2557 +
2558 + DPRINTK("dock driver fully initialized.\n");
2559 +
2560 + return ret;
2561 +}
2562 +
2563 +
2564 +static void __exit au1xxx_dock_exit(void)
2565 +{
2566 + DPRINTK("unloading dock driver\n");
2567 + misc_deregister(&au1xxx_dock_dev);
2568 +}
2569 +
2570 +
2571 +module_init(au1xxx_dock_init);
2572 +module_exit(au1xxx_dock_exit);
2573 diff -Nur linux-2.4.30/arch/mips/au1000/ficmmp/board_setup.c linux-2.4.30-mips/arch/mips/au1000/ficmmp/board_setup.c
2574 --- linux-2.4.30/arch/mips/au1000/ficmmp/board_setup.c 1970-01-01 01:00:00.000000000 +0100
2575 +++ linux-2.4.30-mips/arch/mips/au1000/ficmmp/board_setup.c 2005-03-19 08:17:51.000000000 +0100
2576 @@ -0,0 +1,226 @@
2577 +/*
2578 + *
2579 + * BRIEF MODULE DESCRIPTION
2580 + * Alchemy Pb1200 board setup.
2581 + *
2582 + * This program is free software; you can redistribute it and/or modify it
2583 + * under the terms of the GNU General Public License as published by the
2584 + * Free Software Foundation; either version 2 of the License, or (at your
2585 + * option) any later version.
2586 + *
2587 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2588 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2589 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2590 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2591 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2592 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2593 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2594 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2595 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2596 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2597 + *
2598 + * You should have received a copy of the GNU General Public License along
2599 + * with this program; if not, write to the Free Software Foundation, Inc.,
2600 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2601 + */
2602 +#include <linux/config.h>
2603 +#include <linux/init.h>
2604 +#include <linux/sched.h>
2605 +#include <linux/ioport.h>
2606 +#include <linux/mm.h>
2607 +#include <linux/console.h>
2608 +#include <linux/mc146818rtc.h>
2609 +#include <linux/delay.h>
2610 +#include <linux/ide.h>
2611 +
2612 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2613 +#include <linux/ide.h>
2614 +#endif
2615 +
2616 +#include <asm/cpu.h>
2617 +#include <asm/bootinfo.h>
2618 +#include <asm/irq.h>
2619 +#include <asm/keyboard.h>
2620 +#include <asm/mipsregs.h>
2621 +#include <asm/reboot.h>
2622 +#include <asm/pgtable.h>
2623 +#include <asm/au1000.h>
2624 +#include <asm/ficmmp.h>
2625 +#include <asm/au1xxx_dbdma.h>
2626 +#include <asm/au1xxx_gpio.h>
2627 +
2628 +extern struct rtc_ops no_rtc_ops;
2629 +
2630 +/* value currently in the board configuration register */
2631 +u16 ficmmp_config = 0;
2632 +
2633 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2634 +extern struct ide_ops *ide_ops;
2635 +extern struct ide_ops au1xxx_ide_ops;
2636 +extern u32 au1xxx_ide_virtbase;
2637 +extern u64 au1xxx_ide_physbase;
2638 +extern int au1xxx_ide_irq;
2639 +
2640 +u32 led_base_addr;
2641 +/* Ddma */
2642 +chan_tab_t *ide_read_ch, *ide_write_ch;
2643 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
2644 +
2645 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
2646 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
2647 +
2648 +void board_reset (void)
2649 +{
2650 + au_writel(0, 0xAD80001C);
2651 +}
2652 +
2653 +void board_power_off (void)
2654 +{
2655 +}
2656 +
2657 +void __init board_setup(void)
2658 +{
2659 + char *argptr = NULL;
2660 + u32 pin_func;
2661 + rtc_ops = &no_rtc_ops;
2662 +
2663 + ficmmp_config_init(); //Initialize FIC control register
2664 +
2665 +#if 0
2666 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
2667 + * but it is board specific code, so put it here.
2668 + */
2669 + pin_func = au_readl(SYS_PINFUNC);
2670 + au_sync();
2671 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
2672 + au_writel(pin_func, SYS_PINFUNC);
2673 +
2674 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
2675 + au_sync();
2676 +#endif
2677 +
2678 +#if defined( CONFIG_I2C_ALGO_AU1550 )
2679 + {
2680 + u32 freq0, clksrc;
2681 +
2682 + /* Select SMBUS in CPLD */
2683 + /* bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); */
2684 +
2685 + pin_func = au_readl(SYS_PINFUNC);
2686 + au_sync();
2687 + pin_func &= ~(3<<17 | 1<<4);
2688 + /* Set GPIOs correctly */
2689 + pin_func |= 2<<17;
2690 + au_writel(pin_func, SYS_PINFUNC);
2691 + au_sync();
2692 +
2693 + /* The i2c driver depends on 50Mhz clock */
2694 + freq0 = au_readl(SYS_FREQCTRL0);
2695 + au_sync();
2696 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
2697 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
2698 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
2699 + au_writel(freq0, SYS_FREQCTRL0);
2700 + au_sync();
2701 + freq0 |= SYS_FC_FE1;
2702 + au_writel(freq0, SYS_FREQCTRL0);
2703 + au_sync();
2704 +
2705 + clksrc = au_readl(SYS_CLKSRC);
2706 + au_sync();
2707 + clksrc &= ~0x01f00000;
2708 + /* bit 22 is EXTCLK0 for PSC0 */
2709 + clksrc |= (0x3 << 22);
2710 + au_writel(clksrc, SYS_CLKSRC);
2711 + au_sync();
2712 + }
2713 +#endif
2714 +
2715 +#ifdef CONFIG_FB_AU1200
2716 + argptr = prom_getcmdline();
2717 + strcat(argptr, " video=au1200fb:");
2718 +#endif
2719 +
2720 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
2721 + /*
2722 + * Iniz IDE parameters
2723 + */
2724 + ide_ops = &au1xxx_ide_ops;
2725 + au1xxx_ide_irq = FICMMP_IDE_INT;
2726 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
2727 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
2728 + switch4ddma = 0;
2729 + /*
2730 + ide_ops = &au1xxx_ide_ops;
2731 + au1xxx_ide_irq = FICMMP_IDE_INT;
2732 + au1xxx_ide_base = KSEG1ADDR(AU1XXX_ATA_BASE);
2733 + */
2734 + au1xxx_gpio_write(9, 1);
2735 + printk("B4001010: %X\n", *((u32*)0xB4001010));
2736 + printk("B4001014: %X\n", *((u32*)0xB4001014));
2737 + printk("B4001018: %X\n", *((u32*)0xB4001018));
2738 + printk("B1900100: %X\n", *((u32*)0xB1900100));
2739 +
2740 +#if 0
2741 + ficmmp_config_clear(FICMMP_CONFIG_IDERST);
2742 + mdelay(100);
2743 + ficmmp_config_set(FICMMP_CONFIG_IDERST);
2744 + mdelay(100);
2745 +#endif
2746 + /*
2747 + * change PIO or PIO+Ddma
2748 + * check the GPIO-5 pin condition. pb1200:s18_dot
2749 + */
2750 +/* switch4ddma = 0; //(au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; */
2751 +#endif
2752 +
2753 + /* The Pb1200 development board uses external MUX for PSC0 to
2754 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
2755 + */
2756 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
2757 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
2758 + Refer to Pb1200 documentation.
2759 +#elif defined( CONFIG_AU1550_PSC_SPI )
2760 + //bcsr->resets |= BCSR_RESETS_PCS0MUX;
2761 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
2762 + //bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
2763 +#endif
2764 + au_sync();
2765 +
2766 + printk("FIC Multimedia Player Board\n");
2767 + au1xxx_gpio_tristate(5);
2768 + printk("B1900100: %X\n", *((volatile u32*)0xB1900100));
2769 + printk("B190002C: %X\n", *((volatile u32*)0xB190002C));
2770 +}
2771 +
2772 +int
2773 +board_au1200fb_panel (void)
2774 +{
2775 + au1xxx_gpio_tristate(6);
2776 +
2777 + if (au1xxx_gpio_read(12) == 0)
2778 + return 9; /* FS453_640x480 (Composite/S-Video) */
2779 + else
2780 + return 7; /* Sharp 320x240 TFT */
2781 +}
2782 +
2783 +int
2784 +board_au1200fb_panel_init (void)
2785 +{
2786 + /*Enable data buffers*/
2787 + ficmmp_config_clear(FICMMP_CONFIG_LCMDATAOUT);
2788 + /*Take LCD out of reset*/
2789 + ficmmp_config_set(FICMMP_CONFIG_LCMPWREN | FICMMP_CONFIG_LCMEN);
2790 + return 0;
2791 +}
2792 +
2793 +int
2794 +board_au1200fb_panel_shutdown (void)
2795 +{
2796 + /*Disable data buffers*/
2797 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT);
2798 + /*Put LCD in reset, remove power*/
2799 + ficmmp_config_clear(FICMMP_CONFIG_LCMEN | FICMMP_CONFIG_LCMPWREN);
2800 + return 0;
2801 +}
2802 +
2803 diff -Nur linux-2.4.30/arch/mips/au1000/ficmmp/init.c linux-2.4.30-mips/arch/mips/au1000/ficmmp/init.c
2804 --- linux-2.4.30/arch/mips/au1000/ficmmp/init.c 1970-01-01 01:00:00.000000000 +0100
2805 +++ linux-2.4.30-mips/arch/mips/au1000/ficmmp/init.c 2005-01-30 09:01:27.000000000 +0100
2806 @@ -0,0 +1,76 @@
2807 +/*
2808 + *
2809 + * BRIEF MODULE DESCRIPTION
2810 + * PB1200 board setup
2811 + *
2812 + * This program is free software; you can redistribute it and/or modify it
2813 + * under the terms of the GNU General Public License as published by the
2814 + * Free Software Foundation; either version 2 of the License, or (at your
2815 + * option) any later version.
2816 + *
2817 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2818 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2819 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2820 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2821 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2822 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2823 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2824 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2825 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2826 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2827 + *
2828 + * You should have received a copy of the GNU General Public License along
2829 + * with this program; if not, write to the Free Software Foundation, Inc.,
2830 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2831 + */
2832 +
2833 +#include <linux/init.h>
2834 +#include <linux/mm.h>
2835 +#include <linux/sched.h>
2836 +#include <linux/bootmem.h>
2837 +#include <asm/addrspace.h>
2838 +#include <asm/bootinfo.h>
2839 +#include <linux/config.h>
2840 +#include <linux/string.h>
2841 +#include <linux/kernel.h>
2842 +#include <linux/sched.h>
2843 +
2844 +int prom_argc;
2845 +char **prom_argv, **prom_envp;
2846 +extern void __init prom_init_cmdline(void);
2847 +extern char *prom_getenv(char *envname);
2848 +
2849 +const char *get_system_type(void)
2850 +{
2851 + return "FIC Multimedia Player (Au1200)";
2852 +}
2853 +
2854 +u32 mae_memsize = 0;
2855 +
2856 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
2857 +{
2858 + unsigned char *memsize_str;
2859 + unsigned long memsize;
2860 +
2861 + prom_argc = argc;
2862 + prom_argv = argv;
2863 + prom_envp = envp;
2864 +
2865 + mips_machgroup = MACH_GROUP_ALCHEMY;
2866 + mips_machtype = MACH_PB1000; /* set the platform # */
2867 + prom_init_cmdline();
2868 +
2869 + memsize_str = prom_getenv("memsize");
2870 + if (!memsize_str) {
2871 + memsize = 0x08000000;
2872 + } else {
2873 + memsize = simple_strtol(memsize_str, NULL, 0);
2874 + }
2875 +
2876 + /* reserved 32MB for MAE driver */
2877 + memsize -= (32 * 1024 * 1024);
2878 + add_memory_region(0, memsize, BOOT_MEM_RAM);
2879 + mae_memsize = memsize; /* for drivers/char/au1xxx_mae.c */
2880 + return 0;
2881 +}
2882 +
2883 diff -Nur linux-2.4.30/arch/mips/au1000/ficmmp/irqmap.c linux-2.4.30-mips/arch/mips/au1000/ficmmp/irqmap.c
2884 --- linux-2.4.30/arch/mips/au1000/ficmmp/irqmap.c 1970-01-01 01:00:00.000000000 +0100
2885 +++ linux-2.4.30-mips/arch/mips/au1000/ficmmp/irqmap.c 2005-01-30 09:01:27.000000000 +0100
2886 @@ -0,0 +1,61 @@
2887 +/*
2888 + * BRIEF MODULE DESCRIPTION
2889 + * Au1xxx irq map table
2890 + *
2891 + * This program is free software; you can redistribute it and/or modify it
2892 + * under the terms of the GNU General Public License as published by the
2893 + * Free Software Foundation; either version 2 of the License, or (at your
2894 + * option) any later version.
2895 + *
2896 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
2897 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
2898 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
2899 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2900 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2901 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
2902 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
2903 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2904 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2905 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2906 + *
2907 + * You should have received a copy of the GNU General Public License along
2908 + * with this program; if not, write to the Free Software Foundation, Inc.,
2909 + * 675 Mass Ave, Cambridge, MA 02139, USA.
2910 + */
2911 +#include <linux/errno.h>
2912 +#include <linux/init.h>
2913 +#include <linux/irq.h>
2914 +#include <linux/kernel_stat.h>
2915 +#include <linux/module.h>
2916 +#include <linux/signal.h>
2917 +#include <linux/sched.h>
2918 +#include <linux/types.h>
2919 +#include <linux/interrupt.h>
2920 +#include <linux/ioport.h>
2921 +#include <linux/timex.h>
2922 +#include <linux/slab.h>
2923 +#include <linux/random.h>
2924 +#include <linux/delay.h>
2925 +
2926 +#include <asm/bitops.h>
2927 +#include <asm/bootinfo.h>
2928 +#include <asm/io.h>
2929 +#include <asm/mipsregs.h>
2930 +#include <asm/system.h>
2931 +#include <asm/au1000.h>
2932 +#include <asm/ficmmp.h>
2933 +
2934 +au1xxx_irq_map_t au1xxx_irq_map[] = {
2935 + { FICMMP_IDE_INT, INTC_INT_HIGH_LEVEL, 0 },
2936 + { AU1XXX_SMC91111_IRQ, INTC_INT_HIGH_LEVEL, 0 },
2937 + { AU1000_GPIO_1 , INTC_INT_FALL_EDGE, 0 }, // main button
2938 + { AU1000_GPIO_6 , INTC_INT_RISE_EDGE, 0 }, // select button
2939 + { AU1000_GPIO_12, INTC_INT_FALL_EDGE, 0 }, // guide button
2940 + { AU1000_GPIO_17, INTC_INT_RISE_EDGE, 0 }, // down button
2941 + { AU1000_GPIO_19, INTC_INT_RISE_EDGE, 0 }, // left button
2942 + { AU1000_GPIO_26, INTC_INT_RISE_EDGE, 0 }, // right button
2943 + { AU1000_GPIO_28, INTC_INT_RISE_EDGE, 0 }, // up button
2944 +};
2945 +
2946 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
2947 +
2948 diff -Nur linux-2.4.30/arch/mips/au1000/hydrogen3/Makefile linux-2.4.30-mips/arch/mips/au1000/hydrogen3/Makefile
2949 --- linux-2.4.30/arch/mips/au1000/hydrogen3/Makefile 2005-01-19 15:09:26.000000000 +0100
2950 +++ linux-2.4.30-mips/arch/mips/au1000/hydrogen3/Makefile 2005-02-11 22:09:55.000000000 +0100
2951 @@ -14,6 +14,11 @@
2952
2953 O_TARGET := hydrogen3.o
2954
2955 -obj-y := init.o board_setup.o irqmap.o
2956 +obj-y := init.o board_setup.o irqmap.o buttons.o
2957 +
2958 +ifdef CONFIG_MMC
2959 +obj-y += mmc_support.o
2960 +export-objs +=mmc_support.o
2961 +endif
2962
2963 include $(TOPDIR)/Rules.make
2964 diff -Nur linux-2.4.30/arch/mips/au1000/hydrogen3/board_setup.c linux-2.4.30-mips/arch/mips/au1000/hydrogen3/board_setup.c
2965 --- linux-2.4.30/arch/mips/au1000/hydrogen3/board_setup.c 2005-01-19 15:09:26.000000000 +0100
2966 +++ linux-2.4.30-mips/arch/mips/au1000/hydrogen3/board_setup.c 2005-03-19 08:17:51.000000000 +0100
2967 @@ -51,12 +51,19 @@
2968 {
2969 }
2970
2971 +void board_power_off (void)
2972 +{
2973 +}
2974 +
2975 void __init board_setup(void)
2976 {
2977 u32 pin_func;
2978
2979 rtc_ops = &no_rtc_ops;
2980
2981 + /* Set GPIO14 high to make CD/DAT1 high for MMC to work */
2982 + au_writel(1<<14, SYS_OUTPUTSET);
2983 +
2984 #ifdef CONFIG_AU1X00_USB_DEVICE
2985 // 2nd USB port is USB device
2986 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
2987 diff -Nur linux-2.4.30/arch/mips/au1000/hydrogen3/buttons.c linux-2.4.30-mips/arch/mips/au1000/hydrogen3/buttons.c
2988 --- linux-2.4.30/arch/mips/au1000/hydrogen3/buttons.c 1970-01-01 01:00:00.000000000 +0100
2989 +++ linux-2.4.30-mips/arch/mips/au1000/hydrogen3/buttons.c 2005-02-11 22:09:55.000000000 +0100
2990 @@ -0,0 +1,308 @@
2991 +/*
2992 + * Copyright (C) 2003 Metrowerks, All Rights Reserved.
2993 + *
2994 + * This program is free software; you can redistribute it and/or modify
2995 + * it under the terms of the GNU General Public License version 2 as
2996 + * published by the Free Software Foundation.
2997 + */
2998 +
2999 +#include <linux/config.h>
3000 +#include <linux/module.h>
3001 +#include <linux/init.h>
3002 +#include <linux/fs.h>
3003 +#include <linux/sched.h>
3004 +#include <linux/miscdevice.h>
3005 +#include <linux/errno.h>
3006 +#include <linux/poll.h>
3007 +#include <asm/au1000.h>
3008 +#include <asm/uaccess.h>
3009 +
3010 +#define BUTTON_SELECT (1<<1)
3011 +#define BUTTON_1 (1<<2)
3012 +#define BUTTON_2 (1<<3)
3013 +#define BUTTON_ONOFF (1<<6)
3014 +#define BUTTON_3 (1<<7)
3015 +#define BUTTON_4 (1<<8)
3016 +#define BUTTON_LEFT (1<<9)
3017 +#define BUTTON_DOWN (1<<10)
3018 +#define BUTTON_RIGHT (1<<11)
3019 +#define BUTTON_UP (1<<12)
3020 +
3021 +#define BUTTON_MASK (\
3022 + BUTTON_SELECT \
3023 + | BUTTON_1 \
3024 + | BUTTON_2 \
3025 + | BUTTON_ONOFF \
3026 + | BUTTON_3 \
3027 + | BUTTON_4 \
3028 + | BUTTON_LEFT \
3029 + | BUTTON_DOWN \
3030 + | BUTTON_RIGHT \
3031 + | BUTTON_UP \
3032 + )
3033 +
3034 +#define BUTTON_INVERT (\
3035 + BUTTON_SELECT \
3036 + | BUTTON_1 \
3037 + | BUTTON_2 \
3038 + | BUTTON_3 \
3039 + | BUTTON_4 \
3040 + | BUTTON_LEFT \
3041 + | BUTTON_DOWN \
3042 + | BUTTON_RIGHT \
3043 + | BUTTON_UP \
3044 + )
3045 +
3046 +
3047 +
3048 +#define MAKE_FLAG 0x20
3049 +
3050 +#undef DEBUG
3051 +
3052 +#define DEBUG 0
3053 +//#define DEBUG 1
3054 +
3055 +#if DEBUG
3056 +#define DPRINTK(format, args...) printk(__FUNCTION__ ": " format, ## args)
3057 +#else
3058 +#define DPRINTK(format, args...) do { } while (0)
3059 +#endif
3060 +
3061 +/* Please note that this driver is based on a timer and is not interrupt
3062 + * driven. If you are going to make use of this driver, you will need to have
3063 + * your application open the buttons listing from the /dev directory first.
3064 + */
3065 +
3066 +struct hydrogen3_buttons {
3067 + struct fasync_struct *fasync;
3068 + wait_queue_head_t read_wait;
3069 + int open_count;
3070 + unsigned int debounce;
3071 + unsigned int current;
3072 + unsigned int last;
3073 +};
3074 +
3075 +static struct hydrogen3_buttons buttons_info;
3076 +
3077 +
3078 +static void button_timer_periodic(void *data);
3079 +
3080 +static struct tq_struct button_task = {
3081 + routine: button_timer_periodic,
3082 + data: NULL
3083 +};
3084 +
3085 +static int cleanup_flag = 0;
3086 +static DECLARE_WAIT_QUEUE_HEAD(cleanup_wait_queue);
3087 +
3088 +
3089 +static unsigned int read_button_state(void)
3090 +{
3091 + unsigned long state;
3092 +
3093 + state = inl(SYS_PINSTATERD) & BUTTON_MASK;
3094 + state ^= BUTTON_INVERT;
3095 +
3096 + DPRINTK( "Current Button State: %d\n", state );
3097 +
3098 + return state;
3099 +}
3100 +
3101 +
3102 +static void button_timer_periodic(void *data)
3103 +{
3104 + struct hydrogen3_buttons *buttons = (struct hydrogen3_buttons *)data;
3105 + unsigned long button_state;
3106 +
3107 + // If cleanup wants us to die
3108 + if (cleanup_flag) {
3109 + wake_up(&cleanup_wait_queue); // now cleanup_module can return
3110 + } else {
3111 + queue_task(&button_task, &tq_timer); // put ourselves back in the task queue
3112 + }
3113 +
3114 + // read current buttons
3115 + button_state = read_button_state();
3116 +
3117 + // if no buttons are down and nothing to do then
3118 + // save time and be done.
3119 + if ((button_state == 0) && (buttons->current == 0)) {
3120 + return;
3121 + }
3122 +
3123 + if (button_state == buttons->debounce) {
3124 + buttons->current = button_state;
3125 + } else {
3126 + buttons->debounce = button_state;
3127 + }
3128 +// printk("0x%04x\n", button_state);
3129 + if (buttons->current != buttons->last) {
3130 + if (waitqueue_active(&buttons->read_wait)) {
3131 + wake_up_interruptible(&buttons->read_wait);
3132 + }
3133 + }
3134 +}
3135 +
3136 +
3137 +static ssize_t hydrogen3_buttons_read(struct file *filp, char *buffer, size_t count, loff_t *ppos)
3138 +{
3139 + struct hydrogen3_buttons *buttons = filp->private_data;
3140 + char events[16];
3141 + int index;
3142 + int last;
3143 + int cur;
3144 + int bit;
3145 + int bit_mask;
3146 + int err;
3147 +
3148 + DPRINTK("start\n");
3149 +
3150 +try_again:
3151 +
3152 + while (buttons->current == buttons->last) {
3153 + if (filp->f_flags & O_NONBLOCK) {
3154 + return -EAGAIN;
3155 + }
3156 + interruptible_sleep_on(&buttons->read_wait);
3157 + if (signal_pending(current)) {
3158 + return -ERESTARTSYS;
3159 + }
3160 + }
3161 +
3162 + cur = buttons->current;
3163 + last = buttons->last;
3164 +
3165 + index = 0;
3166 + bit_mask = 1;
3167 + for (bit = 0; (bit < 16) && count; bit++) {
3168 + if ((cur ^ last) & bit_mask) {
3169 + if (cur & bit_mask) {
3170 + events[index] = (bit | MAKE_FLAG) + 'A';
3171 + last |= bit_mask;
3172 + } else {
3173 + events[index] = bit + 'A';
3174 + last &= ~bit_mask;
3175 + }
3176 + index++;
3177 + count--;
3178 + }
3179 + bit_mask <<= 1;
3180 + }
3181 + buttons->last = last;
3182 +
3183 + if (index == 0) {
3184 + goto try_again;
3185 + }
3186 +
3187 + err = copy_to_user(buffer, events, index);
3188 + if (err) {
3189 + return err;
3190 + }
3191 +
3192 + return index;
3193 +}
3194 +
3195 +
3196 +static int hydrogen3_buttons_open(struct inode *inode, struct file *filp)
3197 +{
3198 + struct hydrogen3_buttons *buttons = &buttons_info;
3199 +
3200 + DPRINTK("start\n");
3201 + MOD_INC_USE_COUNT;
3202 +
3203 + filp->private_data = buttons;
3204 +
3205 + if (buttons->open_count++ == 0) {
3206 + button_task.data = buttons;
3207 + cleanup_flag = 0;
3208 + queue_task(&button_task, &tq_timer);
3209 + }
3210 +
3211 + return 0;
3212 +}
3213 +
3214 +
3215 +static unsigned int hydrogen3_buttons_poll(struct file *filp, poll_table *wait)
3216 +{
3217 + struct hydrogen3_buttons *buttons = filp->private_data;
3218 + int ret = 0;
3219 +
3220 + DPRINTK("start\n");
3221 + poll_wait(filp, &buttons->read_wait, wait);
3222 + if (buttons->current != buttons->last) {
3223 + ret = POLLIN | POLLRDNORM;
3224 + }
3225 + return ret;
3226 +}
3227 +
3228 +
3229 +static int hydrogen3_buttons_release(struct inode *inode, struct file *filp)
3230 +{
3231 + struct hydrogen3_buttons *buttons = filp->private_data;
3232 +
3233 + DPRINTK("start\n");
3234 +
3235 + if (--buttons->open_count == 0) {
3236 + cleanup_flag = 1;
3237 + sleep_on(&cleanup_wait_queue);
3238 + }
3239 + MOD_DEC_USE_COUNT;
3240 +
3241 + return 0;
3242 +}
3243 +
3244 +
3245 +
3246 +static struct file_operations hydrogen3_buttons_fops = {
3247 + owner: THIS_MODULE,
3248 + read: hydrogen3_buttons_read,
3249 + poll: hydrogen3_buttons_poll,
3250 + open: hydrogen3_buttons_open,
3251 + release: hydrogen3_buttons_release,
3252 +};
3253 +
3254 +/*
3255 + * The hydrogen3 buttons is a misc device:
3256 + * Major 10 char
3257 + * Minor 22 /dev/buttons
3258 + *
3259 + * This is /dev/misc/buttons if devfs is used.
3260 + */
3261 +
3262 +static struct miscdevice hydrogen3_buttons_dev = {
3263 + minor: 22,
3264 + name: "buttons",
3265 + fops: &hydrogen3_buttons_fops,
3266 +};
3267 +
3268 +static int __init hydrogen3_buttons_init(void)
3269 +{
3270 + struct hydrogen3_buttons *buttons = &buttons_info;
3271 + int ret;
3272 +
3273 + DPRINTK("Initializing buttons driver\n");
3274 + buttons->open_count = 0;
3275 + cleanup_flag = 0;
3276 + init_waitqueue_head(&buttons->read_wait);
3277 +
3278 +
3279 + // yamon configures GPIO pins for the buttons
3280 + // no initialization needed
3281 +
3282 + ret = misc_register(&hydrogen3_buttons_dev);
3283 +
3284 + DPRINTK("Buttons driver fully initialized.\n");
3285 +
3286 + return ret;
3287 +}
3288 +
3289 +
3290 +static void __exit hydrogen3_buttons_exit(void)
3291 +{
3292 + DPRINTK("unloading buttons driver\n");
3293 + misc_deregister(&hydrogen3_buttons_dev);
3294 +}
3295 +
3296 +
3297 +module_init(hydrogen3_buttons_init);
3298 +module_exit(hydrogen3_buttons_exit);
3299 diff -Nur linux-2.4.30/arch/mips/au1000/hydrogen3/mmc_support.c linux-2.4.30-mips/arch/mips/au1000/hydrogen3/mmc_support.c
3300 --- linux-2.4.30/arch/mips/au1000/hydrogen3/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3301 +++ linux-2.4.30-mips/arch/mips/au1000/hydrogen3/mmc_support.c 2005-02-02 05:27:06.000000000 +0100
3302 @@ -0,0 +1,89 @@
3303 +/*
3304 + * BRIEF MODULE DESCRIPTION
3305 + *
3306 + * MMC support routines for Hydrogen3.
3307 + *
3308 + *
3309 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3310 + * Author: Embedded Edge, LLC.
3311 + * Contact: dan@embeddededge.com
3312 + *
3313 + * This program is free software; you can redistribute it and/or modify it
3314 + * under the terms of the GNU General Public License as published by the
3315 + * Free Software Foundation; either version 2 of the License, or (at your
3316 + * option) any later version.
3317 + *
3318 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3319 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3320 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3321 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3322 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3323 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3324 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3325 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3326 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3327 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3328 + *
3329 + * You should have received a copy of the GNU General Public License along
3330 + * with this program; if not, write to the Free Software Foundation, Inc.,
3331 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3332 + *
3333 + */
3334 +
3335 +
3336 +#include <linux/config.h>
3337 +#include <linux/kernel.h>
3338 +#include <linux/module.h>
3339 +#include <linux/init.h>
3340 +
3341 +#include <asm/irq.h>
3342 +#include <asm/au1000.h>
3343 +#include <asm/au1100_mmc.h>
3344 +
3345 +#define GPIO_17_WP 0x20000
3346 +
3347 +/* SD/MMC controller support functions */
3348 +
3349 +/*
3350 + * Detect card.
3351 + */
3352 +void mmc_card_inserted(int _n_, int *_res_)
3353 +{
3354 + u32 gpios = au_readl(SYS_PINSTATERD);
3355 + u32 emptybit = (1<<16);
3356 + *_res_ = ((gpios & emptybit) == 0);
3357 +}
3358 +
3359 +/*
3360 + * Check card write protection.
3361 + */
3362 +void mmc_card_writable(int _n_, int *_res_)
3363 +{
3364 + unsigned long mmc_wp, board_specific;
3365 + board_specific = au_readl(SYS_OUTPUTSET);
3366 + mmc_wp=GPIO_17_WP;
3367 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3368 + *_res_ = 1;
3369 + } else {
3370 + *_res_ = 0;
3371 + }
3372 +}
3373 +/*
3374 + * Apply power to card slot.
3375 + */
3376 +void mmc_power_on(int _n_)
3377 +{
3378 +}
3379 +
3380 +/*
3381 + * Remove power from card slot.
3382 + */
3383 +void mmc_power_off(int _n_)
3384 +{
3385 +}
3386 +
3387 +EXPORT_SYMBOL(mmc_card_inserted);
3388 +EXPORT_SYMBOL(mmc_card_writable);
3389 +EXPORT_SYMBOL(mmc_power_on);
3390 +EXPORT_SYMBOL(mmc_power_off);
3391 +
3392 diff -Nur linux-2.4.30/arch/mips/au1000/mtx-1/board_setup.c linux-2.4.30-mips/arch/mips/au1000/mtx-1/board_setup.c
3393 --- linux-2.4.30/arch/mips/au1000/mtx-1/board_setup.c 2004-02-18 14:36:30.000000000 +0100
3394 +++ linux-2.4.30-mips/arch/mips/au1000/mtx-1/board_setup.c 2004-11-26 09:37:16.000000000 +0100
3395 @@ -48,6 +48,12 @@
3396
3397 extern struct rtc_ops no_rtc_ops;
3398
3399 +void board_reset (void)
3400 +{
3401 + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
3402 + au_writel(0x00000000, 0xAE00001C);
3403 +}
3404 +
3405 void __init board_setup(void)
3406 {
3407 rtc_ops = &no_rtc_ops;
3408 diff -Nur linux-2.4.30/arch/mips/au1000/mtx-1/irqmap.c linux-2.4.30-mips/arch/mips/au1000/mtx-1/irqmap.c
3409 --- linux-2.4.30/arch/mips/au1000/mtx-1/irqmap.c 2005-01-19 15:09:26.000000000 +0100
3410 +++ linux-2.4.30-mips/arch/mips/au1000/mtx-1/irqmap.c 2004-11-26 09:37:16.000000000 +0100
3411 @@ -72,10 +72,10 @@
3412 * A B C D
3413 */
3414 {
3415 - {INTA, INTB, INTC, INTD}, /* IDSEL 0 */
3416 - {INTA, INTB, INTC, INTD}, /* IDSEL 1 */
3417 - {INTA, INTB, INTC, INTD}, /* IDSEL 2 */
3418 - {INTA, INTB, INTC, INTD}, /* IDSEL 3 */
3419 + {INTA, INTB, INTX, INTX}, /* IDSEL 0 */
3420 + {INTB, INTA, INTX, INTX}, /* IDSEL 1 */
3421 + {INTC, INTD, INTX, INTX}, /* IDSEL 2 */
3422 + {INTD, INTC, INTX, INTX}, /* IDSEL 3 */
3423 };
3424 const long min_idsel = 0, max_idsel = 3, irqs_per_slot = 4;
3425 return PCI_IRQ_TABLE_LOOKUP;
3426 diff -Nur linux-2.4.30/arch/mips/au1000/pb1000/board_setup.c linux-2.4.30-mips/arch/mips/au1000/pb1000/board_setup.c
3427 --- linux-2.4.30/arch/mips/au1000/pb1000/board_setup.c 2005-01-19 15:09:26.000000000 +0100
3428 +++ linux-2.4.30-mips/arch/mips/au1000/pb1000/board_setup.c 2005-03-19 08:17:51.000000000 +0100
3429 @@ -58,6 +58,10 @@
3430 {
3431 }
3432
3433 +void board_power_off (void)
3434 +{
3435 +}
3436 +
3437 void __init board_setup(void)
3438 {
3439 u32 pin_func, static_cfg0;
3440 diff -Nur linux-2.4.30/arch/mips/au1000/pb1100/Makefile linux-2.4.30-mips/arch/mips/au1000/pb1100/Makefile
3441 --- linux-2.4.30/arch/mips/au1000/pb1100/Makefile 2003-08-25 13:44:39.000000000 +0200
3442 +++ linux-2.4.30-mips/arch/mips/au1000/pb1100/Makefile 2005-01-30 09:10:29.000000000 +0100
3443 @@ -16,4 +16,10 @@
3444
3445 obj-y := init.o board_setup.o irqmap.o
3446
3447 +
3448 +ifdef CONFIG_MMC
3449 +obj-y += mmc_support.o
3450 +export-objs += mmc_support.o
3451 +endif
3452 +
3453 include $(TOPDIR)/Rules.make
3454 diff -Nur linux-2.4.30/arch/mips/au1000/pb1100/board_setup.c linux-2.4.30-mips/arch/mips/au1000/pb1100/board_setup.c
3455 --- linux-2.4.30/arch/mips/au1000/pb1100/board_setup.c 2005-01-19 15:09:26.000000000 +0100
3456 +++ linux-2.4.30-mips/arch/mips/au1000/pb1100/board_setup.c 2005-03-19 08:17:51.000000000 +0100
3457 @@ -62,6 +62,10 @@
3458 au_writel(0x00000000, 0xAE00001C);
3459 }
3460
3461 +void board_power_off (void)
3462 +{
3463 +}
3464 +
3465 void __init board_setup(void)
3466 {
3467 u32 pin_func;
3468 diff -Nur linux-2.4.30/arch/mips/au1000/pb1100/mmc_support.c linux-2.4.30-mips/arch/mips/au1000/pb1100/mmc_support.c
3469 --- linux-2.4.30/arch/mips/au1000/pb1100/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
3470 +++ linux-2.4.30-mips/arch/mips/au1000/pb1100/mmc_support.c 2005-01-30 09:10:29.000000000 +0100
3471 @@ -0,0 +1,126 @@
3472 +/*
3473 + * BRIEF MODULE DESCRIPTION
3474 + *
3475 + * MMC support routines for PB1100.
3476 + *
3477 + *
3478 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
3479 + * Author: Embedded Edge, LLC.
3480 + * Contact: dan@embeddededge.com
3481 + *
3482 + * This program is free software; you can redistribute it and/or modify it
3483 + * under the terms of the GNU General Public License as published by the
3484 + * Free Software Foundation; either version 2 of the License, or (at your
3485 + * option) any later version.
3486 + *
3487 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3488 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3489 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3490 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3491 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3492 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3493 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3494 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3495 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3496 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3497 + *
3498 + * You should have received a copy of the GNU General Public License along
3499 + * with this program; if not, write to the Free Software Foundation, Inc.,
3500 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3501 + *
3502 + */
3503 +
3504 +
3505 +#include <linux/config.h>
3506 +#include <linux/kernel.h>
3507 +#include <linux/module.h>
3508 +#include <linux/init.h>
3509 +
3510 +#include <asm/irq.h>
3511 +#include <asm/au1000.h>
3512 +#include <asm/au1100_mmc.h>
3513 +#include <asm/pb1100.h>
3514 +
3515 +
3516 +/* SD/MMC controller support functions */
3517 +
3518 +/*
3519 + * Detect card.
3520 + */
3521 +void mmc_card_inserted(int _n_, int *_res_)
3522 +{
3523 + u32 gpios = au_readl(SYS_PINSTATERD);
3524 + u32 emptybit = (_n_) ? (1<<15) : (1<<14);
3525 + *_res_ = ((gpios & emptybit) == 0);
3526 +}
3527 +
3528 +/*
3529 + * Check card write protection.
3530 + */
3531 +void mmc_card_writable(int _n_, int *_res_)
3532 +{
3533 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3534 + unsigned long mmc_wp, board_specific;
3535 +
3536 + if (_n_) {
3537 + mmc_wp = BCSR_PCMCIA_SD1_WP;
3538 + } else {
3539 + mmc_wp = BCSR_PCMCIA_SD0_WP;
3540 + }
3541 +
3542 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3543 +
3544 + if (!(board_specific & mmc_wp)) {/* low means card writable */
3545 + *_res_ = 1;
3546 + } else {
3547 + *_res_ = 0;
3548 + }
3549 +}
3550 +
3551 +/*
3552 + * Apply power to card slot.
3553 + */
3554 +void mmc_power_on(int _n_)
3555 +{
3556 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3557 + unsigned long mmc_pwr, board_specific;
3558 +
3559 + if (_n_) {
3560 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3561 + } else {
3562 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3563 + }
3564 +
3565 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3566 + board_specific |= mmc_pwr;
3567 +
3568 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3569 + au_sync_delay(1);
3570 +}
3571 +
3572 +/*
3573 + * Remove power from card slot.
3574 + */
3575 +void mmc_power_off(int _n_)
3576 +{
3577 + BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3578 + unsigned long mmc_pwr, board_specific;
3579 +
3580 + if (_n_) {
3581 + mmc_pwr = BCSR_PCMCIA_SD1_PWR;
3582 + } else {
3583 + mmc_pwr = BCSR_PCMCIA_SD0_PWR;
3584 + }
3585 +
3586 + board_specific = au_readl((unsigned long)(&bcsr->pcmcia));
3587 + board_specific &= ~mmc_pwr;
3588 +
3589 + au_writel(board_specific, (int)(&bcsr->pcmcia));
3590 + au_sync_delay(1);
3591 +}
3592 +
3593 +EXPORT_SYMBOL(mmc_card_inserted);
3594 +EXPORT_SYMBOL(mmc_card_writable);
3595 +EXPORT_SYMBOL(mmc_power_on);
3596 +EXPORT_SYMBOL(mmc_power_off);
3597 +
3598 diff -Nur linux-2.4.30/arch/mips/au1000/pb1200/Makefile linux-2.4.30-mips/arch/mips/au1000/pb1200/Makefile
3599 --- linux-2.4.30/arch/mips/au1000/pb1200/Makefile 1970-01-01 01:00:00.000000000 +0100
3600 +++ linux-2.4.30-mips/arch/mips/au1000/pb1200/Makefile 2005-01-30 09:01:27.000000000 +0100
3601 @@ -0,0 +1,25 @@
3602 +#
3603 +# Copyright 2000 MontaVista Software Inc.
3604 +# Author: MontaVista Software, Inc.
3605 +# ppopov@mvista.com or source@mvista.com
3606 +#
3607 +# Makefile for the Alchemy Semiconductor PB1000 board.
3608 +#
3609 +# Note! Dependencies are done automagically by 'make dep', which also
3610 +# removes any old dependencies. DON'T put your own dependencies here
3611 +# unless it's something special (ie not a .c file).
3612 +#
3613 +
3614 +USE_STANDARD_AS_RULE := true
3615 +
3616 +O_TARGET := pb1200.o
3617 +
3618 +obj-y := init.o board_setup.o irqmap.o
3619 +
3620 +ifdef CONFIG_MMC
3621 +obj-y += mmc_support.o
3622 +export-objs +=mmc_support.o
3623 +endif
3624 +
3625 +
3626 +include $(TOPDIR)/Rules.make
3627 diff -Nur linux-2.4.30/arch/mips/au1000/pb1200/board_setup.c linux-2.4.30-mips/arch/mips/au1000/pb1200/board_setup.c
3628 --- linux-2.4.30/arch/mips/au1000/pb1200/board_setup.c 1970-01-01 01:00:00.000000000 +0100
3629 +++ linux-2.4.30-mips/arch/mips/au1000/pb1200/board_setup.c 2005-03-19 08:17:51.000000000 +0100
3630 @@ -0,0 +1,221 @@
3631 +/*
3632 + *
3633 + * BRIEF MODULE DESCRIPTION
3634 + * Alchemy Pb1200 board setup.
3635 + *
3636 + * This program is free software; you can redistribute it and/or modify it
3637 + * under the terms of the GNU General Public License as published by the
3638 + * Free Software Foundation; either version 2 of the License, or (at your
3639 + * option) any later version.
3640 + *
3641 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3642 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3643 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3644 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3645 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3646 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3647 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3648 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3649 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3650 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3651 + *
3652 + * You should have received a copy of the GNU General Public License along
3653 + * with this program; if not, write to the Free Software Foundation, Inc.,
3654 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3655 + */
3656 +#include <linux/config.h>
3657 +#include <linux/init.h>
3658 +#include <linux/sched.h>
3659 +#include <linux/ioport.h>
3660 +#include <linux/mm.h>
3661 +#include <linux/console.h>
3662 +#include <linux/mc146818rtc.h>
3663 +#include <linux/delay.h>
3664 +
3665 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3666 +#include <linux/ide.h>
3667 +#endif
3668 +
3669 +#include <asm/cpu.h>
3670 +#include <asm/bootinfo.h>
3671 +#include <asm/irq.h>
3672 +#include <asm/keyboard.h>
3673 +#include <asm/mipsregs.h>
3674 +#include <asm/reboot.h>
3675 +#include <asm/pgtable.h>
3676 +#include <asm/au1000.h>
3677 +#include <asm/au1xxx_dbdma.h>
3678 +
3679 +#ifdef CONFIG_MIPS_PB1200
3680 +#include <asm/pb1200.h>
3681 +#endif
3682 +
3683 +#ifdef CONFIG_MIPS_DB1200
3684 +#include <asm/db1200.h>
3685 +#define PB1200_ETH_INT DB1200_ETH_INT
3686 +#define PB1200_IDE_INT DB1200_IDE_INT
3687 +#endif
3688 +
3689 +extern struct rtc_ops no_rtc_ops;
3690 +
3691 +extern void _board_init_irq(void);
3692 +extern void (*board_init_irq)(void);
3693 +
3694 +#ifdef CONFIG_BLK_DEV_IDE_AU1XXX
3695 +extern struct ide_ops *ide_ops;
3696 +extern struct ide_ops au1xxx_ide_ops;
3697 +extern u32 au1xxx_ide_virtbase;
3698 +extern u64 au1xxx_ide_physbase;
3699 +extern int au1xxx_ide_irq;
3700 +
3701 +u32 led_base_addr;
3702 +/* Ddma */
3703 +chan_tab_t *ide_read_ch, *ide_write_ch;
3704 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
3705 +
3706 +dbdev_tab_t new_dbdev_tab_element = { DSCR_CMD0_THROTTLE, DEV_FLAGS_ANYUSE, 0, 0, 0x00000000, 0, 0 };
3707 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
3708 +
3709 +void board_reset (void)
3710 +{
3711 + bcsr->resets = 0;
3712 +}
3713 +
3714 +void board_power_off (void)
3715 +{
3716 + bcsr->resets = 0xC000;
3717 +}
3718 +
3719 +void __init board_setup(void)
3720 +{
3721 + char *argptr = NULL;
3722 + u32 pin_func;
3723 + rtc_ops = &no_rtc_ops;
3724 +
3725 +#if 0
3726 + /* Enable PSC1 SYNC for AC97. Normaly done in audio driver,
3727 + * but it is board specific code, so put it here.
3728 + */
3729 + pin_func = au_readl(SYS_PINFUNC);
3730 + au_sync();
3731 + pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
3732 + au_writel(pin_func, SYS_PINFUNC);
3733 +
3734 + au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
3735 + au_sync();
3736 +#endif
3737 +
3738 +#if defined( CONFIG_I2C_ALGO_AU1550 )
3739 + {
3740 + u32 freq0, clksrc;
3741 +
3742 + /* Select SMBUS in CPLD */
3743 + bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);
3744 +
3745 + pin_func = au_readl(SYS_PINFUNC);
3746 + au_sync();
3747 + pin_func &= ~(3<<17 | 1<<4);
3748 + /* Set GPIOs correctly */
3749 + pin_func |= 2<<17;
3750 + au_writel(pin_func, SYS_PINFUNC);
3751 + au_sync();
3752 +
3753 + /* The i2c driver depends on 50Mhz clock */
3754 + freq0 = au_readl(SYS_FREQCTRL0);
3755 + au_sync();
3756 + freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
3757 + freq0 |= (3<<SYS_FC_FRDIV1_BIT);
3758 + /* 396Mhz / (3+1)*2 == 49.5Mhz */
3759 + au_writel(freq0, SYS_FREQCTRL0);
3760 + au_sync();
3761 + freq0 |= SYS_FC_FE1;
3762 + au_writel(freq0, SYS_FREQCTRL0);
3763 + au_sync();
3764 +
3765 + clksrc = au_readl(SYS_CLKSRC);
3766 + au_sync();
3767 + clksrc &= ~0x01f00000;
3768 + /* bit 22 is EXTCLK0 for PSC0 */
3769 + clksrc |= (0x3 << 22);
3770 + au_writel(clksrc, SYS_CLKSRC);
3771 + au_sync();
3772 + }
3773 +#endif
3774 +
3775 +#ifdef CONFIG_FB_AU1200
3776 + argptr = prom_getcmdline();
3777 + strcat(argptr, " video=au1200fb:");
3778 +#endif
3779 +
3780 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
3781 + /*
3782 + * Iniz IDE parameters
3783 + */
3784 + ide_ops = &au1xxx_ide_ops;
3785 + au1xxx_ide_irq = PB1200_IDE_INT;
3786 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
3787 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
3788 + /*
3789 + * change PIO or PIO+Ddma
3790 + * check the GPIO-5 pin condition. pb1200:s18_dot */
3791 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0;
3792 +#endif
3793 +
3794 + /* The Pb1200 development board uses external MUX for PSC0 to
3795 + support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
3796 + */
3797 +#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
3798 + #error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
3799 + Refer to Pb1200/Db1200 documentation.
3800 +#elif defined( CONFIG_AU1550_PSC_SPI )
3801 + bcsr->resets |= BCSR_RESETS_PCS0MUX;
3802 +#elif defined( CONFIG_I2C_ALGO_AU1550 )
3803 + bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
3804 +#endif
3805 + au_sync();
3806 +
3807 +#ifdef CONFIG_MIPS_PB1200
3808 + printk("AMD Alchemy Pb1200 Board\n");
3809 +#endif
3810 +#ifdef CONFIG_MIPS_DB1200
3811 + printk("AMD Alchemy Db1200 Board\n");
3812 +#endif
3813 +
3814 + /* Setup Pb1200 External Interrupt Controller */
3815 + {
3816 + extern void (*board_init_irq)(void);
3817 + extern void _board_init_irq(void);
3818 + board_init_irq = _board_init_irq;
3819 + }
3820 +}
3821 +
3822 +int
3823 +board_au1200fb_panel (void)
3824 +{
3825 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3826 + int p;
3827 +
3828 + p = bcsr->switches;
3829 + p >>= 8;
3830 + p &= 0x0F;
3831 + return p;
3832 +}
3833 +
3834 +int
3835 +board_au1200fb_panel_init (void)
3836 +{
3837 + /* Apply power */
3838 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3839 + bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3840 + return 0;
3841 +}
3842 +
3843 +int
3844 +board_au1200fb_panel_shutdown (void)
3845 +{
3846 + /* Remove power */
3847 + BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR;
3848 + bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL);
3849 + return 0;
3850 +}
3851 +
3852 diff -Nur linux-2.4.30/arch/mips/au1000/pb1200/init.c linux-2.4.30-mips/arch/mips/au1000/pb1200/init.c
3853 --- linux-2.4.30/arch/mips/au1000/pb1200/init.c 1970-01-01 01:00:00.000000000 +0100
3854 +++ linux-2.4.30-mips/arch/mips/au1000/pb1200/init.c 2005-01-30 09:01:28.000000000 +0100
3855 @@ -0,0 +1,72 @@
3856 +/*
3857 + *
3858 + * BRIEF MODULE DESCRIPTION
3859 + * PB1200 board setup
3860 + *
3861 + * This program is free software; you can redistribute it and/or modify it
3862 + * under the terms of the GNU General Public License as published by the
3863 + * Free Software Foundation; either version 2 of the License, or (at your
3864 + * option) any later version.
3865 + *
3866 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3867 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3868 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3869 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3870 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3871 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3872 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3873 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3874 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3875 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3876 + *
3877 + * You should have received a copy of the GNU General Public License along
3878 + * with this program; if not, write to the Free Software Foundation, Inc.,
3879 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3880 + */
3881 +
3882 +#include <linux/init.h>
3883 +#include <linux/mm.h>
3884 +#include <linux/sched.h>
3885 +#include <linux/bootmem.h>
3886 +#include <asm/addrspace.h>
3887 +#include <asm/bootinfo.h>
3888 +#include <linux/config.h>
3889 +#include <linux/string.h>
3890 +#include <linux/kernel.h>
3891 +#include <linux/sched.h>
3892 +
3893 +int prom_argc;
3894 +char **prom_argv, **prom_envp;
3895 +extern void __init prom_init_cmdline(void);
3896 +extern char *prom_getenv(char *envname);
3897 +
3898 +const char *get_system_type(void)
3899 +{
3900 + return "AMD Alchemy Au1200/Pb1200";
3901 +}
3902 +
3903 +u32 mae_memsize = 0;
3904 +
3905 +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec)
3906 +{
3907 + unsigned char *memsize_str;
3908 + unsigned long memsize;
3909 +
3910 + prom_argc = argc;
3911 + prom_argv = argv;
3912 + prom_envp = envp;
3913 +
3914 + mips_machgroup = MACH_GROUP_ALCHEMY;
3915 + mips_machtype = MACH_PB1000; /* set the platform # */
3916 + prom_init_cmdline();
3917 +
3918 + memsize_str = prom_getenv("memsize");
3919 + if (!memsize_str) {
3920 + memsize = 0x08000000;
3921 + } else {
3922 + memsize = simple_strtol(memsize_str, NULL, 0);
3923 + }
3924 + add_memory_region(0, memsize, BOOT_MEM_RAM);
3925 + return 0;
3926 +}
3927 +
3928 diff -Nur linux-2.4.30/arch/mips/au1000/pb1200/irqmap.c linux-2.4.30-mips/arch/mips/au1000/pb1200/irqmap.c
3929 --- linux-2.4.30/arch/mips/au1000/pb1200/irqmap.c 1970-01-01 01:00:00.000000000 +0100
3930 +++ linux-2.4.30-mips/arch/mips/au1000/pb1200/irqmap.c 2005-01-30 09:01:28.000000000 +0100
3931 @@ -0,0 +1,180 @@
3932 +/*
3933 + * BRIEF MODULE DESCRIPTION
3934 + * Au1xxx irq map table
3935 + *
3936 + * This program is free software; you can redistribute it and/or modify it
3937 + * under the terms of the GNU General Public License as published by the
3938 + * Free Software Foundation; either version 2 of the License, or (at your
3939 + * option) any later version.
3940 + *
3941 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
3942 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
3943 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
3944 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
3945 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
3946 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
3947 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
3948 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3949 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3950 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3951 + *
3952 + * You should have received a copy of the GNU General Public License along
3953 + * with this program; if not, write to the Free Software Foundation, Inc.,
3954 + * 675 Mass Ave, Cambridge, MA 02139, USA.
3955 + */
3956 +#include <linux/errno.h>
3957 +#include <linux/init.h>
3958 +#include <linux/irq.h>
3959 +#include <linux/kernel_stat.h>
3960 +#include <linux/module.h>
3961 +#include <linux/signal.h>
3962 +#include <linux/sched.h>
3963 +#include <linux/types.h>
3964 +#include <linux/interrupt.h>
3965 +#include <linux/ioport.h>
3966 +#include <linux/timex.h>
3967 +#include <linux/slab.h>
3968 +#include <linux/random.h>
3969 +#include <linux/delay.h>
3970 +
3971 +#include <asm/bitops.h>
3972 +#include <asm/bootinfo.h>
3973 +#include <asm/io.h>
3974 +#include <asm/mipsregs.h>
3975 +#include <asm/system.h>
3976 +#include <asm/au1000.h>
3977 +
3978 +#ifdef CONFIG_MIPS_PB1200
3979 +#include <asm/pb1200.h>
3980 +#endif
3981 +
3982 +#ifdef CONFIG_MIPS_DB1200
3983 +#include <asm/db1200.h>
3984 +#define PB1200_INT_BEGIN DB1200_INT_BEGIN
3985 +#define PB1200_INT_END DB1200_INT_END
3986 +#endif
3987 +
3988 +au1xxx_irq_map_t au1xxx_irq_map[] = {
3989 + { AU1000_GPIO_7, INTC_INT_LOW_LEVEL, 0 }, // This is exteranl interrupt cascade
3990 +};
3991 +
3992 +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
3993 +
3994 +/*
3995 + * Support for External interrupts on the PbAu1200 Development platform.
3996 + */
3997 +static volatile int pb1200_cascade_en=0;
3998 +
3999 +void pb1200_cascade_handler( int irq, void *dev_id, struct pt_regs *regs)
4000 +{
4001 + unsigned short bisr = bcsr->int_status;
4002 + int extirq_nr = 0;
4003 +
4004 + /* Clear all the edge interrupts. This has no effect on level */
4005 + bcsr->int_status = bisr;
4006 + for( ; bisr; bisr &= (bisr-1) )
4007 + {
4008 + extirq_nr = (PB1200_INT_BEGIN-1) + au_ffs(bisr);
4009 + /* Ack and dispatch IRQ */
4010 + do_IRQ(extirq_nr,regs);
4011 + }
4012 +}
4013 +
4014 +inline void pb1200_enable_irq(unsigned int irq_nr)
4015 +{
4016 + bcsr->intset_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
4017 + bcsr->intset = 1<<(irq_nr - PB1200_INT_BEGIN);
4018 +}
4019 +
4020 +inline void pb1200_disable_irq(unsigned int irq_nr)
4021 +{
4022 + bcsr->intclr_mask = 1<<(irq_nr - PB1200_INT_BEGIN);
4023 + bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
4024 +}
4025 +
4026 +static unsigned int pb1200_startup_irq( unsigned int irq_nr )
4027 +{
4028 + if (++pb1200_cascade_en == 1)
4029 + {
4030 + request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
4031 + 0, "Pb1200 Cascade", &pb1200_cascade_handler );
4032 +#ifdef CONFIG_MIPS_PB1200
4033 + /* We have a problem with CPLD rev3. Enable a workaround */
4034 + if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
4035 + {
4036 + printk("\nWARNING!!!\n");
4037 + printk("\nWARNING!!!\n");
4038 + printk("\nWARNING!!!\n");
4039 + printk("\nWARNING!!!\n");
4040 + printk("\nWARNING!!!\n");
4041 + printk("\nWARNING!!!\n");
4042 + printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
4043 + printk("updated to latest revision. This software will not\n");
4044 + printk("work on anything less than CPLD rev4\n");
4045 + printk("\nWARNING!!!\n");
4046 + printk("\nWARNING!!!\n");
4047 + printk("\nWARNING!!!\n");
4048 + printk("\nWARNING!!!\n");
4049 + printk("\nWARNING!!!\n");
4050 + printk("\nWARNING!!!\n");
4051 + while(1);
4052 + }
4053 +#endif
4054 + }
4055 + pb1200_enable_irq(irq_nr);
4056 + return 0;
4057 +}
4058 +
4059 +static void pb1200_shutdown_irq( unsigned int irq_nr )
4060 +{
4061 + pb1200_disable_irq(irq_nr);
4062 + if (--pb1200_cascade_en == 0)
4063 + {
4064 + free_irq(AU1000_GPIO_7,&pb1200_cascade_handler );
4065 + }
4066 + return;
4067 +}
4068 +
4069 +static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr)
4070 +{
4071 + pb1200_disable_irq( irq_nr );
4072 +}
4073 +
4074 +static void pb1200_end_irq(unsigned int irq_nr)
4075 +{
4076 + if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
4077 + pb1200_enable_irq(irq_nr);
4078 + }
4079 +}
4080 +
4081 +static struct hw_interrupt_type external_irq_type =
4082 +{
4083 +#ifdef CONFIG_MIPS_PB1200
4084 + "Pb1200 Ext",
4085 +#endif
4086 +#ifdef CONFIG_MIPS_DB1200
4087 + "Db1200 Ext",
4088 +#endif
4089 + pb1200_startup_irq,
4090 + pb1200_shutdown_irq,
4091 + pb1200_enable_irq,
4092 + pb1200_disable_irq,
4093 + pb1200_mask_and_ack_irq,
4094 + pb1200_end_irq,
4095 + NULL
4096 +};
4097 +
4098 +void _board_init_irq(void)
4099 +{
4100 + int irq_nr;
4101 +
4102 + for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
4103 + {
4104 + irq_desc[irq_nr].handler = &external_irq_type;
4105 + pb1200_disable_irq(irq_nr);
4106 + }
4107 +
4108 + /* GPIO_7 can not be hooked here, so it is hooked upon first
4109 + request of any source attached to the cascade */
4110 +}
4111 +
4112 diff -Nur linux-2.4.30/arch/mips/au1000/pb1200/mmc_support.c linux-2.4.30-mips/arch/mips/au1000/pb1200/mmc_support.c
4113 --- linux-2.4.30/arch/mips/au1000/pb1200/mmc_support.c 1970-01-01 01:00:00.000000000 +0100
4114 +++ linux-2.4.30-mips/arch/mips/au1000/pb1200/mmc_support.c 2005-01-30 09:01:28.000000000 +0100
4115 @@ -0,0 +1,141 @@
4116 +/*
4117 + * BRIEF MODULE DESCRIPTION
4118 + *
4119 + * MMC support routines for PB1200.
4120 + *
4121 + *
4122 + * Copyright (c) 2003-2004 Embedded Edge, LLC.
4123 + * Author: Embedded Edge, LLC.
4124 + * Contact: dan@embeddededge.com
4125 + *
4126 + * This program is free software; you can redistribute it and/or modify it
4127 + * under the terms of the GNU General Public License as published by the
4128 + * Free Software Foundation; either version 2 of the License, or (at your
4129 + * option) any later version.
4130 + *
4131 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
4132 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
4133 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
4134 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
4135 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
4136 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
4137 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
4138 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
4139 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
4140 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
4141 + *
4142 + * You should have received a copy of the GNU General Public License along
4143 + * with this program; if not, write to the Free Software Foundation, Inc.,
4144 + * 675 Mass Ave, Cambridge, MA 02139, USA.
4145 + *
4146 + */
4147 +
4148 +
4149 +#include <linux/config.h>
4150 +#include <linux/kernel.h>
4151 +#include <linux/module.h>
4152 +#include <linux/init.h>
4153 +
4154 +#include <asm/irq.h>
4155 +#include <asm/au1000.h>
4156 +#include <asm/au1100_mmc.h>
4157 +
4158 +#ifdef CONFIG_MIPS_PB1200
4159 +#include <asm/pb1200.h>
4160 +#endif
4161 +
4162 +#ifdef CONFIG_MIPS_DB1200
4163 +/* NOTE: DB1200 only has SD0 pinned out and usable */
4164 +#include <asm/db1200.h>
4165 +#endif
4166 +
4167 +/* SD/MMC controller support functions */
4168 +
4169 +/*
4170 + * Detect card.
4171 + */
4172 +void mmc_card_inserted(int socket, int *result)
4173 +{
4174 + u16 mask;
4175 +
4176 + if (socket)
4177 +#ifdef CONFIG_MIPS_DB1200
4178 + mask = 0;
4179 +#else
4180 + mask = BCSR_INT_SD1INSERT;
4181 +#endif
4182 + else
4183 + mask = BCSR_INT_SD0INSERT;
4184 +
4185 + *result = ((bcsr->sig_status & mask) != 0);
4186 +}
4187 +
4188 +/*
4189 + * Check card write protection.
4190 + */
4191 +void mmc_card_writable(int socket, int *result)
4192 +{
4193 + u16 mask;
4194 +
4195 + if (socket)
4196 +#ifdef CONFIG_MIPS_DB1200
4197 + mask = 0;
4198 +#else
4199 + mask = BCSR_STATUS_SD1WP;
4200 +#endif
4201 + else
4202 + mask = BCSR_STATUS_SD0WP;
4203 +
4204 + /* low means card writable */
4205 + if (!(bcsr->status & mask)) {
4206 + *result = 1;
4207 + } else {
4208 + *result = 0;
4209 + }
4210 +}
4211 +
4212 +/*
4213 + * Apply power to card slot.
4214 + */
4215 +void mmc_power_on(int socket)
4216 +{
4217 + u16 mask;
4218 +
4219 + if (socket)
4220 +#ifdef CONFIG_MIPS_DB1200
4221 + mask = 0;
4222 +#else
4223 + mask = BCSR_BOARD_SD1PWR;
4224 +#endif
4225 + else
4226 + mask = BCSR_BOARD_SD0PWR;
4227 +
4228 + bcsr->board |= mask;
4229 + au_sync_delay(1);
4230 +}
4231 +
4232 +/*
4233 + * Remove power from card slot.
4234 + */
4235 +void mmc_power_off(int socket)
4236 +{
4237 + u16 mask;
4238 +
4239 + if (socket)
4240 +#ifdef CONFIG_MIPS_DB1200
4241 + mask = 0;
4242 +#else
4243 + mask = BCSR_BOARD_SD1PWR;
4244 +#endif
4245 + else
4246 + mask = BCSR_BOARD_SD0PWR;
4247 +
4248 + bcsr->board &= ~mask;
4249 + au_sync_delay(1);
4250 +}
4251 +
4252 +EXPORT_SYMBOL(mmc_card_inserted);
4253 +EXPORT_SYMBOL(mmc_card_writable);
4254 +EXPORT_SYMBOL(mmc_power_on);
4255 +EXPORT_SYMBOL(mmc_power_off);
4256 +
4257 diff -Nur linux-2.4.30/arch/mips/au1000/pb1500/board_setup.c linux-2.4.30-mips/arch/mips/au1000/pb1500/board_setup.c
4258 --- linux-2.4.30/arch/mips/au1000/pb1500/board_setup.c 2005-01-19 15:09:26.000000000 +0100
4259 +++ linux-2.4.30-mips/arch/mips/au1000/pb1500/board_setup.c 2005-03-19 08:17:51.000000000 +0100
4260 @@ -62,6 +62,10 @@
4261 au_writel(0x00000000, 0xAE00001C);
4262 }
4263
4264 +void board_power_off (void)
4265 +{
4266 +}
4267 +
4268 void __init board_setup(void)
4269 {
4270 u32 pin_func;
4271 diff -Nur linux-2.4.30/arch/mips/au1000/pb1550/board_setup.c linux-2.4.30-mips/arch/mips/au1000/pb1550/board_setup.c
4272 --- linux-2.4.30/arch/mips/au1000/pb1550/board_setup.c 2005-01-19 15:09:26.000000000 +0100
4273 +++ linux-2.4.30-mips/arch/mips/au1000/pb1550/board_setup.c 2005-03-19 08:17:51.000000000 +0100
4274 @@ -48,12 +48,31 @@
4275
4276 extern struct rtc_ops no_rtc_ops;
4277
4278 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4279 +extern struct ide_ops *ide_ops;
4280 +extern struct ide_ops au1xxx_ide_ops;
4281 +extern u32 au1xxx_ide_virtbase;
4282 +extern u64 au1xxx_ide_physbase;
4283 +extern unsigned int au1xxx_ide_irq;
4284 +
4285 +u32 au1xxx_ide_ddma_enable = 0, switch4ddma = 1; // PIO+ddma
4286 +#endif /* end CONFIG_BLK_DEV_IDE_AU1XXX */
4287 +
4288 void board_reset (void)
4289 {
4290 /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
4291 au_writew(au_readw(0xAF00001C) & ~(1<<15), 0xAF00001C);
4292 }
4293
4294 +void board_power_off (void)
4295 +{
4296 + /* power off system */
4297 + printk("\n** Powering off Pb1550\n");
4298 + au_writew(au_readw(0xAF00001C) | (3<<14), 0xAF00001C);
4299 + au_sync();
4300 + while(1); /* should not get here */
4301 +}
4302 +
4303 void __init board_setup(void)
4304 {
4305 u32 pin_func;
4306 @@ -78,5 +97,36 @@
4307 au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
4308 au_sync();
4309
4310 +#if defined(CONFIG_AU1XXX_SMC91111)
4311 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4312 +#error "Resource conflict occured. Disable either Ethernet or IDE daughter card."
4313 +#else
4314 +#define CPLD_CONTROL (0xAF00000C)
4315 + {
4316 + /* set up the Static Bus timing */
4317 + /* only 396Mhz */
4318 + /* reset the DC */
4319 + au_writew(au_readw(CPLD_CONTROL) | 0x0f, CPLD_CONTROL);
4320 + au_writel(0x00010003, MEM_STCFG0);
4321 + au_writel(0x000c00c0, MEM_STCFG2);
4322 + au_writel(0x85E1900D, MEM_STTIME2);
4323 + }
4324 +#endif
4325 +#endif /* end CONFIG_SMC91111 */
4326 +
4327 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
4328 + /*
4329 + * Iniz IDE parameters
4330 + */
4331 + ide_ops = &au1xxx_ide_ops;
4332 + au1xxx_ide_irq = DAUGHTER_CARD_IRQ;;
4333 + au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
4334 + au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
4335 + /*
4336 + * change PIO or PIO+Ddma
4337 + * check the GPIO-6 pin condition. pb1550:s15_dot
4338 + */
4339 + switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 6)) ? 1 : 0;
4340 +#endif
4341 printk("AMD Alchemy Pb1550 Board\n");
4342 }
4343 diff -Nur linux-2.4.30/arch/mips/au1000/pb1550/irqmap.c linux-2.4.30-mips/arch/mips/au1000/pb1550/irqmap.c
4344 --- linux-2.4.30/arch/mips/au1000/pb1550/irqmap.c 2005-01-19 15:09:26.000000000 +0100
4345 +++ linux-2.4.30-mips/arch/mips/au1000/pb1550/irqmap.c 2005-01-30 09:01:28.000000000 +0100
4346 @@ -50,6 +50,9 @@
4347 au1xxx_irq_map_t au1xxx_irq_map[] = {
4348 { AU1000_GPIO_0, INTC_INT_LOW_LEVEL, 0 },
4349 { AU1000_GPIO_1, INTC_INT_LOW_LEVEL, 0 },
4350 +#ifdef CONFIG_AU1XXX_SMC91111
4351 + { AU1000_GPIO_3, INTC_INT_LOW_LEVEL, 0 },
4352 +#endif
4353 };
4354
4355 int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t);
4356 diff -Nur linux-2.4.30/arch/mips/config-shared.in linux-2.4.30-mips/arch/mips/config-shared.in
4357 --- linux-2.4.30/arch/mips/config-shared.in 2005-01-19 15:09:27.000000000 +0100
4358 +++ linux-2.4.30-mips/arch/mips/config-shared.in 2005-01-30 09:01:26.000000000 +0100
4359 @@ -21,16 +21,19 @@
4360 comment 'Machine selection'
4361 dep_bool 'Support for Acer PICA 1 chipset (EXPERIMENTAL)' CONFIG_ACER_PICA_61 $CONFIG_EXPERIMENTAL
4362 dep_bool 'Support for Alchemy Bosporus board' CONFIG_MIPS_BOSPORUS $CONFIG_MIPS32
4363 +dep_bool 'Support for FIC Multimedia Player board' CONFIG_MIPS_FICMMP $CONFIG_MIPS32
4364 dep_bool 'Support for Alchemy Mirage board' CONFIG_MIPS_MIRAGE $CONFIG_MIPS32
4365 dep_bool 'Support for Alchemy Db1000 board' CONFIG_MIPS_DB1000 $CONFIG_MIPS32
4366 dep_bool 'Support for Alchemy Db1100 board' CONFIG_MIPS_DB1100 $CONFIG_MIPS32
4367 dep_bool 'Support for Alchemy Db1500 board' CONFIG_MIPS_DB1500 $CONFIG_MIPS32
4368 dep_bool 'Support for Alchemy Db1550 board' CONFIG_MIPS_DB1550 $CONFIG_MIPS32
4369 +dep_bool 'Support for Alchemy Db1200 board' CONFIG_MIPS_DB1200 $CONFIG_MIPS32
4370 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
4371 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
4372 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
4373 -dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4374 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
4375 +dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
4376 +dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
4377 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32
4378 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32
4379 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32
4380 @@ -249,6 +252,12 @@
4381 define_bool CONFIG_PC_KEYB y
4382 define_bool CONFIG_NONCOHERENT_IO y
4383 fi
4384 +if [ "$CONFIG_MIPS_FICMMP" = "y" ]; then
4385 + define_bool CONFIG_SOC_AU1X00 y
4386 + define_bool CONFIG_SOC_AU1200 y
4387 + define_bool CONFIG_NONCOHERENT_IO y
4388 + define_bool CONFIG_PC_KEYB y
4389 +fi
4390 if [ "$CONFIG_MIPS_BOSPORUS" = "y" ]; then
4391 define_bool CONFIG_SOC_AU1X00 y
4392 define_bool CONFIG_SOC_AU1500 y
4393 @@ -263,6 +272,12 @@
4394 define_bool CONFIG_SWAP_IO_SPACE_W y
4395 define_bool CONFIG_SWAP_IO_SPACE_L y
4396 fi
4397 +if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4398 + define_bool CONFIG_SOC_AU1X00 y
4399 + define_bool CONFIG_SOC_AU1500 y
4400 + define_bool CONFIG_NONCOHERENT_IO y
4401 + define_bool CONFIG_PC_KEYB y
4402 +fi
4403 if [ "$CONFIG_MIPS_PB1100" = "y" ]; then
4404 define_bool CONFIG_SOC_AU1X00 y
4405 define_bool CONFIG_SOC_AU1100 y
4406 @@ -271,9 +286,15 @@
4407 define_bool CONFIG_SWAP_IO_SPACE_W y
4408 define_bool CONFIG_SWAP_IO_SPACE_L y
4409 fi
4410 -if [ "$CONFIG_MIPS_PB1500" = "y" ]; then
4411 +if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4412 define_bool CONFIG_SOC_AU1X00 y
4413 - define_bool CONFIG_SOC_AU1500 y
4414 + define_bool CONFIG_SOC_AU1550 y
4415 + define_bool CONFIG_NONCOHERENT_IO n
4416 + define_bool CONFIG_PC_KEYB y
4417 +fi
4418 +if [ "$CONFIG_MIPS_PB1200" = "y" ]; then
4419 + define_bool CONFIG_SOC_AU1X00 y
4420 + define_bool CONFIG_SOC_AU1200 y
4421 define_bool CONFIG_NONCOHERENT_IO y
4422 define_bool CONFIG_PC_KEYB y
4423 fi
4424 @@ -290,18 +311,24 @@
4425 define_bool CONFIG_NONCOHERENT_IO y
4426 define_bool CONFIG_PC_KEYB y
4427 fi
4428 +if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4429 + define_bool CONFIG_SOC_AU1X00 y
4430 + define_bool CONFIG_SOC_AU1100 y
4431 + define_bool CONFIG_NONCOHERENT_IO y
4432 + define_bool CONFIG_PC_KEYB y
4433 + define_bool CONFIG_SWAP_IO_SPACE y
4434 +fi
4435 if [ "$CONFIG_MIPS_DB1550" = "y" ]; then
4436 define_bool CONFIG_SOC_AU1X00 y
4437 define_bool CONFIG_SOC_AU1550 y
4438 define_bool CONFIG_NONCOHERENT_IO y
4439 define_bool CONFIG_PC_KEYB y
4440 fi
4441 -if [ "$CONFIG_MIPS_DB1100" = "y" ]; then
4442 +if [ "$CONFIG_MIPS_DB1200" = "y" ]; then
4443 define_bool CONFIG_SOC_AU1X00 y
4444 - define_bool CONFIG_SOC_AU1100 y
4445 + define_bool CONFIG_SOC_AU1200 y
4446 define_bool CONFIG_NONCOHERENT_IO y
4447 define_bool CONFIG_PC_KEYB y
4448 - define_bool CONFIG_SWAP_IO_SPACE y
4449 fi
4450 if [ "$CONFIG_MIPS_HYDROGEN3" = "y" ]; then
4451 define_bool CONFIG_SOC_AU1X00 y
4452 @@ -327,12 +354,6 @@
4453 define_bool CONFIG_NONCOHERENT_IO y
4454 define_bool CONFIG_PC_KEYB y
4455 fi
4456 -if [ "$CONFIG_MIPS_PB1550" = "y" ]; then
4457 - define_bool CONFIG_SOC_AU1X00 y
4458 - define_bool CONFIG_SOC_AU1550 y
4459 - define_bool CONFIG_NONCOHERENT_IO n
4460 - define_bool CONFIG_PC_KEYB y
4461 -fi
4462 if [ "$CONFIG_MIPS_COBALT" = "y" ]; then
4463 define_bool CONFIG_BOOT_ELF32 y
4464 define_bool CONFIG_COBALT_LCD y
4465 @@ -729,6 +750,13 @@
4466 "$CONFIG_MIPS_PB1000" = "y" -o \
4467 "$CONFIG_MIPS_PB1100" = "y" -o \
4468 "$CONFIG_MIPS_PB1500" = "y" -o \
4469 + "$CONFIG_MIPS_PB1550" = "y" -o \
4470 + "$CONFIG_MIPS_PB1200" = "y" -o \
4471 + "$CONFIG_MIPS_DB1000" = "y" -o \
4472 + "$CONFIG_MIPS_DB1100" = "y" -o \
4473 + "$CONFIG_MIPS_DB1500" = "y" -o \
4474 + "$CONFIG_MIPS_DB1550" = "y" -o \
4475 + "$CONFIG_MIPS_DB1200" = "y" -o \
4476 "$CONFIG_NEC_OSPREY" = "y" -o \
4477 "$CONFIG_NEC_EAGLE" = "y" -o \
4478 "$CONFIG_NINO" = "y" -o \
4479 diff -Nur linux-2.4.30/arch/mips/defconfig linux-2.4.30-mips/arch/mips/defconfig
4480 --- linux-2.4.30/arch/mips/defconfig 2005-01-19 15:09:27.000000000 +0100
4481 +++ linux-2.4.30-mips/arch/mips/defconfig 2005-03-18 13:13:21.000000000 +0100
4482 @@ -30,8 +30,8 @@
4483 # CONFIG_MIPS_PB1000 is not set
4484 # CONFIG_MIPS_PB1100 is not set
4485 # CONFIG_MIPS_PB1500 is not set
4486 -# CONFIG_MIPS_HYDROGEN3 is not set
4487 # CONFIG_MIPS_PB1550 is not set
4488 +# CONFIG_MIPS_HYDROGEN3 is not set
4489 # CONFIG_MIPS_XXS1500 is not set
4490 # CONFIG_MIPS_MTX1 is not set
4491 # CONFIG_COGENT_CSB250 is not set
4492 @@ -235,11 +235,6 @@
4493 #
4494 # CONFIG_IPX is not set
4495 # CONFIG_ATALK is not set
4496 -
4497 -#
4498 -# Appletalk devices
4499 -#
4500 -# CONFIG_DEV_APPLETALK is not set
4501 # CONFIG_DECNET is not set
4502 # CONFIG_BRIDGE is not set
4503 # CONFIG_X25 is not set
4504 @@ -319,9 +314,11 @@
4505 # CONFIG_SCSI_MEGARAID is not set
4506 # CONFIG_SCSI_MEGARAID2 is not set
4507 # CONFIG_SCSI_SATA is not set
4508 +# CONFIG_SCSI_SATA_AHCI is not set
4509 # CONFIG_SCSI_SATA_SVW is not set
4510 # CONFIG_SCSI_ATA_PIIX is not set
4511 # CONFIG_SCSI_SATA_NV is not set
4512 +# CONFIG_SCSI_SATA_QSTOR is not set
4513 # CONFIG_SCSI_SATA_PROMISE is not set
4514 # CONFIG_SCSI_SATA_SX4 is not set
4515 # CONFIG_SCSI_SATA_SIL is not set
4516 @@ -465,7 +462,6 @@
4517 # CONFIG_SERIAL is not set
4518 # CONFIG_SERIAL_EXTENDED is not set
4519 # CONFIG_SERIAL_NONSTANDARD is not set
4520 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4521 CONFIG_UNIX98_PTYS=y
4522 CONFIG_UNIX98_PTY_COUNT=256
4523
4524 diff -Nur linux-2.4.30/arch/mips/defconfig-atlas linux-2.4.30-mips/arch/mips/defconfig-atlas
4525 --- linux-2.4.30/arch/mips/defconfig-atlas 2005-01-19 15:09:27.000000000 +0100
4526 +++ linux-2.4.30-mips/arch/mips/defconfig-atlas 2005-03-18 13:13:21.000000000 +0100
4527 @@ -28,8 +28,8 @@
4528 # CONFIG_MIPS_PB1000 is not set
4529 # CONFIG_MIPS_PB1100 is not set
4530 # CONFIG_MIPS_PB1500 is not set
4531 -# CONFIG_MIPS_HYDROGEN3 is not set
4532 # CONFIG_MIPS_PB1550 is not set
4533 +# CONFIG_MIPS_HYDROGEN3 is not set
4534 # CONFIG_MIPS_XXS1500 is not set
4535 # CONFIG_MIPS_MTX1 is not set
4536 # CONFIG_COGENT_CSB250 is not set
4537 @@ -235,11 +235,6 @@
4538 #
4539 # CONFIG_IPX is not set
4540 # CONFIG_ATALK is not set
4541 -
4542 -#
4543 -# Appletalk devices
4544 -#
4545 -# CONFIG_DEV_APPLETALK is not set
4546 # CONFIG_DECNET is not set
4547 # CONFIG_BRIDGE is not set
4548 # CONFIG_X25 is not set
4549 @@ -317,9 +312,11 @@
4550 # CONFIG_SCSI_MEGARAID is not set
4551 # CONFIG_SCSI_MEGARAID2 is not set
4552 # CONFIG_SCSI_SATA is not set
4553 +# CONFIG_SCSI_SATA_AHCI is not set
4554 # CONFIG_SCSI_SATA_SVW is not set
4555 # CONFIG_SCSI_ATA_PIIX is not set
4556 # CONFIG_SCSI_SATA_NV is not set
4557 +# CONFIG_SCSI_SATA_QSTOR is not set
4558 # CONFIG_SCSI_SATA_PROMISE is not set
4559 # CONFIG_SCSI_SATA_SX4 is not set
4560 # CONFIG_SCSI_SATA_SIL is not set
4561 @@ -528,7 +525,6 @@
4562 CONFIG_SERIAL_CONSOLE=y
4563 # CONFIG_SERIAL_EXTENDED is not set
4564 # CONFIG_SERIAL_NONSTANDARD is not set
4565 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4566 CONFIG_UNIX98_PTYS=y
4567 CONFIG_UNIX98_PTY_COUNT=256
4568
4569 diff -Nur linux-2.4.30/arch/mips/defconfig-bosporus linux-2.4.30-mips/arch/mips/defconfig-bosporus
4570 --- linux-2.4.30/arch/mips/defconfig-bosporus 2005-01-19 15:09:27.000000000 +0100
4571 +++ linux-2.4.30-mips/arch/mips/defconfig-bosporus 2005-03-18 13:13:21.000000000 +0100
4572 @@ -30,8 +30,8 @@
4573 # CONFIG_MIPS_PB1000 is not set
4574 # CONFIG_MIPS_PB1100 is not set
4575 # CONFIG_MIPS_PB1500 is not set
4576 -# CONFIG_MIPS_HYDROGEN3 is not set
4577 # CONFIG_MIPS_PB1550 is not set
4578 +# CONFIG_MIPS_HYDROGEN3 is not set
4579 # CONFIG_MIPS_XXS1500 is not set
4580 # CONFIG_MIPS_MTX1 is not set
4581 # CONFIG_COGENT_CSB250 is not set
4582 @@ -208,9 +208,7 @@
4583 CONFIG_MTD_BOSPORUS=y
4584 # CONFIG_MTD_XXS1500 is not set
4585 # CONFIG_MTD_MTX1 is not set
4586 -# CONFIG_MTD_DB1X00 is not set
4587 # CONFIG_MTD_PB1550 is not set
4588 -# CONFIG_MTD_HYDROGEN3 is not set
4589 # CONFIG_MTD_MIRAGE is not set
4590 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4591 # CONFIG_MTD_OCELOT is not set
4592 @@ -229,7 +227,6 @@
4593 #
4594 # Disk-On-Chip Device Drivers
4595 #
4596 -# CONFIG_MTD_DOC1000 is not set
4597 # CONFIG_MTD_DOC2000 is not set
4598 # CONFIG_MTD_DOC2001 is not set
4599 # CONFIG_MTD_DOCPROBE is not set
4600 @@ -373,11 +370,6 @@
4601 #
4602 # CONFIG_IPX is not set
4603 # CONFIG_ATALK is not set
4604 -
4605 -#
4606 -# Appletalk devices
4607 -#
4608 -# CONFIG_DEV_APPLETALK is not set
4609 # CONFIG_DECNET is not set
4610 # CONFIG_BRIDGE is not set
4611 # CONFIG_X25 is not set
4612 @@ -457,9 +449,11 @@
4613 # CONFIG_SCSI_MEGARAID is not set
4614 # CONFIG_SCSI_MEGARAID2 is not set
4615 # CONFIG_SCSI_SATA is not set
4616 +# CONFIG_SCSI_SATA_AHCI is not set
4617 # CONFIG_SCSI_SATA_SVW is not set
4618 # CONFIG_SCSI_ATA_PIIX is not set
4619 # CONFIG_SCSI_SATA_NV is not set
4620 +# CONFIG_SCSI_SATA_QSTOR is not set
4621 # CONFIG_SCSI_SATA_PROMISE is not set
4622 # CONFIG_SCSI_SATA_SX4 is not set
4623 # CONFIG_SCSI_SATA_SIL is not set
4624 @@ -681,7 +675,6 @@
4625 # CONFIG_AU1X00_USB_TTY is not set
4626 # CONFIG_AU1X00_USB_RAW is not set
4627 # CONFIG_TXX927_SERIAL is not set
4628 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4629 CONFIG_UNIX98_PTYS=y
4630 CONFIG_UNIX98_PTY_COUNT=256
4631
4632 diff -Nur linux-2.4.30/arch/mips/defconfig-capcella linux-2.4.30-mips/arch/mips/defconfig-capcella
4633 --- linux-2.4.30/arch/mips/defconfig-capcella 2005-01-19 15:09:27.000000000 +0100
4634 +++ linux-2.4.30-mips/arch/mips/defconfig-capcella 2005-03-18 13:13:21.000000000 +0100
4635 @@ -30,8 +30,8 @@
4636 # CONFIG_MIPS_PB1000 is not set
4637 # CONFIG_MIPS_PB1100 is not set
4638 # CONFIG_MIPS_PB1500 is not set
4639 -# CONFIG_MIPS_HYDROGEN3 is not set
4640 # CONFIG_MIPS_PB1550 is not set
4641 +# CONFIG_MIPS_HYDROGEN3 is not set
4642 # CONFIG_MIPS_XXS1500 is not set
4643 # CONFIG_MIPS_MTX1 is not set
4644 # CONFIG_COGENT_CSB250 is not set
4645 @@ -228,11 +228,6 @@
4646 #
4647 # CONFIG_IPX is not set
4648 # CONFIG_ATALK is not set
4649 -
4650 -#
4651 -# Appletalk devices
4652 -#
4653 -# CONFIG_DEV_APPLETALK is not set
4654 # CONFIG_DECNET is not set
4655 # CONFIG_BRIDGE is not set
4656 # CONFIG_X25 is not set
4657 @@ -472,7 +467,6 @@
4658 CONFIG_SERIAL_CONSOLE=y
4659 # CONFIG_SERIAL_EXTENDED is not set
4660 # CONFIG_SERIAL_NONSTANDARD is not set
4661 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4662 # CONFIG_VR41XX_KIU is not set
4663 CONFIG_UNIX98_PTYS=y
4664 CONFIG_UNIX98_PTY_COUNT=256
4665 diff -Nur linux-2.4.30/arch/mips/defconfig-cobalt linux-2.4.30-mips/arch/mips/defconfig-cobalt
4666 --- linux-2.4.30/arch/mips/defconfig-cobalt 2005-01-19 15:09:28.000000000 +0100
4667 +++ linux-2.4.30-mips/arch/mips/defconfig-cobalt 2005-03-18 13:13:21.000000000 +0100
4668 @@ -28,8 +28,8 @@
4669 # CONFIG_MIPS_PB1000 is not set
4670 # CONFIG_MIPS_PB1100 is not set
4671 # CONFIG_MIPS_PB1500 is not set
4672 -# CONFIG_MIPS_HYDROGEN3 is not set
4673 # CONFIG_MIPS_PB1550 is not set
4674 +# CONFIG_MIPS_HYDROGEN3 is not set
4675 # CONFIG_MIPS_XXS1500 is not set
4676 # CONFIG_MIPS_MTX1 is not set
4677 # CONFIG_COGENT_CSB250 is not set
4678 @@ -222,11 +222,6 @@
4679 #
4680 # CONFIG_IPX is not set
4681 # CONFIG_ATALK is not set
4682 -
4683 -#
4684 -# Appletalk devices
4685 -#
4686 -# CONFIG_DEV_APPLETALK is not set
4687 # CONFIG_DECNET is not set
4688 # CONFIG_BRIDGE is not set
4689 # CONFIG_X25 is not set
4690 @@ -505,7 +500,6 @@
4691 CONFIG_SERIAL_CONSOLE=y
4692 # CONFIG_SERIAL_EXTENDED is not set
4693 # CONFIG_SERIAL_NONSTANDARD is not set
4694 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4695 CONFIG_UNIX98_PTYS=y
4696 CONFIG_UNIX98_PTY_COUNT=16
4697
4698 diff -Nur linux-2.4.30/arch/mips/defconfig-csb250 linux-2.4.30-mips/arch/mips/defconfig-csb250
4699 --- linux-2.4.30/arch/mips/defconfig-csb250 2005-01-19 15:09:28.000000000 +0100
4700 +++ linux-2.4.30-mips/arch/mips/defconfig-csb250 2005-03-18 13:13:21.000000000 +0100
4701 @@ -30,8 +30,8 @@
4702 # CONFIG_MIPS_PB1000 is not set
4703 # CONFIG_MIPS_PB1100 is not set
4704 # CONFIG_MIPS_PB1500 is not set
4705 -# CONFIG_MIPS_HYDROGEN3 is not set
4706 # CONFIG_MIPS_PB1550 is not set
4707 +# CONFIG_MIPS_HYDROGEN3 is not set
4708 # CONFIG_MIPS_XXS1500 is not set
4709 # CONFIG_MIPS_MTX1 is not set
4710 CONFIG_COGENT_CSB250=y
4711 @@ -268,11 +268,6 @@
4712 #
4713 # CONFIG_IPX is not set
4714 # CONFIG_ATALK is not set
4715 -
4716 -#
4717 -# Appletalk devices
4718 -#
4719 -# CONFIG_DEV_APPLETALK is not set
4720 # CONFIG_DECNET is not set
4721 # CONFIG_BRIDGE is not set
4722 # CONFIG_X25 is not set
4723 @@ -556,7 +551,6 @@
4724 # CONFIG_AU1X00_USB_TTY is not set
4725 # CONFIG_AU1X00_USB_RAW is not set
4726 # CONFIG_TXX927_SERIAL is not set
4727 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4728 CONFIG_UNIX98_PTYS=y
4729 CONFIG_UNIX98_PTY_COUNT=256
4730
4731 diff -Nur linux-2.4.30/arch/mips/defconfig-db1000 linux-2.4.30-mips/arch/mips/defconfig-db1000
4732 --- linux-2.4.30/arch/mips/defconfig-db1000 2005-01-19 15:09:28.000000000 +0100
4733 +++ linux-2.4.30-mips/arch/mips/defconfig-db1000 2005-03-18 13:13:21.000000000 +0100
4734 @@ -30,8 +30,8 @@
4735 # CONFIG_MIPS_PB1000 is not set
4736 # CONFIG_MIPS_PB1100 is not set
4737 # CONFIG_MIPS_PB1500 is not set
4738 -# CONFIG_MIPS_HYDROGEN3 is not set
4739 # CONFIG_MIPS_PB1550 is not set
4740 +# CONFIG_MIPS_HYDROGEN3 is not set
4741 # CONFIG_MIPS_XXS1500 is not set
4742 # CONFIG_MIPS_MTX1 is not set
4743 # CONFIG_COGENT_CSB250 is not set
4744 @@ -214,11 +214,7 @@
4745 # CONFIG_MTD_BOSPORUS is not set
4746 # CONFIG_MTD_XXS1500 is not set
4747 # CONFIG_MTD_MTX1 is not set
4748 -CONFIG_MTD_DB1X00=y
4749 -CONFIG_MTD_DB1X00_BOOT=y
4750 -CONFIG_MTD_DB1X00_USER=y
4751 # CONFIG_MTD_PB1550 is not set
4752 -# CONFIG_MTD_HYDROGEN3 is not set
4753 # CONFIG_MTD_MIRAGE is not set
4754 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4755 # CONFIG_MTD_OCELOT is not set
4756 @@ -237,7 +233,6 @@
4757 #
4758 # Disk-On-Chip Device Drivers
4759 #
4760 -# CONFIG_MTD_DOC1000 is not set
4761 # CONFIG_MTD_DOC2000 is not set
4762 # CONFIG_MTD_DOC2001 is not set
4763 # CONFIG_MTD_DOCPROBE is not set
4764 @@ -342,11 +337,6 @@
4765 #
4766 # CONFIG_IPX is not set
4767 # CONFIG_ATALK is not set
4768 -
4769 -#
4770 -# Appletalk devices
4771 -#
4772 -# CONFIG_DEV_APPLETALK is not set
4773 # CONFIG_DECNET is not set
4774 # CONFIG_BRIDGE is not set
4775 # CONFIG_X25 is not set
4776 @@ -636,7 +626,6 @@
4777 # CONFIG_AU1X00_USB_TTY is not set
4778 # CONFIG_AU1X00_USB_RAW is not set
4779 # CONFIG_TXX927_SERIAL is not set
4780 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4781 CONFIG_UNIX98_PTYS=y
4782 CONFIG_UNIX98_PTY_COUNT=256
4783
4784 diff -Nur linux-2.4.30/arch/mips/defconfig-db1100 linux-2.4.30-mips/arch/mips/defconfig-db1100
4785 --- linux-2.4.30/arch/mips/defconfig-db1100 2005-01-19 15:09:28.000000000 +0100
4786 +++ linux-2.4.30-mips/arch/mips/defconfig-db1100 2005-03-18 13:13:21.000000000 +0100
4787 @@ -30,8 +30,8 @@
4788 # CONFIG_MIPS_PB1000 is not set
4789 # CONFIG_MIPS_PB1100 is not set
4790 # CONFIG_MIPS_PB1500 is not set
4791 -# CONFIG_MIPS_HYDROGEN3 is not set
4792 # CONFIG_MIPS_PB1550 is not set
4793 +# CONFIG_MIPS_HYDROGEN3 is not set
4794 # CONFIG_MIPS_XXS1500 is not set
4795 # CONFIG_MIPS_MTX1 is not set
4796 # CONFIG_COGENT_CSB250 is not set
4797 @@ -214,11 +214,7 @@
4798 # CONFIG_MTD_BOSPORUS is not set
4799 # CONFIG_MTD_XXS1500 is not set
4800 # CONFIG_MTD_MTX1 is not set
4801 -CONFIG_MTD_DB1X00=y
4802 -# CONFIG_MTD_DB1X00_BOOT is not set
4803 -CONFIG_MTD_DB1X00_USER=y
4804 # CONFIG_MTD_PB1550 is not set
4805 -# CONFIG_MTD_HYDROGEN3 is not set
4806 # CONFIG_MTD_MIRAGE is not set
4807 # CONFIG_MTD_CSTM_MIPS_IXX is not set
4808 # CONFIG_MTD_OCELOT is not set
4809 @@ -237,7 +233,6 @@
4810 #
4811 # Disk-On-Chip Device Drivers
4812 #
4813 -# CONFIG_MTD_DOC1000 is not set
4814 # CONFIG_MTD_DOC2000 is not set
4815 # CONFIG_MTD_DOC2001 is not set
4816 # CONFIG_MTD_DOCPROBE is not set
4817 @@ -342,11 +337,6 @@
4818 #
4819 # CONFIG_IPX is not set
4820 # CONFIG_ATALK is not set
4821 -
4822 -#
4823 -# Appletalk devices
4824 -#
4825 -# CONFIG_DEV_APPLETALK is not set
4826 # CONFIG_DECNET is not set
4827 # CONFIG_BRIDGE is not set
4828 # CONFIG_X25 is not set
4829 @@ -636,7 +626,6 @@
4830 # CONFIG_AU1X00_USB_TTY is not set
4831 # CONFIG_AU1X00_USB_RAW is not set
4832 # CONFIG_TXX927_SERIAL is not set
4833 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
4834 CONFIG_UNIX98_PTYS=y
4835 CONFIG_UNIX98_PTY_COUNT=256
4836
4837 @@ -884,6 +873,7 @@
4838 # CONFIG_FB_PM2 is not set
4839 # CONFIG_FB_PM3 is not set
4840 # CONFIG_FB_CYBER2000 is not set
4841 +CONFIG_FB_AU1100=y
4842 # CONFIG_FB_MATROX is not set
4843 # CONFIG_FB_ATY is not set
4844 # CONFIG_FB_RADEON is not set
4845 @@ -895,7 +885,6 @@
4846 # CONFIG_FB_VOODOO1 is not set
4847 # CONFIG_FB_TRIDENT is not set
4848 # CONFIG_FB_E1356 is not set
4849 -CONFIG_FB_AU1100=y
4850 # CONFIG_FB_IT8181 is not set
4851 # CONFIG_FB_VIRTUAL is not set
4852 CONFIG_FBCON_ADVANCED=y
4853 diff -Nur linux-2.4.30/arch/mips/defconfig-db1200 linux-2.4.30-mips/arch/mips/defconfig-db1200
4854 --- linux-2.4.30/arch/mips/defconfig-db1200 1970-01-01 01:00:00.000000000 +0100
4855 +++ linux-2.4.30-mips/arch/mips/defconfig-db1200 2005-03-18 13:13:21.000000000 +0100
4856 @@ -0,0 +1,1032 @@
4857 +#
4858 +# Automatically generated make config: don't edit
4859 +#
4860 +CONFIG_MIPS=y
4861 +CONFIG_MIPS32=y
4862 +# CONFIG_MIPS64 is not set
4863 +
4864 +#
4865 +# Code maturity level options
4866 +#
4867 +CONFIG_EXPERIMENTAL=y
4868 +
4869 +#
4870 +# Loadable module support
4871 +#
4872 +CONFIG_MODULES=y
4873 +# CONFIG_MODVERSIONS is not set
4874 +CONFIG_KMOD=y
4875 +
4876 +#
4877 +# Machine selection
4878 +#
4879 +# CONFIG_ACER_PICA_61 is not set
4880 +# CONFIG_MIPS_BOSPORUS is not set
4881 +# CONFIG_MIPS_MIRAGE is not set
4882 +# CONFIG_MIPS_DB1000 is not set
4883 +# CONFIG_MIPS_DB1100 is not set
4884 +# CONFIG_MIPS_DB1500 is not set
4885 +# CONFIG_MIPS_DB1550 is not set
4886 +# CONFIG_MIPS_PB1000 is not set
4887 +# CONFIG_MIPS_PB1100 is not set
4888 +# CONFIG_MIPS_PB1500 is not set
4889 +# CONFIG_MIPS_PB1550 is not set
4890 +# CONFIG_MIPS_HYDROGEN3 is not set
4891 +# CONFIG_MIPS_XXS1500 is not set
4892 +# CONFIG_MIPS_MTX1 is not set
4893 +# CONFIG_COGENT_CSB250 is not set
4894 +# CONFIG_BAGET_MIPS is not set
4895 +# CONFIG_CASIO_E55 is not set
4896 +# CONFIG_MIPS_COBALT is not set
4897 +# CONFIG_DECSTATION is not set
4898 +# CONFIG_MIPS_EV64120 is not set
4899 +# CONFIG_MIPS_EV96100 is not set
4900 +# CONFIG_MIPS_IVR is not set
4901 +# CONFIG_HP_LASERJET is not set
4902 +# CONFIG_IBM_WORKPAD is not set
4903 +# CONFIG_LASAT is not set
4904 +# CONFIG_MIPS_ITE8172 is not set
4905 +# CONFIG_MIPS_ATLAS is not set
4906 +# CONFIG_MIPS_MAGNUM_4000 is not set
4907 +# CONFIG_MIPS_MALTA is not set
4908 +# CONFIG_MIPS_SEAD is not set
4909 +# CONFIG_MOMENCO_OCELOT is not set
4910 +# CONFIG_MOMENCO_OCELOT_G is not set
4911 +# CONFIG_MOMENCO_OCELOT_C is not set
4912 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
4913 +# CONFIG_PMC_BIG_SUR is not set
4914 +# CONFIG_PMC_STRETCH is not set
4915 +# CONFIG_PMC_YOSEMITE is not set
4916 +# CONFIG_DDB5074 is not set
4917 +# CONFIG_DDB5476 is not set
4918 +# CONFIG_DDB5477 is not set
4919 +# CONFIG_NEC_OSPREY is not set
4920 +# CONFIG_NEC_EAGLE is not set
4921 +# CONFIG_OLIVETTI_M700 is not set
4922 +# CONFIG_NINO is not set
4923 +# CONFIG_SGI_IP22 is not set
4924 +# CONFIG_SGI_IP27 is not set
4925 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
4926 +# CONFIG_SNI_RM200_PCI is not set
4927 +# CONFIG_TANBAC_TB0226 is not set
4928 +# CONFIG_TANBAC_TB0229 is not set
4929 +# CONFIG_TOSHIBA_JMR3927 is not set
4930 +# CONFIG_TOSHIBA_RBTX4927 is not set
4931 +# CONFIG_VICTOR_MPC30X is not set
4932 +# CONFIG_ZAO_CAPCELLA is not set
4933 +# CONFIG_HIGHMEM is not set
4934 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
4935 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
4936 +# CONFIG_MIPS_AU1000 is not set
4937 +
4938 +#
4939 +# CPU selection
4940 +#
4941 +CONFIG_CPU_MIPS32=y
4942 +# CONFIG_CPU_MIPS64 is not set
4943 +# CONFIG_CPU_R3000 is not set
4944 +# CONFIG_CPU_TX39XX is not set
4945 +# CONFIG_CPU_VR41XX is not set
4946 +# CONFIG_CPU_R4300 is not set
4947 +# CONFIG_CPU_R4X00 is not set
4948 +# CONFIG_CPU_TX49XX is not set
4949 +# CONFIG_CPU_R5000 is not set
4950 +# CONFIG_CPU_R5432 is not set
4951 +# CONFIG_CPU_R6000 is not set
4952 +# CONFIG_CPU_NEVADA is not set
4953 +# CONFIG_CPU_R8000 is not set
4954 +# CONFIG_CPU_R10000 is not set
4955 +# CONFIG_CPU_RM7000 is not set
4956 +# CONFIG_CPU_RM9000 is not set
4957 +# CONFIG_CPU_SB1 is not set
4958 +CONFIG_PAGE_SIZE_4KB=y
4959 +# CONFIG_PAGE_SIZE_16KB is not set
4960 +# CONFIG_PAGE_SIZE_64KB is not set
4961 +CONFIG_CPU_HAS_PREFETCH=y
4962 +# CONFIG_VTAG_ICACHE is not set
4963 +CONFIG_64BIT_PHYS_ADDR=y
4964 +# CONFIG_CPU_ADVANCED is not set
4965 +CONFIG_CPU_HAS_LLSC=y
4966 +# CONFIG_CPU_HAS_LLDSCD is not set
4967 +# CONFIG_CPU_HAS_WB is not set
4968 +CONFIG_CPU_HAS_SYNC=y
4969 +
4970 +#
4971 +# General setup
4972 +#
4973 +CONFIG_CPU_LITTLE_ENDIAN=y
4974 +# CONFIG_BUILD_ELF64 is not set
4975 +CONFIG_NET=y
4976 +CONFIG_PCI=y
4977 +CONFIG_PCI_NEW=y
4978 +CONFIG_PCI_AUTO=y
4979 +# CONFIG_PCI_NAMES is not set
4980 +# CONFIG_ISA is not set
4981 +# CONFIG_TC is not set
4982 +# CONFIG_MCA is not set
4983 +# CONFIG_SBUS is not set
4984 +CONFIG_HOTPLUG=y
4985 +
4986 +#
4987 +# PCMCIA/CardBus support
4988 +#
4989 +CONFIG_PCMCIA=m
4990 +# CONFIG_CARDBUS is not set
4991 +# CONFIG_TCIC is not set
4992 +# CONFIG_I82092 is not set
4993 +# CONFIG_I82365 is not set
4994 +
4995 +#
4996 +# PCI Hotplug Support
4997 +#
4998 +# CONFIG_HOTPLUG_PCI is not set
4999 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
5000 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
5001 +# CONFIG_HOTPLUG_PCI_SHPC is not set
5002 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
5003 +# CONFIG_HOTPLUG_PCI_PCIE is not set
5004 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
5005 +CONFIG_SYSVIPC=y
5006 +# CONFIG_BSD_PROCESS_ACCT is not set
5007 +CONFIG_SYSCTL=y
5008 +CONFIG_KCORE_ELF=y
5009 +# CONFIG_KCORE_AOUT is not set
5010 +# CONFIG_BINFMT_AOUT is not set
5011 +CONFIG_BINFMT_ELF=y
5012 +# CONFIG_MIPS32_COMPAT is not set
5013 +# CONFIG_MIPS32_O32 is not set
5014 +# CONFIG_MIPS32_N32 is not set
5015 +# CONFIG_BINFMT_ELF32 is not set
5016 +# CONFIG_BINFMT_MISC is not set
5017 +# CONFIG_OOM_KILLER is not set
5018 +CONFIG_CMDLINE_BOOL=y
5019 +CONFIG_CMDLINE="mem=96M"
5020 +
5021 +#
5022 +# Memory Technology Devices (MTD)
5023 +#
5024 +# CONFIG_MTD is not set
5025 +
5026 +#
5027 +# Parallel port support
5028 +#
5029 +# CONFIG_PARPORT is not set
5030 +
5031 +#
5032 +# Plug and Play configuration
5033 +#
5034 +# CONFIG_PNP is not set
5035 +# CONFIG_ISAPNP is not set
5036 +
5037 +#
5038 +# Block devices
5039 +#
5040 +# CONFIG_BLK_DEV_FD is not set
5041 +# CONFIG_BLK_DEV_XD is not set
5042 +# CONFIG_PARIDE is not set
5043 +# CONFIG_BLK_CPQ_DA is not set
5044 +# CONFIG_BLK_CPQ_CISS_DA is not set
5045 +# CONFIG_CISS_SCSI_TAPE is not set
5046 +# CONFIG_CISS_MONITOR_THREAD is not set
5047 +# CONFIG_BLK_DEV_DAC960 is not set
5048 +# CONFIG_BLK_DEV_UMEM is not set
5049 +# CONFIG_BLK_DEV_SX8 is not set
5050 +CONFIG_BLK_DEV_LOOP=y
5051 +# CONFIG_BLK_DEV_NBD is not set
5052 +# CONFIG_BLK_DEV_RAM is not set
5053 +# CONFIG_BLK_DEV_INITRD is not set
5054 +# CONFIG_BLK_STATS is not set
5055 +
5056 +#
5057 +# Multi-device support (RAID and LVM)
5058 +#
5059 +# CONFIG_MD is not set
5060 +# CONFIG_BLK_DEV_MD is not set
5061 +# CONFIG_MD_LINEAR is not set
5062 +# CONFIG_MD_RAID0 is not set
5063 +# CONFIG_MD_RAID1 is not set
5064 +# CONFIG_MD_RAID5 is not set
5065 +# CONFIG_MD_MULTIPATH is not set
5066 +# CONFIG_BLK_DEV_LVM is not set
5067 +
5068 +#
5069 +# Networking options
5070 +#
5071 +CONFIG_PACKET=y
5072 +# CONFIG_PACKET_MMAP is not set
5073 +# CONFIG_NETLINK_DEV is not set
5074 +CONFIG_NETFILTER=y
5075 +# CONFIG_NETFILTER_DEBUG is not set
5076 +CONFIG_FILTER=y
5077 +CONFIG_UNIX=y
5078 +CONFIG_INET=y
5079 +CONFIG_IP_MULTICAST=y
5080 +# CONFIG_IP_ADVANCED_ROUTER is not set
5081 +CONFIG_IP_PNP=y
5082 +# CONFIG_IP_PNP_DHCP is not set
5083 +CONFIG_IP_PNP_BOOTP=y
5084 +# CONFIG_IP_PNP_RARP is not set
5085 +# CONFIG_NET_IPIP is not set
5086 +# CONFIG_NET_IPGRE is not set
5087 +# CONFIG_IP_MROUTE is not set
5088 +# CONFIG_ARPD is not set
5089 +# CONFIG_INET_ECN is not set
5090 +# CONFIG_SYN_COOKIES is not set
5091 +
5092 +#
5093 +# IP: Netfilter Configuration
5094 +#
5095 +# CONFIG_IP_NF_CONNTRACK is not set
5096 +# CONFIG_IP_NF_QUEUE is not set
5097 +# CONFIG_IP_NF_IPTABLES is not set
5098 +# CONFIG_IP_NF_ARPTABLES is not set
5099 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
5100 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
5101 +
5102 +#
5103 +# IP: Virtual Server Configuration
5104 +#
5105 +# CONFIG_IP_VS is not set
5106 +# CONFIG_IPV6 is not set
5107 +# CONFIG_KHTTPD is not set
5108 +
5109 +#
5110 +# SCTP Configuration (EXPERIMENTAL)
5111 +#
5112 +# CONFIG_IP_SCTP is not set
5113 +# CONFIG_ATM is not set
5114 +# CONFIG_VLAN_8021Q is not set
5115 +
5116 +#
5117 +#
5118 +#
5119 +# CONFIG_IPX is not set
5120 +# CONFIG_ATALK is not set
5121 +# CONFIG_DECNET is not set
5122 +# CONFIG_BRIDGE is not set
5123 +# CONFIG_X25 is not set
5124 +# CONFIG_LAPB is not set
5125 +# CONFIG_LLC is not set
5126 +# CONFIG_NET_DIVERT is not set
5127 +# CONFIG_ECONET is not set
5128 +# CONFIG_WAN_ROUTER is not set
5129 +# CONFIG_NET_FASTROUTE is not set
5130 +# CONFIG_NET_HW_FLOWCONTROL is not set
5131 +
5132 +#
5133 +# QoS and/or fair queueing
5134 +#
5135 +# CONFIG_NET_SCHED is not set
5136 +
5137 +#
5138 +# Network testing
5139 +#
5140 +# CONFIG_NET_PKTGEN is not set
5141 +
5142 +#
5143 +# Telephony Support
5144 +#
5145 +# CONFIG_PHONE is not set
5146 +# CONFIG_PHONE_IXJ is not set
5147 +# CONFIG_PHONE_IXJ_PCMCIA is not set
5148 +
5149 +#
5150 +# ATA/IDE/MFM/RLL support
5151 +#
5152 +CONFIG_IDE=y
5153 +
5154 +#
5155 +# IDE, ATA and ATAPI Block devices
5156 +#
5157 +CONFIG_BLK_DEV_IDE=y
5158 +
5159 +#
5160 +# Please see Documentation/ide.txt for help/info on IDE drives
5161 +#
5162 +# CONFIG_BLK_DEV_HD_IDE is not set
5163 +# CONFIG_BLK_DEV_HD is not set
5164 +# CONFIG_BLK_DEV_IDE_SATA is not set
5165 +CONFIG_BLK_DEV_IDEDISK=y
5166 +CONFIG_IDEDISK_MULTI_MODE=y
5167 +CONFIG_IDEDISK_STROKE=y
5168 +CONFIG_BLK_DEV_IDECS=m
5169 +# CONFIG_BLK_DEV_DELKIN is not set
5170 +# CONFIG_BLK_DEV_IDECD is not set
5171 +# CONFIG_BLK_DEV_IDETAPE is not set
5172 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
5173 +# CONFIG_BLK_DEV_IDESCSI is not set
5174 +# CONFIG_IDE_TASK_IOCTL is not set
5175 +
5176 +#
5177 +# IDE chipset support/bugfixes
5178 +#
5179 +# CONFIG_BLK_DEV_CMD640 is not set
5180 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
5181 +# CONFIG_BLK_DEV_ISAPNP is not set
5182 +# CONFIG_BLK_DEV_IDEPCI is not set
5183 +# CONFIG_IDE_CHIPSETS is not set
5184 +# CONFIG_IDEDMA_AUTO is not set
5185 +# CONFIG_DMA_NONPCI is not set
5186 +# CONFIG_BLK_DEV_ATARAID is not set
5187 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
5188 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
5189 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
5190 +# CONFIG_BLK_DEV_ATARAID_SII is not set
5191 +
5192 +#
5193 +# SCSI support
5194 +#
5195 +CONFIG_SCSI=y
5196 +
5197 +#
5198 +# SCSI support type (disk, tape, CD-ROM)
5199 +#
5200 +CONFIG_BLK_DEV_SD=y
5201 +CONFIG_SD_EXTRA_DEVS=40
5202 +CONFIG_CHR_DEV_ST=y
5203 +# CONFIG_CHR_DEV_OSST is not set
5204 +CONFIG_BLK_DEV_SR=y
5205 +# CONFIG_BLK_DEV_SR_VENDOR is not set
5206 +CONFIG_SR_EXTRA_DEVS=2
5207 +# CONFIG_CHR_DEV_SG is not set
5208 +
5209 +#
5210 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
5211 +#
5212 +# CONFIG_SCSI_DEBUG_QUEUES is not set
5213 +# CONFIG_SCSI_MULTI_LUN is not set
5214 +CONFIG_SCSI_CONSTANTS=y
5215 +# CONFIG_SCSI_LOGGING is not set
5216 +
5217 +#
5218 +# SCSI low-level drivers
5219 +#
5220 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
5221 +# CONFIG_SCSI_7000FASST is not set
5222 +# CONFIG_SCSI_ACARD is not set
5223 +# CONFIG_SCSI_AHA152X is not set
5224 +# CONFIG_SCSI_AHA1542 is not set
5225 +# CONFIG_SCSI_AHA1740 is not set
5226 +# CONFIG_SCSI_AACRAID is not set
5227 +# CONFIG_SCSI_AIC7XXX is not set
5228 +# CONFIG_SCSI_AIC79XX is not set
5229 +# CONFIG_SCSI_AIC7XXX_OLD is not set
5230 +# CONFIG_SCSI_DPT_I2O is not set
5231 +# CONFIG_SCSI_ADVANSYS is not set
5232 +# CONFIG_SCSI_IN2000 is not set
5233 +# CONFIG_SCSI_AM53C974 is not set
5234 +# CONFIG_SCSI_MEGARAID is not set
5235 +# CONFIG_SCSI_MEGARAID2 is not set
5236 +# CONFIG_SCSI_SATA is not set
5237 +# CONFIG_SCSI_SATA_AHCI is not set
5238 +# CONFIG_SCSI_SATA_SVW is not set
5239 +# CONFIG_SCSI_ATA_PIIX is not set
5240 +# CONFIG_SCSI_SATA_NV is not set
5241 +# CONFIG_SCSI_SATA_QSTOR is not set
5242 +# CONFIG_SCSI_SATA_PROMISE is not set
5243 +# CONFIG_SCSI_SATA_SX4 is not set
5244 +# CONFIG_SCSI_SATA_SIL is not set
5245 +# CONFIG_SCSI_SATA_SIS is not set
5246 +# CONFIG_SCSI_SATA_ULI is not set
5247 +# CONFIG_SCSI_SATA_VIA is not set
5248 +# CONFIG_SCSI_SATA_VITESSE is not set
5249 +# CONFIG_SCSI_BUSLOGIC is not set
5250 +# CONFIG_SCSI_CPQFCTS is not set
5251 +# CONFIG_SCSI_DMX3191D is not set
5252 +# CONFIG_SCSI_DTC3280 is not set
5253 +# CONFIG_SCSI_EATA is not set
5254 +# CONFIG_SCSI_EATA_DMA is not set
5255 +# CONFIG_SCSI_EATA_PIO is not set
5256 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
5257 +# CONFIG_SCSI_GDTH is not set
5258 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
5259 +# CONFIG_SCSI_INITIO is not set
5260 +# CONFIG_SCSI_INIA100 is not set
5261 +# CONFIG_SCSI_NCR53C406A is not set
5262 +# CONFIG_SCSI_NCR53C7xx is not set
5263 +# CONFIG_SCSI_SYM53C8XX_2 is not set
5264 +# CONFIG_SCSI_NCR53C8XX is not set
5265 +# CONFIG_SCSI_SYM53C8XX is not set
5266 +# CONFIG_SCSI_PAS16 is not set
5267 +# CONFIG_SCSI_PCI2000 is not set
5268 +# CONFIG_SCSI_PCI2220I is not set
5269 +# CONFIG_SCSI_PSI240I is not set
5270 +# CONFIG_SCSI_QLOGIC_FAS is not set
5271 +# CONFIG_SCSI_QLOGIC_ISP is not set
5272 +# CONFIG_SCSI_QLOGIC_FC is not set
5273 +# CONFIG_SCSI_QLOGIC_1280 is not set
5274 +# CONFIG_SCSI_SIM710 is not set
5275 +# CONFIG_SCSI_SYM53C416 is not set
5276 +# CONFIG_SCSI_DC390T is not set
5277 +# CONFIG_SCSI_T128 is not set
5278 +# CONFIG_SCSI_U14_34F is not set
5279 +# CONFIG_SCSI_NSP32 is not set
5280 +# CONFIG_SCSI_DEBUG is not set
5281 +
5282 +#
5283 +# PCMCIA SCSI adapter support
5284 +#
5285 +# CONFIG_SCSI_PCMCIA is not set
5286 +
5287 +#
5288 +# Fusion MPT device support
5289 +#
5290 +# CONFIG_FUSION is not set
5291 +# CONFIG_FUSION_BOOT is not set
5292 +# CONFIG_FUSION_ISENSE is not set
5293 +# CONFIG_FUSION_CTL is not set
5294 +# CONFIG_FUSION_LAN is not set
5295 +
5296 +#
5297 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
5298 +#
5299 +# CONFIG_IEEE1394 is not set
5300 +
5301 +#
5302 +# I2O device support
5303 +#
5304 +# CONFIG_I2O is not set
5305 +# CONFIG_I2O_PCI is not set
5306 +# CONFIG_I2O_BLOCK is not set
5307 +# CONFIG_I2O_LAN is not set
5308 +# CONFIG_I2O_SCSI is not set
5309 +# CONFIG_I2O_PROC is not set
5310 +
5311 +#
5312 +# Network device support
5313 +#
5314 +CONFIG_NETDEVICES=y
5315 +
5316 +#
5317 +# ARCnet devices
5318 +#
5319 +# CONFIG_ARCNET is not set
5320 +# CONFIG_DUMMY is not set
5321 +# CONFIG_BONDING is not set
5322 +# CONFIG_EQUALIZER is not set
5323 +# CONFIG_TUN is not set
5324 +# CONFIG_ETHERTAP is not set
5325 +
5326 +#
5327 +# Ethernet (10 or 100Mbit)
5328 +#
5329 +CONFIG_NET_ETHERNET=y
5330 +# CONFIG_SUNLANCE is not set
5331 +# CONFIG_HAPPYMEAL is not set
5332 +# CONFIG_SUNBMAC is not set
5333 +# CONFIG_SUNQE is not set
5334 +# CONFIG_SUNGEM is not set
5335 +# CONFIG_NET_VENDOR_3COM is not set
5336 +# CONFIG_LANCE is not set
5337 +# CONFIG_NET_VENDOR_SMC is not set
5338 +# CONFIG_NET_VENDOR_RACAL is not set
5339 +# CONFIG_HP100 is not set
5340 +# CONFIG_NET_ISA is not set
5341 +# CONFIG_NET_PCI is not set
5342 +# CONFIG_NET_POCKET is not set
5343 +
5344 +#
5345 +# Ethernet (1000 Mbit)
5346 +#
5347 +# CONFIG_ACENIC is not set
5348 +# CONFIG_DL2K is not set
5349 +# CONFIG_E1000 is not set
5350 +# CONFIG_MYRI_SBUS is not set
5351 +# CONFIG_NS83820 is not set
5352 +# CONFIG_HAMACHI is not set
5353 +# CONFIG_YELLOWFIN is not set
5354 +# CONFIG_R8169 is not set
5355 +# CONFIG_SK98LIN is not set
5356 +# CONFIG_TIGON3 is not set
5357 +# CONFIG_FDDI is not set
5358 +# CONFIG_HIPPI is not set
5359 +# CONFIG_PLIP is not set
5360 +# CONFIG_PPP is not set
5361 +# CONFIG_SLIP is not set
5362 +
5363 +#
5364 +# Wireless LAN (non-hamradio)
5365 +#
5366 +# CONFIG_NET_RADIO is not set
5367 +
5368 +#
5369 +# Token Ring devices
5370 +#
5371 +# CONFIG_TR is not set
5372 +# CONFIG_NET_FC is not set
5373 +# CONFIG_RCPCI is not set
5374 +# CONFIG_SHAPER is not set
5375 +
5376 +#
5377 +# Wan interfaces
5378 +#
5379 +# CONFIG_WAN is not set
5380 +
5381 +#
5382 +# PCMCIA network device support
5383 +#
5384 +# CONFIG_NET_PCMCIA is not set
5385 +
5386 +#
5387 +# Amateur Radio support
5388 +#
5389 +# CONFIG_HAMRADIO is not set
5390 +
5391 +#
5392 +# IrDA (infrared) support
5393 +#
5394 +# CONFIG_IRDA is not set
5395 +
5396 +#
5397 +# ISDN subsystem
5398 +#
5399 +# CONFIG_ISDN is not set
5400 +
5401 +#
5402 +# Input core support
5403 +#
5404 +CONFIG_INPUT=y
5405 +CONFIG_INPUT_KEYBDEV=y
5406 +CONFIG_INPUT_MOUSEDEV=y
5407 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
5408 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
5409 +# CONFIG_INPUT_JOYDEV is not set
5410 +CONFIG_INPUT_EVDEV=y
5411 +# CONFIG_INPUT_UINPUT is not set
5412 +
5413 +#
5414 +# Character devices
5415 +#
5416 +CONFIG_VT=y
5417 +# CONFIG_VT_CONSOLE is not set
5418 +# CONFIG_SERIAL is not set
5419 +# CONFIG_SERIAL_EXTENDED is not set
5420 +CONFIG_SERIAL_NONSTANDARD=y
5421 +# CONFIG_COMPUTONE is not set
5422 +# CONFIG_ROCKETPORT is not set
5423 +# CONFIG_CYCLADES is not set
5424 +# CONFIG_DIGIEPCA is not set
5425 +# CONFIG_DIGI is not set
5426 +# CONFIG_ESPSERIAL is not set
5427 +# CONFIG_MOXA_INTELLIO is not set
5428 +# CONFIG_MOXA_SMARTIO is not set
5429 +# CONFIG_ISI is not set
5430 +# CONFIG_SYNCLINK is not set
5431 +# CONFIG_SYNCLINKMP is not set
5432 +# CONFIG_N_HDLC is not set
5433 +# CONFIG_RISCOM8 is not set
5434 +# CONFIG_SPECIALIX is not set
5435 +# CONFIG_SX is not set
5436 +# CONFIG_RIO is not set
5437 +# CONFIG_STALDRV is not set
5438 +# CONFIG_SERIAL_TX3912 is not set
5439 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
5440 +# CONFIG_SERIAL_TXX9 is not set
5441 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
5442 +# CONFIG_TXX927_SERIAL is not set
5443 +CONFIG_UNIX98_PTYS=y
5444 +CONFIG_UNIX98_PTY_COUNT=256
5445 +
5446 +#
5447 +# I2C support
5448 +#
5449 +# CONFIG_I2C is not set
5450 +
5451 +#
5452 +# Mice
5453 +#
5454 +# CONFIG_BUSMOUSE is not set
5455 +# CONFIG_MOUSE is not set
5456 +
5457 +#
5458 +# Joysticks
5459 +#
5460 +# CONFIG_INPUT_GAMEPORT is not set
5461 +# CONFIG_INPUT_NS558 is not set
5462 +# CONFIG_INPUT_LIGHTNING is not set
5463 +# CONFIG_INPUT_PCIGAME is not set
5464 +# CONFIG_INPUT_CS461X is not set
5465 +# CONFIG_INPUT_EMU10K1 is not set
5466 +# CONFIG_INPUT_SERIO is not set
5467 +# CONFIG_INPUT_SERPORT is not set
5468 +
5469 +#
5470 +# Joysticks
5471 +#
5472 +# CONFIG_INPUT_ANALOG is not set
5473 +# CONFIG_INPUT_A3D is not set
5474 +# CONFIG_INPUT_ADI is not set
5475 +# CONFIG_INPUT_COBRA is not set
5476 +# CONFIG_INPUT_GF2K is not set
5477 +# CONFIG_INPUT_GRIP is not set
5478 +# CONFIG_INPUT_INTERACT is not set
5479 +# CONFIG_INPUT_TMDC is not set
5480 +# CONFIG_INPUT_SIDEWINDER is not set
5481 +# CONFIG_INPUT_IFORCE_USB is not set
5482 +# CONFIG_INPUT_IFORCE_232 is not set
5483 +# CONFIG_INPUT_WARRIOR is not set
5484 +# CONFIG_INPUT_MAGELLAN is not set
5485 +# CONFIG_INPUT_SPACEORB is not set
5486 +# CONFIG_INPUT_SPACEBALL is not set
5487 +# CONFIG_INPUT_STINGER is not set
5488 +# CONFIG_INPUT_DB9 is not set
5489 +# CONFIG_INPUT_GAMECON is not set
5490 +# CONFIG_INPUT_TURBOGRAFX is not set
5491 +# CONFIG_QIC02_TAPE is not set
5492 +# CONFIG_IPMI_HANDLER is not set
5493 +# CONFIG_IPMI_PANIC_EVENT is not set
5494 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
5495 +# CONFIG_IPMI_KCS is not set
5496 +# CONFIG_IPMI_WATCHDOG is not set
5497 +
5498 +#
5499 +# Watchdog Cards
5500 +#
5501 +# CONFIG_WATCHDOG is not set
5502 +# CONFIG_SCx200 is not set
5503 +# CONFIG_SCx200_GPIO is not set
5504 +# CONFIG_AMD_PM768 is not set
5505 +# CONFIG_NVRAM is not set
5506 +# CONFIG_RTC is not set
5507 +# CONFIG_DTLK is not set
5508 +# CONFIG_R3964 is not set
5509 +# CONFIG_APPLICOM is not set
5510 +
5511 +#
5512 +# Ftape, the floppy tape device driver
5513 +#
5514 +# CONFIG_FTAPE is not set
5515 +# CONFIG_AGP is not set
5516 +
5517 +#
5518 +# Direct Rendering Manager (XFree86 DRI support)
5519 +#
5520 +# CONFIG_DRM is not set
5521 +
5522 +#
5523 +# PCMCIA character devices
5524 +#
5525 +# CONFIG_PCMCIA_SERIAL_CS is not set
5526 +# CONFIG_SYNCLINK_CS is not set
5527 +
5528 +#
5529 +# File systems
5530 +#
5531 +# CONFIG_QUOTA is not set
5532 +# CONFIG_QFMT_V2 is not set
5533 +CONFIG_AUTOFS_FS=y
5534 +# CONFIG_AUTOFS4_FS is not set
5535 +# CONFIG_REISERFS_FS is not set
5536 +# CONFIG_REISERFS_CHECK is not set
5537 +# CONFIG_REISERFS_PROC_INFO is not set
5538 +# CONFIG_ADFS_FS is not set
5539 +# CONFIG_ADFS_FS_RW is not set
5540 +# CONFIG_AFFS_FS is not set
5541 +# CONFIG_HFS_FS is not set
5542 +# CONFIG_HFSPLUS_FS is not set
5543 +# CONFIG_BEFS_FS is not set
5544 +# CONFIG_BEFS_DEBUG is not set
5545 +# CONFIG_BFS_FS is not set
5546 +CONFIG_EXT3_FS=y
5547 +CONFIG_JBD=y
5548 +# CONFIG_JBD_DEBUG is not set
5549 +CONFIG_FAT_FS=y
5550 +CONFIG_MSDOS_FS=y
5551 +# CONFIG_UMSDOS_FS is not set
5552 +CONFIG_VFAT_FS=y
5553 +# CONFIG_EFS_FS is not set
5554 +# CONFIG_JFFS_FS is not set
5555 +# CONFIG_JFFS2_FS is not set
5556 +# CONFIG_CRAMFS is not set
5557 +CONFIG_TMPFS=y
5558 +CONFIG_RAMFS=y
5559 +# CONFIG_ISO9660_FS is not set
5560 +# CONFIG_JOLIET is not set
5561 +# CONFIG_ZISOFS is not set
5562 +# CONFIG_JFS_FS is not set
5563 +# CONFIG_JFS_DEBUG is not set
5564 +# CONFIG_JFS_STATISTICS is not set
5565 +# CONFIG_MINIX_FS is not set
5566 +# CONFIG_VXFS_FS is not set
5567 +# CONFIG_NTFS_FS is not set
5568 +# CONFIG_NTFS_RW is not set
5569 +# CONFIG_HPFS_FS is not set
5570 +CONFIG_PROC_FS=y
5571 +# CONFIG_DEVFS_FS is not set
5572 +# CONFIG_DEVFS_MOUNT is not set
5573 +# CONFIG_DEVFS_DEBUG is not set
5574 +CONFIG_DEVPTS_FS=y
5575 +# CONFIG_QNX4FS_FS is not set
5576 +# CONFIG_QNX4FS_RW is not set
5577 +# CONFIG_ROMFS_FS is not set
5578 +CONFIG_EXT2_FS=y
5579 +# CONFIG_SYSV_FS is not set
5580 +# CONFIG_UDF_FS is not set
5581 +# CONFIG_UDF_RW is not set
5582 +# CONFIG_UFS_FS is not set
5583 +# CONFIG_UFS_FS_WRITE is not set
5584 +# CONFIG_XFS_FS is not set
5585 +# CONFIG_XFS_QUOTA is not set
5586 +# CONFIG_XFS_RT is not set
5587 +# CONFIG_XFS_TRACE is not set
5588 +# CONFIG_XFS_DEBUG is not set
5589 +
5590 +#
5591 +# Network File Systems
5592 +#
5593 +# CONFIG_CODA_FS is not set
5594 +# CONFIG_INTERMEZZO_FS is not set
5595 +CONFIG_NFS_FS=y
5596 +CONFIG_NFS_V3=y
5597 +# CONFIG_NFS_DIRECTIO is not set
5598 +CONFIG_ROOT_NFS=y
5599 +# CONFIG_NFSD is not set
5600 +# CONFIG_NFSD_V3 is not set
5601 +# CONFIG_NFSD_TCP is not set
5602 +CONFIG_SUNRPC=y
5603 +CONFIG_LOCKD=y
5604 +CONFIG_LOCKD_V4=y
5605 +# CONFIG_SMB_FS is not set
5606 +# CONFIG_NCP_FS is not set
5607 +# CONFIG_NCPFS_PACKET_SIGNING is not set
5608 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
5609 +# CONFIG_NCPFS_STRONG is not set
5610 +# CONFIG_NCPFS_NFS_NS is not set
5611 +# CONFIG_NCPFS_OS2_NS is not set
5612 +# CONFIG_NCPFS_SMALLDOS is not set
5613 +# CONFIG_NCPFS_NLS is not set
5614 +# CONFIG_NCPFS_EXTRAS is not set
5615 +# CONFIG_ZISOFS_FS is not set
5616 +
5617 +#
5618 +# Partition Types
5619 +#
5620 +# CONFIG_PARTITION_ADVANCED is not set
5621 +CONFIG_MSDOS_PARTITION=y
5622 +# CONFIG_SMB_NLS is not set
5623 +CONFIG_NLS=y
5624 +
5625 +#
5626 +# Native Language Support
5627 +#
5628 +CONFIG_NLS_DEFAULT="iso8859-1"
5629 +# CONFIG_NLS_CODEPAGE_437 is not set
5630 +# CONFIG_NLS_CODEPAGE_737 is not set
5631 +# CONFIG_NLS_CODEPAGE_775 is not set
5632 +# CONFIG_NLS_CODEPAGE_850 is not set
5633 +# CONFIG_NLS_CODEPAGE_852 is not set
5634 +# CONFIG_NLS_CODEPAGE_855 is not set
5635 +# CONFIG_NLS_CODEPAGE_857 is not set
5636 +# CONFIG_NLS_CODEPAGE_860 is not set
5637 +# CONFIG_NLS_CODEPAGE_861 is not set
5638 +# CONFIG_NLS_CODEPAGE_862 is not set
5639 +# CONFIG_NLS_CODEPAGE_863 is not set
5640 +# CONFIG_NLS_CODEPAGE_864 is not set
5641 +# CONFIG_NLS_CODEPAGE_865 is not set
5642 +# CONFIG_NLS_CODEPAGE_866 is not set
5643 +# CONFIG_NLS_CODEPAGE_869 is not set
5644 +# CONFIG_NLS_CODEPAGE_936 is not set
5645 +# CONFIG_NLS_CODEPAGE_950 is not set
5646 +# CONFIG_NLS_CODEPAGE_932 is not set
5647 +# CONFIG_NLS_CODEPAGE_949 is not set
5648 +# CONFIG_NLS_CODEPAGE_874 is not set
5649 +# CONFIG_NLS_ISO8859_8 is not set
5650 +# CONFIG_NLS_CODEPAGE_1250 is not set
5651 +# CONFIG_NLS_CODEPAGE_1251 is not set
5652 +# CONFIG_NLS_ISO8859_1 is not set
5653 +# CONFIG_NLS_ISO8859_2 is not set
5654 +# CONFIG_NLS_ISO8859_3 is not set
5655 +# CONFIG_NLS_ISO8859_4 is not set
5656 +# CONFIG_NLS_ISO8859_5 is not set
5657 +# CONFIG_NLS_ISO8859_6 is not set
5658 +# CONFIG_NLS_ISO8859_7 is not set
5659 +# CONFIG_NLS_ISO8859_9 is not set
5660 +# CONFIG_NLS_ISO8859_13 is not set
5661 +# CONFIG_NLS_ISO8859_14 is not set
5662 +# CONFIG_NLS_ISO8859_15 is not set
5663 +# CONFIG_NLS_KOI8_R is not set
5664 +# CONFIG_NLS_KOI8_U is not set
5665 +# CONFIG_NLS_UTF8 is not set
5666 +
5667 +#
5668 +# Multimedia devices
5669 +#
5670 +# CONFIG_VIDEO_DEV is not set
5671 +
5672 +#
5673 +# Console drivers
5674 +#
5675 +# CONFIG_VGA_CONSOLE is not set
5676 +# CONFIG_MDA_CONSOLE is not set
5677 +
5678 +#
5679 +# Frame-buffer support
5680 +#
5681 +CONFIG_FB=y
5682 +CONFIG_DUMMY_CONSOLE=y
5683 +# CONFIG_FB_RIVA is not set
5684 +# CONFIG_FB_CLGEN is not set
5685 +# CONFIG_FB_PM2 is not set
5686 +# CONFIG_FB_PM3 is not set
5687 +# CONFIG_FB_CYBER2000 is not set
5688 +# CONFIG_FB_MATROX is not set
5689 +# CONFIG_FB_ATY is not set
5690 +# CONFIG_FB_RADEON is not set
5691 +# CONFIG_FB_ATY128 is not set
5692 +# CONFIG_FB_INTEL is not set
5693 +# CONFIG_FB_SIS is not set
5694 +# CONFIG_FB_NEOMAGIC is not set
5695 +# CONFIG_FB_3DFX is not set
5696 +# CONFIG_FB_VOODOO1 is not set
5697 +# CONFIG_FB_TRIDENT is not set
5698 +# CONFIG_FB_E1356 is not set
5699 +# CONFIG_FB_IT8181 is not set
5700 +# CONFIG_FB_VIRTUAL is not set
5701 +CONFIG_FBCON_ADVANCED=y
5702 +# CONFIG_FBCON_MFB is not set
5703 +# CONFIG_FBCON_CFB2 is not set
5704 +# CONFIG_FBCON_CFB4 is not set
5705 +# CONFIG_FBCON_CFB8 is not set
5706 +CONFIG_FBCON_CFB16=y
5707 +# CONFIG_FBCON_CFB24 is not set
5708 +CONFIG_FBCON_CFB32=y
5709 +# CONFIG_FBCON_AFB is not set
5710 +# CONFIG_FBCON_ILBM is not set
5711 +# CONFIG_FBCON_IPLAN2P2 is not set
5712 +# CONFIG_FBCON_IPLAN2P4 is not set
5713 +# CONFIG_FBCON_IPLAN2P8 is not set
5714 +# CONFIG_FBCON_MAC is not set
5715 +# CONFIG_FBCON_VGA_PLANES is not set
5716 +# CONFIG_FBCON_VGA is not set
5717 +# CONFIG_FBCON_HGA is not set
5718 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
5719 +CONFIG_FBCON_FONTS=y
5720 +CONFIG_FONT_8x8=y
5721 +CONFIG_FONT_8x16=y
5722 +# CONFIG_FONT_SUN8x16 is not set
5723 +# CONFIG_FONT_SUN12x22 is not set
5724 +# CONFIG_FONT_6x11 is not set
5725 +# CONFIG_FONT_PEARL_8x8 is not set
5726 +# CONFIG_FONT_ACORN_8x8 is not set
5727 +
5728 +#
5729 +# Sound
5730 +#
5731 +CONFIG_SOUND=y
5732 +# CONFIG_SOUND_ALI5455 is not set
5733 +# CONFIG_SOUND_BT878 is not set
5734 +# CONFIG_SOUND_CMPCI is not set
5735 +# CONFIG_SOUND_EMU10K1 is not set
5736 +# CONFIG_MIDI_EMU10K1 is not set
5737 +# CONFIG_SOUND_FUSION is not set
5738 +# CONFIG_SOUND_CS4281 is not set
5739 +# CONFIG_SOUND_ES1370 is not set
5740 +# CONFIG_SOUND_ES1371 is not set
5741 +# CONFIG_SOUND_ESSSOLO1 is not set
5742 +# CONFIG_SOUND_MAESTRO is not set
5743 +# CONFIG_SOUND_MAESTRO3 is not set
5744 +# CONFIG_SOUND_FORTE is not set
5745 +# CONFIG_SOUND_ICH is not set
5746 +# CONFIG_SOUND_RME96XX is not set
5747 +# CONFIG_SOUND_SONICVIBES is not set
5748 +# CONFIG_SOUND_TRIDENT is not set
5749 +# CONFIG_SOUND_MSNDCLAS is not set
5750 +# CONFIG_SOUND_MSNDPIN is not set
5751 +# CONFIG_SOUND_VIA82CXXX is not set
5752 +# CONFIG_MIDI_VIA82CXXX is not set
5753 +# CONFIG_SOUND_OSS is not set
5754 +# CONFIG_SOUND_TVMIXER is not set
5755 +# CONFIG_SOUND_AD1980 is not set
5756 +# CONFIG_SOUND_WM97XX is not set
5757 +
5758 +#
5759 +# USB support
5760 +#
5761 +CONFIG_USB=y
5762 +# CONFIG_USB_DEBUG is not set
5763 +
5764 +#
5765 +# Miscellaneous USB options
5766 +#
5767 +CONFIG_USB_DEVICEFS=y
5768 +# CONFIG_USB_BANDWIDTH is not set
5769 +
5770 +#
5771 +# USB Host Controller Drivers
5772 +#
5773 +# CONFIG_USB_EHCI_HCD is not set
5774 +# CONFIG_USB_UHCI is not set
5775 +# CONFIG_USB_UHCI_ALT is not set
5776 +CONFIG_USB_OHCI=y
5777 +
5778 +#
5779 +# USB Device Class drivers
5780 +#
5781 +# CONFIG_USB_AUDIO is not set
5782 +# CONFIG_USB_EMI26 is not set
5783 +# CONFIG_USB_BLUETOOTH is not set
5784 +# CONFIG_USB_MIDI is not set
5785 +CONFIG_USB_STORAGE=y
5786 +# CONFIG_USB_STORAGE_DEBUG is not set
5787 +# CONFIG_USB_STORAGE_DATAFAB is not set
5788 +# CONFIG_USB_STORAGE_FREECOM is not set
5789 +# CONFIG_USB_STORAGE_ISD200 is not set
5790 +# CONFIG_USB_STORAGE_DPCM is not set
5791 +# CONFIG_USB_STORAGE_HP8200e is not set
5792 +# CONFIG_USB_STORAGE_SDDR09 is not set
5793 +# CONFIG_USB_STORAGE_SDDR55 is not set
5794 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
5795 +# CONFIG_USB_ACM is not set
5796 +# CONFIG_USB_PRINTER is not set
5797 +
5798 +#
5799 +# USB Human Interface Devices (HID)
5800 +#
5801 +CONFIG_USB_HID=y
5802 +CONFIG_USB_HIDINPUT=y
5803 +CONFIG_USB_HIDDEV=y
5804 +# CONFIG_USB_AIPTEK is not set
5805 +# CONFIG_USB_WACOM is not set
5806 +# CONFIG_USB_KBTAB is not set
5807 +# CONFIG_USB_POWERMATE is not set
5808 +
5809 +#
5810 +# USB Imaging devices
5811 +#
5812 +# CONFIG_USB_DC2XX is not set
5813 +# CONFIG_USB_MDC800 is not set
5814 +# CONFIG_USB_SCANNER is not set
5815 +# CONFIG_USB_MICROTEK is not set
5816 +# CONFIG_USB_HPUSBSCSI is not set
5817 +
5818 +#
5819 +# USB Multimedia devices
5820 +#
5821 +
5822 +#
5823 +# Video4Linux support is needed for USB Multimedia device support
5824 +#
5825 +
5826 +#
5827 +# USB Network adaptors
5828 +#
5829 +# CONFIG_USB_PEGASUS is not set
5830 +# CONFIG_USB_RTL8150 is not set
5831 +# CONFIG_USB_KAWETH is not set
5832 +# CONFIG_USB_CATC is not set
5833 +# CONFIG_USB_CDCETHER is not set
5834 +# CONFIG_USB_USBNET is not set
5835 +
5836 +#
5837 +# USB port drivers
5838 +#
5839 +# CONFIG_USB_USS720 is not set
5840 +
5841 +#
5842 +# USB Serial Converter support
5843 +#
5844 +# CONFIG_USB_SERIAL is not set
5845 +
5846 +#
5847 +# USB Miscellaneous drivers
5848 +#
5849 +# CONFIG_USB_RIO500 is not set
5850 +# CONFIG_USB_AUERSWALD is not set
5851 +# CONFIG_USB_TIGL is not set
5852 +# CONFIG_USB_BRLVGER is not set
5853 +# CONFIG_USB_LCD is not set
5854 +
5855 +#
5856 +# Support for USB gadgets
5857 +#
5858 +# CONFIG_USB_GADGET is not set
5859 +
5860 +#
5861 +# Bluetooth support
5862 +#
5863 +# CONFIG_BLUEZ is not set
5864 +
5865 +#
5866 +# Kernel hacking
5867 +#
5868 +CONFIG_CROSSCOMPILE=y
5869 +# CONFIG_RUNTIME_DEBUG is not set
5870 +# CONFIG_KGDB is not set
5871 +# CONFIG_GDB_CONSOLE is not set
5872 +# CONFIG_DEBUG_INFO is not set
5873 +# CONFIG_MAGIC_SYSRQ is not set
5874 +# CONFIG_MIPS_UNCACHED is not set
5875 +CONFIG_LOG_BUF_SHIFT=0
5876 +
5877 +#
5878 +# Cryptographic options
5879 +#
5880 +# CONFIG_CRYPTO is not set
5881 +
5882 +#
5883 +# Library routines
5884 +#
5885 +# CONFIG_CRC32 is not set
5886 +CONFIG_ZLIB_INFLATE=m
5887 +CONFIG_ZLIB_DEFLATE=m
5888 +# CONFIG_FW_LOADER is not set
5889 diff -Nur linux-2.4.30/arch/mips/defconfig-db1500 linux-2.4.30-mips/arch/mips/defconfig-db1500
5890 --- linux-2.4.30/arch/mips/defconfig-db1500 2005-01-19 15:09:28.000000000 +0100
5891 +++ linux-2.4.30-mips/arch/mips/defconfig-db1500 2005-03-18 13:13:21.000000000 +0100
5892 @@ -30,8 +30,8 @@
5893 # CONFIG_MIPS_PB1000 is not set
5894 # CONFIG_MIPS_PB1100 is not set
5895 # CONFIG_MIPS_PB1500 is not set
5896 -# CONFIG_MIPS_HYDROGEN3 is not set
5897 # CONFIG_MIPS_PB1550 is not set
5898 +# CONFIG_MIPS_HYDROGEN3 is not set
5899 # CONFIG_MIPS_XXS1500 is not set
5900 # CONFIG_MIPS_MTX1 is not set
5901 # CONFIG_COGENT_CSB250 is not set
5902 @@ -267,11 +267,6 @@
5903 #
5904 # CONFIG_IPX is not set
5905 # CONFIG_ATALK is not set
5906 -
5907 -#
5908 -# Appletalk devices
5909 -#
5910 -# CONFIG_DEV_APPLETALK is not set
5911 # CONFIG_DECNET is not set
5912 # CONFIG_BRIDGE is not set
5913 # CONFIG_X25 is not set
5914 @@ -555,7 +550,6 @@
5915 # CONFIG_AU1X00_USB_TTY is not set
5916 # CONFIG_AU1X00_USB_RAW is not set
5917 # CONFIG_TXX927_SERIAL is not set
5918 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5919 CONFIG_UNIX98_PTYS=y
5920 CONFIG_UNIX98_PTY_COUNT=256
5921
5922 diff -Nur linux-2.4.30/arch/mips/defconfig-db1550 linux-2.4.30-mips/arch/mips/defconfig-db1550
5923 --- linux-2.4.30/arch/mips/defconfig-db1550 2005-01-19 15:09:28.000000000 +0100
5924 +++ linux-2.4.30-mips/arch/mips/defconfig-db1550 2005-03-18 13:13:21.000000000 +0100
5925 @@ -30,8 +30,8 @@
5926 # CONFIG_MIPS_PB1000 is not set
5927 # CONFIG_MIPS_PB1100 is not set
5928 # CONFIG_MIPS_PB1500 is not set
5929 -# CONFIG_MIPS_HYDROGEN3 is not set
5930 # CONFIG_MIPS_PB1550 is not set
5931 +# CONFIG_MIPS_HYDROGEN3 is not set
5932 # CONFIG_MIPS_XXS1500 is not set
5933 # CONFIG_MIPS_MTX1 is not set
5934 # CONFIG_COGENT_CSB250 is not set
5935 @@ -213,11 +213,9 @@
5936 # CONFIG_MTD_BOSPORUS is not set
5937 # CONFIG_MTD_XXS1500 is not set
5938 # CONFIG_MTD_MTX1 is not set
5939 -# CONFIG_MTD_DB1X00 is not set
5940 CONFIG_MTD_PB1550=y
5941 CONFIG_MTD_PB1550_BOOT=y
5942 CONFIG_MTD_PB1550_USER=y
5943 -# CONFIG_MTD_HYDROGEN3 is not set
5944 # CONFIG_MTD_MIRAGE is not set
5945 # CONFIG_MTD_CSTM_MIPS_IXX is not set
5946 # CONFIG_MTD_OCELOT is not set
5947 @@ -236,7 +234,6 @@
5948 #
5949 # Disk-On-Chip Device Drivers
5950 #
5951 -# CONFIG_MTD_DOC1000 is not set
5952 # CONFIG_MTD_DOC2000 is not set
5953 # CONFIG_MTD_DOC2001 is not set
5954 # CONFIG_MTD_DOCPROBE is not set
5955 @@ -343,11 +340,6 @@
5956 #
5957 # CONFIG_IPX is not set
5958 # CONFIG_ATALK is not set
5959 -
5960 -#
5961 -# Appletalk devices
5962 -#
5963 -# CONFIG_DEV_APPLETALK is not set
5964 # CONFIG_DECNET is not set
5965 # CONFIG_BRIDGE is not set
5966 # CONFIG_X25 is not set
5967 @@ -633,7 +625,6 @@
5968 # CONFIG_AU1X00_USB_TTY is not set
5969 # CONFIG_AU1X00_USB_RAW is not set
5970 # CONFIG_TXX927_SERIAL is not set
5971 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
5972 CONFIG_UNIX98_PTYS=y
5973 CONFIG_UNIX98_PTY_COUNT=256
5974
5975 diff -Nur linux-2.4.30/arch/mips/defconfig-ddb5476 linux-2.4.30-mips/arch/mips/defconfig-ddb5476
5976 --- linux-2.4.30/arch/mips/defconfig-ddb5476 2005-01-19 15:09:28.000000000 +0100
5977 +++ linux-2.4.30-mips/arch/mips/defconfig-ddb5476 2005-03-18 13:13:21.000000000 +0100
5978 @@ -28,8 +28,8 @@
5979 # CONFIG_MIPS_PB1000 is not set
5980 # CONFIG_MIPS_PB1100 is not set
5981 # CONFIG_MIPS_PB1500 is not set
5982 -# CONFIG_MIPS_HYDROGEN3 is not set
5983 # CONFIG_MIPS_PB1550 is not set
5984 +# CONFIG_MIPS_HYDROGEN3 is not set
5985 # CONFIG_MIPS_XXS1500 is not set
5986 # CONFIG_MIPS_MTX1 is not set
5987 # CONFIG_COGENT_CSB250 is not set
5988 @@ -226,11 +226,6 @@
5989 #
5990 # CONFIG_IPX is not set
5991 # CONFIG_ATALK is not set
5992 -
5993 -#
5994 -# Appletalk devices
5995 -#
5996 -# CONFIG_DEV_APPLETALK is not set
5997 # CONFIG_DECNET is not set
5998 # CONFIG_BRIDGE is not set
5999 # CONFIG_X25 is not set
6000 @@ -517,7 +512,6 @@
6001 CONFIG_SERIAL_CONSOLE=y
6002 # CONFIG_SERIAL_EXTENDED is not set
6003 # CONFIG_SERIAL_NONSTANDARD is not set
6004 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6005 CONFIG_UNIX98_PTYS=y
6006 CONFIG_UNIX98_PTY_COUNT=256
6007
6008 diff -Nur linux-2.4.30/arch/mips/defconfig-ddb5477 linux-2.4.30-mips/arch/mips/defconfig-ddb5477
6009 --- linux-2.4.30/arch/mips/defconfig-ddb5477 2005-01-19 15:09:28.000000000 +0100
6010 +++ linux-2.4.30-mips/arch/mips/defconfig-ddb5477 2005-03-18 13:13:21.000000000 +0100
6011 @@ -28,8 +28,8 @@
6012 # CONFIG_MIPS_PB1000 is not set
6013 # CONFIG_MIPS_PB1100 is not set
6014 # CONFIG_MIPS_PB1500 is not set
6015 -# CONFIG_MIPS_HYDROGEN3 is not set
6016 # CONFIG_MIPS_PB1550 is not set
6017 +# CONFIG_MIPS_HYDROGEN3 is not set
6018 # CONFIG_MIPS_XXS1500 is not set
6019 # CONFIG_MIPS_MTX1 is not set
6020 # CONFIG_COGENT_CSB250 is not set
6021 @@ -226,11 +226,6 @@
6022 #
6023 # CONFIG_IPX is not set
6024 # CONFIG_ATALK is not set
6025 -
6026 -#
6027 -# Appletalk devices
6028 -#
6029 -# CONFIG_DEV_APPLETALK is not set
6030 # CONFIG_DECNET is not set
6031 # CONFIG_BRIDGE is not set
6032 # CONFIG_X25 is not set
6033 @@ -434,7 +429,6 @@
6034 CONFIG_SERIAL_CONSOLE=y
6035 # CONFIG_SERIAL_EXTENDED is not set
6036 # CONFIG_SERIAL_NONSTANDARD is not set
6037 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6038 CONFIG_UNIX98_PTYS=y
6039 CONFIG_UNIX98_PTY_COUNT=256
6040
6041 diff -Nur linux-2.4.30/arch/mips/defconfig-decstation linux-2.4.30-mips/arch/mips/defconfig-decstation
6042 --- linux-2.4.30/arch/mips/defconfig-decstation 2005-01-19 15:09:28.000000000 +0100
6043 +++ linux-2.4.30-mips/arch/mips/defconfig-decstation 2005-03-18 13:13:21.000000000 +0100
6044 @@ -30,8 +30,8 @@
6045 # CONFIG_MIPS_PB1000 is not set
6046 # CONFIG_MIPS_PB1100 is not set
6047 # CONFIG_MIPS_PB1500 is not set
6048 -# CONFIG_MIPS_HYDROGEN3 is not set
6049 # CONFIG_MIPS_PB1550 is not set
6050 +# CONFIG_MIPS_HYDROGEN3 is not set
6051 # CONFIG_MIPS_XXS1500 is not set
6052 # CONFIG_MIPS_MTX1 is not set
6053 # CONFIG_COGENT_CSB250 is not set
6054 @@ -223,11 +223,6 @@
6055 #
6056 # CONFIG_IPX is not set
6057 # CONFIG_ATALK is not set
6058 -
6059 -#
6060 -# Appletalk devices
6061 -#
6062 -# CONFIG_DEV_APPLETALK is not set
6063 # CONFIG_DECNET is not set
6064 # CONFIG_BRIDGE is not set
6065 # CONFIG_X25 is not set
6066 @@ -306,9 +301,11 @@
6067 # CONFIG_SCSI_MEGARAID is not set
6068 # CONFIG_SCSI_MEGARAID2 is not set
6069 # CONFIG_SCSI_SATA is not set
6070 +# CONFIG_SCSI_SATA_AHCI is not set
6071 # CONFIG_SCSI_SATA_SVW is not set
6072 # CONFIG_SCSI_ATA_PIIX is not set
6073 # CONFIG_SCSI_SATA_NV is not set
6074 +# CONFIG_SCSI_SATA_QSTOR is not set
6075 # CONFIG_SCSI_SATA_PROMISE is not set
6076 # CONFIG_SCSI_SATA_SX4 is not set
6077 # CONFIG_SCSI_SATA_SIL is not set
6078 @@ -477,7 +474,6 @@
6079 CONFIG_SERIAL_DEC_CONSOLE=y
6080 CONFIG_DZ=y
6081 CONFIG_ZS=y
6082 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6083 CONFIG_UNIX98_PTYS=y
6084 CONFIG_UNIX98_PTY_COUNT=256
6085
6086 diff -Nur linux-2.4.30/arch/mips/defconfig-e55 linux-2.4.30-mips/arch/mips/defconfig-e55
6087 --- linux-2.4.30/arch/mips/defconfig-e55 2005-01-19 15:09:28.000000000 +0100
6088 +++ linux-2.4.30-mips/arch/mips/defconfig-e55 2005-03-18 13:13:21.000000000 +0100
6089 @@ -30,8 +30,8 @@
6090 # CONFIG_MIPS_PB1000 is not set
6091 # CONFIG_MIPS_PB1100 is not set
6092 # CONFIG_MIPS_PB1500 is not set
6093 -# CONFIG_MIPS_HYDROGEN3 is not set
6094 # CONFIG_MIPS_PB1550 is not set
6095 +# CONFIG_MIPS_HYDROGEN3 is not set
6096 # CONFIG_MIPS_XXS1500 is not set
6097 # CONFIG_MIPS_MTX1 is not set
6098 # CONFIG_COGENT_CSB250 is not set
6099 @@ -222,11 +222,6 @@
6100 #
6101 # CONFIG_IPX is not set
6102 # CONFIG_ATALK is not set
6103 -
6104 -#
6105 -# Appletalk devices
6106 -#
6107 -# CONFIG_DEV_APPLETALK is not set
6108 # CONFIG_DECNET is not set
6109 # CONFIG_BRIDGE is not set
6110 # CONFIG_X25 is not set
6111 @@ -426,7 +421,6 @@
6112 # CONFIG_SERIAL_MULTIPORT is not set
6113 # CONFIG_HUB6 is not set
6114 # CONFIG_SERIAL_NONSTANDARD is not set
6115 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6116 # CONFIG_VR41XX_KIU is not set
6117 CONFIG_UNIX98_PTYS=y
6118 CONFIG_UNIX98_PTY_COUNT=256
6119 diff -Nur linux-2.4.30/arch/mips/defconfig-eagle linux-2.4.30-mips/arch/mips/defconfig-eagle
6120 --- linux-2.4.30/arch/mips/defconfig-eagle 2005-01-19 15:09:28.000000000 +0100
6121 +++ linux-2.4.30-mips/arch/mips/defconfig-eagle 2005-03-18 13:13:21.000000000 +0100
6122 @@ -30,8 +30,8 @@
6123 # CONFIG_MIPS_PB1000 is not set
6124 # CONFIG_MIPS_PB1100 is not set
6125 # CONFIG_MIPS_PB1500 is not set
6126 -# CONFIG_MIPS_HYDROGEN3 is not set
6127 # CONFIG_MIPS_PB1550 is not set
6128 +# CONFIG_MIPS_HYDROGEN3 is not set
6129 # CONFIG_MIPS_XXS1500 is not set
6130 # CONFIG_MIPS_MTX1 is not set
6131 # CONFIG_COGENT_CSB250 is not set
6132 @@ -208,8 +208,8 @@
6133 # Mapping drivers for chip access
6134 #
6135 CONFIG_MTD_PHYSMAP=y
6136 -CONFIG_MTD_PHYSMAP_START=1c000000
6137 -CONFIG_MTD_PHYSMAP_LEN=2000000
6138 +CONFIG_MTD_PHYSMAP_START=0x1c000000
6139 +CONFIG_MTD_PHYSMAP_LEN=0x2000000
6140 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
6141 # CONFIG_MTD_PB1000 is not set
6142 # CONFIG_MTD_PB1500 is not set
6143 @@ -217,9 +217,7 @@
6144 # CONFIG_MTD_BOSPORUS is not set
6145 # CONFIG_MTD_XXS1500 is not set
6146 # CONFIG_MTD_MTX1 is not set
6147 -# CONFIG_MTD_DB1X00 is not set
6148 # CONFIG_MTD_PB1550 is not set
6149 -# CONFIG_MTD_HYDROGEN3 is not set
6150 # CONFIG_MTD_MIRAGE is not set
6151 # CONFIG_MTD_CSTM_MIPS_IXX is not set
6152 # CONFIG_MTD_OCELOT is not set
6153 @@ -238,7 +236,6 @@
6154 #
6155 # Disk-On-Chip Device Drivers
6156 #
6157 -# CONFIG_MTD_DOC1000 is not set
6158 # CONFIG_MTD_DOC2000 is not set
6159 # CONFIG_MTD_DOC2001 is not set
6160 # CONFIG_MTD_DOCPROBE is not set
6161 @@ -327,11 +324,6 @@
6162 #
6163 # CONFIG_IPX is not set
6164 # CONFIG_ATALK is not set
6165 -
6166 -#
6167 -# Appletalk devices
6168 -#
6169 -# CONFIG_DEV_APPLETALK is not set
6170 # CONFIG_DECNET is not set
6171 # CONFIG_BRIDGE is not set
6172 # CONFIG_X25 is not set
6173 @@ -587,7 +579,6 @@
6174 CONFIG_SERIAL_CONSOLE=y
6175 # CONFIG_SERIAL_EXTENDED is not set
6176 # CONFIG_SERIAL_NONSTANDARD is not set
6177 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6178 # CONFIG_VR41XX_KIU is not set
6179 CONFIG_UNIX98_PTYS=y
6180 CONFIG_UNIX98_PTY_COUNT=256
6181 diff -Nur linux-2.4.30/arch/mips/defconfig-ev64120 linux-2.4.30-mips/arch/mips/defconfig-ev64120
6182 --- linux-2.4.30/arch/mips/defconfig-ev64120 2005-01-19 15:09:28.000000000 +0100
6183 +++ linux-2.4.30-mips/arch/mips/defconfig-ev64120 2005-03-18 13:13:21.000000000 +0100
6184 @@ -30,8 +30,8 @@
6185 # CONFIG_MIPS_PB1000 is not set
6186 # CONFIG_MIPS_PB1100 is not set
6187 # CONFIG_MIPS_PB1500 is not set
6188 -# CONFIG_MIPS_HYDROGEN3 is not set
6189 # CONFIG_MIPS_PB1550 is not set
6190 +# CONFIG_MIPS_HYDROGEN3 is not set
6191 # CONFIG_MIPS_XXS1500 is not set
6192 # CONFIG_MIPS_MTX1 is not set
6193 # CONFIG_COGENT_CSB250 is not set
6194 @@ -230,11 +230,6 @@
6195 #
6196 # CONFIG_IPX is not set
6197 # CONFIG_ATALK is not set
6198 -
6199 -#
6200 -# Appletalk devices
6201 -#
6202 -# CONFIG_DEV_APPLETALK is not set
6203 # CONFIG_DECNET is not set
6204 # CONFIG_BRIDGE is not set
6205 # CONFIG_X25 is not set
6206 @@ -443,7 +438,6 @@
6207 # CONFIG_SERIAL_CONSOLE is not set
6208 # CONFIG_SERIAL_EXTENDED is not set
6209 # CONFIG_SERIAL_NONSTANDARD is not set
6210 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6211 CONFIG_UNIX98_PTYS=y
6212 CONFIG_UNIX98_PTY_COUNT=256
6213
6214 diff -Nur linux-2.4.30/arch/mips/defconfig-ev96100 linux-2.4.30-mips/arch/mips/defconfig-ev96100
6215 --- linux-2.4.30/arch/mips/defconfig-ev96100 2005-01-19 15:09:28.000000000 +0100
6216 +++ linux-2.4.30-mips/arch/mips/defconfig-ev96100 2005-03-18 13:13:21.000000000 +0100
6217 @@ -30,8 +30,8 @@
6218 # CONFIG_MIPS_PB1000 is not set
6219 # CONFIG_MIPS_PB1100 is not set
6220 # CONFIG_MIPS_PB1500 is not set
6221 -# CONFIG_MIPS_HYDROGEN3 is not set
6222 # CONFIG_MIPS_PB1550 is not set
6223 +# CONFIG_MIPS_HYDROGEN3 is not set
6224 # CONFIG_MIPS_XXS1500 is not set
6225 # CONFIG_MIPS_MTX1 is not set
6226 # CONFIG_COGENT_CSB250 is not set
6227 @@ -232,11 +232,6 @@
6228 #
6229 # CONFIG_IPX is not set
6230 # CONFIG_ATALK is not set
6231 -
6232 -#
6233 -# Appletalk devices
6234 -#
6235 -# CONFIG_DEV_APPLETALK is not set
6236 # CONFIG_DECNET is not set
6237 # CONFIG_BRIDGE is not set
6238 # CONFIG_X25 is not set
6239 @@ -441,7 +436,6 @@
6240 CONFIG_SERIAL_CONSOLE=y
6241 # CONFIG_SERIAL_EXTENDED is not set
6242 # CONFIG_SERIAL_NONSTANDARD is not set
6243 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
6244 CONFIG_UNIX98_PTYS=y
6245 CONFIG_UNIX98_PTY_COUNT=256
6246
6247 diff -Nur linux-2.4.30/arch/mips/defconfig-ficmmp linux-2.4.30-mips/arch/mips/defconfig-ficmmp
6248 --- linux-2.4.30/arch/mips/defconfig-ficmmp 1970-01-01 01:00:00.000000000 +0100
6249 +++ linux-2.4.30-mips/arch/mips/defconfig-ficmmp 2005-03-18 13:13:21.000000000 +0100
6250 @@ -0,0 +1,862 @@
6251 +#
6252 +# Automatically generated make config: don't edit
6253 +#
6254 +CONFIG_MIPS=y
6255 +CONFIG_MIPS32=y
6256 +# CONFIG_MIPS64 is not set
6257 +
6258 +#
6259 +# Code maturity level options
6260 +#
6261 +CONFIG_EXPERIMENTAL=y
6262 +
6263 +#
6264 +# Loadable module support
6265 +#
6266 +CONFIG_MODULES=y
6267 +# CONFIG_MODVERSIONS is not set
6268 +CONFIG_KMOD=y
6269 +
6270 +#
6271 +# Machine selection
6272 +#
6273 +# CONFIG_ACER_PICA_61 is not set
6274 +# CONFIG_MIPS_BOSPORUS is not set
6275 +# CONFIG_MIPS_MIRAGE is not set
6276 +# CONFIG_MIPS_DB1000 is not set
6277 +# CONFIG_MIPS_DB1100 is not set
6278 +# CONFIG_MIPS_DB1500 is not set
6279 +# CONFIG_MIPS_DB1550 is not set
6280 +# CONFIG_MIPS_PB1000 is not set
6281 +# CONFIG_MIPS_PB1100 is not set
6282 +# CONFIG_MIPS_PB1500 is not set
6283 +# CONFIG_MIPS_PB1550 is not set
6284 +# CONFIG_MIPS_HYDROGEN3 is not set
6285 +# CONFIG_MIPS_XXS1500 is not set
6286 +# CONFIG_MIPS_MTX1 is not set
6287 +# CONFIG_COGENT_CSB250 is not set
6288 +# CONFIG_BAGET_MIPS is not set
6289 +# CONFIG_CASIO_E55 is not set
6290 +# CONFIG_MIPS_COBALT is not set
6291 +# CONFIG_DECSTATION is not set
6292 +# CONFIG_MIPS_EV64120 is not set
6293 +# CONFIG_MIPS_EV96100 is not set
6294 +# CONFIG_MIPS_IVR is not set
6295 +# CONFIG_HP_LASERJET is not set
6296 +# CONFIG_IBM_WORKPAD is not set
6297 +# CONFIG_LASAT is not set
6298 +# CONFIG_MIPS_ITE8172 is not set
6299 +# CONFIG_MIPS_ATLAS is not set
6300 +# CONFIG_MIPS_MAGNUM_4000 is not set
6301 +# CONFIG_MIPS_MALTA is not set
6302 +# CONFIG_MIPS_SEAD is not set
6303 +# CONFIG_MOMENCO_OCELOT is not set
6304 +# CONFIG_MOMENCO_OCELOT_G is not set
6305 +# CONFIG_MOMENCO_OCELOT_C is not set
6306 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
6307 +# CONFIG_PMC_BIG_SUR is not set
6308 +# CONFIG_PMC_STRETCH is not set
6309 +# CONFIG_PMC_YOSEMITE is not set
6310 +# CONFIG_DDB5074 is not set
6311 +# CONFIG_DDB5476 is not set
6312 +# CONFIG_DDB5477 is not set
6313 +# CONFIG_NEC_OSPREY is not set
6314 +# CONFIG_NEC_EAGLE is not set
6315 +# CONFIG_OLIVETTI_M700 is not set
6316 +# CONFIG_NINO is not set
6317 +# CONFIG_SGI_IP22 is not set
6318 +# CONFIG_SGI_IP27 is not set
6319 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
6320 +# CONFIG_SNI_RM200_PCI is not set
6321 +# CONFIG_TANBAC_TB0226 is not set
6322 +# CONFIG_TANBAC_TB0229 is not set
6323 +# CONFIG_TOSHIBA_JMR3927 is not set
6324 +# CONFIG_TOSHIBA_RBTX4927 is not set
6325 +# CONFIG_VICTOR_MPC30X is not set
6326 +# CONFIG_ZAO_CAPCELLA is not set
6327 +# CONFIG_HIGHMEM is not set
6328 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
6329 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
6330 +# CONFIG_MIPS_AU1000 is not set
6331 +
6332 +#
6333 +# CPU selection
6334 +#
6335 +CONFIG_CPU_MIPS32=y
6336 +# CONFIG_CPU_MIPS64 is not set
6337 +# CONFIG_CPU_R3000 is not set
6338 +# CONFIG_CPU_TX39XX is not set
6339 +# CONFIG_CPU_VR41XX is not set
6340 +# CONFIG_CPU_R4300 is not set
6341 +# CONFIG_CPU_R4X00 is not set
6342 +# CONFIG_CPU_TX49XX is not set
6343 +# CONFIG_CPU_R5000 is not set
6344 +# CONFIG_CPU_R5432 is not set
6345 +# CONFIG_CPU_R6000 is not set
6346 +# CONFIG_CPU_NEVADA is not set
6347 +# CONFIG_CPU_R8000 is not set
6348 +# CONFIG_CPU_R10000 is not set
6349 +# CONFIG_CPU_RM7000 is not set
6350 +# CONFIG_CPU_RM9000 is not set
6351 +# CONFIG_CPU_SB1 is not set
6352 +CONFIG_PAGE_SIZE_4KB=y
6353 +# CONFIG_PAGE_SIZE_16KB is not set
6354 +# CONFIG_PAGE_SIZE_64KB is not set
6355 +CONFIG_CPU_HAS_PREFETCH=y
6356 +# CONFIG_VTAG_ICACHE is not set
6357 +CONFIG_64BIT_PHYS_ADDR=y
6358 +# CONFIG_CPU_ADVANCED is not set
6359 +CONFIG_CPU_HAS_LLSC=y
6360 +# CONFIG_CPU_HAS_LLDSCD is not set
6361 +# CONFIG_CPU_HAS_WB is not set
6362 +CONFIG_CPU_HAS_SYNC=y
6363 +
6364 +#
6365 +# General setup
6366 +#
6367 +CONFIG_CPU_LITTLE_ENDIAN=y
6368 +# CONFIG_BUILD_ELF64 is not set
6369 +CONFIG_NET=y
6370 +# CONFIG_PCI is not set
6371 +# CONFIG_PCI_NEW is not set
6372 +CONFIG_PCI_AUTO=y
6373 +# CONFIG_ISA is not set
6374 +# CONFIG_TC is not set
6375 +# CONFIG_MCA is not set
6376 +# CONFIG_SBUS is not set
6377 +# CONFIG_HOTPLUG is not set
6378 +# CONFIG_PCMCIA is not set
6379 +# CONFIG_HOTPLUG_PCI is not set
6380 +CONFIG_SYSVIPC=y
6381 +# CONFIG_BSD_PROCESS_ACCT is not set
6382 +CONFIG_SYSCTL=y
6383 +CONFIG_KCORE_ELF=y
6384 +# CONFIG_KCORE_AOUT is not set
6385 +# CONFIG_BINFMT_AOUT is not set
6386 +CONFIG_BINFMT_ELF=y
6387 +# CONFIG_MIPS32_COMPAT is not set
6388 +# CONFIG_MIPS32_O32 is not set
6389 +# CONFIG_MIPS32_N32 is not set
6390 +# CONFIG_BINFMT_ELF32 is not set
6391 +# CONFIG_BINFMT_MISC is not set
6392 +# CONFIG_OOM_KILLER is not set
6393 +CONFIG_CMDLINE_BOOL=y
6394 +CONFIG_CMDLINE="ide3=dma mem=96M root=/dev/hda2 rootflags=data=journal"
6395 +
6396 +#
6397 +# Memory Technology Devices (MTD)
6398 +#
6399 +# CONFIG_MTD is not set
6400 +
6401 +#
6402 +# Parallel port support
6403 +#
6404 +# CONFIG_PARPORT is not set
6405 +
6406 +#
6407 +# Plug and Play configuration
6408 +#
6409 +# CONFIG_PNP is not set
6410 +# CONFIG_ISAPNP is not set
6411 +
6412 +#
6413 +# Block devices
6414 +#
6415 +# CONFIG_BLK_DEV_FD is not set
6416 +# CONFIG_BLK_DEV_XD is not set
6417 +# CONFIG_PARIDE is not set
6418 +# CONFIG_BLK_CPQ_DA is not set
6419 +# CONFIG_BLK_CPQ_CISS_DA is not set
6420 +# CONFIG_CISS_SCSI_TAPE is not set
6421 +# CONFIG_CISS_MONITOR_THREAD is not set
6422 +# CONFIG_BLK_DEV_DAC960 is not set
6423 +# CONFIG_BLK_DEV_UMEM is not set
6424 +# CONFIG_BLK_DEV_SX8 is not set
6425 +CONFIG_BLK_DEV_LOOP=y
6426 +# CONFIG_BLK_DEV_NBD is not set
6427 +# CONFIG_BLK_DEV_RAM is not set
6428 +# CONFIG_BLK_DEV_INITRD is not set
6429 +# CONFIG_BLK_STATS is not set
6430 +
6431 +#
6432 +# Multi-device support (RAID and LVM)
6433 +#
6434 +# CONFIG_MD is not set
6435 +# CONFIG_BLK_DEV_MD is not set
6436 +# CONFIG_MD_LINEAR is not set
6437 +# CONFIG_MD_RAID0 is not set
6438 +# CONFIG_MD_RAID1 is not set
6439 +# CONFIG_MD_RAID5 is not set
6440 +# CONFIG_MD_MULTIPATH is not set
6441 +# CONFIG_BLK_DEV_LVM is not set
6442 +
6443 +#
6444 +# Networking options
6445 +#
6446 +CONFIG_PACKET=y
6447 +# CONFIG_PACKET_MMAP is not set
6448 +# CONFIG_NETLINK_DEV is not set
6449 +CONFIG_NETFILTER=y
6450 +# CONFIG_NETFILTER_DEBUG is not set
6451 +CONFIG_FILTER=y
6452 +CONFIG_UNIX=y
6453 +CONFIG_INET=y
6454 +CONFIG_IP_MULTICAST=y
6455 +# CONFIG_IP_ADVANCED_ROUTER is not set
6456 +# CONFIG_IP_PNP is not set
6457 +# CONFIG_NET_IPIP is not set
6458 +# CONFIG_NET_IPGRE is not set
6459 +# CONFIG_IP_MROUTE is not set
6460 +# CONFIG_ARPD is not set
6461 +# CONFIG_INET_ECN is not set
6462 +# CONFIG_SYN_COOKIES is not set
6463 +
6464 +#
6465 +# IP: Netfilter Configuration
6466 +#
6467 +# CONFIG_IP_NF_CONNTRACK is not set
6468 +# CONFIG_IP_NF_QUEUE is not set
6469 +# CONFIG_IP_NF_IPTABLES is not set
6470 +# CONFIG_IP_NF_ARPTABLES is not set
6471 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
6472 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
6473 +
6474 +#
6475 +# IP: Virtual Server Configuration
6476 +#
6477 +# CONFIG_IP_VS is not set
6478 +# CONFIG_IPV6 is not set
6479 +# CONFIG_KHTTPD is not set
6480 +
6481 +#
6482 +# SCTP Configuration (EXPERIMENTAL)
6483 +#
6484 +# CONFIG_IP_SCTP is not set
6485 +# CONFIG_ATM is not set
6486 +# CONFIG_VLAN_8021Q is not set
6487 +
6488 +#
6489 +#
6490 +#
6491 +# CONFIG_IPX is not set
6492 +# CONFIG_ATALK is not set
6493 +# CONFIG_DECNET is not set
6494 +# CONFIG_BRIDGE is not set
6495 +# CONFIG_X25 is not set
6496 +# CONFIG_LAPB is not set
6497 +# CONFIG_LLC is not set
6498 +# CONFIG_NET_DIVERT is not set
6499 +# CONFIG_ECONET is not set
6500 +# CONFIG_WAN_ROUTER is not set
6501 +# CONFIG_NET_FASTROUTE is not set
6502 +# CONFIG_NET_HW_FLOWCONTROL is not set
6503 +
6504 +#
6505 +# QoS and/or fair queueing
6506 +#
6507 +# CONFIG_NET_SCHED is not set
6508 +
6509 +#
6510 +# Network testing
6511 +#
6512 +# CONFIG_NET_PKTGEN is not set
6513 +
6514 +#
6515 +# Telephony Support
6516 +#
6517 +# CONFIG_PHONE is not set
6518 +# CONFIG_PHONE_IXJ is not set
6519 +# CONFIG_PHONE_IXJ_PCMCIA is not set
6520 +
6521 +#
6522 +# ATA/IDE/MFM/RLL support
6523 +#
6524 +CONFIG_IDE=y
6525 +
6526 +#
6527 +# IDE, ATA and ATAPI Block devices
6528 +#
6529 +CONFIG_BLK_DEV_IDE=y
6530 +
6531 +#
6532 +# Please see Documentation/ide.txt for help/info on IDE drives
6533 +#
6534 +CONFIG_BLK_DEV_HD_IDE=y
6535 +CONFIG_BLK_DEV_HD=y
6536 +# CONFIG_BLK_DEV_IDE_SATA is not set
6537 +CONFIG_BLK_DEV_IDEDISK=y
6538 +CONFIG_IDEDISK_MULTI_MODE=y
6539 +CONFIG_IDEDISK_STROKE=y
6540 +# CONFIG_BLK_DEV_IDECS is not set
6541 +# CONFIG_BLK_DEV_DELKIN is not set
6542 +# CONFIG_BLK_DEV_IDECD is not set
6543 +# CONFIG_BLK_DEV_IDETAPE is not set
6544 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
6545 +# CONFIG_BLK_DEV_IDESCSI is not set
6546 +# CONFIG_IDE_TASK_IOCTL is not set
6547 +
6548 +#
6549 +# IDE chipset support/bugfixes
6550 +#
6551 +# CONFIG_BLK_DEV_CMD640 is not set
6552 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
6553 +# CONFIG_BLK_DEV_ISAPNP is not set
6554 +# CONFIG_IDE_CHIPSETS is not set
6555 +# CONFIG_IDEDMA_AUTO is not set
6556 +# CONFIG_DMA_NONPCI is not set
6557 +# CONFIG_BLK_DEV_ATARAID is not set
6558 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
6559 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
6560 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
6561 +# CONFIG_BLK_DEV_ATARAID_SII is not set
6562 +
6563 +#
6564 +# SCSI support
6565 +#
6566 +CONFIG_SCSI=y
6567 +
6568 +#
6569 +# SCSI support type (disk, tape, CD-ROM)
6570 +#
6571 +CONFIG_BLK_DEV_SD=y
6572 +CONFIG_SD_EXTRA_DEVS=40
6573 +CONFIG_CHR_DEV_ST=y
6574 +# CONFIG_CHR_DEV_OSST is not set
6575 +CONFIG_BLK_DEV_SR=y
6576 +# CONFIG_BLK_DEV_SR_VENDOR is not set
6577 +CONFIG_SR_EXTRA_DEVS=2
6578 +# CONFIG_CHR_DEV_SG is not set
6579 +
6580 +#
6581 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
6582 +#
6583 +# CONFIG_SCSI_DEBUG_QUEUES is not set
6584 +# CONFIG_SCSI_MULTI_LUN is not set
6585 +CONFIG_SCSI_CONSTANTS=y
6586 +# CONFIG_SCSI_LOGGING is not set
6587 +
6588 +#
6589 +# SCSI low-level drivers
6590 +#
6591 +# CONFIG_SCSI_7000FASST is not set
6592 +# CONFIG_SCSI_ACARD is not set
6593 +# CONFIG_SCSI_AHA152X is not set
6594 +# CONFIG_SCSI_AHA1542 is not set
6595 +# CONFIG_SCSI_AHA1740 is not set
6596 +# CONFIG_SCSI_AACRAID is not set
6597 +# CONFIG_SCSI_AIC7XXX is not set
6598 +# CONFIG_SCSI_AIC79XX is not set
6599 +# CONFIG_SCSI_AIC7XXX_OLD is not set
6600 +# CONFIG_SCSI_DPT_I2O is not set
6601 +# CONFIG_SCSI_ADVANSYS is not set
6602 +# CONFIG_SCSI_IN2000 is not set
6603 +# CONFIG_SCSI_AM53C974 is not set
6604 +# CONFIG_SCSI_MEGARAID is not set
6605 +# CONFIG_SCSI_MEGARAID2 is not set
6606 +# CONFIG_SCSI_SATA is not set
6607 +# CONFIG_SCSI_SATA_AHCI is not set
6608 +# CONFIG_SCSI_SATA_SVW is not set
6609 +# CONFIG_SCSI_ATA_PIIX is not set
6610 +# CONFIG_SCSI_SATA_NV is not set
6611 +# CONFIG_SCSI_SATA_QSTOR is not set
6612 +# CONFIG_SCSI_SATA_PROMISE is not set
6613 +# CONFIG_SCSI_SATA_SX4 is not set
6614 +# CONFIG_SCSI_SATA_SIL is not set
6615 +# CONFIG_SCSI_SATA_SIS is not set
6616 +# CONFIG_SCSI_SATA_ULI is not set
6617 +# CONFIG_SCSI_SATA_VIA is not set
6618 +# CONFIG_SCSI_SATA_VITESSE is not set
6619 +# CONFIG_SCSI_BUSLOGIC is not set
6620 +# CONFIG_SCSI_DMX3191D is not set
6621 +# CONFIG_SCSI_DTC3280 is not set
6622 +# CONFIG_SCSI_EATA is not set
6623 +# CONFIG_SCSI_EATA_DMA is not set
6624 +# CONFIG_SCSI_EATA_PIO is not set
6625 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
6626 +# CONFIG_SCSI_GDTH is not set
6627 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
6628 +# CONFIG_SCSI_INITIO is not set
6629 +# CONFIG_SCSI_INIA100 is not set
6630 +# CONFIG_SCSI_NCR53C406A is not set
6631 +# CONFIG_SCSI_NCR53C7xx is not set
6632 +# CONFIG_SCSI_PAS16 is not set
6633 +# CONFIG_SCSI_PCI2000 is not set
6634 +# CONFIG_SCSI_PCI2220I is not set
6635 +# CONFIG_SCSI_PSI240I is not set
6636 +# CONFIG_SCSI_QLOGIC_FAS is not set
6637 +# CONFIG_SCSI_SIM710 is not set
6638 +# CONFIG_SCSI_SYM53C416 is not set
6639 +# CONFIG_SCSI_T128 is not set
6640 +# CONFIG_SCSI_U14_34F is not set
6641 +# CONFIG_SCSI_NSP32 is not set
6642 +# CONFIG_SCSI_DEBUG is not set
6643 +
6644 +#
6645 +# Fusion MPT device support
6646 +#
6647 +# CONFIG_FUSION is not set
6648 +# CONFIG_FUSION_BOOT is not set
6649 +# CONFIG_FUSION_ISENSE is not set
6650 +# CONFIG_FUSION_CTL is not set
6651 +# CONFIG_FUSION_LAN is not set
6652 +
6653 +#
6654 +# Network device support
6655 +#
6656 +CONFIG_NETDEVICES=y
6657 +
6658 +#
6659 +# ARCnet devices
6660 +#
6661 +# CONFIG_ARCNET is not set
6662 +# CONFIG_DUMMY is not set
6663 +# CONFIG_BONDING is not set
6664 +# CONFIG_EQUALIZER is not set
6665 +# CONFIG_TUN is not set
6666 +# CONFIG_ETHERTAP is not set
6667 +
6668 +#
6669 +# Ethernet (10 or 100Mbit)
6670 +#
6671 +CONFIG_NET_ETHERNET=y
6672 +# CONFIG_SUNLANCE is not set
6673 +# CONFIG_SUNBMAC is not set
6674 +# CONFIG_SUNQE is not set
6675 +# CONFIG_SUNGEM is not set
6676 +# CONFIG_NET_VENDOR_3COM is not set
6677 +# CONFIG_LANCE is not set
6678 +# CONFIG_NET_VENDOR_SMC is not set
6679 +# CONFIG_NET_VENDOR_RACAL is not set
6680 +# CONFIG_NET_ISA is not set
6681 +# CONFIG_NET_PCI is not set
6682 +# CONFIG_NET_POCKET is not set
6683 +
6684 +#
6685 +# Ethernet (1000 Mbit)
6686 +#
6687 +# CONFIG_ACENIC is not set
6688 +# CONFIG_DL2K is not set
6689 +# CONFIG_E1000 is not set
6690 +# CONFIG_MYRI_SBUS is not set
6691 +# CONFIG_NS83820 is not set
6692 +# CONFIG_HAMACHI is not set
6693 +# CONFIG_YELLOWFIN is not set
6694 +# CONFIG_R8169 is not set
6695 +# CONFIG_SK98LIN is not set
6696 +# CONFIG_TIGON3 is not set
6697 +# CONFIG_FDDI is not set
6698 +# CONFIG_HIPPI is not set
6699 +# CONFIG_PLIP is not set
6700 +# CONFIG_PPP is not set
6701 +# CONFIG_SLIP is not set
6702 +
6703 +#
6704 +# Wireless LAN (non-hamradio)
6705 +#
6706 +# CONFIG_NET_RADIO is not set
6707 +
6708 +#
6709 +# Token Ring devices
6710 +#
6711 +# CONFIG_TR is not set
6712 +# CONFIG_NET_FC is not set
6713 +# CONFIG_RCPCI is not set
6714 +# CONFIG_SHAPER is not set
6715 +
6716 +#
6717 +# Wan interfaces
6718 +#
6719 +# CONFIG_WAN is not set
6720 +
6721 +#
6722 +# Amateur Radio support
6723 +#
6724 +# CONFIG_HAMRADIO is not set
6725 +
6726 +#
6727 +# IrDA (infrared) support
6728 +#
6729 +# CONFIG_IRDA is not set
6730 +
6731 +#
6732 +# ISDN subsystem
6733 +#
6734 +# CONFIG_ISDN is not set
6735 +
6736 +#
6737 +# Input core support
6738 +#
6739 +CONFIG_INPUT=y
6740 +CONFIG_INPUT_KEYBDEV=y
6741 +CONFIG_INPUT_MOUSEDEV=y
6742 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
6743 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
6744 +# CONFIG_INPUT_JOYDEV is not set
6745 +CONFIG_INPUT_EVDEV=y
6746 +# CONFIG_INPUT_UINPUT is not set
6747 +
6748 +#
6749 +# Character devices
6750 +#
6751 +CONFIG_VT=y
6752 +CONFIG_VT_CONSOLE=y
6753 +# CONFIG_SERIAL is not set
6754 +# CONFIG_SERIAL_EXTENDED is not set
6755 +CONFIG_SERIAL_NONSTANDARD=y
6756 +# CONFIG_COMPUTONE is not set
6757 +# CONFIG_ROCKETPORT is not set
6758 +# CONFIG_CYCLADES is not set
6759 +# CONFIG_DIGIEPCA is not set
6760 +# CONFIG_DIGI is not set
6761 +# CONFIG_ESPSERIAL is not set
6762 +# CONFIG_MOXA_INTELLIO is not set
6763 +# CONFIG_MOXA_SMARTIO is not set
6764 +# CONFIG_ISI is not set
6765 +# CONFIG_SYNCLINK is not set
6766 +# CONFIG_SYNCLINKMP is not set
6767 +# CONFIG_N_HDLC is not set
6768 +# CONFIG_RISCOM8 is not set
6769 +# CONFIG_SPECIALIX is not set
6770 +# CONFIG_SX is not set
6771 +# CONFIG_RIO is not set
6772 +# CONFIG_STALDRV is not set
6773 +# CONFIG_SERIAL_TX3912 is not set
6774 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
6775 +# CONFIG_SERIAL_TXX9 is not set
6776 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
6777 +# CONFIG_TXX927_SERIAL is not set
6778 +CONFIG_UNIX98_PTYS=y
6779 +CONFIG_UNIX98_PTY_COUNT=256
6780 +
6781 +#
6782 +# I2C support
6783 +#
6784 +CONFIG_I2C=y
6785 +# CONFIG_I2C_ALGOBIT is not set
6786 +# CONFIG_SCx200_ACB is not set
6787 +# CONFIG_I2C_ALGOPCF is not set
6788 +# CONFIG_I2C_CHARDEV is not set
6789 +# CONFIG_I2C_PROC is not set
6790 +
6791 +#
6792 +# Mice
6793 +#
6794 +# CONFIG_BUSMOUSE is not set
6795 +# CONFIG_MOUSE is not set
6796 +
6797 +#
6798 +# Joysticks
6799 +#
6800 +# CONFIG_INPUT_GAMEPORT is not set
6801 +# CONFIG_INPUT_NS558 is not set
6802 +# CONFIG_INPUT_LIGHTNING is not set
6803 +# CONFIG_INPUT_PCIGAME is not set
6804 +# CONFIG_INPUT_CS461X is not set
6805 +# CONFIG_INPUT_EMU10K1 is not set
6806 +# CONFIG_INPUT_SERIO is not set
6807 +# CONFIG_INPUT_SERPORT is not set
6808 +
6809 +#
6810 +# Joysticks
6811 +#
6812 +# CONFIG_INPUT_ANALOG is not set
6813 +# CONFIG_INPUT_A3D is not set
6814 +# CONFIG_INPUT_ADI is not set
6815 +# CONFIG_INPUT_COBRA is not set
6816 +# CONFIG_INPUT_GF2K is not set
6817 +# CONFIG_INPUT_GRIP is not set
6818 +# CONFIG_INPUT_INTERACT is not set
6819 +# CONFIG_INPUT_TMDC is not set
6820 +# CONFIG_INPUT_SIDEWINDER is not set
6821 +# CONFIG_INPUT_IFORCE_USB is not set
6822 +# CONFIG_INPUT_IFORCE_232 is not set
6823 +# CONFIG_INPUT_WARRIOR is not set
6824 +# CONFIG_INPUT_MAGELLAN is not set
6825 +# CONFIG_INPUT_SPACEORB is not set
6826 +# CONFIG_INPUT_SPACEBALL is not set
6827 +# CONFIG_INPUT_STINGER is not set
6828 +# CONFIG_INPUT_DB9 is not set
6829 +# CONFIG_INPUT_GAMECON is not set
6830 +# CONFIG_INPUT_TURBOGRAFX is not set
6831 +# CONFIG_QIC02_TAPE is not set
6832 +# CONFIG_IPMI_HANDLER is not set
6833 +# CONFIG_IPMI_PANIC_EVENT is not set
6834 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
6835 +# CONFIG_IPMI_KCS is not set
6836 +# CONFIG_IPMI_WATCHDOG is not set
6837 +
6838 +#
6839 +# Watchdog Cards
6840 +#
6841 +# CONFIG_WATCHDOG is not set
6842 +# CONFIG_SCx200 is not set
6843 +# CONFIG_SCx200_GPIO is not set
6844 +# CONFIG_AMD_PM768 is not set
6845 +# CONFIG_NVRAM is not set
6846 +# CONFIG_RTC is not set
6847 +# CONFIG_DTLK is not set
6848 +# CONFIG_R3964 is not set
6849 +# CONFIG_APPLICOM is not set
6850 +
6851 +#
6852 +# Ftape, the floppy tape device driver
6853 +#
6854 +# CONFIG_FTAPE is not set
6855 +# CONFIG_AGP is not set
6856 +
6857 +#
6858 +# Direct Rendering Manager (XFree86 DRI support)
6859 +#
6860 +# CONFIG_DRM is not set
6861 +
6862 +#
6863 +# File systems
6864 +#
6865 +# CONFIG_QUOTA is not set
6866 +# CONFIG_QFMT_V2 is not set
6867 +CONFIG_AUTOFS_FS=y
6868 +# CONFIG_AUTOFS4_FS is not set
6869 +# CONFIG_REISERFS_FS is not set
6870 +# CONFIG_REISERFS_CHECK is not set
6871 +# CONFIG_REISERFS_PROC_INFO is not set
6872 +# CONFIG_ADFS_FS is not set
6873 +# CONFIG_ADFS_FS_RW is not set
6874 +# CONFIG_AFFS_FS is not set
6875 +# CONFIG_HFS_FS is not set
6876 +# CONFIG_HFSPLUS_FS is not set
6877 +# CONFIG_BEFS_FS is not set
6878 +# CONFIG_BEFS_DEBUG is not set
6879 +# CONFIG_BFS_FS is not set
6880 +CONFIG_EXT3_FS=y
6881 +CONFIG_JBD=y
6882 +# CONFIG_JBD_DEBUG is not set
6883 +CONFIG_FAT_FS=y
6884 +CONFIG_MSDOS_FS=y
6885 +# CONFIG_UMSDOS_FS is not set
6886 +CONFIG_VFAT_FS=y
6887 +# CONFIG_EFS_FS is not set
6888 +# CONFIG_JFFS_FS is not set
6889 +# CONFIG_JFFS2_FS is not set
6890 +# CONFIG_CRAMFS is not set
6891 +# CONFIG_TMPFS is not set
6892 +CONFIG_RAMFS=y
6893 +# CONFIG_ISO9660_FS is not set
6894 +# CONFIG_JOLIET is not set
6895 +# CONFIG_ZISOFS is not set
6896 +# CONFIG_JFS_FS is not set
6897 +# CONFIG_JFS_DEBUG is not set
6898 +# CONFIG_JFS_STATISTICS is not set
6899 +# CONFIG_MINIX_FS is not set
6900 +# CONFIG_VXFS_FS is not set
6901 +# CONFIG_NTFS_FS is not set
6902 +# CONFIG_NTFS_RW is not set
6903 +# CONFIG_HPFS_FS is not set
6904 +CONFIG_PROC_FS=y
6905 +# CONFIG_DEVFS_FS is not set
6906 +# CONFIG_DEVFS_MOUNT is not set
6907 +# CONFIG_DEVFS_DEBUG is not set
6908 +CONFIG_DEVPTS_FS=y
6909 +# CONFIG_QNX4FS_FS is not set
6910 +# CONFIG_QNX4FS_RW is not set
6911 +# CONFIG_ROMFS_FS is not set
6912 +CONFIG_EXT2_FS=y
6913 +# CONFIG_SYSV_FS is not set
6914 +# CONFIG_UDF_FS is not set
6915 +# CONFIG_UDF_RW is not set
6916 +# CONFIG_UFS_FS is not set
6917 +# CONFIG_UFS_FS_WRITE is not set
6918 +# CONFIG_XFS_FS is not set
6919 +# CONFIG_XFS_QUOTA is not set
6920 +# CONFIG_XFS_RT is not set
6921 +# CONFIG_XFS_TRACE is not set
6922 +# CONFIG_XFS_DEBUG is not set
6923 +
6924 +#
6925 +# Network File Systems
6926 +#
6927 +# CONFIG_CODA_FS is not set
6928 +# CONFIG_INTERMEZZO_FS is not set
6929 +# CONFIG_NFS_FS is not set
6930 +# CONFIG_NFS_V3 is not set
6931 +# CONFIG_NFS_DIRECTIO is not set
6932 +# CONFIG_ROOT_NFS is not set
6933 +# CONFIG_NFSD is not set
6934 +# CONFIG_NFSD_V3 is not set
6935 +# CONFIG_NFSD_TCP is not set
6936 +# CONFIG_SUNRPC is not set
6937 +# CONFIG_LOCKD is not set
6938 +# CONFIG_SMB_FS is not set
6939 +# CONFIG_NCP_FS is not set
6940 +# CONFIG_NCPFS_PACKET_SIGNING is not set
6941 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
6942 +# CONFIG_NCPFS_STRONG is not set
6943 +# CONFIG_NCPFS_NFS_NS is not set
6944 +# CONFIG_NCPFS_OS2_NS is not set
6945 +# CONFIG_NCPFS_SMALLDOS is not set
6946 +# CONFIG_NCPFS_NLS is not set
6947 +# CONFIG_NCPFS_EXTRAS is not set
6948 +# CONFIG_ZISOFS_FS is not set
6949 +
6950 +#
6951 +# Partition Types
6952 +#
6953 +# CONFIG_PARTITION_ADVANCED is not set
6954 +CONFIG_MSDOS_PARTITION=y
6955 +# CONFIG_SMB_NLS is not set
6956 +CONFIG_NLS=y
6957 +
6958 +#
6959 +# Native Language Support
6960 +#
6961 +CONFIG_NLS_DEFAULT="iso8859-1"
6962 +# CONFIG_NLS_CODEPAGE_437 is not set
6963 +# CONFIG_NLS_CODEPAGE_737 is not set
6964 +# CONFIG_NLS_CODEPAGE_775 is not set
6965 +# CONFIG_NLS_CODEPAGE_850 is not set
6966 +# CONFIG_NLS_CODEPAGE_852 is not set
6967 +# CONFIG_NLS_CODEPAGE_855 is not set
6968 +# CONFIG_NLS_CODEPAGE_857 is not set
6969 +# CONFIG_NLS_CODEPAGE_860 is not set
6970 +# CONFIG_NLS_CODEPAGE_861 is not set
6971 +# CONFIG_NLS_CODEPAGE_862 is not set
6972 +# CONFIG_NLS_CODEPAGE_863 is not set
6973 +# CONFIG_NLS_CODEPAGE_864 is not set
6974 +# CONFIG_NLS_CODEPAGE_865 is not set
6975 +# CONFIG_NLS_CODEPAGE_866 is not set
6976 +# CONFIG_NLS_CODEPAGE_869 is not set
6977 +# CONFIG_NLS_CODEPAGE_936 is not set
6978 +# CONFIG_NLS_CODEPAGE_950 is not set
6979 +# CONFIG_NLS_CODEPAGE_932 is not set
6980 +# CONFIG_NLS_CODEPAGE_949 is not set
6981 +# CONFIG_NLS_CODEPAGE_874 is not set
6982 +# CONFIG_NLS_ISO8859_8 is not set
6983 +# CONFIG_NLS_CODEPAGE_1250 is not set
6984 +# CONFIG_NLS_CODEPAGE_1251 is not set
6985 +# CONFIG_NLS_ISO8859_1 is not set
6986 +# CONFIG_NLS_ISO8859_2 is not set
6987 +# CONFIG_NLS_ISO8859_3 is not set
6988 +# CONFIG_NLS_ISO8859_4 is not set
6989 +# CONFIG_NLS_ISO8859_5 is not set
6990 +# CONFIG_NLS_ISO8859_6 is not set
6991 +# CONFIG_NLS_ISO8859_7 is not set
6992 +# CONFIG_NLS_ISO8859_9 is not set
6993 +# CONFIG_NLS_ISO8859_13 is not set
6994 +# CONFIG_NLS_ISO8859_14 is not set
6995 +# CONFIG_NLS_ISO8859_15 is not set
6996 +# CONFIG_NLS_KOI8_R is not set
6997 +# CONFIG_NLS_KOI8_U is not set
6998 +# CONFIG_NLS_UTF8 is not set
6999 +
7000 +#
7001 +# Multimedia devices
7002 +#
7003 +# CONFIG_VIDEO_DEV is not set
7004 +
7005 +#
7006 +# Console drivers
7007 +#
7008 +# CONFIG_VGA_CONSOLE is not set
7009 +# CONFIG_MDA_CONSOLE is not set
7010 +
7011 +#
7012 +# Frame-buffer support
7013 +#
7014 +CONFIG_FB=y
7015 +CONFIG_DUMMY_CONSOLE=y
7016 +# CONFIG_FB_CYBER2000 is not set
7017 +# CONFIG_FB_VIRTUAL is not set
7018 +CONFIG_FBCON_ADVANCED=y
7019 +# CONFIG_FBCON_MFB is not set
7020 +# CONFIG_FBCON_CFB2 is not set
7021 +# CONFIG_FBCON_CFB4 is not set
7022 +# CONFIG_FBCON_CFB8 is not set
7023 +CONFIG_FBCON_CFB16=y
7024 +# CONFIG_FBCON_CFB24 is not set
7025 +# CONFIG_FBCON_CFB32 is not set
7026 +# CONFIG_FBCON_AFB is not set
7027 +# CONFIG_FBCON_ILBM is not set
7028 +# CONFIG_FBCON_IPLAN2P2 is not set
7029 +# CONFIG_FBCON_IPLAN2P4 is not set
7030 +# CONFIG_FBCON_IPLAN2P8 is not set
7031 +# CONFIG_FBCON_MAC is not set
7032 +# CONFIG_FBCON_VGA_PLANES is not set
7033 +# CONFIG_FBCON_VGA is not set
7034 +# CONFIG_FBCON_HGA is not set
7035 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
7036 +CONFIG_FBCON_FONTS=y
7037 +CONFIG_FONT_8x8=y
7038 +CONFIG_FONT_8x16=y
7039 +# CONFIG_FONT_SUN8x16 is not set
7040 +# CONFIG_FONT_SUN12x22 is not set
7041 +# CONFIG_FONT_6x11 is not set
7042 +# CONFIG_FONT_PEARL_8x8 is not set
7043 +# CONFIG_FONT_ACORN_8x8 is not set
7044 +
7045 +#
7046 +# Sound
7047 +#
7048 +CONFIG_SOUND=y
7049 +# CONFIG_SOUND_ALI5455 is not set
7050 +# CONFIG_SOUND_BT878 is not set
7051 +# CONFIG_SOUND_CMPCI is not set
7052 +# CONFIG_SOUND_EMU10K1 is not set
7053 +# CONFIG_MIDI_EMU10K1 is not set
7054 +# CONFIG_SOUND_FUSION is not set
7055 +# CONFIG_SOUND_CS4281 is not set
7056 +# CONFIG_SOUND_ES1370 is not set
7057 +# CONFIG_SOUND_ES1371 is not set
7058 +# CONFIG_SOUND_ESSSOLO1 is not set
7059 +# CONFIG_SOUND_MAESTRO is not set
7060 +# CONFIG_SOUND_MAESTRO3 is not set
7061 +# CONFIG_SOUND_FORTE is not set
7062 +# CONFIG_SOUND_ICH is not set
7063 +# CONFIG_SOUND_RME96XX is not set
7064 +# CONFIG_SOUND_SONICVIBES is not set
7065 +# CONFIG_SOUND_TRIDENT is not set
7066 +# CONFIG_SOUND_MSNDCLAS is not set
7067 +# CONFIG_SOUND_MSNDPIN is not set
7068 +# CONFIG_SOUND_VIA82CXXX is not set
7069 +# CONFIG_MIDI_VIA82CXXX is not set
7070 +# CONFIG_SOUND_OSS is not set
7071 +# CONFIG_SOUND_TVMIXER is not set
7072 +# CONFIG_SOUND_AD1980 is not set
7073 +# CONFIG_SOUND_WM97XX is not set
7074 +
7075 +#
7076 +# USB support
7077 +#
7078 +# CONFIG_USB is not set
7079 +
7080 +#
7081 +# Support for USB gadgets
7082 +#
7083 +# CONFIG_USB_GADGET is not set
7084 +
7085 +#
7086 +# Bluetooth support
7087 +#
7088 +# CONFIG_BLUEZ is not set
7089 +
7090 +#
7091 +# Kernel hacking
7092 +#
7093 +CONFIG_CROSSCOMPILE=y
7094 +# CONFIG_RUNTIME_DEBUG is not set
7095 +# CONFIG_KGDB is not set
7096 +# CONFIG_GDB_CONSOLE is not set
7097 +# CONFIG_DEBUG_INFO is not set
7098 +# CONFIG_MAGIC_SYSRQ is not set
7099 +# CONFIG_MIPS_UNCACHED is not set
7100 +CONFIG_LOG_BUF_SHIFT=0
7101 +
7102 +#
7103 +# Cryptographic options
7104 +#
7105 +# CONFIG_CRYPTO is not set
7106 +
7107 +#
7108 +# Library routines
7109 +#
7110 +# CONFIG_CRC32 is not set
7111 +CONFIG_ZLIB_INFLATE=m
7112 +CONFIG_ZLIB_DEFLATE=m
7113 diff -Nur linux-2.4.30/arch/mips/defconfig-hp-lj linux-2.4.30-mips/arch/mips/defconfig-hp-lj
7114 --- linux-2.4.30/arch/mips/defconfig-hp-lj 2005-01-19 15:09:28.000000000 +0100
7115 +++ linux-2.4.30-mips/arch/mips/defconfig-hp-lj 2005-03-18 13:13:21.000000000 +0100
7116 @@ -30,8 +30,8 @@
7117 # CONFIG_MIPS_PB1000 is not set
7118 # CONFIG_MIPS_PB1100 is not set
7119 # CONFIG_MIPS_PB1500 is not set
7120 -# CONFIG_MIPS_HYDROGEN3 is not set
7121 # CONFIG_MIPS_PB1550 is not set
7122 +# CONFIG_MIPS_HYDROGEN3 is not set
7123 # CONFIG_MIPS_XXS1500 is not set
7124 # CONFIG_MIPS_MTX1 is not set
7125 # CONFIG_COGENT_CSB250 is not set
7126 @@ -184,8 +184,8 @@
7127 # Mapping drivers for chip access
7128 #
7129 CONFIG_MTD_PHYSMAP=y
7130 -CONFIG_MTD_PHYSMAP_START=10040000
7131 -CONFIG_MTD_PHYSMAP_LEN=00fc0000
7132 +CONFIG_MTD_PHYSMAP_START=0x10040000
7133 +CONFIG_MTD_PHYSMAP_LEN=0x00fc0000
7134 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
7135 # CONFIG_MTD_PB1000 is not set
7136 # CONFIG_MTD_PB1500 is not set
7137 @@ -193,9 +193,7 @@
7138 # CONFIG_MTD_BOSPORUS is not set
7139 # CONFIG_MTD_XXS1500 is not set
7140 # CONFIG_MTD_MTX1 is not set
7141 -# CONFIG_MTD_DB1X00 is not set
7142 # CONFIG_MTD_PB1550 is not set
7143 -# CONFIG_MTD_HYDROGEN3 is not set
7144 # CONFIG_MTD_MIRAGE is not set
7145 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7146 # CONFIG_MTD_OCELOT is not set
7147 @@ -214,7 +212,6 @@
7148 #
7149 # Disk-On-Chip Device Drivers
7150 #
7151 -# CONFIG_MTD_DOC1000 is not set
7152 # CONFIG_MTD_DOC2000 is not set
7153 # CONFIG_MTD_DOC2001 is not set
7154 # CONFIG_MTD_DOCPROBE is not set
7155 @@ -304,11 +301,6 @@
7156 #
7157 # CONFIG_IPX is not set
7158 # CONFIG_ATALK is not set
7159 -
7160 -#
7161 -# Appletalk devices
7162 -#
7163 -# CONFIG_DEV_APPLETALK is not set
7164 # CONFIG_DECNET is not set
7165 # CONFIG_BRIDGE is not set
7166 # CONFIG_X25 is not set
7167 @@ -604,7 +596,6 @@
7168 CONFIG_SERIAL_CONSOLE=y
7169 # CONFIG_SERIAL_EXTENDED is not set
7170 # CONFIG_SERIAL_NONSTANDARD is not set
7171 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7172 # CONFIG_UNIX98_PTYS is not set
7173
7174 #
7175 diff -Nur linux-2.4.30/arch/mips/defconfig-hydrogen3 linux-2.4.30-mips/arch/mips/defconfig-hydrogen3
7176 --- linux-2.4.30/arch/mips/defconfig-hydrogen3 2005-01-19 15:09:28.000000000 +0100
7177 +++ linux-2.4.30-mips/arch/mips/defconfig-hydrogen3 2005-03-18 13:13:21.000000000 +0100
7178 @@ -30,8 +30,8 @@
7179 # CONFIG_MIPS_PB1000 is not set
7180 # CONFIG_MIPS_PB1100 is not set
7181 # CONFIG_MIPS_PB1500 is not set
7182 -CONFIG_MIPS_HYDROGEN3=y
7183 # CONFIG_MIPS_PB1550 is not set
7184 +CONFIG_MIPS_HYDROGEN3=y
7185 # CONFIG_MIPS_XXS1500 is not set
7186 # CONFIG_MIPS_MTX1 is not set
7187 # CONFIG_COGENT_CSB250 is not set
7188 @@ -214,9 +214,7 @@
7189 # CONFIG_MTD_BOSPORUS is not set
7190 # CONFIG_MTD_XXS1500 is not set
7191 # CONFIG_MTD_MTX1 is not set
7192 -# CONFIG_MTD_DB1X00 is not set
7193 # CONFIG_MTD_PB1550 is not set
7194 -CONFIG_MTD_HYDROGEN3=y
7195 # CONFIG_MTD_MIRAGE is not set
7196 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7197 # CONFIG_MTD_OCELOT is not set
7198 @@ -235,7 +233,6 @@
7199 #
7200 # Disk-On-Chip Device Drivers
7201 #
7202 -# CONFIG_MTD_DOC1000 is not set
7203 # CONFIG_MTD_DOC2000 is not set
7204 # CONFIG_MTD_DOC2001 is not set
7205 # CONFIG_MTD_DOCPROBE is not set
7206 @@ -340,11 +337,6 @@
7207 #
7208 # CONFIG_IPX is not set
7209 # CONFIG_ATALK is not set
7210 -
7211 -#
7212 -# Appletalk devices
7213 -#
7214 -# CONFIG_DEV_APPLETALK is not set
7215 # CONFIG_DECNET is not set
7216 # CONFIG_BRIDGE is not set
7217 # CONFIG_X25 is not set
7218 @@ -590,7 +582,6 @@
7219 # CONFIG_AU1X00_USB_TTY is not set
7220 # CONFIG_AU1X00_USB_RAW is not set
7221 # CONFIG_TXX927_SERIAL is not set
7222 -CONFIG_MIPS_HYDROGEN3_BUTTONS=y
7223 CONFIG_UNIX98_PTYS=y
7224 CONFIG_UNIX98_PTY_COUNT=256
7225
7226 @@ -838,6 +829,7 @@
7227 # CONFIG_FB_PM2 is not set
7228 # CONFIG_FB_PM3 is not set
7229 # CONFIG_FB_CYBER2000 is not set
7230 +CONFIG_FB_AU1100=y
7231 # CONFIG_FB_MATROX is not set
7232 # CONFIG_FB_ATY is not set
7233 # CONFIG_FB_RADEON is not set
7234 @@ -849,7 +841,6 @@
7235 # CONFIG_FB_VOODOO1 is not set
7236 # CONFIG_FB_TRIDENT is not set
7237 # CONFIG_FB_E1356 is not set
7238 -CONFIG_FB_AU1100=y
7239 # CONFIG_FB_IT8181 is not set
7240 # CONFIG_FB_VIRTUAL is not set
7241 CONFIG_FBCON_ADVANCED=y
7242 diff -Nur linux-2.4.30/arch/mips/defconfig-ip22 linux-2.4.30-mips/arch/mips/defconfig-ip22
7243 --- linux-2.4.30/arch/mips/defconfig-ip22 2005-01-19 15:09:28.000000000 +0100
7244 +++ linux-2.4.30-mips/arch/mips/defconfig-ip22 2005-03-18 13:13:21.000000000 +0100
7245 @@ -30,8 +30,8 @@
7246 # CONFIG_MIPS_PB1000 is not set
7247 # CONFIG_MIPS_PB1100 is not set
7248 # CONFIG_MIPS_PB1500 is not set
7249 -# CONFIG_MIPS_HYDROGEN3 is not set
7250 # CONFIG_MIPS_PB1550 is not set
7251 +# CONFIG_MIPS_HYDROGEN3 is not set
7252 # CONFIG_MIPS_XXS1500 is not set
7253 # CONFIG_MIPS_MTX1 is not set
7254 # CONFIG_COGENT_CSB250 is not set
7255 @@ -235,11 +235,6 @@
7256 #
7257 # CONFIG_IPX is not set
7258 # CONFIG_ATALK is not set
7259 -
7260 -#
7261 -# Appletalk devices
7262 -#
7263 -# CONFIG_DEV_APPLETALK is not set
7264 # CONFIG_DECNET is not set
7265 # CONFIG_BRIDGE is not set
7266 # CONFIG_X25 is not set
7267 @@ -319,9 +314,11 @@
7268 # CONFIG_SCSI_MEGARAID is not set
7269 # CONFIG_SCSI_MEGARAID2 is not set
7270 # CONFIG_SCSI_SATA is not set
7271 +# CONFIG_SCSI_SATA_AHCI is not set
7272 # CONFIG_SCSI_SATA_SVW is not set
7273 # CONFIG_SCSI_ATA_PIIX is not set
7274 # CONFIG_SCSI_SATA_NV is not set
7275 +# CONFIG_SCSI_SATA_QSTOR is not set
7276 # CONFIG_SCSI_SATA_PROMISE is not set
7277 # CONFIG_SCSI_SATA_SX4 is not set
7278 # CONFIG_SCSI_SATA_SIL is not set
7279 @@ -465,7 +462,6 @@
7280 # CONFIG_SERIAL is not set
7281 # CONFIG_SERIAL_EXTENDED is not set
7282 # CONFIG_SERIAL_NONSTANDARD is not set
7283 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7284 CONFIG_UNIX98_PTYS=y
7285 CONFIG_UNIX98_PTY_COUNT=256
7286
7287 diff -Nur linux-2.4.30/arch/mips/defconfig-it8172 linux-2.4.30-mips/arch/mips/defconfig-it8172
7288 --- linux-2.4.30/arch/mips/defconfig-it8172 2005-01-19 15:09:28.000000000 +0100
7289 +++ linux-2.4.30-mips/arch/mips/defconfig-it8172 2005-03-18 13:13:21.000000000 +0100
7290 @@ -30,8 +30,8 @@
7291 # CONFIG_MIPS_PB1000 is not set
7292 # CONFIG_MIPS_PB1100 is not set
7293 # CONFIG_MIPS_PB1500 is not set
7294 -# CONFIG_MIPS_HYDROGEN3 is not set
7295 # CONFIG_MIPS_PB1550 is not set
7296 +# CONFIG_MIPS_HYDROGEN3 is not set
7297 # CONFIG_MIPS_XXS1500 is not set
7298 # CONFIG_MIPS_MTX1 is not set
7299 # CONFIG_COGENT_CSB250 is not set
7300 @@ -186,8 +186,8 @@
7301 # Mapping drivers for chip access
7302 #
7303 CONFIG_MTD_PHYSMAP=y
7304 -CONFIG_MTD_PHYSMAP_START=8000000
7305 -CONFIG_MTD_PHYSMAP_LEN=2000000
7306 +CONFIG_MTD_PHYSMAP_START=0x8000000
7307 +CONFIG_MTD_PHYSMAP_LEN=0x2000000
7308 CONFIG_MTD_PHYSMAP_BUSWIDTH=4
7309 # CONFIG_MTD_PB1000 is not set
7310 # CONFIG_MTD_PB1500 is not set
7311 @@ -195,9 +195,7 @@
7312 # CONFIG_MTD_BOSPORUS is not set
7313 # CONFIG_MTD_XXS1500 is not set
7314 # CONFIG_MTD_MTX1 is not set
7315 -# CONFIG_MTD_DB1X00 is not set
7316 # CONFIG_MTD_PB1550 is not set
7317 -# CONFIG_MTD_HYDROGEN3 is not set
7318 # CONFIG_MTD_MIRAGE is not set
7319 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7320 # CONFIG_MTD_OCELOT is not set
7321 @@ -216,7 +214,6 @@
7322 #
7323 # Disk-On-Chip Device Drivers
7324 #
7325 -# CONFIG_MTD_DOC1000 is not set
7326 # CONFIG_MTD_DOC2000 is not set
7327 # CONFIG_MTD_DOC2001 is not set
7328 # CONFIG_MTD_DOCPROBE is not set
7329 @@ -304,11 +301,6 @@
7330 #
7331 # CONFIG_IPX is not set
7332 # CONFIG_ATALK is not set
7333 -
7334 -#
7335 -# Appletalk devices
7336 -#
7337 -# CONFIG_DEV_APPLETALK is not set
7338 # CONFIG_DECNET is not set
7339 # CONFIG_BRIDGE is not set
7340 # CONFIG_X25 is not set
7341 @@ -592,7 +584,6 @@
7342 CONFIG_PC_KEYB=y
7343 # CONFIG_IT8172_SCR0 is not set
7344 # CONFIG_IT8172_SCR1 is not set
7345 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7346 CONFIG_UNIX98_PTYS=y
7347 CONFIG_UNIX98_PTY_COUNT=256
7348
7349 diff -Nur linux-2.4.30/arch/mips/defconfig-ivr linux-2.4.30-mips/arch/mips/defconfig-ivr
7350 --- linux-2.4.30/arch/mips/defconfig-ivr 2005-01-19 15:09:28.000000000 +0100
7351 +++ linux-2.4.30-mips/arch/mips/defconfig-ivr 2005-03-18 13:13:21.000000000 +0100
7352 @@ -30,8 +30,8 @@
7353 # CONFIG_MIPS_PB1000 is not set
7354 # CONFIG_MIPS_PB1100 is not set
7355 # CONFIG_MIPS_PB1500 is not set
7356 -# CONFIG_MIPS_HYDROGEN3 is not set
7357 # CONFIG_MIPS_PB1550 is not set
7358 +# CONFIG_MIPS_HYDROGEN3 is not set
7359 # CONFIG_MIPS_XXS1500 is not set
7360 # CONFIG_MIPS_MTX1 is not set
7361 # CONFIG_COGENT_CSB250 is not set
7362 @@ -226,11 +226,6 @@
7363 #
7364 # CONFIG_IPX is not set
7365 # CONFIG_ATALK is not set
7366 -
7367 -#
7368 -# Appletalk devices
7369 -#
7370 -# CONFIG_DEV_APPLETALK is not set
7371 # CONFIG_DECNET is not set
7372 # CONFIG_BRIDGE is not set
7373 # CONFIG_X25 is not set
7374 @@ -516,7 +511,6 @@
7375 CONFIG_QTRONIX_KEYBOARD=y
7376 CONFIG_IT8172_CIR=y
7377 # CONFIG_IT8172_SCR0 is not set
7378 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7379 CONFIG_UNIX98_PTYS=y
7380 CONFIG_UNIX98_PTY_COUNT=256
7381
7382 diff -Nur linux-2.4.30/arch/mips/defconfig-jmr3927 linux-2.4.30-mips/arch/mips/defconfig-jmr3927
7383 --- linux-2.4.30/arch/mips/defconfig-jmr3927 2005-01-19 15:09:28.000000000 +0100
7384 +++ linux-2.4.30-mips/arch/mips/defconfig-jmr3927 2005-03-18 13:13:21.000000000 +0100
7385 @@ -28,8 +28,8 @@
7386 # CONFIG_MIPS_PB1000 is not set
7387 # CONFIG_MIPS_PB1100 is not set
7388 # CONFIG_MIPS_PB1500 is not set
7389 -# CONFIG_MIPS_HYDROGEN3 is not set
7390 # CONFIG_MIPS_PB1550 is not set
7391 +# CONFIG_MIPS_HYDROGEN3 is not set
7392 # CONFIG_MIPS_XXS1500 is not set
7393 # CONFIG_MIPS_MTX1 is not set
7394 # CONFIG_COGENT_CSB250 is not set
7395 @@ -225,11 +225,6 @@
7396 #
7397 # CONFIG_IPX is not set
7398 # CONFIG_ATALK is not set
7399 -
7400 -#
7401 -# Appletalk devices
7402 -#
7403 -# CONFIG_DEV_APPLETALK is not set
7404 # CONFIG_DECNET is not set
7405 # CONFIG_BRIDGE is not set
7406 # CONFIG_X25 is not set
7407 @@ -454,7 +449,6 @@
7408 # CONFIG_SERIAL_TXX9_CONSOLE is not set
7409 CONFIG_TXX927_SERIAL=y
7410 CONFIG_TXX927_SERIAL_CONSOLE=y
7411 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7412 # CONFIG_UNIX98_PTYS is not set
7413
7414 #
7415 diff -Nur linux-2.4.30/arch/mips/defconfig-lasat linux-2.4.30-mips/arch/mips/defconfig-lasat
7416 --- linux-2.4.30/arch/mips/defconfig-lasat 2005-01-19 15:09:28.000000000 +0100
7417 +++ linux-2.4.30-mips/arch/mips/defconfig-lasat 2005-03-18 13:13:21.000000000 +0100
7418 @@ -30,8 +30,8 @@
7419 # CONFIG_MIPS_PB1000 is not set
7420 # CONFIG_MIPS_PB1100 is not set
7421 # CONFIG_MIPS_PB1500 is not set
7422 -# CONFIG_MIPS_HYDROGEN3 is not set
7423 # CONFIG_MIPS_PB1550 is not set
7424 +# CONFIG_MIPS_HYDROGEN3 is not set
7425 # CONFIG_MIPS_XXS1500 is not set
7426 # CONFIG_MIPS_MTX1 is not set
7427 # CONFIG_COGENT_CSB250 is not set
7428 @@ -198,9 +198,7 @@
7429 # CONFIG_MTD_BOSPORUS is not set
7430 # CONFIG_MTD_XXS1500 is not set
7431 # CONFIG_MTD_MTX1 is not set
7432 -# CONFIG_MTD_DB1X00 is not set
7433 # CONFIG_MTD_PB1550 is not set
7434 -# CONFIG_MTD_HYDROGEN3 is not set
7435 # CONFIG_MTD_MIRAGE is not set
7436 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7437 # CONFIG_MTD_OCELOT is not set
7438 @@ -219,7 +217,6 @@
7439 #
7440 # Disk-On-Chip Device Drivers
7441 #
7442 -# CONFIG_MTD_DOC1000 is not set
7443 # CONFIG_MTD_DOC2000 is not set
7444 # CONFIG_MTD_DOC2001 is not set
7445 # CONFIG_MTD_DOCPROBE is not set
7446 @@ -303,11 +300,6 @@
7447 #
7448 # CONFIG_IPX is not set
7449 # CONFIG_ATALK is not set
7450 -
7451 -#
7452 -# Appletalk devices
7453 -#
7454 -# CONFIG_DEV_APPLETALK is not set
7455 # CONFIG_DECNET is not set
7456 # CONFIG_BRIDGE is not set
7457 # CONFIG_X25 is not set
7458 @@ -584,7 +576,6 @@
7459 CONFIG_SERIAL_CONSOLE=y
7460 # CONFIG_SERIAL_EXTENDED is not set
7461 # CONFIG_SERIAL_NONSTANDARD is not set
7462 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7463 CONFIG_UNIX98_PTYS=y
7464 CONFIG_UNIX98_PTY_COUNT=256
7465
7466 diff -Nur linux-2.4.30/arch/mips/defconfig-malta linux-2.4.30-mips/arch/mips/defconfig-malta
7467 --- linux-2.4.30/arch/mips/defconfig-malta 2005-01-19 15:09:28.000000000 +0100
7468 +++ linux-2.4.30-mips/arch/mips/defconfig-malta 2005-03-18 13:13:21.000000000 +0100
7469 @@ -30,8 +30,8 @@
7470 # CONFIG_MIPS_PB1000 is not set
7471 # CONFIG_MIPS_PB1100 is not set
7472 # CONFIG_MIPS_PB1500 is not set
7473 -# CONFIG_MIPS_HYDROGEN3 is not set
7474 # CONFIG_MIPS_PB1550 is not set
7475 +# CONFIG_MIPS_HYDROGEN3 is not set
7476 # CONFIG_MIPS_XXS1500 is not set
7477 # CONFIG_MIPS_MTX1 is not set
7478 # CONFIG_COGENT_CSB250 is not set
7479 @@ -237,11 +237,6 @@
7480 #
7481 # CONFIG_IPX is not set
7482 # CONFIG_ATALK is not set
7483 -
7484 -#
7485 -# Appletalk devices
7486 -#
7487 -# CONFIG_DEV_APPLETALK is not set
7488 # CONFIG_DECNET is not set
7489 # CONFIG_BRIDGE is not set
7490 # CONFIG_X25 is not set
7491 @@ -319,9 +314,11 @@
7492 # CONFIG_SCSI_MEGARAID is not set
7493 # CONFIG_SCSI_MEGARAID2 is not set
7494 # CONFIG_SCSI_SATA is not set
7495 +# CONFIG_SCSI_SATA_AHCI is not set
7496 # CONFIG_SCSI_SATA_SVW is not set
7497 # CONFIG_SCSI_ATA_PIIX is not set
7498 # CONFIG_SCSI_SATA_NV is not set
7499 +# CONFIG_SCSI_SATA_QSTOR is not set
7500 # CONFIG_SCSI_SATA_PROMISE is not set
7501 # CONFIG_SCSI_SATA_SX4 is not set
7502 # CONFIG_SCSI_SATA_SIL is not set
7503 @@ -524,7 +521,6 @@
7504 CONFIG_SERIAL_CONSOLE=y
7505 # CONFIG_SERIAL_EXTENDED is not set
7506 # CONFIG_SERIAL_NONSTANDARD is not set
7507 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7508 CONFIG_UNIX98_PTYS=y
7509 CONFIG_UNIX98_PTY_COUNT=256
7510
7511 diff -Nur linux-2.4.30/arch/mips/defconfig-mirage linux-2.4.30-mips/arch/mips/defconfig-mirage
7512 --- linux-2.4.30/arch/mips/defconfig-mirage 2005-01-19 15:09:28.000000000 +0100
7513 +++ linux-2.4.30-mips/arch/mips/defconfig-mirage 2005-03-18 13:13:21.000000000 +0100
7514 @@ -30,8 +30,8 @@
7515 # CONFIG_MIPS_PB1000 is not set
7516 # CONFIG_MIPS_PB1100 is not set
7517 # CONFIG_MIPS_PB1500 is not set
7518 -# CONFIG_MIPS_HYDROGEN3 is not set
7519 # CONFIG_MIPS_PB1550 is not set
7520 +# CONFIG_MIPS_HYDROGEN3 is not set
7521 # CONFIG_MIPS_XXS1500 is not set
7522 # CONFIG_MIPS_MTX1 is not set
7523 # CONFIG_COGENT_CSB250 is not set
7524 @@ -209,9 +209,7 @@
7525 # CONFIG_MTD_BOSPORUS is not set
7526 # CONFIG_MTD_XXS1500 is not set
7527 # CONFIG_MTD_MTX1 is not set
7528 -# CONFIG_MTD_DB1X00 is not set
7529 # CONFIG_MTD_PB1550 is not set
7530 -# CONFIG_MTD_HYDROGEN3 is not set
7531 CONFIG_MTD_MIRAGE=y
7532 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7533 # CONFIG_MTD_OCELOT is not set
7534 @@ -230,7 +228,6 @@
7535 #
7536 # Disk-On-Chip Device Drivers
7537 #
7538 -# CONFIG_MTD_DOC1000 is not set
7539 # CONFIG_MTD_DOC2000 is not set
7540 # CONFIG_MTD_DOC2001 is not set
7541 # CONFIG_MTD_DOCPROBE is not set
7542 @@ -335,11 +332,6 @@
7543 #
7544 # CONFIG_IPX is not set
7545 # CONFIG_ATALK is not set
7546 -
7547 -#
7548 -# Appletalk devices
7549 -#
7550 -# CONFIG_DEV_APPLETALK is not set
7551 # CONFIG_DECNET is not set
7552 # CONFIG_BRIDGE is not set
7553 # CONFIG_X25 is not set
7554 @@ -560,7 +552,6 @@
7555 # CONFIG_AU1X00_USB_TTY is not set
7556 # CONFIG_AU1X00_USB_RAW is not set
7557 # CONFIG_TXX927_SERIAL is not set
7558 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7559 CONFIG_UNIX98_PTYS=y
7560 CONFIG_UNIX98_PTY_COUNT=256
7561
7562 diff -Nur linux-2.4.30/arch/mips/defconfig-mpc30x linux-2.4.30-mips/arch/mips/defconfig-mpc30x
7563 --- linux-2.4.30/arch/mips/defconfig-mpc30x 2005-01-19 15:09:28.000000000 +0100
7564 +++ linux-2.4.30-mips/arch/mips/defconfig-mpc30x 2005-03-18 13:13:21.000000000 +0100
7565 @@ -30,8 +30,8 @@
7566 # CONFIG_MIPS_PB1000 is not set
7567 # CONFIG_MIPS_PB1100 is not set
7568 # CONFIG_MIPS_PB1500 is not set
7569 -# CONFIG_MIPS_HYDROGEN3 is not set
7570 # CONFIG_MIPS_PB1550 is not set
7571 +# CONFIG_MIPS_HYDROGEN3 is not set
7572 # CONFIG_MIPS_XXS1500 is not set
7573 # CONFIG_MIPS_MTX1 is not set
7574 # CONFIG_COGENT_CSB250 is not set
7575 @@ -228,11 +228,6 @@
7576 #
7577 # CONFIG_IPX is not set
7578 # CONFIG_ATALK is not set
7579 -
7580 -#
7581 -# Appletalk devices
7582 -#
7583 -# CONFIG_DEV_APPLETALK is not set
7584 # CONFIG_DECNET is not set
7585 # CONFIG_BRIDGE is not set
7586 # CONFIG_X25 is not set
7587 @@ -400,7 +395,6 @@
7588 CONFIG_SERIAL_CONSOLE=y
7589 # CONFIG_SERIAL_EXTENDED is not set
7590 # CONFIG_SERIAL_NONSTANDARD is not set
7591 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7592 # CONFIG_VR41XX_KIU is not set
7593 CONFIG_UNIX98_PTYS=y
7594 CONFIG_UNIX98_PTY_COUNT=256
7595 diff -Nur linux-2.4.30/arch/mips/defconfig-mtx-1 linux-2.4.30-mips/arch/mips/defconfig-mtx-1
7596 --- linux-2.4.30/arch/mips/defconfig-mtx-1 2005-01-19 15:09:28.000000000 +0100
7597 +++ linux-2.4.30-mips/arch/mips/defconfig-mtx-1 2005-03-18 13:13:21.000000000 +0100
7598 @@ -30,8 +30,8 @@
7599 # CONFIG_MIPS_PB1000 is not set
7600 # CONFIG_MIPS_PB1100 is not set
7601 # CONFIG_MIPS_PB1500 is not set
7602 -# CONFIG_MIPS_HYDROGEN3 is not set
7603 # CONFIG_MIPS_PB1550 is not set
7604 +# CONFIG_MIPS_HYDROGEN3 is not set
7605 # CONFIG_MIPS_XXS1500 is not set
7606 CONFIG_MIPS_MTX1=y
7607 # CONFIG_COGENT_CSB250 is not set
7608 @@ -193,9 +193,7 @@
7609 # CONFIG_MTD_BOSPORUS is not set
7610 # CONFIG_MTD_XXS1500 is not set
7611 CONFIG_MTD_MTX1=y
7612 -# CONFIG_MTD_DB1X00 is not set
7613 # CONFIG_MTD_PB1550 is not set
7614 -# CONFIG_MTD_HYDROGEN3 is not set
7615 # CONFIG_MTD_MIRAGE is not set
7616 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7617 # CONFIG_MTD_OCELOT is not set
7618 @@ -214,7 +212,6 @@
7619 #
7620 # Disk-On-Chip Device Drivers
7621 #
7622 -# CONFIG_MTD_DOC1000 is not set
7623 # CONFIG_MTD_DOC2000 is not set
7624 # CONFIG_MTD_DOC2001 is not set
7625 # CONFIG_MTD_DOCPROBE is not set
7626 @@ -371,11 +368,6 @@
7627 #
7628 # CONFIG_IPX is not set
7629 # CONFIG_ATALK is not set
7630 -
7631 -#
7632 -# Appletalk devices
7633 -#
7634 -# CONFIG_DEV_APPLETALK is not set
7635 # CONFIG_DECNET is not set
7636 CONFIG_BRIDGE=m
7637 # CONFIG_X25 is not set
7638 @@ -479,9 +471,11 @@
7639 # CONFIG_SCSI_MEGARAID is not set
7640 # CONFIG_SCSI_MEGARAID2 is not set
7641 # CONFIG_SCSI_SATA is not set
7642 +# CONFIG_SCSI_SATA_AHCI is not set
7643 # CONFIG_SCSI_SATA_SVW is not set
7644 # CONFIG_SCSI_ATA_PIIX is not set
7645 # CONFIG_SCSI_SATA_NV is not set
7646 +# CONFIG_SCSI_SATA_QSTOR is not set
7647 # CONFIG_SCSI_SATA_PROMISE is not set
7648 # CONFIG_SCSI_SATA_SX4 is not set
7649 # CONFIG_SCSI_SATA_SIL is not set
7650 @@ -700,7 +694,6 @@
7651 # CONFIG_AU1X00_USB_TTY is not set
7652 # CONFIG_AU1X00_USB_RAW is not set
7653 # CONFIG_TXX927_SERIAL is not set
7654 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7655 CONFIG_UNIX98_PTYS=y
7656 CONFIG_UNIX98_PTY_COUNT=256
7657
7658 diff -Nur linux-2.4.30/arch/mips/defconfig-nino linux-2.4.30-mips/arch/mips/defconfig-nino
7659 --- linux-2.4.30/arch/mips/defconfig-nino 2005-01-19 15:09:28.000000000 +0100
7660 +++ linux-2.4.30-mips/arch/mips/defconfig-nino 2005-03-18 13:13:21.000000000 +0100
7661 @@ -30,8 +30,8 @@
7662 # CONFIG_MIPS_PB1000 is not set
7663 # CONFIG_MIPS_PB1100 is not set
7664 # CONFIG_MIPS_PB1500 is not set
7665 -# CONFIG_MIPS_HYDROGEN3 is not set
7666 # CONFIG_MIPS_PB1550 is not set
7667 +# CONFIG_MIPS_HYDROGEN3 is not set
7668 # CONFIG_MIPS_XXS1500 is not set
7669 # CONFIG_MIPS_MTX1 is not set
7670 # CONFIG_COGENT_CSB250 is not set
7671 @@ -226,11 +226,6 @@
7672 #
7673 # CONFIG_IPX is not set
7674 # CONFIG_ATALK is not set
7675 -
7676 -#
7677 -# Appletalk devices
7678 -#
7679 -# CONFIG_DEV_APPLETALK is not set
7680 # CONFIG_DECNET is not set
7681 # CONFIG_BRIDGE is not set
7682 # CONFIG_X25 is not set
7683 @@ -339,7 +334,6 @@
7684 # CONFIG_SERIAL_TXX9 is not set
7685 # CONFIG_SERIAL_TXX9_CONSOLE is not set
7686 # CONFIG_TXX927_SERIAL is not set
7687 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7688 # CONFIG_UNIX98_PTYS is not set
7689
7690 #
7691 diff -Nur linux-2.4.30/arch/mips/defconfig-ocelot linux-2.4.30-mips/arch/mips/defconfig-ocelot
7692 --- linux-2.4.30/arch/mips/defconfig-ocelot 2005-01-19 15:09:28.000000000 +0100
7693 +++ linux-2.4.30-mips/arch/mips/defconfig-ocelot 2005-03-18 13:13:21.000000000 +0100
7694 @@ -28,8 +28,8 @@
7695 # CONFIG_MIPS_PB1000 is not set
7696 # CONFIG_MIPS_PB1100 is not set
7697 # CONFIG_MIPS_PB1500 is not set
7698 -# CONFIG_MIPS_HYDROGEN3 is not set
7699 # CONFIG_MIPS_PB1550 is not set
7700 +# CONFIG_MIPS_HYDROGEN3 is not set
7701 # CONFIG_MIPS_XXS1500 is not set
7702 # CONFIG_MIPS_MTX1 is not set
7703 # CONFIG_COGENT_CSB250 is not set
7704 @@ -194,9 +194,7 @@
7705 # CONFIG_MTD_BOSPORUS is not set
7706 # CONFIG_MTD_XXS1500 is not set
7707 # CONFIG_MTD_MTX1 is not set
7708 -# CONFIG_MTD_DB1X00 is not set
7709 # CONFIG_MTD_PB1550 is not set
7710 -# CONFIG_MTD_HYDROGEN3 is not set
7711 # CONFIG_MTD_MIRAGE is not set
7712 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7713 CONFIG_MTD_OCELOT=y
7714 @@ -215,7 +213,6 @@
7715 #
7716 # Disk-On-Chip Device Drivers
7717 #
7718 -# CONFIG_MTD_DOC1000 is not set
7719 CONFIG_MTD_DOC2000=y
7720 # CONFIG_MTD_DOC2001 is not set
7721 CONFIG_MTD_DOCPROBE=y
7722 @@ -307,11 +304,6 @@
7723 #
7724 # CONFIG_IPX is not set
7725 # CONFIG_ATALK is not set
7726 -
7727 -#
7728 -# Appletalk devices
7729 -#
7730 -# CONFIG_DEV_APPLETALK is not set
7731 # CONFIG_DECNET is not set
7732 # CONFIG_BRIDGE is not set
7733 # CONFIG_X25 is not set
7734 @@ -513,7 +505,6 @@
7735 CONFIG_SERIAL_CONSOLE=y
7736 # CONFIG_SERIAL_EXTENDED is not set
7737 # CONFIG_SERIAL_NONSTANDARD is not set
7738 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7739 CONFIG_UNIX98_PTYS=y
7740 CONFIG_UNIX98_PTY_COUNT=256
7741
7742 diff -Nur linux-2.4.30/arch/mips/defconfig-osprey linux-2.4.30-mips/arch/mips/defconfig-osprey
7743 --- linux-2.4.30/arch/mips/defconfig-osprey 2005-01-19 15:09:28.000000000 +0100
7744 +++ linux-2.4.30-mips/arch/mips/defconfig-osprey 2005-03-18 13:13:21.000000000 +0100
7745 @@ -30,8 +30,8 @@
7746 # CONFIG_MIPS_PB1000 is not set
7747 # CONFIG_MIPS_PB1100 is not set
7748 # CONFIG_MIPS_PB1500 is not set
7749 -# CONFIG_MIPS_HYDROGEN3 is not set
7750 # CONFIG_MIPS_PB1550 is not set
7751 +# CONFIG_MIPS_HYDROGEN3 is not set
7752 # CONFIG_MIPS_XXS1500 is not set
7753 # CONFIG_MIPS_MTX1 is not set
7754 # CONFIG_COGENT_CSB250 is not set
7755 @@ -227,11 +227,6 @@
7756 #
7757 # CONFIG_IPX is not set
7758 # CONFIG_ATALK is not set
7759 -
7760 -#
7761 -# Appletalk devices
7762 -#
7763 -# CONFIG_DEV_APPLETALK is not set
7764 # CONFIG_DECNET is not set
7765 # CONFIG_BRIDGE is not set
7766 # CONFIG_X25 is not set
7767 @@ -388,7 +383,6 @@
7768 # CONFIG_SERIAL_MULTIPORT is not set
7769 # CONFIG_HUB6 is not set
7770 # CONFIG_SERIAL_NONSTANDARD is not set
7771 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7772 # CONFIG_VR41XX_KIU is not set
7773 CONFIG_UNIX98_PTYS=y
7774 CONFIG_UNIX98_PTY_COUNT=256
7775 diff -Nur linux-2.4.30/arch/mips/defconfig-pb1000 linux-2.4.30-mips/arch/mips/defconfig-pb1000
7776 --- linux-2.4.30/arch/mips/defconfig-pb1000 2005-01-19 15:09:28.000000000 +0100
7777 +++ linux-2.4.30-mips/arch/mips/defconfig-pb1000 2005-03-18 13:13:21.000000000 +0100
7778 @@ -30,8 +30,8 @@
7779 CONFIG_MIPS_PB1000=y
7780 # CONFIG_MIPS_PB1100 is not set
7781 # CONFIG_MIPS_PB1500 is not set
7782 -# CONFIG_MIPS_HYDROGEN3 is not set
7783 # CONFIG_MIPS_PB1550 is not set
7784 +# CONFIG_MIPS_HYDROGEN3 is not set
7785 # CONFIG_MIPS_XXS1500 is not set
7786 # CONFIG_MIPS_MTX1 is not set
7787 # CONFIG_COGENT_CSB250 is not set
7788 @@ -215,9 +215,7 @@
7789 # CONFIG_MTD_BOSPORUS is not set
7790 # CONFIG_MTD_XXS1500 is not set
7791 # CONFIG_MTD_MTX1 is not set
7792 -# CONFIG_MTD_DB1X00 is not set
7793 # CONFIG_MTD_PB1550 is not set
7794 -# CONFIG_MTD_HYDROGEN3 is not set
7795 # CONFIG_MTD_MIRAGE is not set
7796 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7797 # CONFIG_MTD_OCELOT is not set
7798 @@ -236,7 +234,6 @@
7799 #
7800 # Disk-On-Chip Device Drivers
7801 #
7802 -# CONFIG_MTD_DOC1000 is not set
7803 # CONFIG_MTD_DOC2000 is not set
7804 # CONFIG_MTD_DOC2001 is not set
7805 # CONFIG_MTD_DOCPROBE is not set
7806 @@ -324,11 +321,6 @@
7807 #
7808 # CONFIG_IPX is not set
7809 # CONFIG_ATALK is not set
7810 -
7811 -#
7812 -# Appletalk devices
7813 -#
7814 -# CONFIG_DEV_APPLETALK is not set
7815 # CONFIG_DECNET is not set
7816 # CONFIG_BRIDGE is not set
7817 # CONFIG_X25 is not set
7818 @@ -622,7 +614,6 @@
7819 # CONFIG_AU1X00_USB_TTY is not set
7820 # CONFIG_AU1X00_USB_RAW is not set
7821 # CONFIG_TXX927_SERIAL is not set
7822 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7823 CONFIG_UNIX98_PTYS=y
7824 CONFIG_UNIX98_PTY_COUNT=256
7825
7826 @@ -707,7 +698,7 @@
7827 #
7828 # CONFIG_PCMCIA_SERIAL_CS is not set
7829 # CONFIG_SYNCLINK_CS is not set
7830 -CONFIG_AU1X00_GPIO=m
7831 +CONFIG_AU1X00_GPIO=y
7832 # CONFIG_TS_AU1X00_ADS7846 is not set
7833
7834 #
7835 diff -Nur linux-2.4.30/arch/mips/defconfig-pb1100 linux-2.4.30-mips/arch/mips/defconfig-pb1100
7836 --- linux-2.4.30/arch/mips/defconfig-pb1100 2005-01-19 15:09:28.000000000 +0100
7837 +++ linux-2.4.30-mips/arch/mips/defconfig-pb1100 2005-03-18 13:13:21.000000000 +0100
7838 @@ -30,8 +30,8 @@
7839 # CONFIG_MIPS_PB1000 is not set
7840 CONFIG_MIPS_PB1100=y
7841 # CONFIG_MIPS_PB1500 is not set
7842 -# CONFIG_MIPS_HYDROGEN3 is not set
7843 # CONFIG_MIPS_PB1550 is not set
7844 +# CONFIG_MIPS_HYDROGEN3 is not set
7845 # CONFIG_MIPS_XXS1500 is not set
7846 # CONFIG_MIPS_MTX1 is not set
7847 # CONFIG_COGENT_CSB250 is not set
7848 @@ -198,9 +198,7 @@
7849 # CONFIG_MTD_MTX1 is not set
7850 CONFIG_MTD_PB1500_BOOT=y
7851 CONFIG_MTD_PB1500_USER=y
7852 -# CONFIG_MTD_DB1X00 is not set
7853 # CONFIG_MTD_PB1550 is not set
7854 -# CONFIG_MTD_HYDROGEN3 is not set
7855 # CONFIG_MTD_MIRAGE is not set
7856 # CONFIG_MTD_CSTM_MIPS_IXX is not set
7857 # CONFIG_MTD_OCELOT is not set
7858 @@ -219,7 +217,6 @@
7859 #
7860 # Disk-On-Chip Device Drivers
7861 #
7862 -# CONFIG_MTD_DOC1000 is not set
7863 # CONFIG_MTD_DOC2000 is not set
7864 # CONFIG_MTD_DOC2001 is not set
7865 # CONFIG_MTD_DOCPROBE is not set
7866 @@ -324,11 +321,6 @@
7867 #
7868 # CONFIG_IPX is not set
7869 # CONFIG_ATALK is not set
7870 -
7871 -#
7872 -# Appletalk devices
7873 -#
7874 -# CONFIG_DEV_APPLETALK is not set
7875 # CONFIG_DECNET is not set
7876 # CONFIG_BRIDGE is not set
7877 # CONFIG_X25 is not set
7878 @@ -613,7 +605,6 @@
7879 # CONFIG_AU1X00_USB_TTY is not set
7880 # CONFIG_AU1X00_USB_RAW is not set
7881 # CONFIG_TXX927_SERIAL is not set
7882 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
7883 CONFIG_UNIX98_PTYS=y
7884 CONFIG_UNIX98_PTY_COUNT=256
7885
7886 @@ -859,6 +850,7 @@
7887 # CONFIG_FB_PM2 is not set
7888 # CONFIG_FB_PM3 is not set
7889 # CONFIG_FB_CYBER2000 is not set
7890 +CONFIG_FB_AU1100=y
7891 # CONFIG_FB_MATROX is not set
7892 # CONFIG_FB_ATY is not set
7893 # CONFIG_FB_RADEON is not set
7894 @@ -870,7 +862,6 @@
7895 # CONFIG_FB_VOODOO1 is not set
7896 # CONFIG_FB_TRIDENT is not set
7897 # CONFIG_FB_E1356 is not set
7898 -CONFIG_FB_AU1100=y
7899 # CONFIG_FB_IT8181 is not set
7900 # CONFIG_FB_VIRTUAL is not set
7901 CONFIG_FBCON_ADVANCED=y
7902 diff -Nur linux-2.4.30/arch/mips/defconfig-pb1200 linux-2.4.30-mips/arch/mips/defconfig-pb1200
7903 --- linux-2.4.30/arch/mips/defconfig-pb1200 1970-01-01 01:00:00.000000000 +0100
7904 +++ linux-2.4.30-mips/arch/mips/defconfig-pb1200 2005-03-18 13:13:21.000000000 +0100
7905 @@ -0,0 +1,1060 @@
7906 +#
7907 +# Automatically generated make config: don't edit
7908 +#
7909 +CONFIG_MIPS=y
7910 +CONFIG_MIPS32=y
7911 +# CONFIG_MIPS64 is not set
7912 +
7913 +#
7914 +# Code maturity level options
7915 +#
7916 +CONFIG_EXPERIMENTAL=y
7917 +
7918 +#
7919 +# Loadable module support
7920 +#
7921 +CONFIG_MODULES=y
7922 +# CONFIG_MODVERSIONS is not set
7923 +CONFIG_KMOD=y
7924 +
7925 +#
7926 +# Machine selection
7927 +#
7928 +# CONFIG_ACER_PICA_61 is not set
7929 +# CONFIG_MIPS_BOSPORUS is not set
7930 +# CONFIG_MIPS_MIRAGE is not set
7931 +# CONFIG_MIPS_DB1000 is not set
7932 +# CONFIG_MIPS_DB1100 is not set
7933 +# CONFIG_MIPS_DB1500 is not set
7934 +# CONFIG_MIPS_DB1550 is not set
7935 +# CONFIG_MIPS_PB1000 is not set
7936 +# CONFIG_MIPS_PB1100 is not set
7937 +# CONFIG_MIPS_PB1500 is not set
7938 +# CONFIG_MIPS_PB1550 is not set
7939 +# CONFIG_MIPS_HYDROGEN3 is not set
7940 +# CONFIG_MIPS_XXS1500 is not set
7941 +# CONFIG_MIPS_MTX1 is not set
7942 +# CONFIG_COGENT_CSB250 is not set
7943 +# CONFIG_BAGET_MIPS is not set
7944 +# CONFIG_CASIO_E55 is not set
7945 +# CONFIG_MIPS_COBALT is not set
7946 +# CONFIG_DECSTATION is not set
7947 +# CONFIG_MIPS_EV64120 is not set
7948 +# CONFIG_MIPS_EV96100 is not set
7949 +# CONFIG_MIPS_IVR is not set
7950 +# CONFIG_HP_LASERJET is not set
7951 +# CONFIG_IBM_WORKPAD is not set
7952 +# CONFIG_LASAT is not set
7953 +# CONFIG_MIPS_ITE8172 is not set
7954 +# CONFIG_MIPS_ATLAS is not set
7955 +# CONFIG_MIPS_MAGNUM_4000 is not set
7956 +# CONFIG_MIPS_MALTA is not set
7957 +# CONFIG_MIPS_SEAD is not set
7958 +# CONFIG_MOMENCO_OCELOT is not set
7959 +# CONFIG_MOMENCO_OCELOT_G is not set
7960 +# CONFIG_MOMENCO_OCELOT_C is not set
7961 +# CONFIG_MOMENCO_JAGUAR_ATX is not set
7962 +# CONFIG_PMC_BIG_SUR is not set
7963 +# CONFIG_PMC_STRETCH is not set
7964 +# CONFIG_PMC_YOSEMITE is not set
7965 +# CONFIG_DDB5074 is not set
7966 +# CONFIG_DDB5476 is not set
7967 +# CONFIG_DDB5477 is not set
7968 +# CONFIG_NEC_OSPREY is not set
7969 +# CONFIG_NEC_EAGLE is not set
7970 +# CONFIG_OLIVETTI_M700 is not set
7971 +# CONFIG_NINO is not set
7972 +# CONFIG_SGI_IP22 is not set
7973 +# CONFIG_SGI_IP27 is not set
7974 +# CONFIG_SIBYTE_SB1xxx_SOC is not set
7975 +# CONFIG_SNI_RM200_PCI is not set
7976 +# CONFIG_TANBAC_TB0226 is not set
7977 +# CONFIG_TANBAC_TB0229 is not set
7978 +# CONFIG_TOSHIBA_JMR3927 is not set
7979 +# CONFIG_TOSHIBA_RBTX4927 is not set
7980 +# CONFIG_VICTOR_MPC30X is not set
7981 +# CONFIG_ZAO_CAPCELLA is not set
7982 +# CONFIG_HIGHMEM is not set
7983 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
7984 +# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set
7985 +CONFIG_SOC_AU1X00=y
7986 +CONFIG_SOC_AU1200=y
7987 +CONFIG_NONCOHERENT_IO=y
7988 +CONFIG_PC_KEYB=y
7989 +# CONFIG_MIPS_AU1000 is not set
7990 +
7991 +#
7992 +# CPU selection
7993 +#
7994 +CONFIG_CPU_MIPS32=y
7995 +# CONFIG_CPU_MIPS64 is not set
7996 +# CONFIG_CPU_R3000 is not set
7997 +# CONFIG_CPU_TX39XX is not set
7998 +# CONFIG_CPU_VR41XX is not set
7999 +# CONFIG_CPU_R4300 is not set
8000 +# CONFIG_CPU_R4X00 is not set
8001 +# CONFIG_CPU_TX49XX is not set
8002 +# CONFIG_CPU_R5000 is not set
8003 +# CONFIG_CPU_R5432 is not set
8004 +# CONFIG_CPU_R6000 is not set
8005 +# CONFIG_CPU_NEVADA is not set
8006 +# CONFIG_CPU_R8000 is not set
8007 +# CONFIG_CPU_R10000 is not set
8008 +# CONFIG_CPU_RM7000 is not set
8009 +# CONFIG_CPU_RM9000 is not set
8010 +# CONFIG_CPU_SB1 is not set
8011 +CONFIG_PAGE_SIZE_4KB=y
8012 +# CONFIG_PAGE_SIZE_16KB is not set
8013 +# CONFIG_PAGE_SIZE_64KB is not set
8014 +CONFIG_CPU_HAS_PREFETCH=y
8015 +# CONFIG_VTAG_ICACHE is not set
8016 +CONFIG_64BIT_PHYS_ADDR=y
8017 +# CONFIG_CPU_ADVANCED is not set
8018 +CONFIG_CPU_HAS_LLSC=y
8019 +# CONFIG_CPU_HAS_LLDSCD is not set
8020 +# CONFIG_CPU_HAS_WB is not set
8021 +CONFIG_CPU_HAS_SYNC=y
8022 +
8023 +#
8024 +# General setup
8025 +#
8026 +CONFIG_CPU_LITTLE_ENDIAN=y
8027 +# CONFIG_BUILD_ELF64 is not set
8028 +CONFIG_NET=y
8029 +CONFIG_PCI=y
8030 +CONFIG_PCI_NEW=y
8031 +CONFIG_PCI_AUTO=y
8032 +# CONFIG_PCI_NAMES is not set
8033 +# CONFIG_ISA is not set
8034 +# CONFIG_TC is not set
8035 +# CONFIG_MCA is not set
8036 +# CONFIG_SBUS is not set
8037 +CONFIG_HOTPLUG=y
8038 +
8039 +#
8040 +# PCMCIA/CardBus support
8041 +#
8042 +CONFIG_PCMCIA=m
8043 +# CONFIG_CARDBUS is not set
8044 +# CONFIG_TCIC is not set
8045 +# CONFIG_I82092 is not set
8046 +# CONFIG_I82365 is not set
8047 +CONFIG_PCMCIA_AU1X00=m
8048 +
8049 +#
8050 +# PCI Hotplug Support
8051 +#
8052 +# CONFIG_HOTPLUG_PCI is not set
8053 +# CONFIG_HOTPLUG_PCI_COMPAQ is not set
8054 +# CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set
8055 +# CONFIG_HOTPLUG_PCI_SHPC is not set
8056 +# CONFIG_HOTPLUG_PCI_SHPC_POLL_EVENT_MODE is not set
8057 +# CONFIG_HOTPLUG_PCI_PCIE is not set
8058 +# CONFIG_HOTPLUG_PCI_PCIE_POLL_EVENT_MODE is not set
8059 +CONFIG_SYSVIPC=y
8060 +# CONFIG_BSD_PROCESS_ACCT is not set
8061 +CONFIG_SYSCTL=y
8062 +CONFIG_KCORE_ELF=y
8063 +# CONFIG_KCORE_AOUT is not set
8064 +# CONFIG_BINFMT_AOUT is not set
8065 +CONFIG_BINFMT_ELF=y
8066 +# CONFIG_MIPS32_COMPAT is not set
8067 +# CONFIG_MIPS32_O32 is not set
8068 +# CONFIG_MIPS32_N32 is not set
8069 +# CONFIG_BINFMT_ELF32 is not set
8070 +# CONFIG_BINFMT_MISC is not set
8071 +# CONFIG_OOM_KILLER is not set
8072 +CONFIG_CMDLINE_BOOL=y
8073 +CONFIG_CMDLINE="mem=96M"
8074 +# CONFIG_PM is not set
8075 +
8076 +#
8077 +# Memory Technology Devices (MTD)
8078 +#
8079 +# CONFIG_MTD is not set
8080 +
8081 +#
8082 +# Parallel port support
8083 +#
8084 +# CONFIG_PARPORT is not set
8085 +
8086 +#
8087 +# Plug and Play configuration
8088 +#
8089 +# CONFIG_PNP is not set
8090 +# CONFIG_ISAPNP is not set
8091 +
8092 +#
8093 +# Block devices
8094 +#
8095 +# CONFIG_BLK_DEV_FD is not set
8096 +# CONFIG_BLK_DEV_XD is not set
8097 +# CONFIG_PARIDE is not set
8098 +# CONFIG_BLK_CPQ_DA is not set
8099 +# CONFIG_BLK_CPQ_CISS_DA is not set
8100 +# CONFIG_CISS_SCSI_TAPE is not set
8101 +# CONFIG_CISS_MONITOR_THREAD is not set
8102 +# CONFIG_BLK_DEV_DAC960 is not set
8103 +# CONFIG_BLK_DEV_UMEM is not set
8104 +# CONFIG_BLK_DEV_SX8 is not set
8105 +CONFIG_BLK_DEV_LOOP=y
8106 +# CONFIG_BLK_DEV_NBD is not set
8107 +# CONFIG_BLK_DEV_RAM is not set
8108 +# CONFIG_BLK_DEV_INITRD is not set
8109 +# CONFIG_BLK_STATS is not set
8110 +
8111 +#
8112 +# Multi-device support (RAID and LVM)
8113 +#
8114 +# CONFIG_MD is not set
8115 +# CONFIG_BLK_DEV_MD is not set
8116 +# CONFIG_MD_LINEAR is not set
8117 +# CONFIG_MD_RAID0 is not set
8118 +# CONFIG_MD_RAID1 is not set
8119 +# CONFIG_MD_RAID5 is not set
8120 +# CONFIG_MD_MULTIPATH is not set
8121 +# CONFIG_BLK_DEV_LVM is not set
8122 +
8123 +#
8124 +# Networking options
8125 +#
8126 +CONFIG_PACKET=y
8127 +# CONFIG_PACKET_MMAP is not set
8128 +# CONFIG_NETLINK_DEV is not set
8129 +CONFIG_NETFILTER=y
8130 +# CONFIG_NETFILTER_DEBUG is not set
8131 +CONFIG_FILTER=y
8132 +CONFIG_UNIX=y
8133 +CONFIG_INET=y
8134 +CONFIG_IP_MULTICAST=y
8135 +# CONFIG_IP_ADVANCED_ROUTER is not set
8136 +CONFIG_IP_PNP=y
8137 +# CONFIG_IP_PNP_DHCP is not set
8138 +CONFIG_IP_PNP_BOOTP=y
8139 +# CONFIG_IP_PNP_RARP is not set
8140 +# CONFIG_NET_IPIP is not set
8141 +# CONFIG_NET_IPGRE is not set
8142 +# CONFIG_IP_MROUTE is not set
8143 +# CONFIG_ARPD is not set
8144 +# CONFIG_INET_ECN is not set
8145 +# CONFIG_SYN_COOKIES is not set
8146 +
8147 +#
8148 +# IP: Netfilter Configuration
8149 +#
8150 +# CONFIG_IP_NF_CONNTRACK is not set
8151 +# CONFIG_IP_NF_QUEUE is not set
8152 +# CONFIG_IP_NF_IPTABLES is not set
8153 +# CONFIG_IP_NF_ARPTABLES is not set
8154 +# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
8155 +# CONFIG_IP_NF_COMPAT_IPFWADM is not set
8156 +
8157 +#
8158 +# IP: Virtual Server Configuration
8159 +#
8160 +# CONFIG_IP_VS is not set
8161 +# CONFIG_IPV6 is not set
8162 +# CONFIG_KHTTPD is not set
8163 +
8164 +#
8165 +# SCTP Configuration (EXPERIMENTAL)
8166 +#
8167 +# CONFIG_IP_SCTP is not set
8168 +# CONFIG_ATM is not set
8169 +# CONFIG_VLAN_8021Q is not set
8170 +
8171 +#
8172 +#
8173 +#
8174 +# CONFIG_IPX is not set
8175 +# CONFIG_ATALK is not set
8176 +# CONFIG_DECNET is not set
8177 +# CONFIG_BRIDGE is not set
8178 +# CONFIG_X25 is not set
8179 +# CONFIG_LAPB is not set
8180 +# CONFIG_LLC is not set
8181 +# CONFIG_NET_DIVERT is not set
8182 +# CONFIG_ECONET is not set
8183 +# CONFIG_WAN_ROUTER is not set
8184 +# CONFIG_NET_FASTROUTE is not set
8185 +# CONFIG_NET_HW_FLOWCONTROL is not set
8186 +
8187 +#
8188 +# QoS and/or fair queueing
8189 +#
8190 +# CONFIG_NET_SCHED is not set
8191 +
8192 +#
8193 +# Network testing
8194 +#
8195 +# CONFIG_NET_PKTGEN is not set
8196 +
8197 +#
8198 +# Telephony Support
8199 +#
8200 +# CONFIG_PHONE is not set
8201 +# CONFIG_PHONE_IXJ is not set
8202 +# CONFIG_PHONE_IXJ_PCMCIA is not set
8203 +
8204 +#
8205 +# ATA/IDE/MFM/RLL support
8206 +#
8207 +CONFIG_IDE=y
8208 +
8209 +#
8210 +# IDE, ATA and ATAPI Block devices
8211 +#
8212 +CONFIG_BLK_DEV_IDE=y
8213 +
8214 +#
8215 +# Please see Documentation/ide.txt for help/info on IDE drives
8216 +#
8217 +# CONFIG_BLK_DEV_HD_IDE is not set
8218 +# CONFIG_BLK_DEV_HD is not set
8219 +# CONFIG_BLK_DEV_IDE_SATA is not set
8220 +CONFIG_BLK_DEV_IDEDISK=y
8221 +CONFIG_IDEDISK_MULTI_MODE=y
8222 +CONFIG_IDEDISK_STROKE=y
8223 +CONFIG_BLK_DEV_IDECS=m
8224 +# CONFIG_BLK_DEV_DELKIN is not set
8225 +# CONFIG_BLK_DEV_IDECD is not set
8226 +# CONFIG_BLK_DEV_IDETAPE is not set
8227 +# CONFIG_BLK_DEV_IDEFLOPPY is not set
8228 +# CONFIG_BLK_DEV_IDESCSI is not set
8229 +# CONFIG_IDE_TASK_IOCTL is not set
8230 +
8231 +#
8232 +# IDE chipset support/bugfixes
8233 +#
8234 +# CONFIG_BLK_DEV_CMD640 is not set
8235 +# CONFIG_BLK_DEV_CMD640_ENHANCED is not set
8236 +# CONFIG_BLK_DEV_ISAPNP is not set
8237 +# CONFIG_BLK_DEV_IDEPCI is not set
8238 +# CONFIG_IDE_CHIPSETS is not set
8239 +# CONFIG_IDEDMA_AUTO is not set
8240 +# CONFIG_DMA_NONPCI is not set
8241 +# CONFIG_BLK_DEV_ATARAID is not set
8242 +# CONFIG_BLK_DEV_ATARAID_PDC is not set
8243 +# CONFIG_BLK_DEV_ATARAID_HPT is not set
8244 +# CONFIG_BLK_DEV_ATARAID_MEDLEY is not set
8245 +# CONFIG_BLK_DEV_ATARAID_SII is not set
8246 +
8247 +#
8248 +# SCSI support
8249 +#
8250 +CONFIG_SCSI=y
8251 +
8252 +#
8253 +# SCSI support type (disk, tape, CD-ROM)
8254 +#
8255 +CONFIG_BLK_DEV_SD=y
8256 +CONFIG_SD_EXTRA_DEVS=40
8257 +CONFIG_CHR_DEV_ST=y
8258 +# CONFIG_CHR_DEV_OSST is not set
8259 +CONFIG_BLK_DEV_SR=y
8260 +# CONFIG_BLK_DEV_SR_VENDOR is not set
8261 +CONFIG_SR_EXTRA_DEVS=2
8262 +# CONFIG_CHR_DEV_SG is not set
8263 +
8264 +#
8265 +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
8266 +#
8267 +# CONFIG_SCSI_DEBUG_QUEUES is not set
8268 +# CONFIG_SCSI_MULTI_LUN is not set
8269 +CONFIG_SCSI_CONSTANTS=y
8270 +# CONFIG_SCSI_LOGGING is not set
8271 +
8272 +#
8273 +# SCSI low-level drivers
8274 +#
8275 +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
8276 +# CONFIG_SCSI_7000FASST is not set
8277 +# CONFIG_SCSI_ACARD is not set
8278 +# CONFIG_SCSI_AHA152X is not set
8279 +# CONFIG_SCSI_AHA1542 is not set
8280 +# CONFIG_SCSI_AHA1740 is not set
8281 +# CONFIG_SCSI_AACRAID is not set
8282 +# CONFIG_SCSI_AIC7XXX is not set
8283 +# CONFIG_SCSI_AIC79XX is not set
8284 +# CONFIG_SCSI_AIC7XXX_OLD is not set
8285 +# CONFIG_SCSI_DPT_I2O is not set
8286 +# CONFIG_SCSI_ADVANSYS is not set
8287 +# CONFIG_SCSI_IN2000 is not set
8288 +# CONFIG_SCSI_AM53C974 is not set
8289 +# CONFIG_SCSI_MEGARAID is not set
8290 +# CONFIG_SCSI_MEGARAID2 is not set
8291 +# CONFIG_SCSI_SATA is not set
8292 +# CONFIG_SCSI_SATA_AHCI is not set
8293 +# CONFIG_SCSI_SATA_SVW is not set
8294 +# CONFIG_SCSI_ATA_PIIX is not set
8295 +# CONFIG_SCSI_SATA_NV is not set
8296 +# CONFIG_SCSI_SATA_QSTOR is not set
8297 +# CONFIG_SCSI_SATA_PROMISE is not set
8298 +# CONFIG_SCSI_SATA_SX4 is not set
8299 +# CONFIG_SCSI_SATA_SIL is not set
8300 +# CONFIG_SCSI_SATA_SIS is not set
8301 +# CONFIG_SCSI_SATA_ULI is not set
8302 +# CONFIG_SCSI_SATA_VIA is not set
8303 +# CONFIG_SCSI_SATA_VITESSE is not set
8304 +# CONFIG_SCSI_BUSLOGIC is not set
8305 +# CONFIG_SCSI_CPQFCTS is not set
8306 +# CONFIG_SCSI_DMX3191D is not set
8307 +# CONFIG_SCSI_DTC3280 is not set
8308 +# CONFIG_SCSI_EATA is not set
8309 +# CONFIG_SCSI_EATA_DMA is not set
8310 +# CONFIG_SCSI_EATA_PIO is not set
8311 +# CONFIG_SCSI_FUTURE_DOMAIN is not set
8312 +# CONFIG_SCSI_GDTH is not set
8313 +# CONFIG_SCSI_GENERIC_NCR5380 is not set
8314 +# CONFIG_SCSI_INITIO is not set
8315 +# CONFIG_SCSI_INIA100 is not set
8316 +# CONFIG_SCSI_NCR53C406A is not set
8317 +# CONFIG_SCSI_NCR53C7xx is not set
8318 +# CONFIG_SCSI_SYM53C8XX_2 is not set
8319 +# CONFIG_SCSI_NCR53C8XX is not set
8320 +# CONFIG_SCSI_SYM53C8XX is not set
8321 +# CONFIG_SCSI_PAS16 is not set
8322 +# CONFIG_SCSI_PCI2000 is not set
8323 +# CONFIG_SCSI_PCI2220I is not set
8324 +# CONFIG_SCSI_PSI240I is not set
8325 +# CONFIG_SCSI_QLOGIC_FAS is not set
8326 +# CONFIG_SCSI_QLOGIC_ISP is not set
8327 +# CONFIG_SCSI_QLOGIC_FC is not set
8328 +# CONFIG_SCSI_QLOGIC_1280 is not set
8329 +# CONFIG_SCSI_SIM710 is not set
8330 +# CONFIG_SCSI_SYM53C416 is not set
8331 +# CONFIG_SCSI_DC390T is not set
8332 +# CONFIG_SCSI_T128 is not set
8333 +# CONFIG_SCSI_U14_34F is not set
8334 +# CONFIG_SCSI_NSP32 is not set
8335 +# CONFIG_SCSI_DEBUG is not set
8336 +
8337 +#
8338 +# PCMCIA SCSI adapter support
8339 +#
8340 +# CONFIG_SCSI_PCMCIA is not set
8341 +
8342 +#
8343 +# Fusion MPT device support
8344 +#
8345 +# CONFIG_FUSION is not set
8346 +# CONFIG_FUSION_BOOT is not set
8347 +# CONFIG_FUSION_ISENSE is not set
8348 +# CONFIG_FUSION_CTL is not set
8349 +# CONFIG_FUSION_LAN is not set
8350 +
8351 +#
8352 +# IEEE 1394 (FireWire) support (EXPERIMENTAL)
8353 +#
8354 +# CONFIG_IEEE1394 is not set
8355 +
8356 +#
8357 +# I2O device support
8358 +#
8359 +# CONFIG_I2O is not set
8360 +# CONFIG_I2O_PCI is not set
8361 +# CONFIG_I2O_BLOCK is not set
8362 +# CONFIG_I2O_LAN is not set
8363 +# CONFIG_I2O_SCSI is not set
8364 +# CONFIG_I2O_PROC is not set
8365 +
8366 +#
8367 +# Network device support
8368 +#
8369 +CONFIG_NETDEVICES=y
8370 +
8371 +#
8372 +# ARCnet devices
8373 +#
8374 +# CONFIG_ARCNET is not set
8375 +# CONFIG_DUMMY is not set
8376 +# CONFIG_BONDING is not set
8377 +# CONFIG_EQUALIZER is not set
8378 +# CONFIG_TUN is not set
8379 +# CONFIG_ETHERTAP is not set
8380 +
8381 +#
8382 +# Ethernet (10 or 100Mbit)
8383 +#
8384 +CONFIG_NET_ETHERNET=y
8385 +# CONFIG_MIPS_AU1X00_ENET is not set
8386 +# CONFIG_SUNLANCE is not set
8387 +# CONFIG_HAPPYMEAL is not set
8388 +# CONFIG_SUNBMAC is not set
8389 +# CONFIG_SUNQE is not set
8390 +# CONFIG_SUNGEM is not set
8391 +# CONFIG_NET_VENDOR_3COM is not set
8392 +# CONFIG_LANCE is not set
8393 +# CONFIG_NET_VENDOR_SMC is not set
8394 +# CONFIG_NET_VENDOR_RACAL is not set
8395 +# CONFIG_HP100 is not set
8396 +# CONFIG_NET_ISA is not set
8397 +# CONFIG_NET_PCI is not set
8398 +# CONFIG_NET_POCKET is not set
8399 +
8400 +#
8401 +# Ethernet (1000 Mbit)
8402 +#
8403 +# CONFIG_ACENIC is not set
8404 +# CONFIG_DL2K is not set
8405 +# CONFIG_E1000 is not set
8406 +# CONFIG_MYRI_SBUS is not set
8407 +# CONFIG_NS83820 is not set
8408 +# CONFIG_HAMACHI is not set
8409 +# CONFIG_YELLOWFIN is not set
8410 +# CONFIG_R8169 is not set
8411 +# CONFIG_SK98LIN is not set
8412 +# CONFIG_TIGON3 is not set
8413 +# CONFIG_FDDI is not set
8414 +# CONFIG_HIPPI is not set
8415 +# CONFIG_PLIP is not set
8416 +CONFIG_PPP=m
8417 +CONFIG_PPP_MULTILINK=y
8418 +# CONFIG_PPP_FILTER is not set
8419 +CONFIG_PPP_ASYNC=m
8420 +# CONFIG_PPP_SYNC_TTY is not set
8421 +CONFIG_PPP_DEFLATE=m
8422 +# CONFIG_PPP_BSDCOMP is not set
8423 +CONFIG_PPPOE=m
8424 +# CONFIG_SLIP is not set
8425 +
8426 +#
8427 +# Wireless LAN (non-hamradio)
8428 +#
8429 +# CONFIG_NET_RADIO is not set
8430 +
8431 +#
8432 +# Token Ring devices
8433 +#
8434 +# CONFIG_TR is not set
8435 +# CONFIG_NET_FC is not set
8436 +# CONFIG_RCPCI is not set
8437 +# CONFIG_SHAPER is not set
8438 +
8439 +#
8440 +# Wan interfaces
8441 +#
8442 +# CONFIG_WAN is not set
8443 +
8444 +#
8445 +# PCMCIA network device support
8446 +#
8447 +# CONFIG_NET_PCMCIA is not set
8448 +
8449 +#
8450 +# Amateur Radio support
8451 +#
8452 +# CONFIG_HAMRADIO is not set
8453 +
8454 +#
8455 +# IrDA (infrared) support
8456 +#
8457 +# CONFIG_IRDA is not set
8458 +
8459 +#
8460 +# ISDN subsystem
8461 +#
8462 +# CONFIG_ISDN is not set
8463 +
8464 +#
8465 +# Input core support
8466 +#
8467 +CONFIG_INPUT=y
8468 +CONFIG_INPUT_KEYBDEV=y
8469 +CONFIG_INPUT_MOUSEDEV=y
8470 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
8471 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
8472 +# CONFIG_INPUT_JOYDEV is not set
8473 +CONFIG_INPUT_EVDEV=y
8474 +# CONFIG_INPUT_UINPUT is not set
8475 +
8476 +#
8477 +# Character devices
8478 +#
8479 +CONFIG_VT=y
8480 +# CONFIG_VT_CONSOLE is not set
8481 +# CONFIG_SERIAL is not set
8482 +# CONFIG_SERIAL_EXTENDED is not set
8483 +CONFIG_SERIAL_NONSTANDARD=y
8484 +# CONFIG_COMPUTONE is not set
8485 +# CONFIG_ROCKETPORT is not set
8486 +# CONFIG_CYCLADES is not set
8487 +# CONFIG_DIGIEPCA is not set
8488 +# CONFIG_DIGI is not set
8489 +# CONFIG_ESPSERIAL is not set
8490 +# CONFIG_MOXA_INTELLIO is not set
8491 +# CONFIG_MOXA_SMARTIO is not set
8492 +# CONFIG_ISI is not set
8493 +# CONFIG_SYNCLINK is not set
8494 +# CONFIG_SYNCLINKMP is not set
8495 +# CONFIG_N_HDLC is not set
8496 +# CONFIG_RISCOM8 is not set
8497 +# CONFIG_SPECIALIX is not set
8498 +# CONFIG_SX is not set
8499 +# CONFIG_RIO is not set
8500 +# CONFIG_STALDRV is not set
8501 +# CONFIG_SERIAL_TX3912 is not set
8502 +# CONFIG_SERIAL_TX3912_CONSOLE is not set
8503 +# CONFIG_SERIAL_TXX9 is not set
8504 +# CONFIG_SERIAL_TXX9_CONSOLE is not set
8505 +CONFIG_AU1X00_UART=y
8506 +CONFIG_AU1X00_SERIAL_CONSOLE=y
8507 +# CONFIG_AU1X00_USB_TTY is not set
8508 +# CONFIG_AU1X00_USB_RAW is not set
8509 +# CONFIG_TXX927_SERIAL is not set
8510 +CONFIG_UNIX98_PTYS=y
8511 +CONFIG_UNIX98_PTY_COUNT=256
8512 +
8513 +#
8514 +# I2C support
8515 +#
8516 +CONFIG_I2C=y
8517 +# CONFIG_I2C_ALGOBIT is not set
8518 +# CONFIG_SCx200_ACB is not set
8519 +# CONFIG_I2C_ALGOPCF is not set
8520 +# CONFIG_I2C_CHARDEV is not set
8521 +CONFIG_I2C_PROC=y
8522 +
8523 +#
8524 +# Mice
8525 +#
8526 +# CONFIG_BUSMOUSE is not set
8527 +# CONFIG_MOUSE is not set
8528 +
8529 +#
8530 +# Joysticks
8531 +#
8532 +# CONFIG_INPUT_GAMEPORT is not set
8533 +# CONFIG_INPUT_NS558 is not set
8534 +# CONFIG_INPUT_LIGHTNING is not set
8535 +# CONFIG_INPUT_PCIGAME is not set
8536 +# CONFIG_INPUT_CS461X is not set
8537 +# CONFIG_INPUT_EMU10K1 is not set
8538 +# CONFIG_INPUT_SERIO is not set
8539 +# CONFIG_INPUT_SERPORT is not set
8540 +
8541 +#
8542 +# Joysticks
8543 +#
8544 +# CONFIG_INPUT_ANALOG is not set
8545 +# CONFIG_INPUT_A3D is not set
8546 +# CONFIG_INPUT_ADI is not set
8547 +# CONFIG_INPUT_COBRA is not set
8548 +# CONFIG_INPUT_GF2K is not set
8549 +# CONFIG_INPUT_GRIP is not set
8550 +# CONFIG_INPUT_INTERACT is not set
8551 +# CONFIG_INPUT_TMDC is not set
8552 +# CONFIG_INPUT_SIDEWINDER is not set
8553 +# CONFIG_INPUT_IFORCE_USB is not set
8554 +# CONFIG_INPUT_IFORCE_232 is not set
8555 +# CONFIG_INPUT_WARRIOR is not set
8556 +# CONFIG_INPUT_MAGELLAN is not set
8557 +# CONFIG_INPUT_SPACEORB is not set
8558 +# CONFIG_INPUT_SPACEBALL is not set
8559 +# CONFIG_INPUT_STINGER is not set
8560 +# CONFIG_INPUT_DB9 is not set
8561 +# CONFIG_INPUT_GAMECON is not set
8562 +# CONFIG_INPUT_TURBOGRAFX is not set
8563 +# CONFIG_QIC02_TAPE is not set
8564 +# CONFIG_IPMI_HANDLER is not set
8565 +# CONFIG_IPMI_PANIC_EVENT is not set
8566 +# CONFIG_IPMI_DEVICE_INTERFACE is not set
8567 +# CONFIG_IPMI_KCS is not set
8568 +# CONFIG_IPMI_WATCHDOG is not set
8569 +
8570 +#
8571 +# Watchdog Cards
8572 +#
8573 +# CONFIG_WATCHDOG is not set
8574 +# CONFIG_SCx200 is not set
8575 +# CONFIG_SCx200_GPIO is not set
8576 +# CONFIG_AMD_PM768 is not set
8577 +# CONFIG_NVRAM is not set
8578 +# CONFIG_RTC is not set
8579 +# CONFIG_DTLK is not set
8580 +# CONFIG_R3964 is not set
8581 +# CONFIG_APPLICOM is not set
8582 +
8583 +#
8584 +# Ftape, the floppy tape device driver
8585 +#
8586 +# CONFIG_FTAPE is not set
8587 +# CONFIG_AGP is not set
8588 +
8589 +#
8590 +# Direct Rendering Manager (XFree86 DRI support)
8591 +#
8592 +# CONFIG_DRM is not set
8593 +
8594 +#
8595 +# PCMCIA character devices
8596 +#
8597 +# CONFIG_PCMCIA_SERIAL_CS is not set
8598 +# CONFIG_SYNCLINK_CS is not set
8599 +# CONFIG_AU1X00_GPIO is not set
8600 +# CONFIG_TS_AU1X00_ADS7846 is not set
8601 +
8602 +#
8603 +# File systems
8604 +#
8605 +# CONFIG_QUOTA is not set
8606 +# CONFIG_QFMT_V2 is not set
8607 +CONFIG_AUTOFS_FS=y
8608 +# CONFIG_AUTOFS4_FS is not set
8609 +# CONFIG_REISERFS_FS is not set
8610 +# CONFIG_REISERFS_CHECK is not set
8611 +# CONFIG_REISERFS_PROC_INFO is not set
8612 +# CONFIG_ADFS_FS is not set
8613 +# CONFIG_ADFS_FS_RW is not set
8614 +# CONFIG_AFFS_FS is not set
8615 +# CONFIG_HFS_FS is not set
8616 +# CONFIG_HFSPLUS_FS is not set
8617 +# CONFIG_BEFS_FS is not set
8618 +# CONFIG_BEFS_DEBUG is not set
8619 +# CONFIG_BFS_FS is not set
8620 +CONFIG_EXT3_FS=y
8621 +CONFIG_JBD=y
8622 +# CONFIG_JBD_DEBUG is not set
8623 +CONFIG_FAT_FS=y
8624 +CONFIG_MSDOS_FS=y
8625 +# CONFIG_UMSDOS_FS is not set
8626 +CONFIG_VFAT_FS=y
8627 +# CONFIG_EFS_FS is not set
8628 +# CONFIG_JFFS_FS is not set
8629 +# CONFIG_JFFS2_FS is not set
8630 +# CONFIG_CRAMFS is not set
8631 +CONFIG_TMPFS=y
8632 +CONFIG_RAMFS=y
8633 +# CONFIG_ISO9660_FS is not set
8634 +# CONFIG_JOLIET is not set
8635 +# CONFIG_ZISOFS is not set
8636 +# CONFIG_JFS_FS is not set
8637 +# CONFIG_JFS_DEBUG is not set
8638 +# CONFIG_JFS_STATISTICS is not set
8639 +# CONFIG_MINIX_FS is not set
8640 +# CONFIG_VXFS_FS is not set
8641 +# CONFIG_NTFS_FS is not set
8642 +# CONFIG_NTFS_RW is not set
8643 +# CONFIG_HPFS_FS is not set
8644 +CONFIG_PROC_FS=y
8645 +# CONFIG_DEVFS_FS is not set
8646 +# CONFIG_DEVFS_MOUNT is not set
8647 +# CONFIG_DEVFS_DEBUG is not set
8648 +CONFIG_DEVPTS_FS=y
8649 +# CONFIG_QNX4FS_FS is not set
8650 +# CONFIG_QNX4FS_RW is not set
8651 +# CONFIG_ROMFS_FS is not set
8652 +CONFIG_EXT2_FS=y
8653 +# CONFIG_SYSV_FS is not set
8654 +# CONFIG_UDF_FS is not set
8655 +# CONFIG_UDF_RW is not set
8656 +# CONFIG_UFS_FS is not set
8657 +# CONFIG_UFS_FS_WRITE is not set
8658 +# CONFIG_XFS_FS is not set
8659 +# CONFIG_XFS_QUOTA is not set
8660 +# CONFIG_XFS_RT is not set
8661 +# CONFIG_XFS_TRACE is not set
8662 +# CONFIG_XFS_DEBUG is not set
8663 +
8664 +#
8665 +# Network File Systems
8666 +#
8667 +# CONFIG_CODA_FS is not set
8668 +# CONFIG_INTERMEZZO_FS is not set
8669 +CONFIG_NFS_FS=y
8670 +CONFIG_NFS_V3=y
8671 +# CONFIG_NFS_DIRECTIO is not set
8672 +CONFIG_ROOT_NFS=y
8673 +# CONFIG_NFSD is not set
8674 +# CONFIG_NFSD_V3 is not set
8675 +# CONFIG_NFSD_TCP is not set
8676 +CONFIG_SUNRPC=y
8677 +CONFIG_LOCKD=y
8678 +CONFIG_LOCKD_V4=y
8679 +# CONFIG_SMB_FS is not set
8680 +# CONFIG_NCP_FS is not set
8681 +# CONFIG_NCPFS_PACKET_SIGNING is not set
8682 +# CONFIG_NCPFS_IOCTL_LOCKING is not set
8683 +# CONFIG_NCPFS_STRONG is not set
8684 +# CONFIG_NCPFS_NFS_NS is not set
8685 +# CONFIG_NCPFS_OS2_NS is not set
8686 +# CONFIG_NCPFS_SMALLDOS is not set
8687 +# CONFIG_NCPFS_NLS is not set
8688 +# CONFIG_NCPFS_EXTRAS is not set
8689 +# CONFIG_ZISOFS_FS is not set
8690 +
8691 +#
8692 +# Partition Types
8693 +#
8694 +# CONFIG_PARTITION_ADVANCED is not set
8695 +CONFIG_MSDOS_PARTITION=y
8696 +# CONFIG_SMB_NLS is not set
8697 +CONFIG_NLS=y
8698 +
8699 +#
8700 +# Native Language Support
8701 +#
8702 +CONFIG_NLS_DEFAULT="iso8859-1"
8703 +# CONFIG_NLS_CODEPAGE_437 is not set
8704 +# CONFIG_NLS_CODEPAGE_737 is not set
8705 +# CONFIG_NLS_CODEPAGE_775 is not set
8706 +# CONFIG_NLS_CODEPAGE_850 is not set
8707 +# CONFIG_NLS_CODEPAGE_852 is not set
8708 +# CONFIG_NLS_CODEPAGE_855 is not set
8709 +# CONFIG_NLS_CODEPAGE_857 is not set
8710 +# CONFIG_NLS_CODEPAGE_860 is not set
8711 +# CONFIG_NLS_CODEPAGE_861 is not set
8712 +# CONFIG_NLS_CODEPAGE_862 is not set
8713 +# CONFIG_NLS_CODEPAGE_863 is not set
8714 +# CONFIG_NLS_CODEPAGE_864 is not set
8715 +# CONFIG_NLS_CODEPAGE_865 is not set
8716 +# CONFIG_NLS_CODEPAGE_866 is not set
8717 +# CONFIG_NLS_CODEPAGE_869 is not set
8718 +# CONFIG_NLS_CODEPAGE_936 is not set
8719 +# CONFIG_NLS_CODEPAGE_950 is not set
8720 +# CONFIG_NLS_CODEPAGE_932 is not set
8721 +# CONFIG_NLS_CODEPAGE_949 is not set
8722 +# CONFIG_NLS_CODEPAGE_874 is not set
8723 +# CONFIG_NLS_ISO8859_8 is not set
8724 +# CONFIG_NLS_CODEPAGE_1250 is not set
8725 +# CONFIG_NLS_CODEPAGE_1251 is not set
8726 +# CONFIG_NLS_ISO8859_1 is not set
8727 +# CONFIG_NLS_ISO8859_2 is not set
8728 +# CONFIG_NLS_ISO8859_3 is not set
8729 +# CONFIG_NLS_ISO8859_4 is not set
8730 +# CONFIG_NLS_ISO8859_5 is not set
8731 +# CONFIG_NLS_ISO8859_6 is not set
8732 +# CONFIG_NLS_ISO8859_7 is not set
8733 +# CONFIG_NLS_ISO8859_9 is not set
8734 +# CONFIG_NLS_ISO8859_13 is not set
8735 +# CONFIG_NLS_ISO8859_14 is not set
8736 +# CONFIG_NLS_ISO8859_15 is not set
8737 +# CONFIG_NLS_KOI8_R is not set
8738 +# CONFIG_NLS_KOI8_U is not set
8739 +# CONFIG_NLS_UTF8 is not set
8740 +
8741 +#
8742 +# Multimedia devices
8743 +#
8744 +# CONFIG_VIDEO_DEV is not set
8745 +
8746 +#
8747 +# Console drivers
8748 +#
8749 +# CONFIG_VGA_CONSOLE is not set
8750 +# CONFIG_MDA_CONSOLE is not set
8751 +
8752 +#
8753 +# Frame-buffer support
8754 +#
8755 +CONFIG_FB=y
8756 +CONFIG_DUMMY_CONSOLE=y
8757 +# CONFIG_FB_RIVA is not set
8758 +# CONFIG_FB_CLGEN is not set
8759 +# CONFIG_FB_PM2 is not set
8760 +# CONFIG_FB_PM3 is not set
8761 +# CONFIG_FB_CYBER2000 is not set
8762 +# CONFIG_FB_MATROX is not set
8763 +# CONFIG_FB_ATY is not set
8764 +# CONFIG_FB_RADEON is not set
8765 +# CONFIG_FB_ATY128 is not set
8766 +# CONFIG_FB_INTEL is not set
8767 +# CONFIG_FB_SIS is not set
8768 +# CONFIG_FB_NEOMAGIC is not set
8769 +# CONFIG_FB_3DFX is not set
8770 +# CONFIG_FB_VOODOO1 is not set
8771 +# CONFIG_FB_TRIDENT is not set
8772 +# CONFIG_FB_E1356 is not set
8773 +# CONFIG_FB_IT8181 is not set
8774 +# CONFIG_FB_VIRTUAL is not set
8775 +CONFIG_FBCON_ADVANCED=y
8776 +# CONFIG_FBCON_MFB is not set
8777 +# CONFIG_FBCON_CFB2 is not set
8778 +# CONFIG_FBCON_CFB4 is not set
8779 +# CONFIG_FBCON_CFB8 is not set
8780 +CONFIG_FBCON_CFB16=y
8781 +# CONFIG_FBCON_CFB24 is not set
8782 +CONFIG_FBCON_CFB32=y
8783 +# CONFIG_FBCON_AFB is not set
8784 +# CONFIG_FBCON_ILBM is not set
8785 +# CONFIG_FBCON_IPLAN2P2 is not set
8786 +# CONFIG_FBCON_IPLAN2P4 is not set
8787 +# CONFIG_FBCON_IPLAN2P8 is not set
8788 +# CONFIG_FBCON_MAC is not set
8789 +# CONFIG_FBCON_VGA_PLANES is not set
8790 +# CONFIG_FBCON_VGA is not set
8791 +# CONFIG_FBCON_HGA is not set
8792 +# CONFIG_FBCON_FONTWIDTH8_ONLY is not set
8793 +CONFIG_FBCON_FONTS=y
8794 +CONFIG_FONT_8x8=y
8795 +CONFIG_FONT_8x16=y
8796 +# CONFIG_FONT_SUN8x16 is not set
8797 +# CONFIG_FONT_SUN12x22 is not set
8798 +# CONFIG_FONT_6x11 is not set
8799 +# CONFIG_FONT_PEARL_8x8 is not set
8800 +# CONFIG_FONT_ACORN_8x8 is not set
8801 +
8802 +#
8803 +# Sound
8804 +#
8805 +CONFIG_SOUND=y
8806 +# CONFIG_SOUND_ALI5455 is not set
8807 +# CONFIG_SOUND_BT878 is not set
8808 +# CONFIG_SOUND_CMPCI is not set
8809 +# CONFIG_SOUND_EMU10K1 is not set
8810 +# CONFIG_MIDI_EMU10K1 is not set
8811 +# CONFIG_SOUND_FUSION is not set
8812 +# CONFIG_SOUND_CS4281 is not set
8813 +# CONFIG_SOUND_ES1370 is not set
8814 +# CONFIG_SOUND_ES1371 is not set
8815 +# CONFIG_SOUND_ESSSOLO1 is not set
8816 +# CONFIG_SOUND_MAESTRO is not set
8817 +# CONFIG_SOUND_MAESTRO3 is not set
8818 +# CONFIG_SOUND_FORTE is not set
8819 +# CONFIG_SOUND_ICH is not set
8820 +# CONFIG_SOUND_RME96XX is not set
8821 +# CONFIG_SOUND_SONICVIBES is not set
8822 +# CONFIG_SOUND_AU1X00 is not set
8823 +CONFIG_SOUND_AU1550_PSC=y
8824 +# CONFIG_SOUND_AU1550_I2S is not set
8825 +# CONFIG_SOUND_TRIDENT is not set
8826 +# CONFIG_SOUND_MSNDCLAS is not set
8827 +# CONFIG_SOUND_MSNDPIN is not set
8828 +# CONFIG_SOUND_VIA82CXXX is not set
8829 +# CONFIG_MIDI_VIA82CXXX is not set
8830 +# CONFIG_SOUND_OSS is not set
8831 +# CONFIG_SOUND_TVMIXER is not set
8832 +# CONFIG_SOUND_AD1980 is not set
8833 +# CONFIG_SOUND_WM97XX is not set
8834 +
8835 +#
8836 +# USB support
8837 +#
8838 +CONFIG_USB=y
8839 +# CONFIG_USB_DEBUG is not set
8840 +
8841 +#
8842 +# Miscellaneous USB options
8843 +#
8844 +CONFIG_USB_DEVICEFS=y
8845 +# CONFIG_USB_BANDWIDTH is not set
8846 +
8847 +#
8848 +# USB Host Controller Drivers
8849 +#
8850 +# CONFIG_USB_EHCI_HCD is not set
8851 +# CONFIG_USB_UHCI is not set
8852 +# CONFIG_USB_UHCI_ALT is not set
8853 +CONFIG_USB_OHCI=y
8854 +
8855 +#
8856 +# USB Device Class drivers
8857 +#
8858 +# CONFIG_USB_AUDIO is not set
8859 +# CONFIG_USB_EMI26 is not set
8860 +# CONFIG_USB_BLUETOOTH is not set
8861 +# CONFIG_USB_MIDI is not set
8862 +CONFIG_USB_STORAGE=y
8863 +# CONFIG_USB_STORAGE_DEBUG is not set
8864 +# CONFIG_USB_STORAGE_DATAFAB is not set
8865 +# CONFIG_USB_STORAGE_FREECOM is not set
8866 +# CONFIG_USB_STORAGE_ISD200 is not set
8867 +# CONFIG_USB_STORAGE_DPCM is not set
8868 +# CONFIG_USB_STORAGE_HP8200e is not set
8869 +# CONFIG_USB_STORAGE_SDDR09 is not set
8870 +# CONFIG_USB_STORAGE_SDDR55 is not set
8871 +# CONFIG_USB_STORAGE_JUMPSHOT is not set
8872 +# CONFIG_USB_ACM is not set
8873 +# CONFIG_USB_PRINTER is not set
8874 +
8875 +#
8876 +# USB Human Interface Devices (HID)
8877 +#
8878 +CONFIG_USB_HID=y
8879 +CONFIG_USB_HIDINPUT=y
8880 +CONFIG_USB_HIDDEV=y
8881 +# CONFIG_USB_AIPTEK is not set
8882 +# CONFIG_USB_WACOM is not set
8883 +# CONFIG_USB_KBTAB is not set
8884 +# CONFIG_USB_POWERMATE is not set
8885 +
8886 +#
8887 +# USB Imaging devices
8888 +#
8889 +# CONFIG_USB_DC2XX is not set
8890 +# CONFIG_USB_MDC800 is not set
8891 +# CONFIG_USB_SCANNER is not set
8892 +# CONFIG_USB_MICROTEK is not set
8893 +# CONFIG_USB_HPUSBSCSI is not set
8894 +
8895 +#
8896 +# USB Multimedia devices
8897 +#
8898 +
8899 +#
8900 +# Video4Linux support is needed for USB Multimedia device support
8901 +#
8902 +
8903 +#
8904 +# USB Network adaptors
8905 +#
8906 +# CONFIG_USB_PEGASUS is not set
8907 +# CONFIG_USB_RTL8150 is not set
8908 +# CONFIG_USB_KAWETH is not set
8909 +# CONFIG_USB_CATC is not set
8910 +# CONFIG_USB_CDCETHER is not set
8911 +# CONFIG_USB_USBNET is not set
8912 +
8913 +#
8914 +# USB port drivers
8915 +#
8916 +# CONFIG_USB_USS720 is not set
8917 +
8918 +#
8919 +# USB Serial Converter support
8920 +#
8921 +# CONFIG_USB_SERIAL is not set
8922 +
8923 +#
8924 +# USB Miscellaneous drivers
8925 +#
8926 +# CONFIG_USB_RIO500 is not set
8927 +# CONFIG_USB_AUERSWALD is not set
8928 +# CONFIG_USB_TIGL is not set
8929 +# CONFIG_USB_BRLVGER is not set
8930 +# CONFIG_USB_LCD is not set
8931 +
8932 +#
8933 +# Support for USB gadgets
8934 +#
8935 +# CONFIG_USB_GADGET is not set
8936 +
8937 +#
8938 +# Bluetooth support
8939 +#
8940 +# CONFIG_BLUEZ is not set
8941 +
8942 +#
8943 +# Kernel hacking
8944 +#
8945 +CONFIG_CROSSCOMPILE=y
8946 +# CONFIG_RUNTIME_DEBUG is not set
8947 +# CONFIG_KGDB is not set
8948 +# CONFIG_GDB_CONSOLE is not set
8949 +# CONFIG_DEBUG_INFO is not set
8950 +# CONFIG_MAGIC_SYSRQ is not set
8951 +# CONFIG_MIPS_UNCACHED is not set
8952 +CONFIG_LOG_BUF_SHIFT=0
8953 +
8954 +#
8955 +# Cryptographic options
8956 +#
8957 +# CONFIG_CRYPTO is not set
8958 +
8959 +#
8960 +# Library routines
8961 +#
8962 +# CONFIG_CRC32 is not set
8963 +CONFIG_ZLIB_INFLATE=m
8964 +CONFIG_ZLIB_DEFLATE=m
8965 +# CONFIG_FW_LOADER is not set
8966 diff -Nur linux-2.4.30/arch/mips/defconfig-pb1500 linux-2.4.30-mips/arch/mips/defconfig-pb1500
8967 --- linux-2.4.30/arch/mips/defconfig-pb1500 2005-01-19 15:09:28.000000000 +0100
8968 +++ linux-2.4.30-mips/arch/mips/defconfig-pb1500 2005-03-18 13:13:21.000000000 +0100
8969 @@ -30,8 +30,8 @@
8970 # CONFIG_MIPS_PB1000 is not set
8971 # CONFIG_MIPS_PB1100 is not set
8972 CONFIG_MIPS_PB1500=y
8973 -# CONFIG_MIPS_HYDROGEN3 is not set
8974 # CONFIG_MIPS_PB1550 is not set
8975 +# CONFIG_MIPS_HYDROGEN3 is not set
8976 # CONFIG_MIPS_XXS1500 is not set
8977 # CONFIG_MIPS_MTX1 is not set
8978 # CONFIG_COGENT_CSB250 is not set
8979 @@ -215,9 +215,7 @@
8980 # CONFIG_MTD_MTX1 is not set
8981 CONFIG_MTD_PB1500_BOOT=y
8982 # CONFIG_MTD_PB1500_USER is not set
8983 -# CONFIG_MTD_DB1X00 is not set
8984 # CONFIG_MTD_PB1550 is not set
8985 -# CONFIG_MTD_HYDROGEN3 is not set
8986 # CONFIG_MTD_MIRAGE is not set
8987 # CONFIG_MTD_CSTM_MIPS_IXX is not set
8988 # CONFIG_MTD_OCELOT is not set
8989 @@ -236,7 +234,6 @@
8990 #
8991 # Disk-On-Chip Device Drivers
8992 #
8993 -# CONFIG_MTD_DOC1000 is not set
8994 # CONFIG_MTD_DOC2000 is not set
8995 # CONFIG_MTD_DOC2001 is not set
8996 # CONFIG_MTD_DOCPROBE is not set
8997 @@ -341,11 +338,6 @@
8998 #
8999 # CONFIG_IPX is not set
9000 # CONFIG_ATALK is not set
9001 -
9002 -#
9003 -# Appletalk devices
9004 -#
9005 -# CONFIG_DEV_APPLETALK is not set
9006 # CONFIG_DECNET is not set
9007 # CONFIG_BRIDGE is not set
9008 # CONFIG_X25 is not set
9009 @@ -675,7 +667,6 @@
9010 # CONFIG_AU1X00_USB_TTY is not set
9011 # CONFIG_AU1X00_USB_RAW is not set
9012 # CONFIG_TXX927_SERIAL is not set
9013 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9014 CONFIG_UNIX98_PTYS=y
9015 CONFIG_UNIX98_PTY_COUNT=256
9016
9017 diff -Nur linux-2.4.30/arch/mips/defconfig-pb1550 linux-2.4.30-mips/arch/mips/defconfig-pb1550
9018 --- linux-2.4.30/arch/mips/defconfig-pb1550 2005-01-19 15:09:29.000000000 +0100
9019 +++ linux-2.4.30-mips/arch/mips/defconfig-pb1550 2005-03-18 13:13:21.000000000 +0100
9020 @@ -30,8 +30,8 @@
9021 # CONFIG_MIPS_PB1000 is not set
9022 # CONFIG_MIPS_PB1100 is not set
9023 # CONFIG_MIPS_PB1500 is not set
9024 -# CONFIG_MIPS_HYDROGEN3 is not set
9025 CONFIG_MIPS_PB1550=y
9026 +# CONFIG_MIPS_HYDROGEN3 is not set
9027 # CONFIG_MIPS_XXS1500 is not set
9028 # CONFIG_MIPS_MTX1 is not set
9029 # CONFIG_COGENT_CSB250 is not set
9030 @@ -213,11 +213,9 @@
9031 # CONFIG_MTD_BOSPORUS is not set
9032 # CONFIG_MTD_XXS1500 is not set
9033 # CONFIG_MTD_MTX1 is not set
9034 -# CONFIG_MTD_DB1X00 is not set
9035 CONFIG_MTD_PB1550=y
9036 CONFIG_MTD_PB1550_BOOT=y
9037 CONFIG_MTD_PB1550_USER=y
9038 -# CONFIG_MTD_HYDROGEN3 is not set
9039 # CONFIG_MTD_MIRAGE is not set
9040 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9041 # CONFIG_MTD_OCELOT is not set
9042 @@ -236,7 +234,6 @@
9043 #
9044 # Disk-On-Chip Device Drivers
9045 #
9046 -# CONFIG_MTD_DOC1000 is not set
9047 # CONFIG_MTD_DOC2000 is not set
9048 # CONFIG_MTD_DOC2001 is not set
9049 # CONFIG_MTD_DOCPROBE is not set
9050 @@ -343,11 +340,6 @@
9051 #
9052 # CONFIG_IPX is not set
9053 # CONFIG_ATALK is not set
9054 -
9055 -#
9056 -# Appletalk devices
9057 -#
9058 -# CONFIG_DEV_APPLETALK is not set
9059 # CONFIG_DECNET is not set
9060 # CONFIG_BRIDGE is not set
9061 # CONFIG_X25 is not set
9062 @@ -633,7 +625,6 @@
9063 # CONFIG_AU1X00_USB_TTY is not set
9064 # CONFIG_AU1X00_USB_RAW is not set
9065 # CONFIG_TXX927_SERIAL is not set
9066 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9067 CONFIG_UNIX98_PTYS=y
9068 CONFIG_UNIX98_PTY_COUNT=256
9069
9070 diff -Nur linux-2.4.30/arch/mips/defconfig-rbtx4927 linux-2.4.30-mips/arch/mips/defconfig-rbtx4927
9071 --- linux-2.4.30/arch/mips/defconfig-rbtx4927 2005-01-19 15:09:29.000000000 +0100
9072 +++ linux-2.4.30-mips/arch/mips/defconfig-rbtx4927 2005-03-18 13:13:21.000000000 +0100
9073 @@ -28,8 +28,8 @@
9074 # CONFIG_MIPS_PB1000 is not set
9075 # CONFIG_MIPS_PB1100 is not set
9076 # CONFIG_MIPS_PB1500 is not set
9077 -# CONFIG_MIPS_HYDROGEN3 is not set
9078 # CONFIG_MIPS_PB1550 is not set
9079 +# CONFIG_MIPS_HYDROGEN3 is not set
9080 # CONFIG_MIPS_XXS1500 is not set
9081 # CONFIG_MIPS_MTX1 is not set
9082 # CONFIG_COGENT_CSB250 is not set
9083 @@ -223,11 +223,6 @@
9084 #
9085 # CONFIG_IPX is not set
9086 # CONFIG_ATALK is not set
9087 -
9088 -#
9089 -# Appletalk devices
9090 -#
9091 -# CONFIG_DEV_APPLETALK is not set
9092 # CONFIG_DECNET is not set
9093 # CONFIG_BRIDGE is not set
9094 # CONFIG_X25 is not set
9095 @@ -466,7 +461,6 @@
9096 CONFIG_SERIAL_TXX9=y
9097 CONFIG_SERIAL_TXX9_CONSOLE=y
9098 # CONFIG_TXX927_SERIAL is not set
9099 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9100 # CONFIG_UNIX98_PTYS is not set
9101
9102 #
9103 diff -Nur linux-2.4.30/arch/mips/defconfig-rm200 linux-2.4.30-mips/arch/mips/defconfig-rm200
9104 --- linux-2.4.30/arch/mips/defconfig-rm200 2005-01-19 15:09:29.000000000 +0100
9105 +++ linux-2.4.30-mips/arch/mips/defconfig-rm200 2005-03-18 13:13:21.000000000 +0100
9106 @@ -30,8 +30,8 @@
9107 # CONFIG_MIPS_PB1000 is not set
9108 # CONFIG_MIPS_PB1100 is not set
9109 # CONFIG_MIPS_PB1500 is not set
9110 -# CONFIG_MIPS_HYDROGEN3 is not set
9111 # CONFIG_MIPS_PB1550 is not set
9112 +# CONFIG_MIPS_HYDROGEN3 is not set
9113 # CONFIG_MIPS_XXS1500 is not set
9114 # CONFIG_MIPS_MTX1 is not set
9115 # CONFIG_COGENT_CSB250 is not set
9116 @@ -229,11 +229,6 @@
9117 #
9118 # CONFIG_IPX is not set
9119 # CONFIG_ATALK is not set
9120 -
9121 -#
9122 -# Appletalk devices
9123 -#
9124 -# CONFIG_DEV_APPLETALK is not set
9125 # CONFIG_DECNET is not set
9126 # CONFIG_BRIDGE is not set
9127 # CONFIG_X25 is not set
9128 @@ -340,7 +335,6 @@
9129 # CONFIG_SERIAL is not set
9130 # CONFIG_SERIAL_EXTENDED is not set
9131 # CONFIG_SERIAL_NONSTANDARD is not set
9132 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9133 CONFIG_UNIX98_PTYS=y
9134 CONFIG_UNIX98_PTY_COUNT=256
9135
9136 diff -Nur linux-2.4.30/arch/mips/defconfig-sb1250-swarm linux-2.4.30-mips/arch/mips/defconfig-sb1250-swarm
9137 --- linux-2.4.30/arch/mips/defconfig-sb1250-swarm 2005-01-19 15:09:29.000000000 +0100
9138 +++ linux-2.4.30-mips/arch/mips/defconfig-sb1250-swarm 2005-03-18 13:13:21.000000000 +0100
9139 @@ -30,8 +30,8 @@
9140 # CONFIG_MIPS_PB1000 is not set
9141 # CONFIG_MIPS_PB1100 is not set
9142 # CONFIG_MIPS_PB1500 is not set
9143 -# CONFIG_MIPS_HYDROGEN3 is not set
9144 # CONFIG_MIPS_PB1550 is not set
9145 +# CONFIG_MIPS_HYDROGEN3 is not set
9146 # CONFIG_MIPS_XXS1500 is not set
9147 # CONFIG_MIPS_MTX1 is not set
9148 # CONFIG_COGENT_CSB250 is not set
9149 @@ -90,6 +90,7 @@
9150 # CONFIG_SIBYTE_TBPROF is not set
9151 CONFIG_SIBYTE_GENBUS_IDE=y
9152 CONFIG_SMP_CAPABLE=y
9153 +CONFIG_MIPS_RTC=y
9154 # CONFIG_SNI_RM200_PCI is not set
9155 # CONFIG_TANBAC_TB0226 is not set
9156 # CONFIG_TANBAC_TB0229 is not set
9157 @@ -253,11 +254,6 @@
9158 #
9159 # CONFIG_IPX is not set
9160 # CONFIG_ATALK is not set
9161 -
9162 -#
9163 -# Appletalk devices
9164 -#
9165 -# CONFIG_DEV_APPLETALK is not set
9166 # CONFIG_DECNET is not set
9167 # CONFIG_BRIDGE is not set
9168 # CONFIG_X25 is not set
9169 @@ -469,7 +465,6 @@
9170 CONFIG_SIBYTE_SB1250_DUART=y
9171 CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
9172 CONFIG_SERIAL_CONSOLE=y
9173 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9174 CONFIG_UNIX98_PTYS=y
9175 CONFIG_UNIX98_PTY_COUNT=256
9176
9177 diff -Nur linux-2.4.30/arch/mips/defconfig-sead linux-2.4.30-mips/arch/mips/defconfig-sead
9178 --- linux-2.4.30/arch/mips/defconfig-sead 2005-01-19 15:09:29.000000000 +0100
9179 +++ linux-2.4.30-mips/arch/mips/defconfig-sead 2005-03-18 13:13:21.000000000 +0100
9180 @@ -28,8 +28,8 @@
9181 # CONFIG_MIPS_PB1000 is not set
9182 # CONFIG_MIPS_PB1100 is not set
9183 # CONFIG_MIPS_PB1500 is not set
9184 -# CONFIG_MIPS_HYDROGEN3 is not set
9185 # CONFIG_MIPS_PB1550 is not set
9186 +# CONFIG_MIPS_HYDROGEN3 is not set
9187 # CONFIG_MIPS_XXS1500 is not set
9188 # CONFIG_MIPS_MTX1 is not set
9189 # CONFIG_COGENT_CSB250 is not set
9190 @@ -244,7 +244,6 @@
9191 CONFIG_SERIAL_CONSOLE=y
9192 # CONFIG_SERIAL_EXTENDED is not set
9193 # CONFIG_SERIAL_NONSTANDARD is not set
9194 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9195 # CONFIG_UNIX98_PTYS is not set
9196
9197 #
9198 diff -Nur linux-2.4.30/arch/mips/defconfig-stretch linux-2.4.30-mips/arch/mips/defconfig-stretch
9199 --- linux-2.4.30/arch/mips/defconfig-stretch 2005-01-19 15:09:29.000000000 +0100
9200 +++ linux-2.4.30-mips/arch/mips/defconfig-stretch 2005-03-18 13:13:21.000000000 +0100
9201 @@ -30,8 +30,8 @@
9202 # CONFIG_MIPS_PB1000 is not set
9203 # CONFIG_MIPS_PB1100 is not set
9204 # CONFIG_MIPS_PB1500 is not set
9205 -# CONFIG_MIPS_HYDROGEN3 is not set
9206 # CONFIG_MIPS_PB1550 is not set
9207 +# CONFIG_MIPS_HYDROGEN3 is not set
9208 # CONFIG_MIPS_XXS1500 is not set
9209 # CONFIG_MIPS_MTX1 is not set
9210 # CONFIG_COGENT_CSB250 is not set
9211 @@ -240,11 +240,6 @@
9212 #
9213 # CONFIG_IPX is not set
9214 # CONFIG_ATALK is not set
9215 -
9216 -#
9217 -# Appletalk devices
9218 -#
9219 -# CONFIG_DEV_APPLETALK is not set
9220 # CONFIG_DECNET is not set
9221 # CONFIG_BRIDGE is not set
9222 # CONFIG_X25 is not set
9223 @@ -324,9 +319,11 @@
9224 # CONFIG_SCSI_MEGARAID is not set
9225 # CONFIG_SCSI_MEGARAID2 is not set
9226 # CONFIG_SCSI_SATA is not set
9227 +# CONFIG_SCSI_SATA_AHCI is not set
9228 # CONFIG_SCSI_SATA_SVW is not set
9229 # CONFIG_SCSI_ATA_PIIX is not set
9230 # CONFIG_SCSI_SATA_NV is not set
9231 +# CONFIG_SCSI_SATA_QSTOR is not set
9232 # CONFIG_SCSI_SATA_PROMISE is not set
9233 # CONFIG_SCSI_SATA_SX4 is not set
9234 # CONFIG_SCSI_SATA_SIL is not set
9235 @@ -516,7 +513,6 @@
9236 # CONFIG_SERIAL_TXX9 is not set
9237 # CONFIG_SERIAL_TXX9_CONSOLE is not set
9238 # CONFIG_TXX927_SERIAL is not set
9239 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9240 CONFIG_UNIX98_PTYS=y
9241 CONFIG_UNIX98_PTY_COUNT=256
9242
9243 diff -Nur linux-2.4.30/arch/mips/defconfig-tb0226 linux-2.4.30-mips/arch/mips/defconfig-tb0226
9244 --- linux-2.4.30/arch/mips/defconfig-tb0226 2005-01-19 15:09:29.000000000 +0100
9245 +++ linux-2.4.30-mips/arch/mips/defconfig-tb0226 2005-03-18 13:13:21.000000000 +0100
9246 @@ -30,8 +30,8 @@
9247 # CONFIG_MIPS_PB1000 is not set
9248 # CONFIG_MIPS_PB1100 is not set
9249 # CONFIG_MIPS_PB1500 is not set
9250 -# CONFIG_MIPS_HYDROGEN3 is not set
9251 # CONFIG_MIPS_PB1550 is not set
9252 +# CONFIG_MIPS_HYDROGEN3 is not set
9253 # CONFIG_MIPS_XXS1500 is not set
9254 # CONFIG_MIPS_MTX1 is not set
9255 # CONFIG_COGENT_CSB250 is not set
9256 @@ -228,11 +228,6 @@
9257 #
9258 # CONFIG_IPX is not set
9259 # CONFIG_ATALK is not set
9260 -
9261 -#
9262 -# Appletalk devices
9263 -#
9264 -# CONFIG_DEV_APPLETALK is not set
9265 # CONFIG_DECNET is not set
9266 # CONFIG_BRIDGE is not set
9267 # CONFIG_X25 is not set
9268 @@ -312,9 +307,11 @@
9269 # CONFIG_SCSI_MEGARAID is not set
9270 # CONFIG_SCSI_MEGARAID2 is not set
9271 # CONFIG_SCSI_SATA is not set
9272 +# CONFIG_SCSI_SATA_AHCI is not set
9273 # CONFIG_SCSI_SATA_SVW is not set
9274 # CONFIG_SCSI_ATA_PIIX is not set
9275 # CONFIG_SCSI_SATA_NV is not set
9276 +# CONFIG_SCSI_SATA_QSTOR is not set
9277 # CONFIG_SCSI_SATA_PROMISE is not set
9278 # CONFIG_SCSI_SATA_SX4 is not set
9279 # CONFIG_SCSI_SATA_SIL is not set
9280 @@ -518,7 +515,6 @@
9281 CONFIG_SERIAL_CONSOLE=y
9282 # CONFIG_SERIAL_EXTENDED is not set
9283 # CONFIG_SERIAL_NONSTANDARD is not set
9284 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9285 # CONFIG_VR41XX_KIU is not set
9286 CONFIG_UNIX98_PTYS=y
9287 CONFIG_UNIX98_PTY_COUNT=256
9288 diff -Nur linux-2.4.30/arch/mips/defconfig-tb0229 linux-2.4.30-mips/arch/mips/defconfig-tb0229
9289 --- linux-2.4.30/arch/mips/defconfig-tb0229 2005-01-19 15:09:29.000000000 +0100
9290 +++ linux-2.4.30-mips/arch/mips/defconfig-tb0229 2005-03-18 13:13:21.000000000 +0100
9291 @@ -30,8 +30,8 @@
9292 # CONFIG_MIPS_PB1000 is not set
9293 # CONFIG_MIPS_PB1100 is not set
9294 # CONFIG_MIPS_PB1500 is not set
9295 -# CONFIG_MIPS_HYDROGEN3 is not set
9296 # CONFIG_MIPS_PB1550 is not set
9297 +# CONFIG_MIPS_HYDROGEN3 is not set
9298 # CONFIG_MIPS_XXS1500 is not set
9299 # CONFIG_MIPS_MTX1 is not set
9300 # CONFIG_COGENT_CSB250 is not set
9301 @@ -230,11 +230,6 @@
9302 #
9303 # CONFIG_IPX is not set
9304 # CONFIG_ATALK is not set
9305 -
9306 -#
9307 -# Appletalk devices
9308 -#
9309 -# CONFIG_DEV_APPLETALK is not set
9310 # CONFIG_DECNET is not set
9311 # CONFIG_BRIDGE is not set
9312 # CONFIG_X25 is not set
9313 @@ -445,7 +440,6 @@
9314 CONFIG_SERIAL_CONSOLE=y
9315 # CONFIG_SERIAL_EXTENDED is not set
9316 # CONFIG_SERIAL_NONSTANDARD is not set
9317 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9318 # CONFIG_VR41XX_KIU is not set
9319 CONFIG_UNIX98_PTYS=y
9320 CONFIG_UNIX98_PTY_COUNT=256
9321 diff -Nur linux-2.4.30/arch/mips/defconfig-ti1500 linux-2.4.30-mips/arch/mips/defconfig-ti1500
9322 --- linux-2.4.30/arch/mips/defconfig-ti1500 2005-01-19 15:09:29.000000000 +0100
9323 +++ linux-2.4.30-mips/arch/mips/defconfig-ti1500 2005-03-18 13:13:21.000000000 +0100
9324 @@ -30,8 +30,8 @@
9325 # CONFIG_MIPS_PB1000 is not set
9326 # CONFIG_MIPS_PB1100 is not set
9327 # CONFIG_MIPS_PB1500 is not set
9328 -# CONFIG_MIPS_HYDROGEN3 is not set
9329 # CONFIG_MIPS_PB1550 is not set
9330 +# CONFIG_MIPS_HYDROGEN3 is not set
9331 CONFIG_MIPS_XXS1500=y
9332 # CONFIG_MIPS_MTX1 is not set
9333 # CONFIG_COGENT_CSB250 is not set
9334 @@ -213,9 +213,7 @@
9335 # CONFIG_MTD_BOSPORUS is not set
9336 CONFIG_MTD_XXS1500=y
9337 # CONFIG_MTD_MTX1 is not set
9338 -# CONFIG_MTD_DB1X00 is not set
9339 # CONFIG_MTD_PB1550 is not set
9340 -# CONFIG_MTD_HYDROGEN3 is not set
9341 # CONFIG_MTD_MIRAGE is not set
9342 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9343 # CONFIG_MTD_OCELOT is not set
9344 @@ -234,7 +232,6 @@
9345 #
9346 # Disk-On-Chip Device Drivers
9347 #
9348 -# CONFIG_MTD_DOC1000 is not set
9349 # CONFIG_MTD_DOC2000 is not set
9350 # CONFIG_MTD_DOC2001 is not set
9351 # CONFIG_MTD_DOCPROBE is not set
9352 @@ -339,11 +336,6 @@
9353 #
9354 # CONFIG_IPX is not set
9355 # CONFIG_ATALK is not set
9356 -
9357 -#
9358 -# Appletalk devices
9359 -#
9360 -# CONFIG_DEV_APPLETALK is not set
9361 # CONFIG_DECNET is not set
9362 # CONFIG_BRIDGE is not set
9363 # CONFIG_X25 is not set
9364 @@ -600,7 +592,6 @@
9365 # CONFIG_AU1X00_USB_TTY is not set
9366 # CONFIG_AU1X00_USB_RAW is not set
9367 # CONFIG_TXX927_SERIAL is not set
9368 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9369 CONFIG_UNIX98_PTYS=y
9370 CONFIG_UNIX98_PTY_COUNT=256
9371
9372 diff -Nur linux-2.4.30/arch/mips/defconfig-workpad linux-2.4.30-mips/arch/mips/defconfig-workpad
9373 --- linux-2.4.30/arch/mips/defconfig-workpad 2005-01-19 15:09:29.000000000 +0100
9374 +++ linux-2.4.30-mips/arch/mips/defconfig-workpad 2005-03-18 13:13:21.000000000 +0100
9375 @@ -30,8 +30,8 @@
9376 # CONFIG_MIPS_PB1000 is not set
9377 # CONFIG_MIPS_PB1100 is not set
9378 # CONFIG_MIPS_PB1500 is not set
9379 -# CONFIG_MIPS_HYDROGEN3 is not set
9380 # CONFIG_MIPS_PB1550 is not set
9381 +# CONFIG_MIPS_HYDROGEN3 is not set
9382 # CONFIG_MIPS_XXS1500 is not set
9383 # CONFIG_MIPS_MTX1 is not set
9384 # CONFIG_COGENT_CSB250 is not set
9385 @@ -222,11 +222,6 @@
9386 #
9387 # CONFIG_IPX is not set
9388 # CONFIG_ATALK is not set
9389 -
9390 -#
9391 -# Appletalk devices
9392 -#
9393 -# CONFIG_DEV_APPLETALK is not set
9394 # CONFIG_DECNET is not set
9395 # CONFIG_BRIDGE is not set
9396 # CONFIG_X25 is not set
9397 @@ -426,7 +421,6 @@
9398 # CONFIG_SERIAL_MULTIPORT is not set
9399 # CONFIG_HUB6 is not set
9400 # CONFIG_SERIAL_NONSTANDARD is not set
9401 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9402 # CONFIG_VR41XX_KIU is not set
9403 CONFIG_UNIX98_PTYS=y
9404 CONFIG_UNIX98_PTY_COUNT=256
9405 diff -Nur linux-2.4.30/arch/mips/defconfig-xxs1500 linux-2.4.30-mips/arch/mips/defconfig-xxs1500
9406 --- linux-2.4.30/arch/mips/defconfig-xxs1500 2005-01-19 15:09:29.000000000 +0100
9407 +++ linux-2.4.30-mips/arch/mips/defconfig-xxs1500 2005-03-18 13:13:21.000000000 +0100
9408 @@ -30,8 +30,8 @@
9409 # CONFIG_MIPS_PB1000 is not set
9410 # CONFIG_MIPS_PB1100 is not set
9411 # CONFIG_MIPS_PB1500 is not set
9412 -# CONFIG_MIPS_HYDROGEN3 is not set
9413 # CONFIG_MIPS_PB1550 is not set
9414 +# CONFIG_MIPS_HYDROGEN3 is not set
9415 CONFIG_MIPS_XXS1500=y
9416 # CONFIG_MIPS_MTX1 is not set
9417 # CONFIG_COGENT_CSB250 is not set
9418 @@ -213,9 +213,7 @@
9419 # CONFIG_MTD_BOSPORUS is not set
9420 CONFIG_MTD_XXS1500=y
9421 # CONFIG_MTD_MTX1 is not set
9422 -# CONFIG_MTD_DB1X00 is not set
9423 # CONFIG_MTD_PB1550 is not set
9424 -# CONFIG_MTD_HYDROGEN3 is not set
9425 # CONFIG_MTD_MIRAGE is not set
9426 # CONFIG_MTD_CSTM_MIPS_IXX is not set
9427 # CONFIG_MTD_OCELOT is not set
9428 @@ -234,7 +232,6 @@
9429 #
9430 # Disk-On-Chip Device Drivers
9431 #
9432 -# CONFIG_MTD_DOC1000 is not set
9433 # CONFIG_MTD_DOC2000 is not set
9434 # CONFIG_MTD_DOC2001 is not set
9435 # CONFIG_MTD_DOCPROBE is not set
9436 @@ -339,11 +336,6 @@
9437 #
9438 # CONFIG_IPX is not set
9439 # CONFIG_ATALK is not set
9440 -
9441 -#
9442 -# Appletalk devices
9443 -#
9444 -# CONFIG_DEV_APPLETALK is not set
9445 # CONFIG_DECNET is not set
9446 # CONFIG_BRIDGE is not set
9447 # CONFIG_X25 is not set
9448 @@ -671,7 +663,6 @@
9449 # CONFIG_AU1X00_USB_TTY is not set
9450 # CONFIG_AU1X00_USB_RAW is not set
9451 # CONFIG_TXX927_SERIAL is not set
9452 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9453 CONFIG_UNIX98_PTYS=y
9454 CONFIG_UNIX98_PTY_COUNT=256
9455
9456 diff -Nur linux-2.4.30/arch/mips/defconfig-yosemite linux-2.4.30-mips/arch/mips/defconfig-yosemite
9457 --- linux-2.4.30/arch/mips/defconfig-yosemite 2005-01-19 15:09:29.000000000 +0100
9458 +++ linux-2.4.30-mips/arch/mips/defconfig-yosemite 2005-03-18 13:13:21.000000000 +0100
9459 @@ -30,8 +30,8 @@
9460 # CONFIG_MIPS_PB1000 is not set
9461 # CONFIG_MIPS_PB1100 is not set
9462 # CONFIG_MIPS_PB1500 is not set
9463 -# CONFIG_MIPS_HYDROGEN3 is not set
9464 # CONFIG_MIPS_PB1550 is not set
9465 +# CONFIG_MIPS_HYDROGEN3 is not set
9466 # CONFIG_MIPS_XXS1500 is not set
9467 # CONFIG_MIPS_MTX1 is not set
9468 # CONFIG_COGENT_CSB250 is not set
9469 @@ -227,11 +227,6 @@
9470 #
9471 # CONFIG_IPX is not set
9472 # CONFIG_ATALK is not set
9473 -
9474 -#
9475 -# Appletalk devices
9476 -#
9477 -# CONFIG_DEV_APPLETALK is not set
9478 # CONFIG_DECNET is not set
9479 # CONFIG_BRIDGE is not set
9480 # CONFIG_X25 is not set
9481 @@ -310,9 +305,11 @@
9482 # CONFIG_SCSI_MEGARAID is not set
9483 # CONFIG_SCSI_MEGARAID2 is not set
9484 # CONFIG_SCSI_SATA is not set
9485 +# CONFIG_SCSI_SATA_AHCI is not set
9486 # CONFIG_SCSI_SATA_SVW is not set
9487 # CONFIG_SCSI_ATA_PIIX is not set
9488 # CONFIG_SCSI_SATA_NV is not set
9489 +# CONFIG_SCSI_SATA_QSTOR is not set
9490 # CONFIG_SCSI_SATA_PROMISE is not set
9491 # CONFIG_SCSI_SATA_SX4 is not set
9492 # CONFIG_SCSI_SATA_SIL is not set
9493 @@ -477,7 +474,6 @@
9494 # CONFIG_SERIAL_TXX9 is not set
9495 # CONFIG_SERIAL_TXX9_CONSOLE is not set
9496 # CONFIG_TXX927_SERIAL is not set
9497 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
9498 CONFIG_UNIX98_PTYS=y
9499 CONFIG_UNIX98_PTY_COUNT=256
9500
9501 diff -Nur linux-2.4.30/arch/mips/kernel/cpu-probe.c linux-2.4.30-mips/arch/mips/kernel/cpu-probe.c
9502 --- linux-2.4.30/arch/mips/kernel/cpu-probe.c 2005-01-19 15:09:29.000000000 +0100
9503 +++ linux-2.4.30-mips/arch/mips/kernel/cpu-probe.c 2005-04-08 10:33:17.000000000 +0200
9504 @@ -34,16 +34,12 @@
9505 ".set\tmips0");
9506 }
9507
9508 -/* The Au1xxx wait is available only if we run CONFIG_PM and
9509 - * the timer setup found we had a 32KHz counter available.
9510 - * There are still problems with functions that may call au1k_wait
9511 - * directly, but that will be discovered pretty quickly.
9512 - */
9513 -extern void (*au1k_wait_ptr)(void);
9514 -void au1k_wait(void)
9515 +/* The Au1xxx wait is available only if using 32khz counter or
9516 + * external timer source, but specifically not CP0 Counter. */
9517 +int allow_au1k_wait;
9518 +static void au1k_wait(void)
9519 {
9520 -#ifdef CONFIG_PM
9521 - unsigned long addr;
9522 + unsigned long addr = 0;
9523 /* using the wait instruction makes CP0 counter unusable */
9524 __asm__("la %0,au1k_wait\n\t"
9525 ".set mips3\n\t"
9526 @@ -58,10 +54,6 @@
9527 "nop\n\t"
9528 ".set mips0\n\t"
9529 : : "r" (addr));
9530 -#else
9531 - __asm__("nop\n\t"
9532 - "nop");
9533 -#endif
9534 }
9535
9536 static inline void check_wait(void)
9537 @@ -100,20 +92,17 @@
9538 cpu_wait = r4k_wait;
9539 printk(" available.\n");
9540 break;
9541 -#ifdef CONFIG_PM
9542 case CPU_AU1000:
9543 case CPU_AU1100:
9544 case CPU_AU1500:
9545 case CPU_AU1550:
9546 - if (au1k_wait_ptr != NULL) {
9547 - cpu_wait = au1k_wait_ptr;
9548 + case CPU_AU1200:
9549 + if (allow_au1k_wait) {
9550 + cpu_wait = au1k_wait;
9551 printk(" available.\n");
9552 - }
9553 - else {
9554 + } else
9555 printk(" unavailable.\n");
9556 - }
9557 break;
9558 -#endif
9559 default:
9560 printk(" unavailable.\n");
9561 break;
9562 diff -Nur linux-2.4.30/arch/mips/kernel/head.S linux-2.4.30-mips/arch/mips/kernel/head.S
9563 --- linux-2.4.30/arch/mips/kernel/head.S 2005-01-19 15:09:29.000000000 +0100
9564 +++ linux-2.4.30-mips/arch/mips/kernel/head.S 2004-11-22 14:38:23.000000000 +0100
9565 @@ -43,9 +43,9 @@
9566
9567 /* Cache Error */
9568 LEAF(except_vec2_generic)
9569 + .set push
9570 .set noreorder
9571 .set noat
9572 - .set mips0
9573 /*
9574 * This is a very bad place to be. Our cache error
9575 * detection has triggered. If we have write-back data
9576 @@ -64,10 +64,9 @@
9577
9578 j cache_parity_error
9579 nop
9580 + .set pop
9581 END(except_vec2_generic)
9582
9583 - .set at
9584 -
9585 /*
9586 * Special interrupt vector for embedded MIPS. This is a
9587 * dedicated interrupt vector which reduces interrupt processing
9588 @@ -76,8 +75,11 @@
9589 * size!
9590 */
9591 NESTED(except_vec4, 0, sp)
9592 + .set push
9593 + .set noreorder
9594 1: j 1b /* Dummy, will be replaced */
9595 nop
9596 + .set pop
9597 END(except_vec4)
9598
9599 /*
9600 @@ -87,8 +89,11 @@
9601 * unconditional jump to this vector.
9602 */
9603 NESTED(except_vec_ejtag_debug, 0, sp)
9604 + .set push
9605 + .set noreorder
9606 j ejtag_debug_handler
9607 nop
9608 + .set pop
9609 END(except_vec_ejtag_debug)
9610
9611 __FINIT
9612 @@ -97,6 +102,7 @@
9613 * EJTAG debug exception handler.
9614 */
9615 NESTED(ejtag_debug_handler, PT_SIZE, sp)
9616 + .set push
9617 .set noat
9618 .set noreorder
9619 mtc0 k0, CP0_DESAVE
9620 @@ -120,7 +126,7 @@
9621 deret
9622 .set mips0
9623 nop
9624 - .set at
9625 + .set pop
9626 END(ejtag_debug_handler)
9627
9628 __INIT
9629 @@ -132,13 +138,17 @@
9630 * unconditional jump to this vector.
9631 */
9632 NESTED(except_vec_nmi, 0, sp)
9633 + .set push
9634 + .set noreorder
9635 j nmi_handler
9636 nop
9637 + .set pop
9638 END(except_vec_nmi)
9639
9640 __FINIT
9641
9642 NESTED(nmi_handler, PT_SIZE, sp)
9643 + .set push
9644 .set noat
9645 .set noreorder
9646 .set mips3
9647 @@ -147,8 +157,7 @@
9648 move a0, sp
9649 RESTORE_ALL
9650 eret
9651 - .set at
9652 - .set mips0
9653 + .set pop
9654 END(nmi_handler)
9655
9656 __INIT
9657 @@ -157,7 +166,20 @@
9658 * Kernel entry point
9659 */
9660 NESTED(kernel_entry, 16, sp)
9661 + .set push
9662 + /*
9663 + * For the moment disable interrupts and mark the kernel mode.
9664 + * A full initialization of the CPU's status register is done
9665 + * later in per_cpu_trap_init().
9666 + */
9667 + mfc0 t0, CP0_STATUS
9668 + or t0, ST0_CU0|0x1f
9669 + xor t0, 0x1f
9670 + mtc0 t0, CP0_STATUS
9671 +
9672 .set noreorder
9673 + sll zero,3 # ehb
9674 + .set reorder
9675
9676 /*
9677 * The firmware/bootloader passes argc/argp/envp
9678 @@ -170,8 +192,8 @@
9679 la t1, (_end - 4)
9680 1:
9681 addiu t0, 4
9682 + sw zero, (t0)
9683 bne t0, t1, 1b
9684 - sw zero, (t0)
9685
9686 /*
9687 * Stack for kernel and init, current variable
9688 @@ -182,7 +204,7 @@
9689 sw t0, kernelsp
9690
9691 jal init_arch
9692 - nop
9693 + .set pop
9694 END(kernel_entry)
9695
9696
9697 @@ -193,17 +215,26 @@
9698 * function after setting up the stack and gp registers.
9699 */
9700 LEAF(smp_bootstrap)
9701 - .set push
9702 - .set noreorder
9703 - mtc0 zero, CP0_WIRED
9704 - CLI
9705 + .set push
9706 + /*
9707 + * For the moment disable interrupts and bootstrap exception
9708 + * vectors and mark the kernel mode. A full initialization of
9709 + * the CPU's status register is done later in
9710 + * per_cpu_trap_init().
9711 + */
9712 mfc0 t0, CP0_STATUS
9713 - li t1, ~(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_UX)
9714 - and t0, t1
9715 - or t0, (ST0_CU0);
9716 + or t0, ST0_CU0|ST0_BEV|0x1f
9717 + xor t0, ST0_BEV|0x1f
9718 + mtc0 t0, CP0_STATUS
9719 +
9720 + .set noreorder
9721 + sll zero,3 # ehb
9722 + .set reorder
9723 +
9724 + mtc0 zero, CP0_WIRED
9725 +
9726 jal start_secondary
9727 - mtc0 t0, CP0_STATUS
9728 - .set pop
9729 + .set pop
9730 END(smp_bootstrap)
9731 #endif
9732
9733 diff -Nur linux-2.4.30/arch/mips/kernel/scall_o32.S linux-2.4.30-mips/arch/mips/kernel/scall_o32.S
9734 --- linux-2.4.30/arch/mips/kernel/scall_o32.S 2005-01-19 15:09:29.000000000 +0100
9735 +++ linux-2.4.30-mips/arch/mips/kernel/scall_o32.S 2005-02-07 22:21:53.000000000 +0100
9736 @@ -121,15 +121,14 @@
9737
9738 trace_a_syscall:
9739 SAVE_STATIC
9740 - sw t2, PT_R1(sp)
9741 + move s0, t2
9742 jal syscall_trace
9743 - lw t2, PT_R1(sp)
9744
9745 lw a0, PT_R4(sp) # Restore argument registers
9746 lw a1, PT_R5(sp)
9747 lw a2, PT_R6(sp)
9748 lw a3, PT_R7(sp)
9749 - jalr t2
9750 + jalr s0
9751
9752 li t0, -EMAXERRNO - 1 # error?
9753 sltu t0, t0, v0
9754 diff -Nur linux-2.4.30/arch/mips/kernel/setup.c linux-2.4.30-mips/arch/mips/kernel/setup.c
9755 --- linux-2.4.30/arch/mips/kernel/setup.c 2005-01-19 15:09:29.000000000 +0100
9756 +++ linux-2.4.30-mips/arch/mips/kernel/setup.c 2005-01-13 22:15:57.000000000 +0100
9757 @@ -5,7 +5,7 @@
9758 *
9759 * Copyright (C) 1995 Linus Torvalds
9760 * Copyright (C) 1995 Waldorf Electronics
9761 - * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2001 Ralf Baechle
9762 + * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 01, 05 Ralf Baechle
9763 * Copyright (C) 1996 Stoned Elipot
9764 * Copyright (C) 2000, 2001, 2002 Maciej W. Rozycki
9765 */
9766 @@ -71,6 +71,8 @@
9767 extern struct rtc_ops no_rtc_ops;
9768 struct rtc_ops *rtc_ops;
9769
9770 +EXPORT_SYMBOL(rtc_ops);
9771 +
9772 #ifdef CONFIG_PC_KEYB
9773 struct kbd_ops *kbd_ops;
9774 #endif
9775 @@ -132,10 +134,6 @@
9776 */
9777 load_mmu();
9778
9779 - /* Disable coprocessors and set FPU for 16/32 FPR register model */
9780 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_KX|ST0_SX|ST0_FR);
9781 - set_c0_status(ST0_CU0);
9782 -
9783 start_kernel();
9784 }
9785
9786 diff -Nur linux-2.4.30/arch/mips/kernel/traps.c linux-2.4.30-mips/arch/mips/kernel/traps.c
9787 --- linux-2.4.30/arch/mips/kernel/traps.c 2005-01-19 15:09:29.000000000 +0100
9788 +++ linux-2.4.30-mips/arch/mips/kernel/traps.c 2005-04-12 22:25:34.000000000 +0200
9789 @@ -452,9 +452,10 @@
9790 }
9791 ll_task = current;
9792
9793 + compute_return_epc(regs);
9794 +
9795 regs->regs[(opcode & RT) >> 16] = value;
9796
9797 - compute_return_epc(regs);
9798 return;
9799
9800 sig:
9801 @@ -485,8 +486,8 @@
9802 goto sig;
9803 }
9804 if (ll_bit == 0 || ll_task != current) {
9805 - regs->regs[reg] = 0;
9806 compute_return_epc(regs);
9807 + regs->regs[reg] = 0;
9808 return;
9809 }
9810
9811 @@ -495,9 +496,9 @@
9812 goto sig;
9813 }
9814
9815 + compute_return_epc(regs);
9816 regs->regs[reg] = 1;
9817
9818 - compute_return_epc(regs);
9819 return;
9820
9821 sig:
9822 @@ -887,12 +888,18 @@
9823 void __init per_cpu_trap_init(void)
9824 {
9825 unsigned int cpu = smp_processor_id();
9826 + unsigned int status_set = ST0_CU0;
9827
9828 - /* Some firmware leaves the BEV flag set, clear it. */
9829 - clear_c0_status(ST0_CU3|ST0_CU2|ST0_CU1|ST0_BEV|ST0_KX|ST0_SX|ST0_UX);
9830 -
9831 + /*
9832 + * Disable coprocessors and 64-bit addressing and set FPU for
9833 + * the 16/32 FPR register model. Reset the BEV flag that some
9834 + * firmware may have left set and the TS bit (for IP27). Set
9835 + * XX for ISA IV code to work.
9836 + */
9837 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
9838 - set_c0_status(ST0_XX);
9839 + status_set |= ST0_XX;
9840 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
9841 + status_set);
9842
9843 /*
9844 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
9845 @@ -902,7 +909,7 @@
9846 set_c0_cause(CAUSEF_IV);
9847
9848 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
9849 - write_c0_context(cpu << 23);
9850 + TLBMISS_HANDLER_SETUP();
9851
9852 atomic_inc(&init_mm.mm_count);
9853 current->active_mm = &init_mm;
9854 @@ -918,8 +925,6 @@
9855 extern char except_vec4;
9856 unsigned long i;
9857
9858 - per_cpu_trap_init();
9859 -
9860 /* Copy the generic exception handler code to it's final destination. */
9861 memcpy((void *)(KSEG0 + 0x80), &except_vec1_generic, 0x80);
9862
9863 @@ -1020,10 +1025,5 @@
9864
9865 flush_icache_range(KSEG0, KSEG0 + 0x400);
9866
9867 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
9868 - current->active_mm = &init_mm;
9869 -
9870 - /* XXX Must be done for all CPUs */
9871 - current_cpu_data.asid_cache = ASID_FIRST_VERSION;
9872 - TLBMISS_HANDLER_SETUP();
9873 + per_cpu_trap_init();
9874 }
9875 diff -Nur linux-2.4.30/arch/mips/lib/rtc-no.c linux-2.4.30-mips/arch/mips/lib/rtc-no.c
9876 --- linux-2.4.30/arch/mips/lib/rtc-no.c 2004-02-18 14:36:30.000000000 +0100
9877 +++ linux-2.4.30-mips/arch/mips/lib/rtc-no.c 2005-01-13 22:15:57.000000000 +0100
9878 @@ -6,10 +6,9 @@
9879 * Stub RTC routines to keep Linux from crashing on machine which don't
9880 * have a RTC chip.
9881 *
9882 - * Copyright (C) 1998, 2001 by Ralf Baechle
9883 + * Copyright (C) 1998, 2001, 2005 by Ralf Baechle
9884 */
9885 #include <linux/kernel.h>
9886 -#include <linux/module.h>
9887 #include <linux/mc146818rtc.h>
9888
9889 static unsigned int shouldnt_happen(void)
9890 @@ -29,5 +28,3 @@
9891 .rtc_write_data = (void *) &shouldnt_happen,
9892 .rtc_bcd_mode = (void *) &shouldnt_happen
9893 };
9894 -
9895 -EXPORT_SYMBOL(rtc_ops);
9896 diff -Nur linux-2.4.30/arch/mips/lib/rtc-std.c linux-2.4.30-mips/arch/mips/lib/rtc-std.c
9897 --- linux-2.4.30/arch/mips/lib/rtc-std.c 2004-02-18 14:36:30.000000000 +0100
9898 +++ linux-2.4.30-mips/arch/mips/lib/rtc-std.c 2005-01-13 22:15:57.000000000 +0100
9899 @@ -5,9 +5,8 @@
9900 *
9901 * RTC routines for PC style attached Dallas chip.
9902 *
9903 - * Copyright (C) 1998, 2001 by Ralf Baechle
9904 + * Copyright (C) 1998, 2001, 05 by Ralf Baechle
9905 */
9906 -#include <linux/module.h>
9907 #include <linux/mc146818rtc.h>
9908 #include <asm/io.h>
9909
9910 @@ -33,5 +32,3 @@
9911 &std_rtc_write_data,
9912 &std_rtc_bcd_mode
9913 };
9914 -
9915 -EXPORT_SYMBOL(rtc_ops);
9916 diff -Nur linux-2.4.30/arch/mips/mm/c-r4k.c linux-2.4.30-mips/arch/mips/mm/c-r4k.c
9917 --- linux-2.4.30/arch/mips/mm/c-r4k.c 2005-01-19 15:09:29.000000000 +0100
9918 +++ linux-2.4.30-mips/arch/mips/mm/c-r4k.c 2005-02-06 22:55:42.000000000 +0100
9919 @@ -867,9 +867,16 @@
9920 * normally they'd suffer from aliases but magic in the hardware deals
9921 * with that for us so we don't need to take care ourselves.
9922 */
9923 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
9924 - if (c->dcache.waysize > PAGE_SIZE)
9925 - c->dcache.flags |= MIPS_CACHE_ALIASES;
9926 + switch (c->cputype) {
9927 + case CPU_R10000:
9928 + case CPU_R12000:
9929 + break;
9930 + case CPU_24K:
9931 + if (!(read_c0_config7() & (1 << 16)))
9932 + default:
9933 + if (c->dcache.waysize > PAGE_SIZE)
9934 + c->dcache.flags |= MIPS_CACHE_ALIASES;
9935 + }
9936
9937 switch (c->cputype) {
9938 case CPU_20KC:
9939 @@ -1069,9 +1076,6 @@
9940 probe_pcache();
9941 setup_scache();
9942
9943 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
9944 - c->dcache.flags |= MIPS_CACHE_ALIASES;
9945 -
9946 r4k_blast_dcache_page_setup();
9947 r4k_blast_dcache_page_indexed_setup();
9948 r4k_blast_dcache_setup();
9949 diff -Nur linux-2.4.30/arch/mips/mm/cerr-sb1.c linux-2.4.30-mips/arch/mips/mm/cerr-sb1.c
9950 --- linux-2.4.30/arch/mips/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
9951 +++ linux-2.4.30-mips/arch/mips/mm/cerr-sb1.c 2004-12-13 18:37:23.000000000 +0100
9952 @@ -252,14 +252,14 @@
9953
9954 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
9955 static const uint64_t mask_72_64[8] = {
9956 - 0x0738C808099264FFL,
9957 - 0x38C808099264FF07L,
9958 - 0xC808099264FF0738L,
9959 - 0x08099264FF0738C8L,
9960 - 0x099264FF0738C808L,
9961 - 0x9264FF0738C80809L,
9962 - 0x64FF0738C8080992L,
9963 - 0xFF0738C808099264L
9964 + 0x0738C808099264FFULL,
9965 + 0x38C808099264FF07ULL,
9966 + 0xC808099264FF0738ULL,
9967 + 0x08099264FF0738C8ULL,
9968 + 0x099264FF0738C808ULL,
9969 + 0x9264FF0738C80809ULL,
9970 + 0x64FF0738C8080992ULL,
9971 + 0xFF0738C808099264ULL
9972 };
9973
9974 /* Calculate the parity on a range of bits */
9975 @@ -331,9 +331,9 @@
9976 ((lru >> 4) & 0x3),
9977 ((lru >> 6) & 0x3));
9978 }
9979 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
9980 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
9981 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
9982 - va |= 0x3FFFF00000000000;
9983 + va |= 0x3FFFF00000000000ULL;
9984 valid = ((taghi >> 29) & 1);
9985 if (valid) {
9986 tlo_tmp = taglo & 0xfff3ff;
9987 @@ -474,7 +474,7 @@
9988 : "r" ((way << 13) | addr));
9989
9990 taglo = ((unsigned long long)taglohi << 32) | taglolo;
9991 - pa = (taglo & 0xFFFFFFE000) | addr;
9992 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
9993 if (way == 0) {
9994 lru = (taghi >> 14) & 0xff;
9995 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
9996 diff -Nur linux-2.4.30/arch/mips/mm/tlb-r4k.c linux-2.4.30-mips/arch/mips/mm/tlb-r4k.c
9997 --- linux-2.4.30/arch/mips/mm/tlb-r4k.c 2005-01-19 15:09:29.000000000 +0100
9998 +++ linux-2.4.30-mips/arch/mips/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
9999 @@ -3,17 +3,12 @@
10000 * License. See the file "COPYING" in the main directory of this archive
10001 * for more details.
10002 *
10003 - * r4xx0.c: R4000 processor variant specific MMU/Cache routines.
10004 - *
10005 * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
10006 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
10007 - *
10008 - * To do:
10009 - *
10010 - * - this code is a overbloated pig
10011 - * - many of the bug workarounds are not efficient at all, but at
10012 - * least they are functional ...
10013 + * Carsten Langgaard, carstenl@mips.com
10014 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
10015 */
10016 +#include <linux/config.h>
10017 #include <linux/init.h>
10018 #include <linux/sched.h>
10019 #include <linux/mm.h>
10020 @@ -25,9 +20,6 @@
10021 #include <asm/pgtable.h>
10022 #include <asm/system.h>
10023
10024 -#undef DEBUG_TLB
10025 -#undef DEBUG_TLBUPDATE
10026 -
10027 extern char except_vec0_nevada, except_vec0_r4000, except_vec0_r4600;
10028
10029 /* CP0 hazard avoidance. */
10030 @@ -41,33 +33,23 @@
10031 unsigned long old_ctx;
10032 int entry;
10033
10034 -#ifdef DEBUG_TLB
10035 - printk("[tlball]");
10036 -#endif
10037 -
10038 local_irq_save(flags);
10039 /* Save old context and create impossible VPN2 value */
10040 old_ctx = read_c0_entryhi();
10041 write_c0_entrylo0(0);
10042 write_c0_entrylo1(0);
10043 - BARRIER;
10044
10045 entry = read_c0_wired();
10046
10047 /* Blast 'em all away. */
10048 while (entry < current_cpu_data.tlbsize) {
10049 - /*
10050 - * Make sure all entries differ. If they're not different
10051 - * MIPS32 will take revenge ...
10052 - */
10053 write_c0_entryhi(KSEG0 + entry*0x2000);
10054 write_c0_index(entry);
10055 - BARRIER;
10056 + mtc0_tlbw_hazard();
10057 tlb_write_indexed();
10058 - BARRIER;
10059 entry++;
10060 }
10061 - BARRIER;
10062 + tlbw_use_hazard();
10063 write_c0_entryhi(old_ctx);
10064 local_irq_restore(flags);
10065 }
10066 @@ -76,12 +58,8 @@
10067 {
10068 int cpu = smp_processor_id();
10069
10070 - if (cpu_context(cpu, mm) != 0) {
10071 -#ifdef DEBUG_TLB
10072 - printk("[tlbmm<%d>]", cpu_context(cpu, mm));
10073 -#endif
10074 + if (cpu_context(cpu, mm) != 0)
10075 drop_mmu_context(mm,cpu);
10076 - }
10077 }
10078
10079 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
10080 @@ -93,10 +71,6 @@
10081 unsigned long flags;
10082 int size;
10083
10084 -#ifdef DEBUG_TLB
10085 - printk("[tlbrange<%02x,%08lx,%08lx>]",
10086 - cpu_asid(cpu, mm), start, end);
10087 -#endif
10088 local_irq_save(flags);
10089 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
10090 size = (size + 1) >> 1;
10091 @@ -112,7 +86,7 @@
10092
10093 write_c0_entryhi(start | newpid);
10094 start += (PAGE_SIZE << 1);
10095 - BARRIER;
10096 + mtc0_tlbw_hazard();
10097 tlb_probe();
10098 BARRIER;
10099 idx = read_c0_index();
10100 @@ -122,10 +96,10 @@
10101 continue;
10102 /* Make sure all entries differ. */
10103 write_c0_entryhi(KSEG0 + idx*0x2000);
10104 - BARRIER;
10105 + mtc0_tlbw_hazard();
10106 tlb_write_indexed();
10107 - BARRIER;
10108 }
10109 + tlbw_use_hazard();
10110 write_c0_entryhi(oldpid);
10111 } else {
10112 drop_mmu_context(mm, cpu);
10113 @@ -138,34 +112,30 @@
10114 {
10115 int cpu = smp_processor_id();
10116
10117 - if (!vma || cpu_context(cpu, vma->vm_mm) != 0) {
10118 + if (cpu_context(cpu, vma->vm_mm) != 0) {
10119 unsigned long flags;
10120 - int oldpid, newpid, idx;
10121 + unsigned long oldpid, newpid, idx;
10122
10123 -#ifdef DEBUG_TLB
10124 - printk("[tlbpage<%d,%08lx>]", cpu_context(cpu, vma->vm_mm),
10125 - page);
10126 -#endif
10127 newpid = cpu_asid(cpu, vma->vm_mm);
10128 page &= (PAGE_MASK << 1);
10129 local_irq_save(flags);
10130 oldpid = read_c0_entryhi();
10131 write_c0_entryhi(page | newpid);
10132 - BARRIER;
10133 + mtc0_tlbw_hazard();
10134 tlb_probe();
10135 BARRIER;
10136 idx = read_c0_index();
10137 write_c0_entrylo0(0);
10138 write_c0_entrylo1(0);
10139 - if(idx < 0)
10140 + if (idx < 0)
10141 goto finish;
10142 /* Make sure all entries differ. */
10143 write_c0_entryhi(KSEG0+idx*0x2000);
10144 - BARRIER;
10145 + mtc0_tlbw_hazard();
10146 tlb_write_indexed();
10147 + tlbw_use_hazard();
10148
10149 finish:
10150 - BARRIER;
10151 write_c0_entryhi(oldpid);
10152 local_irq_restore(flags);
10153 }
10154 @@ -185,7 +155,7 @@
10155
10156 local_irq_save(flags);
10157 write_c0_entryhi(page);
10158 - BARRIER;
10159 + mtc0_tlbw_hazard();
10160 tlb_probe();
10161 BARRIER;
10162 idx = read_c0_index();
10163 @@ -194,18 +164,19 @@
10164 if (idx >= 0) {
10165 /* Make sure all entries differ. */
10166 write_c0_entryhi(KSEG0+idx*0x2000);
10167 + mtc0_tlbw_hazard();
10168 tlb_write_indexed();
10169 + tlbw_use_hazard();
10170 }
10171 - BARRIER;
10172 write_c0_entryhi(oldpid);
10173 +
10174 local_irq_restore(flags);
10175 }
10176
10177 EXPORT_SYMBOL(local_flush_tlb_one);
10178
10179 -/* We will need multiple versions of update_mmu_cache(), one that just
10180 - * updates the TLB with the new pte(s), and another which also checks
10181 - * for the R4k "end of page" hardware bug and does the needy.
10182 +/*
10183 + * Updates the TLB with the new pte(s).
10184 */
10185 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
10186 {
10187 @@ -223,25 +194,16 @@
10188
10189 pid = read_c0_entryhi() & ASID_MASK;
10190
10191 -#ifdef DEBUG_TLB
10192 - if ((pid != cpu_asid(cpu, vma->vm_mm)) ||
10193 - (cpu_context(vma->vm_mm) == 0)) {
10194 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d "
10195 - "tlbpid=%d\n", (int) (cpu_asid(cpu, vma->vm_mm)), pid);
10196 - }
10197 -#endif
10198 -
10199 local_irq_save(flags);
10200 address &= (PAGE_MASK << 1);
10201 write_c0_entryhi(address | pid);
10202 pgdp = pgd_offset(vma->vm_mm, address);
10203 - BARRIER;
10204 + mtc0_tlbw_hazard();
10205 tlb_probe();
10206 BARRIER;
10207 pmdp = pmd_offset(pgdp, address);
10208 idx = read_c0_index();
10209 ptep = pte_offset(pmdp, address);
10210 - BARRIER;
10211 #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
10212 write_c0_entrylo0(ptep->pte_high);
10213 ptep++;
10214 @@ -251,15 +213,13 @@
10215 write_c0_entrylo1(pte_val(*ptep) >> 6);
10216 #endif
10217 write_c0_entryhi(address | pid);
10218 - BARRIER;
10219 - if (idx < 0) {
10220 + mtc0_tlbw_hazard();
10221 + if (idx < 0)
10222 tlb_write_random();
10223 - } else {
10224 + else
10225 tlb_write_indexed();
10226 - }
10227 - BARRIER;
10228 + tlbw_use_hazard();
10229 write_c0_entryhi(pid);
10230 - BARRIER;
10231 local_irq_restore(flags);
10232 }
10233
10234 @@ -279,24 +239,26 @@
10235 asid = read_c0_entryhi() & ASID_MASK;
10236 write_c0_entryhi(address | asid);
10237 pgdp = pgd_offset(vma->vm_mm, address);
10238 + mtc0_tlbw_hazard();
10239 tlb_probe();
10240 + BARRIER;
10241 pmdp = pmd_offset(pgdp, address);
10242 idx = read_c0_index();
10243 ptep = pte_offset(pmdp, address);
10244 write_c0_entrylo0(pte_val(*ptep++) >> 6);
10245 write_c0_entrylo1(pte_val(*ptep) >> 6);
10246 - BARRIER;
10247 + mtc0_tlbw_hazard();
10248 if (idx < 0)
10249 tlb_write_random();
10250 else
10251 tlb_write_indexed();
10252 - BARRIER;
10253 + tlbw_use_hazard();
10254 local_irq_restore(flags);
10255 }
10256 #endif
10257
10258 void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
10259 - unsigned long entryhi, unsigned long pagemask)
10260 + unsigned long entryhi, unsigned long pagemask)
10261 {
10262 unsigned long flags;
10263 unsigned long wired;
10264 @@ -315,9 +277,9 @@
10265 write_c0_entryhi(entryhi);
10266 write_c0_entrylo0(entrylo0);
10267 write_c0_entrylo1(entrylo1);
10268 - BARRIER;
10269 + mtc0_tlbw_hazard();
10270 tlb_write_indexed();
10271 - BARRIER;
10272 + tlbw_use_hazard();
10273
10274 write_c0_entryhi(old_ctx);
10275 BARRIER;
10276 @@ -355,17 +317,15 @@
10277 }
10278
10279 write_c0_index(temp_tlb_entry);
10280 - BARRIER;
10281 write_c0_pagemask(pagemask);
10282 write_c0_entryhi(entryhi);
10283 write_c0_entrylo0(entrylo0);
10284 write_c0_entrylo1(entrylo1);
10285 - BARRIER;
10286 + mtc0_tlbw_hazard();
10287 tlb_write_indexed();
10288 - BARRIER;
10289 + tlbw_use_hazard();
10290
10291 write_c0_entryhi(old_ctx);
10292 - BARRIER;
10293 write_c0_pagemask(old_pagemask);
10294 out:
10295 local_irq_restore(flags);
10296 @@ -375,7 +335,7 @@
10297 static void __init probe_tlb(unsigned long config)
10298 {
10299 struct cpuinfo_mips *c = &current_cpu_data;
10300 - unsigned int reg;
10301 + unsigned int config1;
10302
10303 /*
10304 * If this isn't a MIPS32 / MIPS64 compliant CPU. Config 1 register
10305 @@ -385,16 +345,16 @@
10306 if ((c->processor_id & 0xff0000) == PRID_COMP_LEGACY)
10307 return;
10308
10309 - reg = read_c0_config1();
10310 + config1 = read_c0_config1();
10311 if (!((config >> 7) & 3))
10312 panic("No TLB present");
10313
10314 - c->tlbsize = ((reg >> 25) & 0x3f) + 1;
10315 + c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
10316 }
10317
10318 void __init r4k_tlb_init(void)
10319 {
10320 - u32 config = read_c0_config();
10321 + unsigned int config = read_c0_config();
10322
10323 /*
10324 * You should never change this register:
10325 diff -Nur linux-2.4.30/arch/mips/mm/tlbex-mips32.S linux-2.4.30-mips/arch/mips/mm/tlbex-mips32.S
10326 --- linux-2.4.30/arch/mips/mm/tlbex-mips32.S 2004-02-18 14:36:30.000000000 +0100
10327 +++ linux-2.4.30-mips/arch/mips/mm/tlbex-mips32.S 2004-11-29 00:33:15.000000000 +0100
10328 @@ -196,7 +196,7 @@
10329 .set noat; \
10330 SAVE_ALL; \
10331 mfc0 a2, CP0_BADVADDR; \
10332 - STI; \
10333 + KMODE; \
10334 .set at; \
10335 move a0, sp; \
10336 jal do_page_fault; \
10337 diff -Nur linux-2.4.30/arch/mips/mm/tlbex-r4k.S linux-2.4.30-mips/arch/mips/mm/tlbex-r4k.S
10338 --- linux-2.4.30/arch/mips/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
10339 +++ linux-2.4.30-mips/arch/mips/mm/tlbex-r4k.S 2004-11-25 23:18:38.000000000 +0100
10340 @@ -184,13 +184,10 @@
10341 P_MTC0 k0, CP0_ENTRYLO0 # load it
10342 PTE_SRL k1, k1, 6 # convert to entrylo1
10343 P_MTC0 k1, CP0_ENTRYLO1 # load it
10344 - b 1f
10345 - rm9000_tlb_hazard
10346 + mtc0_tlbw_hazard
10347 tlbwr # write random tlb entry
10348 -1:
10349 - nop
10350 - rm9000_tlb_hazard
10351 - eret # return from trap
10352 + tlbw_eret_hazard
10353 + eret
10354 END(except_vec0_r4000)
10355
10356 /* TLB refill, EXL == 0, R4600 version */
10357 @@ -468,13 +465,10 @@
10358 PTE_PRESENT(k0, k1, nopage_tlbl)
10359 PTE_MAKEVALID(k0, k1)
10360 PTE_RELOAD(k1, k0)
10361 - rm9000_tlb_hazard
10362 - nop
10363 - b 1f
10364 - tlbwi
10365 -1:
10366 + mtc0_tlbw_hazard
10367 + tlbwi
10368 nop
10369 - rm9000_tlb_hazard
10370 + tlbw_eret_hazard
10371 .set mips3
10372 eret
10373 .set mips0
10374 @@ -496,13 +490,10 @@
10375 PTE_WRITABLE(k0, k1, nopage_tlbs)
10376 PTE_MAKEWRITE(k0, k1)
10377 PTE_RELOAD(k1, k0)
10378 - rm9000_tlb_hazard
10379 - nop
10380 - b 1f
10381 - tlbwi
10382 -1:
10383 + mtc0_tlbw_hazard
10384 + tlbwi
10385 nop
10386 - rm9000_tlb_hazard
10387 + tlbw_eret_hazard
10388 .set mips3
10389 eret
10390 .set mips0
10391 @@ -529,13 +520,10 @@
10392
10393 /* Now reload the entry into the tlb. */
10394 PTE_RELOAD(k1, k0)
10395 - rm9000_tlb_hazard
10396 - nop
10397 - b 1f
10398 - tlbwi
10399 -1:
10400 - rm9000_tlb_hazard
10401 + mtc0_tlbw_hazard
10402 + tlbwi
10403 nop
10404 + tlbw_eret_hazard
10405 .set mips3
10406 eret
10407 .set mips0
10408 diff -Nur linux-2.4.30/arch/mips64/defconfig linux-2.4.30-mips/arch/mips64/defconfig
10409 --- linux-2.4.30/arch/mips64/defconfig 2005-01-19 15:09:30.000000000 +0100
10410 +++ linux-2.4.30-mips/arch/mips64/defconfig 2005-03-18 13:13:23.000000000 +0100
10411 @@ -30,8 +30,8 @@
10412 # CONFIG_MIPS_PB1000 is not set
10413 # CONFIG_MIPS_PB1100 is not set
10414 # CONFIG_MIPS_PB1500 is not set
10415 -# CONFIG_MIPS_HYDROGEN3 is not set
10416 # CONFIG_MIPS_PB1550 is not set
10417 +# CONFIG_MIPS_HYDROGEN3 is not set
10418 # CONFIG_MIPS_XXS1500 is not set
10419 # CONFIG_MIPS_MTX1 is not set
10420 # CONFIG_COGENT_CSB250 is not set
10421 @@ -470,9 +470,11 @@
10422 # CONFIG_SCSI_MEGARAID is not set
10423 # CONFIG_SCSI_MEGARAID2 is not set
10424 # CONFIG_SCSI_SATA is not set
10425 +# CONFIG_SCSI_SATA_AHCI is not set
10426 # CONFIG_SCSI_SATA_SVW is not set
10427 # CONFIG_SCSI_ATA_PIIX is not set
10428 # CONFIG_SCSI_SATA_NV is not set
10429 +# CONFIG_SCSI_SATA_QSTOR is not set
10430 # CONFIG_SCSI_SATA_PROMISE is not set
10431 # CONFIG_SCSI_SATA_SX4 is not set
10432 # CONFIG_SCSI_SATA_SIL is not set
10433 @@ -658,7 +660,6 @@
10434 CONFIG_SERIAL_CONSOLE=y
10435 # CONFIG_SERIAL_EXTENDED is not set
10436 # CONFIG_SERIAL_NONSTANDARD is not set
10437 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10438 CONFIG_UNIX98_PTYS=y
10439 CONFIG_UNIX98_PTY_COUNT=256
10440
10441 diff -Nur linux-2.4.30/arch/mips64/defconfig-atlas linux-2.4.30-mips/arch/mips64/defconfig-atlas
10442 --- linux-2.4.30/arch/mips64/defconfig-atlas 2005-01-19 15:09:30.000000000 +0100
10443 +++ linux-2.4.30-mips/arch/mips64/defconfig-atlas 2005-03-18 13:13:23.000000000 +0100
10444 @@ -28,8 +28,8 @@
10445 # CONFIG_MIPS_PB1000 is not set
10446 # CONFIG_MIPS_PB1100 is not set
10447 # CONFIG_MIPS_PB1500 is not set
10448 -# CONFIG_MIPS_HYDROGEN3 is not set
10449 # CONFIG_MIPS_PB1550 is not set
10450 +# CONFIG_MIPS_HYDROGEN3 is not set
10451 # CONFIG_MIPS_XXS1500 is not set
10452 # CONFIG_MIPS_MTX1 is not set
10453 # CONFIG_COGENT_CSB250 is not set
10454 @@ -232,11 +232,6 @@
10455 #
10456 # CONFIG_IPX is not set
10457 # CONFIG_ATALK is not set
10458 -
10459 -#
10460 -# Appletalk devices
10461 -#
10462 -# CONFIG_DEV_APPLETALK is not set
10463 # CONFIG_DECNET is not set
10464 # CONFIG_BRIDGE is not set
10465 # CONFIG_X25 is not set
10466 @@ -314,9 +309,11 @@
10467 # CONFIG_SCSI_MEGARAID is not set
10468 # CONFIG_SCSI_MEGARAID2 is not set
10469 # CONFIG_SCSI_SATA is not set
10470 +# CONFIG_SCSI_SATA_AHCI is not set
10471 # CONFIG_SCSI_SATA_SVW is not set
10472 # CONFIG_SCSI_ATA_PIIX is not set
10473 # CONFIG_SCSI_SATA_NV is not set
10474 +# CONFIG_SCSI_SATA_QSTOR is not set
10475 # CONFIG_SCSI_SATA_PROMISE is not set
10476 # CONFIG_SCSI_SATA_SX4 is not set
10477 # CONFIG_SCSI_SATA_SIL is not set
10478 @@ -474,7 +471,6 @@
10479 CONFIG_SERIAL_CONSOLE=y
10480 # CONFIG_SERIAL_EXTENDED is not set
10481 # CONFIG_SERIAL_NONSTANDARD is not set
10482 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10483 CONFIG_UNIX98_PTYS=y
10484 CONFIG_UNIX98_PTY_COUNT=256
10485
10486 diff -Nur linux-2.4.30/arch/mips64/defconfig-decstation linux-2.4.30-mips/arch/mips64/defconfig-decstation
10487 --- linux-2.4.30/arch/mips64/defconfig-decstation 2005-01-19 15:09:30.000000000 +0100
10488 +++ linux-2.4.30-mips/arch/mips64/defconfig-decstation 2005-03-18 13:13:23.000000000 +0100
10489 @@ -28,8 +28,8 @@
10490 # CONFIG_MIPS_PB1000 is not set
10491 # CONFIG_MIPS_PB1100 is not set
10492 # CONFIG_MIPS_PB1500 is not set
10493 -# CONFIG_MIPS_HYDROGEN3 is not set
10494 # CONFIG_MIPS_PB1550 is not set
10495 +# CONFIG_MIPS_HYDROGEN3 is not set
10496 # CONFIG_MIPS_XXS1500 is not set
10497 # CONFIG_MIPS_MTX1 is not set
10498 # CONFIG_COGENT_CSB250 is not set
10499 @@ -224,11 +224,6 @@
10500 #
10501 # CONFIG_IPX is not set
10502 # CONFIG_ATALK is not set
10503 -
10504 -#
10505 -# Appletalk devices
10506 -#
10507 -# CONFIG_DEV_APPLETALK is not set
10508 # CONFIG_DECNET is not set
10509 # CONFIG_BRIDGE is not set
10510 # CONFIG_X25 is not set
10511 @@ -307,9 +302,11 @@
10512 # CONFIG_SCSI_MEGARAID is not set
10513 # CONFIG_SCSI_MEGARAID2 is not set
10514 # CONFIG_SCSI_SATA is not set
10515 +# CONFIG_SCSI_SATA_AHCI is not set
10516 # CONFIG_SCSI_SATA_SVW is not set
10517 # CONFIG_SCSI_ATA_PIIX is not set
10518 # CONFIG_SCSI_SATA_NV is not set
10519 +# CONFIG_SCSI_SATA_QSTOR is not set
10520 # CONFIG_SCSI_SATA_PROMISE is not set
10521 # CONFIG_SCSI_SATA_SX4 is not set
10522 # CONFIG_SCSI_SATA_SIL is not set
10523 @@ -477,7 +474,6 @@
10524 CONFIG_SERIAL_DEC_CONSOLE=y
10525 # CONFIG_DZ is not set
10526 CONFIG_ZS=y
10527 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10528 CONFIG_UNIX98_PTYS=y
10529 CONFIG_UNIX98_PTY_COUNT=256
10530
10531 diff -Nur linux-2.4.30/arch/mips64/defconfig-ip22 linux-2.4.30-mips/arch/mips64/defconfig-ip22
10532 --- linux-2.4.30/arch/mips64/defconfig-ip22 2005-01-19 15:09:31.000000000 +0100
10533 +++ linux-2.4.30-mips/arch/mips64/defconfig-ip22 2005-03-18 13:13:23.000000000 +0100
10534 @@ -30,8 +30,8 @@
10535 # CONFIG_MIPS_PB1000 is not set
10536 # CONFIG_MIPS_PB1100 is not set
10537 # CONFIG_MIPS_PB1500 is not set
10538 -# CONFIG_MIPS_HYDROGEN3 is not set
10539 # CONFIG_MIPS_PB1550 is not set
10540 +# CONFIG_MIPS_HYDROGEN3 is not set
10541 # CONFIG_MIPS_XXS1500 is not set
10542 # CONFIG_MIPS_MTX1 is not set
10543 # CONFIG_COGENT_CSB250 is not set
10544 @@ -235,11 +235,6 @@
10545 #
10546 # CONFIG_IPX is not set
10547 # CONFIG_ATALK is not set
10548 -
10549 -#
10550 -# Appletalk devices
10551 -#
10552 -# CONFIG_DEV_APPLETALK is not set
10553 # CONFIG_DECNET is not set
10554 # CONFIG_BRIDGE is not set
10555 # CONFIG_X25 is not set
10556 @@ -319,9 +314,11 @@
10557 # CONFIG_SCSI_MEGARAID is not set
10558 # CONFIG_SCSI_MEGARAID2 is not set
10559 # CONFIG_SCSI_SATA is not set
10560 +# CONFIG_SCSI_SATA_AHCI is not set
10561 # CONFIG_SCSI_SATA_SVW is not set
10562 # CONFIG_SCSI_ATA_PIIX is not set
10563 # CONFIG_SCSI_SATA_NV is not set
10564 +# CONFIG_SCSI_SATA_QSTOR is not set
10565 # CONFIG_SCSI_SATA_PROMISE is not set
10566 # CONFIG_SCSI_SATA_SX4 is not set
10567 # CONFIG_SCSI_SATA_SIL is not set
10568 @@ -488,7 +485,6 @@
10569 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10570 # CONFIG_TXX927_SERIAL is not set
10571 CONFIG_IP22_SERIAL=y
10572 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10573 CONFIG_UNIX98_PTYS=y
10574 CONFIG_UNIX98_PTY_COUNT=256
10575
10576 diff -Nur linux-2.4.30/arch/mips64/defconfig-ip27 linux-2.4.30-mips/arch/mips64/defconfig-ip27
10577 --- linux-2.4.30/arch/mips64/defconfig-ip27 2005-01-19 15:09:31.000000000 +0100
10578 +++ linux-2.4.30-mips/arch/mips64/defconfig-ip27 2005-03-18 13:13:23.000000000 +0100
10579 @@ -30,8 +30,8 @@
10580 # CONFIG_MIPS_PB1000 is not set
10581 # CONFIG_MIPS_PB1100 is not set
10582 # CONFIG_MIPS_PB1500 is not set
10583 -# CONFIG_MIPS_HYDROGEN3 is not set
10584 # CONFIG_MIPS_PB1550 is not set
10585 +# CONFIG_MIPS_HYDROGEN3 is not set
10586 # CONFIG_MIPS_XXS1500 is not set
10587 # CONFIG_MIPS_MTX1 is not set
10588 # CONFIG_COGENT_CSB250 is not set
10589 @@ -470,9 +470,11 @@
10590 # CONFIG_SCSI_MEGARAID is not set
10591 # CONFIG_SCSI_MEGARAID2 is not set
10592 # CONFIG_SCSI_SATA is not set
10593 +# CONFIG_SCSI_SATA_AHCI is not set
10594 # CONFIG_SCSI_SATA_SVW is not set
10595 # CONFIG_SCSI_ATA_PIIX is not set
10596 # CONFIG_SCSI_SATA_NV is not set
10597 +# CONFIG_SCSI_SATA_QSTOR is not set
10598 # CONFIG_SCSI_SATA_PROMISE is not set
10599 # CONFIG_SCSI_SATA_SX4 is not set
10600 # CONFIG_SCSI_SATA_SIL is not set
10601 @@ -658,7 +660,6 @@
10602 CONFIG_SERIAL_CONSOLE=y
10603 # CONFIG_SERIAL_EXTENDED is not set
10604 # CONFIG_SERIAL_NONSTANDARD is not set
10605 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10606 CONFIG_UNIX98_PTYS=y
10607 CONFIG_UNIX98_PTY_COUNT=256
10608
10609 diff -Nur linux-2.4.30/arch/mips64/defconfig-jaguar linux-2.4.30-mips/arch/mips64/defconfig-jaguar
10610 --- linux-2.4.30/arch/mips64/defconfig-jaguar 2005-01-19 15:09:31.000000000 +0100
10611 +++ linux-2.4.30-mips/arch/mips64/defconfig-jaguar 2005-03-18 13:13:23.000000000 +0100
10612 @@ -30,8 +30,8 @@
10613 # CONFIG_MIPS_PB1000 is not set
10614 # CONFIG_MIPS_PB1100 is not set
10615 # CONFIG_MIPS_PB1500 is not set
10616 -# CONFIG_MIPS_HYDROGEN3 is not set
10617 # CONFIG_MIPS_PB1550 is not set
10618 +# CONFIG_MIPS_HYDROGEN3 is not set
10619 # CONFIG_MIPS_XXS1500 is not set
10620 # CONFIG_MIPS_MTX1 is not set
10621 # CONFIG_COGENT_CSB250 is not set
10622 @@ -227,11 +227,6 @@
10623 #
10624 # CONFIG_IPX is not set
10625 # CONFIG_ATALK is not set
10626 -
10627 -#
10628 -# Appletalk devices
10629 -#
10630 -# CONFIG_DEV_APPLETALK is not set
10631 # CONFIG_DECNET is not set
10632 # CONFIG_BRIDGE is not set
10633 # CONFIG_X25 is not set
10634 @@ -403,7 +398,6 @@
10635 # CONFIG_SERIAL_TXX9 is not set
10636 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10637 # CONFIG_TXX927_SERIAL is not set
10638 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10639 CONFIG_UNIX98_PTYS=y
10640 CONFIG_UNIX98_PTY_COUNT=256
10641
10642 diff -Nur linux-2.4.30/arch/mips64/defconfig-malta linux-2.4.30-mips/arch/mips64/defconfig-malta
10643 --- linux-2.4.30/arch/mips64/defconfig-malta 2005-01-19 15:09:31.000000000 +0100
10644 +++ linux-2.4.30-mips/arch/mips64/defconfig-malta 2005-03-18 13:13:23.000000000 +0100
10645 @@ -30,8 +30,8 @@
10646 # CONFIG_MIPS_PB1000 is not set
10647 # CONFIG_MIPS_PB1100 is not set
10648 # CONFIG_MIPS_PB1500 is not set
10649 -# CONFIG_MIPS_HYDROGEN3 is not set
10650 # CONFIG_MIPS_PB1550 is not set
10651 +# CONFIG_MIPS_HYDROGEN3 is not set
10652 # CONFIG_MIPS_XXS1500 is not set
10653 # CONFIG_MIPS_MTX1 is not set
10654 # CONFIG_COGENT_CSB250 is not set
10655 @@ -235,11 +235,6 @@
10656 #
10657 # CONFIG_IPX is not set
10658 # CONFIG_ATALK is not set
10659 -
10660 -#
10661 -# Appletalk devices
10662 -#
10663 -# CONFIG_DEV_APPLETALK is not set
10664 # CONFIG_DECNET is not set
10665 # CONFIG_BRIDGE is not set
10666 # CONFIG_X25 is not set
10667 @@ -317,9 +312,11 @@
10668 # CONFIG_SCSI_MEGARAID is not set
10669 # CONFIG_SCSI_MEGARAID2 is not set
10670 # CONFIG_SCSI_SATA is not set
10671 +# CONFIG_SCSI_SATA_AHCI is not set
10672 # CONFIG_SCSI_SATA_SVW is not set
10673 # CONFIG_SCSI_ATA_PIIX is not set
10674 # CONFIG_SCSI_SATA_NV is not set
10675 +# CONFIG_SCSI_SATA_QSTOR is not set
10676 # CONFIG_SCSI_SATA_PROMISE is not set
10677 # CONFIG_SCSI_SATA_SX4 is not set
10678 # CONFIG_SCSI_SATA_SIL is not set
10679 @@ -477,7 +474,6 @@
10680 CONFIG_SERIAL_CONSOLE=y
10681 # CONFIG_SERIAL_EXTENDED is not set
10682 # CONFIG_SERIAL_NONSTANDARD is not set
10683 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10684 CONFIG_UNIX98_PTYS=y
10685 CONFIG_UNIX98_PTY_COUNT=256
10686
10687 diff -Nur linux-2.4.30/arch/mips64/defconfig-ocelotc linux-2.4.30-mips/arch/mips64/defconfig-ocelotc
10688 --- linux-2.4.30/arch/mips64/defconfig-ocelotc 2005-01-19 15:09:31.000000000 +0100
10689 +++ linux-2.4.30-mips/arch/mips64/defconfig-ocelotc 2005-03-18 13:13:23.000000000 +0100
10690 @@ -30,8 +30,8 @@
10691 # CONFIG_MIPS_PB1000 is not set
10692 # CONFIG_MIPS_PB1100 is not set
10693 # CONFIG_MIPS_PB1500 is not set
10694 -# CONFIG_MIPS_HYDROGEN3 is not set
10695 # CONFIG_MIPS_PB1550 is not set
10696 +# CONFIG_MIPS_HYDROGEN3 is not set
10697 # CONFIG_MIPS_XXS1500 is not set
10698 # CONFIG_MIPS_MTX1 is not set
10699 # CONFIG_COGENT_CSB250 is not set
10700 @@ -231,11 +231,6 @@
10701 #
10702 # CONFIG_IPX is not set
10703 # CONFIG_ATALK is not set
10704 -
10705 -#
10706 -# Appletalk devices
10707 -#
10708 -# CONFIG_DEV_APPLETALK is not set
10709 # CONFIG_DECNET is not set
10710 # CONFIG_BRIDGE is not set
10711 # CONFIG_X25 is not set
10712 @@ -453,7 +448,6 @@
10713 # CONFIG_SERIAL_TXX9 is not set
10714 # CONFIG_SERIAL_TXX9_CONSOLE is not set
10715 # CONFIG_TXX927_SERIAL is not set
10716 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10717 CONFIG_UNIX98_PTYS=y
10718 CONFIG_UNIX98_PTY_COUNT=256
10719
10720 diff -Nur linux-2.4.30/arch/mips64/defconfig-sb1250-swarm linux-2.4.30-mips/arch/mips64/defconfig-sb1250-swarm
10721 --- linux-2.4.30/arch/mips64/defconfig-sb1250-swarm 2005-01-19 15:09:31.000000000 +0100
10722 +++ linux-2.4.30-mips/arch/mips64/defconfig-sb1250-swarm 2005-03-18 13:13:23.000000000 +0100
10723 @@ -30,8 +30,8 @@
10724 # CONFIG_MIPS_PB1000 is not set
10725 # CONFIG_MIPS_PB1100 is not set
10726 # CONFIG_MIPS_PB1500 is not set
10727 -# CONFIG_MIPS_HYDROGEN3 is not set
10728 # CONFIG_MIPS_PB1550 is not set
10729 +# CONFIG_MIPS_HYDROGEN3 is not set
10730 # CONFIG_MIPS_XXS1500 is not set
10731 # CONFIG_MIPS_MTX1 is not set
10732 # CONFIG_COGENT_CSB250 is not set
10733 @@ -90,6 +90,7 @@
10734 # CONFIG_SIBYTE_TBPROF is not set
10735 CONFIG_SIBYTE_GENBUS_IDE=y
10736 CONFIG_SMP_CAPABLE=y
10737 +CONFIG_MIPS_RTC=y
10738 # CONFIG_SNI_RM200_PCI is not set
10739 # CONFIG_TANBAC_TB0226 is not set
10740 # CONFIG_TANBAC_TB0229 is not set
10741 @@ -253,11 +254,6 @@
10742 #
10743 # CONFIG_IPX is not set
10744 # CONFIG_ATALK is not set
10745 -
10746 -#
10747 -# Appletalk devices
10748 -#
10749 -# CONFIG_DEV_APPLETALK is not set
10750 # CONFIG_DECNET is not set
10751 # CONFIG_BRIDGE is not set
10752 # CONFIG_X25 is not set
10753 @@ -432,7 +428,6 @@
10754 CONFIG_SIBYTE_SB1250_DUART=y
10755 CONFIG_SIBYTE_SB1250_DUART_CONSOLE=y
10756 CONFIG_SERIAL_CONSOLE=y
10757 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10758 CONFIG_UNIX98_PTYS=y
10759 CONFIG_UNIX98_PTY_COUNT=256
10760
10761 diff -Nur linux-2.4.30/arch/mips64/defconfig-sead linux-2.4.30-mips/arch/mips64/defconfig-sead
10762 --- linux-2.4.30/arch/mips64/defconfig-sead 2005-01-19 15:09:31.000000000 +0100
10763 +++ linux-2.4.30-mips/arch/mips64/defconfig-sead 2005-03-18 13:13:23.000000000 +0100
10764 @@ -28,8 +28,8 @@
10765 # CONFIG_MIPS_PB1000 is not set
10766 # CONFIG_MIPS_PB1100 is not set
10767 # CONFIG_MIPS_PB1500 is not set
10768 -# CONFIG_MIPS_HYDROGEN3 is not set
10769 # CONFIG_MIPS_PB1550 is not set
10770 +# CONFIG_MIPS_HYDROGEN3 is not set
10771 # CONFIG_MIPS_XXS1500 is not set
10772 # CONFIG_MIPS_MTX1 is not set
10773 # CONFIG_COGENT_CSB250 is not set
10774 @@ -242,7 +242,6 @@
10775 CONFIG_SERIAL_CONSOLE=y
10776 # CONFIG_SERIAL_EXTENDED is not set
10777 # CONFIG_SERIAL_NONSTANDARD is not set
10778 -# CONFIG_MIPS_HYDROGEN3_BUTTONS is not set
10779 # CONFIG_UNIX98_PTYS is not set
10780
10781 #
10782 diff -Nur linux-2.4.30/arch/mips64/kernel/binfmt_elfn32.c linux-2.4.30-mips/arch/mips64/kernel/binfmt_elfn32.c
10783 --- linux-2.4.30/arch/mips64/kernel/binfmt_elfn32.c 2003-08-25 13:44:40.000000000 +0200
10784 +++ linux-2.4.30-mips/arch/mips64/kernel/binfmt_elfn32.c 2005-01-26 03:40:47.000000000 +0100
10785 @@ -116,4 +116,7 @@
10786 #undef MODULE_DESCRIPTION
10787 #undef MODULE_AUTHOR
10788
10789 +#undef TASK_SIZE
10790 +#define TASK_SIZE TASK_SIZE32
10791 +
10792 #include "../../../fs/binfmt_elf.c"
10793 diff -Nur linux-2.4.30/arch/mips64/kernel/binfmt_elfo32.c linux-2.4.30-mips/arch/mips64/kernel/binfmt_elfo32.c
10794 --- linux-2.4.30/arch/mips64/kernel/binfmt_elfo32.c 2003-08-25 13:44:40.000000000 +0200
10795 +++ linux-2.4.30-mips/arch/mips64/kernel/binfmt_elfo32.c 2005-01-26 03:40:47.000000000 +0100
10796 @@ -137,4 +137,7 @@
10797 #undef MODULE_DESCRIPTION
10798 #undef MODULE_AUTHOR
10799
10800 +#undef TASK_SIZE
10801 +#define TASK_SIZE TASK_SIZE32
10802 +
10803 #include "../../../fs/binfmt_elf.c"
10804 diff -Nur linux-2.4.30/arch/mips64/kernel/head.S linux-2.4.30-mips/arch/mips64/kernel/head.S
10805 --- linux-2.4.30/arch/mips64/kernel/head.S 2004-02-18 14:36:30.000000000 +0100
10806 +++ linux-2.4.30-mips/arch/mips64/kernel/head.S 2004-11-22 14:38:26.000000000 +0100
10807 @@ -91,6 +91,21 @@
10808 __INIT
10809
10810 NESTED(kernel_entry, 16, sp) # kernel entry point
10811 + .set push
10812 + /*
10813 + * For the moment disable interrupts, mark the kernel mode and
10814 + * set ST0_KX so that the CPU does not spit fire when using
10815 + * 64-bit addresses. A full initialization of the CPU's status
10816 + * register is done later in per_cpu_trap_init().
10817 + */
10818 + mfc0 t0, CP0_STATUS
10819 + or t0, ST0_CU0|ST0_KX|0x1f
10820 + xor t0, 0x1f
10821 + mtc0 t0, CP0_STATUS
10822 +
10823 + .set noreorder
10824 + sll zero,3 # ehb
10825 + .set reorder
10826
10827 ori sp, 0xf # align stack on 16 byte.
10828 xori sp, 0xf
10829 @@ -103,8 +118,6 @@
10830
10831 ARC64_TWIDDLE_PC
10832
10833 - CLI # disable interrupts
10834 -
10835 /*
10836 * The firmware/bootloader passes argc/argp/envp
10837 * to us as arguments. But clear bss first because
10838 @@ -125,6 +138,7 @@
10839 dsubu sp, 4*SZREG # init stack pointer
10840
10841 j init_arch
10842 + .set pop
10843 END(kernel_entry)
10844
10845 #ifdef CONFIG_SMP
10846 @@ -133,6 +147,23 @@
10847 * function after setting up the stack and gp registers.
10848 */
10849 NESTED(smp_bootstrap, 16, sp)
10850 + .set push
10851 + /*
10852 + * For the moment disable interrupts and bootstrap exception
10853 + * vectors, mark the kernel mode and set ST0_KX so that the CPU
10854 + * does not spit fire when using 64-bit addresses. A full
10855 + * initialization of the CPU's status register is done later in
10856 + * per_cpu_trap_init().
10857 + */
10858 + mfc0 t0, CP0_STATUS
10859 + or t0, ST0_CU0|ST0_BEV|ST0_KX|0x1f
10860 + xor t0, ST0_BEV|0x1f
10861 + mtc0 t0, CP0_STATUS
10862 +
10863 + .set noreorder
10864 + sll zero,3 # ehb
10865 + .set reorder
10866 +
10867 #ifdef CONFIG_SGI_IP27
10868 GET_NASID_ASM t1
10869 dli t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
10870 @@ -146,19 +177,8 @@
10871 ARC64_TWIDDLE_PC
10872 #endif /* CONFIG_SGI_IP27 */
10873
10874 - CLI
10875 -
10876 - /*
10877 - * For the moment set ST0_KU so the CPU will not spit fire when
10878 - * executing 64-bit instructions. The full initialization of the
10879 - * CPU's status register is done later in per_cpu_trap_init().
10880 - */
10881 - mfc0 t0, CP0_STATUS
10882 - or t0, ST0_KX
10883 - mtc0 t0, CP0_STATUS
10884 -
10885 jal start_secondary # XXX: IP27: cboot
10886 -
10887 + .set pop
10888 END(smp_bootstrap)
10889 #endif /* CONFIG_SMP */
10890
10891 diff -Nur linux-2.4.30/arch/mips64/kernel/ioctl32.c linux-2.4.30-mips/arch/mips64/kernel/ioctl32.c
10892 --- linux-2.4.30/arch/mips64/kernel/ioctl32.c 2005-01-19 15:09:31.000000000 +0100
10893 +++ linux-2.4.30-mips/arch/mips64/kernel/ioctl32.c 2005-01-26 03:36:17.000000000 +0100
10894 @@ -2352,7 +2352,7 @@
10895 IOCTL32_HANDLER(AUTOFS_IOC_SETTIMEOUT32, ioc_settimeout),
10896 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE),
10897 IOCTL32_DEFAULT(AUTOFS_IOC_EXPIRE_MULTI),
10898 - IOCTL32_DEFAULT(AUTOFS_IOC_PROTSUBVER),
10899 + IOCTL32_DEFAULT(AUTOFS_IOC_PROTOSUBVER),
10900 IOCTL32_DEFAULT(AUTOFS_IOC_ASKREGHOST),
10901 IOCTL32_DEFAULT(AUTOFS_IOC_TOGGLEREGHOST),
10902 IOCTL32_DEFAULT(AUTOFS_IOC_ASKUMOUNT),
10903 diff -Nur linux-2.4.30/arch/mips64/kernel/linux32.c linux-2.4.30-mips/arch/mips64/kernel/linux32.c
10904 --- linux-2.4.30/arch/mips64/kernel/linux32.c 2005-04-04 03:42:19.000000000 +0200
10905 +++ linux-2.4.30-mips/arch/mips64/kernel/linux32.c 2005-03-18 13:13:23.000000000 +0100
10906 @@ -1187,72 +1187,19 @@
10907 lseek back to original location. They fail just like lseek does on
10908 non-seekable files. */
10909
10910 -asmlinkage ssize_t sys32_pread(unsigned int fd, char * buf,
10911 - size_t count, u32 unused, u64 a4, u64 a5)
10912 +asmlinkage ssize_t sys32_pread(unsigned int fd, char *buf,
10913 + size_t count, u32 unused, u64 a4, u64 a5)
10914 {
10915 - ssize_t ret;
10916 - struct file * file;
10917 - ssize_t (*read)(struct file *, char *, size_t, loff_t *);
10918 - loff_t pos;
10919 -
10920 - ret = -EBADF;
10921 - file = fget(fd);
10922 - if (!file)
10923 - goto bad_file;
10924 - if (!(file->f_mode & FMODE_READ))
10925 - goto out;
10926 - pos = merge_64(a4, a5);
10927 - ret = locks_verify_area(FLOCK_VERIFY_READ, file->f_dentry->d_inode,
10928 - file, pos, count);
10929 - if (ret)
10930 - goto out;
10931 - ret = -EINVAL;
10932 - if (!file->f_op || !(read = file->f_op->read))
10933 - goto out;
10934 - if (pos < 0)
10935 - goto out;
10936 - ret = read(file, buf, count, &pos);
10937 - if (ret > 0)
10938 - dnotify_parent(file->f_dentry, DN_ACCESS);
10939 -out:
10940 - fput(file);
10941 -bad_file:
10942 - return ret;
10943 + return sys_pread(fd, buf, count, merge_64(a4, a5));
10944 }
10945
10946 asmlinkage ssize_t sys32_pwrite(unsigned int fd, const char * buf,
10947 size_t count, u32 unused, u64 a4, u64 a5)
10948 {
10949 - ssize_t ret;
10950 - struct file * file;
10951 - ssize_t (*write)(struct file *, const char *, size_t, loff_t *);
10952 - loff_t pos;
10953 -
10954 - ret = -EBADF;
10955 - file = fget(fd);
10956 - if (!file)
10957 - goto bad_file;
10958 - if (!(file->f_mode & FMODE_WRITE))
10959 - goto out;
10960 - pos = merge_64(a4, a5);
10961 - ret = locks_verify_area(FLOCK_VERIFY_WRITE, file->f_dentry->d_inode,
10962 - file, pos, count);
10963 - if (ret)
10964 - goto out;
10965 - ret = -EINVAL;
10966 - if (!file->f_op || !(write = file->f_op->write))
10967 - goto out;
10968 - if (pos < 0)
10969 - goto out;
10970 -
10971 - ret = write(file, buf, count, &pos);
10972 - if (ret > 0)
10973 - dnotify_parent(file->f_dentry, DN_MODIFY);
10974 -out:
10975 - fput(file);
10976 -bad_file:
10977 - return ret;
10978 + return sys_pwrite(fd, buf, count, merge_64(a4, a5));
10979 }
10980 +
10981 +
10982 /*
10983 * Ooo, nasty. We need here to frob 32-bit unsigned longs to
10984 * 64-bit unsigned longs.
10985 diff -Nur linux-2.4.30/arch/mips64/kernel/scall_64.S linux-2.4.30-mips/arch/mips64/kernel/scall_64.S
10986 --- linux-2.4.30/arch/mips64/kernel/scall_64.S 2005-01-19 15:09:32.000000000 +0100
10987 +++ linux-2.4.30-mips/arch/mips64/kernel/scall_64.S 2005-02-07 22:21:54.000000000 +0100
10988 @@ -102,15 +102,14 @@
10989
10990 trace_a_syscall:
10991 SAVE_STATIC
10992 - sd t2,PT_R1(sp)
10993 + move s0, t2
10994 jal syscall_trace
10995 - ld t2,PT_R1(sp)
10996
10997 ld a0, PT_R4(sp) # Restore argument registers
10998 ld a1, PT_R5(sp)
10999 ld a2, PT_R6(sp)
11000 ld a3, PT_R7(sp)
11001 - jalr t2
11002 + jalr s0
11003
11004 li t0, -EMAXERRNO - 1 # error?
11005 sltu t0, t0, v0
11006 diff -Nur linux-2.4.30/arch/mips64/kernel/scall_n32.S linux-2.4.30-mips/arch/mips64/kernel/scall_n32.S
11007 --- linux-2.4.30/arch/mips64/kernel/scall_n32.S 2005-01-19 15:09:32.000000000 +0100
11008 +++ linux-2.4.30-mips/arch/mips64/kernel/scall_n32.S 2005-02-07 22:21:54.000000000 +0100
11009 @@ -106,15 +106,14 @@
11010
11011 trace_a_syscall:
11012 SAVE_STATIC
11013 - sd t2,PT_R1(sp)
11014 + move s0, t2
11015 jal syscall_trace
11016 - ld t2,PT_R1(sp)
11017
11018 ld a0, PT_R4(sp) # Restore argument registers
11019 ld a1, PT_R5(sp)
11020 ld a2, PT_R6(sp)
11021 ld a3, PT_R7(sp)
11022 - jalr t2
11023 + jalr s0
11024
11025 li t0, -EMAXERRNO - 1 # error?
11026 sltu t0, t0, v0
11027 diff -Nur linux-2.4.30/arch/mips64/kernel/scall_o32.S linux-2.4.30-mips/arch/mips64/kernel/scall_o32.S
11028 --- linux-2.4.30/arch/mips64/kernel/scall_o32.S 2005-01-19 15:09:32.000000000 +0100
11029 +++ linux-2.4.30-mips/arch/mips64/kernel/scall_o32.S 2005-02-14 04:52:57.000000000 +0100
11030 @@ -118,9 +118,8 @@
11031 sd a6, PT_R10(sp)
11032 sd a7, PT_R11(sp)
11033
11034 - sd t2,PT_R1(sp)
11035 + move s0, t2
11036 jal syscall_trace
11037 - ld t2,PT_R1(sp)
11038
11039 ld a0, PT_R4(sp) # Restore argument registers
11040 ld a1, PT_R5(sp)
11041 @@ -129,7 +128,7 @@
11042 ld a4, PT_R8(sp)
11043 ld a5, PT_R9(sp)
11044
11045 - jalr t2
11046 + jalr s0
11047
11048 li t0, -EMAXERRNO - 1 # error?
11049 sltu t0, t0, v0
11050 @@ -576,6 +575,8 @@
11051 sys_call_table:
11052 syscalltable
11053
11054 + .purgem sys
11055 +
11056 .macro sys function, nargs
11057 .byte \nargs
11058 .endm
11059 diff -Nur linux-2.4.30/arch/mips64/kernel/setup.c linux-2.4.30-mips/arch/mips64/kernel/setup.c
11060 --- linux-2.4.30/arch/mips64/kernel/setup.c 2005-01-19 15:09:32.000000000 +0100
11061 +++ linux-2.4.30-mips/arch/mips64/kernel/setup.c 2004-11-22 14:38:26.000000000 +0100
11062 @@ -129,14 +129,6 @@
11063 */
11064 load_mmu();
11065
11066 - /*
11067 - * On IP27, I am seeing the TS bit set when the kernel is loaded.
11068 - * Maybe because the kernel is in ckseg0 and not xkphys? Clear it
11069 - * anyway ...
11070 - */
11071 - clear_c0_status(ST0_BEV|ST0_TS|ST0_CU1|ST0_CU2|ST0_CU3);
11072 - set_c0_status(ST0_CU0|ST0_KX|ST0_SX|ST0_FR);
11073 -
11074 start_kernel();
11075 }
11076
11077 diff -Nur linux-2.4.30/arch/mips64/kernel/signal_n32.c linux-2.4.30-mips/arch/mips64/kernel/signal_n32.c
11078 --- linux-2.4.30/arch/mips64/kernel/signal_n32.c 2005-01-19 15:09:33.000000000 +0100
11079 +++ linux-2.4.30-mips/arch/mips64/kernel/signal_n32.c 2005-02-07 22:10:53.000000000 +0100
11080 @@ -68,7 +68,7 @@
11081 };
11082
11083 extern asmlinkage int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11084 -extern int inline setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11085 +extern int setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc);
11086
11087 asmlinkage void sysn32_rt_sigreturn(abi64_no_regargs, struct pt_regs regs)
11088 {
11089 diff -Nur linux-2.4.30/arch/mips64/kernel/traps.c linux-2.4.30-mips/arch/mips64/kernel/traps.c
11090 --- linux-2.4.30/arch/mips64/kernel/traps.c 2005-01-19 15:09:33.000000000 +0100
11091 +++ linux-2.4.30-mips/arch/mips64/kernel/traps.c 2005-04-12 22:25:34.000000000 +0200
11092 @@ -462,9 +462,10 @@
11093 }
11094 ll_task = current;
11095
11096 + compute_return_epc(regs);
11097 +
11098 regs->regs[(opcode & RT) >> 16] = value;
11099
11100 - compute_return_epc(regs);
11101 return;
11102
11103 sig:
11104 @@ -495,8 +496,8 @@
11105 goto sig;
11106 }
11107 if (ll_bit == 0 || ll_task != current) {
11108 - regs->regs[reg] = 0;
11109 compute_return_epc(regs);
11110 + regs->regs[reg] = 0;
11111 return;
11112 }
11113
11114 @@ -505,9 +506,9 @@
11115 goto sig;
11116 }
11117
11118 + compute_return_epc(regs);
11119 regs->regs[reg] = 1;
11120
11121 - compute_return_epc(regs);
11122 return;
11123
11124 sig:
11125 @@ -809,13 +810,18 @@
11126 void __init per_cpu_trap_init(void)
11127 {
11128 unsigned int cpu = smp_processor_id();
11129 + unsigned int status_set = ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX;
11130
11131 - /* Some firmware leaves the BEV flag set, clear it. */
11132 - clear_c0_status(ST0_CU1|ST0_CU2|ST0_CU3|ST0_BEV);
11133 - set_c0_status(ST0_CU0|ST0_FR|ST0_KX|ST0_SX|ST0_UX);
11134 -
11135 + /*
11136 + * Disable coprocessors, enable 64-bit addressing and set FPU
11137 + * for the 32/32 FPR register model. Reset the BEV flag that
11138 + * some firmware may have left set and the TS bit (for IP27).
11139 + * Set XX for ISA IV code to work.
11140 + */
11141 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV)
11142 - set_c0_status(ST0_XX);
11143 + status_set |= ST0_XX;
11144 + change_c0_status(ST0_CU|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX,
11145 + status_set);
11146
11147 /*
11148 * Some MIPS CPUs have a dedicated interrupt vector which reduces the
11149 @@ -825,13 +831,11 @@
11150 set_c0_cause(CAUSEF_IV);
11151
11152 cpu_data[cpu].asid_cache = ASID_FIRST_VERSION;
11153 - write_c0_context(((long)(&pgd_current[cpu])) << 23);
11154 - write_c0_wired(0);
11155 + TLBMISS_HANDLER_SETUP();
11156
11157 atomic_inc(&init_mm.mm_count);
11158 current->active_mm = &init_mm;
11159 - if (current->mm)
11160 - BUG();
11161 + BUG_ON(current->mm);
11162 enter_lazy_tlb(&init_mm, current, cpu);
11163 }
11164
11165 @@ -842,8 +846,6 @@
11166 extern char except_vec4;
11167 unsigned long i;
11168
11169 - per_cpu_trap_init();
11170 -
11171 /* Copy the generic exception handlers to their final destination. */
11172 memcpy((void *) KSEG0 , &except_vec0_generic, 0x80);
11173 memcpy((void *)(KSEG0 + 0x180), &except_vec3_generic, 0x80);
11174 @@ -933,6 +935,5 @@
11175
11176 flush_icache_range(KSEG0, KSEG0 + 0x400);
11177
11178 - atomic_inc(&init_mm.mm_count); /* XXX UP? */
11179 - current->active_mm = &init_mm;
11180 + per_cpu_trap_init();
11181 }
11182 diff -Nur linux-2.4.30/arch/mips64/mm/c-r4k.c linux-2.4.30-mips/arch/mips64/mm/c-r4k.c
11183 --- linux-2.4.30/arch/mips64/mm/c-r4k.c 2005-01-19 15:09:33.000000000 +0100
11184 +++ linux-2.4.30-mips/arch/mips64/mm/c-r4k.c 2005-02-06 22:55:42.000000000 +0100
11185 @@ -867,9 +867,16 @@
11186 * normally they'd suffer from aliases but magic in the hardware deals
11187 * with that for us so we don't need to take care ourselves.
11188 */
11189 - if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
11190 - if (c->dcache.waysize > PAGE_SIZE)
11191 - c->dcache.flags |= MIPS_CACHE_ALIASES;
11192 + switch (c->cputype) {
11193 + case CPU_R10000:
11194 + case CPU_R12000:
11195 + break;
11196 + case CPU_24K:
11197 + if (!(read_c0_config7() & (1 << 16)))
11198 + default:
11199 + if (c->dcache.waysize > PAGE_SIZE)
11200 + c->dcache.flags |= MIPS_CACHE_ALIASES;
11201 + }
11202
11203 switch (c->cputype) {
11204 case CPU_20KC:
11205 @@ -1070,9 +1077,6 @@
11206 setup_scache();
11207 coherency_setup();
11208
11209 - if (c->dcache.sets * c->dcache.ways > PAGE_SIZE)
11210 - c->dcache.flags |= MIPS_CACHE_ALIASES;
11211 -
11212 r4k_blast_dcache_page_setup();
11213 r4k_blast_dcache_page_indexed_setup();
11214 r4k_blast_dcache_setup();
11215 diff -Nur linux-2.4.30/arch/mips64/mm/cerr-sb1.c linux-2.4.30-mips/arch/mips64/mm/cerr-sb1.c
11216 --- linux-2.4.30/arch/mips64/mm/cerr-sb1.c 2004-02-18 14:36:30.000000000 +0100
11217 +++ linux-2.4.30-mips/arch/mips64/mm/cerr-sb1.c 2004-12-13 18:37:26.000000000 +0100
11218 @@ -252,14 +252,14 @@
11219
11220 /* Masks to select bits for Hamming parity, mask_72_64[i] for bit[i] */
11221 static const uint64_t mask_72_64[8] = {
11222 - 0x0738C808099264FFL,
11223 - 0x38C808099264FF07L,
11224 - 0xC808099264FF0738L,
11225 - 0x08099264FF0738C8L,
11226 - 0x099264FF0738C808L,
11227 - 0x9264FF0738C80809L,
11228 - 0x64FF0738C8080992L,
11229 - 0xFF0738C808099264L
11230 + 0x0738C808099264FFULL,
11231 + 0x38C808099264FF07ULL,
11232 + 0xC808099264FF0738ULL,
11233 + 0x08099264FF0738C8ULL,
11234 + 0x099264FF0738C808ULL,
11235 + 0x9264FF0738C80809ULL,
11236 + 0x64FF0738C8080992ULL,
11237 + 0xFF0738C808099264ULL
11238 };
11239
11240 /* Calculate the parity on a range of bits */
11241 @@ -331,9 +331,9 @@
11242 ((lru >> 4) & 0x3),
11243 ((lru >> 6) & 0x3));
11244 }
11245 - va = (taglo & 0xC0000FFFFFFFE000) | addr;
11246 + va = (taglo & 0xC0000FFFFFFFE000ULL) | addr;
11247 if ((taglo & (1 << 31)) && (((taglo >> 62) & 0x3) == 3))
11248 - va |= 0x3FFFF00000000000;
11249 + va |= 0x3FFFF00000000000ULL;
11250 valid = ((taghi >> 29) & 1);
11251 if (valid) {
11252 tlo_tmp = taglo & 0xfff3ff;
11253 @@ -474,7 +474,7 @@
11254 : "r" ((way << 13) | addr));
11255
11256 taglo = ((unsigned long long)taglohi << 32) | taglolo;
11257 - pa = (taglo & 0xFFFFFFE000) | addr;
11258 + pa = (taglo & 0xFFFFFFE000ULL) | addr;
11259 if (way == 0) {
11260 lru = (taghi >> 14) & 0xff;
11261 prom_printf("[Bank %d Set 0x%02x] LRU > %d %d %d %d > MRU\n",
11262 diff -Nur linux-2.4.30/arch/mips64/mm/tlb-r4k.c linux-2.4.30-mips/arch/mips64/mm/tlb-r4k.c
11263 --- linux-2.4.30/arch/mips64/mm/tlb-r4k.c 2005-01-19 15:09:33.000000000 +0100
11264 +++ linux-2.4.30-mips/arch/mips64/mm/tlb-r4k.c 2004-11-25 23:18:38.000000000 +0100
11265 @@ -1,24 +1,12 @@
11266 /*
11267 - * Carsten Langgaard, carstenl@mips.com
11268 - * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11269 - *
11270 - * This program is free software; you can distribute it and/or modify it
11271 - * under the terms of the GNU General Public License (Version 2) as
11272 - * published by the Free Software Foundation.
11273 - *
11274 - * This program is distributed in the hope it will be useful, but WITHOUT
11275 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11276 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11277 + * This file is subject to the terms and conditions of the GNU General Public
11278 + * License. See the file "COPYING" in the main directory of this archive
11279 * for more details.
11280 *
11281 - * You should have received a copy of the GNU General Public License along
11282 - * with this program; if not, write to the Free Software Foundation, Inc.,
11283 - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
11284 - *
11285 - * MIPS64 CPU variant specific MMU routines.
11286 - * These routine are not optimized in any way, they are done in a generic way
11287 - * so they can be used on all MIPS64 compliant CPUs, and also done in an
11288 - * attempt not to break anything for the R4xx0 style CPUs.
11289 + * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
11290 + * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle ralf@gnu.org
11291 + * Carsten Langgaard, carstenl@mips.com
11292 + * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
11293 */
11294 #include <linux/init.h>
11295 #include <linux/sched.h>
11296 @@ -30,9 +18,6 @@
11297 #include <asm/pgtable.h>
11298 #include <asm/system.h>
11299
11300 -#undef DEBUG_TLB
11301 -#undef DEBUG_TLBUPDATE
11302 -
11303 extern void except_vec1_r4k(void);
11304
11305 /* CP0 hazard avoidance. */
11306 @@ -46,31 +31,23 @@
11307 unsigned long old_ctx;
11308 int entry;
11309
11310 -#ifdef DEBUG_TLB
11311 - printk("[tlball]");
11312 -#endif
11313 -
11314 local_irq_save(flags);
11315 /* Save old context and create impossible VPN2 value */
11316 old_ctx = read_c0_entryhi();
11317 - write_c0_entryhi(XKPHYS);
11318 write_c0_entrylo0(0);
11319 write_c0_entrylo1(0);
11320 - BARRIER;
11321
11322 entry = read_c0_wired();
11323
11324 /* Blast 'em all away. */
11325 - while(entry < current_cpu_data.tlbsize) {
11326 - /* Make sure all entries differ. */
11327 - write_c0_entryhi(XKPHYS+entry*0x2000);
11328 + while (entry < current_cpu_data.tlbsize) {
11329 + write_c0_entryhi(XKPHYS + entry*0x2000);
11330 write_c0_index(entry);
11331 - BARRIER;
11332 + mtc0_tlbw_hazard();
11333 tlb_write_indexed();
11334 - BARRIER;
11335 entry++;
11336 }
11337 - BARRIER;
11338 + tlbw_use_hazard();
11339 write_c0_entryhi(old_ctx);
11340 local_irq_restore(flags);
11341 }
11342 @@ -79,12 +56,8 @@
11343 {
11344 int cpu = smp_processor_id();
11345
11346 - if (cpu_context(cpu, mm) != 0) {
11347 -#ifdef DEBUG_TLB
11348 - printk("[tlbmm<%d>]", mm->context);
11349 -#endif
11350 + if (cpu_context(cpu, mm) != 0)
11351 drop_mmu_context(mm,cpu);
11352 - }
11353 }
11354
11355 void local_flush_tlb_range(struct mm_struct *mm, unsigned long start,
11356 @@ -96,10 +69,6 @@
11357 unsigned long flags;
11358 int size;
11359
11360 -#ifdef DEBUG_TLB
11361 - printk("[tlbrange<%02x,%08lx,%08lx>]", (mm->context & ASID_MASK),
11362 - start, end);
11363 -#endif
11364 local_irq_save(flags);
11365 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
11366 size = (size + 1) >> 1;
11367 @@ -110,25 +79,25 @@
11368 start &= (PAGE_MASK << 1);
11369 end += ((PAGE_SIZE << 1) - 1);
11370 end &= (PAGE_MASK << 1);
11371 - while(start < end) {
11372 + while (start < end) {
11373 int idx;
11374
11375 write_c0_entryhi(start | newpid);
11376 start += (PAGE_SIZE << 1);
11377 - BARRIER;
11378 + mtc0_tlbw_hazard();
11379 tlb_probe();
11380 BARRIER;
11381 idx = read_c0_index();
11382 write_c0_entrylo0(0);
11383 write_c0_entrylo1(0);
11384 - if(idx < 0)
11385 + if (idx < 0)
11386 continue;
11387 /* Make sure all entries differ. */
11388 write_c0_entryhi(XKPHYS+idx*0x2000);
11389 - BARRIER;
11390 + mtc0_tlbw_hazard();
11391 tlb_write_indexed();
11392 - BARRIER;
11393 }
11394 + tlbw_use_hazard();
11395 write_c0_entryhi(oldpid);
11396 } else {
11397 drop_mmu_context(mm, cpu);
11398 @@ -145,28 +114,26 @@
11399 unsigned long flags;
11400 unsigned long oldpid, newpid, idx;
11401
11402 -#ifdef DEBUG_TLB
11403 - printk("[tlbpage<%d,%08lx>]", vma->vm_mm->context, page);
11404 -#endif
11405 newpid = cpu_asid(cpu, vma->vm_mm);
11406 page &= (PAGE_MASK << 1);
11407 local_irq_save(flags);
11408 oldpid = read_c0_entryhi();
11409 write_c0_entryhi(page | newpid);
11410 - BARRIER;
11411 + mtc0_tlbw_hazard();
11412 tlb_probe();
11413 BARRIER;
11414 idx = read_c0_index();
11415 write_c0_entrylo0(0);
11416 write_c0_entrylo1(0);
11417 - if(idx < 0)
11418 + if (idx < 0)
11419 goto finish;
11420 /* Make sure all entries differ. */
11421 write_c0_entryhi(XKPHYS+idx*0x2000);
11422 - BARRIER;
11423 + mtc0_tlbw_hazard();
11424 tlb_write_indexed();
11425 + tlbw_use_hazard();
11426 +
11427 finish:
11428 - BARRIER;
11429 write_c0_entryhi(oldpid);
11430 local_irq_restore(flags);
11431 }
11432 @@ -186,7 +153,7 @@
11433
11434 local_irq_save(flags);
11435 write_c0_entryhi(page);
11436 - BARRIER;
11437 + mtc0_tlbw_hazard();
11438 tlb_probe();
11439 BARRIER;
11440 idx = read_c0_index();
11441 @@ -195,10 +162,12 @@
11442 if (idx >= 0) {
11443 /* Make sure all entries differ. */
11444 write_c0_entryhi(KSEG0+idx*0x2000);
11445 + mtc0_tlbw_hazard();
11446 tlb_write_indexed();
11447 + tlbw_use_hazard();
11448 }
11449 - BARRIER;
11450 write_c0_entryhi(oldpid);
11451 +
11452 local_irq_restore(flags);
11453 }
11454
11455 @@ -208,7 +177,6 @@
11456 void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
11457 {
11458 unsigned long flags;
11459 - unsigned int asid;
11460 pgd_t *pgdp;
11461 pmd_t *pmdp;
11462 pte_t *ptep;
11463 @@ -222,70 +190,58 @@
11464
11465 pid = read_c0_entryhi() & ASID_MASK;
11466
11467 -#ifdef DEBUG_TLB
11468 - if ((pid != (cpu_asid(smp_processor_id(), vma->vm_mm))) ||
11469 - (cpu_context(smp_processor_id(), vma->vm_mm) == 0)) {
11470 - printk("update_mmu_cache: Wheee, bogus tlbpid mmpid=%d"
11471 - "tlbpid=%d\n", (int) (cpu_context(smp_processor_id(),
11472 - vma->vm_mm) & ASID_MASK), pid);
11473 - }
11474 -#endif
11475 -
11476 local_irq_save(flags);
11477 address &= (PAGE_MASK << 1);
11478 - write_c0_entryhi(address | (pid));
11479 + write_c0_entryhi(address | pid);
11480 pgdp = pgd_offset(vma->vm_mm, address);
11481 - BARRIER;
11482 + mtc0_tlbw_hazard();
11483 tlb_probe();
11484 BARRIER;
11485 pmdp = pmd_offset(pgdp, address);
11486 idx = read_c0_index();
11487 ptep = pte_offset(pmdp, address);
11488 - BARRIER;
11489 write_c0_entrylo0(pte_val(*ptep++) >> 6);
11490 write_c0_entrylo1(pte_val(*ptep) >> 6);
11491 - write_c0_entryhi(address | (pid));
11492 - BARRIER;
11493 - if(idx < 0) {
11494 + write_c0_entryhi(address | pid);
11495 + mtc0_tlbw_hazard();
11496 + if (idx < 0)
11497 tlb_write_random();
11498 - } else {
11499 + else
11500 tlb_write_indexed();
11501 - }
11502 - BARRIER;
11503 + tlbw_use_hazard();
11504 write_c0_entryhi(pid);
11505 - BARRIER;
11506 local_irq_restore(flags);
11507 }
11508
11509 -void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
11510 - unsigned long entryhi, unsigned long pagemask)
11511 +void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
11512 + unsigned long entryhi, unsigned long pagemask)
11513 {
11514 - unsigned long flags;
11515 - unsigned long wired;
11516 - unsigned long old_pagemask;
11517 - unsigned long old_ctx;
11518 -
11519 - local_irq_save(flags);
11520 - /* Save old context and create impossible VPN2 value */
11521 - old_ctx = (read_c0_entryhi() & ASID_MASK);
11522 - old_pagemask = read_c0_pagemask();
11523 - wired = read_c0_wired();
11524 - write_c0_wired(wired + 1);
11525 - write_c0_index(wired);
11526 - BARRIER;
11527 - write_c0_pagemask(pagemask);
11528 - write_c0_entryhi(entryhi);
11529 - write_c0_entrylo0(entrylo0);
11530 - write_c0_entrylo1(entrylo1);
11531 - BARRIER;
11532 - tlb_write_indexed();
11533 - BARRIER;
11534 -
11535 - write_c0_entryhi(old_ctx);
11536 - BARRIER;
11537 - write_c0_pagemask(old_pagemask);
11538 - local_flush_tlb_all();
11539 - local_irq_restore(flags);
11540 + unsigned long flags;
11541 + unsigned long wired;
11542 + unsigned long old_pagemask;
11543 + unsigned long old_ctx;
11544 +
11545 + local_irq_save(flags);
11546 + /* Save old context and create impossible VPN2 value */
11547 + old_ctx = read_c0_entryhi() & ASID_MASK;
11548 + old_pagemask = read_c0_pagemask();
11549 + wired = read_c0_wired();
11550 + write_c0_wired(wired + 1);
11551 + write_c0_index(wired);
11552 + BARRIER;
11553 + write_c0_pagemask(pagemask);
11554 + write_c0_entryhi(entryhi);
11555 + write_c0_entrylo0(entrylo0);
11556 + write_c0_entrylo1(entrylo1);
11557 + mtc0_tlbw_hazard();
11558 + tlb_write_indexed();
11559 + tlbw_use_hazard();
11560 +
11561 + write_c0_entryhi(old_ctx);
11562 + BARRIER;
11563 + write_c0_pagemask(old_pagemask);
11564 + local_flush_tlb_all();
11565 + local_irq_restore(flags);
11566 }
11567
11568 /*
11569 @@ -317,17 +273,15 @@
11570 }
11571
11572 write_c0_index(temp_tlb_entry);
11573 - BARRIER;
11574 write_c0_pagemask(pagemask);
11575 write_c0_entryhi(entryhi);
11576 write_c0_entrylo0(entrylo0);
11577 write_c0_entrylo1(entrylo1);
11578 - BARRIER;
11579 + mtc0_tlbw_hazard();
11580 tlb_write_indexed();
11581 - BARRIER;
11582 + tlbw_use_hazard();
11583
11584 write_c0_entryhi(old_ctx);
11585 - BARRIER;
11586 write_c0_pagemask(old_pagemask);
11587 out:
11588 local_irq_restore(flags);
11589 @@ -348,15 +302,23 @@
11590 return;
11591
11592 config1 = read_c0_config1();
11593 - if (!((config1 >> 7) & 3))
11594 - panic("No MMU present");
11595 + if (!((config >> 7) & 3))
11596 + panic("No TLB present");
11597
11598 c->tlbsize = ((config1 >> 25) & 0x3f) + 1;
11599 }
11600
11601 void __init r4k_tlb_init(void)
11602 {
11603 - unsigned long config = read_c0_config();
11604 + unsigned int config = read_c0_config();
11605 +
11606 + /*
11607 + * You should never change this register:
11608 + * - On R4600 1.7 the tlbp never hits for pages smaller than
11609 + * the value in the c0_pagemask register.
11610 + * - The entire mm handling assumes the c0_pagemask register to
11611 + * be set for 4kb pages.
11612 + */
11613 probe_tlb(config);
11614 write_c0_pagemask(PM_DEFAULT_MASK);
11615 write_c0_wired(0);
11616 diff -Nur linux-2.4.30/arch/mips64/mm/tlbex-r4k.S linux-2.4.30-mips/arch/mips64/mm/tlbex-r4k.S
11617 --- linux-2.4.30/arch/mips64/mm/tlbex-r4k.S 2004-02-18 14:36:30.000000000 +0100
11618 +++ linux-2.4.30-mips/arch/mips64/mm/tlbex-r4k.S 2004-11-25 23:18:38.000000000 +0100
11619 @@ -151,11 +151,9 @@
11620 ld k0, 0(k1) # get even pte
11621 ld k1, 8(k1) # get odd pte
11622 PTE_RELOAD k0 k1
11623 - rm9000_tlb_hazard
11624 - b 1f
11625 - tlbwr
11626 -1: nop
11627 - rm9000_tlb_hazard
11628 + mtc0_tlbw_hazard
11629 + tlbwr
11630 +1: tlbw_eret_hazard
11631 eret
11632
11633 9: # handle the vmalloc range
11634 @@ -163,11 +161,9 @@
11635 ld k0, 0(k1) # get even pte
11636 ld k1, 8(k1) # get odd pte
11637 PTE_RELOAD k0 k1
11638 - rm9000_tlb_hazard
11639 - b 1f
11640 - tlbwr
11641 -1: nop
11642 - rm9000_tlb_hazard
11643 + mtc0_tlbw_hazard
11644 + tlbwr
11645 +1: tlbw_eret_hazard
11646 eret
11647 END(handle_vec1_r4k)
11648
11649 @@ -195,10 +191,9 @@
11650 ld k0, 0(k1) # get even pte
11651 ld k1, 8(k1) # get odd pte
11652 PTE_RELOAD k0 k1
11653 - rm9000_tlb_hazard
11654 - nop
11655 + mtc0_tlbw_hazard
11656 tlbwr
11657 - rm9000_tlb_hazard
11658 + tlbw_eret_hazard
11659 eret
11660
11661 9: # handle the vmalloc range
11662 @@ -206,10 +201,9 @@
11663 ld k0, 0(k1) # get even pte
11664 ld k1, 8(k1) # get odd pte
11665 PTE_RELOAD k0 k1
11666 - rm9000_tlb_hazard
11667 - nop
11668 + mtc0_tlbw_hazard
11669 tlbwr
11670 - rm9000_tlb_hazard
11671 + tlbw_eret_hazard
11672 eret
11673 END(handle_vec1_r10k)
11674
11675 diff -Nur linux-2.4.30/drivers/char/Config.in linux-2.4.30-mips/drivers/char/Config.in
11676 --- linux-2.4.30/drivers/char/Config.in 2004-08-08 01:26:04.000000000 +0200
11677 +++ linux-2.4.30-mips/drivers/char/Config.in 2005-02-11 22:09:56.000000000 +0100
11678 @@ -313,14 +313,11 @@
11679 if [ "$CONFIG_OBSOLETE" = "y" -a "$CONFIG_ALPHA_BOOK1" = "y" ]; then
11680 bool 'Tadpole ANA H8 Support (OBSOLETE)' CONFIG_H8
11681 fi
11682 -if [ "$CONFIG_MIPS" = "y" -a "$CONFIG_NEW_TIME_C" = "y" ]; then
11683 - tristate 'Generic MIPS RTC Support' CONFIG_MIPS_RTC
11684 -fi
11685 if [ "$CONFIG_SGI_IP22" = "y" ]; then
11686 - bool 'SGI DS1286 RTC support' CONFIG_SGI_DS1286
11687 + tristate 'Dallas DS1286 RTC support' CONFIG_DS1286
11688 fi
11689 if [ "$CONFIG_SGI_IP27" = "y" ]; then
11690 - bool 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
11691 + tristate 'SGI M48T35 RTC support' CONFIG_SGI_IP27_RTC
11692 fi
11693 if [ "$CONFIG_TOSHIBA_RBTX4927" = "y" -o "$CONFIG_TOSHIBA_JMR3927" = "y" ]; then
11694 tristate 'Dallas DS1742 RTC support' CONFIG_DS1742
11695 @@ -383,6 +380,11 @@
11696 source drivers/char/drm/Config.in
11697 fi
11698 fi
11699 +
11700 +if [ "$CONFIG_X86" = "y" ]; then
11701 + tristate 'ACP Modem (Mwave) support' CONFIG_MWAVE
11702 +fi
11703 +
11704 endmenu
11705
11706 if [ "$CONFIG_HOTPLUG" = "y" -a "$CONFIG_PCMCIA" != "n" ]; then
11707 @@ -391,6 +393,7 @@
11708 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
11709 tristate ' Alchemy Au1x00 GPIO device support' CONFIG_AU1X00_GPIO
11710 tristate ' Au1000/ADS7846 touchscreen support' CONFIG_TS_AU1X00_ADS7846
11711 + #tristate ' Alchemy Au1550 PSC SPI support' CONFIG_AU1550_PSC_SPI
11712 fi
11713 if [ "$CONFIG_MIPS_ITE8172" = "y" ]; then
11714 tristate ' ITE GPIO' CONFIG_ITE_GPIO
11715 diff -Nur linux-2.4.30/drivers/char/Makefile linux-2.4.30-mips/drivers/char/Makefile
11716 --- linux-2.4.30/drivers/char/Makefile 2004-08-08 01:26:04.000000000 +0200
11717 +++ linux-2.4.30-mips/drivers/char/Makefile 2005-02-11 22:09:56.000000000 +0100
11718 @@ -48,7 +48,12 @@
11719 KEYBD =
11720 endif
11721 ifeq ($(CONFIG_VR41XX_KIU),y)
11722 - KEYMAP =
11723 + ifeq ($(CONFIG_IBM_WORKPAD),y)
11724 + KEYMAP = ibm_workpad_keymap.o
11725 + endif
11726 + ifeq ($(CONFIG_VICTOR_MPC30X),y)
11727 + KEYMAP = victor_mpc30x_keymap.o
11728 + endif
11729 KEYBD = vr41xx_keyb.o
11730 endif
11731 endif
11732 @@ -251,7 +256,6 @@
11733 obj-$(CONFIG_RTC) += rtc.o
11734 obj-$(CONFIG_GEN_RTC) += genrtc.o
11735 obj-$(CONFIG_EFI_RTC) += efirtc.o
11736 -obj-$(CONFIG_SGI_DS1286) += ds1286.o
11737 obj-$(CONFIG_MIPS_RTC) += mips_rtc.o
11738 obj-$(CONFIG_SGI_IP27_RTC) += ip27-rtc.o
11739 ifeq ($(CONFIG_PPC),)
11740 @@ -259,6 +263,7 @@
11741 endif
11742 obj-$(CONFIG_TOSHIBA) += toshiba.o
11743 obj-$(CONFIG_I8K) += i8k.o
11744 +obj-$(CONFIG_DS1286) += ds1286.o
11745 obj-$(CONFIG_DS1620) += ds1620.o
11746 obj-$(CONFIG_DS1742) += ds1742.o
11747 obj-$(CONFIG_INTEL_RNG) += i810_rng.o
11748 @@ -269,6 +274,7 @@
11749
11750 obj-$(CONFIG_ITE_GPIO) += ite_gpio.o
11751 obj-$(CONFIG_AU1X00_GPIO) += au1000_gpio.o
11752 +obj-$(CONFIG_AU1550_PSC_SPI) += au1550_psc_spi.o
11753 obj-$(CONFIG_AU1X00_USB_TTY) += au1000_usbtty.o
11754 obj-$(CONFIG_AU1X00_USB_RAW) += au1000_usbraw.o
11755 obj-$(CONFIG_COBALT_LCD) += lcd.o
11756 @@ -353,3 +359,9 @@
11757
11758 qtronixmap.c: qtronixmap.map
11759 set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
11760 +
11761 +ibm_workpad_keymap.c: ibm_workpad_keymap.map
11762 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
11763 +
11764 +victor_mpc30x_keymap.c: victor_mpc30x_keymap.map
11765 + set -e ; loadkeys --mktable $< | sed -e 's/^static *//' > $@
11766 diff -Nur linux-2.4.30/drivers/char/au1000_gpio.c linux-2.4.30-mips/drivers/char/au1000_gpio.c
11767 --- linux-2.4.30/drivers/char/au1000_gpio.c 2003-08-25 13:44:41.000000000 +0200
11768 +++ linux-2.4.30-mips/drivers/char/au1000_gpio.c 2003-12-20 14:18:51.000000000 +0100
11769 @@ -246,7 +246,7 @@
11770
11771 static struct miscdevice au1000gpio_miscdev =
11772 {
11773 - GPIO_MINOR,
11774 + MISC_DYNAMIC_MINOR,
11775 "au1000_gpio",
11776 &au1000gpio_fops
11777 };
11778 diff -Nur linux-2.4.30/drivers/char/au1550_psc_spi.c linux-2.4.30-mips/drivers/char/au1550_psc_spi.c
11779 --- linux-2.4.30/drivers/char/au1550_psc_spi.c 1970-01-01 01:00:00.000000000 +0100
11780 +++ linux-2.4.30-mips/drivers/char/au1550_psc_spi.c 2005-02-11 21:37:24.000000000 +0100
11781 @@ -0,0 +1,466 @@
11782 +/*
11783 + * Driver for Alchemy Au1550 SPI on the PSC.
11784 + *
11785 + * Copyright 2004 Embedded Edge, LLC.
11786 + * dan@embeddededge.com
11787 + *
11788 + * This program is free software; you can redistribute it and/or modify it
11789 + * under the terms of the GNU General Public License as published by the
11790 + * Free Software Foundation; either version 2 of the License, or (at your
11791 + * option) any later version.
11792 + *
11793 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
11794 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11795 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
11796 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
11797 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
11798 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
11799 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
11800 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
11801 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
11802 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
11803 + *
11804 + * You should have received a copy of the GNU General Public License along
11805 + * with this program; if not, write to the Free Software Foundation, Inc.,
11806 + * 675 Mass Ave, Cambridge, MA 02139, USA.
11807 + */
11808 +
11809 +#include <linux/module.h>
11810 +#include <linux/config.h>
11811 +#include <linux/types.h>
11812 +#include <linux/kernel.h>
11813 +#include <linux/miscdevice.h>
11814 +#include <linux/init.h>
11815 +#include <asm/uaccess.h>
11816 +#include <asm/io.h>
11817 +#include <asm/au1000.h>
11818 +#include <asm/au1550_spi.h>
11819 +#include <asm/au1xxx_psc.h>
11820 +
11821 +#ifdef CONFIG_MIPS_PB1550
11822 +#include <asm/pb1550.h>
11823 +#endif
11824 +
11825 +#ifdef CONFIG_MIPS_DB1550
11826 +#include <asm/db1x00.h>
11827 +#endif
11828 +
11829 +#ifdef CONFIG_MIPS_PB1200
11830 +#include <asm/pb1200.h>
11831 +#endif
11832 +
11833 +/* This is just a simple programmed I/O SPI interface on the PSC of the 1550.
11834 + * We support open, close, write, and ioctl. The SPI is a full duplex
11835 + * interface, you can't read without writing. So, the write system call
11836 + * copies the bytes out to the SPI, and whatever is returned is placed
11837 + * in the same buffer. Kinda weird, maybe we'll change it, but for now
11838 + * it works OK.
11839 + * I didn't implement any DMA yet, and it's a debate about the necessity.
11840 + * The SPI clocks are usually quite fast, so data is sent/received as
11841 + * quickly as you can stuff the FIFO. The overhead of DMA and interrupts
11842 + * are usually far greater than the data transfer itself. If, however,
11843 + * we find applications that move large amounts of data, we may choose
11844 + * use the overhead of buffering and DMA to do the work.
11845 + */
11846 +
11847 +/* The maximum clock rate specified in the manual is 2mHz.
11848 +*/
11849 +#define MAX_BAUD_RATE (2 * 1000000)
11850 +#define PSC_INTCLK_RATE (32 * 1000000)
11851 +
11852 +static int inuse;
11853 +
11854 +/* We have to know what the user requested for the data length
11855 + * so we know how to stuff the fifo. The FIFO is 32 bits wide,
11856 + * and we have to load it with the bits to go in a single transfer.
11857 + */
11858 +static uint spi_datalen;
11859 +
11860 +static int
11861 +au1550spi_master_done( int ms )
11862 +{
11863 + int timeout=ms;
11864 + volatile psc_spi_t *sp;
11865 +
11866 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
11867 +
11868 + /* Loop until MD is set or timeout has expired */
11869 + while(!(sp->psc_spievent & PSC_SPIEVNT_MD) && timeout--) udelay(1000);
11870 +
11871 + if ( !timeout )
11872 + return 0;
11873 + else
11874 + sp->psc_spievent |= PSC_SPIEVNT_MD;
11875 +
11876 + return 1;
11877 +}
11878 +
11879 +static int
11880 +au1550spi_open(struct inode *inode, struct file *file)
11881 +{
11882 + if (inuse)
11883 + return -EBUSY;
11884 +
11885 + inuse = 1;
11886 +
11887 + MOD_INC_USE_COUNT;
11888 +
11889 + return 0;
11890 +}
11891 +
11892 +static ssize_t
11893 +au1550spi_write(struct file *fp, const char *bp, size_t count, loff_t *ppos)
11894 +{
11895 + int bytelen, i;
11896 + size_t rcount, retval;
11897 + unsigned char sb, *rp, *wp;
11898 + uint fifoword, pcr, stat;
11899 + volatile psc_spi_t *sp;
11900 +
11901 + /* Get the number of bytes per transfer.
11902 + */
11903 + bytelen = ((spi_datalen - 1) / 8) + 1;
11904 +
11905 + /* User needs to send us multiple of this count.
11906 + */
11907 + if ((count % bytelen) != 0)
11908 + return -EINVAL;
11909 +
11910 + rp = wp = (unsigned char *)bp;
11911 + retval = rcount = count;
11912 +
11913 + /* Reset the FIFO.
11914 + */
11915 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
11916 + sp->psc_spipcr = (PSC_SPIPCR_RC | PSC_SPIPCR_TC);
11917 + au_sync();
11918 + do {
11919 + pcr = sp->psc_spipcr;
11920 + au_sync();
11921 + } while (pcr != 0);
11922 +
11923 + /* Prime the transmit FIFO.
11924 + */
11925 + while (count > 0) {
11926 + fifoword = 0;
11927 + for (i=0; i<bytelen; i++) {
11928 + fifoword <<= 8;
11929 + if (get_user(sb, wp) < 0)
11930 + return -EFAULT;
11931 + fifoword |= sb;
11932 + wp++;
11933 + }
11934 + count -= bytelen;
11935 + if (count <= 0)
11936 + fifoword |= PSC_SPITXRX_LC;
11937 + sp->psc_spitxrx = fifoword;
11938 + au_sync();
11939 + stat = sp->psc_spistat;
11940 + au_sync();
11941 + if (stat & PSC_SPISTAT_TF)
11942 + break;
11943 + }
11944 +
11945 + /* Start the transfer.
11946 + */
11947 + sp->psc_spipcr = PSC_SPIPCR_MS;
11948 + au_sync();
11949 +
11950 + /* Now, just keep the transmit fifo full and empty the receive.
11951 + */
11952 + while (count > 0) {
11953 + stat = sp->psc_spistat;
11954 + au_sync();
11955 + while ((stat & PSC_SPISTAT_RE) == 0) {
11956 + fifoword = sp->psc_spitxrx;
11957 + au_sync();
11958 + for (i=0; i<bytelen; i++) {
11959 + sb = fifoword & 0xff;
11960 + if (put_user(sb, rp) < 0)
11961 + return -EFAULT;
11962 + fifoword >>= 8;
11963 + rp++;
11964 + }
11965 + rcount -= bytelen;
11966 + stat = sp->psc_spistat;
11967 + au_sync();
11968 + }
11969 + if ((stat & PSC_SPISTAT_TF) == 0) {
11970 + fifoword = 0;
11971 + for (i=0; i<bytelen; i++) {
11972 + fifoword <<= 8;
11973 + if (get_user(sb, wp) < 0)
11974 + return -EFAULT;
11975 + fifoword |= sb;
11976 + wp++;
11977 + }
11978 + count -= bytelen;
11979 + if (count <= 0)
11980 + fifoword |= PSC_SPITXRX_LC;
11981 + sp->psc_spitxrx = fifoword;
11982 + au_sync();
11983 + }
11984 + }
11985 +
11986 + /* All of the bytes for transmit have been written. Hang
11987 + * out waiting for any residual bytes that are yet to be
11988 + * read from the fifo.
11989 + */
11990 + while (rcount > 0) {
11991 + stat = sp->psc_spistat;
11992 + au_sync();
11993 + if ((stat & PSC_SPISTAT_RE) == 0) {
11994 + fifoword = sp->psc_spitxrx;
11995 + au_sync();
11996 + for (i=0; i<bytelen; i++) {
11997 + sb = fifoword & 0xff;
11998 + if (put_user(sb, rp) < 0)
11999 + return -EFAULT;
12000 + fifoword >>= 8;
12001 + rp++;
12002 + }
12003 + rcount -= bytelen;
12004 + }
12005 + }
12006 +
12007 + /* Wait for MasterDone event. 30ms timeout */
12008 + if (!au1550spi_master_done(30) ) retval = -EFAULT;
12009 + return retval;
12010 +}
12011 +
12012 +static int
12013 +au1550spi_release(struct inode *inode, struct file *file)
12014 +{
12015 + MOD_DEC_USE_COUNT;
12016 +
12017 + inuse = 0;
12018 +
12019 + return 0;
12020 +}
12021 +
12022 +/* Set the baud rate closest to the request, then return the actual
12023 + * value we are using.
12024 + */
12025 +static uint
12026 +set_baud_rate(uint baud)
12027 +{
12028 + uint rate, tmpclk, brg, ctl, stat;
12029 + volatile psc_spi_t *sp;
12030 +
12031 + /* For starters, the input clock is divided by two.
12032 + */
12033 + tmpclk = PSC_INTCLK_RATE/2;
12034 +
12035 + rate = tmpclk / baud;
12036 +
12037 + /* The dividers work as follows:
12038 + * baud = tmpclk / (2 * (brg + 1))
12039 + */
12040 + brg = (rate/2) - 1;
12041 +
12042 + /* Test BRG to ensure it will fit into the 6 bits allocated.
12043 + */
12044 +
12045 + /* Make sure the device is disabled while we make the change.
12046 + */
12047 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12048 + ctl = sp->psc_spicfg;
12049 + au_sync();
12050 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
12051 + au_sync();
12052 + ctl = PSC_SPICFG_CLR_BAUD(ctl);
12053 + ctl |= PSC_SPICFG_SET_BAUD(brg);
12054 + sp->psc_spicfg = ctl;
12055 + au_sync();
12056 +
12057 + /* If the device was running prior to getting here, wait for
12058 + * it to restart.
12059 + */
12060 + if (ctl & PSC_SPICFG_DE_ENABLE) {
12061 + do {
12062 + stat = sp->psc_spistat;
12063 + au_sync();
12064 + } while ((stat & PSC_SPISTAT_DR) == 0);
12065 + }
12066 +
12067 + /* Return the actual value.
12068 + */
12069 + rate = tmpclk / (2 * (brg + 1));
12070 +
12071 + return(rate);
12072 +}
12073 +
12074 +static uint
12075 +set_word_len(uint len)
12076 +{
12077 + uint ctl, stat;
12078 + volatile psc_spi_t *sp;
12079 +
12080 + if ((len < 4) || (len > 24))
12081 + return -EINVAL;
12082 +
12083 + /* Make sure the device is disabled while we make the change.
12084 + */
12085 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12086 + ctl = sp->psc_spicfg;
12087 + au_sync();
12088 + sp->psc_spicfg = ctl & ~PSC_SPICFG_DE_ENABLE;
12089 + au_sync();
12090 + ctl = PSC_SPICFG_CLR_LEN(ctl);
12091 + ctl |= PSC_SPICFG_SET_LEN(len);
12092 + sp->psc_spicfg = ctl;
12093 + au_sync();
12094 +
12095 + /* If the device was running prior to getting here, wait for
12096 + * it to restart.
12097 + */
12098 + if (ctl & PSC_SPICFG_DE_ENABLE) {
12099 + do {
12100 + stat = sp->psc_spistat;
12101 + au_sync();
12102 + } while ((stat & PSC_SPISTAT_DR) == 0);
12103 + }
12104 +
12105 + return 0;
12106 +}
12107 +
12108 +static int
12109 +au1550spi_ioctl(struct inode *inode, struct file *file,
12110 + unsigned int cmd, unsigned long arg)
12111 +{
12112 + int status;
12113 + u32 val;
12114 +
12115 + status = 0;
12116 +
12117 + switch(cmd) {
12118 + case AU1550SPI_WORD_LEN:
12119 + status = set_word_len(arg);
12120 + break;
12121 +
12122 + case AU1550SPI_SET_BAUD:
12123 + if (get_user(val, (u32 *)arg))
12124 + return -EFAULT;
12125 +
12126 + val = set_baud_rate(val);
12127 + if (put_user(val, (u32 *)arg))
12128 + return -EFAULT;
12129 + break;
12130 +
12131 + default:
12132 + status = -ENOIOCTLCMD;
12133 +
12134 + }
12135 +
12136 + return status;
12137 +}
12138 +
12139 +
12140 +static struct file_operations au1550spi_fops =
12141 +{
12142 + owner: THIS_MODULE,
12143 + write: au1550spi_write,
12144 + ioctl: au1550spi_ioctl,
12145 + open: au1550spi_open,
12146 + release: au1550spi_release,
12147 +};
12148 +
12149 +
12150 +static struct miscdevice au1550spi_miscdev =
12151 +{
12152 + MISC_DYNAMIC_MINOR,
12153 + "au1550_spi",
12154 + &au1550spi_fops
12155 +};
12156 +
12157 +
12158 +int __init
12159 +au1550spi_init(void)
12160 +{
12161 + uint clk, rate, stat;
12162 + volatile psc_spi_t *sp;
12163 +
12164 + /* Wire up Freq3 as a clock for the SPI. The PSC does
12165 + * factor of 2 divisor, so run a higher rate so we can
12166 + * get some granularity to the clock speeds.
12167 + * We can't do this in board set up because the frequency
12168 + * is computed too late.
12169 + */
12170 + rate = get_au1x00_speed();
12171 + rate /= PSC_INTCLK_RATE;
12172 +
12173 + /* The FRDIV in the frequency control is (FRDIV + 1) * 2
12174 + */
12175 + rate /=2;
12176 + rate--;
12177 + clk = au_readl(SYS_FREQCTRL1);
12178 + au_sync();
12179 + clk &= ~SYS_FC_FRDIV3_MASK;
12180 + clk |= (rate << SYS_FC_FRDIV3_BIT);
12181 + clk |= SYS_FC_FE3;
12182 + au_writel(clk, SYS_FREQCTRL1);
12183 + au_sync();
12184 +
12185 + /* Set up the clock source routing to get Freq3 to PSC0_intclk.
12186 + */
12187 + clk = au_readl(SYS_CLKSRC);
12188 + au_sync();
12189 + clk &= ~0x03e0;
12190 + clk |= (5 << 7);
12191 + au_writel(clk, SYS_CLKSRC);
12192 + au_sync();
12193 +
12194 + /* Set up GPIO pin function to drive PSC0_SYNC1, which is
12195 + * the SPI Select.
12196 + */
12197 + clk = au_readl(SYS_PINFUNC);
12198 + au_sync();
12199 + clk |= 1;
12200 + au_writel(clk, SYS_PINFUNC);
12201 + au_sync();
12202 +
12203 + /* Now, set up the PSC for SPI PIO mode.
12204 + */
12205 + sp = (volatile psc_spi_t *)SPI_PSC_BASE;
12206 + sp->psc_ctrl = PSC_CTRL_DISABLE;
12207 + au_sync();
12208 + sp->psc_sel = PSC_SEL_PS_SPIMODE;
12209 + sp->psc_spicfg = 0;
12210 + au_sync();
12211 + sp->psc_ctrl = PSC_CTRL_ENABLE;
12212 + au_sync();
12213 + do {
12214 + stat = sp->psc_spistat;
12215 + au_sync();
12216 + } while ((stat & PSC_SPISTAT_SR) == 0);
12217 +
12218 + sp->psc_spicfg = (PSC_SPICFG_RT_FIFO8 | PSC_SPICFG_TT_FIFO8 |
12219 + PSC_SPICFG_DD_DISABLE | PSC_SPICFG_MO);
12220 + sp->psc_spicfg |= PSC_SPICFG_SET_LEN(8);
12221 + spi_datalen = 8;
12222 + sp->psc_spimsk = PSC_SPIMSK_ALLMASK;
12223 + au_sync();
12224 +
12225 + set_baud_rate(1000000);
12226 +
12227 + sp->psc_spicfg |= PSC_SPICFG_DE_ENABLE;
12228 + do {
12229 + stat = sp->psc_spistat;
12230 + au_sync();
12231 + } while ((stat & PSC_SPISTAT_DR) == 0);
12232 +
12233 + misc_register(&au1550spi_miscdev);
12234 + printk("Au1550 SPI driver\n");
12235 + return 0;
12236 +}
12237 +
12238 +
12239 +void __exit
12240 +au1550spi_exit(void)
12241 +{
12242 + misc_deregister(&au1550spi_miscdev);
12243 +}
12244 +
12245 +
12246 +module_init(au1550spi_init);
12247 +module_exit(au1550spi_exit);
12248 diff -Nur linux-2.4.30/drivers/char/decserial.c linux-2.4.30-mips/drivers/char/decserial.c
12249 --- linux-2.4.30/drivers/char/decserial.c 2003-08-25 13:44:41.000000000 +0200
12250 +++ linux-2.4.30-mips/drivers/char/decserial.c 2004-09-28 02:53:01.000000000 +0200
12251 @@ -3,95 +3,105 @@
12252 * choose the right serial device at boot time
12253 *
12254 * triemer 6-SEP-1998
12255 - * sercons.c is designed to allow the three different kinds
12256 + * sercons.c is designed to allow the three different kinds
12257 * of serial devices under the decstation world to co-exist
12258 - * in the same kernel. The idea here is to abstract
12259 + * in the same kernel. The idea here is to abstract
12260 * the pieces of the drivers that are common to this file
12261 * so that they do not clash at compile time and runtime.
12262 *
12263 * HK 16-SEP-1998 v0.002
12264 * removed the PROM console as this is not a real serial
12265 * device. Added support for PROM console in drivers/char/tty_io.c
12266 - * instead. Although it may work to enable more than one
12267 + * instead. Although it may work to enable more than one
12268 * console device I strongly recommend to use only one.
12269 + *
12270 + * Copyright (C) 2004 Maciej W. Rozycki
12271 */
12272
12273 #include <linux/config.h>
12274 +#include <linux/errno.h>
12275 #include <linux/init.h>
12276 +
12277 #include <asm/dec/machtype.h>
12278 +#include <asm/dec/serial.h>
12279 +
12280 +extern int register_zs_hook(unsigned int channel,
12281 + struct dec_serial_hook *hook);
12282 +extern int unregister_zs_hook(unsigned int channel);
12283 +
12284 +extern int register_dz_hook(unsigned int channel,
12285 + struct dec_serial_hook *hook);
12286 +extern int unregister_dz_hook(unsigned int channel);
12287
12288 +int register_dec_serial_hook(unsigned int channel,
12289 + struct dec_serial_hook *hook)
12290 +{
12291 #ifdef CONFIG_ZS
12292 -extern int zs_init(void);
12293 + if (IOASIC)
12294 + return register_zs_hook(channel, hook);
12295 #endif
12296 -
12297 #ifdef CONFIG_DZ
12298 -extern int dz_init(void);
12299 + if (!IOASIC)
12300 + return register_dz_hook(channel, hook);
12301 #endif
12302 + return 0;
12303 +}
12304
12305 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
12306 -
12307 +int unregister_dec_serial_hook(unsigned int channel)
12308 +{
12309 #ifdef CONFIG_ZS
12310 -extern void zs_serial_console_init(void);
12311 + if (IOASIC)
12312 + return unregister_zs_hook(channel);
12313 #endif
12314 -
12315 #ifdef CONFIG_DZ
12316 -extern void dz_serial_console_init(void);
12317 -#endif
12318 -
12319 + if (!IOASIC)
12320 + return unregister_dz_hook(channel);
12321 #endif
12322 + return 0;
12323 +}
12324
12325 -/* rs_init - starts up the serial interface -
12326 - handle normal case of starting up the serial interface */
12327
12328 -#ifdef CONFIG_SERIAL_DEC
12329 +extern int zs_init(void);
12330 +extern int dz_init(void);
12331
12332 +/*
12333 + * rs_init - starts up the serial interface -
12334 + * handle normal case of starting up the serial interface
12335 + */
12336 int __init rs_init(void)
12337 {
12338 -
12339 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
12340 - if (IOASIC)
12341 - return zs_init();
12342 - else
12343 - return dz_init();
12344 -#else
12345 -
12346 #ifdef CONFIG_ZS
12347 - return zs_init();
12348 + if (IOASIC)
12349 + return zs_init();
12350 #endif
12351 -
12352 #ifdef CONFIG_DZ
12353 - return dz_init();
12354 -#endif
12355 -
12356 + if (!IOASIC)
12357 + return dz_init();
12358 #endif
12359 + return -ENXIO;
12360 }
12361
12362 __initcall(rs_init);
12363
12364 -#endif
12365
12366 #ifdef CONFIG_SERIAL_DEC_CONSOLE
12367
12368 -/* dec_serial_console_init handles the special case of starting
12369 - * up the console on the serial port
12370 +extern void zs_serial_console_init(void);
12371 +extern void dz_serial_console_init(void);
12372 +
12373 +/*
12374 + * dec_serial_console_init handles the special case of starting
12375 + * up the console on the serial port
12376 */
12377 void __init dec_serial_console_init(void)
12378 {
12379 -#if defined(CONFIG_ZS) && defined(CONFIG_DZ)
12380 - if (IOASIC)
12381 - zs_serial_console_init();
12382 - else
12383 - dz_serial_console_init();
12384 -#else
12385 -
12386 #ifdef CONFIG_ZS
12387 - zs_serial_console_init();
12388 + if (IOASIC)
12389 + zs_serial_console_init();
12390 #endif
12391 -
12392 #ifdef CONFIG_DZ
12393 - dz_serial_console_init();
12394 -#endif
12395 -
12396 + if (!IOASIC)
12397 + dz_serial_console_init();
12398 #endif
12399 }
12400
12401 diff -Nur linux-2.4.30/drivers/char/ds1286.c linux-2.4.30-mips/drivers/char/ds1286.c
12402 --- linux-2.4.30/drivers/char/ds1286.c 2004-02-18 14:36:31.000000000 +0100
12403 +++ linux-2.4.30-mips/drivers/char/ds1286.c 2004-01-10 06:21:39.000000000 +0100
12404 @@ -1,6 +1,10 @@
12405 /*
12406 * DS1286 Real Time Clock interface for Linux
12407 *
12408 + * Copyright (C) 2003 TimeSys Corp.
12409 + * S. James Hill (James.Hill@timesys.com)
12410 + * (sjhill@realitydiluted.com)
12411 + *
12412 * Copyright (C) 1998, 1999, 2000 Ralf Baechle
12413 *
12414 * Based on code written by Paul Gortmaker.
12415 @@ -29,6 +33,7 @@
12416 #include <linux/types.h>
12417 #include <linux/errno.h>
12418 #include <linux/miscdevice.h>
12419 +#include <linux/module.h>
12420 #include <linux/slab.h>
12421 #include <linux/ioport.h>
12422 #include <linux/fcntl.h>
12423 @@ -95,6 +100,12 @@
12424 return -EIO;
12425 }
12426
12427 +void rtc_ds1286_wait(void)
12428 +{
12429 + unsigned char sec = CMOS_READ(RTC_SECONDS);
12430 + while (sec == CMOS_READ(RTC_SECONDS));
12431 +}
12432 +
12433 static int ds1286_ioctl(struct inode *inode, struct file *file,
12434 unsigned int cmd, unsigned long arg)
12435 {
12436 @@ -249,23 +260,22 @@
12437 {
12438 spin_lock_irq(&ds1286_lock);
12439
12440 - if (ds1286_status & RTC_IS_OPEN)
12441 - goto out_busy;
12442 + if (ds1286_status & RTC_IS_OPEN) {
12443 + spin_unlock_irq(&ds1286_lock);
12444 + return -EBUSY;
12445 + }
12446
12447 ds1286_status |= RTC_IS_OPEN;
12448
12449 - spin_lock_irq(&ds1286_lock);
12450 + spin_unlock_irq(&ds1286_lock);
12451 return 0;
12452 -
12453 -out_busy:
12454 - spin_lock_irq(&ds1286_lock);
12455 - return -EBUSY;
12456 }
12457
12458 static int ds1286_release(struct inode *inode, struct file *file)
12459 {
12460 + spin_lock_irq(&ds1286_lock);
12461 ds1286_status &= ~RTC_IS_OPEN;
12462 -
12463 + spin_unlock_irq(&ds1286_lock);
12464 return 0;
12465 }
12466
12467 @@ -276,32 +286,6 @@
12468 return 0;
12469 }
12470
12471 -/*
12472 - * The various file operations we support.
12473 - */
12474 -
12475 -static struct file_operations ds1286_fops = {
12476 - .llseek = no_llseek,
12477 - .read = ds1286_read,
12478 - .poll = ds1286_poll,
12479 - .ioctl = ds1286_ioctl,
12480 - .open = ds1286_open,
12481 - .release = ds1286_release,
12482 -};
12483 -
12484 -static struct miscdevice ds1286_dev=
12485 -{
12486 - .minor = RTC_MINOR,
12487 - .name = "rtc",
12488 - .fops = &ds1286_fops,
12489 -};
12490 -
12491 -int __init ds1286_init(void)
12492 -{
12493 - printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
12494 - return misc_register(&ds1286_dev);
12495 -}
12496 -
12497 static char *days[] = {
12498 "***", "Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
12499 };
12500 @@ -528,3 +512,38 @@
12501 BCD_TO_BIN(alm_tm->tm_hour);
12502 alm_tm->tm_sec = 0;
12503 }
12504 +
12505 +static struct file_operations ds1286_fops = {
12506 + .owner = THIS_MODULE,
12507 + .llseek = no_llseek,
12508 + .read = ds1286_read,
12509 + .poll = ds1286_poll,
12510 + .ioctl = ds1286_ioctl,
12511 + .open = ds1286_open,
12512 + .release = ds1286_release,
12513 +};
12514 +
12515 +static struct miscdevice ds1286_dev =
12516 +{
12517 + .minor = RTC_MINOR,
12518 + .name = "rtc",
12519 + .fops = &ds1286_fops,
12520 +};
12521 +
12522 +static int __init ds1286_init(void)
12523 +{
12524 + printk(KERN_INFO "DS1286 Real Time Clock Driver v%s\n", DS1286_VERSION);
12525 + return misc_register(&ds1286_dev);
12526 +}
12527 +
12528 +static void __exit ds1286_exit(void)
12529 +{
12530 + misc_deregister(&ds1286_dev);
12531 +}
12532 +
12533 +module_init(ds1286_init);
12534 +module_exit(ds1286_exit);
12535 +EXPORT_NO_SYMBOLS;
12536 +
12537 +MODULE_AUTHOR("Ralf Baechle");
12538 +MODULE_LICENSE("GPL");
12539 diff -Nur linux-2.4.30/drivers/char/ds1742.c linux-2.4.30-mips/drivers/char/ds1742.c
12540 --- linux-2.4.30/drivers/char/ds1742.c 2004-02-18 14:36:31.000000000 +0100
12541 +++ linux-2.4.30-mips/drivers/char/ds1742.c 2004-01-09 20:27:16.000000000 +0100
12542 @@ -142,6 +142,7 @@
12543 CMOS_WRITE(RTC_WRITE, RTC_CONTROL);
12544
12545 /* convert */
12546 + memset(&tm, 0, sizeof(struct rtc_time));
12547 to_tm(t, &tm);
12548
12549 /* check each field one by one */
12550 @@ -216,6 +217,7 @@
12551 unsigned long curr_time;
12552
12553 curr_time = rtc_ds1742_get_time();
12554 + memset(&tm, 0, sizeof(struct rtc_time));
12555 to_tm(curr_time, &tm);
12556
12557 p = buf;
12558 @@ -251,8 +253,8 @@
12559
12560 void rtc_ds1742_wait(void)
12561 {
12562 - while (CMOS_READ(RTC_SECONDS) & 1);
12563 - while (!(CMOS_READ(RTC_SECONDS) & 1));
12564 + unsigned char sec = CMOS_READ(RTC_SECONDS);
12565 + while (sec == CMOS_READ(RTC_SECONDS));
12566 }
12567
12568 static int ds1742_ioctl(struct inode *inode, struct file *file,
12569 @@ -264,6 +266,7 @@
12570 switch (cmd) {
12571 case RTC_RD_TIME: /* Read the time/date from RTC */
12572 curr_time = rtc_ds1742_get_time();
12573 + memset(&rtc_tm, 0, sizeof(struct rtc_time));
12574 to_tm(curr_time, &rtc_tm);
12575 rtc_tm.tm_year -= 1900;
12576 return copy_to_user((void *) arg, &rtc_tm, sizeof(rtc_tm)) ?
12577 diff -Nur linux-2.4.30/drivers/char/dummy_keyb.c linux-2.4.30-mips/drivers/char/dummy_keyb.c
12578 --- linux-2.4.30/drivers/char/dummy_keyb.c 2003-08-25 13:44:41.000000000 +0200
12579 +++ linux-2.4.30-mips/drivers/char/dummy_keyb.c 2004-01-09 09:53:08.000000000 +0100
12580 @@ -140,3 +140,7 @@
12581 {
12582 printk("Dummy keyboard driver installed.\n");
12583 }
12584 +#ifdef CONFIG_MAGIC_SYSRQ
12585 +unsigned char kbd_sysrq_key;
12586 +unsigned char kbd_sysrq_xlate[128];
12587 +#endif
12588 diff -Nur linux-2.4.30/drivers/char/dz.c linux-2.4.30-mips/drivers/char/dz.c
12589 --- linux-2.4.30/drivers/char/dz.c 2005-01-19 15:09:44.000000000 +0100
12590 +++ linux-2.4.30-mips/drivers/char/dz.c 2004-12-27 05:13:42.000000000 +0100
12591 @@ -1,11 +1,13 @@
12592 /*
12593 - * dz.c: Serial port driver for DECStations equiped
12594 + * dz.c: Serial port driver for DECstations equipped
12595 * with the DZ chipset.
12596 *
12597 * Copyright (C) 1998 Olivier A. D. Lebaillif
12598 *
12599 * Email: olivier.lebaillif@ifrsys.com
12600 *
12601 + * Copyright (C) 2004 Maciej W. Rozycki
12602 + *
12603 * [31-AUG-98] triemer
12604 * Changed IRQ to use Harald's dec internals interrupts.h
12605 * removed base_addr code - moving address assignment to setup.c
12606 @@ -24,6 +26,7 @@
12607 #undef DEBUG_DZ
12608
12609 #include <linux/config.h>
12610 +#include <linux/delay.h>
12611 #include <linux/version.h>
12612 #include <linux/kernel.h>
12613 #include <linux/sched.h>
12614 @@ -54,33 +57,56 @@
12615 #include <asm/system.h>
12616 #include <asm/uaccess.h>
12617
12618 -#define CONSOLE_LINE (3) /* for definition of struct console */
12619 +#ifdef CONFIG_MAGIC_SYSRQ
12620 +#include <linux/sysrq.h>
12621 +#endif
12622
12623 #include "dz.h"
12624
12625 -#define DZ_INTR_DEBUG 1
12626 -
12627 DECLARE_TASK_QUEUE(tq_serial);
12628
12629 -static struct dz_serial *lines[4];
12630 -static unsigned char tmp_buffer[256];
12631 +static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
12632 +static struct tty_driver serial_driver, callout_driver;
12633 +
12634 +static struct tty_struct *serial_table[DZ_NB_PORT];
12635 +static struct termios *serial_termios[DZ_NB_PORT];
12636 +static struct termios *serial_termios_locked[DZ_NB_PORT];
12637 +
12638 +static int serial_refcount;
12639
12640 -#ifdef DEBUG_DZ
12641 /*
12642 - * debugging code to send out chars via prom
12643 + * tmp_buf is used as a temporary buffer by serial_write. We need to
12644 + * lock it in case the copy_from_user blocks while swapping in a page,
12645 + * and some other program tries to do a serial write at the same time.
12646 + * Since the lock will only come under contention when the system is
12647 + * swapping and available memory is low, it makes sense to share one
12648 + * buffer across all the serial ports, since it significantly saves
12649 + * memory if large numbers of serial ports are open.
12650 */
12651 -static void debug_console(const char *s, int count)
12652 -{
12653 - unsigned i;
12654 +static unsigned char *tmp_buf;
12655 +static DECLARE_MUTEX(tmp_buf_sem);
12656
12657 - for (i = 0; i < count; i++) {
12658 - if (*s == 10)
12659 - prom_printf("%c", 13);
12660 - prom_printf("%c", *s++);
12661 - }
12662 -}
12663 +static char *dz_name __initdata = "DECstation DZ serial driver version ";
12664 +static char *dz_version __initdata = "1.03";
12665 +
12666 +static struct dz_serial *lines[DZ_NB_PORT];
12667 +static unsigned char tmp_buffer[256];
12668 +
12669 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
12670 +static struct console dz_sercons;
12671 +#endif
12672 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
12673 + !defined(MODULE)
12674 +static unsigned long break_pressed; /* break, really ... */
12675 #endif
12676
12677 +static void change_speed (struct dz_serial *);
12678 +
12679 +static int baud_table[] = {
12680 + 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
12681 + 9600, 0
12682 +};
12683 +
12684 /*
12685 * ------------------------------------------------------------
12686 * dz_in () and dz_out ()
12687 @@ -94,15 +120,16 @@
12688 {
12689 volatile unsigned short *addr =
12690 (volatile unsigned short *) (info->port + offset);
12691 +
12692 return *addr;
12693 }
12694
12695 static inline void dz_out(struct dz_serial *info, unsigned offset,
12696 unsigned short value)
12697 {
12698 -
12699 volatile unsigned short *addr =
12700 (volatile unsigned short *) (info->port + offset);
12701 +
12702 *addr = value;
12703 }
12704
12705 @@ -143,25 +170,24 @@
12706
12707 tmp |= mask; /* set the TX flag */
12708 dz_out(info, DZ_TCR, tmp);
12709 -
12710 }
12711
12712 /*
12713 * ------------------------------------------------------------
12714 - * Here starts the interrupt handling routines. All of the
12715 - * following subroutines are declared as inline and are folded
12716 - * into dz_interrupt. They were separated out for readability's
12717 - * sake.
12718 *
12719 - * Note: rs_interrupt() is a "fast" interrupt, which means that it
12720 + * Here starts the interrupt handling routines. All of the following
12721 + * subroutines are declared as inline and are folded into
12722 + * dz_interrupt(). They were separated out for readability's sake.
12723 + *
12724 + * Note: dz_interrupt() is a "fast" interrupt, which means that it
12725 * runs with interrupts turned off. People who may want to modify
12726 - * rs_interrupt() should try to keep the interrupt handler as fast as
12727 + * dz_interrupt() should try to keep the interrupt handler as fast as
12728 * possible. After you are done making modifications, it is not a bad
12729 * idea to do:
12730 *
12731 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer dz.c
12732 *
12733 - * and look at the resulting assemble code in serial.s.
12734 + * and look at the resulting assemble code in dz.s.
12735 *
12736 * ------------------------------------------------------------
12737 */
12738 @@ -188,101 +214,97 @@
12739 * This routine deals with inputs from any lines.
12740 * ------------------------------------------------------------
12741 */
12742 -static inline void receive_chars(struct dz_serial *info_in)
12743 +static inline void receive_chars(struct dz_serial *info_in,
12744 + struct pt_regs *regs)
12745 {
12746 -
12747 struct dz_serial *info;
12748 - struct tty_struct *tty = 0;
12749 + struct tty_struct *tty;
12750 struct async_icount *icount;
12751 - int ignore = 0;
12752 - unsigned short status, tmp;
12753 - unsigned char ch;
12754 -
12755 - /* this code is going to be a problem...
12756 - the call to tty_flip_buffer is going to need
12757 - to be rethought...
12758 - */
12759 - do {
12760 - status = dz_in(info_in, DZ_RBUF);
12761 - info = lines[LINE(status)];
12762 + int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
12763 + unsigned short status;
12764 + unsigned char ch, flag;
12765 + int i;
12766
12767 - /* punt so we don't get duplicate characters */
12768 - if (!(status & DZ_DVAL))
12769 - goto ignore_char;
12770 -
12771 - ch = UCHAR(status); /* grab the char */
12772 -
12773 -#if 0
12774 - if (info->is_console) {
12775 - if (ch == 0)
12776 - return; /* it's a break ... */
12777 - }
12778 -#endif
12779 + while ((status = dz_in(info_in, DZ_RBUF)) & DZ_DVAL) {
12780 + info = lines[LINE(status)];
12781 + tty = info->tty; /* point to the proper dev */
12782
12783 - tty = info->tty; /* now tty points to the proper dev */
12784 - icount = &info->icount;
12785 + ch = UCHAR(status); /* grab the char */
12786
12787 - if (!tty)
12788 - break;
12789 - if (tty->flip.count >= TTY_FLIPBUF_SIZE)
12790 - break;
12791 + if (!tty && (!info->hook || !info->hook->rx_char))
12792 + continue;
12793
12794 - *tty->flip.char_buf_ptr = ch;
12795 - *tty->flip.flag_buf_ptr = 0;
12796 + icount = &info->icount;
12797 icount->rx++;
12798
12799 - /* keep track of the statistics */
12800 - if (status & (DZ_OERR | DZ_FERR | DZ_PERR)) {
12801 - if (status & DZ_PERR) /* parity error */
12802 - icount->parity++;
12803 - else if (status & DZ_FERR) /* frame error */
12804 - icount->frame++;
12805 - if (status & DZ_OERR) /* overrun error */
12806 - icount->overrun++;
12807 -
12808 - /* check to see if we should ignore the character
12809 - and mask off conditions that should be ignored
12810 + flag = 0;
12811 + if (status & DZ_FERR) { /* frame error */
12812 + /*
12813 + * There is no separate BREAK status bit, so
12814 + * treat framing errors as BREAKs for Magic SysRq
12815 + * and SAK; normally, otherwise.
12816 */
12817 -
12818 - if (status & info->ignore_status_mask) {
12819 - if (++ignore > 100)
12820 - break;
12821 - goto ignore_char;
12822 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
12823 + !defined(MODULE)
12824 + if (info->line == dz_sercons.index) {
12825 + if (!break_pressed)
12826 + break_pressed = jiffies;
12827 + continue;
12828 }
12829 - /* mask off the error conditions we want to ignore */
12830 - tmp = status & info->read_status_mask;
12831 -
12832 - if (tmp & DZ_PERR) {
12833 - *tty->flip.flag_buf_ptr = TTY_PARITY;
12834 -#ifdef DEBUG_DZ
12835 - debug_console("PERR\n", 5);
12836 -#endif
12837 - } else if (tmp & DZ_FERR) {
12838 - *tty->flip.flag_buf_ptr = TTY_FRAME;
12839 -#ifdef DEBUG_DZ
12840 - debug_console("FERR\n", 5);
12841 #endif
12842 + flag = TTY_BREAK;
12843 + if (info->flags & DZ_SAK)
12844 + do_SAK(tty);
12845 + else
12846 + flag = TTY_FRAME;
12847 + } else if (status & DZ_OERR) /* overrun error */
12848 + flag = TTY_OVERRUN;
12849 + else if (status & DZ_PERR) /* parity error */
12850 + flag = TTY_PARITY;
12851 +
12852 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
12853 + !defined(MODULE)
12854 + if (break_pressed && info->line == dz_sercons.index) {
12855 + if (time_before(jiffies, break_pressed + HZ * 5)) {
12856 + handle_sysrq(ch, regs, NULL, NULL);
12857 + break_pressed = 0;
12858 + continue;
12859 }
12860 - if (tmp & DZ_OERR) {
12861 -#ifdef DEBUG_DZ
12862 - debug_console("OERR\n", 5);
12863 + break_pressed = 0;
12864 + }
12865 #endif
12866 - if (tty->flip.count < TTY_FLIPBUF_SIZE) {
12867 - tty->flip.count++;
12868 - tty->flip.flag_buf_ptr++;
12869 - tty->flip.char_buf_ptr++;
12870 - *tty->flip.flag_buf_ptr = TTY_OVERRUN;
12871 - }
12872 - }
12873 +
12874 + if (info->hook && info->hook->rx_char) {
12875 + (*info->hook->rx_char)(ch, flag);
12876 + return;
12877 }
12878 - tty->flip.flag_buf_ptr++;
12879 - tty->flip.char_buf_ptr++;
12880 - tty->flip.count++;
12881 - ignore_char:
12882 - } while (status & DZ_DVAL);
12883
12884 - if (tty)
12885 - tty_flip_buffer_push(tty);
12886 + /* keep track of the statistics */
12887 + switch (flag) {
12888 + case TTY_FRAME:
12889 + icount->frame++;
12890 + break;
12891 + case TTY_PARITY:
12892 + icount->parity++;
12893 + break;
12894 + case TTY_OVERRUN:
12895 + icount->overrun++;
12896 + break;
12897 + case TTY_BREAK:
12898 + icount->brk++;
12899 + break;
12900 + default:
12901 + break;
12902 + }
12903 +
12904 + if ((status & info->ignore_status_mask) == 0) {
12905 + tty_insert_flip_char(tty, ch, flag);
12906 + lines_rx[LINE(status)] = 1;
12907 + }
12908 + }
12909 + for (i = 0; i < DZ_NB_PORT; i++)
12910 + if (lines_rx[i])
12911 + tty_flip_buffer_push(lines[i]->tty);
12912 }
12913
12914 /*
12915 @@ -292,20 +314,34 @@
12916 * This routine deals with outputs to any lines.
12917 * ------------------------------------------------------------
12918 */
12919 -static inline void transmit_chars(struct dz_serial *info)
12920 +static inline void transmit_chars(struct dz_serial *info_in)
12921 {
12922 + struct dz_serial *info;
12923 + unsigned short status;
12924 unsigned char tmp;
12925
12926 + status = dz_in(info_in, DZ_CSR);
12927 + info = lines[LINE(status)];
12928
12929 + if (info->hook || !info->tty) {
12930 + unsigned short mask, tmp;
12931
12932 - if (info->x_char) { /* XON/XOFF chars */
12933 + mask = 1 << info->line;
12934 + tmp = dz_in(info, DZ_TCR); /* read the TX flag */
12935 + tmp &= ~mask; /* clear the TX flag */
12936 + dz_out(info, DZ_TCR, tmp);
12937 + return;
12938 + }
12939 +
12940 + if (info->x_char) { /* XON/XOFF chars */
12941 dz_out(info, DZ_TDR, info->x_char);
12942 info->icount.tx++;
12943 info->x_char = 0;
12944 return;
12945 }
12946 /* if nothing to do or stopped or hardware stopped */
12947 - if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tty->hw_stopped) {
12948 + if (info->xmit_cnt <= 0 ||
12949 + info->tty->stopped || info->tty->hw_stopped) {
12950 dz_stop(info->tty);
12951 return;
12952 }
12953 @@ -359,15 +395,14 @@
12954 */
12955 static void dz_interrupt(int irq, void *dev, struct pt_regs *regs)
12956 {
12957 - struct dz_serial *info;
12958 + struct dz_serial *info = (struct dz_serial *)dev;
12959 unsigned short status;
12960
12961 /* get the reason why we just got an irq */
12962 - status = dz_in((struct dz_serial *) dev, DZ_CSR);
12963 - info = lines[LINE(status)]; /* re-arrange info the proper port */
12964 + status = dz_in(info, DZ_CSR);
12965
12966 if (status & DZ_RDONE)
12967 - receive_chars(info); /* the receive function */
12968 + receive_chars(info, regs);
12969
12970 if (status & DZ_TRDY)
12971 transmit_chars(info);
12972 @@ -514,7 +549,7 @@
12973
12974
12975 info->cflags &= ~DZ_CREAD; /* turn off receive enable flag */
12976 - dz_out(info, DZ_LPR, info->cflags);
12977 + dz_out(info, DZ_LPR, info->cflags | info->line);
12978
12979 if (info->xmit_buf) { /* free Tx buffer */
12980 free_page((unsigned long) info->xmit_buf);
12981 @@ -545,18 +580,21 @@
12982 {
12983 unsigned long flags;
12984 unsigned cflag;
12985 - int baud;
12986 + int baud, i;
12987
12988 - if (!info->tty || !info->tty->termios)
12989 - return;
12990 + if (!info->hook) {
12991 + if (!info->tty || !info->tty->termios)
12992 + return;
12993 + cflag = info->tty->termios->c_cflag;
12994 + } else {
12995 + cflag = info->hook->cflags;
12996 + }
12997
12998 save_flags(flags);
12999 cli();
13000
13001 info->cflags = info->line;
13002
13003 - cflag = info->tty->termios->c_cflag;
13004 -
13005 switch (cflag & CSIZE) {
13006 case CS5:
13007 info->cflags |= DZ_CS5;
13008 @@ -579,7 +617,16 @@
13009 if (cflag & PARODD)
13010 info->cflags |= DZ_PARODD;
13011
13012 - baud = tty_get_baud_rate(info->tty);
13013 + i = cflag & CBAUD;
13014 + if (i & CBAUDEX) {
13015 + i &= ~CBAUDEX;
13016 + if (!info->hook)
13017 + info->tty->termios->c_cflag &= ~CBAUDEX;
13018 + else
13019 + info->hook->cflags &= ~CBAUDEX;
13020 + }
13021 + baud = baud_table[i];
13022 +
13023 switch (baud) {
13024 case 50:
13025 info->cflags |= DZ_B50;
13026 @@ -629,16 +676,16 @@
13027 }
13028
13029 info->cflags |= DZ_RXENAB;
13030 - dz_out(info, DZ_LPR, info->cflags);
13031 + dz_out(info, DZ_LPR, info->cflags | info->line);
13032
13033 /* setup accept flag */
13034 info->read_status_mask = DZ_OERR;
13035 - if (I_INPCK(info->tty))
13036 + if (info->tty && I_INPCK(info->tty))
13037 info->read_status_mask |= (DZ_FERR | DZ_PERR);
13038
13039 /* characters to ignore */
13040 info->ignore_status_mask = 0;
13041 - if (I_IGNPAR(info->tty))
13042 + if (info->tty && I_IGNPAR(info->tty))
13043 info->ignore_status_mask |= (DZ_FERR | DZ_PERR);
13044
13045 restore_flags(flags);
13046 @@ -694,7 +741,7 @@
13047
13048 down(&tmp_buf_sem);
13049 while (1) {
13050 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13051 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13052 if (c <= 0)
13053 break;
13054
13055 @@ -707,7 +754,7 @@
13056 save_flags(flags);
13057 cli();
13058
13059 - c = MIN(c, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13060 + c = min(c, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13061 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
13062 info->xmit_head = ((info->xmit_head + c) & (DZ_XMIT_SIZE - 1));
13063 info->xmit_cnt += c;
13064 @@ -727,7 +774,7 @@
13065 save_flags(flags);
13066 cli();
13067
13068 - c = MIN(count, MIN(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13069 + c = min(count, min(DZ_XMIT_SIZE - info->xmit_cnt - 1, DZ_XMIT_SIZE - info->xmit_head));
13070 if (c <= 0) {
13071 restore_flags(flags);
13072 break;
13073 @@ -845,7 +892,7 @@
13074
13075 /*
13076 * ------------------------------------------------------------
13077 - * rs_ioctl () and friends
13078 + * dz_ioctl () and friends
13079 * ------------------------------------------------------------
13080 */
13081 static int get_serial_info(struct dz_serial *info,
13082 @@ -958,6 +1005,9 @@
13083 struct dz_serial *info = (struct dz_serial *) tty->driver_data;
13084 int retval;
13085
13086 + if (info->hook)
13087 + return -ENODEV;
13088 +
13089 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
13090 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
13091 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
13092 @@ -1252,19 +1302,14 @@
13093 int retval, line;
13094
13095 line = MINOR(tty->device) - tty->driver.minor_start;
13096 -
13097 - /* The dz lines for the mouse/keyboard must be
13098 - * opened using their respective drivers.
13099 - */
13100 if ((line < 0) || (line >= DZ_NB_PORT))
13101 return -ENODEV;
13102 + info = lines[line];
13103
13104 - if ((line == DZ_KEYBOARD) || (line == DZ_MOUSE))
13105 + if (info->hook)
13106 return -ENODEV;
13107
13108 - info = lines[line];
13109 info->count++;
13110 -
13111 tty->driver_data = info;
13112 info->tty = tty;
13113
13114 @@ -1285,14 +1330,21 @@
13115 else
13116 *tty->termios = info->callout_termios;
13117 change_speed(info);
13118 -
13119 }
13120 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13121 + if (dz_sercons.cflag && dz_sercons.index == line) {
13122 + tty->termios->c_cflag = dz_sercons.cflag;
13123 + dz_sercons.cflag = 0;
13124 + change_speed(info);
13125 + }
13126 +#endif
13127 +
13128 info->session = current->session;
13129 info->pgrp = current->pgrp;
13130 return 0;
13131 }
13132
13133 -static void show_serial_version(void)
13134 +static void __init show_serial_version(void)
13135 {
13136 printk("%s%s\n", dz_name, dz_version);
13137 }
13138 @@ -1300,7 +1352,6 @@
13139 int __init dz_init(void)
13140 {
13141 int i;
13142 - long flags;
13143 struct dz_serial *info;
13144
13145 /* Setup base handler, and timer table. */
13146 @@ -1311,9 +1362,9 @@
13147 memset(&serial_driver, 0, sizeof(struct tty_driver));
13148 serial_driver.magic = TTY_DRIVER_MAGIC;
13149 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
13150 - serial_driver.name = "ttyS";
13151 -#else
13152 serial_driver.name = "tts/%d";
13153 +#else
13154 + serial_driver.name = "ttyS";
13155 #endif
13156 serial_driver.major = TTY_MAJOR;
13157 serial_driver.minor_start = 64;
13158 @@ -1352,9 +1403,9 @@
13159 */
13160 callout_driver = serial_driver;
13161 #if (LINUX_VERSION_CODE > 0x2032D && defined(CONFIG_DEVFS_FS))
13162 - callout_driver.name = "cua";
13163 -#else
13164 callout_driver.name = "cua/%d";
13165 +#else
13166 + callout_driver.name = "cua";
13167 #endif
13168 callout_driver.major = TTYAUX_MAJOR;
13169 callout_driver.subtype = SERIAL_TYPE_CALLOUT;
13170 @@ -1363,25 +1414,27 @@
13171 panic("Couldn't register serial driver");
13172 if (tty_register_driver(&callout_driver))
13173 panic("Couldn't register callout driver");
13174 - save_flags(flags);
13175 - cli();
13176
13177 for (i = 0; i < DZ_NB_PORT; i++) {
13178 info = &multi[i];
13179 lines[i] = info;
13180 - info->magic = SERIAL_MAGIC;
13181 -
13182 + info->tty = 0;
13183 + info->x_char = 0;
13184 if (mips_machtype == MACH_DS23100 ||
13185 mips_machtype == MACH_DS5100)
13186 info->port = (unsigned long) KN01_DZ11_BASE;
13187 else
13188 info->port = (unsigned long) KN02_DZ11_BASE;
13189 -
13190 info->line = i;
13191 - info->tty = 0;
13192 +
13193 + if (info->hook && info->hook->init_info) {
13194 + (*info->hook->init_info)(info);
13195 + continue;
13196 + }
13197 +
13198 + info->magic = SERIAL_MAGIC;
13199 info->close_delay = 50;
13200 info->closing_wait = 3000;
13201 - info->x_char = 0;
13202 info->event = 0;
13203 info->count = 0;
13204 info->blocked_open = 0;
13205 @@ -1393,25 +1446,16 @@
13206 info->normal_termios = serial_driver.init_termios;
13207 init_waitqueue_head(&info->open_wait);
13208 init_waitqueue_head(&info->close_wait);
13209 -
13210 - /*
13211 - * If we are pointing to address zero then punt - not correctly
13212 - * set up in setup.c to handle this.
13213 - */
13214 - if (!info->port)
13215 - return 0;
13216 -
13217 - printk("ttyS%02d at 0x%08x (irq = %d)\n", info->line,
13218 - info->port, dec_interrupt[DEC_IRQ_DZ11]);
13219 -
13220 + printk("ttyS%02d at 0x%08x (irq = %d) is a DC7085 DZ\n",
13221 + info->line, info->port, dec_interrupt[DEC_IRQ_DZ11]);
13222 tty_register_devfs(&serial_driver, 0,
13223 - serial_driver.minor_start + info->line);
13224 + serial_driver.minor_start + info->line);
13225 tty_register_devfs(&callout_driver, 0,
13226 - callout_driver.minor_start + info->line);
13227 + callout_driver.minor_start + info->line);
13228 }
13229
13230 - /* reset the chip */
13231 #ifndef CONFIG_SERIAL_DEC_CONSOLE
13232 + /* reset the chip */
13233 dz_out(info, DZ_CSR, DZ_CLR);
13234 while (dz_in(info, DZ_CSR) & DZ_CLR);
13235 iob();
13236 @@ -1420,43 +1464,104 @@
13237 dz_out(info, DZ_CSR, DZ_MSE);
13238 #endif
13239
13240 - /* order matters here... the trick is that flags
13241 - is updated... in request_irq - to immediatedly obliterate
13242 - it is unwise. */
13243 - restore_flags(flags);
13244 -
13245 -
13246 if (request_irq(dec_interrupt[DEC_IRQ_DZ11], dz_interrupt,
13247 - SA_INTERRUPT, "DZ", lines[0]))
13248 + 0, "DZ", lines[0]))
13249 panic("Unable to register DZ interrupt");
13250
13251 + for (i = 0; i < DZ_NB_PORT; i++)
13252 + if (lines[i]->hook) {
13253 + startup(lines[i]);
13254 + if (lines[i]->hook->init_channel)
13255 + (*lines[i]->hook->init_channel)(lines[i]);
13256 + }
13257 +
13258 return 0;
13259 }
13260
13261 -#ifdef CONFIG_SERIAL_DEC_CONSOLE
13262 -static void dz_console_put_char(unsigned char ch)
13263 +/*
13264 + * polling I/O routines
13265 + */
13266 +static int dz_poll_tx_char(void *handle, unsigned char ch)
13267 {
13268 unsigned long flags;
13269 - int loops = 2500;
13270 - unsigned short tmp = ch;
13271 - /* this code sends stuff out to serial device - spinning its
13272 - wheels and waiting. */
13273 + struct dz_serial *info = handle;
13274 + unsigned short csr, tcr, trdy, mask;
13275 + int loops = 10000;
13276 + int ret;
13277
13278 - /* force the issue - point it at lines[3] */
13279 - dz_console = &multi[CONSOLE_LINE];
13280 + local_irq_save(flags);
13281 + csr = dz_in(info, DZ_CSR);
13282 + dz_out(info, DZ_CSR, csr & ~DZ_TIE);
13283 + tcr = dz_in(info, DZ_TCR);
13284 + tcr |= 1 << info->line;
13285 + mask = tcr;
13286 + dz_out(info, DZ_TCR, mask);
13287 + iob();
13288 + local_irq_restore(flags);
13289
13290 - save_flags(flags);
13291 - cli();
13292 + while (loops--) {
13293 + trdy = dz_in(info, DZ_CSR);
13294 + if (!(trdy & DZ_TRDY))
13295 + continue;
13296 + trdy = (trdy & DZ_TLINE) >> 8;
13297 + if (trdy == info->line)
13298 + break;
13299 + mask &= ~(1 << trdy);
13300 + dz_out(info, DZ_TCR, mask);
13301 + iob();
13302 + udelay(2);
13303 + }
13304
13305 + if (loops) {
13306 + dz_out(info, DZ_TDR, ch);
13307 + ret = 0;
13308 + } else
13309 + ret = -EAGAIN;
13310
13311 - /* spin our wheels */
13312 - while (((dz_in(dz_console, DZ_CSR) & DZ_TRDY) != DZ_TRDY) && loops--);
13313 + dz_out(info, DZ_TCR, tcr);
13314 + dz_out(info, DZ_CSR, csr);
13315
13316 - /* Actually transmit the character. */
13317 - dz_out(dz_console, DZ_TDR, tmp);
13318 + return ret;
13319 +}
13320
13321 - restore_flags(flags);
13322 +static int dz_poll_rx_char(void *handle)
13323 +{
13324 + return -ENODEV;
13325 +}
13326 +
13327 +int register_dz_hook(unsigned int channel, struct dec_serial_hook *hook)
13328 +{
13329 + struct dz_serial *info = multi + channel;
13330 +
13331 + if (info->hook) {
13332 + printk("%s: line %d has already a hook registered\n",
13333 + __FUNCTION__, channel);
13334 +
13335 + return 0;
13336 + } else {
13337 + hook->poll_rx_char = dz_poll_rx_char;
13338 + hook->poll_tx_char = dz_poll_tx_char;
13339 + info->hook = hook;
13340 +
13341 + return 1;
13342 + }
13343 +}
13344 +
13345 +int unregister_dz_hook(unsigned int channel)
13346 +{
13347 + struct dz_serial *info = &multi[channel];
13348 +
13349 + if (info->hook) {
13350 + info->hook = NULL;
13351 + return 1;
13352 + } else {
13353 + printk("%s: trying to unregister hook on line %d,"
13354 + " but none is registered\n", __FUNCTION__, channel);
13355 + return 0;
13356 + }
13357 }
13358 +
13359 +#ifdef CONFIG_SERIAL_DEC_CONSOLE
13360 /*
13361 * -------------------------------------------------------------------
13362 * dz_console_print ()
13363 @@ -1465,17 +1570,19 @@
13364 * The console must be locked when we get here.
13365 * -------------------------------------------------------------------
13366 */
13367 -static void dz_console_print(struct console *cons,
13368 +static void dz_console_print(struct console *co,
13369 const char *str,
13370 unsigned int count)
13371 {
13372 + struct dz_serial *info = multi + co->index;
13373 +
13374 #ifdef DEBUG_DZ
13375 prom_printf((char *) str);
13376 #endif
13377 while (count--) {
13378 if (*str == '\n')
13379 - dz_console_put_char('\r');
13380 - dz_console_put_char(*str++);
13381 + dz_poll_tx_char(info, '\r');
13382 + dz_poll_tx_char(info, *str++);
13383 }
13384 }
13385
13386 @@ -1486,12 +1593,12 @@
13387
13388 static int __init dz_console_setup(struct console *co, char *options)
13389 {
13390 + struct dz_serial *info = multi + co->index;
13391 int baud = 9600;
13392 int bits = 8;
13393 int parity = 'n';
13394 int cflag = CREAD | HUPCL | CLOCAL;
13395 char *s;
13396 - unsigned short mask, tmp;
13397
13398 if (options) {
13399 baud = simple_strtoul(options, NULL, 10);
13400 @@ -1542,44 +1649,31 @@
13401 }
13402 co->cflag = cflag;
13403
13404 - /* TOFIX: force to console line */
13405 - dz_console = &multi[CONSOLE_LINE];
13406 if ((mips_machtype == MACH_DS23100) || (mips_machtype == MACH_DS5100))
13407 - dz_console->port = KN01_DZ11_BASE;
13408 + info->port = KN01_DZ11_BASE;
13409 else
13410 - dz_console->port = KN02_DZ11_BASE;
13411 - dz_console->line = CONSOLE_LINE;
13412 + info->port = KN02_DZ11_BASE;
13413 + info->line = co->index;
13414
13415 - dz_out(dz_console, DZ_CSR, DZ_CLR);
13416 - while ((tmp = dz_in(dz_console, DZ_CSR)) & DZ_CLR);
13417 + dz_out(info, DZ_CSR, DZ_CLR);
13418 + while (dz_in(info, DZ_CSR) & DZ_CLR);
13419
13420 /* enable scanning */
13421 - dz_out(dz_console, DZ_CSR, DZ_MSE);
13422 + dz_out(info, DZ_CSR, DZ_MSE);
13423
13424 /* Set up flags... */
13425 - dz_console->cflags = 0;
13426 - dz_console->cflags |= DZ_B9600;
13427 - dz_console->cflags |= DZ_CS8;
13428 - dz_console->cflags |= DZ_PARENB;
13429 - dz_out(dz_console, DZ_LPR, dz_console->cflags);
13430 -
13431 - mask = 1 << dz_console->line;
13432 - tmp = dz_in(dz_console, DZ_TCR); /* read the TX flag */
13433 - if (!(tmp & mask)) {
13434 - tmp |= mask; /* set the TX flag */
13435 - dz_out(dz_console, DZ_TCR, tmp);
13436 - }
13437 + dz_out(info, DZ_LPR, cflag | info->line);
13438 +
13439 return 0;
13440 }
13441
13442 -static struct console dz_sercons =
13443 -{
13444 - .name = "ttyS",
13445 - .write = dz_console_print,
13446 - .device = dz_console_device,
13447 - .setup = dz_console_setup,
13448 - .flags = CON_CONSDEV | CON_PRINTBUFFER,
13449 - .index = CONSOLE_LINE,
13450 +static struct console dz_sercons = {
13451 + .name = "ttyS",
13452 + .write = dz_console_print,
13453 + .device = dz_console_device,
13454 + .setup = dz_console_setup,
13455 + .flags = CON_PRINTBUFFER,
13456 + .index = -1,
13457 };
13458
13459 void __init dz_serial_console_init(void)
13460 diff -Nur linux-2.4.30/drivers/char/dz.h linux-2.4.30-mips/drivers/char/dz.h
13461 --- linux-2.4.30/drivers/char/dz.h 2002-08-03 02:39:43.000000000 +0200
13462 +++ linux-2.4.30-mips/drivers/char/dz.h 2004-09-28 02:53:01.000000000 +0200
13463 @@ -10,6 +10,8 @@
13464 #ifndef DZ_SERIAL_H
13465 #define DZ_SERIAL_H
13466
13467 +#include <asm/dec/serial.h>
13468 +
13469 #define SERIAL_MAGIC 0x5301
13470
13471 /*
13472 @@ -17,6 +19,7 @@
13473 */
13474 #define DZ_TRDY 0x8000 /* Transmitter empty */
13475 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enable */
13476 +#define DZ_TLINE 0x0300 /* Transmitter Line Number */
13477 #define DZ_RDONE 0x0080 /* Receiver data ready */
13478 #define DZ_RIE 0x0040 /* Receive Interrupt Enable */
13479 #define DZ_MSE 0x0020 /* Master Scan Enable */
13480 @@ -37,19 +40,30 @@
13481 #define UCHAR(x) (unsigned char)(x & DZ_RBUF_MASK)
13482
13483 /*
13484 - * Definitions for the Transmit Register.
13485 + * Definitions for the Transmit Control Register.
13486 */
13487 #define DZ_LINE_KEYBOARD 0x0001
13488 #define DZ_LINE_MOUSE 0x0002
13489 #define DZ_LINE_MODEM 0x0004
13490 #define DZ_LINE_PRINTER 0x0008
13491
13492 +#define DZ_MODEM_RTS 0x0800 /* RTS for the modem line (2) */
13493 #define DZ_MODEM_DTR 0x0400 /* DTR for the modem line (2) */
13494 +#define DZ_PRINT_RTS 0x0200 /* RTS for the printer line (3) */
13495 +#define DZ_PRINT_DTR 0x0100 /* DTR for the printer line (3) */
13496 +#define DZ_LNENB 0x000f /* Transmitter Line Enable */
13497
13498 /*
13499 * Definitions for the Modem Status Register.
13500 */
13501 +#define DZ_MODEM_RI 0x0800 /* RI for the modem line (2) */
13502 +#define DZ_MODEM_CD 0x0400 /* CD for the modem line (2) */
13503 #define DZ_MODEM_DSR 0x0200 /* DSR for the modem line (2) */
13504 +#define DZ_MODEM_CTS 0x0100 /* CTS for the modem line (2) */
13505 +#define DZ_PRINT_RI 0x0008 /* RI for the printer line (2) */
13506 +#define DZ_PRINT_CD 0x0004 /* CD for the printer line (2) */
13507 +#define DZ_PRINT_DSR 0x0002 /* DSR for the printer line (2) */
13508 +#define DZ_PRINT_CTS 0x0001 /* CTS for the printer line (2) */
13509
13510 /*
13511 * Definitions for the Transmit Data Register.
13512 @@ -115,9 +129,6 @@
13513
13514 #define DZ_EVENT_WRITE_WAKEUP 0
13515
13516 -#ifndef MIN
13517 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
13518 -
13519 #define DZ_INITIALIZED 0x80000000 /* Serial port was initialized */
13520 #define DZ_CALLOUT_ACTIVE 0x40000000 /* Call out device is active */
13521 #define DZ_NORMAL_ACTIVE 0x20000000 /* Normal device is active */
13522 @@ -129,6 +140,7 @@
13523 #define DZ_CLOSING_WAIT_INF 0
13524 #define DZ_CLOSING_WAIT_NONE 65535
13525
13526 +#define DZ_SAK 0x0004 /* Secure Attention Key (Orange book) */
13527 #define DZ_SPLIT_TERMIOS 0x0008 /* Separate termios for dialin/callout */
13528 #define DZ_SESSION_LOCKOUT 0x0100 /* Lock out cua opens based on session */
13529 #define DZ_PGRP_LOCKOUT 0x0200 /* Lock out cua opens based on pgrp */
13530 @@ -166,79 +178,9 @@
13531 long session; /* Session of opening process */
13532 long pgrp; /* pgrp of opening process */
13533
13534 + struct dec_serial_hook *hook; /* Hook on this channel. */
13535 unsigned char is_console; /* flag indicating a serial console */
13536 unsigned char is_initialized;
13537 };
13538
13539 -static struct dz_serial multi[DZ_NB_PORT]; /* Four serial lines in the DZ chip */
13540 -static struct dz_serial *dz_console;
13541 -static struct tty_driver serial_driver, callout_driver;
13542 -
13543 -static struct tty_struct *serial_table[DZ_NB_PORT];
13544 -static struct termios *serial_termios[DZ_NB_PORT];
13545 -static struct termios *serial_termios_locked[DZ_NB_PORT];
13546 -
13547 -static int serial_refcount;
13548 -
13549 -/*
13550 - * tmp_buf is used as a temporary buffer by serial_write. We need to
13551 - * lock it in case the copy_from_user blocks while swapping in a page,
13552 - * and some other program tries to do a serial write at the same time.
13553 - * Since the lock will only come under contention when the system is
13554 - * swapping and available memory is low, it makes sense to share one
13555 - * buffer across all the serial ports, since it significantly saves
13556 - * memory if large numbers of serial ports are open.
13557 - */
13558 -static unsigned char *tmp_buf;
13559 -static DECLARE_MUTEX(tmp_buf_sem);
13560 -
13561 -static char *dz_name = "DECstation DZ serial driver version ";
13562 -static char *dz_version = "1.02";
13563 -
13564 -static inline unsigned short dz_in (struct dz_serial *, unsigned);
13565 -static inline void dz_out (struct dz_serial *, unsigned, unsigned short);
13566 -
13567 -static inline void dz_sched_event (struct dz_serial *, int);
13568 -static inline void receive_chars (struct dz_serial *);
13569 -static inline void transmit_chars (struct dz_serial *);
13570 -static inline void check_modem_status (struct dz_serial *);
13571 -
13572 -static void dz_stop (struct tty_struct *);
13573 -static void dz_start (struct tty_struct *);
13574 -static void dz_interrupt (int, void *, struct pt_regs *);
13575 -static void do_serial_bh (void);
13576 -static void do_softint (void *);
13577 -static void do_serial_hangup (void *);
13578 -static void change_speed (struct dz_serial *);
13579 -static void dz_flush_chars (struct tty_struct *);
13580 -static void dz_console_print (struct console *, const char *, unsigned int);
13581 -static void dz_flush_buffer (struct tty_struct *);
13582 -static void dz_throttle (struct tty_struct *);
13583 -static void dz_unthrottle (struct tty_struct *);
13584 -static void dz_send_xchar (struct tty_struct *, char);
13585 -static void shutdown (struct dz_serial *);
13586 -static void send_break (struct dz_serial *, int);
13587 -static void dz_set_termios (struct tty_struct *, struct termios *);
13588 -static void dz_close (struct tty_struct *, struct file *);
13589 -static void dz_hangup (struct tty_struct *);
13590 -static void show_serial_version (void);
13591 -
13592 -static int dz_write (struct tty_struct *, int, const unsigned char *, int);
13593 -static int dz_write_room (struct tty_struct *);
13594 -static int dz_chars_in_buffer (struct tty_struct *);
13595 -static int startup (struct dz_serial *);
13596 -static int get_serial_info (struct dz_serial *, struct serial_struct *);
13597 -static int set_serial_info (struct dz_serial *, struct serial_struct *);
13598 -static int get_lsr_info (struct dz_serial *, unsigned int *);
13599 -static int dz_ioctl (struct tty_struct *, struct file *, unsigned int, unsigned long);
13600 -static int block_til_ready (struct tty_struct *, struct file *, struct dz_serial *);
13601 -static int dz_open (struct tty_struct *, struct file *);
13602 -
13603 -#ifdef MODULE
13604 -int init_module (void)
13605 -void cleanup_module (void)
13606 -#endif
13607 -
13608 -#endif
13609 -
13610 #endif /* DZ_SERIAL_H */
13611 diff -Nur linux-2.4.30/drivers/char/ibm_workpad_keymap.map linux-2.4.30-mips/drivers/char/ibm_workpad_keymap.map
13612 --- linux-2.4.30/drivers/char/ibm_workpad_keymap.map 1970-01-01 01:00:00.000000000 +0100
13613 +++ linux-2.4.30-mips/drivers/char/ibm_workpad_keymap.map 2003-12-20 15:20:44.000000000 +0100
13614 @@ -0,0 +1,343 @@
13615 +# Keymap for IBM Workpad z50
13616 +# US Mapping
13617 +#
13618 +# by Michael Klar <wyldfier@iname.com>
13619 +#
13620 +# This is a great big mess on account of how the Caps Lock key is handled as
13621 +# LeftShift-RightShift. Right shift key had to be broken out, so don't use
13622 +# use this map file as a basis for other keyboards that don't do the same
13623 +# thing with Caps Lock.
13624 +#
13625 +# This file is subject to the terms and conditions of the GNU General Public
13626 +# License. See the file "COPYING" in the main directory of this archive
13627 +# for more details.
13628 +
13629 +keymaps 0-2,4-5,8,12,32-33,36-37
13630 +strings as usual
13631 +
13632 +keycode 0 = F1 F11 Console_13
13633 + shiftr keycode 0 = F11
13634 + shift shiftr keycode 0 = F11
13635 + control keycode 0 = F1
13636 + alt keycode 0 = Console_1
13637 + control alt keycode 0 = Console_1
13638 +keycode 1 = F3 F13 Console_15
13639 + shiftr keycode 1 = F13
13640 + shift shiftr keycode 1 = F13
13641 + control keycode 1 = F3
13642 + alt keycode 1 = Console_3
13643 + control alt keycode 1 = Console_3
13644 +keycode 2 = F5 F15 Console_17
13645 + shiftr keycode 2 = F15
13646 + shift shiftr keycode 2 = F15
13647 + control keycode 2 = F5
13648 + alt keycode 2 = Console_5
13649 + control alt keycode 2 = Console_5
13650 +keycode 3 = F7 F17 Console_19
13651 + shiftr keycode 3 = F17
13652 + shift shiftr keycode 3 = F17
13653 + control keycode 3 = F7
13654 + alt keycode 3 = Console_7
13655 + control alt keycode 3 = Console_7
13656 +keycode 4 = F9 F19 Console_21
13657 + shiftr keycode 4 = F19
13658 + shift shiftr keycode 4 = F19
13659 + control keycode 4 = F9
13660 + alt keycode 4 = Console_9
13661 + control alt keycode 4 = Console_9
13662 +#keycode 5 is contrast down
13663 +#keycode 6 is contrast up
13664 +keycode 7 = F11 F11 Console_23
13665 + shiftr keycode 7 = F11
13666 + shift shiftr keycode 7 = F11
13667 + control keycode 7 = F11
13668 + alt keycode 7 = Console_11
13669 + control alt keycode 7 = Console_11
13670 +keycode 8 = F2 F12 Console_14
13671 + shiftr keycode 8 = F12
13672 + shift shiftr keycode 8 = F12
13673 + control keycode 8 = F2
13674 + alt keycode 8 = Console_2
13675 + control alt keycode 8 = Console_2
13676 +keycode 9 = F4 F14 Console_16
13677 + shiftr keycode 9 = F14
13678 + shift shiftr keycode 9 = F14
13679 + control keycode 9 = F4
13680 + alt keycode 9 = Console_4
13681 + control alt keycode 9 = Console_4
13682 +keycode 10 = F6 F16 Console_18
13683 + shiftr keycode 10 = F16
13684 + shift shiftr keycode 10 = F16
13685 + control keycode 10 = F6
13686 + alt keycode 10 = Console_6
13687 + control alt keycode 10 = Console_6
13688 +keycode 11 = F8 F18 Console_20
13689 + shiftr keycode 11 = F18
13690 + shift shiftr keycode 11 = F18
13691 + control keycode 11 = F8
13692 + alt keycode 11 = Console_8
13693 + control alt keycode 11 = Console_8
13694 +keycode 12 = F10 F20 Console_22
13695 + shiftr keycode 12 = F20
13696 + shift shiftr keycode 12 = F20
13697 + control keycode 12 = F10
13698 + alt keycode 12 = Console_10
13699 + control alt keycode 12 = Console_10
13700 +#keycode 13 is brightness down
13701 +#keycode 14 is brightness up
13702 +keycode 15 = F12 F12 Console_24
13703 + shiftr keycode 15 = F12
13704 + shift shiftr keycode 15 = F12
13705 + control keycode 15 = F12
13706 + alt keycode 15 = Console_12
13707 + control alt keycode 15 = Console_12
13708 +keycode 16 = apostrophe quotedbl
13709 + shiftr keycode 16 = quotedbl
13710 + shift shiftr keycode 16 = quotedbl
13711 + control keycode 16 = Control_g
13712 + alt keycode 16 = Meta_apostrophe
13713 +keycode 17 = bracketleft braceleft
13714 + shiftr keycode 17 = braceleft
13715 + shift shiftr keycode 17 = braceleft
13716 + control keycode 17 = Escape
13717 + alt keycode 17 = Meta_bracketleft
13718 +keycode 18 = minus underscore backslash
13719 + shiftr keycode 18 = underscore
13720 + shift shiftr keycode 18 = underscore
13721 + control keycode 18 = Control_underscore
13722 + shift control keycode 18 = Control_underscore
13723 + shiftr control keycode 18 = Control_underscore
13724 + shift shiftr control keycode 18 = Control_underscore
13725 + alt keycode 18 = Meta_minus
13726 +keycode 19 = zero parenright braceright
13727 + shiftr keycode 19 = parenright
13728 + shift shiftr keycode 19 = parenright
13729 + alt keycode 19 = Meta_zero
13730 +keycode 20 = p
13731 + shiftr keycode 20 = +P
13732 + shift shiftr keycode 20 = +p
13733 +keycode 21 = semicolon colon
13734 + shiftr keycode 21 = colon
13735 + shift shiftr keycode 21 = colon
13736 + alt keycode 21 = Meta_semicolon
13737 +keycode 22 = Up Scroll_Backward
13738 + shiftr keycode 22 = Scroll_Backward
13739 + shift shiftr keycode 22 = Scroll_Backward
13740 + alt keycode 22 = Prior
13741 +keycode 23 = slash question
13742 + shiftr keycode 23 = question
13743 + shift shiftr keycode 23 = question
13744 + control keycode 23 = Delete
13745 + alt keycode 23 = Meta_slash
13746 +
13747 +keycode 27 = nine parenleft bracketright
13748 + shiftr keycode 27 = parenleft
13749 + shift shiftr keycode 27 = parenleft
13750 + alt keycode 27 = Meta_nine
13751 +keycode 28 = o
13752 + shiftr keycode 28 = +O
13753 + shift shiftr keycode 28 = +o
13754 +keycode 29 = l
13755 + shiftr keycode 29 = +L
13756 + shift shiftr keycode 29 = +l
13757 +keycode 30 = period greater
13758 + shiftr keycode 30 = greater
13759 + shift shiftr keycode 30 = greater
13760 + control keycode 30 = Compose
13761 + alt keycode 30 = Meta_period
13762 +
13763 +keycode 32 = Left Decr_Console
13764 + shiftr keycode 32 = Decr_Console
13765 + shift shiftr keycode 32 = Decr_Console
13766 + alt keycode 32 = Home
13767 +keycode 33 = bracketright braceright asciitilde
13768 + shiftr keycode 33 = braceright
13769 + shift shiftr keycode 33 = braceright
13770 + control keycode 33 = Control_bracketright
13771 + alt keycode 33 = Meta_bracketright
13772 +keycode 34 = equal plus
13773 + shiftr keycode 34 = plus
13774 + shift shiftr keycode 34 = plus
13775 + alt keycode 34 = Meta_equal
13776 +keycode 35 = eight asterisk bracketleft
13777 + shiftr keycode 35 = asterisk
13778 + shift shiftr keycode 35 = asterisk
13779 + control keycode 35 = Delete
13780 + alt keycode 35 = Meta_eight
13781 +keycode 36 = i
13782 + shiftr keycode 36 = +I
13783 + shift shiftr keycode 36 = +i
13784 +keycode 37 = k
13785 + shiftr keycode 37 = +K
13786 + shift shiftr keycode 37 = +k
13787 +keycode 38 = comma less
13788 + shiftr keycode 38 = less
13789 + shift shiftr keycode 38 = less
13790 + alt keycode 38 = Meta_comma
13791 +
13792 +keycode 40 = h
13793 + shiftr keycode 40 = +H
13794 + shift shiftr keycode 40 = +h
13795 +keycode 41 = y
13796 + shiftr keycode 41 = +Y
13797 + shift shiftr keycode 41 = +y
13798 +keycode 42 = six asciicircum
13799 + shiftr keycode 42 = asciicircum
13800 + shift shiftr keycode 42 = asciicircum
13801 + control keycode 42 = Control_asciicircum
13802 + alt keycode 42 = Meta_six
13803 +keycode 43 = seven ampersand braceleft
13804 + shiftr keycode 43 = ampersand
13805 + shift shiftr keycode 43 = ampersand
13806 + control keycode 43 = Control_underscore
13807 + alt keycode 43 = Meta_seven
13808 +keycode 44 = u
13809 + shiftr keycode 44 = +U
13810 + shift shiftr keycode 44 = +u
13811 +keycode 45 = j
13812 + shiftr keycode 45 = +J
13813 + shift shiftr keycode 45 = +j
13814 +keycode 46 = m
13815 + shiftr keycode 46 = +M
13816 + shift shiftr keycode 46 = +m
13817 +keycode 47 = n
13818 + shiftr keycode 47 = +N
13819 + shift shiftr keycode 47 = +n
13820 +
13821 +# This is the "Backspace" key:
13822 +keycode 49 = Delete Delete
13823 + shiftr keycode 49 = Delete
13824 + shift shiftr keycode 49 = Delete
13825 + control keycode 49 = BackSpace
13826 + alt keycode 49 = Meta_Delete
13827 +keycode 50 = Num_Lock
13828 + shift keycode 50 = Bare_Num_Lock
13829 + shiftr keycode 50 = Bare_Num_Lock
13830 + shift shiftr keycode 50 = Bare_Num_Lock
13831 +# This is the "Delete" key:
13832 +keycode 51 = Remove
13833 + control alt keycode 51 = Boot
13834 +
13835 +keycode 53 = backslash bar
13836 + shiftr keycode 53 = bar
13837 + shift shiftr keycode 53 = bar
13838 + control keycode 53 = Control_backslash
13839 + alt keycode 53 = Meta_backslash
13840 +keycode 54 = Return
13841 + alt keycode 54 = Meta_Control_m
13842 +keycode 55 = space space
13843 + shiftr keycode 55 = space
13844 + shift shiftr keycode 55 = space
13845 + control keycode 55 = nul
13846 + alt keycode 55 = Meta_space
13847 +keycode 56 = g
13848 + shiftr keycode 56 = +G
13849 + shift shiftr keycode 56 = +g
13850 +keycode 57 = t
13851 + shiftr keycode 57 = +T
13852 + shift shiftr keycode 57 = +t
13853 +keycode 58 = five percent
13854 + shiftr keycode 58 = percent
13855 + shift shiftr keycode 58 = percent
13856 + control keycode 58 = Control_bracketright
13857 + alt keycode 58 = Meta_five
13858 +keycode 59 = four dollar dollar
13859 + shiftr keycode 59 = dollar
13860 + shift shiftr keycode 59 = dollar
13861 + control keycode 59 = Control_backslash
13862 + alt keycode 59 = Meta_four
13863 +keycode 60 = r
13864 + shiftr keycode 60 = +R
13865 + shift shiftr keycode 60 = +r
13866 +keycode 61 = f
13867 + shiftr keycode 61 = +F
13868 + shift shiftr keycode 61 = +f
13869 + altgr keycode 61 = Hex_F
13870 +keycode 62 = v
13871 + shiftr keycode 62 = +V
13872 + shift shiftr keycode 62 = +v
13873 +keycode 63 = b
13874 + shiftr keycode 63 = +B
13875 + shift shiftr keycode 63 = +b
13876 + altgr keycode 63 = Hex_B
13877 +
13878 +keycode 67 = three numbersign
13879 + shiftr keycode 67 = numbersign
13880 + shift shiftr keycode 67 = numbersign
13881 + control keycode 67 = Escape
13882 + alt keycode 67 = Meta_three
13883 +keycode 68 = e
13884 + shiftr keycode 68 = +E
13885 + shift shiftr keycode 68 = +e
13886 + altgr keycode 68 = Hex_E
13887 +keycode 69 = d
13888 + shiftr keycode 69 = +D
13889 + shift shiftr keycode 69 = +d
13890 + altgr keycode 69 = Hex_D
13891 +keycode 70 = c
13892 + shiftr keycode 70 = +C
13893 + shift shiftr keycode 70 = +c
13894 + altgr keycode 70 = Hex_C
13895 +keycode 71 = Right Incr_Console
13896 + shiftr keycode 71 = Incr_Console
13897 + shift shiftr keycode 71 = Incr_Console
13898 + alt keycode 71 = End
13899 +
13900 +keycode 75 = two at at
13901 + shiftr keycode 75 = at
13902 + shift shiftr keycode 75 = at
13903 + control keycode 75 = nul
13904 + shift control keycode 75 = nul
13905 + shiftr control keycode 75 = nul
13906 + shift shiftr control keycode 75 = nul
13907 + alt keycode 75 = Meta_two
13908 +keycode 76 = w
13909 + shiftr keycode 76 = +W
13910 + shift shiftr keycode 76 = +w
13911 +keycode 77 = s
13912 + shiftr keycode 77 = +S
13913 + shift shiftr keycode 77 = +s
13914 +keycode 78 = x
13915 + shiftr keycode 78 = +X
13916 + shift shiftr keycode 78 = +x
13917 +keycode 79 = Down Scroll_Forward
13918 + shiftr keycode 79 = Scroll_Forward
13919 + shift shiftr keycode 79 = Scroll_Forward
13920 + alt keycode 79 = Next
13921 +keycode 80 = Escape Escape
13922 + shiftr keycode 80 = Escape
13923 + shift shiftr keycode 80 = Escape
13924 + alt keycode 80 = Meta_Escape
13925 +keycode 81 = Tab Tab
13926 + shiftr keycode 81 = Tab
13927 + shift shiftr keycode 81 = Tab
13928 + alt keycode 81 = Meta_Tab
13929 +keycode 82 = grave asciitilde
13930 + shiftr keycode 82 = asciitilde
13931 + shift shiftr keycode 82 = asciitilde
13932 + control keycode 82 = nul
13933 + alt keycode 82 = Meta_grave
13934 +keycode 83 = one exclam
13935 + shiftr keycode 83 = exclam
13936 + shift shiftr keycode 83 = exclam
13937 + alt keycode 83 = Meta_one
13938 +keycode 84 = q
13939 + shiftr keycode 84 = +Q
13940 + shift shiftr keycode 84 = +q
13941 +keycode 85 = a
13942 + shiftr keycode 85 = +A
13943 + shift shiftr keycode 85 = +a
13944 + altgr keycode 85 = Hex_A
13945 +keycode 86 = z
13946 + shiftr keycode 86 = +Z
13947 + shift shiftr keycode 86 = +z
13948 +
13949 +# This is the windows key:
13950 +keycode 88 = Decr_Console
13951 +keycode 89 = Shift
13952 +keycode 90 = Control
13953 +keycode 91 = Control
13954 +keycode 92 = Alt
13955 +keycode 93 = AltGr
13956 +keycode 94 = ShiftR
13957 + shift keycode 94 = Caps_Lock
13958 diff -Nur linux-2.4.30/drivers/char/indydog.c linux-2.4.30-mips/drivers/char/indydog.c
13959 --- linux-2.4.30/drivers/char/indydog.c 2003-08-25 13:44:41.000000000 +0200
13960 +++ linux-2.4.30-mips/drivers/char/indydog.c 2004-06-22 17:32:07.000000000 +0200
13961 @@ -1,5 +1,5 @@
13962 /*
13963 - * IndyDog 0.2 A Hardware Watchdog Device for SGI IP22
13964 + * IndyDog 0.3 A Hardware Watchdog Device for SGI IP22
13965 *
13966 * (c) Copyright 2002 Guido Guenther <agx@sigxcpu.org>, All Rights Reserved.
13967 *
13968 @@ -7,10 +7,10 @@
13969 * modify it under the terms of the GNU General Public License
13970 * as published by the Free Software Foundation; either version
13971 * 2 of the License, or (at your option) any later version.
13972 - *
13973 + *
13974 * based on softdog.c by Alan Cox <alan@redhat.com>
13975 */
13976 -
13977 +
13978 #include <linux/module.h>
13979 #include <linux/config.h>
13980 #include <linux/types.h>
13981 @@ -19,13 +19,12 @@
13982 #include <linux/mm.h>
13983 #include <linux/miscdevice.h>
13984 #include <linux/watchdog.h>
13985 -#include <linux/smp_lock.h>
13986 #include <linux/init.h>
13987 #include <asm/uaccess.h>
13988 #include <asm/sgi/mc.h>
13989
13990 -static unsigned long indydog_alive;
13991 -static int expect_close = 0;
13992 +#define PFX "indydog: "
13993 +static int indydog_alive;
13994
13995 #ifdef CONFIG_WATCHDOG_NOWAYOUT
13996 static int nowayout = 1;
13997 @@ -33,10 +32,30 @@
13998 static int nowayout = 0;
13999 #endif
14000
14001 +#define WATCHDOG_TIMEOUT 30 /* 30 sec default timeout */
14002 +
14003 MODULE_PARM(nowayout,"i");
14004 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
14005
14006 -static inline void indydog_ping(void)
14007 +static void indydog_start(void)
14008 +{
14009 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14010 +
14011 + mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
14012 + sgimc->cpuctrl0 = mc_ctrl0;
14013 +}
14014 +
14015 +static void indydog_stop(void)
14016 +{
14017 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14018 +
14019 + mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
14020 + sgimc->cpuctrl0 = mc_ctrl0;
14021 +
14022 + printk(KERN_INFO PFX "Stopped watchdog timer.\n");
14023 +}
14024 +
14025 +static void indydog_ping(void)
14026 {
14027 sgimc->watchdogt = 0;
14028 }
14029 @@ -46,18 +65,14 @@
14030 */
14031 static int indydog_open(struct inode *inode, struct file *file)
14032 {
14033 - u32 mc_ctrl0;
14034 -
14035 - if (test_and_set_bit(0,&indydog_alive))
14036 + if (indydog_alive)
14037 return -EBUSY;
14038
14039 - if (nowayout) {
14040 + if (nowayout)
14041 MOD_INC_USE_COUNT;
14042 - }
14043
14044 /* Activate timer */
14045 - mc_ctrl0 = sgimc->cpuctrl0 | SGIMC_CCTRL0_WDOG;
14046 - sgimc->cpuctrl0 = mc_ctrl0;
14047 + indydog_start();
14048 indydog_ping();
14049
14050 indydog_alive = 1;
14051 @@ -69,63 +84,48 @@
14052 static int indydog_release(struct inode *inode, struct file *file)
14053 {
14054 /* Shut off the timer.
14055 - * Lock it in if it's a module and we set nowayout. */
14056 - lock_kernel();
14057 - if (expect_close) {
14058 - u32 mc_ctrl0 = sgimc->cpuctrl0;
14059 + * Lock it in if it's a module and we defined ...NOWAYOUT */
14060 + if (!nowayout) {
14061 + u32 mc_ctrl0 = sgimc->cpuctrl0;
14062 mc_ctrl0 &= ~SGIMC_CCTRL0_WDOG;
14063 sgimc->cpuctrl0 = mc_ctrl0;
14064 printk(KERN_INFO "Stopped watchdog timer.\n");
14065 - } else
14066 - printk(KERN_CRIT "WDT device closed unexpectedly. WDT will not stop!\n");
14067 - clear_bit(0, &indydog_alive);
14068 - unlock_kernel();
14069 + }
14070 + indydog_alive = 0;
14071
14072 return 0;
14073 }
14074
14075 static ssize_t indydog_write(struct file *file, const char *data, size_t len, loff_t *ppos)
14076 {
14077 - /* Can't seek (pwrite) on this device */
14078 + /* Can't seek (pwrite) on this device */
14079 if (ppos != &file->f_pos)
14080 return -ESPIPE;
14081
14082 - /*
14083 - * Refresh the timer.
14084 - */
14085 + /* Refresh the timer. */
14086 if (len) {
14087 - if (!nowayout) {
14088 - size_t i;
14089 -
14090 - /* In case it was set long ago */
14091 - expect_close = 0;
14092 -
14093 - for (i = 0; i != len; i++) {
14094 - char c;
14095 - if (get_user(c, data + i))
14096 - return -EFAULT;
14097 - if (c == 'V')
14098 - expect_close = 1;
14099 - }
14100 - }
14101 indydog_ping();
14102 - return 1;
14103 }
14104 - return 0;
14105 + return len;
14106 }
14107
14108 static int indydog_ioctl(struct inode *inode, struct file *file,
14109 unsigned int cmd, unsigned long arg)
14110 {
14111 + int options, retval = -EINVAL;
14112 static struct watchdog_info ident = {
14113 - options: WDIOF_MAGICCLOSE,
14114 - identity: "Hardware Watchdog for SGI IP22",
14115 + .options = WDIOF_KEEPALIVEPING |
14116 + WDIOF_MAGICCLOSE,
14117 + .firmware_version = 0,
14118 + .identity = "Hardware Watchdog for SGI IP22",
14119 };
14120 +
14121 switch (cmd) {
14122 default:
14123 return -ENOIOCTLCMD;
14124 case WDIOC_GETSUPPORT:
14125 - if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident)))
14126 + if (copy_to_user((struct watchdog_info *)arg,
14127 + &ident, sizeof(ident)))
14128 return -EFAULT;
14129 return 0;
14130 case WDIOC_GETSTATUS:
14131 @@ -134,31 +134,53 @@
14132 case WDIOC_KEEPALIVE:
14133 indydog_ping();
14134 return 0;
14135 + case WDIOC_GETTIMEOUT:
14136 + return put_user(WATCHDOG_TIMEOUT,(int *)arg);
14137 + case WDIOC_SETOPTIONS:
14138 + {
14139 + if (get_user(options, (int *)arg))
14140 + return -EFAULT;
14141 +
14142 + if (options & WDIOS_DISABLECARD) {
14143 + indydog_stop();
14144 + retval = 0;
14145 + }
14146 +
14147 + if (options & WDIOS_ENABLECARD) {
14148 + indydog_start();
14149 + retval = 0;
14150 + }
14151 +
14152 + return retval;
14153 + }
14154 }
14155 }
14156
14157 static struct file_operations indydog_fops = {
14158 - owner: THIS_MODULE,
14159 - write: indydog_write,
14160 - ioctl: indydog_ioctl,
14161 - open: indydog_open,
14162 - release: indydog_release,
14163 + .owner = THIS_MODULE,
14164 + .write = indydog_write,
14165 + .ioctl = indydog_ioctl,
14166 + .open = indydog_open,
14167 + .release = indydog_release,
14168 };
14169
14170 static struct miscdevice indydog_miscdev = {
14171 - minor: WATCHDOG_MINOR,
14172 - name: "watchdog",
14173 - fops: &indydog_fops,
14174 + .minor = WATCHDOG_MINOR,
14175 + .name = "watchdog",
14176 + .fops = &indydog_fops,
14177 };
14178
14179 -static const char banner[] __initdata = KERN_INFO "Hardware Watchdog Timer for SGI IP22: 0.2\n";
14180 +static char banner[] __initdata =
14181 + KERN_INFO PFX "Hardware Watchdog Timer for SGI IP22: 0.3\n";
14182
14183 static int __init watchdog_init(void)
14184 {
14185 int ret = misc_register(&indydog_miscdev);
14186 -
14187 - if (ret)
14188 + if (ret) {
14189 + printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
14190 + WATCHDOG_MINOR, ret);
14191 return ret;
14192 + }
14193
14194 printk(banner);
14195
14196 @@ -172,4 +194,7 @@
14197
14198 module_init(watchdog_init);
14199 module_exit(watchdog_exit);
14200 +
14201 +MODULE_AUTHOR("Guido Guenther <agx@sigxcpu.org>");
14202 +MODULE_DESCRIPTION("Hardware Watchdog Device for SGI IP22");
14203 MODULE_LICENSE("GPL");
14204 diff -Nur linux-2.4.30/drivers/char/ip27-rtc.c linux-2.4.30-mips/drivers/char/ip27-rtc.c
14205 --- linux-2.4.30/drivers/char/ip27-rtc.c 2004-02-18 14:36:31.000000000 +0100
14206 +++ linux-2.4.30-mips/drivers/char/ip27-rtc.c 2004-04-06 03:35:30.000000000 +0200
14207 @@ -44,6 +44,7 @@
14208 #include <asm/sn/klconfig.h>
14209 #include <asm/sn/sn0/ip27.h>
14210 #include <asm/sn/sn0/hub.h>
14211 +#include <asm/sn/sn_private.h>
14212
14213 static int rtc_ioctl(struct inode *inode, struct file *file,
14214 unsigned int cmd, unsigned long arg);
14215 @@ -209,11 +210,8 @@
14216
14217 static int __init rtc_init(void)
14218 {
14219 - nasid_t nid;
14220 -
14221 - nid = get_nasid();
14222 rtc = (struct m48t35_rtc *)
14223 - (KL_CONFIG_CH_CONS_INFO(nid)->memory_base + IOC3_BYTEBUS_DEV0);
14224 + (KL_CONFIG_CH_CONS_INFO(master_nasid)->memory_base + IOC3_BYTEBUS_DEV0);
14225
14226 printk(KERN_INFO "Real Time Clock Driver v%s\n", RTC_VERSION);
14227 if (misc_register(&rtc_dev)) {
14228 @@ -325,3 +323,7 @@
14229
14230 rtc_tm->tm_mon--;
14231 }
14232 +
14233 +MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
14234 +MODULE_DESCRIPTION("SGI IP27 M48T35 RTC driver");
14235 +MODULE_LICENSE("GPL");
14236 diff -Nur linux-2.4.30/drivers/char/mips_rtc.c linux-2.4.30-mips/drivers/char/mips_rtc.c
14237 --- linux-2.4.30/drivers/char/mips_rtc.c 2004-01-05 14:53:56.000000000 +0100
14238 +++ linux-2.4.30-mips/drivers/char/mips_rtc.c 2004-06-28 14:54:53.000000000 +0200
14239 @@ -53,14 +53,6 @@
14240 #include <asm/io.h>
14241 #include <asm/uaccess.h>
14242 #include <asm/system.h>
14243 -
14244 -/*
14245 - * Check machine
14246 - */
14247 -#if !defined(CONFIG_MIPS) || !defined(CONFIG_NEW_TIME_C)
14248 -#error "This driver is for MIPS machines with CONFIG_NEW_TIME_C defined"
14249 -#endif
14250 -
14251 #include <asm/time.h>
14252
14253 static unsigned long rtc_status = 0; /* bitmapped status byte. */
14254 diff -Nur linux-2.4.30/drivers/char/sb1250_duart.c linux-2.4.30-mips/drivers/char/sb1250_duart.c
14255 --- linux-2.4.30/drivers/char/sb1250_duart.c 2004-02-18 14:36:31.000000000 +0100
14256 +++ linux-2.4.30-mips/drivers/char/sb1250_duart.c 2004-09-17 01:25:44.000000000 +0200
14257 @@ -328,10 +328,11 @@
14258 if (c <= 0) break;
14259
14260 if (from_user) {
14261 + spin_unlock_irqrestore(&us->outp_lock, flags);
14262 if (copy_from_user(us->outp_buf + us->outp_tail, buf, c)) {
14263 - spin_unlock_irqrestore(&us->outp_lock, flags);
14264 return -EFAULT;
14265 }
14266 + spin_lock_irqsave(&us->outp_lock, flags);
14267 } else {
14268 memcpy(us->outp_buf + us->outp_tail, buf, c);
14269 }
14270 @@ -498,9 +499,31 @@
14271 duart_set_cflag(us->line, tty->termios->c_cflag);
14272 }
14273
14274 +static int get_serial_info(uart_state_t *us, struct serial_struct * retinfo) {
14275 +
14276 + struct serial_struct tmp;
14277 +
14278 + memset(&tmp, 0, sizeof(tmp));
14279 +
14280 + tmp.type=PORT_SB1250;
14281 + tmp.line=us->line;
14282 + tmp.port=A_DUART_CHANREG(tmp.line,0);
14283 + tmp.irq=K_INT_UART_0 + tmp.line;
14284 + tmp.xmit_fifo_size=16; /* fixed by hw */
14285 + tmp.baud_base=5000000;
14286 + tmp.io_type=SERIAL_IO_MEM;
14287 +
14288 + if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
14289 + return -EFAULT;
14290 +
14291 + return 0;
14292 +}
14293 +
14294 static int duart_ioctl(struct tty_struct *tty, struct file * file,
14295 unsigned int cmd, unsigned long arg)
14296 {
14297 + uart_state_t *us = (uart_state_t *) tty->driver_data;
14298 +
14299 /* if (serial_paranoia_check(info, tty->device, "rs_ioctl"))
14300 return -ENODEV;*/
14301 switch (cmd) {
14302 @@ -517,7 +540,7 @@
14303 printk("Ignoring TIOCMSET\n");
14304 break;
14305 case TIOCGSERIAL:
14306 - printk("Ignoring TIOCGSERIAL\n");
14307 + return get_serial_info(us,(struct serial_struct *) arg);
14308 break;
14309 case TIOCSSERIAL:
14310 printk("Ignoring TIOCSSERIAL\n");
14311 diff -Nur linux-2.4.30/drivers/char/serial.c linux-2.4.30-mips/drivers/char/serial.c
14312 --- linux-2.4.30/drivers/char/serial.c 2005-01-19 15:09:50.000000000 +0100
14313 +++ linux-2.4.30-mips/drivers/char/serial.c 2004-12-27 05:13:43.000000000 +0100
14314 @@ -62,6 +62,12 @@
14315 * Robert Schwebel <robert@schwebel.de>,
14316 * Juergen Beisert <jbeisert@eurodsn.de>,
14317 * Theodore Ts'o <tytso@mit.edu>
14318 + *
14319 + * 10/00: Added suport for MIPS Atlas board.
14320 + * 11/00: Hooks for serial kernel debug port support added.
14321 + * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard,
14322 + * carstenl@mips.com
14323 + * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
14324 */
14325
14326 static char *serial_version = "5.05c";
14327 @@ -413,6 +419,22 @@
14328 return 0;
14329 }
14330
14331 +#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_SEAD)
14332 +
14333 +#include <asm/mips-boards/atlas.h>
14334 +
14335 +static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
14336 +{
14337 + return (*(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) & 0xff);
14338 +}
14339 +
14340 +static _INLINE_ void serial_out(struct async_struct *info, int offset, int value)
14341 +{
14342 + *(volatile unsigned int *)(mips_io_port_base + ATLAS_UART_REGS_BASE + offset*8) = value;
14343 +}
14344 +
14345 +#else
14346 +
14347 static _INLINE_ unsigned int serial_in(struct async_struct *info, int offset)
14348 {
14349 switch (info->io_type) {
14350 @@ -447,6 +469,8 @@
14351 outb(value, info->port+offset);
14352 }
14353 }
14354 +#endif
14355 +
14356
14357 /*
14358 * We used to support using pause I/O for certain machines. We
14359 diff -Nur linux-2.4.30/drivers/char/victor_mpc30x_keymap.map linux-2.4.30-mips/drivers/char/victor_mpc30x_keymap.map
14360 --- linux-2.4.30/drivers/char/victor_mpc30x_keymap.map 1970-01-01 01:00:00.000000000 +0100
14361 +++ linux-2.4.30-mips/drivers/char/victor_mpc30x_keymap.map 2004-02-05 18:04:42.000000000 +0100
14362 @@ -0,0 +1,102 @@
14363 +# Victor Interlink MP-C303/304 keyboard keymap
14364 +#
14365 +# Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
14366 +#
14367 +# This file is subject to the terms and conditions of the GNU General Public
14368 +# License. See the file "COPYING" in the main directory of this archive
14369 +# for more details.
14370 +keymaps 0-1,4-5,8-9,12
14371 +alt_is_meta
14372 +strings as usual
14373 +compose as usual for "iso-8859-1"
14374 +
14375 +# First line
14376 +keycode 89 = Escape
14377 +keycode 9 = Delete
14378 +
14379 +# 2nd line
14380 +keycode 73 = one exclam
14381 +keycode 18 = two quotedbl
14382 +keycode 92 = three numbersign
14383 + control keycode 92 = Escape
14384 +keycode 53 = four dollar
14385 + control keycode 53 = Control_backslash
14386 +keycode 21 = five percent
14387 + control keycode 21 = Control_bracketright
14388 +keycode 50 = six ampersand
14389 + control keycode 50 = Control_underscore
14390 +keycode 48 = seven apostrophe
14391 +keycode 51 = eight parenleft
14392 +keycode 16 = nine parenright
14393 +keycode 80 = zero asciitilde
14394 + control keycode 80 = nul
14395 +keycode 49 = minus equal
14396 +keycode 30 = asciicircum asciitilde
14397 + control keycode 30 = Control_asciicircum
14398 +keycode 5 = backslash bar
14399 + control keycode 5 = Control_backslash
14400 +keycode 13 = BackSpace
14401 +# 3rd line
14402 +keycode 57 = Tab
14403 +keycode 74 = q
14404 +keycode 26 = w
14405 +keycode 81 = e
14406 +keycode 29 = r
14407 +keycode 37 = t
14408 +keycode 45 = y
14409 +keycode 72 = u
14410 +keycode 24 = i
14411 +keycode 32 = o
14412 +keycode 41 = p
14413 +keycode 1 = at grave
14414 + control keycode 1 = nul
14415 +keycode 54 = bracketleft braceleft
14416 +keycode 63 = Return
14417 + alt keycode 63 = Meta_Control_m
14418 +# 4th line
14419 +keycode 23 = Caps_Lock
14420 +keycode 34 = a
14421 +keycode 66 = s
14422 +keycode 52 = d
14423 +keycode 20 = f
14424 +keycode 84 = g
14425 +keycode 67 = h
14426 +keycode 64 = j
14427 +keycode 17 = k
14428 +keycode 83 = l
14429 +keycode 22 = semicolon plus
14430 +keycode 61 = colon asterisk
14431 + control keycode 61 = Control_g
14432 +keycode 65 = bracketright braceright
14433 + control keycode 65 = Control_bracketright
14434 +# 5th line
14435 +keycode 91 = Shift
14436 +keycode 76 = z
14437 +keycode 68 = x
14438 +keycode 28 = c
14439 +keycode 36 = v
14440 +keycode 44 = b
14441 +keycode 19 = n
14442 +keycode 27 = m
14443 +keycode 35 = comma less
14444 +keycode 3 = period greater
14445 + control keycode 3 = Compose
14446 +keycode 38 = slash question
14447 + control keycode 38 = Delete
14448 + shift control keycode 38 = Delete
14449 +keycode 6 = backslash underscore
14450 + control keycode 6 = Control_backslash
14451 +keycode 55 = Up
14452 + alt keycode 55 = PageUp
14453 +keycode 14 = Shift
14454 +# 6th line
14455 +keycode 56 = Control
14456 +keycode 42 = Alt
14457 +keycode 33 = space
14458 + control keycode 33 = nul
14459 +keycode 7 = Left
14460 + alt keycode 7 = Home
14461 +keycode 31 = Down
14462 + alt keycode 31 = PageDown
14463 +keycode 47 = Right
14464 + alt keycode 47 = End
14465 diff -Nur linux-2.4.30/drivers/char/vr41xx_keyb.c linux-2.4.30-mips/drivers/char/vr41xx_keyb.c
14466 --- linux-2.4.30/drivers/char/vr41xx_keyb.c 2004-02-18 14:36:31.000000000 +0100
14467 +++ linux-2.4.30-mips/drivers/char/vr41xx_keyb.c 2004-02-17 13:08:55.000000000 +0100
14468 @@ -308,7 +308,7 @@
14469 if (found != 0) {
14470 kiu_base = VRC4173_KIU_OFFSET;
14471 mkiuintreg = VRC4173_MKIUINTREG_OFFSET;
14472 - vrc4173_clock_supply(VRC4173_KIU_CLOCK);
14473 + vrc4173_supply_clock(VRC4173_KIU_CLOCK);
14474 }
14475 }
14476 #endif
14477 @@ -325,7 +325,7 @@
14478
14479 if (current_cpu_data.cputype == CPU_VR4111 ||
14480 current_cpu_data.cputype == CPU_VR4121)
14481 - vr41xx_clock_supply(KIU_CLOCK);
14482 + vr41xx_supply_clock(KIU_CLOCK);
14483
14484 kiu_writew(KIURST_KIURST, KIURST);
14485
14486 diff -Nur linux-2.4.30/drivers/i2c/Config.in linux-2.4.30-mips/drivers/i2c/Config.in
14487 --- linux-2.4.30/drivers/i2c/Config.in 2004-04-14 15:05:29.000000000 +0200
14488 +++ linux-2.4.30-mips/drivers/i2c/Config.in 2005-02-11 20:49:04.000000000 +0100
14489 @@ -57,6 +57,10 @@
14490 if [ "$CONFIG_SGI_IP22" = "y" ]; then
14491 dep_tristate 'I2C SGI interfaces' CONFIG_I2C_ALGO_SGI $CONFIG_I2C
14492 fi
14493 +
14494 + if [ "$CONFIG_SOC_AU1550" = "y" -o "$CONFIG_SOC_AU1200" ]; then
14495 + dep_tristate 'Au1550/Au1200 SMBus interface' CONFIG_I2C_ALGO_AU1550 $CONFIG_I2C
14496 + fi
14497
14498 # This is needed for automatic patch generation: sensors code starts here
14499 # This is needed for automatic patch generation: sensors code ends here
14500 diff -Nur linux-2.4.30/drivers/i2c/Makefile linux-2.4.30-mips/drivers/i2c/Makefile
14501 --- linux-2.4.30/drivers/i2c/Makefile 2004-02-18 14:36:31.000000000 +0100
14502 +++ linux-2.4.30-mips/drivers/i2c/Makefile 2005-02-11 20:49:04.000000000 +0100
14503 @@ -6,7 +6,7 @@
14504
14505 export-objs := i2c-core.o i2c-algo-bit.o i2c-algo-pcf.o \
14506 i2c-algo-ite.o i2c-algo-sibyte.o i2c-algo-sgi.o \
14507 - i2c-proc.o
14508 + i2c-algo-au1550.o i2c-proc.o i2c-au1550.o
14509
14510 obj-$(CONFIG_I2C) += i2c-core.o
14511 obj-$(CONFIG_I2C_CHARDEV) += i2c-dev.o
14512 @@ -25,6 +25,7 @@
14513 obj-$(CONFIG_I2C_ALGO_SIBYTE) += i2c-algo-sibyte.o i2c-sibyte.o
14514 obj-$(CONFIG_I2C_MAX1617) += i2c-max1617.o
14515 obj-$(CONFIG_I2C_ALGO_SGI) += i2c-algo-sgi.o
14516 +obj-$(CONFIG_I2C_ALGO_AU1550) += i2c-algo-au1550.o i2c-au1550.o
14517
14518 # This is needed for automatic patch generation: sensors code starts here
14519 # This is needed for automatic patch generation: sensors code ends here
14520 diff -Nur linux-2.4.30/drivers/i2c/i2c-algo-au1550.c linux-2.4.30-mips/drivers/i2c/i2c-algo-au1550.c
14521 --- linux-2.4.30/drivers/i2c/i2c-algo-au1550.c 1970-01-01 01:00:00.000000000 +0100
14522 +++ linux-2.4.30-mips/drivers/i2c/i2c-algo-au1550.c 2005-02-11 20:49:04.000000000 +0100
14523 @@ -0,0 +1,340 @@
14524 +/*
14525 + * i2c-algo-au1550.c: SMBus (i2c) driver algorithms for Alchemy PSC interface
14526 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
14527 + *
14528 + * The documentation describes this as an SMBus controller, but it doesn't
14529 + * understand any of the SMBus protocol in hardware. It's really an I2C
14530 + * controller that could emulate most of the SMBus in software.
14531 + */
14532 +
14533 +#include <linux/kernel.h>
14534 +#include <linux/module.h>
14535 +#include <linux/init.h>
14536 +#include <linux/errno.h>
14537 +#include <linux/delay.h>
14538 +
14539 +#include <asm/au1000.h>
14540 +#include <asm/au1xxx_psc.h>
14541 +
14542 +#include <linux/i2c.h>
14543 +#include <linux/i2c-algo-au1550.h>
14544 +
14545 +static int
14546 +wait_xfer_done(struct i2c_algo_au1550_data *adap)
14547 +{
14548 + u32 stat;
14549 + int i;
14550 + volatile psc_smb_t *sp;
14551 +
14552 + sp = (volatile psc_smb_t *)(adap->psc_base);
14553 +
14554 + /* Wait for Tx FIFO Underflow.
14555 + */
14556 + for (i = 0; i < adap->xfer_timeout; i++) {
14557 + stat = sp->psc_smbevnt;
14558 + au_sync();
14559 + if ((stat & PSC_SMBEVNT_TU) != 0) {
14560 + /* Clear it. */
14561 + sp->psc_smbevnt = PSC_SMBEVNT_TU;
14562 + au_sync();
14563 + return 0;
14564 + }
14565 + udelay(1);
14566 + }
14567 +
14568 + return -ETIMEDOUT;
14569 +}
14570 +
14571 +static int
14572 +wait_ack(struct i2c_algo_au1550_data *adap)
14573 +{
14574 + u32 stat;
14575 + volatile psc_smb_t *sp;
14576 +
14577 + if (wait_xfer_done(adap))
14578 + return -ETIMEDOUT;
14579 +
14580 + sp = (volatile psc_smb_t *)(adap->psc_base);
14581 +
14582 + stat = sp->psc_smbevnt;
14583 + au_sync();
14584 +
14585 + if ((stat & (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL)) != 0)
14586 + return -ETIMEDOUT;
14587 +
14588 + return 0;
14589 +}
14590 +
14591 +static int
14592 +wait_master_done(struct i2c_algo_au1550_data *adap)
14593 +{
14594 + u32 stat;
14595 + int i;
14596 + volatile psc_smb_t *sp;
14597 +
14598 + sp = (volatile psc_smb_t *)(adap->psc_base);
14599 +
14600 + /* Wait for Master Done.
14601 + */
14602 + for (i = 0; i < adap->xfer_timeout; i++) {
14603 + stat = sp->psc_smbevnt;
14604 + au_sync();
14605 + if ((stat & PSC_SMBEVNT_MD) != 0)
14606 + return 0;
14607 + udelay(1);
14608 + }
14609 +
14610 + return -ETIMEDOUT;
14611 +}
14612 +
14613 +static int
14614 +do_address(struct i2c_algo_au1550_data *adap, unsigned int addr, int rd)
14615 +{
14616 + volatile psc_smb_t *sp;
14617 + u32 stat;
14618 +
14619 + sp = (volatile psc_smb_t *)(adap->psc_base);
14620 +
14621 + /* Reset the FIFOs, clear events.
14622 + */
14623 + sp->psc_smbpcr = PSC_SMBPCR_DC;
14624 + sp->psc_smbevnt = PSC_SMBEVNT_ALLCLR;
14625 + au_sync();
14626 + do {
14627 + stat = sp->psc_smbpcr;
14628 + au_sync();
14629 + } while ((stat & PSC_SMBPCR_DC) != 0);
14630 +
14631 + /* Write out the i2c chip address and specify operation
14632 + */
14633 + addr <<= 1;
14634 + if (rd)
14635 + addr |= 1;
14636 +
14637 + /* Put byte into fifo, start up master.
14638 + */
14639 + sp->psc_smbtxrx = addr;
14640 + au_sync();
14641 + sp->psc_smbpcr = PSC_SMBPCR_MS;
14642 + au_sync();
14643 + if (wait_ack(adap))
14644 + return -EIO;
14645 + return 0;
14646 +}
14647 +
14648 +static u32
14649 +wait_for_rx_byte(struct i2c_algo_au1550_data *adap, u32 *ret_data)
14650 +{
14651 + int j;
14652 + u32 data, stat;
14653 + volatile psc_smb_t *sp;
14654 +
14655 + if (wait_xfer_done(adap))
14656 + return -EIO;
14657 +
14658 + sp = (volatile psc_smb_t *)(adap->psc_base);
14659 +
14660 + j = adap->xfer_timeout * 100;
14661 + do {
14662 + j--;
14663 + if (j <= 0)
14664 + return -EIO;
14665 +
14666 + stat = sp->psc_smbstat;
14667 + au_sync();
14668 + if ((stat & PSC_SMBSTAT_RE) == 0)
14669 + j = 0;
14670 + else
14671 + udelay(1);
14672 + } while (j > 0);
14673 + data = sp->psc_smbtxrx;
14674 + au_sync();
14675 + *ret_data = data;
14676 +
14677 + return 0;
14678 +}
14679 +
14680 +static int
14681 +i2c_read(struct i2c_algo_au1550_data *adap, unsigned char *buf,
14682 + unsigned int len)
14683 +{
14684 + int i;
14685 + u32 data;
14686 + volatile psc_smb_t *sp;
14687 +
14688 + if (len == 0)
14689 + return 0;
14690 +
14691 + /* A read is performed by stuffing the transmit fifo with
14692 + * zero bytes for timing, waiting for bytes to appear in the
14693 + * receive fifo, then reading the bytes.
14694 + */
14695 +
14696 + sp = (volatile psc_smb_t *)(adap->psc_base);
14697 +
14698 + i = 0;
14699 + while (i < (len-1)) {
14700 + sp->psc_smbtxrx = 0;
14701 + au_sync();
14702 + if (wait_for_rx_byte(adap, &data))
14703 + return -EIO;
14704 +
14705 + buf[i] = data;
14706 + i++;
14707 + }
14708 +
14709 + /* The last byte has to indicate transfer done.
14710 + */
14711 + sp->psc_smbtxrx = PSC_SMBTXRX_STP;
14712 + au_sync();
14713 + if (wait_master_done(adap))
14714 + return -EIO;
14715 +
14716 + data = sp->psc_smbtxrx;
14717 + au_sync();
14718 + buf[i] = data;
14719 + return 0;
14720 +}
14721 +
14722 +static int
14723 +i2c_write(struct i2c_algo_au1550_data *adap, unsigned char *buf,
14724 + unsigned int len)
14725 +{
14726 + int i;
14727 + u32 data;
14728 + volatile psc_smb_t *sp;
14729 +
14730 + if (len == 0)
14731 + return 0;
14732 +
14733 + sp = (volatile psc_smb_t *)(adap->psc_base);
14734 +
14735 + i = 0;
14736 + while (i < (len-1)) {
14737 + data = buf[i];
14738 + sp->psc_smbtxrx = data;
14739 + au_sync();
14740 + if (wait_ack(adap))
14741 + return -EIO;
14742 + i++;
14743 + }
14744 +
14745 + /* The last byte has to indicate transfer done.
14746 + */
14747 + data = buf[i];
14748 + data |= PSC_SMBTXRX_STP;
14749 + sp->psc_smbtxrx = data;
14750 + au_sync();
14751 + if (wait_master_done(adap))
14752 + return -EIO;
14753 + return 0;
14754 +}
14755 +
14756 +static int
14757 +au1550_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[], int num)
14758 +{
14759 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
14760 + struct i2c_msg *p;
14761 + int i, err = 0;
14762 +
14763 + for (i = 0; !err && i < num; i++) {
14764 + p = &msgs[i];
14765 + err = do_address(adap, p->addr, p->flags & I2C_M_RD);
14766 + if (err || !p->len)
14767 + continue;
14768 + if (p->flags & I2C_M_RD)
14769 + err = i2c_read(adap, p->buf, p->len);
14770 + else
14771 + err = i2c_write(adap, p->buf, p->len);
14772 + }
14773 +
14774 + /* Return the number of messages processed, or the error code.
14775 + */
14776 + if (err == 0)
14777 + err = num;
14778 + return err;
14779 +}
14780 +
14781 +static u32
14782 +au1550_func(struct i2c_adapter *adap)
14783 +{
14784 + return I2C_FUNC_I2C;
14785 +}
14786 +
14787 +static struct i2c_algorithm au1550_algo = {
14788 + .name = "Au1550 algorithm",
14789 + .id = I2C_ALGO_AU1550,
14790 + .master_xfer = au1550_xfer,
14791 + .functionality = au1550_func,
14792 +};
14793 +
14794 +/*
14795 + * registering functions to load algorithms at runtime
14796 + * Prior to calling us, the 50MHz clock frequency and routing
14797 + * must have been set up for the PSC indicated by the adapter.
14798 + */
14799 +int
14800 +i2c_au1550_add_bus(struct i2c_adapter *i2c_adap)
14801 +{
14802 + struct i2c_algo_au1550_data *adap = i2c_adap->algo_data;
14803 + volatile psc_smb_t *sp;
14804 + u32 stat;
14805 +
14806 + i2c_adap->algo = &au1550_algo;
14807 +
14808 + /* Now, set up the PSC for SMBus PIO mode.
14809 + */
14810 + sp = (volatile psc_smb_t *)(adap->psc_base);
14811 + sp->psc_ctrl = PSC_CTRL_DISABLE;
14812 + au_sync();
14813 + sp->psc_sel = PSC_SEL_PS_SMBUSMODE;
14814 + sp->psc_smbcfg = 0;
14815 + au_sync();
14816 + sp->psc_ctrl = PSC_CTRL_ENABLE;
14817 + au_sync();
14818 + do {
14819 + stat = sp->psc_smbstat;
14820 + au_sync();
14821 + } while ((stat & PSC_SMBSTAT_SR) == 0);
14822 +
14823 + sp->psc_smbcfg = (PSC_SMBCFG_RT_FIFO8 | PSC_SMBCFG_TT_FIFO8 |
14824 + PSC_SMBCFG_DD_DISABLE);
14825 +
14826 + /* Divide by 8 to get a 6.25 MHz clock. The later protocol
14827 + * timings are based on this clock.
14828 + */
14829 + sp->psc_smbcfg |= PSC_SMBCFG_SET_DIV(PSC_SMBCFG_DIV2);
14830 + sp->psc_smbmsk = PSC_SMBMSK_ALLMASK;
14831 + au_sync();
14832 +
14833 + /* Set the protocol timer values. See Table 71 in the
14834 + * Au1550 Data Book for standard timing values.
14835 + */
14836 + sp->psc_smbtmr = PSC_SMBTMR_SET_TH(2) | PSC_SMBTMR_SET_PS(15) | \
14837 + PSC_SMBTMR_SET_PU(11) | PSC_SMBTMR_SET_SH(11) | \
14838 + PSC_SMBTMR_SET_SU(11) | PSC_SMBTMR_SET_CL(15) | \
14839 + PSC_SMBTMR_SET_CH(11);
14840 + au_sync();
14841 +
14842 + sp->psc_smbcfg |= PSC_SMBCFG_DE_ENABLE;
14843 + do {
14844 + stat = sp->psc_smbstat;
14845 + au_sync();
14846 + } while ((stat & PSC_SMBSTAT_DR) == 0);
14847 +
14848 + return i2c_add_adapter(i2c_adap);
14849 +}
14850 +
14851 +
14852 +int
14853 +i2c_au1550_del_bus(struct i2c_adapter *adap)
14854 +{
14855 + return i2c_del_adapter(adap);
14856 +}
14857 +
14858 +EXPORT_SYMBOL(i2c_au1550_add_bus);
14859 +EXPORT_SYMBOL(i2c_au1550_del_bus);
14860 +
14861 +MODULE_AUTHOR("Dan Malek <dan@embeddededge.com>");
14862 +MODULE_DESCRIPTION("SMBus Au1550 algorithm");
14863 +MODULE_LICENSE("GPL");
14864 diff -Nur linux-2.4.30/drivers/i2c/i2c-au1550.c linux-2.4.30-mips/drivers/i2c/i2c-au1550.c
14865 --- linux-2.4.30/drivers/i2c/i2c-au1550.c 1970-01-01 01:00:00.000000000 +0100
14866 +++ linux-2.4.30-mips/drivers/i2c/i2c-au1550.c 2005-02-11 20:49:04.000000000 +0100
14867 @@ -0,0 +1,154 @@
14868 +/*
14869 + * i2c-au1550.c: SMBus (i2c) adapter for Alchemy PSC interface
14870 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
14871 + *
14872 + * This is just a skeleton adapter to use with the Au1550 PSC
14873 + * algorithm. It was developed for the Pb1550, but will work with
14874 + * any Au1550 board that has a similar PSC configuration.
14875 + *
14876 + * This program is free software; you can redistribute it and/or
14877 + * modify it under the terms of the GNU General Public License
14878 + * as published by the Free Software Foundation; either version 2
14879 + * of the License, or (at your option) any later version.
14880 + *
14881 + * This program is distributed in the hope that it will be useful,
14882 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
14883 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14884 + * GNU General Public License for more details.
14885 + *
14886 + * You should have received a copy of the GNU General Public License
14887 + * along with this program; if not, write to the Free Software
14888 + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
14889 + */
14890 +
14891 +#include <linux/config.h>
14892 +#include <linux/kernel.h>
14893 +#include <linux/module.h>
14894 +#include <linux/init.h>
14895 +#include <linux/errno.h>
14896 +
14897 +#include <asm/au1000.h>
14898 +#include <asm/au1xxx_psc.h>
14899 +#if defined( CONFIG_MIPS_PB1550 )
14900 + #include <asm/pb1550.h>
14901 +#endif
14902 +#if defined( CONFIG_MIPS_PB1200 )
14903 + #include <asm/pb1200.h>
14904 +#endif
14905 +#if defined( CONFIG_MIPS_DB1200 )
14906 + #include <asm/db1200.h>
14907 +#endif
14908 +#if defined( CONFIG_MIPS_FICMMP )
14909 + #include <asm/ficmmp.h>
14910 +#endif
14911 +
14912 +#include <linux/i2c.h>
14913 +#include <linux/i2c-algo-au1550.h>
14914 +
14915 +
14916 +
14917 +static int
14918 +pb1550_reg(struct i2c_client *client)
14919 +{
14920 + return 0;
14921 +}
14922 +
14923 +static int
14924 +pb1550_unreg(struct i2c_client *client)
14925 +{
14926 + return 0;
14927 +}
14928 +
14929 +static void
14930 +pb1550_inc_use(struct i2c_adapter *adap)
14931 +{
14932 +#ifdef MODULE
14933 + MOD_INC_USE_COUNT;
14934 +#endif
14935 +}
14936 +
14937 +static void
14938 +pb1550_dec_use(struct i2c_adapter *adap)
14939 +{
14940 +#ifdef MODULE
14941 + MOD_DEC_USE_COUNT;
14942 +#endif
14943 +}
14944 +
14945 +static struct i2c_algo_au1550_data pb1550_i2c_info = {
14946 + SMBUS_PSC_BASE, 200, 200
14947 +};
14948 +
14949 +static struct i2c_adapter pb1550_board_adapter = {
14950 + name: "pb1550 adapter",
14951 + id: I2C_HW_AU1550_PSC,
14952 + algo: NULL,
14953 + algo_data: &pb1550_i2c_info,
14954 + inc_use: pb1550_inc_use,
14955 + dec_use: pb1550_dec_use,
14956 + client_register: pb1550_reg,
14957 + client_unregister: pb1550_unreg,
14958 + client_count: 0,
14959 +};
14960 +
14961 +int __init
14962 +i2c_pb1550_init(void)
14963 +{
14964 + /* This is where we would set up a 50MHz clock source
14965 + * and routing. On the Pb1550, the SMBus is PSC2, which
14966 + * uses a shared clock with USB. This has been already
14967 + * configured by Yamon as a 48MHz clock, close enough
14968 + * for our work.
14969 + */
14970 + if (i2c_au1550_add_bus(&pb1550_board_adapter) < 0)
14971 + return -ENODEV;
14972 +
14973 + return 0;
14974 +}
14975 +
14976 +/* BIG hack to support the control interface on the Wolfson WM8731
14977 + * audio codec on the Pb1550 board. We get an address and two data
14978 + * bytes to write, create an i2c message, and send it across the
14979 + * i2c transfer function. We do this here because we have access to
14980 + * the i2c adapter structure.
14981 + */
14982 +static struct i2c_msg wm_i2c_msg; /* We don't want this stuff on the stack */
14983 +static u8 i2cbuf[2];
14984 +
14985 +int
14986 +pb1550_wm_codec_write(u8 addr, u8 reg, u8 val)
14987 +{
14988 + wm_i2c_msg.addr = addr;
14989 + wm_i2c_msg.flags = 0;
14990 + wm_i2c_msg.buf = i2cbuf;
14991 + wm_i2c_msg.len = 2;
14992 + i2cbuf[0] = reg;
14993 + i2cbuf[1] = val;
14994 +
14995 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, &wm_i2c_msg, 1);
14996 +}
14997 +
14998 +/* the next function is needed by DVB driver. */
14999 +int pb1550_i2c_xfer(struct i2c_msg msgs[], int num)
15000 +{
15001 + return pb1550_board_adapter.algo->master_xfer(&pb1550_board_adapter, msgs, num);
15002 +}
15003 +
15004 +EXPORT_SYMBOL(pb1550_wm_codec_write);
15005 +EXPORT_SYMBOL(pb1550_i2c_xfer);
15006 +
15007 +MODULE_AUTHOR("Dan Malek, Embedded Edge, LLC.");
15008 +MODULE_DESCRIPTION("SMBus adapter Alchemy pb1550");
15009 +MODULE_LICENSE("GPL");
15010 +
15011 +int
15012 +init_module(void)
15013 +{
15014 + return i2c_pb1550_init();
15015 +}
15016 +
15017 +void
15018 +cleanup_module(void)
15019 +{
15020 + i2c_au1550_del_bus(&pb1550_board_adapter);
15021 +}
15022 diff -Nur linux-2.4.30/drivers/i2c/i2c-core.c linux-2.4.30-mips/drivers/i2c/i2c-core.c
15023 --- linux-2.4.30/drivers/i2c/i2c-core.c 2005-01-19 15:09:54.000000000 +0100
15024 +++ linux-2.4.30-mips/drivers/i2c/i2c-core.c 2004-11-29 18:47:16.000000000 +0100
15025 @@ -1280,6 +1280,9 @@
15026 #ifdef CONFIG_I2C_MAX1617
15027 extern int i2c_max1617_init(void);
15028 #endif
15029 +#ifdef CONFIG_I2C_ALGO_AU1550
15030 + extern int i2c_pb1550_init(void);
15031 +#endif
15032
15033 #ifdef CONFIG_I2C_PROC
15034 extern int sensors_init(void);
15035 @@ -1335,6 +1338,10 @@
15036 i2c_max1617_init();
15037 #endif
15038
15039 +#ifdef CONFIG_I2C_ALGO_AU1550
15040 + i2c_pb1550_init();
15041 +#endif
15042 +
15043 /* -------------- proc interface ---- */
15044 #ifdef CONFIG_I2C_PROC
15045 sensors_init();
15046 diff -Nur linux-2.4.30/drivers/media/video/indycam.c linux-2.4.30-mips/drivers/media/video/indycam.c
15047 --- linux-2.4.30/drivers/media/video/indycam.c 2004-02-18 14:36:31.000000000 +0100
15048 +++ linux-2.4.30-mips/drivers/media/video/indycam.c 2004-12-09 21:32:05.000000000 +0100
15049 @@ -50,13 +50,14 @@
15050 0x80, /* INDYCAM_GAMMA */
15051 };
15052
15053 - int err = 0;
15054 struct indycam *camera;
15055 struct i2c_client *client;
15056 + int err = 0;
15057
15058 client = kmalloc(sizeof(*client), GFP_KERNEL);
15059 - if (!client)
15060 + if (!client)
15061 return -ENOMEM;
15062 +
15063 camera = kmalloc(sizeof(*camera), GFP_KERNEL);
15064 if (!camera) {
15065 err = -ENOMEM;
15066 @@ -67,7 +68,7 @@
15067 client->adapter = adap;
15068 client->addr = addr;
15069 client->driver = &i2c_driver_indycam;
15070 - strcpy(client->name, "IndyCam client");
15071 + strcpy(client->name, "IndyCam client");
15072 camera->client = client;
15073
15074 err = i2c_attach_client(client);
15075 @@ -75,18 +76,18 @@
15076 goto out_free_camera;
15077
15078 camera->version = i2c_smbus_read_byte_data(client, INDYCAM_VERSION);
15079 - if (camera->version != CAMERA_VERSION_INDY &&
15080 - camera->version != CAMERA_VERSION_MOOSE) {
15081 + if ((camera->version != CAMERA_VERSION_INDY) &&
15082 + (camera->version != CAMERA_VERSION_MOOSE)) {
15083 err = -ENODEV;
15084 goto out_detach_client;
15085 }
15086 - printk(KERN_INFO "Indycam v%d.%d detected.\n",
15087 + printk(KERN_INFO "IndyCam v%d.%d detected.\n",
15088 INDYCAM_VERSION_MAJOR(camera->version),
15089 INDYCAM_VERSION_MINOR(camera->version));
15090
15091 err = i2c_master_send(client, initseq, sizeof(initseq));
15092 if (err)
15093 - printk(KERN_INFO "IndyCam initalization failed\n");
15094 + printk(KERN_ERR "IndyCam initalization failed.\n");
15095
15096 MOD_INC_USE_COUNT;
15097 return 0;
15098 diff -Nur linux-2.4.30/drivers/media/video/vino.c linux-2.4.30-mips/drivers/media/video/vino.c
15099 --- linux-2.4.30/drivers/media/video/vino.c 2004-02-18 14:36:31.000000000 +0100
15100 +++ linux-2.4.30-mips/drivers/media/video/vino.c 2004-12-10 05:02:54.000000000 +0100
15101 @@ -5,6 +5,8 @@
15102 * License version 2 as published by the Free Software Foundation.
15103 *
15104 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
15105 + * Copyright (C) 2004 Mikael Nousiainen <tmnousia@cc.hut.fi>
15106 + *
15107 */
15108
15109 #include <linux/module.h>
15110 @@ -37,13 +39,23 @@
15111 #define DEBUG(x...)
15112 #endif
15113
15114 +/* Channels (who could have guessed) */
15115 +#define VINO_CHAN_NONE 0
15116 +#define VINO_CHAN_A 1
15117 +#define VINO_CHAN_B 2
15118 +
15119 /* VINO video size */
15120 #define VINO_PAL_WIDTH 768
15121 #define VINO_PAL_HEIGHT 576
15122 #define VINO_NTSC_WIDTH 646
15123 #define VINO_NTSC_HEIGHT 486
15124
15125 -/* set this to some sensible values. note: VINO_MIN_WIDTH has to be 8*x */
15126 +/* Minimum value for Y-clipping (for smaller values the images
15127 + * will be corrupted) */
15128 +#define VINO_MIN_Y_CLIPPING 2
15129 +
15130 +/* Set these to some sensible values.
15131 + * Note: the picture width has to be divisible by 8 */
15132 #define VINO_MIN_WIDTH 32
15133 #define VINO_MIN_HEIGHT 32
15134
15135 @@ -64,9 +76,7 @@
15136
15137 struct vino_device {
15138 struct video_device vdev;
15139 -#define VINO_CHAN_A 1
15140 -#define VINO_CHAN_B 2
15141 - int chan;
15142 + int chan; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
15143 int alpha;
15144 /* clipping... */
15145 unsigned int left, right, top, bottom;
15146 @@ -106,7 +116,7 @@
15147
15148 struct vino_client {
15149 struct i2c_client *driver;
15150 - int owner;
15151 + int owner; /* VINO_CHAN_NONE, VINO_CHAN_A or VINO_CHAN_B */
15152 };
15153
15154 struct vino_video {
15155 @@ -362,6 +372,7 @@
15156 static int dma_setup(struct vino_device *v)
15157 {
15158 u32 ctrl, intr;
15159 + int ofs;
15160 struct sgi_vino_channel *ch;
15161
15162 ch = (v->chan == VINO_CHAN_A) ? &vino->a : &vino->b;
15163 @@ -377,14 +388,24 @@
15164 ch->line_size = v->line_size - 8;
15165 /* set the alpha register */
15166 ch->alpha = v->alpha;
15167 - /* set cliping registers */
15168 - ch->clip_start = VINO_CLIP_ODD(v->top) | VINO_CLIP_EVEN(v->top+1) |
15169 + /* Set the clipping registers, this is the constant source of fun :)
15170 + * Y clipping start has to be >= 2 and end has to be start + height/2
15171 + * The values of top and bottom are even so dividing is not a problem
15172 + *
15173 + * The docs say that clipping values for the even field should be
15174 + * odd_end + something_to_skip_vertical_blanking + some_lines and
15175 + * even_start + height/2, though the image is good this way also
15176 + *
15177 + * TODO: for analog sources (SAA7191), the clipping values are a bit
15178 + * different and that case isn't yet handled
15179 + */
15180 + ofs = VINO_MIN_Y_CLIPPING; /* Should depend on input source */
15181 + ch->clip_start = VINO_CLIP_ODD(ofs + v->top / 2) |
15182 + VINO_CLIP_EVEN(ofs + v->top / 2 + 1) |
15183 VINO_CLIP_X(v->left);
15184 - ch->clip_end = VINO_CLIP_ODD(v->bottom) | VINO_CLIP_EVEN(v->bottom+1) |
15185 + ch->clip_end = VINO_CLIP_ODD(ofs + v->bottom / 2 - 1) |
15186 + VINO_CLIP_EVEN(ofs + v->bottom / 2) |
15187 VINO_CLIP_X(v->right);
15188 - /* FIXME: end-of-field bug workaround
15189 - VINO_CLIP_X(VINO_PAL_WIDTH);
15190 - */
15191 /* init the frame rate and norm (full frame rate only for now...) */
15192 ch->frame_rate = VINO_FRAMERT_RT(0x1fff) |
15193 (get_capture_norm(v) == VIDEO_MODE_PAL ?
15194 @@ -510,6 +531,7 @@
15195 static void vino_interrupt(int irq, void *dev_id, struct pt_regs *regs)
15196 {
15197 u32 intr, ctrl;
15198 + int a_eof, b_eof;
15199
15200 spin_lock(&Vino->vino_lock);
15201 ctrl = vino->control;
15202 @@ -525,12 +547,14 @@
15203 vino->control = ctrl;
15204 clear_eod(&Vino->chB);
15205 }
15206 + a_eof = intr & VINO_INTSTAT_A_EOF;
15207 + b_eof = intr & VINO_INTSTAT_B_EOF;
15208 vino->intr_status = ~intr;
15209 spin_unlock(&Vino->vino_lock);
15210 - /* FIXME: For now we are assuming that interrupt means that frame is
15211 - * done. That's not true, but we can live with such brokeness for
15212 - * a while ;-) */
15213 - field_done(&Vino->chA);
15214 + if (a_eof)
15215 + field_done(&Vino->chA);
15216 + if (b_eof)
15217 + field_done(&Vino->chB);
15218 }
15219
15220 static int vino_grab(struct vino_device *v, int frame)
15221 diff -Nur linux-2.4.30/drivers/mtd/devices/docprobe.c linux-2.4.30-mips/drivers/mtd/devices/docprobe.c
15222 --- linux-2.4.30/drivers/mtd/devices/docprobe.c 2003-06-13 16:51:34.000000000 +0200
15223 +++ linux-2.4.30-mips/drivers/mtd/devices/docprobe.c 2003-06-16 01:42:21.000000000 +0200
15224 @@ -89,10 +89,10 @@
15225 0xe4000000,
15226 #elif defined(CONFIG_MOMENCO_OCELOT)
15227 0x2f000000,
15228 - 0xff000000,
15229 + 0xff000000,
15230 #elif defined(CONFIG_MOMENCO_OCELOT_G) || defined (CONFIG_MOMENCO_OCELOT_C)
15231 - 0xff000000,
15232 -##else
15233 + 0xff000000,
15234 +#else
15235 #warning Unknown architecture for DiskOnChip. No default probe locations defined
15236 #endif
15237 0 };
15238 diff -Nur linux-2.4.30/drivers/mtd/devices/ms02-nv.c linux-2.4.30-mips/drivers/mtd/devices/ms02-nv.c
15239 --- linux-2.4.30/drivers/mtd/devices/ms02-nv.c 2003-06-13 16:51:34.000000000 +0200
15240 +++ linux-2.4.30-mips/drivers/mtd/devices/ms02-nv.c 2004-07-30 12:22:40.000000000 +0200
15241 @@ -1,10 +1,10 @@
15242 /*
15243 - * Copyright (c) 2001 Maciej W. Rozycki
15244 + * Copyright (c) 2001 Maciej W. Rozycki
15245 *
15246 - * This program is free software; you can redistribute it and/or
15247 - * modify it under the terms of the GNU General Public License
15248 - * as published by the Free Software Foundation; either version
15249 - * 2 of the License, or (at your option) any later version.
15250 + * This program is free software; you can redistribute it and/or
15251 + * modify it under the terms of the GNU General Public License
15252 + * as published by the Free Software Foundation; either version
15253 + * 2 of the License, or (at your option) any later version.
15254 *
15255 * $Id: ms02-nv.c,v 1.2 2003/01/24 14:05:17 dwmw2 Exp $
15256 */
15257 @@ -29,18 +29,18 @@
15258
15259
15260 static char version[] __initdata =
15261 - "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
15262 + "ms02-nv.c: v.1.0.0 13 Aug 2001 Maciej W. Rozycki.\n";
15263
15264 -MODULE_AUTHOR("Maciej W. Rozycki <macro@ds2.pg.gda.pl>");
15265 +MODULE_AUTHOR("Maciej W. Rozycki <macro@linux-mips.org>");
15266 MODULE_DESCRIPTION("DEC MS02-NV NVRAM module driver");
15267 MODULE_LICENSE("GPL");
15268
15269
15270 /*
15271 * Addresses we probe for an MS02-NV at. Modules may be located
15272 - * at any 8MB boundary within a 0MB up to 112MB range or at any 32MB
15273 - * boundary within a 0MB up to 448MB range. We don't support a module
15274 - * at 0MB, though.
15275 + * at any 8MiB boundary within a 0MiB up to 112MiB range or at any 32MiB
15276 + * boundary within a 0MiB up to 448MiB range. We don't support a module
15277 + * at 0MiB, though.
15278 */
15279 static ulong ms02nv_addrs[] __initdata = {
15280 0x07000000, 0x06800000, 0x06000000, 0x05800000, 0x05000000,
15281 @@ -130,7 +130,7 @@
15282
15283 int ret = -ENODEV;
15284
15285 - /* The module decodes 8MB of address space. */
15286 + /* The module decodes 8MiB of address space. */
15287 mod_res = kmalloc(sizeof(*mod_res), GFP_KERNEL);
15288 if (!mod_res)
15289 return -ENOMEM;
15290 @@ -233,7 +233,7 @@
15291 goto err_out_csr_res;
15292 }
15293
15294 - printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMB.\n",
15295 + printk(KERN_INFO "mtd%d: %s at 0x%08lx, size %uMiB.\n",
15296 mtd->index, ms02nv_name, addr, size >> 20);
15297
15298 mp->next = root_ms02nv_mtd;
15299 @@ -293,12 +293,12 @@
15300
15301 switch (mips_machtype) {
15302 case MACH_DS5000_200:
15303 - csr = (volatile u32 *)KN02_CSR_ADDR;
15304 + csr = (volatile u32 *)KN02_CSR_BASE;
15305 if (*csr & KN02_CSR_BNK32M)
15306 stride = 2;
15307 break;
15308 case MACH_DS5000_2X0:
15309 - case MACH_DS5000:
15310 + case MACH_DS5900:
15311 csr = (volatile u32 *)KN03_MCR_BASE;
15312 if (*csr & KN03_MCR_BNK32M)
15313 stride = 2;
15314 diff -Nur linux-2.4.30/drivers/mtd/devices/ms02-nv.h linux-2.4.30-mips/drivers/mtd/devices/ms02-nv.h
15315 --- linux-2.4.30/drivers/mtd/devices/ms02-nv.h 2002-11-29 00:53:13.000000000 +0100
15316 +++ linux-2.4.30-mips/drivers/mtd/devices/ms02-nv.h 2004-07-30 12:22:40.000000000 +0200
15317 @@ -1,32 +1,96 @@
15318 /*
15319 - * Copyright (c) 2001 Maciej W. Rozycki
15320 + * Copyright (c) 2001, 2003 Maciej W. Rozycki
15321 *
15322 - * This program is free software; you can redistribute it and/or
15323 - * modify it under the terms of the GNU General Public License
15324 - * as published by the Free Software Foundation; either version
15325 - * 2 of the License, or (at your option) any later version.
15326 + * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for
15327 + * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260
15328 + * systems.
15329 + *
15330 + * This program is free software; you can redistribute it and/or
15331 + * modify it under the terms of the GNU General Public License
15332 + * as published by the Free Software Foundation; either version
15333 + * 2 of the License, or (at your option) any later version.
15334 + *
15335 + * $Id: ms02-nv.h,v 1.3 2003/08/19 09:25:36 dwmw2 Exp $
15336 */
15337
15338 #include <linux/ioport.h>
15339 #include <linux/mtd/mtd.h>
15340
15341 +/*
15342 + * Addresses are decoded as follows:
15343 + *
15344 + * 0x000000 - 0x3fffff SRAM
15345 + * 0x400000 - 0x7fffff CSR
15346 + *
15347 + * Within the SRAM area the following ranges are forced by the system
15348 + * firmware:
15349 + *
15350 + * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot
15351 + * 0x000400 - ENDofRAM storage area, available to operating systems
15352 + *
15353 + * but we can't really use the available area right from 0x000400 as
15354 + * the first word is used by the firmware as a status flag passed
15355 + * from an operating system. If anything but the valid data magic
15356 + * ID value is found, the firmware considers the SRAM clean, i.e.
15357 + * containing no valid data, and disables the battery resulting in
15358 + * data being erased as soon as power is switched off. So the choice
15359 + * for the start address of the user-available is 0x001000 which is
15360 + * nicely page aligned. The area between 0x000404 and 0x000fff may
15361 + * be used by the driver for own needs.
15362 + *
15363 + * The diagnostic area defines two status words to be read by an
15364 + * operating system, a magic ID to distinguish a MS02-NV board from
15365 + * anything else and a status information providing results of tests
15366 + * as well as the size of SRAM available, which can be 1MiB or 2MiB
15367 + * (that's what the firmware handles; no idea if 2MiB modules ever
15368 + * existed).
15369 + *
15370 + * The firmware only handles the MS02-NV board if installed in the
15371 + * last (15th) slot, so for any other location the status information
15372 + * stored in the SRAM cannot be relied upon. But from the hardware
15373 + * point of view there is no problem using up to 14 such boards in a
15374 + * system -- only the 1st slot needs to be filled with a DRAM module.
15375 + * The MS02-NV board is ECC-protected, like other MS02 memory boards.
15376 + *
15377 + * The state of the battery as provided by the CSR is reflected on
15378 + * the two onboard LEDs. When facing the battery side of the board,
15379 + * with the LEDs at the top left and the battery at the bottom right
15380 + * (i.e. looking from the back side of the system box), their meaning
15381 + * is as follows (the system has to be powered on):
15382 + *
15383 + * left LED battery disable status: lit = enabled
15384 + * right LED battery condition status: lit = OK
15385 + */
15386 +
15387 /* MS02-NV iomem register offsets. */
15388 #define MS02NV_CSR 0x400000 /* control & status register */
15389
15390 +/* MS02-NV CSR status bits. */
15391 +#define MS02NV_CSR_BATT_OK 0x01 /* battery OK */
15392 +#define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */
15393 +
15394 +
15395 /* MS02-NV memory offsets. */
15396 #define MS02NV_DIAG 0x0003f8 /* diagnostic status */
15397 #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */
15398 -#define MS02NV_RAM 0x000400 /* general-purpose RAM start */
15399 +#define MS02NV_VALID 0x000400 /* valid data magic ID */
15400 +#define MS02NV_RAM 0x001000 /* user-exposed RAM start */
15401
15402 -/* MS02-NV diagnostic status constants. */
15403 -#define MS02NV_DIAG_SIZE_MASK 0xf0 /* RAM size mask */
15404 -#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* RAM size shift (left) */
15405 +/* MS02-NV diagnostic status bits. */
15406 +#define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */
15407 +#define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */
15408 +#define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */
15409 +#define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */
15410 +#define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */
15411 +#define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */
15412
15413 /* MS02-NV general constants. */
15414 #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */
15415 +#define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */
15416 #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space
15417 decoded by the module */
15418
15419 +
15420 typedef volatile u32 ms02nv_uint;
15421
15422 struct ms02nv_private {
15423 diff -Nur linux-2.4.30/drivers/mtd/maps/Config.in linux-2.4.30-mips/drivers/mtd/maps/Config.in
15424 --- linux-2.4.30/drivers/mtd/maps/Config.in 2003-06-13 16:51:34.000000000 +0200
15425 +++ linux-2.4.30-mips/drivers/mtd/maps/Config.in 2004-02-26 01:46:35.000000000 +0100
15426 @@ -51,11 +51,26 @@
15427 dep_tristate ' Pb1000 MTD support' CONFIG_MTD_PB1000 $CONFIG_MIPS_PB1000
15428 dep_tristate ' Pb1500 MTD support' CONFIG_MTD_PB1500 $CONFIG_MIPS_PB1500
15429 dep_tristate ' Pb1100 MTD support' CONFIG_MTD_PB1100 $CONFIG_MIPS_PB1100
15430 + dep_tristate ' Bosporus MTD support' CONFIG_MTD_BOSPORUS $CONFIG_MIPS_BOSPORUS
15431 + dep_tristate ' XXS1500 boot flash device' CONFIG_MTD_XXS1500 $CONFIG_MIPS_XXS1500
15432 + dep_tristate ' MTX-1 flash device' CONFIG_MTD_MTX1 $CONFIG_MIPS_MTX1
15433 if [ "$CONFIG_MTD_PB1500" = "y" -o "$CONFIG_MTD_PB1500" = "m" \
15434 -o "$CONFIG_MTD_PB1100" = "y" -o "$CONFIG_MTD_PB1100" = "m" ]; then
15435 bool ' Pb[15]00 boot flash device' CONFIG_MTD_PB1500_BOOT
15436 bool ' Pb[15]00 user flash device (2nd 32MiB bank)' CONFIG_MTD_PB1500_USER
15437 fi
15438 + tristate ' Db1x00 MTD support' CONFIG_MTD_DB1X00
15439 + if [ "$CONFIG_MTD_DB1X00" = "y" -o "$CONFIG_MTD_DB1X00" = "m" ]; then
15440 + bool ' Db1x00 boot flash device' CONFIG_MTD_DB1X00_BOOT
15441 + bool ' Db1x00 user flash device (2nd bank)' CONFIG_MTD_DB1X00_USER
15442 + fi
15443 + tristate ' Pb1550 MTD support' CONFIG_MTD_PB1550
15444 + if [ "$CONFIG_MTD_PB1550" = "y" -o "$CONFIG_MTD_PB1550" = "m" ]; then
15445 + bool ' Pb1550 Boot Flash' CONFIG_MTD_PB1550_BOOT
15446 + bool ' Pb1550 User Parameter Flash' CONFIG_MTD_PB1550_USER
15447 + fi
15448 + dep_tristate ' Hydrogen 3 MTD support' CONFIG_MTD_HYDROGEN3 $CONFIG_MIPS_HYDROGEN3
15449 + dep_tristate ' Mirage MTD support' CONFIG_MTD_MIRAGE $CONFIG_MIPS_MIRAGE
15450 dep_tristate ' Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board' CONFIG_MTD_CSTM_MIPS_IXX $CONFIG_MTD_CFI $CONFIG_MTD_JEDEC $CONFIG_MTD_PARTITIONS
15451 if [ "$CONFIG_MTD_CSTM_MIPS_IXX" = "y" -o "$CONFIG_MTD_CSTM_MIPS_IXX" = "m" ]; then
15452 hex ' Physical start address of flash mapping' CONFIG_MTD_CSTM_MIPS_IXX_START 0x8000000
15453 diff -Nur linux-2.4.30/drivers/mtd/maps/Makefile linux-2.4.30-mips/drivers/mtd/maps/Makefile
15454 --- linux-2.4.30/drivers/mtd/maps/Makefile 2003-06-13 16:51:34.000000000 +0200
15455 +++ linux-2.4.30-mips/drivers/mtd/maps/Makefile 2004-02-26 01:46:35.000000000 +0100
15456 @@ -52,7 +52,13 @@
15457 obj-$(CONFIG_MTD_PB1000) += pb1xxx-flash.o
15458 obj-$(CONFIG_MTD_PB1100) += pb1xxx-flash.o
15459 obj-$(CONFIG_MTD_PB1500) += pb1xxx-flash.o
15460 +obj-$(CONFIG_MTD_XXS1500) += xxs1500.o
15461 +obj-$(CONFIG_MTD_MTX1) += mtx-1.o
15462 obj-$(CONFIG_MTD_LASAT) += lasat.o
15463 +obj-$(CONFIG_MTD_DB1X00) += db1x00-flash.o
15464 +obj-$(CONFIG_MTD_PB1550) += pb1550-flash.o
15465 +obj-$(CONFIG_MTD_HYDROGEN3) += hydrogen3-flash.o
15466 +obj-$(CONFIG_MTD_BOSPORUS) += pb1xxx-flash.o
15467 obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
15468 obj-$(CONFIG_MTD_EDB7312) += edb7312.o
15469 obj-$(CONFIG_MTD_IMPA7) += impa7.o
15470 @@ -61,5 +67,6 @@
15471 obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
15472 obj-$(CONFIG_MTD_NETtel) += nettel.o
15473 obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
15474 +obj-$(CONFIG_MTD_MIRAGE) += mirage-flash.o
15475
15476 include $(TOPDIR)/Rules.make
15477 diff -Nur linux-2.4.30/drivers/mtd/maps/db1x00-flash.c linux-2.4.30-mips/drivers/mtd/maps/db1x00-flash.c
15478 --- linux-2.4.30/drivers/mtd/maps/db1x00-flash.c 1970-01-01 01:00:00.000000000 +0100
15479 +++ linux-2.4.30-mips/drivers/mtd/maps/db1x00-flash.c 2005-02-03 07:35:29.000000000 +0100
15480 @@ -0,0 +1,283 @@
15481 +/*
15482 + * Flash memory access on Alchemy Db1xxx boards
15483 + *
15484 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
15485 + *
15486 + */
15487 +
15488 +#include <linux/config.h>
15489 +#include <linux/module.h>
15490 +#include <linux/types.h>
15491 +#include <linux/kernel.h>
15492 +
15493 +#include <linux/mtd/mtd.h>
15494 +#include <linux/mtd/map.h>
15495 +#include <linux/mtd/partitions.h>
15496 +
15497 +#include <asm/io.h>
15498 +#include <asm/au1000.h>
15499 +#include <asm/db1x00.h>
15500 +
15501 +#ifdef DEBUG_RW
15502 +#define DBG(x...) printk(x)
15503 +#else
15504 +#define DBG(x...)
15505 +#endif
15506 +
15507 +static unsigned long window_addr;
15508 +static unsigned long window_size;
15509 +static unsigned long flash_size;
15510 +
15511 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
15512 +{
15513 + __u8 ret;
15514 + ret = __raw_readb(map->map_priv_1 + ofs);
15515 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15516 + return ret;
15517 +}
15518 +
15519 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
15520 +{
15521 + __u16 ret;
15522 + ret = __raw_readw(map->map_priv_1 + ofs);
15523 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15524 + return ret;
15525 +}
15526 +
15527 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
15528 +{
15529 + __u32 ret;
15530 + ret = __raw_readl(map->map_priv_1 + ofs);
15531 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15532 + return ret;
15533 +}
15534 +
15535 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
15536 +{
15537 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
15538 + memcpy_fromio(to, map->map_priv_1 + from, len);
15539 +}
15540 +
15541 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
15542 +{
15543 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15544 + __raw_writeb(d, map->map_priv_1 + adr);
15545 + mb();
15546 +}
15547 +
15548 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
15549 +{
15550 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15551 + __raw_writew(d, map->map_priv_1 + adr);
15552 + mb();
15553 +}
15554 +
15555 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
15556 +{
15557 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15558 + __raw_writel(d, map->map_priv_1 + adr);
15559 + mb();
15560 +}
15561 +
15562 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
15563 +{
15564 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
15565 + memcpy_toio(map->map_priv_1 + to, from, len);
15566 +}
15567 +
15568 +static struct map_info db1x00_map = {
15569 + name: "Db1x00 flash",
15570 + read8: physmap_read8,
15571 + read16: physmap_read16,
15572 + read32: physmap_read32,
15573 + copy_from: physmap_copy_from,
15574 + write8: physmap_write8,
15575 + write16: physmap_write16,
15576 + write32: physmap_write32,
15577 + copy_to: physmap_copy_to,
15578 +};
15579 +
15580 +static unsigned char flash_buswidth = 4;
15581 +
15582 +/*
15583 + * The Db1x boards support different flash densities. We setup
15584 + * the mtd_partition structures below for default of 64Mbit
15585 + * flash densities, and override the partitions sizes, if
15586 + * necessary, after we check the board status register.
15587 + */
15588 +
15589 +#ifdef DB1X00_BOTH_BANKS
15590 +/* both banks will be used. Combine the first bank and the first
15591 + * part of the second bank together into a single jffs/jffs2
15592 + * partition.
15593 + */
15594 +static struct mtd_partition db1x00_partitions[] = {
15595 + {
15596 + name: "User FS",
15597 + size: 0x1c00000,
15598 + offset: 0x0000000
15599 + },{
15600 + name: "yamon",
15601 + size: 0x0100000,
15602 + offset: MTDPART_OFS_APPEND,
15603 + mask_flags: MTD_WRITEABLE
15604 + },{
15605 + name: "raw kernel",
15606 + size: (0x300000-0x40000), /* last 256KB is yamon env */
15607 + offset: MTDPART_OFS_APPEND,
15608 + }
15609 +};
15610 +#elif defined(DB1X00_BOOT_ONLY)
15611 +static struct mtd_partition db1x00_partitions[] = {
15612 + {
15613 + name: "User FS",
15614 + size: 0x00c00000,
15615 + offset: 0x0000000
15616 + },{
15617 + name: "yamon",
15618 + size: 0x0100000,
15619 + offset: MTDPART_OFS_APPEND,
15620 + mask_flags: MTD_WRITEABLE
15621 + },{
15622 + name: "raw kernel",
15623 + size: (0x300000-0x40000), /* last 256KB is yamon env */
15624 + offset: MTDPART_OFS_APPEND,
15625 + }
15626 +};
15627 +#elif defined(DB1X00_USER_ONLY)
15628 +static struct mtd_partition db1x00_partitions[] = {
15629 + {
15630 + name: "User FS",
15631 + size: 0x0e00000,
15632 + offset: 0x0000000
15633 + },{
15634 + name: "raw kernel",
15635 + size: MTDPART_SIZ_FULL,
15636 + offset: MTDPART_OFS_APPEND,
15637 + }
15638 +};
15639 +#else
15640 +#error MTD_DB1X00 define combo error /* should never happen */
15641 +#endif
15642 +
15643 +
15644 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
15645 +
15646 +static struct mtd_partition *parsed_parts;
15647 +static struct mtd_info *mymtd;
15648 +
15649 +/*
15650 + * Probe the flash density and setup window address and size
15651 + * based on user CONFIG options. There are times when we don't
15652 + * want the MTD driver to be probing the boot or user flash,
15653 + * so having the option to enable only one bank is important.
15654 + */
15655 +int setup_flash_params()
15656 +{
15657 + switch ((bcsr->status >> 14) & 0x3) {
15658 + case 0: /* 64Mbit devices */
15659 + flash_size = 0x800000; /* 8MB per part */
15660 +#if defined(DB1X00_BOTH_BANKS)
15661 + window_addr = 0x1E000000;
15662 + window_size = 0x2000000;
15663 +#elif defined(DB1X00_BOOT_ONLY)
15664 + window_addr = 0x1F000000;
15665 + window_size = 0x1000000;
15666 +#else /* USER ONLY */
15667 + window_addr = 0x1E000000;
15668 + window_size = 0x1000000;
15669 +#endif
15670 + break;
15671 + case 1:
15672 + /* 128 Mbit devices */
15673 + flash_size = 0x1000000; /* 16MB per part */
15674 +#if defined(DB1X00_BOTH_BANKS)
15675 + window_addr = 0x1C000000;
15676 + window_size = 0x4000000;
15677 + /* USERFS from 0x1C00 0000 to 0x1FC0 0000 */
15678 + db1x00_partitions[0].size = 0x3C00000;
15679 +#elif defined(DB1X00_BOOT_ONLY)
15680 + window_addr = 0x1E000000;
15681 + window_size = 0x2000000;
15682 + /* USERFS from 0x1E00 0000 to 0x1FC0 0000 */
15683 + db1x00_partitions[0].size = 0x1C00000;
15684 +#else /* USER ONLY */
15685 + window_addr = 0x1C000000;
15686 + window_size = 0x2000000;
15687 + /* USERFS from 0x1C00 0000 to 0x1DE00000 */
15688 + db1x00_partitions[0].size = 0x1DE0000;
15689 +#endif
15690 + break;
15691 + case 2:
15692 + /* 256 Mbit devices */
15693 + flash_size = 0x4000000; /* 64MB per part */
15694 +#if defined(DB1X00_BOTH_BANKS)
15695 + return 1;
15696 +#elif defined(DB1X00_BOOT_ONLY)
15697 + /* Boot ROM flash bank only; no user bank */
15698 + window_addr = 0x1C000000;
15699 + window_size = 0x4000000;
15700 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
15701 + db1x00_partitions[0].size = 0x3C00000;
15702 +#else /* USER ONLY */
15703 + return 1;
15704 +#endif
15705 + break;
15706 + default:
15707 + return 1;
15708 + }
15709 + return 0;
15710 +}
15711 +
15712 +int __init db1x00_mtd_init(void)
15713 +{
15714 + struct mtd_partition *parts;
15715 + int nb_parts = 0;
15716 + char *part_type;
15717 +
15718 + /* Default flash buswidth */
15719 + db1x00_map.buswidth = flash_buswidth;
15720 +
15721 + if (setup_flash_params())
15722 + return -ENXIO;
15723 +
15724 + /*
15725 + * Static partition definition selection
15726 + */
15727 + part_type = "static";
15728 + parts = db1x00_partitions;
15729 + nb_parts = NB_OF(db1x00_partitions);
15730 + db1x00_map.size = window_size;
15731 +
15732 + /*
15733 + * Now let's probe for the actual flash. Do it here since
15734 + * specific machine settings might have been set above.
15735 + */
15736 + printk(KERN_NOTICE "Db1xxx flash: probing %d-bit flash bus\n",
15737 + db1x00_map.buswidth*8);
15738 + db1x00_map.map_priv_1 =
15739 + (unsigned long)ioremap(window_addr, window_size);
15740 + mymtd = do_map_probe("cfi_probe", &db1x00_map);
15741 + if (!mymtd) return -ENXIO;
15742 + mymtd->module = THIS_MODULE;
15743 +
15744 + add_mtd_partitions(mymtd, parts, nb_parts);
15745 + return 0;
15746 +}
15747 +
15748 +static void __exit db1x00_mtd_cleanup(void)
15749 +{
15750 + if (mymtd) {
15751 + del_mtd_partitions(mymtd);
15752 + map_destroy(mymtd);
15753 + if (parsed_parts)
15754 + kfree(parsed_parts);
15755 + }
15756 +}
15757 +
15758 +module_init(db1x00_mtd_init);
15759 +module_exit(db1x00_mtd_cleanup);
15760 +
15761 +MODULE_AUTHOR("Pete Popov");
15762 +MODULE_DESCRIPTION("Db1x00 mtd map driver");
15763 +MODULE_LICENSE("GPL");
15764 diff -Nur linux-2.4.30/drivers/mtd/maps/hydrogen3-flash.c linux-2.4.30-mips/drivers/mtd/maps/hydrogen3-flash.c
15765 --- linux-2.4.30/drivers/mtd/maps/hydrogen3-flash.c 1970-01-01 01:00:00.000000000 +0100
15766 +++ linux-2.4.30-mips/drivers/mtd/maps/hydrogen3-flash.c 2004-01-10 23:40:18.000000000 +0100
15767 @@ -0,0 +1,189 @@
15768 +/*
15769 + * Flash memory access on Alchemy HydrogenIII boards
15770 + *
15771 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
15772 + *
15773 + */
15774 +
15775 +#include <linux/config.h>
15776 +#include <linux/module.h>
15777 +#include <linux/types.h>
15778 +#include <linux/kernel.h>
15779 +
15780 +#include <linux/mtd/mtd.h>
15781 +#include <linux/mtd/map.h>
15782 +#include <linux/mtd/partitions.h>
15783 +
15784 +#include <asm/io.h>
15785 +#include <asm/au1000.h>
15786 +
15787 +#ifdef DEBUG_RW
15788 +#define DBG(x...) printk(x)
15789 +#else
15790 +#define DBG(x...)
15791 +#endif
15792 +
15793 +#define WINDOW_ADDR 0x1E000000
15794 +#define WINDOW_SIZE 0x02000000
15795 +
15796 +
15797 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
15798 +{
15799 + __u8 ret;
15800 + ret = __raw_readb(map->map_priv_1 + ofs);
15801 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15802 + return ret;
15803 +}
15804 +
15805 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
15806 +{
15807 + __u16 ret;
15808 + ret = __raw_readw(map->map_priv_1 + ofs);
15809 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15810 + return ret;
15811 +}
15812 +
15813 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
15814 +{
15815 + __u32 ret;
15816 + ret = __raw_readl(map->map_priv_1 + ofs);
15817 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
15818 + return ret;
15819 +}
15820 +
15821 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
15822 +{
15823 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
15824 + memcpy_fromio(to, map->map_priv_1 + from, len);
15825 +}
15826 +
15827 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
15828 +{
15829 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15830 + __raw_writeb(d, map->map_priv_1 + adr);
15831 + mb();
15832 +}
15833 +
15834 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
15835 +{
15836 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15837 + __raw_writew(d, map->map_priv_1 + adr);
15838 + mb();
15839 +}
15840 +
15841 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
15842 +{
15843 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
15844 + __raw_writel(d, map->map_priv_1 + adr);
15845 + mb();
15846 +}
15847 +
15848 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
15849 +{
15850 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
15851 + memcpy_toio(map->map_priv_1 + to, from, len);
15852 +}
15853 +
15854 +static struct map_info hydrogen3_map = {
15855 + name: "HydrogenIII flash",
15856 + read8: physmap_read8,
15857 + read16: physmap_read16,
15858 + read32: physmap_read32,
15859 + copy_from: physmap_copy_from,
15860 + write8: physmap_write8,
15861 + write16: physmap_write16,
15862 + write32: physmap_write32,
15863 + copy_to: physmap_copy_to,
15864 +};
15865 +
15866 +static unsigned char flash_buswidth = 4;
15867 +
15868 +/* MTDPART_OFS_APPEND is vastly preferred to any attempt at statically lining
15869 + * up the offsets. */
15870 +static struct mtd_partition hydrogen3_partitions[] = {
15871 + {
15872 + name: "User FS",
15873 + size: 0x1c00000,
15874 + offset: 0x0000000
15875 + },{
15876 + name: "yamon",
15877 + size: 0x0100000,
15878 + offset: MTDPART_OFS_APPEND,
15879 + mask_flags: MTD_WRITEABLE
15880 + },{
15881 + name: "raw kernel",
15882 + size: 0x02c0000,
15883 + offset: MTDPART_OFS_APPEND
15884 + }
15885 +};
15886 +
15887 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
15888 +
15889 +static struct mtd_partition *parsed_parts;
15890 +static struct mtd_info *mymtd;
15891 +
15892 +int __init hydrogen3_mtd_init(void)
15893 +{
15894 + struct mtd_partition *parts;
15895 + int nb_parts = 0;
15896 + char *part_type;
15897 +
15898 + /* Default flash buswidth */
15899 + hydrogen3_map.buswidth = flash_buswidth;
15900 +
15901 + /*
15902 + * Static partition definition selection
15903 + */
15904 + part_type = "static";
15905 + parts = hydrogen3_partitions;
15906 + nb_parts = NB_OF(hydrogen3_partitions);
15907 + hydrogen3_map.size = WINDOW_SIZE;
15908 +
15909 + /*
15910 + * Now let's probe for the actual flash. Do it here since
15911 + * specific machine settings might have been set above.
15912 + */
15913 + printk(KERN_NOTICE "HydrogenIII flash: probing %d-bit flash bus\n",
15914 + hydrogen3_map.buswidth*8);
15915 + hydrogen3_map.map_priv_1 =
15916 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
15917 + mymtd = do_map_probe("cfi_probe", &hydrogen3_map);
15918 + if (!mymtd) return -ENXIO;
15919 + mymtd->module = THIS_MODULE;
15920 +
15921 + add_mtd_partitions(mymtd, parts, nb_parts);
15922 + return 0;
15923 +}
15924 +
15925 +static void __exit hydrogen3_mtd_cleanup(void)
15926 +{
15927 + if (mymtd) {
15928 + del_mtd_partitions(mymtd);
15929 + map_destroy(mymtd);
15930 + if (parsed_parts)
15931 + kfree(parsed_parts);
15932 + }
15933 +}
15934 +
15935 +/*#ifndef MODULE
15936 +
15937 +static int __init _bootflashonly(char *str)
15938 +{
15939 + bootflashonly = simple_strtol(str, NULL, 0);
15940 + return 1;
15941 +}
15942 +
15943 +
15944 +__setup("bootflashonly=", _bootflashonly);
15945 +
15946 +#endif*/
15947 +
15948 +
15949 +module_init(hydrogen3_mtd_init);
15950 +module_exit(hydrogen3_mtd_cleanup);
15951 +
15952 +MODULE_PARM(bootflashonly, "i");
15953 +MODULE_PARM_DESC(bootflashonly, "1=use \"boot flash only\"");
15954 +MODULE_AUTHOR("Pete Popov");
15955 +MODULE_DESCRIPTION("HydrogenIII mtd map driver");
15956 +MODULE_LICENSE("GPL");
15957 diff -Nur linux-2.4.30/drivers/mtd/maps/lasat.c linux-2.4.30-mips/drivers/mtd/maps/lasat.c
15958 --- linux-2.4.30/drivers/mtd/maps/lasat.c 2003-06-13 16:51:34.000000000 +0200
15959 +++ linux-2.4.30-mips/drivers/mtd/maps/lasat.c 2003-08-18 04:59:02.000000000 +0200
15960 @@ -1,15 +1,6 @@
15961 /*
15962 * Flash device on lasat 100 and 200 boards
15963 *
15964 - * Presumably (C) 2002 Brian Murphy <brian@murphy.dk> or whoever he
15965 - * works for.
15966 - *
15967 - * This program is free software; you can redistribute it and/or
15968 - * modify it under the terms of the GNU General Public License version
15969 - * 2 as published by the Free Software Foundation.
15970 - *
15971 - * $Id: lasat.c,v 1.1 2003/01/24 14:26:38 dwmw2 Exp $
15972 - *
15973 */
15974
15975 #include <linux/module.h>
15976 @@ -21,7 +12,6 @@
15977 #include <linux/mtd/partitions.h>
15978 #include <linux/config.h>
15979 #include <asm/lasat/lasat.h>
15980 -#include <asm/lasat/lasat_mtd.h>
15981
15982 static struct mtd_info *mymtd;
15983
15984 @@ -69,30 +59,33 @@
15985 }
15986
15987 static struct map_info sp_map = {
15988 - .name = "SP flash",
15989 - .buswidth = 4,
15990 - .read8 = sp_read8,
15991 - .read16 = sp_read16,
15992 - .read32 = sp_read32,
15993 - .copy_from = sp_copy_from,
15994 - .write8 = sp_write8,
15995 - .write16 = sp_write16,
15996 - .write32 = sp_write32,
15997 - .copy_to = sp_copy_to
15998 + name: "SP flash",
15999 + buswidth: 4,
16000 + read8: sp_read8,
16001 + read16: sp_read16,
16002 + read32: sp_read32,
16003 + copy_from: sp_copy_from,
16004 + write8: sp_write8,
16005 + write16: sp_write16,
16006 + write32: sp_write32,
16007 + copy_to: sp_copy_to
16008 };
16009
16010 static struct mtd_partition partition_info[LASAT_MTD_LAST];
16011 -static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Filesystem", "Config"};
16012 +static char *lasat_mtd_partnames[] = {"Bootloader", "Service", "Normal", "Config", "Filesystem"};
16013
16014 static int __init init_sp(void)
16015 {
16016 int i;
16017 + int nparts = 0;
16018 /* this does not play well with the old flash code which
16019 * protects and uprotects the flash when necessary */
16020 printk(KERN_NOTICE "Unprotecting flash\n");
16021 *lasat_misc->flash_wp_reg |= 1 << lasat_misc->flash_wp_bit;
16022
16023 - sp_map.map_priv_1 = lasat_flash_partition_start(LASAT_MTD_BOOTLOADER);
16024 + sp_map.map_priv_1 = ioremap_nocache(
16025 + lasat_flash_partition_start(LASAT_MTD_BOOTLOADER),
16026 + lasat_board_info.li_flash_size);
16027 sp_map.size = lasat_board_info.li_flash_size;
16028
16029 printk(KERN_NOTICE "sp flash device: %lx at %lx\n",
16030 @@ -109,12 +102,15 @@
16031
16032 for (i=0; i < LASAT_MTD_LAST; i++) {
16033 size = lasat_flash_partition_size(i);
16034 - partition_info[i].size = size;
16035 - partition_info[i].offset = offset;
16036 - offset += size;
16037 + if (size != 0) {
16038 + nparts++;
16039 + partition_info[i].size = size;
16040 + partition_info[i].offset = offset;
16041 + offset += size;
16042 + }
16043 }
16044
16045 - add_mtd_partitions( mymtd, partition_info, LASAT_MTD_LAST );
16046 + add_mtd_partitions( mymtd, partition_info, nparts );
16047 return 0;
16048 }
16049
16050 @@ -124,11 +120,11 @@
16051 static void __exit cleanup_sp(void)
16052 {
16053 if (mymtd) {
16054 - del_mtd_partitions(mymtd);
16055 - map_destroy(mymtd);
16056 + del_mtd_partitions(mymtd);
16057 + map_destroy(mymtd);
16058 }
16059 if (sp_map.map_priv_1) {
16060 - sp_map.map_priv_1 = 0;
16061 + sp_map.map_priv_1 = 0;
16062 }
16063 }
16064
16065 diff -Nur linux-2.4.30/drivers/mtd/maps/mirage-flash.c linux-2.4.30-mips/drivers/mtd/maps/mirage-flash.c
16066 --- linux-2.4.30/drivers/mtd/maps/mirage-flash.c 1970-01-01 01:00:00.000000000 +0100
16067 +++ linux-2.4.30-mips/drivers/mtd/maps/mirage-flash.c 2003-12-22 04:37:22.000000000 +0100
16068 @@ -0,0 +1,194 @@
16069 +/*
16070 + * Flash memory access on AMD Mirage board.
16071 + *
16072 + * (C) 2003 Embedded Edge
16073 + * based on mirage-flash.c:
16074 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16075 + *
16076 + */
16077 +
16078 +#include <linux/config.h>
16079 +#include <linux/module.h>
16080 +#include <linux/types.h>
16081 +#include <linux/kernel.h>
16082 +
16083 +#include <linux/mtd/mtd.h>
16084 +#include <linux/mtd/map.h>
16085 +#include <linux/mtd/partitions.h>
16086 +
16087 +#include <asm/io.h>
16088 +#include <asm/au1000.h>
16089 +//#include <asm/mirage.h>
16090 +
16091 +#ifdef DEBUG_RW
16092 +#define DBG(x...) printk(x)
16093 +#else
16094 +#define DBG(x...)
16095 +#endif
16096 +
16097 +static unsigned long window_addr;
16098 +static unsigned long window_size;
16099 +static unsigned long flash_size;
16100 +
16101 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16102 +{
16103 + __u8 ret;
16104 + ret = __raw_readb(map->map_priv_1 + ofs);
16105 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16106 + return ret;
16107 +}
16108 +
16109 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16110 +{
16111 + __u16 ret;
16112 + ret = __raw_readw(map->map_priv_1 + ofs);
16113 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16114 + return ret;
16115 +}
16116 +
16117 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16118 +{
16119 + __u32 ret;
16120 + ret = __raw_readl(map->map_priv_1 + ofs);
16121 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16122 + return ret;
16123 +}
16124 +
16125 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16126 +{
16127 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16128 + memcpy_fromio(to, map->map_priv_1 + from, len);
16129 +}
16130 +
16131 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16132 +{
16133 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16134 + __raw_writeb(d, map->map_priv_1 + adr);
16135 + mb();
16136 +}
16137 +
16138 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16139 +{
16140 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16141 + __raw_writew(d, map->map_priv_1 + adr);
16142 + mb();
16143 +}
16144 +
16145 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16146 +{
16147 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16148 + __raw_writel(d, map->map_priv_1 + adr);
16149 + mb();
16150 +}
16151 +
16152 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16153 +{
16154 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16155 + memcpy_toio(map->map_priv_1 + to, from, len);
16156 +}
16157 +
16158 +static struct map_info mirage_map = {
16159 + name: "Mirage flash",
16160 + read8: physmap_read8,
16161 + read16: physmap_read16,
16162 + read32: physmap_read32,
16163 + copy_from: physmap_copy_from,
16164 + write8: physmap_write8,
16165 + write16: physmap_write16,
16166 + write32: physmap_write32,
16167 + copy_to: physmap_copy_to,
16168 +};
16169 +
16170 +static unsigned char flash_buswidth = 4;
16171 +
16172 +static struct mtd_partition mirage_partitions[] = {
16173 + {
16174 + name: "User FS",
16175 + size: 0x1c00000,
16176 + offset: 0x0000000
16177 + },{
16178 + name: "yamon",
16179 + size: 0x0100000,
16180 + offset: MTDPART_OFS_APPEND,
16181 + mask_flags: MTD_WRITEABLE
16182 + },{
16183 + name: "raw kernel",
16184 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16185 + offset: MTDPART_OFS_APPEND,
16186 + }
16187 +};
16188 +
16189 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16190 +
16191 +static struct mtd_partition *parsed_parts;
16192 +static struct mtd_info *mymtd;
16193 +
16194 +/*
16195 + * Probe the flash density and setup window address and size
16196 + * based on user CONFIG options. There are times when we don't
16197 + * want the MTD driver to be probing the boot or user flash,
16198 + * so having the option to enable only one bank is important.
16199 + */
16200 +int setup_flash_params()
16201 +{
16202 + flash_size = 0x4000000; /* 64MB per part */
16203 + /* Boot ROM flash bank only; no user bank */
16204 + window_addr = 0x1C000000;
16205 + window_size = 0x4000000;
16206 + /* USERFS from 0x1C00 0000 to 0x1FC00000 */
16207 + mirage_partitions[0].size = 0x3C00000;
16208 + return 0;
16209 +}
16210 +
16211 +int __init mirage_mtd_init(void)
16212 +{
16213 + struct mtd_partition *parts;
16214 + int nb_parts = 0;
16215 + char *part_type;
16216 +
16217 + /* Default flash buswidth */
16218 + mirage_map.buswidth = flash_buswidth;
16219 +
16220 + if (setup_flash_params())
16221 + return -ENXIO;
16222 +
16223 + /*
16224 + * Static partition definition selection
16225 + */
16226 + part_type = "static";
16227 + parts = mirage_partitions;
16228 + nb_parts = NB_OF(mirage_partitions);
16229 + mirage_map.size = window_size;
16230 +
16231 + /*
16232 + * Now let's probe for the actual flash. Do it here since
16233 + * specific machine settings might have been set above.
16234 + */
16235 + printk(KERN_NOTICE "Mirage flash: probing %d-bit flash bus\n",
16236 + mirage_map.buswidth*8);
16237 + mirage_map.map_priv_1 =
16238 + (unsigned long)ioremap(window_addr, window_size);
16239 + mymtd = do_map_probe("cfi_probe", &mirage_map);
16240 + if (!mymtd) return -ENXIO;
16241 + mymtd->module = THIS_MODULE;
16242 +
16243 + add_mtd_partitions(mymtd, parts, nb_parts);
16244 + return 0;
16245 +}
16246 +
16247 +static void __exit mirage_mtd_cleanup(void)
16248 +{
16249 + if (mymtd) {
16250 + del_mtd_partitions(mymtd);
16251 + map_destroy(mymtd);
16252 + if (parsed_parts)
16253 + kfree(parsed_parts);
16254 + }
16255 +}
16256 +
16257 +module_init(mirage_mtd_init);
16258 +module_exit(mirage_mtd_cleanup);
16259 +
16260 +MODULE_AUTHOR("Embedded Edge");
16261 +MODULE_DESCRIPTION("Mirage mtd map driver");
16262 +MODULE_LICENSE("GPL");
16263 diff -Nur linux-2.4.30/drivers/mtd/maps/mtx-1.c linux-2.4.30-mips/drivers/mtd/maps/mtx-1.c
16264 --- linux-2.4.30/drivers/mtd/maps/mtx-1.c 1970-01-01 01:00:00.000000000 +0100
16265 +++ linux-2.4.30-mips/drivers/mtd/maps/mtx-1.c 2003-06-27 02:04:35.000000000 +0200
16266 @@ -0,0 +1,181 @@
16267 +/*
16268 + * Flash memory access on 4G Systems MTX-1 board
16269 + *
16270 + * (C) 2003 Pete Popov <ppopov@mvista.com>
16271 + * Bruno Randolf <bruno.randolf@4g-systems.de>
16272 + */
16273 +
16274 +#include <linux/config.h>
16275 +#include <linux/module.h>
16276 +#include <linux/types.h>
16277 +#include <linux/kernel.h>
16278 +
16279 +#include <linux/mtd/mtd.h>
16280 +#include <linux/mtd/map.h>
16281 +#include <linux/mtd/partitions.h>
16282 +
16283 +#include <asm/io.h>
16284 +#include <asm/au1000.h>
16285 +
16286 +#ifdef DEBUG_RW
16287 +#define DBG(x...) printk(x)
16288 +#else
16289 +#define DBG(x...)
16290 +#endif
16291 +
16292 +#ifdef CONFIG_MIPS_MTX1
16293 +#define WINDOW_ADDR 0x1E000000
16294 +#define WINDOW_SIZE 0x2000000
16295 +#endif
16296 +
16297 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16298 +{
16299 + __u8 ret;
16300 + ret = __raw_readb(map->map_priv_1 + ofs);
16301 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16302 + return ret;
16303 +}
16304 +
16305 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16306 +{
16307 + __u16 ret;
16308 + ret = __raw_readw(map->map_priv_1 + ofs);
16309 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16310 + return ret;
16311 +}
16312 +
16313 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16314 +{
16315 + __u32 ret;
16316 + ret = __raw_readl(map->map_priv_1 + ofs);
16317 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16318 + return ret;
16319 +}
16320 +
16321 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16322 +{
16323 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16324 + memcpy_fromio(to, map->map_priv_1 + from, len);
16325 +}
16326 +
16327 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16328 +{
16329 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16330 + __raw_writeb(d, map->map_priv_1 + adr);
16331 + mb();
16332 +}
16333 +
16334 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16335 +{
16336 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16337 + __raw_writew(d, map->map_priv_1 + adr);
16338 + mb();
16339 +}
16340 +
16341 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16342 +{
16343 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16344 + __raw_writel(d, map->map_priv_1 + adr);
16345 + mb();
16346 +}
16347 +
16348 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16349 +{
16350 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16351 + memcpy_toio(map->map_priv_1 + to, from, len);
16352 +}
16353 +
16354 +
16355 +
16356 +static struct map_info mtx1_map = {
16357 + name: "MTX-1 flash",
16358 + read8: physmap_read8,
16359 + read16: physmap_read16,
16360 + read32: physmap_read32,
16361 + copy_from: physmap_copy_from,
16362 + write8: physmap_write8,
16363 + write16: physmap_write16,
16364 + write32: physmap_write32,
16365 + copy_to: physmap_copy_to,
16366 +};
16367 +
16368 +
16369 +static unsigned long flash_size = 0x01000000;
16370 +static unsigned char flash_buswidth = 4;
16371 +static struct mtd_partition mtx1_partitions[] = {
16372 + {
16373 + name: "user fs",
16374 + size: 0x1c00000,
16375 + offset: 0,
16376 + },{
16377 + name: "yamon",
16378 + size: 0x0100000,
16379 + offset: MTDPART_OFS_APPEND,
16380 + mask_flags: MTD_WRITEABLE
16381 + },{
16382 + name: "raw kernel",
16383 + size: 0x02c0000,
16384 + offset: MTDPART_OFS_APPEND,
16385 + },{
16386 + name: "yamon env vars",
16387 + size: 0x0040000,
16388 + offset: MTDPART_OFS_APPEND,
16389 + mask_flags: MTD_WRITEABLE
16390 + }
16391 +};
16392 +
16393 +
16394 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16395 +
16396 +static struct mtd_partition *parsed_parts;
16397 +static struct mtd_info *mymtd;
16398 +
16399 +int __init mtx1_mtd_init(void)
16400 +{
16401 + struct mtd_partition *parts;
16402 + int nb_parts = 0;
16403 + char *part_type;
16404 +
16405 + /* Default flash buswidth */
16406 + mtx1_map.buswidth = flash_buswidth;
16407 +
16408 + /*
16409 + * Static partition definition selection
16410 + */
16411 + part_type = "static";
16412 + parts = mtx1_partitions;
16413 + nb_parts = NB_OF(mtx1_partitions);
16414 + mtx1_map.size = flash_size;
16415 +
16416 + /*
16417 + * Now let's probe for the actual flash. Do it here since
16418 + * specific machine settings might have been set above.
16419 + */
16420 + printk(KERN_NOTICE "MTX-1 flash: probing %d-bit flash bus\n",
16421 + mtx1_map.buswidth*8);
16422 + mtx1_map.map_priv_1 =
16423 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
16424 + mymtd = do_map_probe("cfi_probe", &mtx1_map);
16425 + if (!mymtd) return -ENXIO;
16426 + mymtd->module = THIS_MODULE;
16427 +
16428 + add_mtd_partitions(mymtd, parts, nb_parts);
16429 + return 0;
16430 +}
16431 +
16432 +static void __exit mtx1_mtd_cleanup(void)
16433 +{
16434 + if (mymtd) {
16435 + del_mtd_partitions(mymtd);
16436 + map_destroy(mymtd);
16437 + if (parsed_parts)
16438 + kfree(parsed_parts);
16439 + }
16440 +}
16441 +
16442 +module_init(mtx1_mtd_init);
16443 +module_exit(mtx1_mtd_cleanup);
16444 +
16445 +MODULE_AUTHOR("Pete Popov");
16446 +MODULE_DESCRIPTION("MTX-1 CFI map driver");
16447 +MODULE_LICENSE("GPL");
16448 diff -Nur linux-2.4.30/drivers/mtd/maps/pb1550-flash.c linux-2.4.30-mips/drivers/mtd/maps/pb1550-flash.c
16449 --- linux-2.4.30/drivers/mtd/maps/pb1550-flash.c 1970-01-01 01:00:00.000000000 +0100
16450 +++ linux-2.4.30-mips/drivers/mtd/maps/pb1550-flash.c 2004-02-26 01:48:48.000000000 +0100
16451 @@ -0,0 +1,270 @@
16452 +/*
16453 + * Flash memory access on Alchemy Pb1550 board
16454 + *
16455 + * (C) 2004 Embedded Edge, LLC, based on pb1550-flash.c:
16456 + * (C) 2003 Pete Popov <ppopov@pacbell.net>
16457 + *
16458 + */
16459 +
16460 +#include <linux/config.h>
16461 +#include <linux/module.h>
16462 +#include <linux/types.h>
16463 +#include <linux/kernel.h>
16464 +
16465 +#include <linux/mtd/mtd.h>
16466 +#include <linux/mtd/map.h>
16467 +#include <linux/mtd/partitions.h>
16468 +
16469 +#include <asm/io.h>
16470 +#include <asm/au1000.h>
16471 +#include <asm/pb1550.h>
16472 +
16473 +#ifdef DEBUG_RW
16474 +#define DBG(x...) printk(x)
16475 +#else
16476 +#define DBG(x...)
16477 +#endif
16478 +
16479 +static unsigned long window_addr;
16480 +static unsigned long window_size;
16481 +
16482 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16483 +{
16484 + __u8 ret;
16485 + ret = __raw_readb(map->map_priv_1 + ofs);
16486 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16487 + return ret;
16488 +}
16489 +
16490 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16491 +{
16492 + __u16 ret;
16493 + ret = __raw_readw(map->map_priv_1 + ofs);
16494 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16495 + return ret;
16496 +}
16497 +
16498 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16499 +{
16500 + __u32 ret;
16501 + ret = __raw_readl(map->map_priv_1 + ofs);
16502 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16503 + return ret;
16504 +}
16505 +
16506 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16507 +{
16508 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16509 + memcpy_fromio(to, map->map_priv_1 + from, len);
16510 +}
16511 +
16512 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16513 +{
16514 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16515 + __raw_writeb(d, map->map_priv_1 + adr);
16516 + mb();
16517 +}
16518 +
16519 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16520 +{
16521 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16522 + __raw_writew(d, map->map_priv_1 + adr);
16523 + mb();
16524 +}
16525 +
16526 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16527 +{
16528 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16529 + __raw_writel(d, map->map_priv_1 + adr);
16530 + mb();
16531 +}
16532 +
16533 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16534 +{
16535 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16536 + memcpy_toio(map->map_priv_1 + to, from, len);
16537 +}
16538 +
16539 +static struct map_info pb1550_map = {
16540 + name: "Pb1550 flash",
16541 + read8: physmap_read8,
16542 + read16: physmap_read16,
16543 + read32: physmap_read32,
16544 + copy_from: physmap_copy_from,
16545 + write8: physmap_write8,
16546 + write16: physmap_write16,
16547 + write32: physmap_write32,
16548 + copy_to: physmap_copy_to,
16549 +};
16550 +
16551 +static unsigned char flash_buswidth = 4;
16552 +
16553 +/*
16554 + * Support only 64MB NOR Flash parts
16555 + */
16556 +
16557 +#ifdef PB1550_BOTH_BANKS
16558 +/* both banks will be used. Combine the first bank and the first
16559 + * part of the second bank together into a single jffs/jffs2
16560 + * partition.
16561 + */
16562 +static struct mtd_partition pb1550_partitions[] = {
16563 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
16564 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
16565 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
16566 + */
16567 + {
16568 + name: "User FS",
16569 + size: (0x1FC00000 - 0x18000000),
16570 + offset: 0x0000000
16571 + },{
16572 + name: "yamon",
16573 + size: 0x0100000,
16574 + offset: MTDPART_OFS_APPEND,
16575 + mask_flags: MTD_WRITEABLE
16576 + },{
16577 + name: "raw kernel",
16578 + size: (0x300000 - 0x40000), /* last 256KB is yamon env */
16579 + offset: MTDPART_OFS_APPEND,
16580 + }
16581 +};
16582 +#elif defined(PB1550_BOOT_ONLY)
16583 +static struct mtd_partition pb1550_partitions[] = {
16584 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
16585 + * 1C00 0000 1FFF FFFF CE0 64MB Boot NOR Flash
16586 + */
16587 + {
16588 + name: "User FS",
16589 + size: 0x03c00000,
16590 + offset: 0x0000000
16591 + },{
16592 + name: "yamon",
16593 + size: 0x0100000,
16594 + offset: MTDPART_OFS_APPEND,
16595 + mask_flags: MTD_WRITEABLE
16596 + },{
16597 + name: "raw kernel",
16598 + size: (0x300000-0x40000), /* last 256KB is yamon env */
16599 + offset: MTDPART_OFS_APPEND,
16600 + }
16601 +};
16602 +#elif defined(PB1550_USER_ONLY)
16603 +static struct mtd_partition pb1550_partitions[] = {
16604 + /* assume boot[2:0]:swap is '0000' or '1000', which translates to:
16605 + * 1800 0000 1BFF FFFF CE0 64MB Param NOR Flash
16606 + */
16607 + {
16608 + name: "User FS",
16609 + size: (0x4000000 - 0x200000), /* reserve 2MB for raw kernel */
16610 + offset: 0x0000000
16611 + },{
16612 + name: "raw kernel",
16613 + size: MTDPART_SIZ_FULL,
16614 + offset: MTDPART_OFS_APPEND,
16615 + }
16616 +};
16617 +#else
16618 +#error MTD_PB1550 define combo error /* should never happen */
16619 +#endif
16620 +
16621 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16622 +
16623 +static struct mtd_partition *parsed_parts;
16624 +static struct mtd_info *mymtd;
16625 +
16626 +/*
16627 + * Probe the flash density and setup window address and size
16628 + * based on user CONFIG options. There are times when we don't
16629 + * want the MTD driver to be probing the boot or user flash,
16630 + * so having the option to enable only one bank is important.
16631 + */
16632 +int setup_flash_params()
16633 +{
16634 + u16 boot_swapboot;
16635 + boot_swapboot = (au_readl(MEM_STSTAT) & (0x7<<1)) |
16636 + ((bcsr->status >> 6) & 0x1);
16637 + printk("Pb1550 MTD: boot:swap %d\n", boot_swapboot);
16638 +
16639 + switch (boot_swapboot) {
16640 + case 0: /* 512Mbit devices, both enabled */
16641 + case 1:
16642 + case 8:
16643 + case 9:
16644 +#if defined(PB1550_BOTH_BANKS)
16645 + window_addr = 0x18000000;
16646 + window_size = 0x8000000;
16647 +#elif defined(PB1550_BOOT_ONLY)
16648 + window_addr = 0x1C000000;
16649 + window_size = 0x4000000;
16650 +#else /* USER ONLY */
16651 + window_addr = 0x1E000000;
16652 + window_size = 0x1000000;
16653 +#endif
16654 + break;
16655 + case 0xC:
16656 + case 0xD:
16657 + case 0xE:
16658 + case 0xF:
16659 + /* 64 MB Boot NOR Flash is disabled */
16660 + /* and the start address is moved to 0x0C00000 */
16661 + window_addr = 0x0C000000;
16662 + window_size = 0x4000000;
16663 + default:
16664 + printk("Pb1550 MTD: unsupported boot:swap setting\n");
16665 + return 1;
16666 + }
16667 + return 0;
16668 +}
16669 +
16670 +int __init pb1550_mtd_init(void)
16671 +{
16672 + struct mtd_partition *parts;
16673 + int nb_parts = 0;
16674 + char *part_type;
16675 +
16676 + /* Default flash buswidth */
16677 + pb1550_map.buswidth = flash_buswidth;
16678 +
16679 + if (setup_flash_params())
16680 + return -ENXIO;
16681 +
16682 + /*
16683 + * Static partition definition selection
16684 + */
16685 + part_type = "static";
16686 + parts = pb1550_partitions;
16687 + nb_parts = NB_OF(pb1550_partitions);
16688 + pb1550_map.size = window_size;
16689 +
16690 + /*
16691 + * Now let's probe for the actual flash. Do it here since
16692 + * specific machine settings might have been set above.
16693 + */
16694 + printk(KERN_NOTICE "Pb1550 flash: probing %d-bit flash bus\n",
16695 + pb1550_map.buswidth*8);
16696 + pb1550_map.map_priv_1 =
16697 + (unsigned long)ioremap(window_addr, window_size);
16698 + mymtd = do_map_probe("cfi_probe", &pb1550_map);
16699 + if (!mymtd) return -ENXIO;
16700 + mymtd->module = THIS_MODULE;
16701 +
16702 + add_mtd_partitions(mymtd, parts, nb_parts);
16703 + return 0;
16704 +}
16705 +
16706 +static void __exit pb1550_mtd_cleanup(void)
16707 +{
16708 + if (mymtd) {
16709 + del_mtd_partitions(mymtd);
16710 + map_destroy(mymtd);
16711 + if (parsed_parts)
16712 + kfree(parsed_parts);
16713 + }
16714 +}
16715 +
16716 +module_init(pb1550_mtd_init);
16717 +module_exit(pb1550_mtd_cleanup);
16718 +
16719 +MODULE_AUTHOR("Embedded Edge, LLC");
16720 +MODULE_DESCRIPTION("Pb1550 mtd map driver");
16721 +MODULE_LICENSE("GPL");
16722 diff -Nur linux-2.4.30/drivers/mtd/maps/pb1xxx-flash.c linux-2.4.30-mips/drivers/mtd/maps/pb1xxx-flash.c
16723 --- linux-2.4.30/drivers/mtd/maps/pb1xxx-flash.c 2003-06-13 16:51:34.000000000 +0200
16724 +++ linux-2.4.30-mips/drivers/mtd/maps/pb1xxx-flash.c 2003-05-19 08:27:22.000000000 +0200
16725 @@ -192,6 +192,34 @@
16726 #else
16727 #error MTD_PB1500 define combo error /* should never happen */
16728 #endif
16729 +#elif defined(CONFIG_MTD_BOSPORUS)
16730 +static unsigned char flash_buswidth = 2;
16731 +static unsigned long flash_size = 0x02000000;
16732 +#define WINDOW_ADDR 0x1F000000
16733 +#define WINDOW_SIZE 0x2000000
16734 +static struct mtd_partition pb1xxx_partitions[] = {
16735 + {
16736 + name: "User FS",
16737 + size: 0x00400000,
16738 + offset: 0x00000000,
16739 + },{
16740 + name: "Yamon-2",
16741 + size: 0x00100000,
16742 + offset: 0x00400000,
16743 + },{
16744 + name: "Root FS",
16745 + size: 0x00700000,
16746 + offset: 0x00500000,
16747 + },{
16748 + name: "Yamon-1",
16749 + size: 0x00100000,
16750 + offset: 0x00C00000,
16751 + },{
16752 + name: "Kernel",
16753 + size: 0x00300000,
16754 + offset: 0x00D00000,
16755 + }
16756 +};
16757 #else
16758 #error Unsupported board
16759 #endif
16760 diff -Nur linux-2.4.30/drivers/mtd/maps/xxs1500.c linux-2.4.30-mips/drivers/mtd/maps/xxs1500.c
16761 --- linux-2.4.30/drivers/mtd/maps/xxs1500.c 1970-01-01 01:00:00.000000000 +0100
16762 +++ linux-2.4.30-mips/drivers/mtd/maps/xxs1500.c 2003-08-02 04:06:01.000000000 +0200
16763 @@ -0,0 +1,186 @@
16764 +/*
16765 + * Flash memory access on MyCable XXS1500 board
16766 + *
16767 + * (C) 2003 Pete Popov <ppopov@mvista.com>
16768 + *
16769 + * $Id: xxs1500.c,v 1.1.2.2 2003/08/02 02:06:01 ppopov Exp $
16770 + */
16771 +
16772 +#include <linux/config.h>
16773 +#include <linux/module.h>
16774 +#include <linux/types.h>
16775 +#include <linux/kernel.h>
16776 +
16777 +#include <linux/mtd/mtd.h>
16778 +#include <linux/mtd/map.h>
16779 +#include <linux/mtd/partitions.h>
16780 +
16781 +#include <asm/io.h>
16782 +#include <asm/au1000.h>
16783 +
16784 +#ifdef DEBUG_RW
16785 +#define DBG(x...) printk(x)
16786 +#else
16787 +#define DBG(x...)
16788 +#endif
16789 +
16790 +#ifdef CONFIG_MIPS_XXS1500
16791 +#define WINDOW_ADDR 0x1F000000
16792 +#define WINDOW_SIZE 0x1000000
16793 +#endif
16794 +
16795 +__u8 physmap_read8(struct map_info *map, unsigned long ofs)
16796 +{
16797 + __u8 ret;
16798 + ret = __raw_readb(map->map_priv_1 + ofs);
16799 + DBG("read8 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16800 + return ret;
16801 +}
16802 +
16803 +__u16 physmap_read16(struct map_info *map, unsigned long ofs)
16804 +{
16805 + __u16 ret;
16806 + ret = __raw_readw(map->map_priv_1 + ofs);
16807 + DBG("read16 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16808 + return ret;
16809 +}
16810 +
16811 +__u32 physmap_read32(struct map_info *map, unsigned long ofs)
16812 +{
16813 + __u32 ret;
16814 + ret = __raw_readl(map->map_priv_1 + ofs);
16815 + DBG("read32 from %x, %x\n", (unsigned)(map->map_priv_1 + ofs), ret);
16816 + return ret;
16817 +}
16818 +
16819 +void physmap_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
16820 +{
16821 + DBG("physmap_copy from %x to %x\n", (unsigned)from, (unsigned)to);
16822 + memcpy_fromio(to, map->map_priv_1 + from, len);
16823 +}
16824 +
16825 +void physmap_write8(struct map_info *map, __u8 d, unsigned long adr)
16826 +{
16827 + DBG("write8 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16828 + __raw_writeb(d, map->map_priv_1 + adr);
16829 + mb();
16830 +}
16831 +
16832 +void physmap_write16(struct map_info *map, __u16 d, unsigned long adr)
16833 +{
16834 + DBG("write16 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16835 + __raw_writew(d, map->map_priv_1 + adr);
16836 + mb();
16837 +}
16838 +
16839 +void physmap_write32(struct map_info *map, __u32 d, unsigned long adr)
16840 +{
16841 + DBG("write32 at %x, %x\n", (unsigned)(map->map_priv_1 + adr), d);
16842 + __raw_writel(d, map->map_priv_1 + adr);
16843 + mb();
16844 +}
16845 +
16846 +void physmap_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
16847 +{
16848 + DBG("physmap_copy_to %x from %x\n", (unsigned)to, (unsigned)from);
16849 + memcpy_toio(map->map_priv_1 + to, from, len);
16850 +}
16851 +
16852 +
16853 +
16854 +static struct map_info xxs1500_map = {
16855 + name: "XXS1500 flash",
16856 + read8: physmap_read8,
16857 + read16: physmap_read16,
16858 + read32: physmap_read32,
16859 + copy_from: physmap_copy_from,
16860 + write8: physmap_write8,
16861 + write16: physmap_write16,
16862 + write32: physmap_write32,
16863 + copy_to: physmap_copy_to,
16864 +};
16865 +
16866 +
16867 +static unsigned long flash_size = 0x00800000;
16868 +static unsigned char flash_buswidth = 4;
16869 +static struct mtd_partition xxs1500_partitions[] = {
16870 + {
16871 + name: "kernel image",
16872 + size: 0x00200000,
16873 + offset: 0,
16874 + },{
16875 + name: "user fs 0",
16876 + size: (0x00C00000-0x200000),
16877 + offset: MTDPART_OFS_APPEND,
16878 + },{
16879 + name: "yamon",
16880 + size: 0x00100000,
16881 + offset: MTDPART_OFS_APPEND,
16882 + mask_flags: MTD_WRITEABLE
16883 + },{
16884 + name: "user fs 1",
16885 + size: 0x2c0000,
16886 + offset: MTDPART_OFS_APPEND,
16887 + },{
16888 + name: "yamon env vars",
16889 + size: 0x040000,
16890 + offset: MTDPART_OFS_APPEND,
16891 + mask_flags: MTD_WRITEABLE
16892 + }
16893 +};
16894 +
16895 +
16896 +#define NB_OF(x) (sizeof(x)/sizeof(x[0]))
16897 +
16898 +static struct mtd_partition *parsed_parts;
16899 +static struct mtd_info *mymtd;
16900 +
16901 +int __init xxs1500_mtd_init(void)
16902 +{
16903 + struct mtd_partition *parts;
16904 + int nb_parts = 0;
16905 + char *part_type;
16906 +
16907 + /* Default flash buswidth */
16908 + xxs1500_map.buswidth = flash_buswidth;
16909 +
16910 + /*
16911 + * Static partition definition selection
16912 + */
16913 + part_type = "static";
16914 + parts = xxs1500_partitions;
16915 + nb_parts = NB_OF(xxs1500_partitions);
16916 + xxs1500_map.size = flash_size;
16917 +
16918 + /*
16919 + * Now let's probe for the actual flash. Do it here since
16920 + * specific machine settings might have been set above.
16921 + */
16922 + printk(KERN_NOTICE "XXS1500 flash: probing %d-bit flash bus\n",
16923 + xxs1500_map.buswidth*8);
16924 + xxs1500_map.map_priv_1 =
16925 + (unsigned long)ioremap(WINDOW_ADDR, WINDOW_SIZE);
16926 + mymtd = do_map_probe("cfi_probe", &xxs1500_map);
16927 + if (!mymtd) return -ENXIO;
16928 + mymtd->module = THIS_MODULE;
16929 +
16930 + add_mtd_partitions(mymtd, parts, nb_parts);
16931 + return 0;
16932 +}
16933 +
16934 +static void __exit xxs1500_mtd_cleanup(void)
16935 +{
16936 + if (mymtd) {
16937 + del_mtd_partitions(mymtd);
16938 + map_destroy(mymtd);
16939 + if (parsed_parts)
16940 + kfree(parsed_parts);
16941 + }
16942 +}
16943 +
16944 +module_init(xxs1500_mtd_init);
16945 +module_exit(xxs1500_mtd_cleanup);
16946 +
16947 +MODULE_AUTHOR("Pete Popov");
16948 +MODULE_DESCRIPTION("XXS1500 CFI map driver");
16949 +MODULE_LICENSE("GPL");
16950 diff -Nur linux-2.4.30/drivers/net/defxx.c linux-2.4.30-mips/drivers/net/defxx.c
16951 --- linux-2.4.30/drivers/net/defxx.c 2004-11-17 12:54:21.000000000 +0100
16952 +++ linux-2.4.30-mips/drivers/net/defxx.c 2004-11-19 01:28:39.000000000 +0100
16953 @@ -10,24 +10,18 @@
16954 *
16955 * Abstract:
16956 * A Linux device driver supporting the Digital Equipment Corporation
16957 - * FDDI EISA and PCI controller families. Supported adapters include:
16958 + * FDDI TURBOchannel, EISA and PCI controller families. Supported
16959 + * adapters include:
16960 *
16961 - * DEC FDDIcontroller/EISA (DEFEA)
16962 - * DEC FDDIcontroller/PCI (DEFPA)
16963 + * DEC FDDIcontroller/TURBOchannel (DEFTA)
16964 + * DEC FDDIcontroller/EISA (DEFEA)
16965 + * DEC FDDIcontroller/PCI (DEFPA)
16966 *
16967 - * Maintainers:
16968 - * LVS Lawrence V. Stefani
16969 - *
16970 - * Contact:
16971 - * The author may be reached at:
16972 + * The original author:
16973 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
16974 *
16975 - * Inet: stefani@lkg.dec.com
16976 - * (NOTE! this address no longer works -jgarzik)
16977 - *
16978 - * Mail: Digital Equipment Corporation
16979 - * 550 King Street
16980 - * M/S: LKG1-3/M07
16981 - * Littleton, MA 01460
16982 + * Maintainers:
16983 + * macro Maciej W. Rozycki <macro@linux-mips.org>
16984 *
16985 * Credits:
16986 * I'd like to thank Patricia Cross for helping me get started with
16987 @@ -197,16 +191,16 @@
16988 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
16989 * Feb 2001 Skb allocation fixes
16990 * Feb 2001 davej PCI enable cleanups.
16991 + * 04 Aug 2003 macro Converted to the DMA API.
16992 + * 14 Aug 2004 macro Fix device names reported.
16993 + * 26 Sep 2004 macro TURBOchannel support.
16994 */
16995
16996 /* Include files */
16997
16998 #include <linux/module.h>
16999 -
17000 #include <linux/kernel.h>
17001 -#include <linux/sched.h>
17002 #include <linux/string.h>
17003 -#include <linux/ptrace.h>
17004 #include <linux/errno.h>
17005 #include <linux/ioport.h>
17006 #include <linux/slab.h>
17007 @@ -215,19 +209,33 @@
17008 #include <linux/delay.h>
17009 #include <linux/init.h>
17010 #include <linux/netdevice.h>
17011 +#include <linux/fddidevice.h>
17012 +#include <linux/skbuff.h>
17013 +
17014 #include <asm/byteorder.h>
17015 #include <asm/bitops.h>
17016 #include <asm/io.h>
17017
17018 -#include <linux/fddidevice.h>
17019 -#include <linux/skbuff.h>
17020 +#ifdef CONFIG_TC
17021 +#include <asm/dec/tc.h>
17022 +#else
17023 +static int search_tc_card(const char *name) { return -ENODEV; }
17024 +static void claim_tc_card(int slot) { }
17025 +static void release_tc_card(int slot) { }
17026 +static unsigned long get_tc_base_addr(int slot) { return 0; }
17027 +static unsigned long get_tc_irq_nr(int slot) { return -1; }
17028 +#endif
17029
17030 #include "defxx.h"
17031
17032 -/* Version information string - should be updated prior to each new release!!! */
17033 +/* Version information string should be updated prior to each new release! */
17034 +#define DRV_NAME "defxx"
17035 +#define DRV_VERSION "v1.07T"
17036 +#define DRV_RELDATE "2004/09/26"
17037
17038 static char version[] __devinitdata =
17039 - "defxx.c:v1.05e 2001/02/03 Lawrence V. Stefani and others\n";
17040 + DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
17041 + " Lawrence V. Stefani and others\n";
17042
17043 #define DYNAMIC_BUFFERS 1
17044
17045 @@ -243,7 +251,7 @@
17046 static void dfx_bus_init(struct net_device *dev);
17047 static void dfx_bus_config_check(DFX_board_t *bp);
17048
17049 -static int dfx_driver_init(struct net_device *dev);
17050 +static int dfx_driver_init(struct net_device *dev, const char *print_name);
17051 static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
17052
17053 static int dfx_open(struct net_device *dev);
17054 @@ -337,48 +345,84 @@
17055 int offset,
17056 u8 data
17057 )
17058 +{
17059 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17060 + {
17061 + volatile u8 *addr = (void *)(bp->base_addr + offset);
17062
17063 + *addr = data;
17064 + mb();
17065 + }
17066 + else
17067 {
17068 u16 port = bp->base_addr + offset;
17069
17070 outb(data, port);
17071 }
17072 +}
17073
17074 static inline void dfx_port_read_byte(
17075 DFX_board_t *bp,
17076 int offset,
17077 u8 *data
17078 )
17079 +{
17080 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17081 + {
17082 + volatile u8 *addr = (void *)(bp->base_addr + offset);
17083
17084 + mb();
17085 + *data = *addr;
17086 + }
17087 + else
17088 {
17089 u16 port = bp->base_addr + offset;
17090
17091 *data = inb(port);
17092 }
17093 +}
17094
17095 static inline void dfx_port_write_long(
17096 DFX_board_t *bp,
17097 int offset,
17098 u32 data
17099 )
17100 +{
17101 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17102 + {
17103 + volatile u32 *addr = (void *)(bp->base_addr + offset);
17104
17105 + *addr = data;
17106 + mb();
17107 + }
17108 + else
17109 {
17110 u16 port = bp->base_addr + offset;
17111
17112 outl(data, port);
17113 }
17114 +}
17115
17116 static inline void dfx_port_read_long(
17117 DFX_board_t *bp,
17118 int offset,
17119 u32 *data
17120 )
17121 +{
17122 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17123 + {
17124 + volatile u32 *addr = (void *)(bp->base_addr + offset);
17125
17126 + mb();
17127 + *data = *addr;
17128 + }
17129 + else
17130 {
17131 u16 port = bp->base_addr + offset;
17132
17133 *data = inl(port);
17134 }
17135 +}
17136
17137 \f
17138 /*
17139 @@ -393,8 +437,9 @@
17140 * Condition code
17141 *
17142 * Arguments:
17143 - * pdev - pointer to pci device information (NULL for EISA)
17144 - * ioaddr - pointer to port (NULL for PCI)
17145 + * pdev - pointer to pci device information (NULL for EISA or TURBOchannel)
17146 + * bus_type - bus type (one of DFX_BUS_TYPE_*)
17147 + * handle - bus-specific data: slot (TC), pointer to port (EISA), NULL (PCI)
17148 *
17149 * Functional Description:
17150 *
17151 @@ -410,54 +455,68 @@
17152 * initialized and the board resources are read and stored in
17153 * the device structure.
17154 */
17155 -static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr)
17156 +static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, u32 bus_type, long handle)
17157 {
17158 + static int version_disp;
17159 + char *print_name = DRV_NAME;
17160 struct net_device *dev;
17161 DFX_board_t *bp; /* board pointer */
17162 + long ioaddr; /* pointer to port */
17163 + unsigned long len; /* resource length */
17164 + int alloc_size; /* total buffer size used */
17165 int err;
17166
17167 -#ifndef MODULE
17168 - static int version_disp;
17169 -
17170 - if (!version_disp) /* display version info if adapter is found */
17171 - {
17172 + if (!version_disp) { /* display version info if adapter is found */
17173 version_disp = 1; /* set display flag to TRUE so that */
17174 printk(version); /* we only display this string ONCE */
17175 }
17176 -#endif
17177
17178 - /*
17179 - * init_fddidev() allocates a device structure with private data, clears the device structure and private data,
17180 - * and calls fddi_setup() and register_netdev(). Not much left to do for us here.
17181 - */
17182 - dev = init_fddidev(NULL, sizeof(*bp));
17183 + if (pdev != NULL)
17184 + print_name = pdev->slot_name;
17185 +
17186 + dev = alloc_fddidev(sizeof(*bp));
17187 if (!dev) {
17188 - printk (KERN_ERR "defxx: unable to allocate fddidev, aborting\n");
17189 + printk(KERN_ERR "%s: unable to allocate fddidev, aborting\n",
17190 + print_name);
17191 return -ENOMEM;
17192 }
17193
17194 /* Enable PCI device. */
17195 - if (pdev != NULL) {
17196 + if (bus_type == DFX_BUS_TYPE_PCI) {
17197 err = pci_enable_device (pdev);
17198 if (err) goto err_out;
17199 ioaddr = pci_resource_start (pdev, 1);
17200 }
17201
17202 SET_MODULE_OWNER(dev);
17203 + SET_NETDEV_DEV(dev, &pdev->dev);
17204
17205 bp = dev->priv;
17206
17207 - if (!request_region (ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN, dev->name)) {
17208 - printk (KERN_ERR "%s: Cannot reserve I/O resource 0x%x @ 0x%lx, aborting\n",
17209 - dev->name, PFI_K_CSR_IO_LEN, ioaddr);
17210 + if (bus_type == DFX_BUS_TYPE_TC) {
17211 + /* TURBOchannel board */
17212 + bp->slot = handle;
17213 + claim_tc_card(bp->slot);
17214 + ioaddr = get_tc_base_addr(handle) + PI_TC_K_CSR_OFFSET;
17215 + len = PI_TC_K_CSR_LEN;
17216 + } else if (bus_type == DFX_BUS_TYPE_EISA) {
17217 + /* EISA board */
17218 + ioaddr = handle;
17219 + len = PI_ESIC_K_CSR_IO_LEN;
17220 + } else
17221 + /* PCI board */
17222 + len = PFI_K_CSR_IO_LEN;
17223 + dev->base_addr = ioaddr; /* save port (I/O) base address */
17224 +
17225 + if (!request_region(ioaddr, len, print_name)) {
17226 + printk(KERN_ERR "%s: Cannot reserve I/O resource "
17227 + "0x%lx @ 0x%lx, aborting\n", print_name, len, ioaddr);
17228 err = -EBUSY;
17229 goto err_out;
17230 }
17231
17232 /* Initialize new device structure */
17233
17234 - dev->base_addr = ioaddr; /* save port (I/O) base address */
17235 -
17236 dev->get_stats = dfx_ctl_get_stats;
17237 dev->open = dfx_open;
17238 dev->stop = dfx_close;
17239 @@ -465,37 +524,54 @@
17240 dev->set_multicast_list = dfx_ctl_set_multicast_list;
17241 dev->set_mac_address = dfx_ctl_set_mac_address;
17242
17243 - if (pdev == NULL) {
17244 - /* EISA board */
17245 - bp->bus_type = DFX_BUS_TYPE_EISA;
17246 + bp->bus_type = bus_type;
17247 + if (bus_type == DFX_BUS_TYPE_TC || bus_type == DFX_BUS_TYPE_EISA) {
17248 + /* TURBOchannel or EISA board */
17249 bp->next = root_dfx_eisa_dev;
17250 root_dfx_eisa_dev = dev;
17251 } else {
17252 /* PCI board */
17253 - bp->bus_type = DFX_BUS_TYPE_PCI;
17254 bp->pci_dev = pdev;
17255 pci_set_drvdata (pdev, dev);
17256 pci_set_master (pdev);
17257 }
17258
17259 - if (dfx_driver_init(dev) != DFX_K_SUCCESS) {
17260 +
17261 + if (dfx_driver_init(dev, print_name) != DFX_K_SUCCESS) {
17262 err = -ENODEV;
17263 goto err_out_region;
17264 }
17265
17266 + err = register_netdev(dev);
17267 + if (err)
17268 + goto err_out_kfree;
17269 +
17270 + printk("%s: registered as %s\n", print_name, dev->name);
17271 return 0;
17272
17273 +err_out_kfree:
17274 + alloc_size = sizeof(PI_DESCR_BLOCK) +
17275 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
17276 +#ifndef DYNAMIC_BUFFERS
17277 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
17278 +#endif
17279 + sizeof(PI_CONSUMER_BLOCK) +
17280 + (PI_ALIGN_K_DESC_BLK - 1);
17281 + if (bp->kmalloced)
17282 + pci_free_consistent(pdev, alloc_size,
17283 + bp->kmalloced, bp->kmalloced_dma);
17284 err_out_region:
17285 - release_region(ioaddr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN);
17286 + release_region(ioaddr, len);
17287 err_out:
17288 - unregister_netdev(dev);
17289 - kfree(dev);
17290 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17291 + release_tc_card(bp->slot);
17292 + free_netdev(dev);
17293 return err;
17294 }
17295
17296 static int __devinit dfx_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
17297 {
17298 - return dfx_init_one_pci_or_eisa(pdev, 0);
17299 + return dfx_init_one_pci_or_eisa(pdev, DFX_BUS_TYPE_PCI, 0);
17300 }
17301
17302 static int __init dfx_eisa_init(void)
17303 @@ -507,6 +583,7 @@
17304
17305 DBG_printk("In dfx_eisa_init...\n");
17306
17307 +#ifdef CONFIG_EISA
17308 /* Scan for FDDI EISA controllers */
17309
17310 for (i=0; i < DFX_MAX_EISA_SLOTS; i++) /* only scan for up to 16 EISA slots */
17311 @@ -517,9 +594,27 @@
17312 {
17313 port = (i << 12); /* recalc base addr */
17314
17315 - if (dfx_init_one_pci_or_eisa(NULL, port) == 0) rc = 0;
17316 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_EISA, port) == 0) rc = 0;
17317 }
17318 }
17319 +#endif
17320 + return rc;
17321 +}
17322 +
17323 +static int __init dfx_tc_init(void)
17324 +{
17325 + int rc = -ENODEV;
17326 + int slot; /* TC slot number */
17327 +
17328 + DBG_printk("In dfx_tc_init...\n");
17329 +
17330 + /* Scan for FDDI TC controllers */
17331 + while ((slot = search_tc_card("PMAF-F")) >= 0) {
17332 + if (dfx_init_one_pci_or_eisa(NULL, DFX_BUS_TYPE_TC, slot) == 0)
17333 + rc = 0;
17334 + else
17335 + break;
17336 + }
17337 return rc;
17338 }
17339 \f
17340 @@ -583,8 +678,9 @@
17341
17342 /* Initialize adapter based on bus type */
17343
17344 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
17345 - {
17346 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
17347 + dev->irq = get_tc_irq_nr(bp->slot);
17348 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
17349 /* Get the interrupt level from the ESIC chip */
17350
17351 dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &val);
17352 @@ -766,6 +862,7 @@
17353 *
17354 * Arguments:
17355 * dev - pointer to device information
17356 + * print_name - printable device name
17357 *
17358 * Functional Description:
17359 * This function allocates additional resources such as the host memory
17360 @@ -780,20 +877,21 @@
17361 * or read adapter MAC address
17362 *
17363 * Assumptions:
17364 - * Memory allocated from kmalloc() call is physically contiguous, locked
17365 - * memory whose physical address equals its virtual address.
17366 + * Memory allocated from pci_alloc_consistent() call is physically
17367 + * contiguous, locked memory.
17368 *
17369 * Side Effects:
17370 * Adapter is reset and should be in DMA_UNAVAILABLE state before
17371 * returning from this routine.
17372 */
17373
17374 -static int __devinit dfx_driver_init(struct net_device *dev)
17375 +static int __devinit dfx_driver_init(struct net_device *dev,
17376 + const char *print_name)
17377 {
17378 DFX_board_t *bp = dev->priv;
17379 int alloc_size; /* total buffer size needed */
17380 char *top_v, *curr_v; /* virtual addrs into memory block */
17381 - u32 top_p, curr_p; /* physical addrs into memory block */
17382 + dma_addr_t top_p, curr_p; /* physical addrs into memory block */
17383 u32 data; /* host data register value */
17384
17385 DBG_printk("In dfx_driver_init...\n");
17386 @@ -837,26 +935,20 @@
17387
17388 /* Read the factory MAC address from the adapter then save it */
17389
17390 - if (dfx_hw_port_ctrl_req(bp,
17391 - PI_PCTRL_M_MLA,
17392 - PI_PDATA_A_MLA_K_LO,
17393 - 0,
17394 - &data) != DFX_K_SUCCESS)
17395 - {
17396 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
17397 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
17398 + &data) != DFX_K_SUCCESS) {
17399 + printk("%s: Could not read adapter factory MAC address!\n",
17400 + print_name);
17401 return(DFX_K_FAILURE);
17402 - }
17403 + }
17404 memcpy(&bp->factory_mac_addr[0], &data, sizeof(u32));
17405
17406 - if (dfx_hw_port_ctrl_req(bp,
17407 - PI_PCTRL_M_MLA,
17408 - PI_PDATA_A_MLA_K_HI,
17409 - 0,
17410 - &data) != DFX_K_SUCCESS)
17411 - {
17412 - printk("%s: Could not read adapter factory MAC address!\n", dev->name);
17413 + if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
17414 + &data) != DFX_K_SUCCESS) {
17415 + printk("%s: Could not read adapter factory MAC address!\n",
17416 + print_name);
17417 return(DFX_K_FAILURE);
17418 - }
17419 + }
17420 memcpy(&bp->factory_mac_addr[4], &data, sizeof(u16));
17421
17422 /*
17423 @@ -867,28 +959,27 @@
17424 */
17425
17426 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
17427 - if (bp->bus_type == DFX_BUS_TYPE_EISA)
17428 - printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17429 - dev->name,
17430 - dev->base_addr,
17431 - dev->irq,
17432 - dev->dev_addr[0],
17433 - dev->dev_addr[1],
17434 - dev->dev_addr[2],
17435 - dev->dev_addr[3],
17436 - dev->dev_addr[4],
17437 - dev->dev_addr[5]);
17438 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17439 + printk("%s: DEFTA at addr = 0x%lX, IRQ = %d, "
17440 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17441 + print_name, dev->base_addr, dev->irq,
17442 + dev->dev_addr[0], dev->dev_addr[1],
17443 + dev->dev_addr[2], dev->dev_addr[3],
17444 + dev->dev_addr[4], dev->dev_addr[5]);
17445 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
17446 + printk("%s: DEFEA at I/O addr = 0x%lX, IRQ = %d, "
17447 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17448 + print_name, dev->base_addr, dev->irq,
17449 + dev->dev_addr[0], dev->dev_addr[1],
17450 + dev->dev_addr[2], dev->dev_addr[3],
17451 + dev->dev_addr[4], dev->dev_addr[5]);
17452 else
17453 - printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17454 - dev->name,
17455 - dev->base_addr,
17456 - dev->irq,
17457 - dev->dev_addr[0],
17458 - dev->dev_addr[1],
17459 - dev->dev_addr[2],
17460 - dev->dev_addr[3],
17461 - dev->dev_addr[4],
17462 - dev->dev_addr[5]);
17463 + printk("%s: DEFPA at I/O addr = 0x%lX, IRQ = %d, "
17464 + "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
17465 + print_name, dev->base_addr, dev->irq,
17466 + dev->dev_addr[0], dev->dev_addr[1],
17467 + dev->dev_addr[2], dev->dev_addr[3],
17468 + dev->dev_addr[4], dev->dev_addr[5]);
17469
17470 /*
17471 * Get memory for descriptor block, consumer block, and other buffers
17472 @@ -903,14 +994,15 @@
17473 #endif
17474 sizeof(PI_CONSUMER_BLOCK) +
17475 (PI_ALIGN_K_DESC_BLK - 1);
17476 - bp->kmalloced = top_v = (char *) kmalloc(alloc_size, GFP_KERNEL);
17477 - if (top_v == NULL)
17478 - {
17479 - printk("%s: Could not allocate memory for host buffers and structures!\n", dev->name);
17480 + bp->kmalloced = top_v = pci_alloc_consistent(bp->pci_dev, alloc_size,
17481 + &bp->kmalloced_dma);
17482 + if (top_v == NULL) {
17483 + printk("%s: Could not allocate memory for host buffers "
17484 + "and structures!\n", print_name);
17485 return(DFX_K_FAILURE);
17486 - }
17487 + }
17488 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
17489 - top_p = virt_to_bus(top_v); /* get physical address of buffer */
17490 + top_p = bp->kmalloced_dma; /* get physical address of buffer */
17491
17492 /*
17493 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
17494 @@ -924,7 +1016,7 @@
17495 * for allocating the needed memory.
17496 */
17497
17498 - curr_p = (u32) (ALIGN(top_p, PI_ALIGN_K_DESC_BLK));
17499 + curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
17500 curr_v = top_v + (curr_p - top_p);
17501
17502 /* Reserve space for descriptor block */
17503 @@ -965,14 +1057,20 @@
17504
17505 /* Display virtual and physical addresses if debug driver */
17506
17507 - DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n", dev->name, (long)bp->descr_block_virt, bp->descr_block_phys);
17508 - DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
17509 - DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n", dev->name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
17510 - DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
17511 - DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n", dev->name, (long)bp->cons_block_virt, bp->cons_block_phys);
17512 + DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
17513 + print_name,
17514 + (long)bp->descr_block_virt, bp->descr_block_phys);
17515 + DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
17516 + print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
17517 + DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
17518 + print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
17519 + DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
17520 + print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
17521 + DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
17522 + print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
17523
17524 return(DFX_K_SUCCESS);
17525 - }
17526 +}
17527
17528 \f
17529 /*
17530 @@ -1218,7 +1316,9 @@
17531
17532 /* Register IRQ - support shared interrupts by passing device ptr */
17533
17534 - ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev);
17535 + ret = request_irq(dev->irq, (void *)dfx_interrupt,
17536 + (bp->bus_type == DFX_BUS_TYPE_TC) ? 0 : SA_SHIRQ,
17537 + dev->name, dev);
17538 if (ret) {
17539 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
17540 return ret;
17541 @@ -1737,7 +1837,7 @@
17542 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
17543 (PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB));
17544 }
17545 - else
17546 + else if (bp->bus_type == DFX_BUS_TYPE_EISA)
17547 {
17548 /* Disable interrupts at the ESIC */
17549
17550 @@ -1755,6 +1855,13 @@
17551 tmp |= PI_CONFIG_STAT_0_M_INT_ENB;
17552 dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp);
17553 }
17554 + else {
17555 + /* TC doesn't share interrupts so no need to disable them */
17556 +
17557 + /* Call interrupt service routine for this adapter */
17558 +
17559 + dfx_int_common(dev);
17560 + }
17561
17562 spin_unlock(&bp->lock);
17563 }
17564 @@ -2663,12 +2770,12 @@
17565
17566 static void my_skb_align(struct sk_buff *skb, int n)
17567 {
17568 - u32 x=(u32)skb->data; /* We only want the low bits .. */
17569 - u32 v;
17570 + unsigned long x = (unsigned long)skb->data;
17571 + unsigned long v;
17572
17573 - v=(x+n-1)&~(n-1); /* Where we want to be */
17574 + v = ALIGN(x, n); /* Where we want to be */
17575
17576 - skb_reserve(skb, v-x);
17577 + skb_reserve(skb, v - x);
17578 }
17579
17580 \f
17581 @@ -2745,7 +2852,10 @@
17582 */
17583
17584 my_skb_align(newskb, 128);
17585 - bp->descr_block_virt->rcv_data[i+j].long_1 = virt_to_bus(newskb->data);
17586 + bp->descr_block_virt->rcv_data[i + j].long_1 =
17587 + (u32)pci_map_single(bp->pci_dev, newskb->data,
17588 + NEW_SKB_SIZE,
17589 + PCI_DMA_FROMDEVICE);
17590 /*
17591 * p_rcv_buff_va is only used inside the
17592 * kernel so we put the skb pointer here.
17593 @@ -2859,9 +2969,17 @@
17594
17595 my_skb_align(newskb, 128);
17596 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
17597 + pci_unmap_single(bp->pci_dev,
17598 + bp->descr_block_virt->rcv_data[entry].long_1,
17599 + NEW_SKB_SIZE,
17600 + PCI_DMA_FROMDEVICE);
17601 skb_reserve(skb, RCV_BUFF_K_PADDING);
17602 bp->p_rcv_buff_va[entry] = (char *)newskb;
17603 - bp->descr_block_virt->rcv_data[entry].long_1 = virt_to_bus(newskb->data);
17604 + bp->descr_block_virt->rcv_data[entry].long_1 =
17605 + (u32)pci_map_single(bp->pci_dev,
17606 + newskb->data,
17607 + NEW_SKB_SIZE,
17608 + PCI_DMA_FROMDEVICE);
17609 } else
17610 skb = NULL;
17611 } else
17612 @@ -2934,7 +3052,7 @@
17613 * is contained in a single physically contiguous buffer
17614 * in which the virtual address of the start of packet
17615 * (skb->data) can be converted to a physical address
17616 - * by using virt_to_bus().
17617 + * by using pci_map_single().
17618 *
17619 * Since the adapter architecture requires a three byte
17620 * packet request header to prepend the start of packet,
17621 @@ -3082,12 +3200,13 @@
17622 * skb->data.
17623 * 6. The physical address of the start of packet
17624 * can be determined from the virtual address
17625 - * by using virt_to_bus() and is only 32-bits
17626 + * by using pci_map_single() and is only 32-bits
17627 * wide.
17628 */
17629
17630 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
17631 - p_xmt_descr->long_1 = (u32) virt_to_bus(skb->data);
17632 + p_xmt_descr->long_1 = (u32)pci_map_single(bp->pci_dev, skb->data,
17633 + skb->len, PCI_DMA_TODEVICE);
17634
17635 /*
17636 * Verify that descriptor is actually available
17637 @@ -3171,6 +3290,7 @@
17638 {
17639 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
17640 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
17641 + u8 comp; /* local transmit completion index */
17642 int freed = 0; /* buffers freed */
17643
17644 /* Service all consumed transmit frames */
17645 @@ -3188,7 +3308,11 @@
17646 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
17647
17648 /* Return skb to operating system */
17649 -
17650 + comp = bp->rcv_xmt_reg.index.xmt_comp;
17651 + pci_unmap_single(bp->pci_dev,
17652 + bp->descr_block_virt->xmt_data[comp].long_1,
17653 + p_xmt_drv_descr->p_skb->len,
17654 + PCI_DMA_TODEVICE);
17655 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
17656
17657 /*
17658 @@ -3297,6 +3421,7 @@
17659 {
17660 u32 prod_cons; /* rcv/xmt consumer block longword */
17661 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
17662 + u8 comp; /* local transmit completion index */
17663
17664 /* Flush all outstanding transmit frames */
17665
17666 @@ -3307,7 +3432,11 @@
17667 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
17668
17669 /* Return skb to operating system */
17670 -
17671 + comp = bp->rcv_xmt_reg.index.xmt_comp;
17672 + pci_unmap_single(bp->pci_dev,
17673 + bp->descr_block_virt->xmt_data[comp].long_1,
17674 + p_xmt_drv_descr->p_skb->len,
17675 + PCI_DMA_TODEVICE);
17676 dev_kfree_skb(p_xmt_drv_descr->p_skb);
17677
17678 /* Increment transmit error counter */
17679 @@ -3337,12 +3466,36 @@
17680
17681 static void __devexit dfx_remove_one_pci_or_eisa(struct pci_dev *pdev, struct net_device *dev)
17682 {
17683 - DFX_board_t *bp = dev->priv;
17684 + DFX_board_t *bp = dev->priv;
17685 + unsigned long len; /* resource length */
17686 + int alloc_size; /* total buffer size used */
17687
17688 + if (bp->bus_type == DFX_BUS_TYPE_TC) {
17689 + /* TURBOchannel board */
17690 + len = PI_TC_K_CSR_LEN;
17691 + } else if (bp->bus_type == DFX_BUS_TYPE_EISA) {
17692 + /* EISA board */
17693 + len = PI_ESIC_K_CSR_IO_LEN;
17694 + } else {
17695 + len = PFI_K_CSR_IO_LEN;
17696 + }
17697 unregister_netdev(dev);
17698 - release_region(dev->base_addr, pdev ? PFI_K_CSR_IO_LEN : PI_ESIC_K_CSR_IO_LEN );
17699 - if (bp->kmalloced) kfree(bp->kmalloced);
17700 - kfree(dev);
17701 + release_region(dev->base_addr, len);
17702 +
17703 + if (bp->bus_type == DFX_BUS_TYPE_TC)
17704 + release_tc_card(bp->slot);
17705 +
17706 + alloc_size = sizeof(PI_DESCR_BLOCK) +
17707 + PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
17708 +#ifndef DYNAMIC_BUFFERS
17709 + (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
17710 +#endif
17711 + sizeof(PI_CONSUMER_BLOCK) +
17712 + (PI_ALIGN_K_DESC_BLK - 1);
17713 + if (bp->kmalloced)
17714 + pci_free_consistent(pdev, alloc_size, bp->kmalloced,
17715 + bp->kmalloced_dma);
17716 + free_netdev(dev);
17717 }
17718
17719 static void __devexit dfx_remove_one (struct pci_dev *pdev)
17720 @@ -3353,21 +3506,22 @@
17721 pci_set_drvdata(pdev, NULL);
17722 }
17723
17724 -static struct pci_device_id dfx_pci_tbl[] __devinitdata = {
17725 +static struct pci_device_id dfx_pci_tbl[] = {
17726 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI, PCI_ANY_ID, PCI_ANY_ID, },
17727 { 0, }
17728 };
17729 MODULE_DEVICE_TABLE(pci, dfx_pci_tbl);
17730
17731 static struct pci_driver dfx_driver = {
17732 - name: "defxx",
17733 - probe: dfx_init_one,
17734 - remove: __devexit_p(dfx_remove_one),
17735 - id_table: dfx_pci_tbl,
17736 + .name = "defxx",
17737 + .probe = dfx_init_one,
17738 + .remove = __devexit_p(dfx_remove_one),
17739 + .id_table = dfx_pci_tbl,
17740 };
17741
17742 static int dfx_have_pci;
17743 static int dfx_have_eisa;
17744 +static int dfx_have_tc;
17745
17746
17747 static void __exit dfx_eisa_cleanup(void)
17748 @@ -3388,12 +3542,7 @@
17749
17750 static int __init dfx_init(void)
17751 {
17752 - int rc_pci, rc_eisa;
17753 -
17754 -/* when a module, this is printed whether or not devices are found in probe */
17755 -#ifdef MODULE
17756 - printk(version);
17757 -#endif
17758 + int rc_pci, rc_eisa, rc_tc;
17759
17760 rc_pci = pci_module_init(&dfx_driver);
17761 if (rc_pci >= 0) dfx_have_pci = 1;
17762 @@ -3401,20 +3550,27 @@
17763 rc_eisa = dfx_eisa_init();
17764 if (rc_eisa >= 0) dfx_have_eisa = 1;
17765
17766 - return ((rc_eisa < 0) ? 0 : rc_eisa) + ((rc_pci < 0) ? 0 : rc_pci);
17767 + rc_tc = dfx_tc_init();
17768 + if (rc_tc >= 0) dfx_have_tc = 1;
17769 +
17770 + return ((rc_tc < 0) ? 0 : rc_tc) +
17771 + ((rc_eisa < 0) ? 0 : rc_eisa) +
17772 + ((rc_pci < 0) ? 0 : rc_pci);
17773 }
17774
17775 static void __exit dfx_cleanup(void)
17776 {
17777 if (dfx_have_pci)
17778 pci_unregister_driver(&dfx_driver);
17779 - if (dfx_have_eisa)
17780 + if (dfx_have_eisa || dfx_have_tc)
17781 dfx_eisa_cleanup();
17782 -
17783 }
17784
17785 module_init(dfx_init);
17786 module_exit(dfx_cleanup);
17787 +MODULE_AUTHOR("Lawrence V. Stefani");
17788 +MODULE_DESCRIPTION("DEC FDDIcontroller EISA/PCI (DEFEA/DEFPA) driver "
17789 + DRV_VERSION " " DRV_RELDATE);
17790 MODULE_LICENSE("GPL");
17791
17792 \f
17793 diff -Nur linux-2.4.30/drivers/net/defxx.h linux-2.4.30-mips/drivers/net/defxx.h
17794 --- linux-2.4.30/drivers/net/defxx.h 2001-02-13 22:15:05.000000000 +0100
17795 +++ linux-2.4.30-mips/drivers/net/defxx.h 2004-10-03 20:06:48.000000000 +0200
17796 @@ -12,17 +12,11 @@
17797 * Contains all definitions specified by port specification and required
17798 * by the defxx.c driver.
17799 *
17800 - * Maintainers:
17801 - * LVS Lawrence V. Stefani
17802 - *
17803 - * Contact:
17804 - * The author may be reached at:
17805 + * The original author:
17806 + * LVS Lawrence V. Stefani <lstefani@yahoo.com>
17807 *
17808 - * Inet: stefani@lkg.dec.com
17809 - * Mail: Digital Equipment Corporation
17810 - * 550 King Street
17811 - * M/S: LKG1-3/M07
17812 - * Littleton, MA 01460
17813 + * Maintainers:
17814 + * macro Maciej W. Rozycki <macro@linux-mips.org>
17815 *
17816 * Modification History:
17817 * Date Name Description
17818 @@ -30,6 +24,7 @@
17819 * 09-Sep-96 LVS Added group_prom field. Moved read/write I/O
17820 * macros to DEFXX.C.
17821 * 12-Sep-96 LVS Removed packet request header pointers.
17822 + * 04 Aug 2003 macro Converted to the DMA API.
17823 */
17824
17825 #ifndef _DEFXX_H_
17826 @@ -1467,6 +1462,11 @@
17827
17828 #endif /* #ifndef BIG_ENDIAN */
17829
17830 +/* Define TC PDQ CSR offset and length */
17831 +
17832 +#define PI_TC_K_CSR_OFFSET 0x100000
17833 +#define PI_TC_K_CSR_LEN 0x80 /* 128 bytes */
17834 +
17835 /* Define EISA controller register offsets */
17836
17837 #define PI_ESIC_K_BURST_HOLDOFF 0x040
17838 @@ -1634,6 +1634,7 @@
17839
17840 #define DFX_BUS_TYPE_PCI 0 /* type code for DEC FDDIcontroller/PCI */
17841 #define DFX_BUS_TYPE_EISA 1 /* type code for DEC FDDIcontroller/EISA */
17842 +#define DFX_BUS_TYPE_TC 2 /* type code for DEC FDDIcontroller/TURBOchannel */
17843
17844 #define DFX_FC_PRH2_PRH1_PRH0 0x54003820 /* Packet Request Header bytes + FC */
17845 #define DFX_PRH0_BYTE 0x20 /* Packet Request Header byte 0 */
17846 @@ -1704,17 +1705,19 @@
17847 {
17848 /* Keep virtual and physical pointers to locked, physically contiguous memory */
17849
17850 - char *kmalloced; /* kfree this on unload */
17851 + char *kmalloced; /* pci_free_consistent this on unload */
17852 + dma_addr_t kmalloced_dma;
17853 + /* DMA handle for the above */
17854 PI_DESCR_BLOCK *descr_block_virt; /* PDQ descriptor block virt address */
17855 - u32 descr_block_phys; /* PDQ descriptor block phys address */
17856 + dma_addr_t descr_block_phys; /* PDQ descriptor block phys address */
17857 PI_DMA_CMD_REQ *cmd_req_virt; /* Command request buffer virt address */
17858 - u32 cmd_req_phys; /* Command request buffer phys address */
17859 + dma_addr_t cmd_req_phys; /* Command request buffer phys address */
17860 PI_DMA_CMD_RSP *cmd_rsp_virt; /* Command response buffer virt address */
17861 - u32 cmd_rsp_phys; /* Command response buffer phys address */
17862 + dma_addr_t cmd_rsp_phys; /* Command response buffer phys address */
17863 char *rcv_block_virt; /* LLC host receive queue buf blk virt */
17864 - u32 rcv_block_phys; /* LLC host receive queue buf blk phys */
17865 + dma_addr_t rcv_block_phys; /* LLC host receive queue buf blk phys */
17866 PI_CONSUMER_BLOCK *cons_block_virt; /* PDQ consumer block virt address */
17867 - u32 cons_block_phys; /* PDQ consumer block phys address */
17868 + dma_addr_t cons_block_phys; /* PDQ consumer block phys address */
17869
17870 /* Keep local copies of Type 1 and Type 2 register data */
17871
17872 @@ -1758,8 +1761,9 @@
17873
17874 struct net_device *dev; /* pointer to device structure */
17875 struct net_device *next;
17876 - u32 bus_type; /* bus type (0 == PCI, 1 == EISA) */
17877 - u16 base_addr; /* base I/O address (same as dev->base_addr) */
17878 + u32 bus_type; /* bus type (0 == PCI, 1 == EISA, 2 == TC) */
17879 + long base_addr; /* base I/O address (same as dev->base_addr) */
17880 + int slot; /* TC slot number */
17881 struct pci_dev * pci_dev;
17882 u32 full_duplex_enb; /* FDDI Full Duplex enable (1 == on, 2 == off) */
17883 u32 req_ttrt; /* requested TTRT value (in 80ns units) */
17884 diff -Nur linux-2.4.30/drivers/net/hamradio/hdlcdrv.c linux-2.4.30-mips/drivers/net/hamradio/hdlcdrv.c
17885 --- linux-2.4.30/drivers/net/hamradio/hdlcdrv.c 2002-02-25 20:37:59.000000000 +0100
17886 +++ linux-2.4.30-mips/drivers/net/hamradio/hdlcdrv.c 2004-05-04 14:04:27.000000000 +0200
17887 @@ -587,6 +587,8 @@
17888 return -EINVAL;
17889 s = (struct hdlcdrv_state *)dev->priv;
17890
17891 + netif_stop_queue(dev);
17892 +
17893 if (s->ops && s->ops->close)
17894 i = s->ops->close(dev);
17895 if (s->skb)
17896 diff -Nur linux-2.4.30/drivers/net/irda/au1k_ir.c linux-2.4.30-mips/drivers/net/irda/au1k_ir.c
17897 --- linux-2.4.30/drivers/net/irda/au1k_ir.c 2004-02-18 14:36:31.000000000 +0100
17898 +++ linux-2.4.30-mips/drivers/net/irda/au1k_ir.c 2005-02-03 07:35:29.000000000 +0100
17899 @@ -81,10 +81,6 @@
17900
17901 #define RUN_AT(x) (jiffies + (x))
17902
17903 -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
17904 -static BCSR * const bcsr = (BCSR *)0xAE000000;
17905 -#endif
17906 -
17907 static spinlock_t ir_lock = SPIN_LOCK_UNLOCKED;
17908
17909 /*
17910 diff -Nur linux-2.4.30/drivers/pci/pci.c linux-2.4.30-mips/drivers/pci/pci.c
17911 --- linux-2.4.30/drivers/pci/pci.c 2004-11-17 12:54:21.000000000 +0100
17912 +++ linux-2.4.30-mips/drivers/pci/pci.c 2004-11-19 01:28:41.000000000 +0100
17913 @@ -1281,11 +1281,17 @@
17914 {
17915 unsigned int buses;
17916 unsigned short cr;
17917 + unsigned short bctl;
17918 struct pci_bus *child;
17919 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
17920
17921 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
17922 DBG("Scanning behind PCI bridge %s, config %06x, pass %d\n", dev->slot_name, buses & 0xffffff, pass);
17923 + /* Disable MasterAbortMode during probing to avoid reporting
17924 + of bus errors (in some architectures) */
17925 + pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
17926 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
17927 + bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
17928 if ((buses & 0xffff00) && !pcibios_assign_all_busses()) {
17929 /*
17930 * Bus already configured by firmware, process it in the first
17931 @@ -1351,6 +1357,7 @@
17932 pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
17933 pci_write_config_word(dev, PCI_COMMAND, cr);
17934 }
17935 + pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);
17936 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number);
17937 return max;
17938 }
17939 diff -Nur linux-2.4.30/drivers/pcmcia/Config.in linux-2.4.30-mips/drivers/pcmcia/Config.in
17940 --- linux-2.4.30/drivers/pcmcia/Config.in 2004-02-18 14:36:31.000000000 +0100
17941 +++ linux-2.4.30-mips/drivers/pcmcia/Config.in 2004-02-22 06:21:34.000000000 +0100
17942 @@ -30,16 +30,14 @@
17943 dep_tristate ' M8xx support' CONFIG_PCMCIA_M8XX $CONFIG_PCMCIA
17944 fi
17945 if [ "$CONFIG_SOC_AU1X00" = "y" ]; then
17946 - dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
17947 - if [ "$CONFIG_PCMCIA_AU1X00" != "n" ]; then
17948 - bool ' Pb1x00 board support' CONFIG_PCMCIA_PB1X00
17949 - bool ' Db1x00 board support' CONFIG_PCMCIA_DB1X00
17950 - bool ' XXS1500 board support' CONFIG_PCMCIA_XXS1500
17951 - fi
17952 + dep_tristate ' Au1x00 PCMCIA support' CONFIG_PCMCIA_AU1X00 $CONFIG_PCMCIA
17953 fi
17954 if [ "$CONFIG_SIBYTE_SB1xxx_SOC" = "y" ]; then
17955 dep_bool ' SiByte PCMCIA support' CONFIG_PCMCIA_SIBYTE $CONFIG_PCMCIA $CONFIG_BLK_DEV_IDE_SIBYTE
17956 fi
17957 + if [ "$CONFIG_VRC4171" = "y" -o "$CONFIG_VRC4171" = "m" ]; then
17958 + dep_tristate ' NEC VRC4171 Card Controllers support' CONFIG_PCMCIA_VRC4171 $CONFIG_PCMCIA
17959 + fi
17960 if [ "$CONFIG_VRC4173" = "y" -o "$CONFIG_VRC4173" = "m" ]; then
17961 dep_tristate ' NEC VRC4173 CARDU support' CONFIG_PCMCIA_VRC4173 $CONFIG_PCMCIA
17962 fi
17963 diff -Nur linux-2.4.30/drivers/pcmcia/Makefile linux-2.4.30-mips/drivers/pcmcia/Makefile
17964 --- linux-2.4.30/drivers/pcmcia/Makefile 2004-02-18 14:36:31.000000000 +0100
17965 +++ linux-2.4.30-mips/drivers/pcmcia/Makefile 2005-02-03 07:35:30.000000000 +0100
17966 @@ -61,9 +61,18 @@
17967
17968 obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o
17969 au1000_ss-objs-y := au1000_generic.o
17970 -au1000_ss-objs-$(CONFIG_PCMCIA_PB1X00) += au1000_pb1x00.o
17971 -au1000_ss-objs-$(CONFIG_PCMCIA_DB1X00) += au1000_db1x00.o
17972 -au1000_ss-objs-$(CONFIG_PCMCIA_XXS1500) += au1000_xxs1500.o
17973 +au1000_ss-objs-$(CONFIG_MIPS_PB1000) += au1000_pb1x00.o
17974 +au1000_ss-objs-$(CONFIG_MIPS_PB1100) += au1000_pb1x00.o
17975 +au1000_ss-objs-$(CONFIG_MIPS_PB1500) += au1000_pb1x00.o
17976 +au1000_ss-objs-$(CONFIG_MIPS_PB1550) += au1000_pb1550.o
17977 +au1000_ss-objs-$(CONFIG_MIPS_PB1200) += au1000_db1x00.o
17978 +au1000_ss-objs-$(CONFIG_MIPS_DB1000) += au1000_db1x00.o
17979 +au1000_ss-objs-$(CONFIG_MIPS_DB1100) += au1000_db1x00.o
17980 +au1000_ss-objs-$(CONFIG_MIPS_DB1500) += au1000_db1x00.o
17981 +au1000_ss-objs-$(CONFIG_MIPS_DB1550) += au1000_db1x00.o
17982 +au1000_ss-objs-$(CONFIG_MIPS_DB1200) += au1000_db1x00.o
17983 +au1000_ss-objs-$(CONFIG_MIPS_HYDROGEN3) += au1000_hydrogen3.o
17984 +au1000_ss-objs-$(CONFIG_MIPS_XXS1500) += au1000_xxs1500.o
17985
17986 obj-$(CONFIG_PCMCIA_SA1100) += sa1100_cs.o
17987 obj-$(CONFIG_PCMCIA_M8XX) += m8xx_pcmcia.o
17988 @@ -89,6 +98,7 @@
17989 sa1100_cs-objs-$(CONFIG_SA1100_XP860) += sa1100_xp860.o sa1111_generic.o
17990 sa1100_cs-objs-$(CONFIG_SA1100_YOPY) += sa1100_yopy.o
17991
17992 +obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o
17993 obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o
17994
17995 include $(TOPDIR)/Rules.make
17996 diff -Nur linux-2.4.30/drivers/pcmcia/au1000_db1x00.c linux-2.4.30-mips/drivers/pcmcia/au1000_db1x00.c
17997 --- linux-2.4.30/drivers/pcmcia/au1000_db1x00.c 2005-01-19 15:09:57.000000000 +0100
17998 +++ linux-2.4.30-mips/drivers/pcmcia/au1000_db1x00.c 2005-02-03 07:35:30.000000000 +0100
17999 @@ -1,6 +1,6 @@
18000 /*
18001 *
18002 - * Alchemy Semi Db1x00 boards specific pcmcia routines.
18003 + * AMD Alchemy DUAL-SLOT Db1x00 boards' specific pcmcia routines.
18004 *
18005 * Copyright 2002 MontaVista Software Inc.
18006 * Author: MontaVista Software, Inc.
18007 @@ -54,9 +54,20 @@
18008 #include <asm/au1000.h>
18009 #include <asm/au1000_pcmcia.h>
18010
18011 +#if defined(CONFIG_MIPS_PB1200)
18012 +#include <asm/pb1200.h>
18013 +#elif defined(CONFIG_MIPS_DB1200)
18014 +#include <asm/db1200.h>
18015 +#else
18016 #include <asm/db1x00.h>
18017 +#endif
18018
18019 -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
18020 +#define PCMCIA_MAX_SOCK 1
18021 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
18022 +
18023 +/* VPP/VCC */
18024 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
18025 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
18026
18027 static int db1x00_pcmcia_init(struct pcmcia_init *init)
18028 {
18029 @@ -76,7 +87,7 @@
18030 db1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
18031 {
18032 u32 inserted;
18033 - unsigned char vs;
18034 + u16 vs;
18035
18036 if(sock > PCMCIA_MAX_SOCK) return -1;
18037
18038 @@ -87,11 +98,11 @@
18039
18040 if (sock == 0) {
18041 vs = bcsr->status & 0x3;
18042 - inserted = !(bcsr->status & (1<<4));
18043 + inserted = BOARD_CARD_INSERTED(0);
18044 }
18045 else {
18046 vs = (bcsr->status & 0xC)>>2;
18047 - inserted = !(bcsr->status & (1<<5));
18048 + inserted = BOARD_CARD_INSERTED(1);
18049 }
18050
18051 DEBUG(KERN_DEBUG "db1x00 socket %d: inserted %d, vs %d\n",
18052 @@ -144,16 +155,9 @@
18053 if(info->sock > PCMCIA_MAX_SOCK) return -1;
18054
18055 if(info->sock == 0)
18056 -#ifdef CONFIG_MIPS_DB1550
18057 - info->irq = AU1000_GPIO_3;
18058 + info->irq = BOARD_PC0_INT;
18059 else
18060 - info->irq = AU1000_GPIO_5;
18061 -#else
18062 - info->irq = AU1000_GPIO_2;
18063 - else
18064 - info->irq = AU1000_GPIO_5;
18065 -#endif
18066 -
18067 + info->irq = BOARD_PC1_INT;
18068 return 0;
18069 }
18070
18071 diff -Nur linux-2.4.30/drivers/pcmcia/vrc4171_card.c linux-2.4.30-mips/drivers/pcmcia/vrc4171_card.c
18072 --- linux-2.4.30/drivers/pcmcia/vrc4171_card.c 1970-01-01 01:00:00.000000000 +0100
18073 +++ linux-2.4.30-mips/drivers/pcmcia/vrc4171_card.c 2004-01-19 16:54:58.000000000 +0100
18074 @@ -0,0 +1,886 @@
18075 +/*
18076 + * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services.
18077 + *
18078 + * Copyright (C) 2003 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
18079 + *
18080 + * This program is free software; you can redistribute it and/or modify
18081 + * it under the terms of the GNU General Public License as published by
18082 + * the Free Software Foundation; either version 2 of the License, or
18083 + * (at your option) any later version.
18084 + *
18085 + * This program is distributed in the hope that it will be useful,
18086 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
18087 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18088 + * GNU General Public License for more details.
18089 + *
18090 + * You should have received a copy of the GNU General Public License
18091 + * along with this program; if not, write to the Free Software
18092 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18093 + */
18094 +#include <linux/init.h>
18095 +#include <linux/ioport.h>
18096 +#include <linux/irq.h>
18097 +#include <linux/module.h>
18098 +#include <linux/spinlock.h>
18099 +#include <linux/sched.h>
18100 +#include <linux/types.h>
18101 +
18102 +#include <asm/io.h>
18103 +#include <asm/vr41xx/vrc4171.h>
18104 +
18105 +#include <pcmcia/ss.h>
18106 +
18107 +#include "i82365.h"
18108 +
18109 +MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services");
18110 +MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
18111 +MODULE_LICENSE("GPL");
18112 +
18113 +#define CARD_MAX_SLOTS 2
18114 +#define CARD_SLOTA 0
18115 +#define CARD_SLOTB 1
18116 +#define CARD_SLOTB_OFFSET 0x40
18117 +
18118 +#define CARD_MEM_START 0x10000000
18119 +#define CARD_MEM_END 0x13ffffff
18120 +#define CARD_MAX_MEM_OFFSET 0x3ffffff
18121 +#define CARD_MAX_MEM_SPEED 1000
18122 +
18123 +#define CARD_CONTROLLER_INDEX 0x03e0
18124 +#define CARD_CONTROLLER_DATA 0x03e1
18125 +#define CARD_CONTROLLER_SIZE 2
18126 + /* Power register */
18127 + #define VPP_GET_VCC 0x01
18128 + #define POWER_ENABLE 0x10
18129 + #define CARD_VOLTAGE_SENSE 0x1f
18130 + #define VCC_3VORXV_CAPABLE 0x00
18131 + #define VCC_XV_ONLY 0x01
18132 + #define VCC_3V_CAPABLE 0x02
18133 + #define VCC_5V_ONLY 0x03
18134 + #define CARD_VOLTAGE_SELECT 0x2f
18135 + #define VCC_3V 0x01
18136 + #define VCC_5V 0x00
18137 + #define VCC_XV 0x02
18138 + #define VCC_STATUS_3V 0x02
18139 + #define VCC_STATUS_5V 0x01
18140 + #define VCC_STATUS_XV 0x03
18141 + #define GLOBAL_CONTROL 0x1e
18142 + #define EXWRBK 0x04
18143 + #define IRQPM_EN 0x08
18144 + #define CLRPMIRQ 0x10
18145 +
18146 +#define IO_MAX_MAPS 2
18147 +#define MEM_MAX_MAPS 5
18148 +
18149 +enum {
18150 + SLOTB_PROBE = 0,
18151 + SLOTB_NOPROBE_IO,
18152 + SLOTB_NOPROBE_MEM,
18153 + SLOTB_NOPROBE_ALL
18154 +};
18155 +
18156 +typedef struct vrc4171_socket {
18157 + int noprobe;
18158 + void (*handler)(void *, unsigned int);
18159 + void *info;
18160 + socket_cap_t cap;
18161 + spinlock_t event_lock;
18162 + uint16_t events;
18163 + struct socket_info_t *pcmcia_socket;
18164 + struct tq_struct tq_task;
18165 + char name[24];
18166 + int csc_irq;
18167 + int io_irq;
18168 +} vrc4171_socket_t;
18169 +
18170 +static vrc4171_socket_t vrc4171_sockets[CARD_MAX_SLOTS];
18171 +static int vrc4171_slotb = SLOTB_IS_NONE;
18172 +static unsigned int vrc4171_irq;
18173 +static uint16_t vrc4171_irq_mask = 0xdeb8;
18174 +
18175 +extern struct socket_info_t *pcmcia_register_socket(int slot,
18176 + struct pccard_operations *vtable,
18177 + int use_bus_pm);
18178 +extern void pcmcia_unregister_socket(struct socket_info_t *s);
18179 +
18180 +static inline uint8_t exca_read_byte(int slot, uint8_t index)
18181 +{
18182 + if (slot == CARD_SLOTB)
18183 + index += CARD_SLOTB_OFFSET;
18184 +
18185 + outb(index, CARD_CONTROLLER_INDEX);
18186 + return inb(CARD_CONTROLLER_DATA);
18187 +}
18188 +
18189 +static inline uint16_t exca_read_word(int slot, uint8_t index)
18190 +{
18191 + uint16_t data;
18192 +
18193 + if (slot == CARD_SLOTB)
18194 + index += CARD_SLOTB_OFFSET;
18195 +
18196 + outb(index++, CARD_CONTROLLER_INDEX);
18197 + data = inb(CARD_CONTROLLER_DATA);
18198 +
18199 + outb(index, CARD_CONTROLLER_INDEX);
18200 + data |= ((uint16_t)inb(CARD_CONTROLLER_DATA)) << 8;
18201 +
18202 + return data;
18203 +}
18204 +
18205 +static inline uint8_t exca_write_byte(int slot, uint8_t index, uint8_t data)
18206 +{
18207 + if (slot == CARD_SLOTB)
18208 + index += CARD_SLOTB_OFFSET;
18209 +
18210 + outb(index, CARD_CONTROLLER_INDEX);
18211 + outb(data, CARD_CONTROLLER_DATA);
18212 +
18213 + return data;
18214 +}
18215 +
18216 +static inline uint16_t exca_write_word(int slot, uint8_t index, uint16_t data)
18217 +{
18218 + if (slot == CARD_SLOTB)
18219 + index += CARD_SLOTB_OFFSET;
18220 +
18221 + outb(index++, CARD_CONTROLLER_INDEX);
18222 + outb(data, CARD_CONTROLLER_DATA);
18223 +
18224 + outb(index, CARD_CONTROLLER_INDEX);
18225 + outb((uint8_t)(data >> 8), CARD_CONTROLLER_DATA);
18226 +
18227 + return data;
18228 +}
18229 +
18230 +static inline int search_nonuse_irq(void)
18231 +{
18232 + int i;
18233 +
18234 + for (i = 0; i < 16; i++) {
18235 + if (vrc4171_irq_mask & (1 << i)) {
18236 + vrc4171_irq_mask &= ~(1 << i);
18237 + return i;
18238 + }
18239 + }
18240 +
18241 + return -1;
18242 +}
18243 +
18244 +static int pccard_init(unsigned int slot)
18245 +{
18246 + vrc4171_socket_t *socket = &vrc4171_sockets[slot];
18247 +
18248 + socket->cap.features |= SS_CAP_PCCARD | SS_CAP_PAGE_REGS;
18249 + socket->cap.irq_mask = 0;
18250 + socket->cap.pci_irq = vrc4171_irq;
18251 + socket->cap.map_size = 0x1000;
18252 + socket->events = 0;
18253 + spin_lock_init(socket->event_lock);
18254 + socket->csc_irq = search_nonuse_irq();
18255 + socket->io_irq = search_nonuse_irq();
18256 +
18257 + return 0;
18258 +}
18259 +
18260 +static int pccard_suspend(unsigned int slot)
18261 +{
18262 + return -EINVAL;
18263 +}
18264 +
18265 +static int pccard_register_callback(unsigned int slot,
18266 + void (*handler)(void *, unsigned int),
18267 + void *info)
18268 +{
18269 + vrc4171_socket_t *socket;
18270 +
18271 + if (slot >= CARD_MAX_SLOTS)
18272 + return -EINVAL;
18273 +
18274 + socket = &vrc4171_sockets[slot];
18275 +
18276 + socket->handler = handler;
18277 + socket->info = info;
18278 +
18279 + if (handler)
18280 + MOD_INC_USE_COUNT;
18281 + else
18282 + MOD_DEC_USE_COUNT;
18283 +
18284 + return 0;
18285 +}
18286 +
18287 +static int pccard_inquire_socket(unsigned int slot, socket_cap_t *cap)
18288 +{
18289 + vrc4171_socket_t *socket;
18290 +
18291 + if (slot >= CARD_MAX_SLOTS || cap == NULL)
18292 + return -EINVAL;
18293 +
18294 + socket = &vrc4171_sockets[slot];
18295 +
18296 + *cap = socket->cap;
18297 +
18298 + return 0;
18299 +}
18300 +
18301 +static int pccard_get_status(unsigned int slot, u_int *value)
18302 +{
18303 + uint8_t status, sense;
18304 + u_int val = 0;
18305 +
18306 + if (slot >= CARD_MAX_SLOTS || value == NULL)
18307 + return -EINVAL;
18308 +
18309 + status = exca_read_byte(slot, I365_STATUS);
18310 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
18311 + if (status & I365_CS_STSCHG)
18312 + val |= SS_STSCHG;
18313 + } else {
18314 + if (!(status & I365_CS_BVD1))
18315 + val |= SS_BATDEAD;
18316 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
18317 + val |= SS_BATWARN;
18318 + }
18319 + if ((status & I365_CS_DETECT) == I365_CS_DETECT)
18320 + val |= SS_DETECT;
18321 + if (status & I365_CS_WRPROT)
18322 + val |= SS_WRPROT;
18323 + if (status & I365_CS_READY)
18324 + val |= SS_READY;
18325 + if (status & I365_CS_POWERON)
18326 + val |= SS_POWERON;
18327 +
18328 + sense = exca_read_byte(slot, CARD_VOLTAGE_SENSE);
18329 + switch (sense) {
18330 + case VCC_3VORXV_CAPABLE:
18331 + val |= SS_3VCARD | SS_XVCARD;
18332 + break;
18333 + case VCC_XV_ONLY:
18334 + val |= SS_XVCARD;
18335 + break;
18336 + case VCC_3V_CAPABLE:
18337 + val |= SS_3VCARD;
18338 + break;
18339 + default:
18340 + /* 5V only */
18341 + break;
18342 + }
18343 +
18344 + *value = val;
18345 +
18346 + return 0;
18347 +}
18348 +
18349 +static inline u_char get_Vcc_value(uint8_t voltage)
18350 +{
18351 + switch (voltage) {
18352 + case VCC_STATUS_3V:
18353 + return 33;
18354 + case VCC_STATUS_5V:
18355 + return 50;
18356 + default:
18357 + break;
18358 + }
18359 +
18360 + return 0;
18361 +}
18362 +
18363 +static inline u_char get_Vpp_value(uint8_t power, u_char Vcc)
18364 +{
18365 + if ((power & 0x03) == 0x01 || (power & 0x03) == 0x02)
18366 + return Vcc;
18367 +
18368 + return 0;
18369 +}
18370 +
18371 +static int pccard_get_socket(unsigned int slot, socket_state_t *state)
18372 +{
18373 + vrc4171_socket_t *socket;
18374 + uint8_t power, voltage, control, cscint;
18375 +
18376 + if (slot >= CARD_MAX_SLOTS || state == NULL)
18377 + return -EINVAL;
18378 +
18379 + socket = &vrc4171_sockets[slot];
18380 +
18381 + power = exca_read_byte(slot, I365_POWER);
18382 + voltage = exca_read_byte(slot, CARD_VOLTAGE_SELECT);
18383 +
18384 + state->Vcc = get_Vcc_value(voltage);
18385 + state->Vpp = get_Vpp_value(power, state->Vcc);
18386 +
18387 + state->flags = 0;
18388 + if (power & POWER_ENABLE)
18389 + state->flags |= SS_PWR_AUTO;
18390 + if (power & I365_PWR_OUT)
18391 + state->flags |= SS_OUTPUT_ENA;
18392 +
18393 + control = exca_read_byte(slot, I365_INTCTL);
18394 + if (control & I365_PC_IOCARD)
18395 + state->flags |= SS_IOCARD;
18396 + if (!(control & I365_PC_RESET))
18397 + state->flags |= SS_RESET;
18398 +
18399 + cscint = exca_read_byte(slot, I365_CSCINT);
18400 + state->csc_mask = 0;
18401 + if (state->flags & SS_IOCARD) {
18402 + if (cscint & I365_CSC_STSCHG)
18403 + state->flags |= SS_STSCHG;
18404 + } else {
18405 + if (cscint & I365_CSC_BVD1)
18406 + state->csc_mask |= SS_BATDEAD;
18407 + if (cscint & I365_CSC_BVD2)
18408 + state->csc_mask |= SS_BATWARN;
18409 + }
18410 + if (cscint & I365_CSC_READY)
18411 + state->csc_mask |= SS_READY;
18412 + if (cscint & I365_CSC_DETECT)
18413 + state->csc_mask |= SS_DETECT;
18414 +
18415 + return 0;
18416 +}
18417 +
18418 +static inline uint8_t set_Vcc_value(u_char Vcc)
18419 +{
18420 + switch (Vcc) {
18421 + case 33:
18422 + return VCC_3V;
18423 + case 50:
18424 + return VCC_5V;
18425 + }
18426 +
18427 + /* Small voltage is chosen for safety. */
18428 + return VCC_3V;
18429 +}
18430 +
18431 +static int pccard_set_socket(unsigned int slot, socket_state_t *state)
18432 +{
18433 + vrc4171_socket_t *socket;
18434 + uint8_t voltage, power, control, cscint;
18435 +
18436 + if (slot >= CARD_MAX_SLOTS ||
18437 + (state->Vpp != state->Vcc && state->Vpp != 0) ||
18438 + (state->Vcc != 50 && state->Vcc != 33 && state->Vcc != 0))
18439 + return -EINVAL;
18440 +
18441 + socket = &vrc4171_sockets[slot];
18442 +
18443 + spin_lock_irq(&socket->event_lock);
18444 +
18445 + voltage = set_Vcc_value(state->Vcc);
18446 + exca_write_byte(slot, CARD_VOLTAGE_SELECT, voltage);
18447 +
18448 + power = POWER_ENABLE;
18449 + if (state->Vpp == state->Vcc)
18450 + power |= VPP_GET_VCC;
18451 + if (state->flags & SS_OUTPUT_ENA)
18452 + power |= I365_PWR_OUT;
18453 + exca_write_byte(slot, I365_POWER, power);
18454 +
18455 + control = 0;
18456 + if (state->io_irq != 0)
18457 + control |= socket->io_irq;
18458 + if (state->flags & SS_IOCARD)
18459 + control |= I365_PC_IOCARD;
18460 + if (state->flags & SS_RESET)
18461 + control &= ~I365_PC_RESET;
18462 + else
18463 + control |= I365_PC_RESET;
18464 + exca_write_byte(slot, I365_INTCTL, control);
18465 +
18466 + cscint = 0;
18467 + exca_write_byte(slot, I365_CSCINT, cscint);
18468 + exca_read_byte(slot, I365_CSC); /* clear CardStatus change */
18469 + if (state->csc_mask != 0)
18470 + cscint |= socket->csc_irq << 8;
18471 + if (state->flags & SS_IOCARD) {
18472 + if (state->csc_mask & SS_STSCHG)
18473 + cscint |= I365_CSC_STSCHG;
18474 + } else {
18475 + if (state->csc_mask & SS_BATDEAD)
18476 + cscint |= I365_CSC_BVD1;
18477 + if (state->csc_mask & SS_BATWARN)
18478 + cscint |= I365_CSC_BVD2;
18479 + }
18480 + if (state->csc_mask & SS_READY)
18481 + cscint |= I365_CSC_READY;
18482 + if (state->csc_mask & SS_DETECT)
18483 + cscint |= I365_CSC_DETECT;
18484 + exca_write_byte(slot, I365_CSCINT, cscint);
18485 +
18486 + spin_unlock_irq(&socket->event_lock);
18487 +
18488 + return 0;
18489 +}
18490 +
18491 +static int pccard_get_io_map(unsigned int slot, struct pccard_io_map *io)
18492 +{
18493 + vrc4171_socket_t *socket;
18494 + uint8_t ioctl, addrwin;
18495 + u_char map;
18496 +
18497 + if (slot >= CARD_MAX_SLOTS || io == NULL ||
18498 + io->map >= IO_MAX_MAPS)
18499 + return -EINVAL;
18500 +
18501 + socket = &vrc4171_sockets[slot];
18502 + map = io->map;
18503 +
18504 + io->start = exca_read_word(slot, I365_IO(map)+I365_W_START);
18505 + io->stop = exca_read_word(slot, I365_IO(map)+I365_W_STOP);
18506 +
18507 + ioctl = exca_read_byte(slot, I365_IOCTL);
18508 + if (io->flags & I365_IOCTL_WAIT(map))
18509 + io->speed = 1;
18510 + else
18511 + io->speed = 0;
18512 +
18513 + io->flags = 0;
18514 + if (ioctl & I365_IOCTL_16BIT(map))
18515 + io->flags |= MAP_16BIT;
18516 + if (ioctl & I365_IOCTL_IOCS16(map))
18517 + io->flags |= MAP_AUTOSZ;
18518 + if (ioctl & I365_IOCTL_0WS(map))
18519 + io->flags |= MAP_0WS;
18520 +
18521 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18522 + if (addrwin & I365_ENA_IO(map))
18523 + io->flags |= MAP_ACTIVE;
18524 +
18525 + return 0;
18526 +}
18527 +
18528 +static int pccard_set_io_map(unsigned int slot, struct pccard_io_map *io)
18529 +{
18530 + vrc4171_socket_t *socket;
18531 + uint8_t ioctl, addrwin;
18532 + u_char map;
18533 +
18534 + if (slot >= CARD_MAX_SLOTS ||
18535 + io == NULL || io->map >= IO_MAX_MAPS ||
18536 + io->start > 0xffff || io->stop > 0xffff || io->start > io->stop)
18537 + return -EINVAL;
18538 +
18539 + socket = &vrc4171_sockets[slot];
18540 + map = io->map;
18541 +
18542 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18543 + if (addrwin & I365_ENA_IO(map)) {
18544 + addrwin &= ~I365_ENA_IO(map);
18545 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18546 + }
18547 +
18548 + exca_write_word(slot, I365_IO(map)+I365_W_START, io->start);
18549 + exca_write_word(slot, I365_IO(map)+I365_W_STOP, io->stop);
18550 +
18551 + ioctl = 0;
18552 + if (io->speed > 0)
18553 + ioctl |= I365_IOCTL_WAIT(map);
18554 + if (io->flags & MAP_16BIT)
18555 + ioctl |= I365_IOCTL_16BIT(map);
18556 + if (io->flags & MAP_AUTOSZ)
18557 + ioctl |= I365_IOCTL_IOCS16(map);
18558 + if (io->flags & MAP_0WS)
18559 + ioctl |= I365_IOCTL_0WS(map);
18560 + exca_write_byte(slot, I365_IOCTL, ioctl);
18561 +
18562 + if (io->flags & MAP_ACTIVE) {
18563 + addrwin |= I365_ENA_IO(map);
18564 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18565 + }
18566 +
18567 + return 0;
18568 +}
18569 +
18570 +static int pccard_get_mem_map(unsigned int slot, struct pccard_mem_map *mem)
18571 +{
18572 + vrc4171_socket_t *socket;
18573 + uint8_t addrwin;
18574 + u_long start, stop;
18575 + u_int offset;
18576 + u_char map;
18577 +
18578 + if (slot >= CARD_MAX_SLOTS || mem == NULL || mem->map >= MEM_MAX_MAPS)
18579 + return -EINVAL;
18580 +
18581 + socket = &vrc4171_sockets[slot];
18582 + map = mem->map;
18583 +
18584 + mem->flags = 0;
18585 + mem->speed = 0;
18586 +
18587 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18588 + if (addrwin & I365_ENA_MEM(map))
18589 + mem->flags |= MAP_ACTIVE;
18590 +
18591 + start = exca_read_word(slot, I365_MEM(map)+I365_W_START);
18592 + if (start & I365_MEM_16BIT)
18593 + mem->flags |= MAP_16BIT;
18594 + mem->sys_start = (start & 0x3fffUL) << 12;
18595 +
18596 + stop = exca_read_word(slot, I365_MEM(map)+I365_W_STOP);
18597 + if (start & I365_MEM_WS0)
18598 + mem->speed += 1;
18599 + if (start & I365_MEM_WS1)
18600 + mem->speed += 2;
18601 + mem->sys_stop = ((stop & 0x3fffUL) << 12) + 0xfffUL;
18602 +
18603 + offset = exca_read_word(slot, I365_MEM(map)+I365_W_OFF);
18604 + if (offset & I365_MEM_REG)
18605 + mem->flags |= MAP_ATTRIB;
18606 + if (offset & I365_MEM_WRPROT)
18607 + mem->flags |= MAP_WRPROT;
18608 + mem->card_start = (offset & 0x3fffUL) << 12;
18609 +
18610 + mem->sys_start += CARD_MEM_START;
18611 + mem->sys_stop += CARD_MEM_START;
18612 +
18613 + return 0;
18614 +}
18615 +
18616 +static int pccard_set_mem_map(unsigned int slot, struct pccard_mem_map *mem)
18617 +{
18618 + vrc4171_socket_t *socket;
18619 + uint16_t start, stop, offset;
18620 + uint8_t addrwin;
18621 + u_char map;
18622 +
18623 + if (slot >= CARD_MAX_SLOTS ||
18624 + mem == NULL || mem->map >= MEM_MAX_MAPS ||
18625 + mem->sys_start < CARD_MEM_START || mem->sys_start > CARD_MEM_END ||
18626 + mem->sys_stop < CARD_MEM_START || mem->sys_stop > CARD_MEM_END ||
18627 + mem->sys_start > mem->sys_stop ||
18628 + mem->card_start > CARD_MAX_MEM_OFFSET ||
18629 + mem->speed > CARD_MAX_MEM_SPEED)
18630 + return -EINVAL;
18631 +
18632 + socket = &vrc4171_sockets[slot];
18633 + map = mem->map;
18634 +
18635 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18636 + if (addrwin & I365_ENA_MEM(map)) {
18637 + addrwin &= ~I365_ENA_MEM(map);
18638 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18639 + }
18640 +
18641 + start = (mem->sys_start >> 12) & 0x3fff;
18642 + if (mem->flags & MAP_16BIT)
18643 + start |= I365_MEM_16BIT;
18644 + exca_write_word(slot, I365_MEM(map)+I365_W_START, start);
18645 +
18646 + stop = (mem->sys_stop >> 12) & 0x3fff;
18647 + switch (mem->speed) {
18648 + case 0:
18649 + break;
18650 + case 1:
18651 + stop |= I365_MEM_WS0;
18652 + break;
18653 + case 2:
18654 + stop |= I365_MEM_WS1;
18655 + break;
18656 + default:
18657 + stop |= I365_MEM_WS0 | I365_MEM_WS1;
18658 + break;
18659 + }
18660 + exca_write_word(slot, I365_MEM(map)+I365_W_STOP, stop);
18661 +
18662 + offset = (mem->card_start >> 12) & 0x3fff;
18663 + if (mem->flags & MAP_ATTRIB)
18664 + offset |= I365_MEM_REG;
18665 + if (mem->flags & MAP_WRPROT)
18666 + offset |= I365_MEM_WRPROT;
18667 + exca_write_word(slot, I365_MEM(map)+I365_W_OFF, offset);
18668 +
18669 + if (mem->flags & MAP_ACTIVE) {
18670 + addrwin |= I365_ENA_MEM(map);
18671 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18672 + }
18673 +
18674 + return 0;
18675 +}
18676 +
18677 +static void pccard_proc_setup(unsigned int slot, struct proc_dir_entry *base)
18678 +{
18679 +}
18680 +
18681 +static struct pccard_operations vrc4171_pccard_operations = {
18682 + .init = pccard_init,
18683 + .suspend = pccard_suspend,
18684 + .register_callback = pccard_register_callback,
18685 + .inquire_socket = pccard_inquire_socket,
18686 + .get_status = pccard_get_status,
18687 + .get_socket = pccard_get_socket,
18688 + .set_socket = pccard_set_socket,
18689 + .get_io_map = pccard_get_io_map,
18690 + .set_io_map = pccard_set_io_map,
18691 + .get_mem_map = pccard_get_mem_map,
18692 + .set_mem_map = pccard_set_mem_map,
18693 + .proc_setup = pccard_proc_setup,
18694 +};
18695 +
18696 +static void pccard_bh(void *data)
18697 +{
18698 + vrc4171_socket_t *socket = (vrc4171_socket_t *)data;
18699 + uint16_t events;
18700 +
18701 + spin_lock_irq(&socket->event_lock);
18702 + events = socket->events;
18703 + socket->events = 0;
18704 + spin_unlock_irq(&socket->event_lock);
18705 +
18706 + if (socket->handler)
18707 + socket->handler(socket->info, events);
18708 +}
18709 +
18710 +static inline uint16_t get_events(int slot)
18711 +{
18712 + uint16_t events = 0;
18713 + uint8_t status, csc;
18714 +
18715 + status = exca_read_byte(slot, I365_STATUS);
18716 + csc = exca_read_byte(slot, I365_CSC);
18717 +
18718 + if (exca_read_byte(slot, I365_INTCTL) & I365_PC_IOCARD) {
18719 + if ((csc & I365_CSC_STSCHG) && (status & I365_CS_STSCHG))
18720 + events |= SS_STSCHG;
18721 + } else {
18722 + if (csc & (I365_CSC_BVD1 | I365_CSC_BVD2)) {
18723 + if (!(status & I365_CS_BVD1))
18724 + events |= SS_BATDEAD;
18725 + else if ((status & (I365_CS_BVD1 | I365_CS_BVD2)) == I365_CS_BVD1)
18726 + events |= SS_BATWARN;
18727 + }
18728 + }
18729 + if ((csc & I365_CSC_READY) && (status & I365_CS_READY))
18730 + events |= SS_READY;
18731 + if ((csc & I365_CSC_DETECT) && ((status & I365_CS_DETECT) == I365_CS_DETECT))
18732 + events |= SS_DETECT;
18733 +
18734 + return events;
18735 +}
18736 +
18737 +static void pccard_status_change(int slot, vrc4171_socket_t *socket)
18738 +{
18739 + uint16_t events;
18740 +
18741 + socket->tq_task.routine = pccard_bh;
18742 + socket->tq_task.data = socket;
18743 +
18744 + events = get_events(slot);
18745 + if (events) {
18746 + spin_lock(&socket->event_lock);
18747 + socket->events |= events;
18748 + spin_unlock(&socket->event_lock);
18749 + schedule_task(&socket->tq_task);
18750 + }
18751 +}
18752 +
18753 +static void pccard_interrupt(int irq, void *dev_id, struct pt_regs *regs)
18754 +{
18755 + vrc4171_socket_t *socket;
18756 + uint16_t status;
18757 +
18758 + status = vrc4171_get_irq_status();
18759 + if (status & IRQ_A) {
18760 + socket = &vrc4171_sockets[CARD_SLOTA];
18761 + if (socket->noprobe == SLOTB_PROBE) {
18762 + if (status & (1 << socket->csc_irq))
18763 + pccard_status_change(CARD_SLOTA, socket);
18764 + }
18765 + }
18766 +
18767 + if (status & IRQ_B) {
18768 + socket = &vrc4171_sockets[CARD_SLOTB];
18769 + if (socket->noprobe == SLOTB_PROBE) {
18770 + if (status & (1 << socket->csc_irq))
18771 + pccard_status_change(CARD_SLOTB, socket);
18772 + }
18773 + }
18774 +}
18775 +
18776 +static inline void reserve_using_irq(int slot)
18777 +{
18778 + unsigned int irq;
18779 +
18780 + irq = exca_read_byte(slot, I365_INTCTL);
18781 + irq &= 0x0f;
18782 + vrc4171_irq_mask &= ~(1 << irq);
18783 +
18784 + irq = exca_read_byte(slot, I365_CSCINT);
18785 + irq = (irq & 0xf0) >> 4;
18786 + vrc4171_irq_mask &= ~(1 << irq);
18787 +}
18788 +
18789 +static int __devinit vrc4171_add_socket(int slot)
18790 +{
18791 + vrc4171_socket_t *socket;
18792 +
18793 + if (slot >= CARD_MAX_SLOTS)
18794 + return -EINVAL;
18795 +
18796 + socket = &vrc4171_sockets[slot];
18797 + if (socket->noprobe != SLOTB_PROBE) {
18798 + uint8_t addrwin;
18799 +
18800 + switch (socket->noprobe) {
18801 + case SLOTB_NOPROBE_MEM:
18802 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18803 + addrwin &= 0x1f;
18804 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18805 + break;
18806 + case SLOTB_NOPROBE_IO:
18807 + addrwin = exca_read_byte(slot, I365_ADDRWIN);
18808 + addrwin &= 0xc0;
18809 + exca_write_byte(slot, I365_ADDRWIN, addrwin);
18810 + break;
18811 + default:
18812 + break;
18813 + }
18814 +
18815 + reserve_using_irq(slot);
18816 +
18817 + return 0;
18818 + }
18819 +
18820 + sprintf(socket->name, "NEC VRC4171 Card Slot %1c", 'A' + slot);
18821 +
18822 + socket->pcmcia_socket = pcmcia_register_socket(slot, &vrc4171_pccard_operations, 1);
18823 + if (socket->pcmcia_socket == NULL)
18824 + return -ENOMEM;
18825 +
18826 + exca_write_byte(slot, I365_ADDRWIN, 0);
18827 +
18828 + exca_write_byte(slot, GLOBAL_CONTROL, 0);
18829 +
18830 + return 0;
18831 +}
18832 +
18833 +static void vrc4171_remove_socket(int slot)
18834 +{
18835 + vrc4171_socket_t *socket;
18836 +
18837 + if (slot >= CARD_MAX_SLOTS)
18838 + return;
18839 +
18840 + socket = &vrc4171_sockets[slot];
18841 +
18842 + if (socket->pcmcia_socket != NULL) {
18843 + pcmcia_unregister_socket(socket->pcmcia_socket);
18844 + socket->pcmcia_socket = NULL;
18845 + }
18846 +}
18847 +
18848 +static int __devinit vrc4171_card_setup(char *options)
18849 +{
18850 + if (options == NULL || *options == '\0')
18851 + return 0;
18852 +
18853 + if (strncmp(options, "irq:", 4) == 0) {
18854 + int irq;
18855 + options += 4;
18856 + irq = simple_strtoul(options, &options, 0);
18857 + if (irq >= 0 && irq < NR_IRQS)
18858 + vrc4171_irq = irq;
18859 +
18860 + if (*options != ',')
18861 + return 0;
18862 + options++;
18863 + }
18864 +
18865 + if (strncmp(options, "slota:", 6) == 0) {
18866 + options += 6;
18867 + if (*options != '\0') {
18868 + if (strncmp(options, "noprobe", 7) == 0) {
18869 + vrc4171_sockets[CARD_SLOTA].noprobe = 1;
18870 + options += 7;
18871 + }
18872 +
18873 + if (*options != ',')
18874 + return 0;
18875 + options++;
18876 + } else
18877 + return 0;
18878 +
18879 + }
18880 +
18881 + if (strncmp(options, "slotb:", 6) == 0) {
18882 + options += 6;
18883 + if (*options != '\0') {
18884 + if (strncmp(options, "pccard", 6) == 0) {
18885 + vrc4171_slotb = SLOTB_IS_PCCARD;
18886 + options += 6;
18887 + } else if (strncmp(options, "cf", 2) == 0) {
18888 + vrc4171_slotb = SLOTB_IS_CF;
18889 + options += 2;
18890 + } else if (strncmp(options, "flashrom", 8) == 0) {
18891 + vrc4171_slotb = SLOTB_IS_FLASHROM;
18892 + options += 8;
18893 + } else if (strncmp(options, "none", 4) == 0) {
18894 + vrc4171_slotb = SLOTB_IS_NONE;
18895 + options += 4;
18896 + }
18897 +
18898 + if (*options != ',')
18899 + return 0;
18900 + options++;
18901 +
18902 + if ( strncmp(options, "memnoprobe", 10) == 0)
18903 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_MEM;
18904 + if ( strncmp(options, "ionoprobe", 9) == 0)
18905 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_IO;
18906 + if ( strncmp(options, "noprobe", 7) == 0)
18907 + vrc4171_sockets[CARD_SLOTB].noprobe = SLOTB_NOPROBE_ALL;
18908 + }
18909 + }
18910 +
18911 + return 0;
18912 +}
18913 +
18914 +__setup("vrc4171_card=", vrc4171_card_setup);
18915 +
18916 +static int __devinit vrc4171_card_init(void)
18917 +{
18918 + int retval, slot;
18919 +
18920 + vrc4171_set_multifunction_pin(vrc4171_slotb);
18921 +
18922 + if (request_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE,
18923 + "NEC VRC4171 Card Controller") == NULL)
18924 + return -EBUSY;
18925 +
18926 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++) {
18927 + if (slot == CARD_SLOTB && vrc4171_slotb == SLOTB_IS_NONE)
18928 + break;
18929 +
18930 + retval = vrc4171_add_socket(slot);
18931 + if (retval != 0)
18932 + return retval;
18933 + }
18934 +
18935 + retval = request_irq(vrc4171_irq, pccard_interrupt, SA_SHIRQ,
18936 + "NEC VRC4171 Card Controller", vrc4171_sockets);
18937 + if (retval < 0) {
18938 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
18939 + vrc4171_remove_socket(slot);
18940 +
18941 + return retval;
18942 + }
18943 +
18944 + printk(KERN_INFO "NEC VRC4171 Card Controller, connected to IRQ %d\n", vrc4171_irq);
18945 +
18946 + return 0;
18947 +}
18948 +
18949 +static void __devexit vrc4171_card_exit(void)
18950 +{
18951 + int slot;
18952 +
18953 + for (slot = 0; slot < CARD_MAX_SLOTS; slot++)
18954 + vrc4171_remove_socket(slot);
18955 +
18956 + release_region(CARD_CONTROLLER_INDEX, CARD_CONTROLLER_SIZE);
18957 +}
18958 +
18959 +module_init(vrc4171_card_init);
18960 +module_exit(vrc4171_card_exit);
18961 diff -Nur linux-2.4.30/drivers/scsi/NCR53C9x.h linux-2.4.30-mips/drivers/scsi/NCR53C9x.h
18962 --- linux-2.4.30/drivers/scsi/NCR53C9x.h 2004-02-18 14:36:31.000000000 +0100
18963 +++ linux-2.4.30-mips/drivers/scsi/NCR53C9x.h 2003-12-15 19:19:51.000000000 +0100
18964 @@ -144,12 +144,7 @@
18965
18966 #ifndef MULTIPLE_PAD_SIZES
18967
18968 -#ifdef CONFIG_CPU_HAS_WB
18969 -#include <asm/wbflush.h>
18970 -#define esp_write(__reg, __val) do{(__reg) = (__val); wbflush();} while(0)
18971 -#else
18972 -#define esp_write(__reg, __val) ((__reg) = (__val))
18973 -#endif
18974 +#define esp_write(__reg, __val) do{(__reg) = (__val); iob();} while(0)
18975 #define esp_read(__reg) (__reg)
18976
18977 struct ESP_regs {
18978 diff -Nur linux-2.4.30/drivers/sound/au1550_i2s.c linux-2.4.30-mips/drivers/sound/au1550_i2s.c
18979 --- linux-2.4.30/drivers/sound/au1550_i2s.c 2005-01-19 15:10:04.000000000 +0100
18980 +++ linux-2.4.30-mips/drivers/sound/au1550_i2s.c 2005-02-08 08:07:50.000000000 +0100
18981 @@ -41,6 +41,7 @@
18982 * 675 Mass Ave, Cambridge, MA 02139, USA.
18983 *
18984 */
18985 +
18986 #include <linux/version.h>
18987 #include <linux/module.h>
18988 #include <linux/string.h>
18989 @@ -62,7 +63,45 @@
18990 #include <asm/uaccess.h>
18991 #include <asm/hardirq.h>
18992 #include <asm/au1000.h>
18993 +
18994 +#if defined(CONFIG_SOC_AU1550)
18995 #include <asm/pb1550.h>
18996 +#endif
18997 +
18998 +#if defined(CONFIG_MIPS_PB1200)
18999 +#define WM8731
19000 +#define WM_MODE_USB
19001 +#include <asm/pb1200.h>
19002 +#endif
19003 +
19004 +#if defined(CONFIG_MIPS_FICMMP)
19005 +#define WM8721
19006 +#define WM_MODE_NORMAL
19007 +#include <asm/ficmmp.h>
19008 +#endif
19009 +
19010 +
19011 +#define WM_VOLUME_MIN 47
19012 +#define WM_VOLUME_SCALE 80
19013 +
19014 +#if defined(WM8731)
19015 + /* OSS interface to the wm i2s.. */
19016 + #define CODEC_NAME "Wolfson WM8731 I2S"
19017 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM | SOUND_MASK_LINE)
19018 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK | SOUND_MASK_MIC)
19019 + #define WM_I2S_RECORD_MASK (SOUND_MASK_MIC | SOUND_MASK_LINE1 | SOUND_MASK_LINE)
19020 +#elif defined(WM8721)
19021 + #define CODEC_NAME "Wolfson WM8721 I2S"
19022 + #define WM_I2S_STEREO_MASK (SOUND_MASK_PCM)
19023 + #define WM_I2S_SUPPORTED_MASK (WM_I2S_STEREO_MASK)
19024 + #define WM_I2S_RECORD_MASK (0)
19025 +#endif
19026 +
19027 +
19028 +#define supported_mixer(FOO) ((FOO >= 0) && \
19029 + (FOO < SOUND_MIXER_NRDEVICES) && \
19030 + WM_I2S_SUPPORTED_MASK & (1<<FOO) )
19031 +
19032 #include <asm/au1xxx_psc.h>
19033 #include <asm/au1xxx_dbdma.h>
19034
19035 @@ -98,13 +137,51 @@
19036 * 0 = no VRA, 1 = use VRA if codec supports it
19037 * The framework is here, but we currently force no VRA.
19038 */
19039 +#if defined(CONFIG_MIPS_PB1200) | defined(CONFIG_MIPS_PB1550)
19040 static int vra = 0;
19041 +#elif defined(CONFIG_MIPS_FICMMP)
19042 +static int vra = 1;
19043 +#endif
19044 +
19045 +#define WM_REG_L_HEADPHONE_OUT 0x02
19046 +#define WM_REG_R_HEADPHONE_OUT 0x03
19047 +#define WM_REG_ANALOGUE_AUDIO_PATH_CTRL 0x04
19048 +#define WM_REG_DIGITAL_AUDIO_PATH_CTRL 0x05
19049 +#define WM_REG_POWER_DOWN_CTRL 0x06
19050 +#define WM_REG_DIGITAL_AUDIO_IF 0x07
19051 +#define WM_REG_SAMPLING_CONTROL 0x08
19052 +#define WM_REG_ACTIVE_CTRL 0x09
19053 +#define WM_REG_RESET 0x0F
19054 +#define WM_SC_SR_96000 (0x7<<2)
19055 +#define WM_SC_SR_88200 (0xF<<2)
19056 +#define WM_SC_SR_48000 (0x0<<2)
19057 +#define WM_SC_SR_44100 (0x8<<2)
19058 +#define WM_SC_SR_32000 (0x6<<2)
19059 +#define WM_SC_SR_8018 (0x9<<2)
19060 +#define WM_SC_SR_8000 (0x1<<2)
19061 +#define WM_SC_MODE_USB 1
19062 +#define WM_SC_MODE_NORMAL 0
19063 +#define WM_SC_BOSR_250FS (0<<1)
19064 +#define WM_SC_BOSR_272FS (1<<1)
19065 +#define WM_SC_BOSR_256FS (0<<1)
19066 +#define WM_SC_BOSR_128FS (0<<1)
19067 +#define WM_SC_BOSR_384FS (1<<1)
19068 +#define WM_SC_BOSR_192FS (1<<1)
19069 +
19070 +#define WS_64FS 31
19071 +#define WS_96FS 47
19072 +#define WS_128FS 63
19073 +#define WS_192FS 95
19074 +
19075 +#define MIN_Q_COUNT 2
19076 +
19077 MODULE_PARM(vra, "i");
19078 MODULE_PARM_DESC(vra, "if 1 use VRA if codec supports it");
19079
19080 static struct au1550_state {
19081 /* soundcore stuff */
19082 int dev_audio;
19083 + int dev_mixer;
19084
19085 spinlock_t lock;
19086 struct semaphore open_sem;
19087 @@ -114,6 +191,11 @@
19088 int no_vra;
19089 volatile psc_i2s_t *psc_addr;
19090
19091 + int level_line;
19092 + int level_mic;
19093 + int level_left;
19094 + int level_right;
19095 +
19096 struct dmabuf {
19097 u32 dmanr;
19098 unsigned sample_rate;
19099 @@ -195,60 +277,224 @@
19100 }
19101 }
19102
19103 -/* Just a place holder. The Wolfson codec is a write only device,
19104 - * so we would have to keep a local copy of the data.
19105 - */
19106 -#if 0
19107 -static u8
19108 -rdcodec(u8 addr)
19109 -{
19110 - return 0 /* data */;
19111 -}
19112 -#endif
19113 -
19114 -
19115 static void
19116 -wrcodec(u8 ctlreg, u8 val)
19117 +wrcodec(u8 ctlreg, u16 val)
19118 {
19119 int rcnt;
19120 extern int pb1550_wm_codec_write(u8 addr, u8 reg, u8 val);
19121 -
19122 /* The codec is a write only device, with a 16-bit control/data
19123 * word. Although it is written as two bytes on the I2C, the
19124 * format is actually 7 bits of register and 9 bits of data.
19125 * The ls bit of the first byte is the ms bit of the data.
19126 */
19127 rcnt = 0;
19128 - while ((pb1550_wm_codec_write((0x36 >> 1), ctlreg, val) != 1)
19129 - && (rcnt < 50)) {
19130 + while ((pb1550_wm_codec_write((0x36 >> 1),
19131 + (ctlreg << 1) | ((val >> 8) & 0x01),
19132 + (u8) (val & 0x00FF)) != 1) &&
19133 + (rcnt < 50)) {
19134 rcnt++;
19135 -#if 0
19136 - printk("Codec write retry %02x %02x\n", ctlreg, val);
19137 -#endif
19138 }
19139 +
19140 + au1550_delay(10);
19141 +}
19142 +
19143 +static int
19144 +au1550_open_mixdev(struct inode *inode, struct file *file)
19145 +{
19146 + file->private_data = &au1550_state;
19147 + return 0;
19148 +}
19149 +
19150 +static int
19151 +au1550_release_mixdev(struct inode *inode, struct file *file)
19152 +{
19153 + return 0;
19154 +}
19155 +
19156 +static int wm_i2s_read_mixer(struct au1550_state *s, int oss_channel)
19157 +{
19158 + int ret = 0;
19159 +
19160 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
19161 + /* nice stereo mixers .. */
19162 +
19163 + ret = s->level_left | (s->level_right << 8);
19164 + } else if (oss_channel == SOUND_MIXER_MIC) {
19165 + ret = 0;
19166 + /* TODO: Implement read mixer for input/output codecs */
19167 + }
19168 +
19169 + return ret;
19170 }
19171
19172 +static void wm_i2s_write_mixer(struct au1550_state *s, int oss_channel, unsigned int left, unsigned int right)
19173 +{
19174 + if (WM_I2S_STEREO_MASK & (1 << oss_channel)) {
19175 + /* stereo mixers */
19176 + s->level_left = left;
19177 + s->level_right = right;
19178 +
19179 + right = (right * WM_VOLUME_SCALE) / 100;
19180 + left = (left * WM_VOLUME_SCALE) / 100;
19181 + if (right > WM_VOLUME_SCALE)
19182 + right = WM_VOLUME_SCALE;
19183 + if (left > WM_VOLUME_SCALE)
19184 + left = WM_VOLUME_SCALE;
19185 +
19186 + right += WM_VOLUME_MIN;
19187 + left += WM_VOLUME_MIN;
19188 +
19189 + wrcodec(WM_REG_L_HEADPHONE_OUT, left);
19190 + wrcodec(WM_REG_R_HEADPHONE_OUT, right);
19191 +
19192 + }else if (oss_channel == SOUND_MIXER_MIC) {
19193 + /* TODO: implement write mixer for input/output codecs */
19194 + }
19195 +}
19196 +
19197 +/* a thin wrapper for write_mixer */
19198 +static void wm_i2s_set_mixer(struct au1550_state *s, unsigned int oss_mixer, unsigned int val )
19199 +{
19200 + unsigned int left,right;
19201 +
19202 + /* cleanse input a little */
19203 + right = ((val >> 8) & 0xff) ;
19204 + left = (val & 0xff) ;
19205 +
19206 + if (right > 100) right = 100;
19207 + if (left > 100) left = 100;
19208 +
19209 + wm_i2s_write_mixer(s, oss_mixer, left, right);
19210 +}
19211 +
19212 +static int
19213 +au1550_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
19214 +{
19215 + struct au1550_state *s = (struct au1550_state *)file->private_data;
19216 +
19217 + int i, val = 0;
19218 +
19219 + if (cmd == SOUND_MIXER_INFO) {
19220 + mixer_info info;
19221 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
19222 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
19223 + info.modify_counter = 0;
19224 + if (copy_to_user((void *)arg, &info, sizeof(info)))
19225 + return -EFAULT;
19226 + return 0;
19227 + }
19228 + if (cmd == SOUND_OLD_MIXER_INFO) {
19229 + _old_mixer_info info;
19230 + strncpy(info.id, CODEC_NAME, sizeof(info.id));
19231 + strncpy(info.name, CODEC_NAME, sizeof(info.name));
19232 + if (copy_to_user((void *)arg, &info, sizeof(info)))
19233 + return -EFAULT;
19234 + return 0;
19235 + }
19236 +
19237 + if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
19238 + return -EINVAL;
19239 +
19240 + if (cmd == OSS_GETVERSION)
19241 + return put_user(SOUND_VERSION, (int *)arg);
19242 +
19243 + if (_SIOC_DIR(cmd) == _SIOC_READ) {
19244 + switch (_IOC_NR(cmd)) {
19245 + case SOUND_MIXER_RECSRC: /* give them the current record src */
19246 + val = 0;
19247 + /*
19248 + if (!codec->recmask_io) {
19249 + val = 0;
19250 + } else {
19251 + val = codec->recmask_io(codec, 1, 0);
19252 + }*/
19253 + break;
19254 +
19255 + case SOUND_MIXER_DEVMASK: /* give them the supported mixers */
19256 + val = WM_I2S_SUPPORTED_MASK;
19257 + break;
19258 +
19259 + case SOUND_MIXER_RECMASK:
19260 + /* Arg contains a bit for each supported recording
19261 + * source */
19262 + val = WM_I2S_RECORD_MASK;
19263 + break;
19264 +
19265 + case SOUND_MIXER_STEREODEVS:
19266 + /* Mixer channels supporting stereo */
19267 + val = WM_I2S_STEREO_MASK;
19268 + break;
19269 +
19270 + case SOUND_MIXER_CAPS:
19271 + val = SOUND_CAP_EXCL_INPUT;
19272 + break;
19273 +
19274 + default: /* read a specific mixer */
19275 + i = _IOC_NR(cmd);
19276 +
19277 + if (!supported_mixer(i))
19278 + return -EINVAL;
19279 +
19280 + val = wm_i2s_read_mixer(s, i);
19281 + break;
19282 + }
19283 + return put_user(val, (int *)arg);
19284 + }
19285 +
19286 + if (_SIOC_DIR(cmd) == (_SIOC_WRITE|_SIOC_READ)) {
19287 + if (get_user(val, (int *)arg))
19288 + return -EFAULT;
19289 +
19290 + switch (_IOC_NR(cmd)) {
19291 + case SOUND_MIXER_RECSRC:
19292 + /* Arg contains a bit for each recording source */
19293 + if (!WM_I2S_RECORD_MASK)
19294 + return -EINVAL;
19295 + if (!val)
19296 + return 0;
19297 + if (!(val &= WM_I2S_RECORD_MASK))
19298 + return -EINVAL;
19299 +
19300 + return 0;
19301 + default: /* write a specific mixer */
19302 + i = _IOC_NR(cmd);
19303 +
19304 + if (!supported_mixer(i))
19305 + return -EINVAL;
19306 +
19307 + wm_i2s_set_mixer(s, i, val);
19308 +
19309 + return 0;
19310 + }
19311 +}
19312 + return -EINVAL;
19313 +}
19314 +
19315 +static loff_t
19316 +au1550_llseek(struct file *file, loff_t offset, int origin)
19317 +{
19318 + return -ESPIPE;
19319 +}
19320 +
19321 +static /*const */ struct file_operations au1550_mixer_fops = {
19322 + owner:THIS_MODULE,
19323 + llseek:au1550_llseek,
19324 + ioctl:au1550_ioctl_mixdev,
19325 + open:au1550_open_mixdev,
19326 + release:au1550_release_mixdev,
19327 +};
19328 +
19329 void
19330 -codec_init(void)
19331 +codec_init(struct au1550_state *s)
19332 {
19333 - wrcodec(0x1e, 0x00); /* Reset */
19334 - au1550_delay(200);
19335 - wrcodec(0x0c, 0x00); /* Power up everything */
19336 - au1550_delay(10);
19337 - wrcodec(0x12, 0x00); /* Deactivate codec */
19338 - au1550_delay(10);
19339 - wrcodec(0x08, 0x10); /* Select DAC outputs to line out */
19340 - au1550_delay(10);
19341 - wrcodec(0x0a, 0x00); /* Disable output mute */
19342 - au1550_delay(10);
19343 - wrcodec(0x05, 0x70); /* lower output volume on headphone */
19344 - au1550_delay(10);
19345 - wrcodec(0x0e, 0x02); /* Set slave, 16-bit, I2S modes */
19346 - au1550_delay(10);
19347 - wrcodec(0x10, 0x01); /* 12MHz (USB), 250fs */
19348 - au1550_delay(10);
19349 - wrcodec(0x12, 0x01); /* Activate codec */
19350 - au1550_delay(10);
19351 + wrcodec(WM_REG_RESET, 0x00); /* Reset */
19352 + wrcodec(WM_REG_POWER_DOWN_CTRL, 0x00); /* Power up everything */
19353 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00); /* Deactivate codec */
19354 + wrcodec(WM_REG_ANALOGUE_AUDIO_PATH_CTRL, 0x10); /* Select DAC outputs to line out */
19355 + wrcodec(WM_REG_DIGITAL_AUDIO_PATH_CTRL, 0x00); /* Disable output mute */
19356 + wm_i2s_write_mixer(s, SOUND_MIXER_PCM, 74, 74);
19357 + wrcodec(WM_REG_DIGITAL_AUDIO_IF, 0x02); /* Set slave, 16-bit, I2S modes */
19358 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01); /* Activate codec */
19359 }
19360
19361 /* stop the ADC before calling */
19362 @@ -256,27 +502,16 @@
19363 set_adc_rate(struct au1550_state *s, unsigned rate)
19364 {
19365 struct dmabuf *adc = &s->dma_adc;
19366 - struct dmabuf *dac = &s->dma_dac;
19367
19368 - if (s->no_vra) {
19369 - /* calc SRC factor
19370 - */
19371 + #if defined(WM_MODE_USB)
19372 adc->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
19373 adc->sample_rate = SAMP_RATE / adc->src_factor;
19374 return;
19375 - }
19376 + #else
19377 + //TODO: Need code for normal mode
19378 + #endif
19379
19380 adc->src_factor = 1;
19381 -
19382 -
19383 -#if 0
19384 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
19385 -
19386 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
19387 -
19388 - adc->sample_rate = rate;
19389 - dac->sample_rate = rate;
19390 -#endif
19391 }
19392
19393 /* stop the DAC before calling */
19394 @@ -284,26 +519,89 @@
19395 set_dac_rate(struct au1550_state *s, unsigned rate)
19396 {
19397 struct dmabuf *dac = &s->dma_dac;
19398 - struct dmabuf *adc = &s->dma_adc;
19399
19400 - if (s->no_vra) {
19401 - /* calc SRC factor
19402 - */
19403 - dac->src_factor = (((SAMP_RATE*2) / rate) + 1) >> 1;
19404 - dac->sample_rate = SAMP_RATE / dac->src_factor;
19405 - return;
19406 + u16 sr, ws, div, bosr, mode;
19407 + volatile psc_i2s_t* ip = (volatile psc_i2s_t *)I2S_PSC_BASE;
19408 + u32 cfg;
19409 +
19410 + #if defined(CONFIG_MIPS_FICMMP)
19411 + rate = ficmmp_set_i2s_sample_rate(rate);
19412 + #endif
19413 +
19414 + switch(rate)
19415 + {
19416 + case 96000:
19417 + sr = WM_SC_SR_96000;
19418 + ws = WS_64FS;
19419 + div = PSC_I2SCFG_DIV2;
19420 + break;
19421 + case 88200:
19422 + sr = WM_SC_SR_88200;
19423 + ws = WS_64FS;
19424 + div = PSC_I2SCFG_DIV2;
19425 + break;
19426 + case 44100:
19427 + sr = WM_SC_SR_44100;
19428 + ws = WS_128FS;
19429 + div = PSC_I2SCFG_DIV2;
19430 + break;
19431 + case 48000:
19432 + sr = WM_SC_SR_48000;
19433 + ws = WS_128FS;
19434 + div = PSC_I2SCFG_DIV2;
19435 + break;
19436 + case 32000:
19437 + sr = WM_SC_SR_32000;
19438 + ws = WS_96FS;
19439 + div = PSC_I2SCFG_DIV4;
19440 + break;
19441 + case 8018:
19442 + sr = WM_SC_SR_8018;
19443 + ws = WS_128FS;
19444 + div = PSC_I2SCFG_DIV2;
19445 + break;
19446 + case 8000:
19447 + default:
19448 + sr = WM_SC_SR_8000;
19449 + ws = WS_96FS;
19450 + div = PSC_I2SCFG_DIV16;
19451 + break;
19452 }
19453
19454 + #if defined(WM_MODE_USB)
19455 + mode = WM_SC_MODE_USB;
19456 + #else
19457 + mode = WM_SC_MODE_NORMAL;
19458 + #endif
19459 +
19460 + bosr = 0;
19461 +
19462 dac->src_factor = 1;
19463 + dac->sample_rate = rate;
19464
19465 -#if 0
19466 - rate = rate > SAMP_RATE ? SAMP_RATE : rate;
19467 + /* Deactivate codec */
19468 + wrcodec(WM_REG_ACTIVE_CTRL, 0x00);
19469
19470 - wrcodec(0, 0); /* I don't yet know what to write here if we vra */
19471 + /* Disable I2S controller */
19472 + ip->psc_i2scfg &= ~PSC_I2SCFG_DE_ENABLE;
19473 + /* Wait for device disabled */
19474 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 1);
19475 +
19476 + cfg = ip->psc_i2scfg;
19477 + /* Clear WS and DIVIDER values */
19478 + cfg &= ~(PSC_I2SCFG_WS_MASK | PSC_I2SCFG_DIV_MASK);
19479 + cfg |= PSC_I2SCFG_WS(ws) | div;
19480 + /* Reconfigure and enable */
19481 + ip->psc_i2scfg = cfg | PSC_I2SCFG_DE_ENABLE;
19482
19483 - adc->sample_rate = rate;
19484 - dac->sample_rate = rate;
19485 -#endif
19486 + /* Wait for device enabled */
19487 + while ((ip->psc_i2sstat & PSC_I2SSTAT_DR) == 0);
19488 +
19489 + /* Set appropriate sampling rate */
19490 + wrcodec(WM_REG_SAMPLING_CONTROL, bosr | mode | sr);
19491 +
19492 + /* Activate codec */
19493 + wrcodec(WM_REG_ACTIVE_CTRL, 0x01);
19494 }
19495
19496 static void
19497 @@ -354,8 +652,7 @@
19498 ip->psc_i2spcr = PSC_I2SPCR_RP;
19499 au_sync();
19500
19501 - /* Wait for Receive Busy to show disabled.
19502 - */
19503 + /* Wait for Receive Busy to show disabled. */
19504 do {
19505 stat = ip->psc_i2sstat;
19506 au_sync();
19507 @@ -463,7 +760,6 @@
19508 if (db->num_channels == 1)
19509 db->cnt_factor *= 2;
19510 db->cnt_factor *= db->src_factor;
19511 -
19512 db->count = 0;
19513 db->dma_qcount = 0;
19514 db->nextIn = db->nextOut = db->rawbuf;
19515 @@ -546,12 +842,13 @@
19516 if (i2s_stat & (PSC_I2SSTAT_TF | PSC_I2SSTAT_TR | PSC_I2SSTAT_TF))
19517 dbg("I2S status = 0x%08x", i2s_stat);
19518 #endif
19519 +
19520 db->dma_qcount--;
19521
19522 if (db->count >= db->fragsize) {
19523 - if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
19524 - db->fragsize) == 0) {
19525 - err("qcount < 2 and no ring room!");
19526 + if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut, db->fragsize) == 0)
19527 + {
19528 + err("qcount < MIN_Q_COUNT and no ring room!");
19529 }
19530 db->nextOut += db->fragsize;
19531 if (db->nextOut >= db->rawbuf + db->dmasize)
19532 @@ -606,65 +903,43 @@
19533
19534 }
19535
19536 -static loff_t
19537 -au1550_llseek(struct file *file, loff_t offset, int origin)
19538 -{
19539 - return -ESPIPE;
19540 -}
19541 -
19542 -
19543 -#if 0
19544 -static int
19545 -au1550_open_mixdev(struct inode *inode, struct file *file)
19546 -{
19547 - file->private_data = &au1550_state;
19548 - return 0;
19549 -}
19550 -
19551 -static int
19552 -au1550_release_mixdev(struct inode *inode, struct file *file)
19553 -{
19554 - return 0;
19555 -}
19556 -
19557 -static int
19558 -mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd,
19559 - unsigned long arg)
19560 -{
19561 - return codec->mixer_ioctl(codec, cmd, arg);
19562 -}
19563 -
19564 -static int
19565 -au1550_ioctl_mixdev(struct inode *inode, struct file *file,
19566 - unsigned int cmd, unsigned long arg)
19567 -{
19568 - struct au1550_state *s = (struct au1550_state *)file->private_data;
19569 - struct ac97_codec *codec = s->codec;
19570 -
19571 - return mixdev_ioctl(codec, cmd, arg);
19572 -}
19573 -
19574 -static /*const */ struct file_operations au1550_mixer_fops = {
19575 - owner:THIS_MODULE,
19576 - llseek:au1550_llseek,
19577 - ioctl:au1550_ioctl_mixdev,
19578 - open:au1550_open_mixdev,
19579 - release:au1550_release_mixdev,
19580 -};
19581 -#endif
19582 -
19583 static int
19584 drain_dac(struct au1550_state *s, int nonblock)
19585 {
19586 unsigned long flags;
19587 int count, tmo;
19588
19589 + struct dmabuf *db = &s->dma_dac;
19590 +
19591 + //DPRINTF();
19592 if (s->dma_dac.mapped || !s->dma_dac.ready || s->dma_dac.stopped)
19593 return 0;
19594
19595 for (;;) {
19596 spin_lock_irqsave(&s->lock, flags);
19597 - count = s->dma_dac.count;
19598 + count = db->count;
19599 +
19600 + /* Pad the ddma buffer with zeros if the amount remaining
19601 + * is not a multiple of fragsize */
19602 + if(count % db->fragsize != 0)
19603 + {
19604 + int pad = db->fragsize - (count % db->fragsize);
19605 + char* bufptr = db->nextIn;
19606 + char* bufend = db->rawbuf + db->dmasize;
19607 +
19608 + if((bufend - bufptr) < pad)
19609 + printk("Error! ddma padding is bigger than available ring space!\n");
19610 + else
19611 + {
19612 + memset((void*)bufptr, 0, pad);
19613 + count += pad;
19614 + db->nextIn += pad;
19615 + db->count += pad;
19616 + if (db->dma_qcount == 0)
19617 + start_dac(s);
19618 + db->dma_qcount++;
19619 + }
19620 + }
19621 spin_unlock_irqrestore(&s->lock, flags);
19622 if (count <= 0)
19623 break;
19624 @@ -672,9 +947,9 @@
19625 break;
19626 if (nonblock)
19627 return -EBUSY;
19628 - tmo = 1000 * count / (s->no_vra ?
19629 - SAMP_RATE : s->dma_dac.sample_rate);
19630 + tmo = 1000 * count / s->dma_dac.sample_rate;
19631 tmo /= s->dma_dac.dma_bytes_per_sample;
19632 +
19633 au1550_delay(tmo);
19634 }
19635 if (signal_pending(current))
19636 @@ -698,8 +973,7 @@
19637 * If interpolating (no VRA), duplicate every audio frame src_factor times.
19638 */
19639 static int
19640 -translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf,
19641 - int dmacount)
19642 +translate_from_user(struct dmabuf *db, char* dmabuf, char* userbuf, int dmacount)
19643 {
19644 int sample, i;
19645 int interp_bytes_per_sample;
19646 @@ -737,11 +1011,12 @@
19647
19648 /* duplicate every audio frame src_factor times
19649 */
19650 - for (i = 0; i < db->src_factor; i++)
19651 + for (i = 0; i < db->src_factor; i++) {
19652 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
19653 + dmabuf += interp_bytes_per_sample;
19654 + }
19655
19656 userbuf += db->user_bytes_per_sample;
19657 - dmabuf += interp_bytes_per_sample;
19658 }
19659
19660 return num_samples * interp_bytes_per_sample;
19661 @@ -996,15 +1271,14 @@
19662 * on the dma queue. If the queue count reaches zero,
19663 * we know the dma has stopped.
19664 */
19665 - while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
19666 + while ((db->dma_qcount < MIN_Q_COUNT) && (db->count >= db->fragsize)) {
19667 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
19668 db->fragsize) == 0) {
19669 - err("qcount < 2 and no ring room!");
19670 + err("qcount < MIN_Q_COUNT and no ring room!");
19671 }
19672 db->nextOut += db->fragsize;
19673 if (db->nextOut >= db->rawbuf + db->dmasize)
19674 db->nextOut -= db->dmasize;
19675 - db->count -= db->fragsize;
19676 db->total_bytes += db->dma_fragsize;
19677 if (db->dma_qcount == 0)
19678 start_dac(s);
19679 @@ -1017,7 +1291,6 @@
19680 buffer += usercnt;
19681 ret += usercnt;
19682 } /* while (count > 0) */
19683 -
19684 out:
19685 up(&s->sem);
19686 out2:
19687 @@ -1371,9 +1644,6 @@
19688 s->dma_dac.cnt_factor;
19689 abinfo.fragstotal = s->dma_dac.numfrag;
19690 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
19691 -#ifdef AU1000_VERBOSE_DEBUG
19692 - dbg("bytes=%d, fragments=%d", abinfo.bytes, abinfo.fragments);
19693 -#endif
19694 return copy_to_user((void *) arg, &abinfo,
19695 sizeof(abinfo)) ? -EFAULT : 0;
19696
19697 @@ -1536,13 +1806,9 @@
19698 case SNDCTL_DSP_SETSYNCRO:
19699 case SOUND_PCM_READ_FILTER:
19700 return -EINVAL;
19701 + default: break;
19702 }
19703 -
19704 -#if 0
19705 - return mixdev_ioctl(s->codec, cmd, arg);
19706 -#else
19707 return 0;
19708 -#endif
19709 }
19710
19711
19712 @@ -1664,15 +1930,15 @@
19713 MODULE_AUTHOR("Advanced Micro Devices (AMD), dan@embeddededge.com");
19714 MODULE_DESCRIPTION("Au1550 Audio Driver");
19715
19716 +#if defined(WM_MODE_USB)
19717 /* Set up an internal clock for the PSC3. This will then get
19718 * driven out of the Au1550 as the master.
19719 */
19720 static void
19721 intclk_setup(void)
19722 {
19723 - uint clk, rate, stat;
19724 -
19725 - /* Wire up Freq4 as a clock for the PSC3.
19726 + uint clk, rate;
19727 + /* Wire up Freq4 as a clock for the PSC.
19728 * We know SMBus uses Freq3.
19729 * By making changes to this rate, plus the word strobe
19730 * size, we can make fine adjustments to the actual data rate.
19731 @@ -1700,11 +1966,17 @@
19732 */
19733 clk = au_readl(SYS_CLKSRC);
19734 au_sync();
19735 +#if defined(CONFIG_SOC_AU1550)
19736 clk &= ~0x01f00000;
19737 clk |= (6 << 22);
19738 +#elif defined(CONFIG_SOC_AU1200)
19739 + clk &= ~0x3e000000;
19740 + clk |= (6 << 27);
19741 +#endif
19742 au_writel(clk, SYS_CLKSRC);
19743 au_sync();
19744 }
19745 +#endif
19746
19747 static int __devinit
19748 au1550_probe(void)
19749 @@ -1724,6 +1996,11 @@
19750 init_MUTEX(&s->open_sem);
19751 spin_lock_init(&s->lock);
19752
19753 + /* CPLD Mux for I2s */
19754 +
19755 +#if defined(CONFIG_MIPS_PB1200)
19756 + bcsr->resets |= BCSR_RESETS_PCS1MUX;
19757 +#endif
19758
19759 s->psc_addr = (volatile psc_i2s_t *)I2S_PSC_BASE;
19760 ip = s->psc_addr;
19761 @@ -1765,9 +2042,8 @@
19762
19763 if ((s->dev_audio = register_sound_dsp(&au1550_audio_fops, -1)) < 0)
19764 goto err_dev1;
19765 -#if 0
19766 - if ((s->codec->dev_mixer =
19767 - register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
19768 +#if 1
19769 + if ((s->dev_mixer = register_sound_mixer(&au1550_mixer_fops, -1)) < 0)
19770 goto err_dev2;
19771 #endif
19772
19773 @@ -1777,7 +2053,6 @@
19774 proc_au1550_dump, NULL);
19775 #endif /* AU1550_DEBUG */
19776
19777 - intclk_setup();
19778
19779 /* The GPIO for the appropriate PSC was configured by the
19780 * board specific start up.
19781 @@ -1786,7 +2061,12 @@
19782 */
19783 ip->psc_ctrl = PSC_CTRL_DISABLE; /* Disable PSC */
19784 au_sync();
19785 +#if defined(WM_MODE_USB)
19786 + intclk_setup();
19787 ip->psc_sel = (PSC_SEL_CLK_INTCLK | PSC_SEL_PS_I2SMODE);
19788 +#else
19789 + ip->psc_sel = (PSC_SEL_CLK_EXTCLK | PSC_SEL_PS_I2SMODE);
19790 +#endif
19791 au_sync();
19792
19793 /* Enable PSC
19794 @@ -1806,42 +2086,18 @@
19795 * Actual I2S mode (first bit delayed by one clock).
19796 * Master mode (We provide the clock from the PSC).
19797 */
19798 - val = PSC_I2SCFG_SET_LEN(16);
19799 -#ifdef TRY_441KHz
19800 - /* This really should be 250, but it appears that all of the
19801 - * PLLs, dividers and so on in the chain shift it. That's the
19802 - * problem with sourceing the clock instead of letting the very
19803 - * stable codec provide it. But, the PSC doesn't appear to want
19804 - * to work in slave mode, so this is what we get. It's not
19805 - * studio quality timing, but it's good enough for listening
19806 - * to mp3s.
19807 - */
19808 - val |= PSC_I2SCFG_SET_WS(252);
19809 -#else
19810 - val |= PSC_I2SCFG_SET_WS(250);
19811 -#endif
19812 - val |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
19813 +
19814 + val = PSC_I2SCFG_SET_LEN(16) | PSC_I2SCFG_WS(WS_128FS) | PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8 | \
19815 PSC_I2SCFG_BI | PSC_I2SCFG_XM;
19816
19817 - ip->psc_i2scfg = val;
19818 - au_sync();
19819 - val |= PSC_I2SCFG_DE_ENABLE;
19820 - ip->psc_i2scfg = val;
19821 - au_sync();
19822 + ip->psc_i2scfg = val | PSC_I2SCFG_DE_ENABLE;
19823
19824 - /* Wait for Device ready.
19825 - */
19826 - do {
19827 - val = ip->psc_i2sstat;
19828 - au_sync();
19829 - } while ((val & PSC_I2SSTAT_DR) == 0);
19830 + set_dac_rate(s, 8000); //Set default rate
19831
19832 - val = ip->psc_i2scfg;
19833 - au_sync();
19834 + codec_init(s);
19835
19836 - codec_init();
19837 + s->no_vra = vra ? 0 : 1;
19838
19839 - s->no_vra = 1;
19840 if (s->no_vra)
19841 info("no VRA, interpolating and decimating");
19842
19843 @@ -1866,6 +2122,8 @@
19844 err_dev2:
19845 unregister_sound_dsp(s->dev_audio);
19846 #endif
19847 + err_dev2:
19848 + unregister_sound_dsp(s->dev_audio);
19849 err_dev1:
19850 au1xxx_dbdma_chan_free(s->dma_adc.dmanr);
19851 err_dma2:
19852 diff -Nur linux-2.4.30/drivers/sound/au1550_psc.c linux-2.4.30-mips/drivers/sound/au1550_psc.c
19853 --- linux-2.4.30/drivers/sound/au1550_psc.c 2005-01-19 15:10:04.000000000 +0100
19854 +++ linux-2.4.30-mips/drivers/sound/au1550_psc.c 2005-01-30 09:01:28.000000000 +0100
19855 @@ -30,6 +30,7 @@
19856 * 675 Mass Ave, Cambridge, MA 02139, USA.
19857 *
19858 */
19859 +
19860 #include <linux/version.h>
19861 #include <linux/module.h>
19862 #include <linux/string.h>
19863 @@ -63,6 +64,14 @@
19864 #include <asm/db1x00.h>
19865 #endif
19866
19867 +#ifdef CONFIG_MIPS_PB1200
19868 +#include <asm/pb1200.h>
19869 +#endif
19870 +
19871 +#ifdef CONFIG_MIPS_DB1200
19872 +#include <asm/db1200.h>
19873 +#endif
19874 +
19875 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
19876
19877 #define AU1550_MODULE_NAME "Au1550 psc audio"
19878 @@ -521,7 +530,14 @@
19879 spin_unlock_irqrestore(&s->lock, flags);
19880 }
19881
19882 -
19883 +/*
19884 + NOTE: The xmit slots cannot be changed on the fly when in full-duplex
19885 + because the AC'97 block must be stopped/started. When using this driver
19886 + in full-duplex (in & out at the same time), the DMA engine will stop if
19887 + you disable the block.
19888 + TODO: change implementation to properly restart adc/dac after setting
19889 + xmit slots.
19890 +*/
19891 static void
19892 set_xmit_slots(int num_channels)
19893 {
19894 @@ -565,6 +581,14 @@
19895 } while ((stat & PSC_AC97STAT_DR) == 0);
19896 }
19897
19898 +/*
19899 + NOTE: The recv slots cannot be changed on the fly when in full-duplex
19900 + because the AC'97 block must be stopped/started. When using this driver
19901 + in full-duplex (in & out at the same time), the DMA engine will stop if
19902 + you disable the block.
19903 + TODO: change implementation to properly restart adc/dac after setting
19904 + recv slots.
19905 +*/
19906 static void
19907 set_recv_slots(int num_channels)
19908 {
19909 @@ -608,7 +632,6 @@
19910
19911 spin_lock_irqsave(&s->lock, flags);
19912
19913 - set_xmit_slots(db->num_channels);
19914 au_writel(PSC_AC97PCR_TC, PSC_AC97PCR);
19915 au_sync();
19916 au_writel(PSC_AC97PCR_TS, PSC_AC97PCR);
19917 @@ -640,7 +663,6 @@
19918 db->nextIn -= db->dmasize;
19919 }
19920
19921 - set_recv_slots(db->num_channels);
19922 au1xxx_dbdma_start(db->dmanr);
19923 au_writel(PSC_AC97PCR_RC, PSC_AC97PCR);
19924 au_sync();
19925 @@ -752,12 +774,16 @@
19926 if (ac97c_stat & (AC97C_XU | AC97C_XO | AC97C_TE))
19927 dbg("AC97C status = 0x%08x", ac97c_stat);
19928 #endif
19929 + /* There is a possiblity that we are getting 1 interrupt for
19930 + multiple descriptors. Use ddma api to find out how many
19931 + completed.
19932 + */
19933 db->dma_qcount--;
19934
19935 if (db->count >= db->fragsize) {
19936 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
19937 db->fragsize) == 0) {
19938 - err("qcount < 2 and no ring room!");
19939 + err("qcount < 2 and no ring room1!");
19940 }
19941 db->nextOut += db->fragsize;
19942 if (db->nextOut >= db->rawbuf + db->dmasize)
19943 @@ -941,11 +967,12 @@
19944
19945 /* duplicate every audio frame src_factor times
19946 */
19947 - for (i = 0; i < db->src_factor; i++)
19948 + for (i = 0; i < db->src_factor; i++) {
19949 memcpy(dmabuf, dmasample, db->dma_bytes_per_sample);
19950 + dmabuf += interp_bytes_per_sample;
19951 + }
19952
19953 userbuf += db->user_bytes_per_sample;
19954 - dmabuf += interp_bytes_per_sample;
19955 }
19956
19957 return num_samples * interp_bytes_per_sample;
19958 @@ -1203,7 +1230,7 @@
19959 while ((db->dma_qcount < 2) && (db->count >= db->fragsize)) {
19960 if (au1xxx_dbdma_put_source(db->dmanr, db->nextOut,
19961 db->fragsize) == 0) {
19962 - err("qcount < 2 and no ring room!");
19963 + err("qcount < 2 and no ring room!0");
19964 }
19965 db->nextOut += db->fragsize;
19966 if (db->nextOut >= db->rawbuf + db->dmasize)
19967 @@ -1481,6 +1508,7 @@
19968 return -EINVAL;
19969 stop_adc(s);
19970 s->dma_adc.num_channels = val;
19971 + set_recv_slots(val);
19972 if ((ret = prog_dmabuf_adc(s)))
19973 return ret;
19974 }
19975 @@ -1538,6 +1566,7 @@
19976 }
19977
19978 s->dma_dac.num_channels = val;
19979 + set_xmit_slots(val);
19980 if ((ret = prog_dmabuf_dac(s)))
19981 return ret;
19982 }
19983 @@ -1832,10 +1861,8 @@
19984 down(&s->open_sem);
19985 }
19986
19987 - stop_dac(s);
19988 - stop_adc(s);
19989 -
19990 if (file->f_mode & FMODE_READ) {
19991 + stop_adc(s);
19992 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags =
19993 s->dma_adc.subdivision = s->dma_adc.total_bytes = 0;
19994 s->dma_adc.num_channels = 1;
19995 @@ -1846,6 +1873,7 @@
19996 }
19997
19998 if (file->f_mode & FMODE_WRITE) {
19999 + stop_dac(s);
20000 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags =
20001 s->dma_dac.subdivision = s->dma_dac.total_bytes = 0;
20002 s->dma_dac.num_channels = 1;
20003 @@ -2091,6 +2119,9 @@
20004 ac97_read_proc, &s->codec);
20005 #endif
20006
20007 + set_xmit_slots(1);
20008 + set_recv_slots(1);
20009 +
20010 return 0;
20011
20012 err_dev3:
20013 diff -Nur linux-2.4.30/drivers/tc/lk201.c linux-2.4.30-mips/drivers/tc/lk201.c
20014 --- linux-2.4.30/drivers/tc/lk201.c 2004-02-18 14:36:31.000000000 +0100
20015 +++ linux-2.4.30-mips/drivers/tc/lk201.c 2004-09-28 02:53:04.000000000 +0200
20016 @@ -5,7 +5,7 @@
20017 * for more details.
20018 *
20019 * Copyright (C) 1999-2002 Harald Koerfgen <hkoerfg@web.de>
20020 - * Copyright (C) 2001, 2002, 2003 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
20021 + * Copyright (C) 2001, 2002, 2003, 2004 Maciej W. Rozycki
20022 */
20023
20024 #include <linux/config.h>
20025 @@ -23,8 +23,8 @@
20026 #include <asm/keyboard.h>
20027 #include <asm/dec/tc.h>
20028 #include <asm/dec/machtype.h>
20029 +#include <asm/dec/serial.h>
20030
20031 -#include "zs.h"
20032 #include "lk201.h"
20033
20034 /*
20035 @@ -55,19 +55,20 @@
20036 unsigned char kbd_sysrq_key = -1;
20037 #endif
20038
20039 -#define KEYB_LINE 3
20040 +#define KEYB_LINE_ZS 3
20041 +#define KEYB_LINE_DZ 0
20042
20043 -static int __init lk201_init(struct dec_serial *);
20044 -static void __init lk201_info(struct dec_serial *);
20045 -static void lk201_kbd_rx_char(unsigned char, unsigned char);
20046 +static int __init lk201_init(void *);
20047 +static void __init lk201_info(void *);
20048 +static void lk201_rx_char(unsigned char, unsigned char);
20049
20050 -struct zs_hook lk201_kbdhook = {
20051 +static struct dec_serial_hook lk201_hook = {
20052 .init_channel = lk201_init,
20053 .init_info = lk201_info,
20054 .rx_char = NULL,
20055 .poll_rx_char = NULL,
20056 .poll_tx_char = NULL,
20057 - .cflags = B4800 | CS8 | CSTOPB | CLOCAL
20058 + .cflags = B4800 | CS8 | CSTOPB | CLOCAL,
20059 };
20060
20061 /*
20062 @@ -93,28 +94,28 @@
20063 LK_CMD_ENB_BELL, LK_PARAM_VOLUME(4),
20064 };
20065
20066 -static struct dec_serial* lk201kbd_info;
20067 +static void *lk201_handle;
20068
20069 -static int lk201_send(struct dec_serial *info, unsigned char ch)
20070 +static int lk201_send(unsigned char ch)
20071 {
20072 - if (info->hook->poll_tx_char(info, ch)) {
20073 + if (lk201_hook.poll_tx_char(lk201_handle, ch)) {
20074 printk(KERN_ERR "lk201: transmit timeout\n");
20075 return -EIO;
20076 }
20077 return 0;
20078 }
20079
20080 -static inline int lk201_get_id(struct dec_serial *info)
20081 +static inline int lk201_get_id(void)
20082 {
20083 - return lk201_send(info, LK_CMD_REQ_ID);
20084 + return lk201_send(LK_CMD_REQ_ID);
20085 }
20086
20087 -static int lk201_reset(struct dec_serial *info)
20088 +static int lk201_reset(void)
20089 {
20090 int i, r;
20091
20092 for (i = 0; i < sizeof(lk201_reset_string); i++) {
20093 - r = lk201_send(info, lk201_reset_string[i]);
20094 + r = lk201_send(lk201_reset_string[i]);
20095 if (r < 0)
20096 return r;
20097 }
20098 @@ -203,24 +204,26 @@
20099
20100 static int write_kbd_rate(struct kbd_repeat *rep)
20101 {
20102 - struct dec_serial* info = lk201kbd_info;
20103 int delay, rate;
20104 int i;
20105
20106 delay = rep->delay / 5;
20107 rate = rep->rate;
20108 for (i = 0; i < 4; i++) {
20109 - if (info->hook->poll_tx_char(info, LK_CMD_RPT_RATE(i)))
20110 + if (lk201_hook.poll_tx_char(lk201_handle,
20111 + LK_CMD_RPT_RATE(i)))
20112 return 1;
20113 - if (info->hook->poll_tx_char(info, LK_PARAM_DELAY(delay)))
20114 + if (lk201_hook.poll_tx_char(lk201_handle,
20115 + LK_PARAM_DELAY(delay)))
20116 return 1;
20117 - if (info->hook->poll_tx_char(info, LK_PARAM_RATE(rate)))
20118 + if (lk201_hook.poll_tx_char(lk201_handle,
20119 + LK_PARAM_RATE(rate)))
20120 return 1;
20121 }
20122 return 0;
20123 }
20124
20125 -static int lk201kbd_rate(struct kbd_repeat *rep)
20126 +static int lk201_kbd_rate(struct kbd_repeat *rep)
20127 {
20128 if (rep == NULL)
20129 return -EINVAL;
20130 @@ -237,10 +240,8 @@
20131 return 0;
20132 }
20133
20134 -static void lk201kd_mksound(unsigned int hz, unsigned int ticks)
20135 +static void lk201_kd_mksound(unsigned int hz, unsigned int ticks)
20136 {
20137 - struct dec_serial* info = lk201kbd_info;
20138 -
20139 if (!ticks)
20140 return;
20141
20142 @@ -253,20 +254,19 @@
20143 ticks = 7;
20144 ticks = 7 - ticks;
20145
20146 - if (info->hook->poll_tx_char(info, LK_CMD_ENB_BELL))
20147 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_ENB_BELL))
20148 return;
20149 - if (info->hook->poll_tx_char(info, LK_PARAM_VOLUME(ticks)))
20150 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_VOLUME(ticks)))
20151 return;
20152 - if (info->hook->poll_tx_char(info, LK_CMD_BELL))
20153 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_BELL))
20154 return;
20155 }
20156
20157 void kbd_leds(unsigned char leds)
20158 {
20159 - struct dec_serial* info = lk201kbd_info;
20160 unsigned char l = 0;
20161
20162 - if (!info) /* FIXME */
20163 + if (!lk201_handle) /* FIXME */
20164 return;
20165
20166 /* FIXME -- Only Hold and Lock LEDs for now. --macro */
20167 @@ -275,13 +275,13 @@
20168 if (leds & LED_CAP)
20169 l |= LK_LED_LOCK;
20170
20171 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_ON))
20172 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_ON))
20173 return;
20174 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(l)))
20175 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(l)))
20176 return;
20177 - if (info->hook->poll_tx_char(info, LK_CMD_LEDS_OFF))
20178 + if (lk201_hook.poll_tx_char(lk201_handle, LK_CMD_LEDS_OFF))
20179 return;
20180 - if (info->hook->poll_tx_char(info, LK_PARAM_LED_MASK(~l)))
20181 + if (lk201_hook.poll_tx_char(lk201_handle, LK_PARAM_LED_MASK(~l)))
20182 return;
20183 }
20184
20185 @@ -307,7 +307,7 @@
20186 return 0x80;
20187 }
20188
20189 -static void lk201_kbd_rx_char(unsigned char ch, unsigned char stat)
20190 +static void lk201_rx_char(unsigned char ch, unsigned char fl)
20191 {
20192 static unsigned char id[6];
20193 static int id_i;
20194 @@ -316,9 +316,8 @@
20195 static int prev_scancode;
20196 unsigned char c = scancodeRemap[ch];
20197
20198 - if (stat && stat != TTY_OVERRUN) {
20199 - printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n",
20200 - stat);
20201 + if (fl != TTY_NORMAL && fl != TTY_OVERRUN) {
20202 + printk(KERN_ERR "lk201: keyboard receive error: 0x%02x\n", fl);
20203 return;
20204 }
20205
20206 @@ -335,7 +334,7 @@
20207 /* OK, the power-up concluded. */
20208 lk201_report(id);
20209 if (id[2] == LK_STAT_PWRUP_OK)
20210 - lk201_get_id(lk201kbd_info);
20211 + lk201_get_id();
20212 else {
20213 id_i = 0;
20214 printk(KERN_ERR "lk201: keyboard power-up "
20215 @@ -345,7 +344,7 @@
20216 /* We got the ID; report it and start operation. */
20217 id_i = 0;
20218 lk201_id(id);
20219 - lk201_reset(lk201kbd_info);
20220 + lk201_reset();
20221 }
20222 return;
20223 }
20224 @@ -398,29 +397,28 @@
20225 tasklet_schedule(&keyboard_tasklet);
20226 }
20227
20228 -static void __init lk201_info(struct dec_serial *info)
20229 +static void __init lk201_info(void *handle)
20230 {
20231 }
20232
20233 -static int __init lk201_init(struct dec_serial *info)
20234 +static int __init lk201_init(void *handle)
20235 {
20236 /* First install handlers. */
20237 - lk201kbd_info = info;
20238 - kbd_rate = lk201kbd_rate;
20239 - kd_mksound = lk201kd_mksound;
20240 + lk201_handle = handle;
20241 + kbd_rate = lk201_kbd_rate;
20242 + kd_mksound = lk201_kd_mksound;
20243
20244 - info->hook->rx_char = lk201_kbd_rx_char;
20245 + lk201_hook.rx_char = lk201_rx_char;
20246
20247 /* Then just issue a reset -- the handlers will do the rest. */
20248 - lk201_send(info, LK_CMD_POWER_UP);
20249 + lk201_send(LK_CMD_POWER_UP);
20250
20251 return 0;
20252 }
20253
20254 void __init kbd_init_hw(void)
20255 {
20256 - extern int register_zs_hook(unsigned int, struct zs_hook *);
20257 - extern int unregister_zs_hook(unsigned int);
20258 + int keyb_line;
20259
20260 /* Maxine uses LK501 at the Access.Bus. */
20261 if (!LK_IFACE)
20262 @@ -428,19 +426,15 @@
20263
20264 printk(KERN_INFO "lk201: DECstation LK keyboard driver v0.05.\n");
20265
20266 - if (LK_IFACE_ZS) {
20267 - /*
20268 - * kbd_init_hw() is being called before
20269 - * rs_init() so just register the kbd hook
20270 - * and let zs_init do the rest :-)
20271 - */
20272 - if(!register_zs_hook(KEYB_LINE, &lk201_kbdhook))
20273 - unregister_zs_hook(KEYB_LINE);
20274 - } else {
20275 - /*
20276 - * TODO: modify dz.c to allow similar hooks
20277 - * for LK201 handling on DS2100, DS3100, and DS5000/200
20278 - */
20279 - printk(KERN_ERR "lk201: support for DZ11 not yet ready.\n");
20280 - }
20281 + /*
20282 + * kbd_init_hw() is being called before
20283 + * rs_init() so just register the kbd hook
20284 + * and let zs_init do the rest :-)
20285 + */
20286 + if (LK_IFACE_ZS)
20287 + keyb_line = KEYB_LINE_ZS;
20288 + else
20289 + keyb_line = KEYB_LINE_DZ;
20290 + if (!register_dec_serial_hook(keyb_line, &lk201_hook))
20291 + unregister_dec_serial_hook(keyb_line);
20292 }
20293 diff -Nur linux-2.4.30/drivers/tc/zs.c linux-2.4.30-mips/drivers/tc/zs.c
20294 --- linux-2.4.30/drivers/tc/zs.c 2005-01-19 15:10:05.000000000 +0100
20295 +++ linux-2.4.30-mips/drivers/tc/zs.c 2004-12-27 05:13:50.000000000 +0100
20296 @@ -68,6 +68,8 @@
20297 #include <asm/bitops.h>
20298 #include <asm/uaccess.h>
20299 #include <asm/bootinfo.h>
20300 +#include <asm/dec/serial.h>
20301 +
20302 #ifdef CONFIG_DECSTATION
20303 #include <asm/dec/interrupts.h>
20304 #include <asm/dec/machtype.h>
20305 @@ -160,8 +162,8 @@
20306 #ifdef CONFIG_SERIAL_DEC_CONSOLE
20307 static struct console sercons;
20308 #endif
20309 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) \
20310 - && !defined(MODULE)
20311 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20312 + !defined(MODULE)
20313 static unsigned long break_pressed; /* break, really ... */
20314 #endif
20315
20316 @@ -196,7 +198,6 @@
20317 /*
20318 * Debugging.
20319 */
20320 -#undef SERIAL_DEBUG_INTR
20321 #undef SERIAL_DEBUG_OPEN
20322 #undef SERIAL_DEBUG_FLOW
20323 #undef SERIAL_DEBUG_THROTTLE
20324 @@ -221,10 +222,6 @@
20325 static struct termios *serial_termios[NUM_CHANNELS];
20326 static struct termios *serial_termios_locked[NUM_CHANNELS];
20327
20328 -#ifndef MIN
20329 -#define MIN(a,b) ((a) < (b) ? (a) : (b))
20330 -#endif
20331 -
20332 /*
20333 * tmp_buf is used as a temporary buffer by serial_write. We need to
20334 * lock it in case the copy_from_user blocks while swapping in a page,
20335 @@ -386,8 +383,6 @@
20336 * -----------------------------------------------------------------------
20337 */
20338
20339 -static int tty_break; /* Set whenever BREAK condition is detected. */
20340 -
20341 /*
20342 * This routine is used by the interrupt handler to schedule
20343 * processing in the software interrupt portion of the driver.
20344 @@ -414,20 +409,15 @@
20345 if (!tty && (!info->hook || !info->hook->rx_char))
20346 continue;
20347
20348 - if (tty_break) {
20349 - tty_break = 0;
20350 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
20351 - if (info->line == sercons.index) {
20352 - if (!break_pressed) {
20353 - break_pressed = jiffies;
20354 - goto ignore_char;
20355 - }
20356 - break_pressed = 0;
20357 - }
20358 -#endif
20359 + flag = TTY_NORMAL;
20360 + if (info->tty_break) {
20361 + info->tty_break = 0;
20362 flag = TTY_BREAK;
20363 if (info->flags & ZILOG_SAK)
20364 do_SAK(tty);
20365 + /* Ignore the null char got when BREAK is removed. */
20366 + if (ch == 0)
20367 + continue;
20368 } else {
20369 if (stat & Rx_OVR) {
20370 flag = TTY_OVERRUN;
20371 @@ -435,20 +425,22 @@
20372 flag = TTY_FRAME;
20373 } else if (stat & PAR_ERR) {
20374 flag = TTY_PARITY;
20375 - } else
20376 - flag = 0;
20377 - if (flag)
20378 + }
20379 + if (flag != TTY_NORMAL)
20380 /* reset the error indication */
20381 write_zsreg(info->zs_channel, R0, ERR_RES);
20382 }
20383
20384 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
20385 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20386 + !defined(MODULE)
20387 if (break_pressed && info->line == sercons.index) {
20388 - if (ch != 0 &&
20389 - time_before(jiffies, break_pressed + HZ*5)) {
20390 + /* Ignore the null char got when BREAK is removed. */
20391 + if (ch == 0)
20392 + continue;
20393 + if (time_before(jiffies, break_pressed + HZ * 5)) {
20394 handle_sysrq(ch, regs, NULL, NULL);
20395 break_pressed = 0;
20396 - goto ignore_char;
20397 + continue;
20398 }
20399 break_pressed = 0;
20400 }
20401 @@ -459,23 +451,7 @@
20402 return;
20403 }
20404
20405 - if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
20406 - static int flip_buf_ovf;
20407 - ++flip_buf_ovf;
20408 - continue;
20409 - }
20410 - tty->flip.count++;
20411 - {
20412 - static int flip_max_cnt;
20413 - if (flip_max_cnt < tty->flip.count)
20414 - flip_max_cnt = tty->flip.count;
20415 - }
20416 -
20417 - *tty->flip.flag_buf_ptr++ = flag;
20418 - *tty->flip.char_buf_ptr++ = ch;
20419 -#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && !defined(MODULE)
20420 - ignore_char:
20421 -#endif
20422 + tty_insert_flip_char(tty, ch, flag);
20423 }
20424 if (tty)
20425 tty_flip_buffer_push(tty);
20426 @@ -517,11 +493,15 @@
20427 /* Get status from Read Register 0 */
20428 stat = read_zsreg(info->zs_channel, R0);
20429
20430 - if (stat & BRK_ABRT) {
20431 -#ifdef SERIAL_DEBUG_INTR
20432 - printk("handling break....");
20433 + if ((stat & BRK_ABRT) && !(info->read_reg_zero & BRK_ABRT)) {
20434 +#if defined(CONFIG_SERIAL_DEC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) && \
20435 + !defined(MODULE)
20436 + if (info->line == sercons.index) {
20437 + if (!break_pressed)
20438 + break_pressed = jiffies;
20439 + } else
20440 #endif
20441 - tty_break = 1;
20442 + info->tty_break = 1;
20443 }
20444
20445 if (info->zs_channel != info->zs_chan_a) {
20446 @@ -957,7 +937,7 @@
20447 save_flags(flags);
20448 while (1) {
20449 cli();
20450 - c = MIN(count, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20451 + c = min(count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20452 SERIAL_XMIT_SIZE - info->xmit_head));
20453 if (c <= 0)
20454 break;
20455 @@ -965,7 +945,7 @@
20456 if (from_user) {
20457 down(&tmp_buf_sem);
20458 copy_from_user(tmp_buf, buf, c);
20459 - c = MIN(c, MIN(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20460 + c = min(c, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
20461 SERIAL_XMIT_SIZE - info->xmit_head));
20462 memcpy(info->xmit_buf + info->xmit_head, tmp_buf, c);
20463 up(&tmp_buf_sem);
20464 @@ -1282,46 +1262,48 @@
20465 }
20466
20467 switch (cmd) {
20468 - case TIOCMGET:
20469 - error = verify_area(VERIFY_WRITE, (void *) arg,
20470 - sizeof(unsigned int));
20471 - if (error)
20472 - return error;
20473 - return get_modem_info(info, (unsigned int *) arg);
20474 - case TIOCMBIS:
20475 - case TIOCMBIC:
20476 - case TIOCMSET:
20477 - return set_modem_info(info, cmd, (unsigned int *) arg);
20478 - case TIOCGSERIAL:
20479 - error = verify_area(VERIFY_WRITE, (void *) arg,
20480 - sizeof(struct serial_struct));
20481 - if (error)
20482 - return error;
20483 - return get_serial_info(info,
20484 - (struct serial_struct *) arg);
20485 - case TIOCSSERIAL:
20486 - return set_serial_info(info,
20487 - (struct serial_struct *) arg);
20488 - case TIOCSERGETLSR: /* Get line status register */
20489 - error = verify_area(VERIFY_WRITE, (void *) arg,
20490 - sizeof(unsigned int));
20491 - if (error)
20492 - return error;
20493 - else
20494 - return get_lsr_info(info, (unsigned int *) arg);
20495 + case TIOCMGET:
20496 + error = verify_area(VERIFY_WRITE, (void *)arg,
20497 + sizeof(unsigned int));
20498 + if (error)
20499 + return error;
20500 + return get_modem_info(info, (unsigned int *)arg);
20501
20502 - case TIOCSERGSTRUCT:
20503 - error = verify_area(VERIFY_WRITE, (void *) arg,
20504 - sizeof(struct dec_serial));
20505 - if (error)
20506 - return error;
20507 - copy_from_user((struct dec_serial *) arg,
20508 - info, sizeof(struct dec_serial));
20509 - return 0;
20510 + case TIOCMBIS:
20511 + case TIOCMBIC:
20512 + case TIOCMSET:
20513 + return set_modem_info(info, cmd, (unsigned int *)arg);
20514
20515 - default:
20516 - return -ENOIOCTLCMD;
20517 - }
20518 + case TIOCGSERIAL:
20519 + error = verify_area(VERIFY_WRITE, (void *)arg,
20520 + sizeof(struct serial_struct));
20521 + if (error)
20522 + return error;
20523 + return get_serial_info(info, (struct serial_struct *)arg);
20524 +
20525 + case TIOCSSERIAL:
20526 + return set_serial_info(info, (struct serial_struct *)arg);
20527 +
20528 + case TIOCSERGETLSR: /* Get line status register */
20529 + error = verify_area(VERIFY_WRITE, (void *)arg,
20530 + sizeof(unsigned int));
20531 + if (error)
20532 + return error;
20533 + else
20534 + return get_lsr_info(info, (unsigned int *)arg);
20535 +
20536 + case TIOCSERGSTRUCT:
20537 + error = verify_area(VERIFY_WRITE, (void *)arg,
20538 + sizeof(struct dec_serial));
20539 + if (error)
20540 + return error;
20541 + copy_from_user((struct dec_serial *)arg, info,
20542 + sizeof(struct dec_serial));
20543 + return 0;
20544 +
20545 + default:
20546 + return -ENOIOCTLCMD;
20547 + }
20548 return 0;
20549 }
20550
20551 @@ -1446,7 +1428,8 @@
20552 static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
20553 {
20554 struct dec_serial *info = (struct dec_serial *) tty->driver_data;
20555 - unsigned long orig_jiffies, char_time;
20556 + unsigned long orig_jiffies;
20557 + int char_time;
20558
20559 if (serial_paranoia_check(info, tty->device, "rs_wait_until_sent"))
20560 return;
20561 @@ -1462,7 +1445,7 @@
20562 if (char_time == 0)
20563 char_time = 1;
20564 if (timeout)
20565 - char_time = MIN(char_time, timeout);
20566 + char_time = min(char_time, timeout);
20567 while ((read_zsreg(info->zs_channel, 1) & Tx_BUF_EMP) == 0) {
20568 current->state = TASK_INTERRUPTIBLE;
20569 schedule_timeout(char_time);
20570 @@ -1714,7 +1697,7 @@
20571
20572 static void __init show_serial_version(void)
20573 {
20574 - printk("DECstation Z8530 serial driver version 0.08\n");
20575 + printk("DECstation Z8530 serial driver version 0.09\n");
20576 }
20577
20578 /* Initialize Z8530s zs_channels
20579 @@ -1994,8 +1977,9 @@
20580 * polling I/O routines
20581 */
20582 static int
20583 -zs_poll_tx_char(struct dec_serial *info, unsigned char ch)
20584 +zs_poll_tx_char(void *handle, unsigned char ch)
20585 {
20586 + struct dec_serial *info = handle;
20587 struct dec_zschannel *chan = info->zs_channel;
20588 int ret;
20589
20590 @@ -2017,8 +2001,9 @@
20591 }
20592
20593 static int
20594 -zs_poll_rx_char(struct dec_serial *info)
20595 +zs_poll_rx_char(void *handle)
20596 {
20597 + struct dec_serial *info = handle;
20598 struct dec_zschannel *chan = info->zs_channel;
20599 int ret;
20600
20601 @@ -2038,12 +2023,13 @@
20602 return -ENODEV;
20603 }
20604
20605 -unsigned int register_zs_hook(unsigned int channel, struct zs_hook *hook)
20606 +int register_zs_hook(unsigned int channel, struct dec_serial_hook *hook)
20607 {
20608 struct dec_serial *info = &zs_soft[channel];
20609
20610 if (info->hook) {
20611 - printk(__FUNCTION__": line %d has already a hook registered\n", channel);
20612 + printk("%s: line %d has already a hook registered\n",
20613 + __FUNCTION__, channel);
20614
20615 return 0;
20616 } else {
20617 @@ -2055,7 +2041,7 @@
20618 }
20619 }
20620
20621 -unsigned int unregister_zs_hook(unsigned int channel)
20622 +int unregister_zs_hook(unsigned int channel)
20623 {
20624 struct dec_serial *info = &zs_soft[channel];
20625
20626 @@ -2063,8 +2049,8 @@
20627 info->hook = NULL;
20628 return 1;
20629 } else {
20630 - printk(__FUNCTION__": trying to unregister hook on line %d,"
20631 - " but none is registered\n", channel);
20632 + printk("%s: trying to unregister hook on line %d,"
20633 + " but none is registered\n", __FUNCTION__, channel);
20634 return 0;
20635 }
20636 }
20637 @@ -2319,22 +2305,23 @@
20638 write_zsreg(chan, 9, nine);
20639 }
20640
20641 -static int kgdbhook_init_channel(struct dec_serial* info)
20642 +static int kgdbhook_init_channel(void *handle)
20643 {
20644 return 0;
20645 }
20646
20647 -static void kgdbhook_init_info(struct dec_serial* info)
20648 +static void kgdbhook_init_info(void *handle)
20649 {
20650 }
20651
20652 -static void kgdbhook_rx_char(struct dec_serial* info,
20653 - unsigned char ch, unsigned char stat)
20654 +static void kgdbhook_rx_char(void *handle, unsigned char ch, unsigned char fl)
20655 {
20656 + struct dec_serial *info = handle;
20657 +
20658 + if (fl != TTY_NORMAL)
20659 + return;
20660 if (ch == 0x03 || ch == '$')
20661 breakpoint();
20662 - if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
20663 - write_zsreg(info->zs_channel, 0, ERR_RES);
20664 }
20665
20666 /* This sets up the serial port we're using, and turns on
20667 @@ -2360,11 +2347,11 @@
20668 * for /dev/ttyb which is determined in setup_arch() from the
20669 * boot command line flags.
20670 */
20671 -struct zs_hook zs_kgdbhook = {
20672 - init_channel : kgdbhook_init_channel,
20673 - init_info : kgdbhook_init_info,
20674 - cflags : B38400|CS8|CLOCAL,
20675 - rx_char : kgdbhook_rx_char,
20676 +struct dec_serial_hook zs_kgdbhook = {
20677 + .init_channel = kgdbhook_init_channel,
20678 + .init_info = kgdbhook_init_info,
20679 + .rx_char = kgdbhook_rx_char,
20680 + .cflags = B38400 | CS8 | CLOCAL,
20681 }
20682
20683 void __init zs_kgdb_hook(int tty_num)
20684 diff -Nur linux-2.4.30/drivers/tc/zs.h linux-2.4.30-mips/drivers/tc/zs.h
20685 --- linux-2.4.30/drivers/tc/zs.h 2004-02-18 14:36:31.000000000 +0100
20686 +++ linux-2.4.30-mips/drivers/tc/zs.h 2004-07-01 15:28:54.000000000 +0200
20687 @@ -1,14 +1,18 @@
20688 /*
20689 - * macserial.h: Definitions for the Macintosh Z8530 serial driver.
20690 + * drivers/tc/zs.h: Definitions for the DECstation Z85C30 serial driver.
20691 *
20692 * Adapted from drivers/sbus/char/sunserial.h by Paul Mackerras.
20693 + * Adapted from drivers/macintosh/macserial.h by Harald Koerfgen.
20694 *
20695 * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
20696 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
20697 + * Copyright (C) 2004 Maciej W. Rozycki
20698 */
20699 #ifndef _DECSERIAL_H
20700 #define _DECSERIAL_H
20701
20702 +#include <asm/dec/serial.h>
20703 +
20704 #define NUM_ZSREGS 16
20705
20706 struct serial_struct {
20707 @@ -89,63 +93,50 @@
20708 unsigned char curregs[NUM_ZSREGS];
20709 };
20710
20711 -struct dec_serial;
20712 -
20713 -struct zs_hook {
20714 - int (*init_channel)(struct dec_serial* info);
20715 - void (*init_info)(struct dec_serial* info);
20716 - void (*rx_char)(unsigned char ch, unsigned char stat);
20717 - int (*poll_rx_char)(struct dec_serial* info);
20718 - int (*poll_tx_char)(struct dec_serial* info,
20719 - unsigned char ch);
20720 - unsigned cflags;
20721 -};
20722 -
20723 struct dec_serial {
20724 - struct dec_serial *zs_next; /* For IRQ servicing chain */
20725 - struct dec_zschannel *zs_channel; /* Channel registers */
20726 - struct dec_zschannel *zs_chan_a; /* A side registers */
20727 - unsigned char read_reg_zero;
20728 -
20729 - char soft_carrier; /* Use soft carrier on this channel */
20730 - char break_abort; /* Is serial console in, so process brk/abrt */
20731 - struct zs_hook *hook; /* Hook on this channel */
20732 - char is_cons; /* Is this our console. */
20733 - unsigned char tx_active; /* character is being xmitted */
20734 - unsigned char tx_stopped; /* output is suspended */
20735 -
20736 - /* We need to know the current clock divisor
20737 - * to read the bps rate the chip has currently
20738 - * loaded.
20739 + struct dec_serial *zs_next; /* For IRQ servicing chain. */
20740 + struct dec_zschannel *zs_channel; /* Channel registers. */
20741 + struct dec_zschannel *zs_chan_a; /* A side registers. */
20742 + unsigned char read_reg_zero;
20743 +
20744 + struct dec_serial_hook *hook; /* Hook on this channel. */
20745 + int tty_break; /* Set on BREAK condition. */
20746 + int is_cons; /* Is this our console. */
20747 + int tx_active; /* Char is being xmitted. */
20748 + int tx_stopped; /* Output is suspended. */
20749 +
20750 + /*
20751 + * We need to know the current clock divisor
20752 + * to read the bps rate the chip has currently loaded.
20753 */
20754 - unsigned char clk_divisor; /* May be 1, 16, 32, or 64 */
20755 - int zs_baud;
20756 + int clk_divisor; /* May be 1, 16, 32, or 64. */
20757 + int zs_baud;
20758
20759 - char change_needed;
20760 + char change_needed;
20761
20762 int magic;
20763 int baud_base;
20764 int port;
20765 int irq;
20766 - int flags; /* defined in tty.h */
20767 - int type; /* UART type */
20768 + int flags; /* Defined in tty.h. */
20769 + int type; /* UART type. */
20770 struct tty_struct *tty;
20771 int read_status_mask;
20772 int ignore_status_mask;
20773 int timeout;
20774 int xmit_fifo_size;
20775 int custom_divisor;
20776 - int x_char; /* xon/xoff character */
20777 + int x_char; /* XON/XOFF character. */
20778 int close_delay;
20779 unsigned short closing_wait;
20780 unsigned short closing_wait2;
20781 unsigned long event;
20782 unsigned long last_active;
20783 int line;
20784 - int count; /* # of fd on device */
20785 - int blocked_open; /* # of blocked opens */
20786 - long session; /* Session of opening process */
20787 - long pgrp; /* pgrp of opening process */
20788 + int count; /* # of fds on device. */
20789 + int blocked_open; /* # of blocked opens. */
20790 + long session; /* Sess of opening process. */
20791 + long pgrp; /* Pgrp of opening process. */
20792 unsigned char *xmit_buf;
20793 int xmit_head;
20794 int xmit_tail;
20795 diff -Nur linux-2.4.30/drivers/video/Config.in linux-2.4.30-mips/drivers/video/Config.in
20796 --- linux-2.4.30/drivers/video/Config.in 2004-02-18 14:36:31.000000000 +0100
20797 +++ linux-2.4.30-mips/drivers/video/Config.in 2005-02-11 22:16:44.000000000 +0100
20798 @@ -87,8 +87,8 @@
20799 if [ "$CONFIG_HP300" = "y" ]; then
20800 define_bool CONFIG_FB_HP300 y
20801 fi
20802 - if [ "$ARCH" = "alpha" ]; then
20803 - tristate ' TGA framebuffer support' CONFIG_FB_TGA
20804 + if [ "$ARCH" = "alpha" -o "$CONFIG_TC" = "y" ]; then
20805 + tristate ' TGA/SFB+ framebuffer support' CONFIG_FB_TGA
20806 fi
20807 if [ "$CONFIG_X86" = "y" ]; then
20808 bool ' VESA VGA graphics console' CONFIG_FB_VESA
20809 @@ -121,6 +121,17 @@
20810 hex ' Framebuffer Base Address' CONFIG_E1355_FB_BASE a8200000
20811 fi
20812 fi
20813 + if [ "$CONFIG_SOC_AU1100" = "y" ]; then
20814 + bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
20815 + fi
20816 +
20817 + if [ "$CONFIG_SOC_AU1200" = "y" ]; then
20818 + bool ' Au1200 LCD Driver' CONFIG_FB_AU1200
20819 + if [ "$CONFIG_FB_AU1200" = "y" ]; then
20820 + int ' Number of planes (1 to 4)' CONFIG_FB_AU1200_DEVS 1
20821 + fi
20822 + fi
20823 +
20824 if [ "$CONFIG_EXPERIMENTAL" = "y" ]; then
20825 if [ "$CONFIG_PCI" != "n" ]; then
20826 tristate ' Matrox acceleration (EXPERIMENTAL)' CONFIG_FB_MATROX
20827 @@ -178,9 +189,6 @@
20828 bool ' Use CRT on Pb1100 ' CONFIG_PB1500_CRT
20829 bool ' Use TFT Panel on Pb1100 ' CONFIG_PB1500_TFT
20830 fi
20831 - if [ "$CONFIG_SOC_AU1100" = "y" ]; then
20832 - bool ' Au1100 LCD Driver' CONFIG_FB_AU1100
20833 - fi
20834 fi
20835 fi
20836 fi
20837 diff -Nur linux-2.4.30/drivers/video/Makefile linux-2.4.30-mips/drivers/video/Makefile
20838 --- linux-2.4.30/drivers/video/Makefile 2004-02-18 14:36:31.000000000 +0100
20839 +++ linux-2.4.30-mips/drivers/video/Makefile 2005-02-11 22:16:44.000000000 +0100
20840 @@ -87,6 +87,7 @@
20841 obj-$(CONFIG_FB_MAXINE) += maxinefb.o
20842 obj-$(CONFIG_FB_TX3912) += tx3912fb.o
20843 obj-$(CONFIG_FB_AU1100) += au1100fb.o fbgen.o
20844 +obj-$(CONFIG_FB_AU1200) += au1200fb.o fbgen.o
20845 obj-$(CONFIG_FB_IT8181) += it8181fb.o fbgen.o
20846
20847 subdir-$(CONFIG_STI_CONSOLE) += sti
20848 diff -Nur linux-2.4.30/drivers/video/au1200fb.c linux-2.4.30-mips/drivers/video/au1200fb.c
20849 --- linux-2.4.30/drivers/video/au1200fb.c 1970-01-01 01:00:00.000000000 +0100
20850 +++ linux-2.4.30-mips/drivers/video/au1200fb.c 2005-03-13 09:04:16.000000000 +0100
20851 @@ -0,0 +1,1564 @@
20852 +/*
20853 + * BRIEF MODULE DESCRIPTION
20854 + * Au1200 LCD Driver.
20855 + *
20856 + * Copyright 2004 AMD
20857 + * Author: AMD
20858 + *
20859 + * Based on:
20860 + * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
20861 + * Created 28 Dec 1997 by Geert Uytterhoeven
20862 + *
20863 + * This program is free software; you can redistribute it and/or modify it
20864 + * under the terms of the GNU General Public License as published by the
20865 + * Free Software Foundation; either version 2 of the License, or (at your
20866 + * option) any later version.
20867 + *
20868 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
20869 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20870 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20871 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20872 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20873 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20874 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20875 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20876 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20877 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
20878 + *
20879 + * You should have received a copy of the GNU General Public License along
20880 + * with this program; if not, write to the Free Software Foundation, Inc.,
20881 + * 675 Mass Ave, Cambridge, MA 02139, USA.
20882 + */
20883 +
20884 +#include <linux/module.h>
20885 +#include <linux/kernel.h>
20886 +#include <linux/errno.h>
20887 +#include <linux/string.h>
20888 +#include <linux/mm.h>
20889 +#include <linux/tty.h>
20890 +#include <linux/slab.h>
20891 +#include <linux/delay.h>
20892 +#include <linux/fb.h>
20893 +#include <linux/init.h>
20894 +#include <asm/uaccess.h>
20895 +
20896 +#include <asm/au1000.h>
20897 +#include <asm/au1xxx_gpio.h>
20898 +#include "au1200fb.h"
20899 +
20900 +#include <video/fbcon.h>
20901 +#include <video/fbcon-cfb16.h>
20902 +#include <video/fbcon-cfb32.h>
20903 +#define CMAPSIZE 16
20904 +
20905 +#define AU1200_LCD_GET_WINENABLE 1
20906 +#define AU1200_LCD_SET_WINENABLE 2
20907 +#define AU1200_LCD_GET_WINLOCATION 3
20908 +#define AU1200_LCD_SET_WINLOCATION 4
20909 +#define AU1200_LCD_GET_WINSIZE 5
20910 +#define AU1200_LCD_SET_WINSIZE 6
20911 +#define AU1200_LCD_GET_BACKCOLOR 7
20912 +#define AU1200_LCD_SET_BACKCOLOR 8
20913 +#define AU1200_LCD_GET_COLORKEY 9
20914 +#define AU1200_LCD_SET_COLORKEY 10
20915 +#define AU1200_LCD_GET_PANEL 11
20916 +#define AU1200_LCD_SET_PANEL 12
20917 +
20918 +typedef struct au1200_lcd_getset_t
20919 +{
20920 + unsigned int subcmd;
20921 + union {
20922 + struct {
20923 + int enable;
20924 + } winenable;
20925 + struct {
20926 + int x, y;
20927 + } winlocation;
20928 + struct {
20929 + int hsz, vsz;
20930 + } winsize;
20931 + struct {
20932 + unsigned int color;
20933 + } backcolor;
20934 + struct {
20935 + unsigned int key;
20936 + unsigned int mask;
20937 + } colorkey;
20938 + struct {
20939 + int panel;
20940 + char desc[80];
20941 + } panel;
20942 + };
20943 +} au1200_lcd_getset_t;
20944 +
20945 +AU1200_LCD *lcd = (AU1200_LCD *)AU1200_LCD_ADDR;
20946 +static int window_index = 0; /* default is zero */
20947 +static int panel_index = -1; /* default is call board_au1200fb_panel */
20948 +
20949 +struct window_settings
20950 +{
20951 + unsigned char name[64];
20952 + uint32 mode_backcolor;
20953 + uint32 mode_colorkey;
20954 + uint32 mode_colorkeymsk;
20955 + struct
20956 + {
20957 + int xres;
20958 + int yres;
20959 + int xpos;
20960 + int ypos;
20961 + uint32 mode_winctrl1; /* winctrl1[FRM,CCO,PO,PIPE] */
20962 + uint32 mode_winenable;
20963 + } w[4];
20964 +};
20965 +
20966 +struct panel_settings
20967 +{
20968 + unsigned char name[64];
20969 + /* panel physical dimensions */
20970 + uint32 Xres;
20971 + uint32 Yres;
20972 + /* panel timings */
20973 + uint32 mode_screen;
20974 + uint32 mode_horztiming;
20975 + uint32 mode_verttiming;
20976 + uint32 mode_clkcontrol;
20977 + uint32 mode_pwmdiv;
20978 + uint32 mode_pwmhi;
20979 + uint32 mode_outmask;
20980 + uint32 mode_fifoctrl;
20981 + uint32 mode_toyclksrc;
20982 + uint32 mode_backlight;
20983 + uint32 mode_auxpll;
20984 + int (*device_init)(void);
20985 + int (*device_shutdown)(void);
20986 +};
20987 +
20988 +#if defined(__BIG_ENDIAN)
20989 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_00
20990 +#else
20991 +#define LCD_WINCTRL1_PO_16BPP LCD_WINCTRL1_PO_01
20992 +#endif
20993 +
20994 +extern int board_au1200fb_panel (void);
20995 +extern int board_au1200fb_panel_init (void);
20996 +extern int board_au1200fb_panel_shutdown (void);
20997 +
20998 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
20999 +extern int board_au1200fb_focus_init_hdtv(void);
21000 +extern int board_au1200fb_focus_init_component(void);
21001 +extern int board_au1200fb_focus_init_cvsv(void);
21002 +extern int board_au1200fb_focus_shutdown(void);
21003 +#endif
21004 +
21005 +/*
21006 + * Default window configurations
21007 + */
21008 +static struct window_settings windows[] =
21009 +{
21010 + { /* Index 0 */
21011 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
21012 + /* mode_backcolor */ 0x006600ff,
21013 + /* mode_colorkey,msk*/ 0, 0,
21014 + {
21015 + {
21016 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21017 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21018 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
21019 + },
21020 + {
21021 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21022 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21023 + /* mode_winenable*/ 0,
21024 + },
21025 + {
21026 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21027 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21028 + /* mode_winenable*/ 0,
21029 + },
21030 + {
21031 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21032 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21033 + /* mode_winenable*/ 0,
21034 + },
21035 + },
21036 + },
21037 +
21038 + { /* Index 1 */
21039 + "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx",
21040 + /* mode_backcolor */ 0x006600ff,
21041 + /* mode_colorkey,msk*/ 0, 0,
21042 + {
21043 + {
21044 + /* xres, yres, xpos, ypos */ 320, 240, 5, 5,
21045 +#if 0
21046 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21047 +#endif
21048 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_24BPP|LCD_WINCTRL1_PO_00,
21049 + /* mode_winenable*/ LCD_WINENABLE_WEN0,
21050 + },
21051 + {
21052 + /* xres, yres, xpos, ypos */ 0, 0, 0, 0,
21053 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP,
21054 + /* mode_winenable*/ 0,
21055 + },
21056 + {
21057 + /* xres, yres, xpos, ypos */ 100, 100, 0, 0,
21058 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21059 + /* mode_winenable*/ 0/*LCD_WINENABLE_WEN2*/,
21060 + },
21061 + {
21062 + /* xres, yres, xpos, ypos */ 200, 25, 0, 0,
21063 + /* mode_winctrl1 */ LCD_WINCTRL1_FRM_16BPP565|LCD_WINCTRL1_PO_16BPP|LCD_WINCTRL1_PIPE,
21064 + /* mode_winenable*/ 0,
21065 + },
21066 + },
21067 + },
21068 + /* Need VGA 640 @ 24bpp, @ 32bpp */
21069 + /* Need VGA 800 @ 24bpp, @ 32bpp */
21070 + /* Need VGA 1024 @ 24bpp, @ 32bpp */
21071 +} ;
21072 +
21073 +/*
21074 + * Controller configurations for various panels.
21075 + */
21076 +static struct panel_settings panels[] =
21077 +{
21078 + { /* Index 0: QVGA 320x240 H:33.3kHz V:110Hz */
21079 + "VGA_320x240",
21080 + 320, 240,
21081 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
21082 + /* mode_horztiming */ 0x00c4623b,
21083 + /* mode_verttiming */ 0x00502814,
21084 + /* mode_clkcontrol */ 0x00020002, /* /4=24Mhz */
21085 + /* mode_pwmdiv */ 0x00000000,
21086 + /* mode_pwmhi */ 0x00000000,
21087 + /* mode_outmask */ 0x00FFFFFF,
21088 + /* mode_fifoctrl */ 0x2f2f2f2f,
21089 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21090 + /* mode_backlight */ 0x00000000,
21091 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21092 + /* device_init */ NULL,
21093 + /* device_shutdown */ NULL,
21094 + },
21095 +
21096 + { /* Index 1: VGA 640x480 H:30.3kHz V:58Hz */
21097 + "VGA_640x480",
21098 + 640, 480,
21099 + /* mode_screen */ 0x13f9df80,
21100 + /* mode_horztiming */ 0x003c5859,
21101 + /* mode_verttiming */ 0x00741201,
21102 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
21103 + /* mode_pwmdiv */ 0x00000000,
21104 + /* mode_pwmhi */ 0x00000000,
21105 + /* mode_outmask */ 0x00FFFFFF,
21106 + /* mode_fifoctrl */ 0x2f2f2f2f,
21107 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21108 + /* mode_backlight */ 0x00000000,
21109 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21110 + /* device_init */ NULL,
21111 + /* device_shutdown */ NULL,
21112 + },
21113 +
21114 + { /* Index 2: SVGA 800x600 H:46.1kHz V:69Hz */
21115 + "SVGA_800x600",
21116 + 800, 600,
21117 + /* mode_screen */ 0x18fa5780,
21118 + /* mode_horztiming */ 0x00dc7e77,
21119 + /* mode_verttiming */ 0x00584805,
21120 + /* mode_clkcontrol */ 0x00020000, /* /2=48Mhz */
21121 + /* mode_pwmdiv */ 0x00000000,
21122 + /* mode_pwmhi */ 0x00000000,
21123 + /* mode_outmask */ 0x00FFFFFF,
21124 + /* mode_fifoctrl */ 0x2f2f2f2f,
21125 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21126 + /* mode_backlight */ 0x00000000,
21127 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21128 + /* device_init */ NULL,
21129 + /* device_shutdown */ NULL,
21130 + },
21131 +
21132 + { /* Index 3: XVGA 1024x768 H:56.2kHz V:70Hz */
21133 + "XVGA_1024x768",
21134 + 1024, 768,
21135 + /* mode_screen */ 0x1ffaff80,
21136 + /* mode_horztiming */ 0x007d0e57,
21137 + /* mode_verttiming */ 0x00740a01,
21138 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
21139 + /* mode_pwmdiv */ 0x00000000,
21140 + /* mode_pwmhi */ 0x00000000,
21141 + /* mode_outmask */ 0x00FFFFFF,
21142 + /* mode_fifoctrl */ 0x2f2f2f2f,
21143 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21144 + /* mode_backlight */ 0x00000000,
21145 + /* mode_auxpll */ 6, /* 72MHz AUXPLL */
21146 + /* device_init */ NULL,
21147 + /* device_shutdown */ NULL,
21148 + },
21149 +
21150 + { /* Index 4: XVGA 1280x1024 H:68.5kHz V:65Hz */
21151 + "XVGA_1280x1024",
21152 + 1280, 1024,
21153 + /* mode_screen */ 0x27fbff80,
21154 + /* mode_horztiming */ 0x00cdb2c7,
21155 + /* mode_verttiming */ 0x00600002,
21156 + /* mode_clkcontrol */ 0x000A0000, /* /1 */
21157 + /* mode_pwmdiv */ 0x00000000,
21158 + /* mode_pwmhi */ 0x00000000,
21159 + /* mode_outmask */ 0x00FFFFFF,
21160 + /* mode_fifoctrl */ 0x2f2f2f2f,
21161 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21162 + /* mode_backlight */ 0x00000000,
21163 + /* mode_auxpll */ 10, /* 120MHz AUXPLL */
21164 + /* device_init */ NULL,
21165 + /* device_shutdown */ NULL,
21166 + },
21167 +
21168 + { /* Index 5: Samsung 1024x768 TFT */
21169 + "Samsung_1024x768_TFT",
21170 + 1024, 768,
21171 + /* mode_screen */ 0x1ffaff80,
21172 + /* mode_horztiming */ 0x018cc677,
21173 + /* mode_verttiming */ 0x00241217,
21174 + /* mode_clkcontrol */ 0x00000000, /* SCB 0x1 /4=24Mhz */
21175 + /* mode_pwmdiv */ 0x8000063f, /* SCB 0x0 */
21176 + /* mode_pwmhi */ 0x03400000, /* SCB 0x0 */
21177 + /* mode_outmask */ 0x00fcfcfc,
21178 + /* mode_fifoctrl */ 0x2f2f2f2f,
21179 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21180 + /* mode_backlight */ 0x00000000,
21181 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21182 + /* device_init */ board_au1200fb_panel_init,
21183 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21184 + },
21185 +
21186 + { /* Index 6: Toshiba 640x480 TFT */
21187 + "Toshiba_640x480_TFT",
21188 + 640, 480,
21189 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21190 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(96) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(51),
21191 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(11) | LCD_VERTTIMING_VND2_N(32) ,
21192 + /* mode_clkcontrol */ 0x00000000, /* /4=24Mhz */
21193 + /* mode_pwmdiv */ 0x8000063f,
21194 + /* mode_pwmhi */ 0x03400000,
21195 + /* mode_outmask */ 0x00fcfcfc,
21196 + /* mode_fifoctrl */ 0x2f2f2f2f,
21197 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21198 + /* mode_backlight */ 0x00000000,
21199 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21200 + /* device_init */ board_au1200fb_panel_init,
21201 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21202 + },
21203 +
21204 + { /* Index 7: Sharp 320x240 TFT */
21205 + "Sharp_320x240_TFT",
21206 + 320, 240,
21207 + /* mode_screen */ LCD_SCREEN_SX_N(320) | LCD_SCREEN_SY_N(240),
21208 + /* mode_horztiming */ LCD_HORZTIMING_HPW_N(60) | LCD_HORZTIMING_HND1_N(13) | LCD_HORZTIMING_HND2_N(2),
21209 + /* mode_verttiming */ LCD_VERTTIMING_VPW_N(2) | LCD_VERTTIMING_VND1_N(2) | LCD_VERTTIMING_VND2_N(5) ,
21210 + /* mode_clkcontrol */ LCD_CLKCONTROL_PCD_N(7), /* /16=6Mhz */
21211 + /* mode_pwmdiv */ 0x8000063f,
21212 + /* mode_pwmhi */ 0x03400000,
21213 + /* mode_outmask */ 0x00fcfcfc,
21214 + /* mode_fifoctrl */ 0x2f2f2f2f,
21215 + /* mode_toyclksrc */ 0x00000004, /* 96MHz AUXPLL directly */
21216 + /* mode_backlight */ 0x00000000,
21217 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21218 + /* device_init */ board_au1200fb_panel_init,
21219 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21220 + },
21221 + { /* Index 8: Toppoly TD070WGCB2 7" 854x480 TFT */
21222 + "Toppoly_TD070WGCB2",
21223 + 854, 480,
21224 + /* mode_screen */ LCD_SCREEN_SX_N(854) | LCD_SCREEN_SY_N(480),
21225 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(44) | LCD_HORZTIMING_HND1_N(44) | LCD_HORZTIMING_HPW_N(114),
21226 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(20) | LCD_VERTTIMING_VND1_N(21) | LCD_VERTTIMING_VPW_N(4),
21227 + /* mode_clkcontrol */ 0x00020001, /* /4=24Mhz */
21228 + /* mode_pwmdiv */ 0x8000063f,
21229 + /* mode_pwmhi */ 0x03400000,
21230 + /* mode_outmask */ 0x00FCFCFC,
21231 + /* mode_fifoctrl */ 0x2f2f2f2f,
21232 + /* mode_toyclksrc */ 0x00000004, /* AUXPLL directly */
21233 + /* mode_backlight */ 0x00000000,
21234 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21235 + /* device_init */ board_au1200fb_panel_init,
21236 + /* device_shutdown */ board_au1200fb_panel_shutdown,
21237 + },
21238 +#if defined(CONFIG_FOCUS_ENHANCEMENTS)
21239 + { /* Index 9: Focus FS453 TV-Out 640x480 */
21240 + "FS453_640x480 (Composite/S-Video)",
21241 + 640, 480,
21242 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21243 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
21244 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
21245 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21246 + /* mode_pwmdiv */ 0x00000000,
21247 + /* mode_pwmhi */ 0x00000000,
21248 + /* mode_outmask */ 0x00FFFFFF,
21249 + /* mode_fifoctrl */ 0x2f2f2f2f,
21250 + /* mode_toyclksrc */ 0x00000000,
21251 + /* mode_backlight */ 0x00000000,
21252 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21253 + /* device_init */ board_au1200fb_focus_init_cvsv,
21254 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21255 + },
21256 +
21257 + { /* Index 10: Focus FS453 TV-Out 640x480 */
21258 + "FS453_640x480 (Component Video)",
21259 + 640, 480,
21260 + /* mode_screen */ LCD_SCREEN_SX_N(640) | LCD_SCREEN_SY_N(480),
21261 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(143) | LCD_HORZTIMING_HND1_N(143) | LCD_HORZTIMING_HPW_N(10),
21262 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(30) | LCD_VERTTIMING_VND1_N(30) | LCD_VERTTIMING_VPW_N(5),
21263 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21264 + /* mode_pwmdiv */ 0x00000000,
21265 + /* mode_pwmhi */ 0x00000000,
21266 + /* mode_outmask */ 0x00FFFFFF,
21267 + /* mode_fifoctrl */ 0x2f2f2f2f,
21268 + /* mode_toyclksrc */ 0x00000000,
21269 + /* mode_backlight */ 0x00000000,
21270 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21271 + /* device_init */ board_au1200fb_focus_init_component,
21272 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21273 + },
21274 +
21275 + { /* Index 11: Focus FS453 TV-Out 640x480 */
21276 + "FS453_640x480 (HDTV)",
21277 + 720, 480,
21278 + /* mode_screen */ LCD_SCREEN_SX_N(720) | LCD_SCREEN_SY_N(480),
21279 + /* mode_horztiming */ LCD_HORZTIMING_HND2_N(28) | LCD_HORZTIMING_HND1_N(46) | LCD_HORZTIMING_HPW_N(64),
21280 + /* mode_verttiming */ LCD_VERTTIMING_VND2_N(7) | LCD_VERTTIMING_VND1_N(31) | LCD_VERTTIMING_VPW_N(7),
21281 + /* mode_clkcontrol */ 0x00480000 | (1<<17) | (1<<18), /* External Clock, 1:1 clock ratio */
21282 + /* mode_pwmdiv */ 0x00000000,
21283 + /* mode_pwmhi */ 0x00000000,
21284 + /* mode_outmask */ 0x00FFFFFF,
21285 + /* mode_fifoctrl */ 0x2f2f2f2f,
21286 + /* mode_toyclksrc */ 0x00000000,
21287 + /* mode_backlight */ 0x00000000,
21288 + /* mode_auxpll */ 8, /* 96MHz AUXPLL */
21289 + /* device_init */ board_au1200fb_focus_init_hdtv,
21290 + /* device_shutdown */ board_au1200fb_focus_shutdown,
21291 + },
21292 +#endif
21293 +};
21294 +
21295 +#define NUM_PANELS (sizeof(panels) / sizeof(struct panel_settings))
21296 +
21297 +static struct window_settings *win;
21298 +static struct panel_settings *panel;
21299 +
21300 +struct au1200fb_info {
21301 + struct fb_info_gen gen;
21302 + unsigned long fb_virt_start;
21303 + unsigned long fb_size;
21304 + unsigned long fb_phys;
21305 + int mmaped;
21306 + int nohwcursor;
21307 + int noblanking;
21308 +
21309 + struct { unsigned red, green, blue, pad; } palette[256];
21310 +
21311 +#if defined(FBCON_HAS_CFB16)
21312 + u16 fbcon_cmap16[16];
21313 +#endif
21314 +#if defined(FBCON_HAS_CFB32)
21315 + u32 fbcon_cmap32[16];
21316 +#endif
21317 +};
21318 +
21319 +
21320 +struct au1200fb_par {
21321 + struct fb_var_screeninfo var;
21322 +
21323 + int line_length; /* in bytes */
21324 + int cmap_len; /* color-map length */
21325 +};
21326 +
21327 +#ifndef CONFIG_FB_AU1200_DEVS
21328 +#define CONFIG_FB_AU1200_DEVS 1
21329 +#endif
21330 +
21331 +static struct au1200fb_info fb_infos[CONFIG_FB_AU1200_DEVS];
21332 +static struct au1200fb_par fb_pars[CONFIG_FB_AU1200_DEVS];
21333 +static struct display disps[CONFIG_FB_AU1200_DEVS];
21334 +
21335 +int au1200fb_init(void);
21336 +void au1200fb_setup(char *options, int *ints);
21337 +static int au1200fb_mmap(struct fb_info *fb, struct file *file,
21338 + struct vm_area_struct *vma);
21339 +static int au1200_blank(int blank_mode, struct fb_info_gen *info);
21340 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
21341 + u_long arg, int con, struct fb_info *info);
21342 +
21343 +void au1200_nocursor(struct display *p, int mode, int xx, int yy){};
21344 +
21345 +static int au1200_setlocation (int plane, int xpos, int ypos);
21346 +static int au1200_setsize (int plane, int xres, int yres);
21347 +static void au1200_setmode(int plane);
21348 +static void au1200_setpanel (struct panel_settings *newpanel);
21349 +
21350 +static struct fb_ops au1200fb_ops = {
21351 + owner: THIS_MODULE,
21352 + fb_get_fix: fbgen_get_fix,
21353 + fb_get_var: fbgen_get_var,
21354 + fb_set_var: fbgen_set_var,
21355 + fb_get_cmap: fbgen_get_cmap,
21356 + fb_set_cmap: fbgen_set_cmap,
21357 + fb_pan_display: fbgen_pan_display,
21358 + fb_ioctl: au1200fb_ioctl,
21359 + fb_mmap: au1200fb_mmap,
21360 +};
21361 +
21362 +
21363 +static int
21364 +winbpp (unsigned int winctrl1)
21365 +{
21366 + /* how many bytes of memory are needed for each pixel format */
21367 + switch (winctrl1 & LCD_WINCTRL1_FRM)
21368 + {
21369 + case LCD_WINCTRL1_FRM_1BPP: return 1; break;
21370 + case LCD_WINCTRL1_FRM_2BPP: return 2; break;
21371 + case LCD_WINCTRL1_FRM_4BPP: return 4; break;
21372 + case LCD_WINCTRL1_FRM_8BPP: return 8; break;
21373 + case LCD_WINCTRL1_FRM_12BPP: return 16; break;
21374 + case LCD_WINCTRL1_FRM_16BPP655: return 16; break;
21375 + case LCD_WINCTRL1_FRM_16BPP565: return 16; break;
21376 + case LCD_WINCTRL1_FRM_16BPP556: return 16; break;
21377 + case LCD_WINCTRL1_FRM_16BPPI1555: return 16; break;
21378 + case LCD_WINCTRL1_FRM_16BPPI5551: return 16; break;
21379 + case LCD_WINCTRL1_FRM_16BPPA1555: return 16; break;
21380 + case LCD_WINCTRL1_FRM_16BPPA5551: return 16; break;
21381 + case LCD_WINCTRL1_FRM_24BPP: return 32; break;
21382 + case LCD_WINCTRL1_FRM_32BPP: return 32; break;
21383 + default: return 0; break;
21384 + }
21385 +}
21386 +
21387 +static int
21388 +fbinfo2index (struct fb_info *fb_info)
21389 +{
21390 + int i;
21391 + for (i = 0; i < CONFIG_FB_AU1200_DEVS; ++i)
21392 + {
21393 + if (fb_info == (struct fb_info *)(&fb_infos[i]))
21394 + return i;
21395 + }
21396 + printk("au1200fb: ERROR: fbinfo2index failed!\n");
21397 + return -1;
21398 +}
21399 +
21400 +static void au1200_detect(void)
21401 +{
21402 + /*
21403 + * This function should detect the current video mode settings
21404 + * and store it as the default video mode
21405 + * Yeh, well, we're not going to change any settings so we're
21406 + * always stuck with the default ...
21407 + */
21408 +}
21409 +
21410 +static int au1200_encode_fix(struct fb_fix_screeninfo *fix,
21411 + const void *_par, struct fb_info_gen *_info)
21412 +{
21413 + struct au1200fb_info *info = (struct au1200fb_info *) _info;
21414 + struct au1200fb_par *par = (struct au1200fb_par *) _par;
21415 + int plane;
21416 +
21417 + plane = fbinfo2index(info);
21418 +
21419 + memset(fix, 0, sizeof(struct fb_fix_screeninfo));
21420 +
21421 + fix->smem_start = info->fb_phys;
21422 + fix->smem_len = info->fb_size;
21423 + fix->type = FB_TYPE_PACKED_PIXELS;
21424 + fix->type_aux = 0;
21425 + fix->visual = (par->var.bits_per_pixel == 8) ?
21426 + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
21427 + fix->ywrapstep = 0;
21428 + fix->xpanstep = 1;
21429 + fix->ypanstep = 1;
21430 + /* FIX!!!! why doesn't par->line_length work???? it does for au1100 */
21431 + fix->line_length = fb_pars[plane].line_length; /*par->line_length;*/
21432 + return 0;
21433 +}
21434 +
21435 +static void set_color_bitfields(struct fb_var_screeninfo *var, int plane)
21436 +{
21437 + if (var->bits_per_pixel == 8)
21438 + {
21439 + var->red.offset = 0;
21440 + var->red.length = 8;
21441 + var->green.offset = 0;
21442 + var->green.length = 8;
21443 + var->blue.offset = 0;
21444 + var->blue.length = 8;
21445 + var->transp.offset = 0;
21446 + var->transp.length = 0;
21447 + }
21448 + else
21449 +
21450 + if (var->bits_per_pixel == 16)
21451 + {
21452 + /* FIX!!! How does CCO affect this ? */
21453 + /* FIX!!! Not exactly sure how many of these work with FB */
21454 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
21455 + {
21456 + case LCD_WINCTRL1_FRM_16BPP655:
21457 + var->red.offset = 10;
21458 + var->red.length = 6;
21459 + var->green.offset = 5;
21460 + var->green.length = 5;
21461 + var->blue.offset = 0;
21462 + var->blue.length = 5;
21463 + var->transp.offset = 0;
21464 + var->transp.length = 0;
21465 + break;
21466 +
21467 + case LCD_WINCTRL1_FRM_16BPP565:
21468 + var->red.offset = 11;
21469 + var->red.length = 5;
21470 + var->green.offset = 5;
21471 + var->green.length = 6;
21472 + var->blue.offset = 0;
21473 + var->blue.length = 5;
21474 + var->transp.offset = 0;
21475 + var->transp.length = 0;
21476 + break;
21477 +
21478 + case LCD_WINCTRL1_FRM_16BPP556:
21479 + var->red.offset = 11;
21480 + var->red.length = 5;
21481 + var->green.offset = 6;
21482 + var->green.length = 5;
21483 + var->blue.offset = 0;
21484 + var->blue.length = 6;
21485 + var->transp.offset = 0;
21486 + var->transp.length = 0;
21487 + break;
21488 +
21489 + case LCD_WINCTRL1_FRM_16BPPI1555:
21490 + var->red.offset = 10;
21491 + var->red.length = 5;
21492 + var->green.offset = 5;
21493 + var->green.length = 5;
21494 + var->blue.offset = 0;
21495 + var->blue.length = 5;
21496 + var->transp.offset = 0;
21497 + var->transp.length = 0;
21498 + break;
21499 +
21500 + case LCD_WINCTRL1_FRM_16BPPI5551:
21501 + var->red.offset = 11;
21502 + var->red.length = 5;
21503 + var->green.offset = 6;
21504 + var->green.length = 5;
21505 + var->blue.offset = 1;
21506 + var->blue.length = 5;
21507 + var->transp.offset = 0;
21508 + var->transp.length = 0;
21509 + break;
21510 +
21511 + case LCD_WINCTRL1_FRM_16BPPA1555:
21512 + var->red.offset = 10;
21513 + var->red.length = 5;
21514 + var->green.offset = 5;
21515 + var->green.length = 5;
21516 + var->blue.offset = 0;
21517 + var->blue.length = 5;
21518 + var->transp.offset = 15;
21519 + var->transp.length = 1;
21520 + break;
21521 +
21522 + case LCD_WINCTRL1_FRM_16BPPA5551:
21523 + var->red.offset = 11;
21524 + var->red.length = 5;
21525 + var->green.offset = 6;
21526 + var->green.length = 5;
21527 + var->blue.offset = 1;
21528 + var->blue.length = 5;
21529 + var->transp.offset = 0;
21530 + var->transp.length = 1;
21531 + break;
21532 +
21533 + default:
21534 + printk("ERROR: Invalid PIXEL FORMAT!!!\n"); break;
21535 + }
21536 + }
21537 + else
21538 +
21539 + if (var->bits_per_pixel == 32)
21540 + {
21541 + switch (win->w[plane].mode_winctrl1 & LCD_WINCTRL1_FRM)
21542 + {
21543 + case LCD_WINCTRL1_FRM_24BPP:
21544 + var->red.offset = 16;
21545 + var->red.length = 8;
21546 + var->green.offset = 8;
21547 + var->green.length = 8;
21548 + var->blue.offset = 0;
21549 + var->blue.length = 8;
21550 + var->transp.offset = 0;
21551 + var->transp.length = 0;
21552 + break;
21553 +
21554 + case LCD_WINCTRL1_FRM_32BPP:
21555 + var->red.offset = 16;
21556 + var->red.length = 8;
21557 + var->green.offset = 8;
21558 + var->green.length = 8;
21559 + var->blue.offset = 0;
21560 + var->blue.length = 8;
21561 + var->transp.offset = 24;
21562 + var->transp.length = 8;
21563 + break;
21564 + }
21565 + }
21566 + var->red.msb_right = 0;
21567 + var->green.msb_right = 0;
21568 + var->blue.msb_right = 0;
21569 + var->transp.msb_right = 0;
21570 +#if 0
21571 +printk("set_color_bitfields(a=%d, r=%d..%d, g=%d..%d, b=%d..%d)\n",
21572 + var->transp.offset,
21573 + var->red.offset+var->red.length-1, var->red.offset,
21574 + var->green.offset+var->green.length-1, var->green.offset,
21575 + var->blue.offset+var->blue.length-1, var->blue.offset);
21576 +#endif
21577 +}
21578 +
21579 +static int au1200_decode_var(const struct fb_var_screeninfo *var,
21580 + void *_par, struct fb_info_gen *_info)
21581 +{
21582 + struct au1200fb_par *par = (struct au1200fb_par *)_par;
21583 + int plane, bpp;
21584 +
21585 + plane = fbinfo2index((struct fb_info *)_info);
21586 +
21587 + /*
21588 + * Don't allow setting any of these yet: xres and yres don't
21589 + * make sense for LCD panels.
21590 + */
21591 + if (var->xres != win->w[plane].xres ||
21592 + var->yres != win->w[plane].yres ||
21593 + var->xres != win->w[plane].xres ||
21594 + var->yres != win->w[plane].yres) {
21595 + return -EINVAL;
21596 + }
21597 +
21598 + bpp = winbpp(win->w[plane].mode_winctrl1);
21599 + if(var->bits_per_pixel != bpp) {
21600 + /* on au1200, window pixel format is independent of panel pixel */
21601 + printk("WARNING: bits_per_pizel != panel->bpp\n");
21602 + }
21603 +
21604 + memset(par, 0, sizeof(struct au1200fb_par));
21605 + par->var = *var;
21606 +
21607 + /* FIX!!! */
21608 + switch (var->bits_per_pixel) {
21609 + case 8:
21610 + par->var.bits_per_pixel = 8;
21611 + break;
21612 + case 16:
21613 + par->var.bits_per_pixel = 16;
21614 + break;
21615 + case 24:
21616 + case 32:
21617 + par->var.bits_per_pixel = 32;
21618 + break;
21619 + default:
21620 + printk("color depth %d bpp not supported\n",
21621 + var->bits_per_pixel);
21622 + return -EINVAL;
21623 +
21624 + }
21625 + set_color_bitfields(&par->var, plane);
21626 + /* FIX!!! what is this for 24/32bpp? */
21627 + par->cmap_len = (par->var.bits_per_pixel == 8) ? 256 : 16;
21628 + return 0;
21629 +}
21630 +
21631 +static int au1200_encode_var(struct fb_var_screeninfo *var,
21632 + const void *par, struct fb_info_gen *_info)
21633 +{
21634 + *var = ((struct au1200fb_par *)par)->var;
21635 + return 0;
21636 +}
21637 +
21638 +static void
21639 +au1200_get_par(void *_par, struct fb_info_gen *_info)
21640 +{
21641 + int index;
21642 +
21643 + index = fbinfo2index((struct fb_info *)_info);
21644 + *(struct au1200fb_par *)_par = fb_pars[index];
21645 +}
21646 +
21647 +static void au1200_set_par(const void *par, struct fb_info_gen *info)
21648 +{
21649 + /* nothing to do: we don't change any settings */
21650 +}
21651 +
21652 +static int au1200_getcolreg(unsigned regno, unsigned *red, unsigned *green,
21653 + unsigned *blue, unsigned *transp,
21654 + struct fb_info *info)
21655 +{
21656 + struct au1200fb_info* i = (struct au1200fb_info*)info;
21657 +
21658 + if (regno > 255)
21659 + return 1;
21660 +
21661 + *red = i->palette[regno].red;
21662 + *green = i->palette[regno].green;
21663 + *blue = i->palette[regno].blue;
21664 + *transp = 0;
21665 +
21666 + return 0;
21667 +}
21668 +
21669 +static int au1200_setcolreg(unsigned regno, unsigned red, unsigned green,
21670 + unsigned blue, unsigned transp,
21671 + struct fb_info *info)
21672 +{
21673 + struct au1200fb_info* i = (struct au1200fb_info *)info;
21674 + u32 rgbcol;
21675 + int plane, bpp;
21676 +
21677 + plane = fbinfo2index((struct fb_info *)info);
21678 + bpp = winbpp(win->w[plane].mode_winctrl1);
21679 +
21680 + if (regno > 255)
21681 + return 1;
21682 +
21683 + i->palette[regno].red = red;
21684 + i->palette[regno].green = green;
21685 + i->palette[regno].blue = blue;
21686 +
21687 + switch(bpp) {
21688 +#ifdef FBCON_HAS_CFB8
21689 + case 8:
21690 + red >>= 10;
21691 + green >>= 10;
21692 + blue >>= 10;
21693 + panel_reg->lcd_pallettebase[regno] = (blue&0x1f) |
21694 + ((green&0x3f)<<5) | ((red&0x1f)<<11);
21695 + break;
21696 +#endif
21697 +#ifdef FBCON_HAS_CFB16
21698 +/* FIX!!!! depends upon pixel format */
21699 + case 16:
21700 + i->fbcon_cmap16[regno] =
21701 + ((red & 0xf800) >> 0) |
21702 + ((green & 0xfc00) >> 5) |
21703 + ((blue & 0xf800) >> 11);
21704 + break;
21705 +#endif
21706 +#ifdef FBCON_HAS_CFB32
21707 + case 32:
21708 + i->fbcon_cmap32[regno] =
21709 + (((u32 )transp & 0xff00) << 16) |
21710 + (((u32 )red & 0xff00) << 8) |
21711 + (((u32 )green & 0xff00)) |
21712 + (((u32 )blue & 0xff00) >> 8);
21713 + break;
21714 +#endif
21715 + default:
21716 + printk("unsupported au1200_setcolreg(%d)\n", bpp);
21717 + break;
21718 + }
21719 +
21720 + return 0;
21721 +}
21722 +
21723 +
21724 +static int au1200_blank(int blank_mode, struct fb_info_gen *_info)
21725 +{
21726 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_info;
21727 + int plane;
21728 +
21729 + /* Short-circuit screen blanking */
21730 + if (fb_info->noblanking)
21731 + return 0;
21732 +
21733 + plane = fbinfo2index((struct fb_info *)_info);
21734 +
21735 + switch (blank_mode) {
21736 + case VESA_NO_BLANKING:
21737 + /* printk("turn on panel\n"); */
21738 + au1200_setpanel(panel);
21739 + break;
21740 +
21741 + case VESA_VSYNC_SUSPEND:
21742 + case VESA_HSYNC_SUSPEND:
21743 + case VESA_POWERDOWN:
21744 + /* printk("turn off panel\n"); */
21745 + au1200_setpanel(NULL);
21746 + break;
21747 + default:
21748 + break;
21749 +
21750 + }
21751 + return 0;
21752 +}
21753 +
21754 +static void au1200_set_disp(const void *unused, struct display *disp,
21755 + struct fb_info_gen *info)
21756 +{
21757 + struct au1200fb_info *fb_info;
21758 + int plane;
21759 +
21760 + fb_info = (struct au1200fb_info *)info;
21761 +
21762 + disp->screen_base = (char *)fb_info->fb_virt_start;
21763 +
21764 + switch (disp->var.bits_per_pixel) {
21765 +#ifdef FBCON_HAS_CFB8
21766 + case 8:
21767 + disp->dispsw = &fbcon_cfb8;
21768 + if (fb_info->nohwcursor)
21769 + fbcon_cfb8.cursor = au1200_nocursor;
21770 + break;
21771 +#endif
21772 +#ifdef FBCON_HAS_CFB16
21773 + case 16:
21774 + disp->dispsw = &fbcon_cfb16;
21775 + disp->dispsw_data = fb_info->fbcon_cmap16;
21776 + if (fb_info->nohwcursor)
21777 + fbcon_cfb16.cursor = au1200_nocursor;
21778 + break;
21779 +#endif
21780 +#ifdef FBCON_HAS_CFB32
21781 + case 32:
21782 + disp->dispsw = &fbcon_cfb32;
21783 + disp->dispsw_data = fb_info->fbcon_cmap32;
21784 + if (fb_info->nohwcursor)
21785 + fbcon_cfb32.cursor = au1200_nocursor;
21786 + break;
21787 +#endif
21788 + default:
21789 + disp->dispsw = &fbcon_dummy;
21790 + disp->dispsw_data = NULL;
21791 + break;
21792 + }
21793 +}
21794 +
21795 +static int
21796 +au1200fb_mmap(struct fb_info *_fb,
21797 + struct file *file,
21798 + struct vm_area_struct *vma)
21799 +{
21800 + unsigned int len;
21801 + unsigned long start=0, off;
21802 +
21803 + struct au1200fb_info *fb_info = (struct au1200fb_info *)_fb;
21804 +
21805 + if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) {
21806 + return -EINVAL;
21807 + }
21808 +
21809 + start = fb_info->fb_phys & PAGE_MASK;
21810 + len = PAGE_ALIGN((start & ~PAGE_MASK) + fb_info->fb_size);
21811 +
21812 + off = vma->vm_pgoff << PAGE_SHIFT;
21813 +
21814 + if ((vma->vm_end - vma->vm_start + off) > len) {
21815 + return -EINVAL;
21816 + }
21817 +
21818 + off += start;
21819 + vma->vm_pgoff = off >> PAGE_SHIFT;
21820 +
21821 + pgprot_val(vma->vm_page_prot) &= ~_CACHE_MASK;
21822 + pgprot_val(vma->vm_page_prot) |= _CACHE_UNCACHED;
21823 +
21824 + /* This is an IO map - tell maydump to skip this VMA */
21825 + vma->vm_flags |= VM_IO;
21826 +
21827 + if (io_remap_page_range(vma->vm_start, off,
21828 + vma->vm_end - vma->vm_start,
21829 + vma->vm_page_prot)) {
21830 + return -EAGAIN;
21831 + }
21832 +
21833 + fb_info->mmaped = 1;
21834 + return 0;
21835 +}
21836 +
21837 +int au1200_pan_display(const struct fb_var_screeninfo *var,
21838 + struct fb_info_gen *info)
21839 +{
21840 + return 0;
21841 +}
21842 +
21843 +
21844 +static int au1200fb_ioctl(struct inode *inode, struct file *file, u_int cmd,
21845 + u_long arg, int con, struct fb_info *info)
21846 +{
21847 + int plane;
21848 +
21849 + plane = fbinfo2index(info);
21850 +
21851 + /* printk("au1200fb: ioctl %d on plane %d\n", cmd, plane); */
21852 +
21853 + if (cmd == 0x46FF)
21854 + {
21855 + au1200_lcd_getset_t iodata;
21856 +
21857 + if (copy_from_user(&iodata, (void *) arg, sizeof(au1200_lcd_getset_t)))
21858 + return -EFAULT;
21859 +
21860 + switch (iodata.subcmd)
21861 + {
21862 + case AU1200_LCD_GET_WINENABLE:
21863 + iodata.winenable.enable = (lcd->winenable & (1<<plane)) ? 1 : 0;
21864 + break;
21865 + case AU1200_LCD_SET_WINENABLE:
21866 + {
21867 + u32 winenable;
21868 + winenable = lcd->winenable;
21869 + winenable &= ~(1<<plane);
21870 + winenable |= (iodata.winenable.enable) ? (1<<plane) : 0;
21871 + lcd->winenable = winenable;
21872 + }
21873 + break;
21874 + case AU1200_LCD_GET_WINLOCATION:
21875 + iodata.winlocation.x =
21876 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OX) >> 21;
21877 + iodata.winlocation.y =
21878 + (lcd->window[plane].winctrl0 & LCD_WINCTRL0_OY) >> 10;
21879 + break;
21880 + case AU1200_LCD_SET_WINLOCATION:
21881 + au1200_setlocation(plane, iodata.winlocation.x, iodata.winlocation.y);
21882 + break;
21883 + case AU1200_LCD_GET_WINSIZE:
21884 + iodata.winsize.hsz =
21885 + (lcd->window[plane].winctrl1 & LCD_WINCTRL1_SZX) >> 11;
21886 + iodata.winsize.vsz =
21887 + (lcd->window[plane].winctrl0 & LCD_WINCTRL1_SZY) >> 0;
21888 + break;
21889 + case AU1200_LCD_SET_WINSIZE:
21890 + au1200_setsize(plane, iodata.winsize.hsz, iodata.winsize.vsz);
21891 + break;
21892 + case AU1200_LCD_GET_BACKCOLOR:
21893 + iodata.backcolor.color = lcd->backcolor;
21894 + break;
21895 + case AU1200_LCD_SET_BACKCOLOR:
21896 + lcd->backcolor = iodata.backcolor.color;
21897 + break;
21898 + case AU1200_LCD_GET_COLORKEY:
21899 + iodata.colorkey.key = lcd->colorkey;
21900 + iodata.colorkey.mask = lcd->colorkeymsk;
21901 + break;
21902 + case AU1200_LCD_SET_COLORKEY:
21903 + lcd->colorkey = iodata.colorkey.key;
21904 + lcd->colorkeymsk = iodata.colorkey.mask;
21905 + break;
21906 + case AU1200_LCD_GET_PANEL:
21907 + iodata.panel.panel = panel_index;
21908 + break;
21909 + case AU1200_LCD_SET_PANEL:
21910 + if ((iodata.panel.panel >= 0) && (iodata.panel.panel < NUM_PANELS))
21911 + {
21912 + struct panel_settings *newpanel;
21913 + panel_index = iodata.panel.panel;
21914 + newpanel = &panels[panel_index];
21915 + au1200_setpanel(newpanel);
21916 + }
21917 + break;
21918 + }
21919 +
21920 + return copy_to_user((void *) arg, &iodata, sizeof(au1200_lcd_getset_t)) ? -EFAULT : 0;
21921 + }
21922 +
21923 + return -EINVAL;
21924 +}
21925 +
21926 +static struct fbgen_hwswitch au1200_switch = {
21927 + au1200_detect,
21928 + au1200_encode_fix,
21929 + au1200_decode_var,
21930 + au1200_encode_var,
21931 + au1200_get_par,
21932 + au1200_set_par,
21933 + au1200_getcolreg,
21934 + au1200_setcolreg,
21935 + au1200_pan_display,
21936 + au1200_blank,
21937 + au1200_set_disp
21938 +};
21939 +
21940 +static void au1200_setpanel (struct panel_settings *newpanel)
21941 +{
21942 + /*
21943 + * Perform global setup/init of LCD controller
21944 + */
21945 + uint32 winenable;
21946 +
21947 + /* Make sure all windows disabled */
21948 + winenable = lcd->winenable;
21949 + lcd->winenable = 0;
21950 +
21951 + /*
21952 + * Ensure everything is disabled before reconfiguring
21953 + */
21954 + if (lcd->screen & LCD_SCREEN_SEN)
21955 + {
21956 + /* Wait for vertical sync period */
21957 + lcd->intstatus = LCD_INT_SS;
21958 + while ((lcd->intstatus & LCD_INT_SS) == 0)
21959 + ;
21960 +
21961 + lcd->screen &= ~LCD_SCREEN_SEN; /*disable the controller*/
21962 +
21963 + do
21964 + {
21965 + lcd->intstatus = lcd->intstatus; /*clear interrupts*/
21966 + }
21967 + /*wait for controller to shut down*/
21968 + while ((lcd->intstatus & LCD_INT_SD) == 0);
21969 +
21970 + /* Call shutdown of current panel (if up) */
21971 + /* this must occur last, because if an external clock is driving
21972 + the controller, the clock cannot be turned off before first
21973 + shutting down the controller.
21974 + */
21975 + if (panel->device_shutdown != NULL) panel->device_shutdown();
21976 + }
21977 +
21978 + /* Check if only needing to turn off panel */
21979 + if (panel == NULL) return;
21980 +
21981 + panel = newpanel;
21982 +
21983 + printk("Panel(%s), %dx%d\n", panel->name, panel->Xres, panel->Yres);
21984 +
21985 + /*
21986 + * Setup clocking if internal LCD clock source (assumes sys_auxpll valid)
21987 + */
21988 + if (!(panel->mode_clkcontrol & LCD_CLKCONTROL_EXT))
21989 + {
21990 + uint32 sys_clksrc;
21991 + /* WARNING! This should really be a check since other peripherals can
21992 + be affected by changins sys_auxpll */
21993 + au_writel(panel->mode_auxpll, SYS_AUXPLL);
21994 + sys_clksrc = au_readl(SYS_CLKSRC) & ~0x0000001f;
21995 + sys_clksrc |= panel->mode_toyclksrc;
21996 + au_writel(sys_clksrc, SYS_CLKSRC);
21997 + }
21998 +
21999 + /*
22000 + * Configure panel timings
22001 + */
22002 + lcd->screen = panel->mode_screen;
22003 + lcd->horztiming = panel->mode_horztiming;
22004 + lcd->verttiming = panel->mode_verttiming;
22005 + lcd->clkcontrol = panel->mode_clkcontrol;
22006 + lcd->pwmdiv = panel->mode_pwmdiv;
22007 + lcd->pwmhi = panel->mode_pwmhi;
22008 + lcd->outmask = panel->mode_outmask;
22009 + lcd->fifoctrl = panel->mode_fifoctrl;
22010 + au_sync();
22011 +
22012 + /* FIX!!! Check window settings to make sure still valid for new geometry */
22013 + au1200_setlocation(0, win->w[0].xpos, win->w[0].ypos);
22014 + au1200_setlocation(1, win->w[1].xpos, win->w[1].ypos);
22015 + au1200_setlocation(2, win->w[2].xpos, win->w[2].ypos);
22016 + au1200_setlocation(3, win->w[3].xpos, win->w[3].ypos);
22017 + lcd->winenable = winenable;
22018 +
22019 + /*
22020 + * Re-enable screen now that it is configured
22021 + */
22022 + lcd->screen |= LCD_SCREEN_SEN;
22023 + au_sync();
22024 +
22025 + /* Call init of panel */
22026 + if (panel->device_init != NULL) panel->device_init();
22027 +
22028 +#if 0
22029 +#define D(X) printk("%25s: %08X\n", #X, X)
22030 + D(lcd->screen);
22031 + D(lcd->horztiming);
22032 + D(lcd->verttiming);
22033 + D(lcd->clkcontrol);
22034 + D(lcd->pwmdiv);
22035 + D(lcd->pwmhi);
22036 + D(lcd->outmask);
22037 + D(lcd->fifoctrl);
22038 + D(lcd->window[0].winctrl0);
22039 + D(lcd->window[0].winctrl1);
22040 + D(lcd->window[0].winctrl2);
22041 + D(lcd->window[0].winbuf0);
22042 + D(lcd->window[0].winbuf1);
22043 + D(lcd->window[0].winbufctrl);
22044 + D(lcd->window[1].winctrl0);
22045 + D(lcd->window[1].winctrl1);
22046 + D(lcd->window[1].winctrl2);
22047 + D(lcd->window[1].winbuf0);
22048 + D(lcd->window[1].winbuf1);
22049 + D(lcd->window[1].winbufctrl);
22050 + D(lcd->window[2].winctrl0);
22051 + D(lcd->window[2].winctrl1);
22052 + D(lcd->window[2].winctrl2);
22053 + D(lcd->window[2].winbuf0);
22054 + D(lcd->window[2].winbuf1);
22055 + D(lcd->window[2].winbufctrl);
22056 + D(lcd->window[3].winctrl0);
22057 + D(lcd->window[3].winctrl1);
22058 + D(lcd->window[3].winctrl2);
22059 + D(lcd->window[3].winbuf0);
22060 + D(lcd->window[3].winbuf1);
22061 + D(lcd->window[3].winbufctrl);
22062 + D(lcd->winenable);
22063 + D(lcd->intenable);
22064 + D(lcd->intstatus);
22065 + D(lcd->backcolor);
22066 + D(lcd->winenable);
22067 + D(lcd->colorkey);
22068 + D(lcd->colorkeymsk);
22069 + D(lcd->hwc.cursorctrl);
22070 + D(lcd->hwc.cursorpos);
22071 + D(lcd->hwc.cursorcolor0);
22072 + D(lcd->hwc.cursorcolor1);
22073 + D(lcd->hwc.cursorcolor2);
22074 + D(lcd->hwc.cursorcolor3);
22075 +#endif
22076 +}
22077 +
22078 +static int au1200_setsize (int plane, int xres, int yres)
22079 +{
22080 +#if 0
22081 + uint32 winctrl0, winctrl1, winenable;
22082 + int xsz, ysz;
22083 +
22084 + /* FIX!!! X*Y can not surpass allocated memory */
22085 +
22086 + printk("setsize: x %d y %d\n", xres, yres);
22087 + winctrl1 = lcd->window[plane].winctrl1;
22088 + printk("org winctrl1 %08X\n", winctrl1);
22089 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
22090 +
22091 + xres -= 1;
22092 + yres -= 1;
22093 + winctrl1 |= (xres << 11);
22094 + winctrl1 |= (yres << 0);
22095 +
22096 + printk("new winctrl1 %08X\n", winctrl1);
22097 +
22098 + /*winenable = lcd->winenable & (1 << plane); */
22099 + /*lcd->winenable &= ~(1 << plane); */
22100 + lcd->window[plane].winctrl1 = winctrl1;
22101 + /*lcd->winenable |= winenable; */
22102 +#endif
22103 + return 0;
22104 +}
22105 +
22106 +static int au1200_setlocation (int plane, int xpos, int ypos)
22107 +{
22108 + uint32 winctrl0, winctrl1, winenable, fb_offset = 0;
22109 + int xsz, ysz;
22110 +
22111 + /* FIX!!! NOT CHECKING FOR COMPLETE OFFSCREEN YET */
22112 +
22113 + winctrl0 = lcd->window[plane].winctrl0;
22114 + winctrl1 = lcd->window[plane].winctrl1;
22115 + winctrl0 &= (LCD_WINCTRL0_A | LCD_WINCTRL0_AEN);
22116 + winctrl1 &= ~(LCD_WINCTRL1_SZX | LCD_WINCTRL1_SZY);
22117 +
22118 + /* Check for off-screen adjustments */
22119 + xsz = win->w[plane].xres;
22120 + ysz = win->w[plane].yres;
22121 + if ((xpos + win->w[plane].xres) > panel->Xres)
22122 + {
22123 + /* Off-screen to the right */
22124 + xsz = panel->Xres - xpos; /* off by 1 ??? */
22125 + /*printk("off screen right\n");*/
22126 + }
22127 +
22128 + if ((ypos + win->w[plane].yres) > panel->Yres)
22129 + {
22130 + /* Off-screen to the bottom */
22131 + ysz = panel->Yres - ypos; /* off by 1 ??? */
22132 + /*printk("off screen bottom\n");*/
22133 + }
22134 +
22135 + if (xpos < 0)
22136 + {
22137 + /* Off-screen to the left */
22138 + xsz = win->w[plane].xres + xpos;
22139 + fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8);
22140 + xpos = 0;
22141 + /*printk("off screen left\n");*/
22142 + }
22143 +
22144 + if (ypos < 0)
22145 + {
22146 + /* Off-screen to the top */
22147 + ysz = win->w[plane].yres + ypos;
22148 + fb_offset += ((0 - ypos) * fb_pars[plane].line_length);
22149 + ypos = 0;
22150 + /*printk("off screen top\n");*/
22151 + }
22152 +
22153 + /* record settings */
22154 + win->w[plane].xpos = xpos;
22155 + win->w[plane].ypos = ypos;
22156 +
22157 + xsz -= 1;
22158 + ysz -= 1;
22159 + winctrl0 |= (xpos << 21);
22160 + winctrl0 |= (ypos << 10);
22161 + winctrl1 |= (xsz << 11);
22162 + winctrl1 |= (ysz << 0);
22163 +
22164 + /* Disable the window while making changes, then restore WINEN */
22165 + winenable = lcd->winenable & (1 << plane);
22166 + lcd->winenable &= ~(1 << plane);
22167 + lcd->window[plane].winctrl0 = winctrl0;
22168 + lcd->window[plane].winctrl1 = winctrl1;
22169 + lcd->window[plane].winbuf0 =
22170 + lcd->window[plane].winbuf1 = fb_infos[plane].fb_phys + fb_offset;
22171 + lcd->window[plane].winbufctrl = 0; /* select winbuf0 */
22172 + lcd->winenable |= winenable;
22173 +
22174 + return 0;
22175 +}
22176 +
22177 +static void au1200_setmode(int plane)
22178 +{
22179 + /* Window/plane setup */
22180 + lcd->window[plane].winctrl1 = ( 0
22181 + | LCD_WINCTRL1_PRI_N(plane)
22182 + | win->w[plane].mode_winctrl1 /* FRM,CCO,PO,PIPE */
22183 + ) ;
22184 +
22185 + au1200_setlocation(plane, win->w[plane].xpos, win->w[plane].ypos);
22186 +
22187 + lcd->window[plane].winctrl2 = ( 0
22188 + | LCD_WINCTRL2_CKMODE_00
22189 + | LCD_WINCTRL2_DBM
22190 +/* | LCD_WINCTRL2_RAM */
22191 + | LCD_WINCTRL2_BX_N(fb_pars[plane].line_length)
22192 + | LCD_WINCTRL2_SCX_1
22193 + | LCD_WINCTRL2_SCY_1
22194 + ) ;
22195 + lcd->winenable |= win->w[plane].mode_winenable;
22196 + au_sync();
22197 +
22198 +}
22199 +
22200 +static unsigned long
22201 +au1200fb_alloc_fbmem (unsigned long size)
22202 +{
22203 + /* __get_free_pages() fulfills a max request of 2MB */
22204 + /* do multiple requests to obtain large contigous mem */
22205 +#define MAX_GFP 0x00200000
22206 +
22207 + unsigned long mem, amem, alloced = 0, allocsize;
22208 +
22209 + size += 0x1000;
22210 + allocsize = (size < MAX_GFP) ? size : MAX_GFP;
22211 +
22212 + /* Get first chunk */
22213 + mem = (unsigned long )
22214 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
22215 + if (mem != 0) alloced = allocsize;
22216 +
22217 + /* Get remaining, contiguous chunks */
22218 + while (alloced < size)
22219 + {
22220 + amem = (unsigned long )
22221 + __get_free_pages(GFP_ATOMIC | GFP_DMA, get_order(allocsize));
22222 + if (amem != 0)
22223 + alloced += allocsize;
22224 +
22225 + /* check for contiguous mem alloced */
22226 + if ((amem == 0) || (amem + allocsize) != mem)
22227 + break;
22228 + else
22229 + mem = amem;
22230 + }
22231 + return mem;
22232 +}
22233 +
22234 +int __init au1200fb_init(void)
22235 +{
22236 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
22237 + struct au1200fb_info *fb_info;
22238 + struct display *disp;
22239 + struct au1200fb_par *par;
22240 + unsigned long page;
22241 + int plane, bpp;
22242 +
22243 + /*
22244 + * Get the panel information/display mode
22245 + */
22246 + if (panel_index < 0)
22247 + panel_index = board_au1200fb_panel();
22248 + if ((panel_index < 0) || (panel_index >= num_panels)) {
22249 + printk("ERROR: INVALID PANEL %d\n", panel_index);
22250 + return -EINVAL;
22251 + }
22252 + panel = &panels[panel_index];
22253 + win = &windows[window_index];
22254 +
22255 + printk("au1200fb: Panel %d %s\n", panel_index, panel->name);
22256 + printk("au1200fb: Win %d %s\n", window_index, win->name);
22257 +
22258 + /* Global setup/init */
22259 + au1200_setpanel(panel);
22260 + lcd->intenable = 0;
22261 + lcd->intstatus = ~0;
22262 + lcd->backcolor = win->mode_backcolor;
22263 + lcd->winenable = 0;
22264 +
22265 + /* Setup Color Key - FIX!!! */
22266 + lcd->colorkey = win->mode_colorkey;
22267 + lcd->colorkeymsk = win->mode_colorkeymsk;
22268 +
22269 + /* Setup HWCursor - FIX!!! Need to support this eventually */
22270 + lcd->hwc.cursorctrl = 0;
22271 + lcd->hwc.cursorpos = 0;
22272 + lcd->hwc.cursorcolor0 = 0;
22273 + lcd->hwc.cursorcolor1 = 0;
22274 + lcd->hwc.cursorcolor2 = 0;
22275 + lcd->hwc.cursorcolor3 = 0;
22276 +
22277 + /* Register each plane as a frame buffer device */
22278 + for (plane = 0; plane < CONFIG_FB_AU1200_DEVS; ++plane)
22279 + {
22280 + fb_info = &fb_infos[plane];
22281 + disp = &disps[plane];
22282 + par = &fb_pars[plane];
22283 +
22284 + bpp = winbpp(win->w[plane].mode_winctrl1);
22285 + if (win->w[plane].xres == 0)
22286 + win->w[plane].xres = panel->Xres;
22287 + if (win->w[plane].yres == 0)
22288 + win->w[plane].yres = panel->Yres;
22289 +
22290 + par->var.xres =
22291 + par->var.xres_virtual = win->w[plane].xres;
22292 + par->var.yres =
22293 + par->var.yres_virtual = win->w[plane].yres;
22294 + par->var.bits_per_pixel = bpp;
22295 + par->line_length = win->w[plane].xres * bpp / 8; /* in bytes */
22296 + /*
22297 + * Allocate LCD framebuffer from system memory
22298 + * Set page reserved so that mmap will work. This is necessary
22299 + * since we'll be remapping normal memory.
22300 + */
22301 + fb_info->fb_size = (win->w[plane].xres * win->w[plane].yres * bpp) / 8;
22302 + fb_info->fb_virt_start = au1200fb_alloc_fbmem(fb_info->fb_size);
22303 + if (!fb_info->fb_virt_start) {
22304 + printk("Unable to allocate fb memory\n");
22305 + return -ENOMEM;
22306 + }
22307 + fb_info->fb_phys = virt_to_bus((void *)fb_info->fb_virt_start);
22308 + for (page = fb_info->fb_virt_start;
22309 + page < PAGE_ALIGN(fb_info->fb_virt_start + fb_info->fb_size);
22310 + page += PAGE_SIZE) {
22311 + SetPageReserved(virt_to_page(page));
22312 + }
22313 + /* Convert to kseg1 */
22314 + fb_info->fb_virt_start =
22315 + (void *)((u32)fb_info->fb_virt_start | 0xA0000000);
22316 + /* FIX!!! may wish to avoid this to save startup time??? */
22317 + memset((void *)fb_info->fb_virt_start, 0, fb_info->fb_size);
22318 +
22319 + fb_info->gen.parsize = sizeof(struct au1200fb_par);
22320 + fb_info->gen.fbhw = &au1200_switch;
22321 + strcpy(fb_info->gen.info.modename, "Au1200 LCD");
22322 + fb_info->gen.info.changevar = NULL;
22323 + fb_info->gen.info.node = -1;
22324 +
22325 + fb_info->gen.info.fbops = &au1200fb_ops;
22326 + fb_info->gen.info.disp = disp;
22327 + fb_info->gen.info.switch_con = &fbgen_switch;
22328 + fb_info->gen.info.updatevar = &fbgen_update_var;
22329 + fb_info->gen.info.blank = &fbgen_blank;
22330 + fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
22331 +
22332 + fb_info->nohwcursor = 1;
22333 + fb_info->noblanking = 1;
22334 +
22335 + /* This should give a reasonable default video mode */
22336 + fbgen_get_var(&disp->var, -1, &fb_info->gen.info);
22337 + fbgen_do_set_var(&disp->var, 1, &fb_info->gen);
22338 + fbgen_set_disp(-1, &fb_info->gen);
22339 + fbgen_install_cmap(0, &fb_info->gen);
22340 +
22341 + /* Turn on plane */
22342 + au1200_setmode(plane);
22343 +
22344 + if (register_framebuffer(&fb_info->gen.info) < 0)
22345 + return -EINVAL;
22346 +
22347 + printk(KERN_INFO "fb%d: %s plane %d @ %08X (%d x %d x %d)\n",
22348 + GET_FB_IDX(fb_info->gen.info.node),
22349 + fb_info->gen.info.modename, plane, fb_info->fb_phys,
22350 + win->w[plane].xres, win->w[plane].yres, bpp);
22351 + }
22352 + /* uncomment this if your driver cannot be unloaded */
22353 + /* MOD_INC_USE_COUNT; */
22354 + return 0;
22355 +}
22356 +
22357 +void au1200fb_setup(char *options, int *ints)
22358 +{
22359 + char* this_opt;
22360 + int i;
22361 + int num_panels = sizeof(panels)/sizeof(struct panel_settings);
22362 +
22363 + if (!options || !*options)
22364 + return;
22365 +
22366 + for(this_opt=strtok(options, ","); this_opt;
22367 + this_opt=strtok(NULL, ",")) {
22368 + if (!strncmp(this_opt, "panel:", 6)) {
22369 + int i;
22370 + long int li;
22371 + char *endptr;
22372 + this_opt += 6;
22373 +
22374 + /* Panel name can be name, "bs" for board-switch, or number/index */
22375 + li = simple_strtol(this_opt, &endptr, 0);
22376 + if (*endptr == '\0') {
22377 + panel_index = (int)li;
22378 + }
22379 + else if (strcmp(this_opt, "bs") == 0) {
22380 + panel_index = board_au1200fb_panel();
22381 + }
22382 + else
22383 + for (i=0; i<num_panels; i++) {
22384 + if (!strcmp(this_opt, panels[i].name)) {
22385 + panel_index = i;
22386 + break;
22387 + }
22388 + }
22389 + }
22390 + else if (!strncmp(this_opt, "nohwcursor", 10)) {
22391 + printk("nohwcursor\n");
22392 + fb_infos[0].nohwcursor = 1;
22393 + }
22394 + }
22395 +
22396 + printk("au1200fb: Panel %d %s\n", panel_index,
22397 + panels[panel_index].name);
22398 +}
22399 +
22400 +
22401 +
22402 +#ifdef MODULE
22403 +MODULE_LICENSE("GPL");
22404 +MODULE_DESCRIPTION("Au1200 LCD framebuffer driver");
22405 +
22406 +void au1200fb_cleanup(struct fb_info *info)
22407 +{
22408 + unregister_framebuffer(info);
22409 +}
22410 +
22411 +module_init(au1200fb_init);
22412 +module_exit(au1200fb_cleanup);
22413 +#endif /* MODULE */
22414 +
22415 +
22416 diff -Nur linux-2.4.30/drivers/video/au1200fb.h linux-2.4.30-mips/drivers/video/au1200fb.h
22417 --- linux-2.4.30/drivers/video/au1200fb.h 1970-01-01 01:00:00.000000000 +0100
22418 +++ linux-2.4.30-mips/drivers/video/au1200fb.h 2005-02-11 22:16:44.000000000 +0100
22419 @@ -0,0 +1,288 @@
22420 +/*
22421 + * BRIEF MODULE DESCRIPTION
22422 + * Hardware definitions for the Au1200 LCD controller
22423 + *
22424 + * Copyright 2004 AMD
22425 + * Author: AMD
22426 + *
22427 + * This program is free software; you can redistribute it and/or modify it
22428 + * under the terms of the GNU General Public License as published by the
22429 + * Free Software Foundation; either version 2 of the License, or (at your
22430 + * option) any later version.
22431 + *
22432 + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
22433 + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22434 + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22435 + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22436 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22437 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
22438 + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22439 + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22440 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22441 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22442 + *
22443 + * You should have received a copy of the GNU General Public License along
22444 + * with this program; if not, write to the Free Software Foundation, Inc.,
22445 + * 675 Mass Ave, Cambridge, MA 02139, USA.
22446 + */
22447 +
22448 +#ifndef _AU1200LCD_H
22449 +#define _AU1200LCD_H
22450 +
22451 +/********************************************************************/
22452 +#define AU1200_LCD_ADDR 0xB5000000
22453 +
22454 +#define uint8 unsigned char
22455 +#define uint32 unsigned int
22456 +
22457 +typedef volatile struct
22458 +{
22459 + uint32 reserved0;
22460 + uint32 screen;
22461 + uint32 backcolor;
22462 + uint32 horztiming;
22463 + uint32 verttiming;
22464 + uint32 clkcontrol;
22465 + uint32 pwmdiv;
22466 + uint32 pwmhi;
22467 + uint32 reserved1;
22468 + uint32 winenable;
22469 + uint32 colorkey;
22470 + uint32 colorkeymsk;
22471 + struct
22472 + {
22473 + uint32 cursorctrl;
22474 + uint32 cursorpos;
22475 + uint32 cursorcolor0;
22476 + uint32 cursorcolor1;
22477 + uint32 cursorcolor2;
22478 + uint32 cursorcolor3;
22479 + } hwc;
22480 + uint32 intstatus;
22481 + uint32 intenable;
22482 + uint32 outmask;
22483 + uint32 fifoctrl;
22484 + uint32 reserved2[(0x0100-0x0058)/4];
22485 + struct
22486 + {
22487 + uint32 winctrl0;
22488 + uint32 winctrl1;
22489 + uint32 winctrl2;
22490 + uint32 winbuf0;
22491 + uint32 winbuf1;
22492 + uint32 winbufctrl;
22493 + uint32 winreserved0;
22494 + uint32 winreserved1;
22495 + } window[4];
22496 +
22497 + uint32 reserved3[(0x0400-0x0180)/4];
22498 +
22499 + uint32 palette[(0x0800-0x0400)/4];
22500 +
22501 + uint8 cursorpattern[256];
22502 +
22503 +} AU1200_LCD;
22504 +
22505 +/* lcd_screen */
22506 +#define LCD_SCREEN_SEN (1<<31)
22507 +#define LCD_SCREEN_SX (0x07FF<<19)
22508 +#define LCD_SCREEN_SY (0x07FF<< 8)
22509 +#define LCD_SCREEN_SWP (1<<7)
22510 +#define LCD_SCREEN_SWD (1<<6)
22511 +#define LCD_SCREEN_ST (7<<0)
22512 +#define LCD_SCREEN_ST_TFT (0<<0)
22513 +#define LCD_SCREEN_SX_N(WIDTH) ((WIDTH-1)<<19)
22514 +#define LCD_SCREEN_SY_N(HEIGHT) ((HEIGHT-1)<<8)
22515 +#define LCD_SCREEN_ST_CSTN (1<<0)
22516 +#define LCD_SCREEN_ST_CDSTN (2<<0)
22517 +#define LCD_SCREEN_ST_M8STN (3<<0)
22518 +#define LCD_SCREEN_ST_M4STN (4<<0)
22519 +
22520 +/* lcd_backcolor */
22521 +#define LCD_BACKCOLOR_SBGR (0xFF<<16)
22522 +#define LCD_BACKCOLOR_SBGG (0xFF<<8)
22523 +#define LCD_BACKCOLOR_SBGB (0xFF<<0)
22524 +#define LCD_BACKCOLOR_SBGR_N(N) ((N)<<16)
22525 +#define LCD_BACKCOLOR_SBGG_N(N) ((N)<<8)
22526 +#define LCD_BACKCOLOR_SBGB_N(N) ((N)<<0)
22527 +
22528 +/* lcd_winenable */
22529 +#define LCD_WINENABLE_WEN3 (1<<3)
22530 +#define LCD_WINENABLE_WEN2 (1<<2)
22531 +#define LCD_WINENABLE_WEN1 (1<<1)
22532 +#define LCD_WINENABLE_WEN0 (1<<0)
22533 +
22534 +/* lcd_colorkey */
22535 +#define LCD_COLORKEY_CKR (0xFF<<16)
22536 +#define LCD_COLORKEY_CKG (0xFF<<8)
22537 +#define LCD_COLORKEY_CKB (0xFF<<0)
22538 +#define LCD_COLORKEY_CKR_N(N) ((N)<<16)
22539 +#define LCD_COLORKEY_CKG_N(N) ((N)<<8)
22540 +#define LCD_COLORKEY_CKB_N(N) ((N)<<0)
22541 +
22542 +/* lcd_colorkeymsk */
22543 +#define LCD_COLORKEYMSK_CKMR (0xFF<<16)
22544 +#define LCD_COLORKEYMSK_CKMG (0xFF<<8)
22545 +#define LCD_COLORKEYMSK_CKMB (0xFF<<0)
22546 +#define LCD_COLORKEYMSK_CKMR_N(N) ((N)<<16)
22547 +#define LCD_COLORKEYMSK_CKMG_N(N) ((N)<<8)
22548 +#define LCD_COLORKEYMSK_CKMB_N(N) ((N)<<0)
22549 +
22550 +/* lcd windows control 0 */
22551 +#define LCD_WINCTRL0_OX (0x07FF<<21)
22552 +#define LCD_WINCTRL0_OY (0x07FF<<10)
22553 +#define LCD_WINCTRL0_A (0x00FF<<2)
22554 +#define LCD_WINCTRL0_AEN (1<<1)
22555 +#define LCD_WINCTRL0_OX_N(N) ((N)<<21)
22556 +#define LCD_WINCTRL0_OY_N(N) ((N)<<10)
22557 +#define LCD_WINCTRL0_A_N(N) ((N)<<2)
22558 +
22559 +/* lcd windows control 1 */
22560 +#define LCD_WINCTRL1_PRI (3<<30)
22561 +#define LCD_WINCTRL1_PIPE (1<<29)
22562 +#define LCD_WINCTRL1_FRM (0xF<<25)
22563 +#define LCD_WINCTRL1_CCO (1<<24)
22564 +#define LCD_WINCTRL1_PO (3<<22)
22565 +#define LCD_WINCTRL1_SZX (0x07FF<<11)
22566 +#define LCD_WINCTRL1_SZY (0x07FF<<0)
22567 +#define LCD_WINCTRL1_FRM_1BPP (0<<25)
22568 +#define LCD_WINCTRL1_FRM_2BPP (1<<25)
22569 +#define LCD_WINCTRL1_FRM_4BPP (2<<25)
22570 +#define LCD_WINCTRL1_FRM_8BPP (3<<25)
22571 +#define LCD_WINCTRL1_FRM_12BPP (4<<25)
22572 +#define LCD_WINCTRL1_FRM_16BPP655 (5<<25)
22573 +#define LCD_WINCTRL1_FRM_16BPP565 (6<<25)
22574 +#define LCD_WINCTRL1_FRM_16BPP556 (7<<25)
22575 +#define LCD_WINCTRL1_FRM_16BPPI1555 (8<<25)
22576 +#define LCD_WINCTRL1_FRM_16BPPI5551 (9<<25)
22577 +#define LCD_WINCTRL1_FRM_16BPPA1555 (10<<25)
22578 +#define LCD_WINCTRL1_FRM_16BPPA5551 (11<<25)
22579 +#define LCD_WINCTRL1_FRM_24BPP (12<<25)
22580 +#define LCD_WINCTRL1_FRM_32BPP (13<<25)
22581 +#define LCD_WINCTRL1_PRI_N(N) ((N)<<30)
22582 +#define LCD_WINCTRL1_PO_00 (0<<22)
22583 +#define LCD_WINCTRL1_PO_01 (1<<22)
22584 +#define LCD_WINCTRL1_PO_10 (2<<22)
22585 +#define LCD_WINCTRL1_PO_11 (3<<22)
22586 +#define LCD_WINCTRL1_SZX_N(N) ((N-1)<<11)
22587 +#define LCD_WINCTRL1_SZY_N(N) ((N-1)<<0)
22588 +
22589 +/* lcd windows control 2 */
22590 +#define LCD_WINCTRL2_CKMODE (3<<24)
22591 +#define LCD_WINCTRL2_DBM (1<<23)
22592 +#define LCD_WINCTRL2_RAM (3<<21)
22593 +#define LCD_WINCTRL2_BX (0x1FFF<<8)
22594 +#define LCD_WINCTRL2_SCX (0xF<<4)
22595 +#define LCD_WINCTRL2_SCY (0xF<<0)
22596 +#define LCD_WINCTRL2_CKMODE_00 (0<<24)
22597 +#define LCD_WINCTRL2_CKMODE_01 (1<<24)
22598 +#define LCD_WINCTRL2_CKMODE_10 (2<<24)
22599 +#define LCD_WINCTRL2_CKMODE_11 (3<<24)
22600 +#define LCD_WINCTRL2_RAM_NONE (0<<21)
22601 +#define LCD_WINCTRL2_RAM_PALETTE (1<<21)
22602 +#define LCD_WINCTRL2_RAM_GAMMA (2<<21)
22603 +#define LCD_WINCTRL2_RAM_BUFFER (3<<21)
22604 +#define LCD_WINCTRL2_BX_N(N) ((N)<<8)
22605 +#define LCD_WINCTRL2_SCX_1 (0<<4)
22606 +#define LCD_WINCTRL2_SCX_2 (1<<4)
22607 +#define LCD_WINCTRL2_SCX_4 (2<<4)
22608 +#define LCD_WINCTRL2_SCY_1 (0<<0)
22609 +#define LCD_WINCTRL2_SCY_2 (1<<0)
22610 +#define LCD_WINCTRL2_SCY_4 (2<<0)
22611 +
22612 +/* lcd windows buffer control */
22613 +#define LCD_WINBUFCTRL_DB (1<<1)
22614 +#define LCD_WINBUFCTRL_DBN (1<<0)
22615 +
22616 +/* lcd_intstatus, lcd_intenable */
22617 +#define LCD_INT_IFO (0xF<<14)
22618 +#define LCD_INT_IFU (0xF<<10)
22619 +#define LCD_INT_OFO (1<<9)
22620 +#define LCD_INT_OFU (1<<8)
22621 +#define LCD_INT_WAIT (1<<3)
22622 +#define LCD_INT_SD (1<<2)
22623 +#define LCD_INT_SA (1<<1)
22624 +#define LCD_INT_SS (1<<0)
22625 +
22626 +/* lcd_horztiming */
22627 +#define LCD_HORZTIMING_HND2 (0x1FF<<18)
22628 +#define LCD_HORZTIMING_HND1 (0x1FF<<9)
22629 +#define LCD_HORZTIMING_HPW (0x1FF<<0)
22630 +#define LCD_HORZTIMING_HND2_N(N)(((N)-1)<<18)
22631 +#define LCD_HORZTIMING_HND1_N(N)(((N)-1)<<9)
22632 +#define LCD_HORZTIMING_HPW_N(N) (((N)-1)<<0)
22633 +
22634 +/* lcd_verttiming */
22635 +#define LCD_VERTTIMING_VND2 (0x1FF<<18)
22636 +#define LCD_VERTTIMING_VND1 (0x1FF<<9)
22637 +#define LCD_VERTTIMING_VPW (0x1FF<<0)
22638 +#define LCD_VERTTIMING_VND2_N(N)(((N)-1)<<18)
22639 +#define LCD_VERTTIMING_VND1_N(N)(((N)-1)<<9)
22640 +#define LCD_VERTTIMING_VPW_N(N) (((N)-1)<<0)
22641 +
22642 +/* lcd_clkcontrol */
22643 +#define LCD_CLKCONTROL_EXT (1<<22)
22644 +#define LCD_CLKCONTROL_DELAY (3<<20)
22645 +#define LCD_CLKCONTROL_CDD (1<<19)
22646 +#define LCD_CLKCONTROL_IB (1<<18)
22647 +#define LCD_CLKCONTROL_IC (1<<17)
22648 +#define LCD_CLKCONTROL_IH (1<<16)
22649 +#define LCD_CLKCONTROL_IV (1<<15)
22650 +#define LCD_CLKCONTROL_BF (0x1F<<10)
22651 +#define LCD_CLKCONTROL_PCD (0x3FF<<0)
22652 +#define LCD_CLKCONTROL_BF_N(N) (((N)-1)<<10)
22653 +#define LCD_CLKCONTROL_PCD_N(N) ((N)<<0)
22654 +
22655 +/* lcd_pwmdiv */
22656 +#define LCD_PWMDIV_EN (1<<31)
22657 +#define LCD_PWMDIV_PWMDIV (0x1FFFF<<0)
22658 +#define LCD_PWMDIV_PWMDIV_N(N) ((N)<<0)
22659 +
22660 +/* lcd_pwmhi */
22661 +#define LCD_PWMHI_PWMHI1 (0xFFFF<<16)
22662 +#define LCD_PWMHI_PWMHI0 (0xFFFF<<0)
22663 +#define LCD_PWMHI_PWMHI1_N(N) ((N)<<16)
22664 +#define LCD_PWMHI_PWMHI0_N(N) ((N)<<0)
22665 +
22666 +/* lcd_hwccon */
22667 +#define LCD_HWCCON_EN (1<<0)
22668 +
22669 +/* lcd_cursorpos */
22670 +#define LCD_CURSORPOS_HWCXOFF (0x1F<<27)
22671 +#define LCD_CURSORPOS_HWCXPOS (0x07FF<<16)
22672 +#define LCD_CURSORPOS_HWCYOFF (0x1F<<11)
22673 +#define LCD_CURSORPOS_HWCYPOS (0x07FF<<0)
22674 +#define LCD_CURSORPOS_HWCXOFF_N(N) ((N)<<27)
22675 +#define LCD_CURSORPOS_HWCXPOS_N(N) ((N)<<16)
22676 +#define LCD_CURSORPOS_HWCYOFF_N(N) ((N)<<11)
22677 +#define LCD_CURSORPOS_HWCYPOS_N(N) ((N)<<0)
22678 +
22679 +/* lcd_cursorcolor */
22680 +#define LCD_CURSORCOLOR_HWCA (0xFF<<24)
22681 +#define LCD_CURSORCOLOR_HWCR (0xFF<<16)
22682 +#define LCD_CURSORCOLOR_HWCG (0xFF<<8)
22683 +#define LCD_CURSORCOLOR_HWCB (0xFF<<0)
22684 +#define LCD_CURSORCOLOR_HWCA_N(N) ((N)<<24)
22685 +#define LCD_CURSORCOLOR_HWCR_N(N) ((N)<<16)
22686 +#define LCD_CURSORCOLOR_HWCG_N(N) ((N)<<8)
22687 +#define LCD_CURSORCOLOR_HWCB_N(N) ((N)<<0)
22688 +
22689 +/* lcd_fifoctrl */
22690 +#define LCD_FIFOCTRL_F3IF (1<<29)
22691 +#define LCD_FIFOCTRL_F3REQ (0x1F<<24)
22692 +#define LCD_FIFOCTRL_F2IF (1<<29)
22693 +#define LCD_FIFOCTRL_F2REQ (0x1F<<16)
22694 +#define LCD_FIFOCTRL_F1IF (1<<29)
22695 +#define LCD_FIFOCTRL_F1REQ (0x1F<<8)
22696 +#define LCD_FIFOCTRL_F0IF (1<<29)
22697 +#define LCD_FIFOCTRL_F0REQ (0x1F<<0)
22698 +#define LCD_FIFOCTRL_F3REQ_N(N) ((N-1)<<24)
22699 +#define LCD_FIFOCTRL_F2REQ_N(N) ((N-1)<<16)
22700 +#define LCD_FIFOCTRL_F1REQ_N(N) ((N-1)<<8)
22701 +#define LCD_FIFOCTRL_F0REQ_N(N) ((N-1)<<0)
22702 +
22703 +/* lcd_outmask */
22704 +#define LCD_OUTMASK_MASK (0x00FFFFFF)
22705 +
22706 +/********************************************************************/
22707 +#endif /* _AU1200LCD_H */
22708 diff -Nur linux-2.4.30/drivers/video/fbmem.c linux-2.4.30-mips/drivers/video/fbmem.c
22709 --- linux-2.4.30/drivers/video/fbmem.c 2005-01-19 15:10:09.000000000 +0100
22710 +++ linux-2.4.30-mips/drivers/video/fbmem.c 2005-02-11 22:16:44.000000000 +0100
22711 @@ -139,6 +139,8 @@
22712 extern int e1356fb_setup(char*);
22713 extern int au1100fb_init(void);
22714 extern int au1100fb_setup(char*);
22715 +extern int au1200fb_init(void);
22716 +extern int au1200fb_setup(char*);
22717 extern int pvr2fb_init(void);
22718 extern int pvr2fb_setup(char*);
22719 extern int sstfb_init(void);
22720 @@ -331,6 +333,9 @@
22721 #ifdef CONFIG_FB_AU1100
22722 { "au1100fb", au1100fb_init, au1100fb_setup },
22723 #endif
22724 +#ifdef CONFIG_FB_AU1200
22725 + { "au1200fb", au1200fb_init, au1200fb_setup },
22726 +#endif
22727 #ifdef CONFIG_FB_IT8181
22728 { "it8181fb", it8181fb_init, it8181fb_setup },
22729 #endif
22730 diff -Nur linux-2.4.30/drivers/video/ims332.h linux-2.4.30-mips/drivers/video/ims332.h
22731 --- linux-2.4.30/drivers/video/ims332.h 1970-01-01 01:00:00.000000000 +0100
22732 +++ linux-2.4.30-mips/drivers/video/ims332.h 2003-12-22 17:02:20.000000000 +0100
22733 @@ -0,0 +1,275 @@
22734 +/*
22735 + * linux/drivers/video/ims332.h
22736 + *
22737 + * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
22738 + *
22739 + * This file is subject to the terms and conditions of the GNU General
22740 + * Public License. See the file COPYING in the main directory of this
22741 + * archive for more details.
22742 + */
22743 +#include <linux/types.h>
22744 +
22745 +/*
22746 + * IMS332 16-bit wide, 128-bit aligned registers.
22747 + */
22748 +struct _ims332_reg {
22749 + volatile u16 r;
22750 + u16 pad[7];
22751 +};
22752 +
22753 +struct _ims332_regs {
22754 +#define IMS332_BOOT_PLL_MUTLIPLIER 0x00001f
22755 +#define IMS332_BOOT_CLOCK_SOURCE_SEL 0x000020
22756 +#define IMS332_BOOT_ADDRESS_ALIGNMENT 0x000040
22757 +#define IMS332_BOOT_WRITE_ZERO 0xffff80
22758 + struct _ims332_reg boot;
22759 + struct _ims332_reg pad0[0x020 - 0x000];
22760 + struct _ims332_reg half_sync;
22761 + struct _ims332_reg back_porch;
22762 + struct _ims332_reg display;
22763 + struct _ims332_reg short_display;
22764 + struct _ims332_reg broad_pulse;
22765 + struct _ims332_reg vsync;
22766 + struct _ims332_reg vpre_equalise;
22767 + struct _ims332_reg vpost_equalise;
22768 + struct _ims332_reg vblank;
22769 + struct _ims332_reg vdisplay;
22770 + struct _ims332_reg line_time;
22771 + struct _ims332_reg line_start;
22772 + struct _ims332_reg mem_init;
22773 + struct _ims332_reg transfer_delay;
22774 + struct _ims332_reg pad1[0x03f - 0x02e];
22775 + struct _ims332_reg pixel_address_mask;
22776 + struct _ims332_reg pad2[0x05f - 0x040];
22777 +
22778 +#define IMS332_CTRL_A_BOOT_ENABLE_VTG 0x000001
22779 +#define IMS332_CTRL_A_SCREEN_FORMAT 0x000002
22780 +#define IMS332_CTRL_A_INTERLACED_STANDARD 0x000004
22781 +#define IMS332_CTRL_A_OPERATING_MODE 0x000008
22782 +#define IMS332_CTRL_A_FRAME_FLYBACK_PATTERN 0x000010
22783 +#define IMS332_CTRL_A_DIGITAL_SYNC_FORMAT 0x000020
22784 +#define IMS332_CTRL_A_ANALOGUE_VIDEO_FORMAT 0x000040
22785 +#define IMS332_CTRL_A_BLANK_LEVEL 0x000080
22786 +#define IMS332_CTRL_A_BLANK_IO 0x000100
22787 +#define IMS332_CTRL_A_BLANK_FUNCTION_SWITCH 0x000200
22788 +#define IMS332_CTRL_A_FORCE_BLANKING 0x000400
22789 +#define IMS332_CTRL_A_TURN_OFF_BLANKING 0x000800
22790 +#define IMS332_CTRL_A_VRAM_ADDRESS_INCREMENT 0x003000
22791 +#define IMS332_CTRL_A_TURN_OFF_DMA 0x004000
22792 +#define IMS332_CTRL_A_SYNC_DELAY 0x038000
22793 +#define IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING 0x040000
22794 +#define IMS332_CTRL_A_DELAYED_SAMPLING 0x080000
22795 +#define IMS332_CTRL_A_BITS_PER_PIXEL 0x700000
22796 +#define IMS332_CTRL_A_CURSOR_DISABLE 0x800000
22797 + struct _ims332_reg config_control_a;
22798 + struct _ims332_reg pad3[0x06f - 0x060];
22799 +
22800 +#define IMS332_CTRL_B_WRITE_ZERO 0xffffff
22801 + struct _ims332_reg config_control_b;
22802 + struct _ims332_reg pad4[0x07f - 0x070];
22803 + struct _ims332_reg screen_top;
22804 + struct _ims332_reg pad5[0x0a0 - 0x080];
22805 + /* cursor color palette, 3 entries, reg no. 0xa1 - 0xa3 */
22806 + struct _ims332_reg cursor_color_palette0;
22807 + struct _ims332_reg cursor_color_palette1;
22808 + struct _ims332_reg cursor_color_palette2;
22809 + struct _ims332_reg pad6[0x0bf - 0x0a3];
22810 + struct _ims332_reg rgb_frame_checksum0;
22811 + struct _ims332_reg rgb_frame_checksum1;
22812 + struct _ims332_reg rgb_frame_checksum2;
22813 + struct _ims332_reg pad7[0x0c6 - 0x0c2];
22814 + struct _ims332_reg cursor_start;
22815 + struct _ims332_reg pad8[0x0ff - 0x0c7];
22816 + /* color palette, 256 entries of form 0x00BBGGRR, reg no. 0x100 - 0x1ff */
22817 + struct _ims332_reg color_palette[0x1ff - 0x0ff];
22818 + /* hardware cursor bitmap, reg no. 0x200 - 0x3ff */
22819 + struct _ims332_reg cursor_ram[0x3ff - 0x1ff];
22820 +};
22821 +
22822 +/*
22823 + * In the functions below we use some weird looking helper variables to
22824 + * access most members of this struct, otherwise the compiler splits
22825 + * the read/write in two byte accesses.
22826 + */
22827 +struct ims332_regs {
22828 + struct _ims332_regs rw;
22829 + char pad0[0x80000 - sizeof (struct _ims332_regs)];
22830 + struct _ims332_regs r;
22831 + char pad1[0xa0000 - (sizeof (struct _ims332_regs) + 0x80000)];
22832 + struct _ims332_regs w;
22833 +} __attribute__((packed));
22834 +
22835 +static inline void ims332_control_reg_bits(struct ims332_regs *regs, u32 mask,
22836 + u32 val)
22837 +{
22838 + volatile u16 *ctr = &(regs->r.config_control_a.r);
22839 + volatile u16 *ctw = &(regs->w.config_control_a.r);
22840 + u32 ctrl;
22841 +
22842 + mb();
22843 + ctrl = *ctr;
22844 + rmb();
22845 + ctrl |= ((regs->rw.boot.r << 8) & 0x00ff0000);
22846 + ctrl |= val & mask;
22847 + ctrl &= ~(~val & mask);
22848 + wmb();
22849 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
22850 + wmb();
22851 + *ctw = ctrl & 0xffff;
22852 +}
22853 +
22854 +/* FIXME: This is maxinefb specific. */
22855 +static inline void ims332_bootstrap(struct ims332_regs *regs)
22856 +{
22857 + volatile u16 *ctw = &(regs->w.config_control_a.r);
22858 + u32 ctrl = IMS332_CTRL_A_BOOT_ENABLE_VTG | IMS332_CTRL_A_TURN_OFF_DMA;
22859 +
22860 + /* bootstrap sequence */
22861 + mb();
22862 + regs->rw.boot.r = 0;
22863 + wmb();
22864 + *ctw = 0;
22865 +
22866 + /* init control A register */
22867 + wmb();
22868 + regs->rw.boot.r = (ctrl >> 8) & 0xff00;
22869 + wmb();
22870 + *ctw = ctrl & 0xffff;
22871 +}
22872 +
22873 +static inline void ims332_blank_screen(struct ims332_regs *regs, int blank)
22874 +{
22875 + ims332_control_reg_bits(regs, IMS332_CTRL_A_FORCE_BLANKING,
22876 + blank ? IMS332_CTRL_A_FORCE_BLANKING : 0);
22877 +}
22878 +
22879 +static inline void ims332_set_color_depth(struct ims332_regs *regs, u32 depth)
22880 +{
22881 + u32 dp;
22882 + u32 mask = (IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING
22883 + | IMS332_CTRL_A_DELAYED_SAMPLING
22884 + | IMS332_CTRL_A_BITS_PER_PIXEL);
22885 +
22886 + switch (depth) {
22887 + case 1: dp = 0 << 20; break;
22888 + case 2: dp = 1 << 20; break;
22889 + case 4: dp = 2 << 20; break;
22890 + case 8: dp = 3 << 20; break;
22891 + case 15: dp = (4 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
22892 + case 16: dp = (5 << 20) | IMS332_CTRL_A_PIXEL_PORT_INTERLEAVING; break;
22893 + default: return;
22894 + }
22895 + ims332_control_reg_bits(regs, mask, dp);
22896 +
22897 + if (depth <= 8) {
22898 + volatile u16 *pmask = &(regs->w.pixel_address_mask.r);
22899 + u32 dm = (1 << depth) - 1;
22900 +
22901 + wmb();
22902 + regs->rw.boot.r = dm << 8;
22903 + wmb();
22904 + *pmask = dm << 8 | dm;
22905 + }
22906 +}
22907 +
22908 +static inline void ims332_set_screen_top(struct ims332_regs *regs, u16 top)
22909 +{
22910 + volatile u16 *st = &(regs->w.screen_top.r);
22911 +
22912 + mb();
22913 + *st = top & 0xffff;
22914 +}
22915 +
22916 +static inline void ims332_enable_cursor(struct ims332_regs *regs, int on)
22917 +{
22918 + ims332_control_reg_bits(regs, IMS332_CTRL_A_CURSOR_DISABLE,
22919 + on ? 0 : IMS332_CTRL_A_CURSOR_DISABLE);
22920 +}
22921 +
22922 +static inline void ims332_position_cursor(struct ims332_regs *regs,
22923 + u16 x, u16 y)
22924 +{
22925 + volatile u16 *cp = &(regs->w.cursor_start.r);
22926 + u32 val = ((x & 0xfff) << 12) | (y & 0xfff);
22927 +
22928 + if (x > 2303 || y > 2303)
22929 + return;
22930 +
22931 + mb();
22932 + regs->rw.boot.r = (val >> 8) & 0xff00;
22933 + wmb();
22934 + *cp = val & 0xffff;
22935 +}
22936 +
22937 +static inline void ims332_set_font(struct ims332_regs *regs, u8 fgc,
22938 + u16 width, u16 height)
22939 +{
22940 + volatile u16 *cp0 = &(regs->w.cursor_color_palette0.r);
22941 + int i;
22942 +
22943 + mb();
22944 + for (i = 0; i < 0x200; i++) {
22945 + volatile u16 *cram = &(regs->w.cursor_ram[i].r);
22946 +
22947 + if (height << 6 <= i << 3)
22948 + *cram = 0x0000;
22949 + else if (width <= i % 8 << 3)
22950 + *cram = 0x0000;
22951 + else if (((width >> 3) & 0xffff) > i % 8)
22952 + *cram = 0x5555;
22953 + else
22954 + *cram = 0x5555 & ~(0xffff << (width % 8 << 1));
22955 + wmb();
22956 + }
22957 + regs->rw.boot.r = fgc << 8;
22958 + wmb();
22959 + *cp0 = fgc << 8 | fgc;
22960 +}
22961 +
22962 +static inline void ims332_read_cmap(struct ims332_regs *regs, u8 reg,
22963 + u8* red, u8* green, u8* blue)
22964 +{
22965 + volatile u16 *rptr = &(regs->r.color_palette[reg].r);
22966 + u16 val;
22967 +
22968 + mb();
22969 + val = *rptr;
22970 + *red = val & 0xff;
22971 + *green = (val >> 8) & 0xff;
22972 + rmb();
22973 + *blue = (regs->rw.boot.r >> 8) & 0xff;
22974 +}
22975 +
22976 +static inline void ims332_write_cmap(struct ims332_regs *regs, u8 reg,
22977 + u8 red, u8 green, u8 blue)
22978 +{
22979 + volatile u16 *wptr = &(regs->w.color_palette[reg].r);
22980 +
22981 + mb();
22982 + regs->rw.boot.r = blue << 8;
22983 + wmb();
22984 + *wptr = (green << 8) + red;
22985 +}
22986 +
22987 +static inline void ims332_dump_regs(struct ims332_regs *regs)
22988 +{
22989 + int i;
22990 +
22991 + printk(__FUNCTION__);
22992 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG, 0);
22993 + for (i = 0; i < 0x100; i++) {
22994 + volatile u16 *cpad = (u16 *)((char *)(&regs->r) + sizeof(struct _ims332_reg) * i);
22995 + u32 val;
22996 +
22997 + val = *cpad;
22998 + rmb();
22999 + val |= regs->rw.boot.r << 8;
23000 + rmb();
23001 + if (! (i % 8))
23002 + printk("\n%02x:", i);
23003 + printk(" %06x", val);
23004 + }
23005 + ims332_control_reg_bits(regs, IMS332_CTRL_A_BOOT_ENABLE_VTG,
23006 + IMS332_CTRL_A_BOOT_ENABLE_VTG);
23007 + printk("\n");
23008 +}
23009 diff -Nur linux-2.4.30/drivers/video/maxinefb.h linux-2.4.30-mips/drivers/video/maxinefb.h
23010 --- linux-2.4.30/drivers/video/maxinefb.h 2003-08-25 13:44:42.000000000 +0200
23011 +++ linux-2.4.30-mips/drivers/video/maxinefb.h 1970-01-01 01:00:00.000000000 +0100
23012 @@ -1,38 +0,0 @@
23013 -/*
23014 - * linux/drivers/video/maxinefb.h
23015 - *
23016 - * DECstation 5000/xx onboard framebuffer support, Copyright (C) 1999 by
23017 - * Michael Engel <engel@unix-ag.org> and Karsten Merker <merker@guug.de>
23018 - * This file is subject to the terms and conditions of the GNU General
23019 - * Public License. See the file COPYING in the main directory of this
23020 - * archive for more details.
23021 - */
23022 -
23023 -#include <asm/addrspace.h>
23024 -
23025 -/*
23026 - * IMS332 video controller register base address
23027 - */
23028 -#define MAXINEFB_IMS332_ADDRESS KSEG1ADDR(0x1c140000)
23029 -
23030 -/*
23031 - * Begin of DECstation 5000/xx onboard framebuffer memory, default resolution
23032 - * is 1024x768x8
23033 - */
23034 -#define DS5000_xx_ONBOARD_FBMEM_START KSEG1ADDR(0x0a000000)
23035 -
23036 -/*
23037 - * The IMS 332 video controller used in the DECstation 5000/xx series
23038 - * uses 32 bits wide registers; the following defines declare the
23039 - * register numbers, to get the real offset, these have to be multiplied
23040 - * by four.
23041 - */
23042 -
23043 -#define IMS332_REG_CURSOR_RAM 0x200 /* hardware cursor bitmap */
23044 -
23045 -/*
23046 - * The color palette entries have the form 0x00BBGGRR
23047 - */
23048 -#define IMS332_REG_COLOR_PALETTE 0x100 /* color palette, 256 entries */
23049 -#define IMS332_REG_CURSOR_COLOR_PALETTE 0x0a1 /* cursor color palette, */
23050 - /* 3 entries */
23051 diff -Nur linux-2.4.30/drivers/video/newport_con.c linux-2.4.30-mips/drivers/video/newport_con.c
23052 --- linux-2.4.30/drivers/video/newport_con.c 2003-08-25 13:44:42.000000000 +0200
23053 +++ linux-2.4.30-mips/drivers/video/newport_con.c 2004-09-23 15:32:29.000000000 +0200
23054 @@ -22,6 +22,7 @@
23055 #include <linux/module.h>
23056 #include <linux/slab.h>
23057
23058 +#include <asm/io.h>
23059 #include <asm/uaccess.h>
23060 #include <asm/system.h>
23061 #include <asm/page.h>
23062 @@ -77,7 +78,7 @@
23063 static inline void newport_render_background(int xstart, int ystart,
23064 int xend, int yend, int ci)
23065 {
23066 - newport_wait();
23067 + newport_wait(npregs);
23068 npregs->set.wrmask = 0xffffffff;
23069 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23070 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23071 @@ -94,7 +95,7 @@
23072 unsigned short i;
23073
23074 for (i = 0; i < 16; i++) {
23075 - newport_bfwait();
23076 + newport_bfwait(npregs);
23077 newport_cmap_setaddr(npregs, color_table[i]);
23078 newport_cmap_setrgb(npregs,
23079 default_red[i],
23080 @@ -107,7 +108,7 @@
23081 unsigned long i;
23082
23083 for (i = 0; i < LINUX_LOGO_COLORS; i++) {
23084 - newport_bfwait();
23085 + newport_bfwait(npregs);
23086 newport_cmap_setaddr(npregs, i + 0x20);
23087 newport_cmap_setrgb(npregs,
23088 linux_logo_red[i],
23089 @@ -115,13 +116,13 @@
23090 linux_logo_blue[i]);
23091 }
23092
23093 - newport_wait();
23094 + newport_wait(npregs);
23095 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23096 NPORT_DMODE0_CHOST);
23097
23098 npregs->set.xystarti = ((newport_xsize - LOGO_W) << 16) | (0);
23099 npregs->set.xyendi = ((newport_xsize - 1) << 16);
23100 - newport_wait();
23101 + newport_wait(npregs);
23102
23103 for (i = 0; i < LOGO_W * LOGO_H; i++)
23104 npregs->go.hostrw0 = linux_logo[i] << 24;
23105 @@ -133,7 +134,7 @@
23106 if (logo_active)
23107 return;
23108
23109 - newport_wait();
23110 + newport_wait(npregs);
23111 npregs->set.wrmask = 0xffffffff;
23112 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23113 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23114 @@ -155,7 +156,7 @@
23115 unsigned short treg;
23116 int i;
23117
23118 - newport_wait();
23119 + newport_wait(npregs);
23120 treg = newport_vc2_get(npregs, VC2_IREG_CONTROL);
23121 newport_vc2_set(npregs, VC2_IREG_CONTROL,
23122 (treg | VC2_CTRL_EVIDEO));
23123 @@ -165,7 +166,7 @@
23124 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23125 NPORT_DMODE_W2 | VC2_PROTOCOL);
23126 for (i = 0; i < 128; i++) {
23127 - newport_bfwait();
23128 + newport_bfwait(npregs);
23129 if (i == 92 || i == 94)
23130 npregs->set.dcbdata0.byshort.s1 = 0xff00;
23131 else
23132 @@ -205,7 +206,7 @@
23133 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23134 NPORT_DMODE_W2 | VC2_PROTOCOL);
23135 for (i = 0; i < 128; i++) {
23136 - newport_bfwait();
23137 + newport_bfwait(npregs);
23138 linetable[i] = npregs->set.dcbdata0.byshort.s1;
23139 }
23140
23141 @@ -216,12 +217,12 @@
23142 npregs->set.dcbmode = (NPORT_DMODE_AVC2 | VC2_REGADDR_RAM |
23143 NPORT_DMODE_W2 | VC2_PROTOCOL);
23144 do {
23145 - newport_bfwait();
23146 + newport_bfwait(npregs);
23147 treg = npregs->set.dcbdata0.byshort.s1;
23148 if ((treg & 1) == 0)
23149 cols += (treg >> 7) & 0xfe;
23150 if ((treg & 0x80) == 0) {
23151 - newport_bfwait();
23152 + newport_bfwait(npregs);
23153 treg = npregs->set.dcbdata0.byshort.s1;
23154 }
23155 } while ((treg & 0x8000) == 0);
23156 @@ -291,16 +292,16 @@
23157
23158 if (!sgi_gfxaddr)
23159 return NULL;
23160 - npregs = (struct newport_regs *) (KSEG1 + sgi_gfxaddr);
23161 + npregs = (struct newport_regs *) /* ioremap cannot fail */
23162 + ioremap(sgi_gfxaddr, sizeof(struct newport_regs));
23163 npregs->cset.config = NPORT_CFG_GD0;
23164
23165 - if (newport_wait()) {
23166 - return NULL;
23167 - }
23168 + if (newport_wait(npregs))
23169 + goto out_unmap;
23170
23171 npregs->set.xstarti = TESTVAL;
23172 if (npregs->set._xstart.word != XSTI_TO_FXSTART(TESTVAL))
23173 - return NULL;
23174 + goto out_unmap;
23175
23176 for (i = 0; i < MAX_NR_CONSOLES; i++)
23177 font_data[i] = FONT_DATA;
23178 @@ -310,6 +311,10 @@
23179 newport_get_screensize();
23180
23181 return "SGI Newport";
23182 +
23183 +out_unmap:
23184 + iounmap((void *)npregs);
23185 + return NULL;
23186 }
23187
23188 static void newport_init(struct vc_data *vc, int init)
23189 @@ -363,7 +368,7 @@
23190 (charattr & 0xf0) >> 4);
23191
23192 /* Set the color and drawing mode. */
23193 - newport_wait();
23194 + newport_wait(npregs);
23195 npregs->set.colori = charattr & 0xf;
23196 npregs->set.drawmode0 = (NPORT_DMODE0_DRAW | NPORT_DMODE0_BLOCK |
23197 NPORT_DMODE0_STOPX | NPORT_DMODE0_ZPENAB |
23198 @@ -372,7 +377,7 @@
23199 /* Set coordinates for bitmap operation. */
23200 npregs->set.xystarti = (xpos << 16) | ((ypos + topscan) & 0x3ff);
23201 npregs->set.xyendi = ((xpos + 7) << 16);
23202 - newport_wait();
23203 + newport_wait(npregs);
23204
23205 /* Go, baby, go... */
23206 RENDER(npregs, p);
23207 @@ -396,7 +401,7 @@
23208 xpos + ((count - 1) << 3), ypos,
23209 (charattr & 0xf0) >> 4);
23210
23211 - newport_wait();
23212 + newport_wait(npregs);
23213
23214 /* Set the color and drawing mode. */
23215 npregs->set.colori = charattr & 0xf;
23216 @@ -407,7 +412,7 @@
23217 for (i = 0; i < count; i++, xpos += 8) {
23218 p = &font_data[vc->vc_num][(scr_readw(s++) & 0xff) << 4];
23219
23220 - newport_wait();
23221 + newport_wait(npregs);
23222
23223 /* Set coordinates for bitmap operation. */
23224 npregs->set.xystarti =
23225 @@ -689,7 +694,7 @@
23226 xe = xs;
23227 xs = tmp;
23228 }
23229 - newport_wait();
23230 + newport_wait(npregs);
23231 npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
23232 NPORT_DMODE0_DOSETUP | NPORT_DMODE0_STOPX
23233 | NPORT_DMODE0_STOPY);
23234 @@ -706,35 +711,35 @@
23235 #define DUMMY (void *) newport_dummy
23236
23237 const struct consw newport_con = {
23238 - con_startup: newport_startup,
23239 - con_init: newport_init,
23240 - con_deinit: newport_deinit,
23241 - con_clear: newport_clear,
23242 - con_putc: newport_putc,
23243 - con_putcs: newport_putcs,
23244 - con_cursor: newport_cursor,
23245 - con_scroll: newport_scroll,
23246 - con_bmove: newport_bmove,
23247 - con_switch: newport_switch,
23248 - con_blank: newport_blank,
23249 - con_font_op: newport_font_op,
23250 - con_set_palette: newport_set_palette,
23251 - con_scrolldelta: newport_scrolldelta,
23252 - con_set_origin: DUMMY,
23253 - con_save_screen: DUMMY
23254 + .con_startup = newport_startup,
23255 + .con_init = newport_init,
23256 + .con_deinit = newport_deinit,
23257 + .con_clear = newport_clear,
23258 + .con_putc = newport_putc,
23259 + .con_putcs = newport_putcs,
23260 + .con_cursor = newport_cursor,
23261 + .con_scroll = newport_scroll,
23262 + .con_bmove = newport_bmove,
23263 + .con_switch = newport_switch,
23264 + .con_blank = newport_blank,
23265 + .con_font_op = newport_font_op,
23266 + .con_set_palette = newport_set_palette,
23267 + .con_scrolldelta = newport_scrolldelta,
23268 + .con_set_origin = DUMMY,
23269 + .con_save_screen = DUMMY
23270 };
23271
23272 #ifdef MODULE
23273 static int __init newport_console_init(void)
23274 {
23275 take_over_console(&newport_con, 0, MAX_NR_CONSOLES - 1, 1);
23276 -
23277 return 0;
23278 }
23279
23280 static void __exit newport_console_exit(void)
23281 {
23282 give_up_console(&newport_con);
23283 + iounmap((void *)npregs);
23284 }
23285
23286 module_init(newport_console_init);
23287 diff -Nur linux-2.4.30/drivers/video/tgafb.c linux-2.4.30-mips/drivers/video/tgafb.c
23288 --- linux-2.4.30/drivers/video/tgafb.c 2001-11-14 23:52:20.000000000 +0100
23289 +++ linux-2.4.30-mips/drivers/video/tgafb.c 2004-10-30 01:15:02.000000000 +0200
23290 @@ -45,6 +45,15 @@
23291 #include <linux/console.h>
23292 #include <asm/io.h>
23293
23294 +#ifdef CONFIG_TC
23295 +#include <asm/dec/tc.h>
23296 +#else
23297 +static int search_tc_card(const char *) { return -1; }
23298 +static void claim_tc_card(int) { }
23299 +static void release_tc_card(int) { }
23300 +static unsigned long get_tc_base_addr(int) { return 0; }
23301 +#endif
23302 +
23303 #include <video/fbcon.h>
23304 #include <video/fbcon-cfb8.h>
23305 #include <video/fbcon-cfb32.h>
23306 @@ -84,10 +93,10 @@
23307 };
23308
23309 static unsigned int deep_presets[4] = {
23310 - 0x00014000,
23311 - 0x0001440d,
23312 + 0x00004000,
23313 + 0x0000440d,
23314 0xffffffff,
23315 - 0x0001441d
23316 + 0x0000441d
23317 };
23318
23319 static unsigned int rasterop_presets[4] = {
23320 @@ -131,6 +140,13 @@
23321 0,
23322 FB_VMODE_NONINTERLACED
23323 }},
23324 + { "1280x1024-72", { /* mode #0 of PMAGD boards */
23325 + 1280, 1024, 1280, 1024, 0, 0, 0, 0,
23326 + {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
23327 + 0, 0, -1, -1, FB_ACCELF_TEXT, 7692, 232, 32, 34, 3, 160, 3,
23328 + FB_SYNC_ON_GREEN,
23329 + FB_VMODE_NONINTERLACED
23330 + }},
23331 { "800x600-56", {
23332 800, 600, 800, 600, 0, 0, 0, 0,
23333 {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0},
23334 @@ -488,7 +504,8 @@
23335 continue;
23336
23337 mb();
23338 - TGA_WRITE_REG(deep_presets[fb_info.tga_type], TGA_DEEP_REG);
23339 + TGA_WRITE_REG(deep_presets[fb_info.tga_type] |
23340 + (par->sync_on_green ? 0x0 : 0x00010000), TGA_DEEP_REG);
23341 while (TGA_READ_REG(TGA_CMD_STAT_REG) & 1) /* wait for not busy */
23342 continue;
23343 mb();
23344 @@ -548,7 +565,7 @@
23345 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_0, 0x40);
23346 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_1, 0x08);
23347 BT463_WRITE(BT463_REG_ACC, BT463_CMD_REG_2,
23348 - (par->sync_on_green ? 0x80 : 0x40));
23349 + (par->sync_on_green ? 0xc0 : 0x40));
23350
23351 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_0, 0xff);
23352 BT463_WRITE(BT463_REG_ACC, BT463_READ_MASK_1, 0xff);
23353 @@ -921,19 +938,34 @@
23354 int __init tgafb_init(void)
23355 {
23356 struct pci_dev *pdev;
23357 + int slot;
23358
23359 pdev = pci_find_device(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, NULL);
23360 if (!pdev)
23361 + slot = search_tc_card("PMAGD");
23362 + if (!pdev && slot < 0)
23363 return -ENXIO;
23364
23365 /* divine board type */
23366
23367 - fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start, 0);
23368 - fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
23369 - fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
23370 - fb_info.tga_fb_base = (fb_info.tga_mem_base
23371 + if (pdev) {
23372 + fb_info.tga_mem_base = (unsigned long)ioremap(pdev->resource[0].start,
23373 + 0);
23374 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f;
23375 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
23376 + fb_info.tga_fb_base = (fb_info.tga_mem_base
23377 + fb_offset_presets[fb_info.tga_type]);
23378 - pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
23379 + pci_read_config_byte(pdev, PCI_REVISION_ID, &fb_info.tga_chip_rev);
23380 +
23381 + } else {
23382 + claim_tc_card(slot);
23383 + fb_info.tga_mem_base = get_tc_base_addr(slot);
23384 + fb_info.tga_type = (readl(fb_info.tga_mem_base) >> 12) & 0x0f; /* ? */
23385 + fb_info.tga_regs_base = fb_info.tga_mem_base + TGA_REGS_OFFSET;
23386 + fb_info.tga_fb_base = (fb_info.tga_mem_base
23387 + + fb_offset_presets[fb_info.tga_type]);
23388 + fb_info.tga_chip_rev = TGA_READ_REG(TGA_START_REG) & 0xff;
23389 + }
23390
23391 /* setup framebuffer */
23392
23393 @@ -950,40 +982,62 @@
23394 fb_info.gen.fbhw = &tgafb_hwswitch;
23395 fb_info.gen.fbhw->detect();
23396
23397 - printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", fb_info.tga_chip_rev);
23398 - printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
23399 - pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
23400 + if (pdev) {
23401 + printk (KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n",
23402 + fb_info.tga_chip_rev);
23403 + printk (KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n",
23404 + pdev->bus->number,
23405 + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
23406 + } else {
23407 + printk (KERN_INFO "tgafb: SFB+ detected, rev=0x%02x\n",
23408 + fb_info.tga_chip_rev);
23409 + }
23410
23411 switch (fb_info.tga_type)
23412 {
23413 case TGA_TYPE_8PLANE:
23414 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
23415 + if (pdev)
23416 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E1");
23417 + else
23418 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E1");
23419 break;
23420
23421 case TGA_TYPE_24PLANE:
23422 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
23423 + if (pdev)
23424 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E2");
23425 + else
23426 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E2");
23427 break;
23428
23429 case TGA_TYPE_24PLUSZ:
23430 - strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
23431 + if (pdev)
23432 + strcpy (fb_info.gen.info.modename,"Digital ZLXp-E3");
23433 + else
23434 + strcpy (fb_info.gen.info.modename,"Digital ZLX-E3");
23435 break;
23436 }
23437
23438 /* This should give a reasonable default video mode */
23439
23440 if (!default_var_valid) {
23441 - default_var = tgafb_predefined[0].var;
23442 + if (pdev)
23443 + default_var = tgafb_predefined[0].var;
23444 + else
23445 + default_var = tgafb_predefined[1].var;
23446 }
23447 fbgen_get_var(&disp.var, -1, &fb_info.gen.info);
23448 disp.var.activate = FB_ACTIVATE_NOW;
23449 fbgen_do_set_var(&disp.var, 1, &fb_info.gen);
23450 fbgen_set_disp(-1, &fb_info.gen);
23451 fbgen_install_cmap(0, &fb_info.gen);
23452 - if (register_framebuffer(&fb_info.gen.info) < 0)
23453 + if (register_framebuffer(&fb_info.gen.info) < 0) {
23454 + if (slot >= 0)
23455 + release_tc_card(slot);
23456 return -EINVAL;
23457 - printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n",
23458 + }
23459 + printk(KERN_INFO "fb%d: %s frame buffer device at 0x%llx\n",
23460 GET_FB_IDX(fb_info.gen.info.node), fb_info.gen.info.modename,
23461 - pdev->resource[0].start);
23462 + fb_info.tga_mem_base);
23463 return 0;
23464 }
23465
23466 diff -Nur linux-2.4.30/drivers/video/tgafb.h linux-2.4.30-mips/drivers/video/tgafb.h
23467 --- linux-2.4.30/drivers/video/tgafb.h 2000-04-12 18:47:28.000000000 +0200
23468 +++ linux-2.4.30-mips/drivers/video/tgafb.h 2004-10-30 01:15:02.000000000 +0200
23469 @@ -36,6 +36,7 @@
23470 #define TGA_RASTEROP_REG 0x0034
23471 #define TGA_PIXELSHIFT_REG 0x0038
23472 #define TGA_DEEP_REG 0x0050
23473 +#define TGA_START_REG 0x0054
23474 #define TGA_PIXELMASK_REG 0x005c
23475 #define TGA_CURSOR_BASE_REG 0x0060
23476 #define TGA_HORIZ_REG 0x0064
23477 diff -Nur linux-2.4.30/fs/binfmt_elf.c linux-2.4.30-mips/fs/binfmt_elf.c
23478 --- linux-2.4.30/fs/binfmt_elf.c 2005-04-04 03:42:20.000000000 +0200
23479 +++ linux-2.4.30-mips/fs/binfmt_elf.c 2005-04-05 21:09:57.000000000 +0200
23480 @@ -660,6 +660,9 @@
23481 bprm->argc++;
23482 }
23483 }
23484 + } else {
23485 + /* Executables without an interpreter also need a personality */
23486 + SET_PERSONALITY(elf_ex, ibcs2_interpreter);
23487 }
23488
23489 /* Flush all traces of the currently running executable */
23490 @@ -1211,7 +1214,11 @@
23491 elf.e_entry = 0;
23492 elf.e_phoff = sizeof(elf);
23493 elf.e_shoff = 0;
23494 +#ifdef ELF_CORE_EFLAGS
23495 + elf.e_flags = ELF_CORE_EFLAGS;
23496 +#else
23497 elf.e_flags = 0;
23498 +#endif
23499 elf.e_ehsize = sizeof(elf);
23500 elf.e_phentsize = sizeof(struct elf_phdr);
23501 elf.e_phnum = segs+1; /* Include notes */
23502 diff -Nur linux-2.4.30/fs/partitions/sgi.c linux-2.4.30-mips/fs/partitions/sgi.c
23503 --- linux-2.4.30/fs/partitions/sgi.c 2001-10-02 05:03:26.000000000 +0200
23504 +++ linux-2.4.30-mips/fs/partitions/sgi.c 2004-08-11 22:30:07.000000000 +0200
23505 @@ -17,6 +17,11 @@
23506 #include "check.h"
23507 #include "sgi.h"
23508
23509 +#if CONFIG_BLK_DEV_MD
23510 +extern void md_autodetect_dev(kdev_t dev);
23511 +#endif
23512 +
23513 +
23514 int sgi_partition(struct gendisk *hd, struct block_device *bdev, unsigned long first_sector, int current_minor)
23515 {
23516 int i, csum, magic;
23517 @@ -77,6 +82,10 @@
23518 if(!blocks)
23519 continue;
23520 add_gd_partition(hd, current_minor, start, blocks);
23521 +#ifdef CONFIG_BLK_DEV_MD
23522 + if (be32_to_cpu(p->type) == LINUX_RAID_PARTITION)
23523 + md_autodetect_dev(MKDEV(hd->major, current_minor));
23524 +#endif
23525 current_minor++;
23526 }
23527 printk("\n");
23528 diff -Nur linux-2.4.30/fs/proc/array.c linux-2.4.30-mips/fs/proc/array.c
23529 --- linux-2.4.30/fs/proc/array.c 2005-01-19 15:10:11.000000000 +0100
23530 +++ linux-2.4.30-mips/fs/proc/array.c 2004-11-29 18:47:18.000000000 +0100
23531 @@ -368,15 +368,15 @@
23532 task->cmin_flt,
23533 task->maj_flt,
23534 task->cmaj_flt,
23535 - task->times.tms_utime,
23536 - task->times.tms_stime,
23537 - task->times.tms_cutime,
23538 - task->times.tms_cstime,
23539 + hz_to_std(task->times.tms_utime),
23540 + hz_to_std(task->times.tms_stime),
23541 + hz_to_std(task->times.tms_cutime),
23542 + hz_to_std(task->times.tms_cstime),
23543 priority,
23544 nice,
23545 0UL /* removed */,
23546 task->it_real_value,
23547 - task->start_time,
23548 + hz_to_std(task->start_time),
23549 vsize,
23550 mm ? mm->rss : 0, /* you might want to shift this left 3 */
23551 task->rlim[RLIMIT_RSS].rlim_cur,
23552 @@ -615,14 +615,14 @@
23553
23554 len = sprintf(buffer,
23555 "cpu %lu %lu\n",
23556 - task->times.tms_utime,
23557 - task->times.tms_stime);
23558 + hz_to_std(task->times.tms_utime),
23559 + hz_to_std(task->times.tms_stime));
23560
23561 for (i = 0 ; i < smp_num_cpus; i++)
23562 len += sprintf(buffer + len, "cpu%d %lu %lu\n",
23563 i,
23564 - task->per_cpu_utime[cpu_logical_map(i)],
23565 - task->per_cpu_stime[cpu_logical_map(i)]);
23566 + hz_to_std(task->per_cpu_utime[cpu_logical_map(i)]),
23567 + hz_to_std(task->per_cpu_stime[cpu_logical_map(i)]));
23568
23569 return len;
23570 }
23571 diff -Nur linux-2.4.30/fs/proc/proc_misc.c linux-2.4.30-mips/fs/proc/proc_misc.c
23572 --- linux-2.4.30/fs/proc/proc_misc.c 2004-08-08 01:26:06.000000000 +0200
23573 +++ linux-2.4.30-mips/fs/proc/proc_misc.c 2004-08-14 20:39:01.000000000 +0200
23574 @@ -308,16 +308,16 @@
23575 {
23576 int i, len = 0;
23577 extern unsigned long total_forks;
23578 - unsigned long jif = jiffies;
23579 + unsigned long jif = hz_to_std(jiffies);
23580 unsigned int sum = 0, user = 0, nice = 0, system = 0;
23581 int major, disk;
23582
23583 for (i = 0 ; i < smp_num_cpus; i++) {
23584 int cpu = cpu_logical_map(i), j;
23585
23586 - user += kstat.per_cpu_user[cpu];
23587 - nice += kstat.per_cpu_nice[cpu];
23588 - system += kstat.per_cpu_system[cpu];
23589 + user += hz_to_std(kstat.per_cpu_user[cpu]);
23590 + nice += hz_to_std(kstat.per_cpu_nice[cpu]);
23591 + system += hz_to_std(kstat.per_cpu_system[cpu]);
23592 #if !defined(CONFIG_ARCH_S390)
23593 for (j = 0 ; j < NR_IRQS ; j++)
23594 sum += kstat.irqs[cpu][j];
23595 @@ -331,10 +331,10 @@
23596 proc_sprintf(page, &off, &len,
23597 "cpu%d %u %u %u %lu\n",
23598 i,
23599 - kstat.per_cpu_user[cpu_logical_map(i)],
23600 - kstat.per_cpu_nice[cpu_logical_map(i)],
23601 - kstat.per_cpu_system[cpu_logical_map(i)],
23602 - jif - ( kstat.per_cpu_user[cpu_logical_map(i)] \
23603 + hz_to_std(kstat.per_cpu_user[cpu_logical_map(i)]),
23604 + hz_to_std(kstat.per_cpu_nice[cpu_logical_map(i)]),
23605 + hz_to_std(kstat.per_cpu_system[cpu_logical_map(i)]),
23606 + jif - hz_to_std( kstat.per_cpu_user[cpu_logical_map(i)] \
23607 + kstat.per_cpu_nice[cpu_logical_map(i)] \
23608 + kstat.per_cpu_system[cpu_logical_map(i)]));
23609 proc_sprintf(page, &off, &len,
23610 diff -Nur linux-2.4.30/include/asm-alpha/param.h linux-2.4.30-mips/include/asm-alpha/param.h
23611 --- linux-2.4.30/include/asm-alpha/param.h 2000-11-08 08:37:31.000000000 +0100
23612 +++ linux-2.4.30-mips/include/asm-alpha/param.h 2000-11-28 04:59:03.000000000 +0100
23613 @@ -13,6 +13,9 @@
23614 # else
23615 # define HZ 1200
23616 # endif
23617 +#ifdef __KERNEL__
23618 +# define hz_to_std(a) (a)
23619 +#endif
23620 #endif
23621
23622 #define EXEC_PAGESIZE 8192
23623 diff -Nur linux-2.4.30/include/asm-i386/param.h linux-2.4.30-mips/include/asm-i386/param.h
23624 --- linux-2.4.30/include/asm-i386/param.h 2000-10-27 20:04:43.000000000 +0200
23625 +++ linux-2.4.30-mips/include/asm-i386/param.h 2000-11-23 03:00:55.000000000 +0100
23626 @@ -3,6 +3,9 @@
23627
23628 #ifndef HZ
23629 #define HZ 100
23630 +#ifdef __KERNEL__
23631 +#define hz_to_std(a) (a)
23632 +#endif
23633 #endif
23634
23635 #define EXEC_PAGESIZE 4096
23636 diff -Nur linux-2.4.30/include/asm-ia64/param.h linux-2.4.30-mips/include/asm-ia64/param.h
23637 --- linux-2.4.30/include/asm-ia64/param.h 2004-04-14 15:05:40.000000000 +0200
23638 +++ linux-2.4.30-mips/include/asm-ia64/param.h 2004-04-16 05:14:20.000000000 +0200
23639 @@ -7,9 +7,15 @@
23640 * Based on <asm-i386/param.h>.
23641 *
23642 * Modified 1998, 1999, 2002-2003
23643 - * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
23644 + * David Mosberger-Tang <davidm@hpl.hp.com>, Hewlett-Packard Co
23645 */
23646
23647 +#include <linux/config.h>
23648 +
23649 +#ifdef __KERNEL__
23650 +#define hz_to_std(a) (a)
23651 +#endif
23652 +
23653 #define EXEC_PAGESIZE 65536
23654
23655 #ifndef NGROUPS
23656 diff -Nur linux-2.4.30/include/asm-m68k/param.h linux-2.4.30-mips/include/asm-m68k/param.h
23657 --- linux-2.4.30/include/asm-m68k/param.h 2001-01-04 22:00:55.000000000 +0100
23658 +++ linux-2.4.30-mips/include/asm-m68k/param.h 2001-01-11 05:02:45.000000000 +0100
23659 @@ -3,6 +3,9 @@
23660
23661 #ifndef HZ
23662 #define HZ 100
23663 +#ifdef __KERNEL__
23664 +#define hz_to_std(a) (a)
23665 +#endif
23666 #endif
23667
23668 #define EXEC_PAGESIZE 8192
23669 diff -Nur linux-2.4.30/include/asm-mips/au1000.h linux-2.4.30-mips/include/asm-mips/au1000.h
23670 --- linux-2.4.30/include/asm-mips/au1000.h 2005-01-19 15:10:11.000000000 +0100
23671 +++ linux-2.4.30-mips/include/asm-mips/au1000.h 2005-01-30 09:01:28.000000000 +0100
23672 @@ -160,28 +160,356 @@
23673 #define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
23674 #endif
23675
23676 -/* SDRAM Controller */
23677 +/*
23678 + * SDRAM Register Offsets
23679 + */
23680 #if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100)
23681 -#define MEM_SDMODE0 0xB4000000
23682 -#define MEM_SDMODE1 0xB4000004
23683 -#define MEM_SDMODE2 0xB4000008
23684 -
23685 -#define MEM_SDADDR0 0xB400000C
23686 -#define MEM_SDADDR1 0xB4000010
23687 -#define MEM_SDADDR2 0xB4000014
23688 -
23689 -#define MEM_SDREFCFG 0xB4000018
23690 -#define MEM_SDPRECMD 0xB400001C
23691 -#define MEM_SDAUTOREF 0xB4000020
23692 -
23693 -#define MEM_SDWRMD0 0xB4000024
23694 -#define MEM_SDWRMD1 0xB4000028
23695 -#define MEM_SDWRMD2 0xB400002C
23696 +#define MEM_SDMODE0 (0x0000)
23697 +#define MEM_SDMODE1 (0x0004)
23698 +#define MEM_SDMODE2 (0x0008)
23699 +#define MEM_SDADDR0 (0x000C)
23700 +#define MEM_SDADDR1 (0x0010)
23701 +#define MEM_SDADDR2 (0x0014)
23702 +#define MEM_SDREFCFG (0x0018)
23703 +#define MEM_SDPRECMD (0x001C)
23704 +#define MEM_SDAUTOREF (0x0020)
23705 +#define MEM_SDWRMD0 (0x0024)
23706 +#define MEM_SDWRMD1 (0x0028)
23707 +#define MEM_SDWRMD2 (0x002C)
23708 +#define MEM_SDSLEEP (0x0030)
23709 +#define MEM_SDSMCKE (0x0034)
23710 +
23711 +#ifndef ASSEMBLER
23712 +/*typedef volatile struct
23713 +{
23714 + uint32 sdmode0;
23715 + uint32 sdmode1;
23716 + uint32 sdmode2;
23717 + uint32 sdaddr0;
23718 + uint32 sdaddr1;
23719 + uint32 sdaddr2;
23720 + uint32 sdrefcfg;
23721 + uint32 sdautoref;
23722 + uint32 sdwrmd0;
23723 + uint32 sdwrmd1;
23724 + uint32 sdwrmd2;
23725 + uint32 sdsleep;
23726 + uint32 sdsmcke;
23727 +
23728 +} AU1X00_SDRAM;*/
23729 +#endif
23730 +
23731 +/*
23732 + * MEM_SDMODE register content definitions
23733 + */
23734 +#define MEM_SDMODE_F (1<<22)
23735 +#define MEM_SDMODE_SR (1<<21)
23736 +#define MEM_SDMODE_BS (1<<20)
23737 +#define MEM_SDMODE_RS (3<<18)
23738 +#define MEM_SDMODE_CS (7<<15)
23739 +#define MEM_SDMODE_TRAS (15<<11)
23740 +#define MEM_SDMODE_TMRD (3<<9)
23741 +#define MEM_SDMODE_TWR (3<<7)
23742 +#define MEM_SDMODE_TRP (3<<5)
23743 +#define MEM_SDMODE_TRCD (3<<3)
23744 +#define MEM_SDMODE_TCL (7<<0)
23745 +
23746 +#define MEM_SDMODE_BS_2Bank (0<<20)
23747 +#define MEM_SDMODE_BS_4Bank (1<<20)
23748 +#define MEM_SDMODE_RS_11Row (0<<18)
23749 +#define MEM_SDMODE_RS_12Row (1<<18)
23750 +#define MEM_SDMODE_RS_13Row (2<<18)
23751 +#define MEM_SDMODE_RS_N(N) ((N)<<18)
23752 +#define MEM_SDMODE_CS_7Col (0<<15)
23753 +#define MEM_SDMODE_CS_8Col (1<<15)
23754 +#define MEM_SDMODE_CS_9Col (2<<15)
23755 +#define MEM_SDMODE_CS_10Col (3<<15)
23756 +#define MEM_SDMODE_CS_11Col (4<<15)
23757 +#define MEM_SDMODE_CS_N(N) ((N)<<15)
23758 +#define MEM_SDMODE_TRAS_N(N) ((N)<<11)
23759 +#define MEM_SDMODE_TMRD_N(N) ((N)<<9)
23760 +#define MEM_SDMODE_TWR_N(N) ((N)<<7)
23761 +#define MEM_SDMODE_TRP_N(N) ((N)<<5)
23762 +#define MEM_SDMODE_TRCD_N(N) ((N)<<3)
23763 +#define MEM_SDMODE_TCL_N(N) ((N)<<0)
23764 +
23765 +/*
23766 + * MEM_SDADDR register contents definitions
23767 + */
23768 +#define MEM_SDADDR_E (1<<20)
23769 +#define MEM_SDADDR_CSBA (0x03FF<<10)
23770 +#define MEM_SDADDR_CSMASK (0x03FF<<0)
23771 +#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12)
23772 +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22)
23773 +
23774 +/*
23775 + * MEM_SDREFCFG register content definitions
23776 + */
23777 +#define MEM_SDREFCFG_TRC (15<<28)
23778 +#define MEM_SDREFCFG_TRPM (3<<26)
23779 +#define MEM_SDREFCFG_E (1<<25)
23780 +#define MEM_SDREFCFG_RE (0x1ffffff<<0)
23781 +#define MEM_SDREFCFG_TRC_N(N) ((N)<<MEM_SDREFCFG_TRC)
23782 +#define MEM_SDREFCFG_TRPM_N(N) ((N)<<MEM_SDREFCFG_TRPM)
23783 +#define MEM_SDREFCFG_REF_N(N) (N)
23784 +#endif
23785 +
23786 +/***********************************************************************/
23787 +
23788 +/*
23789 + * Au1550 SDRAM Register Offsets
23790 + */
23791 +
23792 +/***********************************************************************/
23793 +
23794 +#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
23795 +#define MEM_SDMODE0 (0x0800)
23796 +#define MEM_SDMODE1 (0x0808)
23797 +#define MEM_SDMODE2 (0x0810)
23798 +#define MEM_SDADDR0 (0x0820)
23799 +#define MEM_SDADDR1 (0x0828)
23800 +#define MEM_SDADDR2 (0x0830)
23801 +#define MEM_SDCONFIGA (0x0840)
23802 +#define MEM_SDCONFIGB (0x0848)
23803 +#define MEM_SDSTAT (0x0850)
23804 +#define MEM_SDERRADDR (0x0858)
23805 +#define MEM_SDSTRIDE0 (0x0860)
23806 +#define MEM_SDSTRIDE1 (0x0868)
23807 +#define MEM_SDSTRIDE2 (0x0870)
23808 +#define MEM_SDWRMD0 (0x0880)
23809 +#define MEM_SDWRMD1 (0x0888)
23810 +#define MEM_SDWRMD2 (0x0890)
23811 +#define MEM_SDPRECMD (0x08C0)
23812 +#define MEM_SDAUTOREF (0x08C8)
23813 +#define MEM_SDSREF (0x08D0)
23814 +#define MEM_SDSLEEP MEM_SDSREF
23815 +
23816 +#ifndef ASSEMBLER
23817 +/*typedef volatile struct
23818 +{
23819 + uint32 sdmode0;
23820 + uint32 reserved0;
23821 + uint32 sdmode1;
23822 + uint32 reserved1;
23823 + uint32 sdmode2;
23824 + uint32 reserved2[3];
23825 + uint32 sdaddr0;
23826 + uint32 reserved3;
23827 + uint32 sdaddr1;
23828 + uint32 reserved4;
23829 + uint32 sdaddr2;
23830 + uint32 reserved5[3];
23831 + uint32 sdconfiga;
23832 + uint32 reserved6;
23833 + uint32 sdconfigb;
23834 + uint32 reserved7;
23835 + uint32 sdstat;
23836 + uint32 reserved8;
23837 + uint32 sderraddr;
23838 + uint32 reserved9;
23839 + uint32 sdstride0;
23840 + uint32 reserved10;
23841 + uint32 sdstride1;
23842 + uint32 reserved11;
23843 + uint32 sdstride2;
23844 + uint32 reserved12[3];
23845 + uint32 sdwrmd0;
23846 + uint32 reserved13;
23847 + uint32 sdwrmd1;
23848 + uint32 reserved14;
23849 + uint32 sdwrmd2;
23850 + uint32 reserved15[11];
23851 + uint32 sdprecmd;
23852 + uint32 reserved16;
23853 + uint32 sdautoref;
23854 + uint32 reserved17;
23855 + uint32 sdsref;
23856 +
23857 +} AU1550_SDRAM;*/
23858 +#endif
23859 +#endif
23860 +
23861 +/*
23862 + * Physical base addresses for integrated peripherals
23863 + */
23864 +
23865 +#ifdef CONFIG_SOC_AU1000
23866 +#define MEM_PHYS_ADDR 0x14000000
23867 +#define STATIC_MEM_PHYS_ADDR 0x14001000
23868 +#define DMA0_PHYS_ADDR 0x14002000
23869 +#define DMA1_PHYS_ADDR 0x14002100
23870 +#define DMA2_PHYS_ADDR 0x14002200
23871 +#define DMA3_PHYS_ADDR 0x14002300
23872 +#define DMA4_PHYS_ADDR 0x14002400
23873 +#define DMA5_PHYS_ADDR 0x14002500
23874 +#define DMA6_PHYS_ADDR 0x14002600
23875 +#define DMA7_PHYS_ADDR 0x14002700
23876 +#define IC0_PHYS_ADDR 0x10400000
23877 +#define IC1_PHYS_ADDR 0x11800000
23878 +#define AC97_PHYS_ADDR 0x10000000
23879 +#define USBH_PHYS_ADDR 0x10100000
23880 +#define USBD_PHYS_ADDR 0x10200000
23881 +#define IRDA_PHYS_ADDR 0x10300000
23882 +#define MAC0_PHYS_ADDR 0x10500000
23883 +#define MAC1_PHYS_ADDR 0x10510000
23884 +#define MACEN_PHYS_ADDR 0x10520000
23885 +#define MACDMA0_PHYS_ADDR 0x14004000
23886 +#define MACDMA1_PHYS_ADDR 0x14004200
23887 +#define I2S_PHYS_ADDR 0x11000000
23888 +#define UART0_PHYS_ADDR 0x11100000
23889 +#define UART1_PHYS_ADDR 0x11200000
23890 +#define UART2_PHYS_ADDR 0x11300000
23891 +#define UART3_PHYS_ADDR 0x11400000
23892 +#define SSI0_PHYS_ADDR 0x11600000
23893 +#define SSI1_PHYS_ADDR 0x11680000
23894 +#define SYS_PHYS_ADDR 0x11900000
23895 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
23896 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
23897 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
23898 +#endif
23899 +
23900 +/********************************************************************/
23901
23902 -#define MEM_SDSLEEP 0xB4000030
23903 -#define MEM_SDSMCKE 0xB4000034
23904 +#ifdef CONFIG_SOC_AU1500
23905 +#define MEM_PHYS_ADDR 0x14000000
23906 +#define STATIC_MEM_PHYS_ADDR 0x14001000
23907 +#define DMA0_PHYS_ADDR 0x14002000
23908 +#define DMA1_PHYS_ADDR 0x14002100
23909 +#define DMA2_PHYS_ADDR 0x14002200
23910 +#define DMA3_PHYS_ADDR 0x14002300
23911 +#define DMA4_PHYS_ADDR 0x14002400
23912 +#define DMA5_PHYS_ADDR 0x14002500
23913 +#define DMA6_PHYS_ADDR 0x14002600
23914 +#define DMA7_PHYS_ADDR 0x14002700
23915 +#define IC0_PHYS_ADDR 0x10400000
23916 +#define IC1_PHYS_ADDR 0x11800000
23917 +#define AC97_PHYS_ADDR 0x10000000
23918 +#define USBH_PHYS_ADDR 0x10100000
23919 +#define USBD_PHYS_ADDR 0x10200000
23920 +#define PCI_PHYS_ADDR 0x14005000
23921 +#define MAC0_PHYS_ADDR 0x11500000
23922 +#define MAC1_PHYS_ADDR 0x11510000
23923 +#define MACEN_PHYS_ADDR 0x11520000
23924 +#define MACDMA0_PHYS_ADDR 0x14004000
23925 +#define MACDMA1_PHYS_ADDR 0x14004200
23926 +#define I2S_PHYS_ADDR 0x11000000
23927 +#define UART0_PHYS_ADDR 0x11100000
23928 +#define UART3_PHYS_ADDR 0x11400000
23929 +#define GPIO2_PHYS_ADDR 0x11700000
23930 +#define SYS_PHYS_ADDR 0x11900000
23931 +#define PCI_MEM_PHYS_ADDR 0x400000000
23932 +#define PCI_IO_PHYS_ADDR 0x500000000
23933 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
23934 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
23935 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
23936 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
23937 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
23938 #endif
23939
23940 +/********************************************************************/
23941 +
23942 +#ifdef CONFIG_SOC_AU1100
23943 +#define MEM_PHYS_ADDR 0x14000000
23944 +#define STATIC_MEM_PHYS_ADDR 0x14001000
23945 +#define DMA0_PHYS_ADDR 0x14002000
23946 +#define DMA1_PHYS_ADDR 0x14002100
23947 +#define DMA2_PHYS_ADDR 0x14002200
23948 +#define DMA3_PHYS_ADDR 0x14002300
23949 +#define DMA4_PHYS_ADDR 0x14002400
23950 +#define DMA5_PHYS_ADDR 0x14002500
23951 +#define DMA6_PHYS_ADDR 0x14002600
23952 +#define DMA7_PHYS_ADDR 0x14002700
23953 +#define IC0_PHYS_ADDR 0x10400000
23954 +#define SD0_PHYS_ADDR 0x10600000
23955 +#define SD1_PHYS_ADDR 0x10680000
23956 +#define IC1_PHYS_ADDR 0x11800000
23957 +#define AC97_PHYS_ADDR 0x10000000
23958 +#define USBH_PHYS_ADDR 0x10100000
23959 +#define USBD_PHYS_ADDR 0x10200000
23960 +#define IRDA_PHYS_ADDR 0x10300000
23961 +#define MAC0_PHYS_ADDR 0x10500000
23962 +#define MACEN_PHYS_ADDR 0x10520000
23963 +#define MACDMA0_PHYS_ADDR 0x14004000
23964 +#define MACDMA1_PHYS_ADDR 0x14004200
23965 +#define I2S_PHYS_ADDR 0x11000000
23966 +#define UART0_PHYS_ADDR 0x11100000
23967 +#define UART1_PHYS_ADDR 0x11200000
23968 +#define UART3_PHYS_ADDR 0x11400000
23969 +#define SSI0_PHYS_ADDR 0x11600000
23970 +#define SSI1_PHYS_ADDR 0x11680000
23971 +#define GPIO2_PHYS_ADDR 0x11700000
23972 +#define SYS_PHYS_ADDR 0x11900000
23973 +#define LCD_PHYS_ADDR 0x15000000
23974 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
23975 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
23976 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
23977 +#endif
23978 +
23979 +/***********************************************************************/
23980 +
23981 +#ifdef CONFIG_SOC_AU1550
23982 +#define MEM_PHYS_ADDR 0x14000000
23983 +#define STATIC_MEM_PHYS_ADDR 0x14001000
23984 +#define IC0_PHYS_ADDR 0x10400000
23985 +#define IC1_PHYS_ADDR 0x11800000
23986 +#define USBH_PHYS_ADDR 0x14020000
23987 +#define USBD_PHYS_ADDR 0x10200000
23988 +#define PCI_PHYS_ADDR 0x14005000
23989 +#define MAC0_PHYS_ADDR 0x10500000
23990 +#define MAC1_PHYS_ADDR 0x10510000
23991 +#define MACEN_PHYS_ADDR 0x10520000
23992 +#define MACDMA0_PHYS_ADDR 0x14004000
23993 +#define MACDMA1_PHYS_ADDR 0x14004200
23994 +#define UART0_PHYS_ADDR 0x11100000
23995 +#define UART1_PHYS_ADDR 0x11200000
23996 +#define UART3_PHYS_ADDR 0x11400000
23997 +#define GPIO2_PHYS_ADDR 0x11700000
23998 +#define SYS_PHYS_ADDR 0x11900000
23999 +#define DDMA_PHYS_ADDR 0x14002000
24000 +#define PE_PHYS_ADDR 0x14008000
24001 +#define PSC0_PHYS_ADDR 0x11A00000
24002 +#define PSC1_PHYS_ADDR 0x11B00000
24003 +#define PSC2_PHYS_ADDR 0x10A00000
24004 +#define PSC3_PHYS_ADDR 0x10B00000
24005 +#define PCI_MEM_PHYS_ADDR 0x400000000
24006 +#define PCI_IO_PHYS_ADDR 0x500000000
24007 +#define PCI_CONFIG0_PHYS_ADDR 0x600000000
24008 +#define PCI_CONFIG1_PHYS_ADDR 0x680000000
24009 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24010 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24011 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24012 +#endif
24013 +
24014 +/***********************************************************************/
24015 +
24016 +#ifdef CONFIG_SOC_AU1200
24017 +#define MEM_PHYS_ADDR 0x14000000
24018 +#define STATIC_MEM_PHYS_ADDR 0x14001000
24019 +#define AES_PHYS_ADDR 0x10300000
24020 +#define CIM_PHYS_ADDR 0x14004000
24021 +#define IC0_PHYS_ADDR 0x10400000
24022 +#define IC1_PHYS_ADDR 0x11800000
24023 +#define USBM_PHYS_ADDR 0x14020000
24024 +#define USBH_PHYS_ADDR 0x14020100
24025 +#define UART0_PHYS_ADDR 0x11100000
24026 +#define UART1_PHYS_ADDR 0x11200000
24027 +#define GPIO2_PHYS_ADDR 0x11700000
24028 +#define SYS_PHYS_ADDR 0x11900000
24029 +#define DDMA_PHYS_ADDR 0x14002000
24030 +#define PSC0_PHYS_ADDR 0x11A00000
24031 +#define PSC1_PHYS_ADDR 0x11B00000
24032 +#define PCMCIA_IO_PHYS_ADDR 0xF00000000
24033 +#define PCMCIA_ATTR_PHYS_ADDR 0xF40000000
24034 +#define PCMCIA_MEM_PHYS_ADDR 0xF80000000
24035 +#define SD0_PHYS_ADDR 0x10600000
24036 +#define SD1_PHYS_ADDR 0x10680000
24037 +#define LCD_PHYS_ADDR 0x15000000
24038 +#define SWCNT_PHYS_ADDR 0x1110010C
24039 +#define MAEFE_PHYS_ADDR 0x14012000
24040 +#define MAEBE_PHYS_ADDR 0x14010000
24041 +#endif
24042 +
24043 +
24044 /* Static Bus Controller */
24045 #define MEM_STCFG0 0xB4001000
24046 #define MEM_STTIME0 0xB4001004
24047 @@ -367,7 +695,7 @@
24048 #define AU1000_MAC0_ENABLE 0xB0520000
24049 #define AU1000_MAC1_ENABLE 0xB0520004
24050 #define NUM_ETH_INTERFACES 2
24051 -#endif // CONFIG_SOC_AU1000
24052 +#endif /* CONFIG_SOC_AU1000 */
24053
24054 /* Au1500 */
24055 #ifdef CONFIG_SOC_AU1500
24056 @@ -438,7 +766,7 @@
24057 #define AU1500_MAC0_ENABLE 0xB1520000
24058 #define AU1500_MAC1_ENABLE 0xB1520004
24059 #define NUM_ETH_INTERFACES 2
24060 -#endif // CONFIG_SOC_AU1500
24061 +#endif /* CONFIG_SOC_AU1500 */
24062
24063 /* Au1100 */
24064 #ifdef CONFIG_SOC_AU1100
24065 @@ -483,6 +811,22 @@
24066 #define AU1000_GPIO_13 45
24067 #define AU1000_GPIO_14 46
24068 #define AU1000_GPIO_15 47
24069 +#define AU1000_GPIO_16 48
24070 +#define AU1000_GPIO_17 49
24071 +#define AU1000_GPIO_18 50
24072 +#define AU1000_GPIO_19 51
24073 +#define AU1000_GPIO_20 52
24074 +#define AU1000_GPIO_21 53
24075 +#define AU1000_GPIO_22 54
24076 +#define AU1000_GPIO_23 55
24077 +#define AU1000_GPIO_24 56
24078 +#define AU1000_GPIO_25 57
24079 +#define AU1000_GPIO_26 58
24080 +#define AU1000_GPIO_27 59
24081 +#define AU1000_GPIO_28 60
24082 +#define AU1000_GPIO_29 61
24083 +#define AU1000_GPIO_30 62
24084 +#define AU1000_GPIO_31 63
24085
24086 #define UART0_ADDR 0xB1100000
24087 #define UART1_ADDR 0xB1200000
24088 @@ -494,7 +838,7 @@
24089 #define AU1100_ETH0_BASE 0xB0500000
24090 #define AU1100_MAC0_ENABLE 0xB0520000
24091 #define NUM_ETH_INTERFACES 1
24092 -#endif // CONFIG_SOC_AU1100
24093 +#endif /* CONFIG_SOC_AU1100 */
24094
24095 #ifdef CONFIG_SOC_AU1550
24096 #define AU1550_UART0_INT 0
24097 @@ -511,14 +855,14 @@
24098 #define AU1550_PSC1_INT 11
24099 #define AU1550_PSC2_INT 12
24100 #define AU1550_PSC3_INT 13
24101 -#define AU1550_TOY_INT 14
24102 -#define AU1550_TOY_MATCH0_INT 15
24103 -#define AU1550_TOY_MATCH1_INT 16
24104 -#define AU1550_TOY_MATCH2_INT 17
24105 -#define AU1550_RTC_INT 18
24106 -#define AU1550_RTC_MATCH0_INT 19
24107 -#define AU1550_RTC_MATCH1_INT 20
24108 -#define AU1550_RTC_MATCH2_INT 21
24109 +#define AU1000_TOY_INT 14
24110 +#define AU1000_TOY_MATCH0_INT 15
24111 +#define AU1000_TOY_MATCH1_INT 16
24112 +#define AU1000_TOY_MATCH2_INT 17
24113 +#define AU1000_RTC_INT 18
24114 +#define AU1000_RTC_MATCH0_INT 19
24115 +#define AU1000_RTC_MATCH1_INT 20
24116 +#define AU1000_RTC_MATCH2_INT 21
24117 #define AU1550_NAND_INT 23
24118 #define AU1550_USB_DEV_REQ_INT 24
24119 #define AU1550_USB_DEV_SUS_INT 25
24120 @@ -573,7 +917,7 @@
24121 #define AU1550_MAC0_ENABLE 0xB0520000
24122 #define AU1550_MAC1_ENABLE 0xB0520004
24123 #define NUM_ETH_INTERFACES 2
24124 -#endif // CONFIG_SOC_AU1550
24125 +#endif /* CONFIG_SOC_AU1550 */
24126
24127 #ifdef CONFIG_SOC_AU1200
24128 #define AU1200_UART0_INT 0
24129 @@ -590,14 +934,14 @@
24130 #define AU1200_PSC1_INT 11
24131 #define AU1200_AES_INT 12
24132 #define AU1200_CAMERA_INT 13
24133 -#define AU1200_TOY_INT 14
24134 -#define AU1200_TOY_MATCH0_INT 15
24135 -#define AU1200_TOY_MATCH1_INT 16
24136 -#define AU1200_TOY_MATCH2_INT 17
24137 -#define AU1200_RTC_INT 18
24138 -#define AU1200_RTC_MATCH0_INT 19
24139 -#define AU1200_RTC_MATCH1_INT 20
24140 -#define AU1200_RTC_MATCH2_INT 21
24141 +#define AU1000_TOY_INT 14
24142 +#define AU1000_TOY_MATCH0_INT 15
24143 +#define AU1000_TOY_MATCH1_INT 16
24144 +#define AU1000_TOY_MATCH2_INT 17
24145 +#define AU1000_RTC_INT 18
24146 +#define AU1000_RTC_MATCH0_INT 19
24147 +#define AU1000_RTC_MATCH1_INT 20
24148 +#define AU1000_RTC_MATCH2_INT 21
24149 #define AU1200_NAND_INT 23
24150 #define AU1200_GPIO_204 24
24151 #define AU1200_GPIO_205 25
24152 @@ -605,6 +949,7 @@
24153 #define AU1200_GPIO_207 27
24154 #define AU1200_GPIO_208_215 28 // Logical OR of 208:215
24155 #define AU1200_USB_INT 29
24156 +#define AU1000_USB_HOST_INT AU1200_USB_INT
24157 #define AU1200_LCD_INT 30
24158 #define AU1200_MAE_BOTH_INT 31
24159 #define AU1000_GPIO_0 32
24160 @@ -643,21 +988,36 @@
24161 #define UART0_ADDR 0xB1100000
24162 #define UART1_ADDR 0xB1200000
24163
24164 -#define USB_OHCI_BASE 0x14020000 // phys addr for ioremap
24165 -#define USB_HOST_CONFIG 0xB4027ffc
24166 +#define USB_UOC_BASE 0x14020020
24167 +#define USB_UOC_LEN 0x20
24168 +#define USB_OHCI_BASE 0x14020100
24169 +#define USB_OHCI_LEN 0x100
24170 +#define USB_EHCI_BASE 0x14020200
24171 +#define USB_EHCI_LEN 0x100
24172 +#define USB_UDC_BASE 0x14022000
24173 +#define USB_UDC_LEN 0x2000
24174 +#define USB_MSR_BASE 0xB4020000
24175 +#define USB_MSR_MCFG 4
24176 +#define USBMSRMCFG_OMEMEN 0
24177 +#define USBMSRMCFG_OBMEN 1
24178 +#define USBMSRMCFG_EMEMEN 2
24179 +#define USBMSRMCFG_EBMEN 3
24180 +#define USBMSRMCFG_DMEMEN 4
24181 +#define USBMSRMCFG_DBMEN 5
24182 +#define USBMSRMCFG_GMEMEN 6
24183 +#define USBMSRMCFG_OHCCLKEN 16
24184 +#define USBMSRMCFG_EHCCLKEN 17
24185 +#define USBMSRMCFG_UDCCLKEN 18
24186 +#define USBMSRMCFG_PHYPLLEN 19
24187 +#define USBMSRMCFG_RDCOMB 30
24188 +#define USBMSRMCFG_PFEN 31
24189
24190 -// these are here for prototyping on au1550 (do not exist on au1200)
24191 -#define AU1200_ETH0_BASE 0xB0500000
24192 -#define AU1200_ETH1_BASE 0xB0510000
24193 -#define AU1200_MAC0_ENABLE 0xB0520000
24194 -#define AU1200_MAC1_ENABLE 0xB0520004
24195 -#define NUM_ETH_INTERFACES 2
24196 -#endif // CONFIG_SOC_AU1200
24197 +#endif /* CONFIG_SOC_AU1200 */
24198
24199 #define AU1000_LAST_INTC0_INT 31
24200 +#define AU1000_LAST_INTC1_INT 63
24201 #define AU1000_MAX_INTR 63
24202
24203 -
24204 /* Programmable Counters 0 and 1 */
24205 #define SYS_BASE 0xB1900000
24206 #define SYS_COUNTER_CNTRL (SYS_BASE + 0x14)
24207 @@ -728,6 +1088,8 @@
24208 #define I2S_CONTROL_D (1<<1)
24209 #define I2S_CONTROL_CE (1<<0)
24210
24211 +#ifndef CONFIG_SOC_AU1200
24212 +
24213 /* USB Host Controller */
24214 #define USB_OHCI_LEN 0x00100000
24215
24216 @@ -773,6 +1135,8 @@
24217 #define USBDEV_ENABLE (1<<1)
24218 #define USBDEV_CE (1<<0)
24219
24220 +#endif /* !CONFIG_SOC_AU1200 */
24221 +
24222 /* Ethernet Controllers */
24223
24224 /* 4 byte offsets from AU1000_ETH_BASE */
24225 @@ -1171,6 +1535,37 @@
24226 #define SYS_PF_PSC1_S1 (1 << 1)
24227 #define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2))
24228
24229 +/* Au1200 Only */
24230 +#ifdef CONFIG_SOC_AU1200
24231 +#define SYS_PINFUNC_DMA (1<<31)
24232 +#define SYS_PINFUNC_S0A (1<<30)
24233 +#define SYS_PINFUNC_S1A (1<<29)
24234 +#define SYS_PINFUNC_LP0 (1<<28)
24235 +#define SYS_PINFUNC_LP1 (1<<27)
24236 +#define SYS_PINFUNC_LD16 (1<<26)
24237 +#define SYS_PINFUNC_LD8 (1<<25)
24238 +#define SYS_PINFUNC_LD1 (1<<24)
24239 +#define SYS_PINFUNC_LD0 (1<<23)
24240 +#define SYS_PINFUNC_P1A (3<<21)
24241 +#define SYS_PINFUNC_P1B (1<<20)
24242 +#define SYS_PINFUNC_FS3 (1<<19)
24243 +#define SYS_PINFUNC_P0A (3<<17)
24244 +#define SYS_PINFUNC_CS (1<<16)
24245 +#define SYS_PINFUNC_CIM (1<<15)
24246 +#define SYS_PINFUNC_P1C (1<<14)
24247 +#define SYS_PINFUNC_U1T (1<<12)
24248 +#define SYS_PINFUNC_U1R (1<<11)
24249 +#define SYS_PINFUNC_EX1 (1<<10)
24250 +#define SYS_PINFUNC_EX0 (1<<9)
24251 +#define SYS_PINFUNC_U0R (1<<8)
24252 +#define SYS_PINFUNC_MC (1<<7)
24253 +#define SYS_PINFUNC_S0B (1<<6)
24254 +#define SYS_PINFUNC_S0C (1<<5)
24255 +#define SYS_PINFUNC_P0B (1<<4)
24256 +#define SYS_PINFUNC_U0T (1<<3)
24257 +#define SYS_PINFUNC_S1B (1<<2)
24258 +#endif
24259 +
24260 #define SYS_TRIOUTRD 0xB1900100
24261 #define SYS_TRIOUTCLR 0xB1900100
24262 #define SYS_OUTPUTRD 0xB1900108
24263 @@ -1298,7 +1693,6 @@
24264 #define SD1_XMIT_FIFO 0xB0680000
24265 #define SD1_RECV_FIFO 0xB0680004
24266
24267 -
24268 #if defined (CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
24269 /* Au1500 PCI Controller */
24270 #define Au1500_CFG_BASE 0xB4005000 // virtual, kseg0 addr
24271 @@ -1388,9 +1782,60 @@
24272
24273 #endif
24274
24275 +#ifndef _LANGUAGE_ASSEMBLY
24276 +typedef volatile struct
24277 +{
24278 + /* 0x0000 */ u32 toytrim;
24279 + /* 0x0004 */ u32 toywrite;
24280 + /* 0x0008 */ u32 toymatch0;
24281 + /* 0x000C */ u32 toymatch1;
24282 + /* 0x0010 */ u32 toymatch2;
24283 + /* 0x0014 */ u32 cntrctrl;
24284 + /* 0x0018 */ u32 scratch0;
24285 + /* 0x001C */ u32 scratch1;
24286 + /* 0x0020 */ u32 freqctrl0;
24287 + /* 0x0024 */ u32 freqctrl1;
24288 + /* 0x0028 */ u32 clksrc;
24289 + /* 0x002C */ u32 pinfunc;
24290 + /* 0x0030 */ u32 reserved0;
24291 + /* 0x0034 */ u32 wakemsk;
24292 + /* 0x0038 */ u32 endian;
24293 + /* 0x003C */ u32 powerctrl;
24294 + /* 0x0040 */ u32 toyread;
24295 + /* 0x0044 */ u32 rtctrim;
24296 + /* 0x0048 */ u32 rtcwrite;
24297 + /* 0x004C */ u32 rtcmatch0;
24298 + /* 0x0050 */ u32 rtcmatch1;
24299 + /* 0x0054 */ u32 rtcmatch2;
24300 + /* 0x0058 */ u32 rtcread;
24301 + /* 0x005C */ u32 wakesrc;
24302 + /* 0x0060 */ u32 cpupll;
24303 + /* 0x0064 */ u32 auxpll;
24304 + /* 0x0068 */ u32 reserved1;
24305 + /* 0x006C */ u32 reserved2;
24306 + /* 0x0070 */ u32 reserved3;
24307 + /* 0x0074 */ u32 reserved4;
24308 + /* 0x0078 */ u32 slppwr;
24309 + /* 0x007C */ u32 sleep;
24310 + /* 0x0080 */ u32 reserved5[32];
24311 + /* 0x0100 */ u32 trioutrd;
24312 +#define trioutclr trioutrd
24313 + /* 0x0104 */ u32 reserved6;
24314 + /* 0x0108 */ u32 outputrd;
24315 +#define outputset outputrd
24316 + /* 0x010C */ u32 outputclr;
24317 + /* 0x0110 */ u32 pinstaterd;
24318 +#define pininputen pinstaterd
24319 +
24320 +} AU1X00_SYS;
24321 +
24322 +static AU1X00_SYS* const sys = (AU1X00_SYS *)SYS_BASE;
24323 +
24324 +#endif
24325 /* Processor information base on prid.
24326 * Copied from PowerPC.
24327 */
24328 +#ifndef _LANGUAGE_ASSEMBLY
24329 struct cpu_spec {
24330 /* CPU is matched via (PRID & prid_mask) == prid_value */
24331 unsigned int prid_mask;
24332 @@ -1404,3 +1849,6 @@
24333 extern struct cpu_spec cpu_specs[];
24334 extern struct cpu_spec *cur_cpu_spec[];
24335 #endif
24336 +
24337 +#endif
24338 +
24339 diff -Nur linux-2.4.30/include/asm-mips/au1000_gpio.h linux-2.4.30-mips/include/asm-mips/au1000_gpio.h
24340 --- linux-2.4.30/include/asm-mips/au1000_gpio.h 2002-11-29 00:53:15.000000000 +0100
24341 +++ linux-2.4.30-mips/include/asm-mips/au1000_gpio.h 2005-01-30 09:01:28.000000000 +0100
24342 @@ -30,6 +30,13 @@
24343 * 675 Mass Ave, Cambridge, MA 02139, USA.
24344 */
24345
24346 +/*
24347 + * Revision history
24348 + * 01/31/02 0.01 Initial release. Steve Longerbeam, MontaVista
24349 + * 10/12/03 0.1 Added Au1100/Au1500, GPIO2, and bit operations. K.C. Nishio, AMD
24350 + * 08/05/04 0.11 Added Au1550 and Au1200. K.C. Nishio
24351 + */
24352 +
24353 #ifndef __AU1000_GPIO_H
24354 #define __AU1000_GPIO_H
24355
24356 @@ -44,13 +51,94 @@
24357 #define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int)
24358 #define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int)
24359
24360 +// bit operations
24361 +#define AU1000GPIO_BIT_READ _IOW (AU1000GPIO_IOC_MAGIC, 6, int)
24362 +#define AU1000GPIO_BIT_SET _IOW (AU1000GPIO_IOC_MAGIC, 7, int)
24363 +#define AU1000GPIO_BIT_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 8, int)
24364 +#define AU1000GPIO_BIT_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 9, int)
24365 +#define AU1000GPIO_BIT_INIT _IOW (AU1000GPIO_IOC_MAGIC, 10, int)
24366 +#define AU1000GPIO_BIT_TERM _IOW (AU1000GPIO_IOC_MAGIC, 11, int)
24367 +
24368 +/* set this major numer same as the CRIS GPIO driver */
24369 +#define AU1X00_GPIO_MAJOR (120)
24370 +
24371 +#define ENABLED_ZERO (0)
24372 +#define ENABLED_ONE (1)
24373 +#define ENABLED_10 (0x2)
24374 +#define ENABLED_11 (0x3)
24375 +#define ENABLED_111 (0x7)
24376 +#define NOT_AVAIL (-1)
24377 +#define AU1X00_MAX_PRIMARY_GPIO (32)
24378 +
24379 +#define AU1000_GPIO_MINOR_MAX AU1X00_MAX_PRIMARY_GPIO
24380 +/* Au1100, 1500, 1550 and 1200 have the secondary GPIO block */
24381 +#define AU1XX0_GPIO_MINOR_MAX (48)
24382 +
24383 +#define AU1X00_GPIO_NAME "gpio"
24384 +
24385 +/* GPIO pins which are not multiplexed */
24386 +#if defined(CONFIG_SOC_AU1000)
24387 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
24388 + #define NATIVE_GPIO2PIN (0)
24389 +#elif defined(CONFIG_SOC_AU1100)
24390 + #define NATIVE_GPIOPIN ((1 << 23) | (1 << 22) | (1 << 21) | (1 << 20) | (1 << 19) | (1 << 18) | \
24391 + (1 << 17) | (1 << 16) | (1 << 7) | (1 << 1) | (1 << 0))
24392 + #define NATIVE_GPIO2PIN (0)
24393 +#elif defined(CONFIG_SOC_AU1500)
24394 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 1) | (1 << 0))
24395 + /* exclude the PCI reset output signal: GPIO[200], DMA_REQ2 and DMA_REQ3 */
24396 + #define NATIVE_GPIO2PIN (0xfffe & ~((1 << 9) | (1 << 8)))
24397 +#elif defined(CONFIG_SOC_AU1550)
24398 + #define NATIVE_GPIOPIN ((1 << 15) | (1 << 8) | (1 << 7) | (1 << 6) | (1 << 1) | (1 << 0))
24399 + /* please refere Au1550 Data Book, chapter 15 */
24400 + #define NATIVE_GPIO2PIN (1 << 5)
24401 +#elif defined(CONFIG_SOC_AU1200)
24402 + #define NATIVE_GPIOPIN ((1 << 7) | (1 << 5))
24403 + #define NATIVE_GPIO2PIN (0)
24404 +#endif
24405 +
24406 +/* minor as u32 */
24407 +#define MINOR_TO_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? minor : (minor - AU1X00_MAX_PRIMARY_GPIO))
24408 +#define IS_PRIMARY_GPIOPIN(minor) ((minor < AU1X00_MAX_PRIMARY_GPIO) ? 1 : 0)
24409 +
24410 +/*
24411 + * pin to minor mapping.
24412 + * GPIO0-GPIO31, minor=0-31.
24413 + * GPIO200-GPIO215, minor=32-47.
24414 + */
24415 +typedef struct _au1x00_gpio_bit_ctl {
24416 + int direction; // The direction of this GPIO pin. 0: IN, 1: OUT.
24417 + int data; // Pin output when itized (0/1), or at the term. 0/1/-1 (tristate).
24418 +} au1x00_gpio_bit_ctl;
24419 +
24420 +typedef struct _au1x00_gpio_driver {
24421 + const char *driver_name;
24422 + const char *name;
24423 + int name_base; /* offset of printed name */
24424 + short major; /* major device number */
24425 + short minor_start; /* start of minor device number*/
24426 + short num; /* number of devices */
24427 +} au1x00_gpio_driver;
24428 +
24429 #ifdef __KERNEL__
24430 -extern u32 get_au1000_avail_gpio_mask(void);
24431 -extern int au1000gpio_tristate(u32 data);
24432 -extern int au1000gpio_in(u32 *data);
24433 -extern int au1000gpio_set(u32 data);
24434 -extern int au1000gpio_clear(u32 data);
24435 -extern int au1000gpio_out(u32 data);
24436 +extern u32 get_au1000_avail_gpio_mask(u32 *avail_gpio2);
24437 +extern int au1000gpio_tristate(u32 minor, u32 data);
24438 +extern int au1000gpio_in(u32 minor, u32 *data);
24439 +extern int au1000gpio_set(u32 minor, u32 data);
24440 +extern int au1000gpio_clear(u32 minor, u32 data);
24441 +extern int au1000gpio_out(u32 minor, u32 data);
24442 +extern int au1000gpio_bit_read(u32 minor, u32 *read_data);
24443 +extern int au1000gpio_bit_set(u32 minor);
24444 +extern int au1000gpio_bit_clear(u32 minor);
24445 +extern int au1000gpio_bit_tristate(u32 minor);
24446 +extern int check_minor_to_gpio(u32 minor);
24447 +extern int au1000gpio_bit_init(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
24448 +extern int au1000gpio_bit_term(u32 minor, au1x00_gpio_bit_ctl *bit_opt);
24449 +
24450 +extern void gpio_register_devfs (au1x00_gpio_driver *driver, unsigned int flags, unsigned minor);
24451 +extern void gpio_unregister_devfs (au1x00_gpio_driver *driver, unsigned minor);
24452 +extern int gpio_register_driver(au1x00_gpio_driver *driver);
24453 +extern int gpio_unregister_driver(au1x00_gpio_driver *driver);
24454 #endif
24455
24456 #endif
24457 diff -Nur linux-2.4.30/include/asm-mips/au1000_pcmcia.h linux-2.4.30-mips/include/asm-mips/au1000_pcmcia.h
24458 --- linux-2.4.30/include/asm-mips/au1000_pcmcia.h 2005-01-19 15:10:11.000000000 +0100
24459 +++ linux-2.4.30-mips/include/asm-mips/au1000_pcmcia.h 2005-01-30 09:01:28.000000000 +0100
24460 @@ -38,16 +38,41 @@
24461 #define AU1X_SOCK0_PHYS_MEM 0xF80000000
24462
24463 /* pcmcia socket 1 needs external glue logic so the memory map
24464 - * differs from board to board.
24465 + * differs from board to board. the general rule is that
24466 + * static bus address bit 26 should be used to decode socket 0
24467 + * from socket 1. alas, some boards dont follow this...
24468 + * These really belong in a board-specific header file...
24469 */
24470 -#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500)
24471 -#define AU1X_SOCK1_IO 0xF08000000
24472 -#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
24473 -#define AU1X_SOCK1_PHYS_MEM 0xF88000000
24474 -#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_DB1550)
24475 -#define AU1X_SOCK1_IO 0xF04000000
24476 -#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
24477 -#define AU1X_SOCK1_PHYS_MEM 0xF84000000
24478 +#ifdef CONFIG_MIPS_PB1000
24479 +#define SOCK1_DECODE (1<<27)
24480 +#endif
24481 +#ifdef CONFIG_MIPS_DB1000
24482 +#define SOCK1_DECODE (1<<26)
24483 +#endif
24484 +#ifdef CONFIG_MIPS_DB1500
24485 +#define SOCK1_DECODE (1<<26)
24486 +#endif
24487 +#ifdef CONFIG_MIPS_DB1100
24488 +#define SOCK1_DECODE (1<<26)
24489 +#endif
24490 +#ifdef CONFIG_MIPS_DB1550
24491 +#define SOCK1_DECODE (1<<26)
24492 +#endif
24493 +#ifdef CONFIG_MIPS_DB1200
24494 +#define SOCK1_DECODE (1<<26)
24495 +#endif
24496 +#ifdef CONFIG_MIPS_PB1550
24497 +#define SOCK1_DECODE (1<<26)
24498 +#endif
24499 +#ifdef CONFIG_MIPS_PB1200
24500 +#define SOCK1_DECODE (1<<26)
24501 +#endif
24502 +
24503 +/* The board has a second PCMCIA socket */
24504 +#ifdef SOCK1_DECODE
24505 +#define AU1X_SOCK1_IO (0xF00000000|SOCK1_DECODE)
24506 +#define AU1X_SOCK1_PHYS_ATTR (0xF40000000|SOCK1_DECODE)
24507 +#define AU1X_SOCK1_PHYS_MEM (0xF80000000|SOCK1_DECODE)
24508 #endif
24509
24510 struct pcmcia_state {
24511 diff -Nur linux-2.4.30/include/asm-mips/au1100_mmc.h linux-2.4.30-mips/include/asm-mips/au1100_mmc.h
24512 --- linux-2.4.30/include/asm-mips/au1100_mmc.h 2005-01-19 15:10:11.000000000 +0100
24513 +++ linux-2.4.30-mips/include/asm-mips/au1100_mmc.h 2005-01-30 09:01:28.000000000 +0100
24514 @@ -39,16 +39,22 @@
24515 #define __ASM_AU1100_MMC_H
24516
24517
24518 -#define NUM_AU1100_MMC_CONTROLLERS 2
24519 -
24520 -
24521 -#define AU1100_SD_IRQ 2
24522 -
24523 +#if defined(CONFIG_SOC_AU1100)
24524 +#define NUM_MMC_CONTROLLERS 2
24525 +#define AU1X_MMC_INT AU1100_SD_INT
24526 +#endif
24527 +
24528 +#if defined(CONFIG_SOC_AU1200)
24529 +#define NUM_MMC_CONTROLLERS 2
24530 +#define AU1X_MMC_INT AU1200_SD_INT
24531 +#endif
24532
24533 #define SD0_BASE 0xB0600000
24534 #define SD1_BASE 0xB0680000
24535
24536
24537 +
24538 +
24539 /*
24540 * Register offsets.
24541 */
24542 @@ -201,5 +207,12 @@
24543 #define SD_CMD_RT_1B (0x00810000)
24544
24545
24546 +/* support routines required on a platform-specific basis */
24547 +extern void mmc_card_inserted(int _n_, int *_res_);
24548 +extern void mmc_card_writable(int _n_, int *_res_);
24549 +extern void mmc_power_on(int _n_);
24550 +extern void mmc_power_off(int _n_);
24551 +
24552 +
24553 #endif /* __ASM_AU1100_MMC_H */
24554
24555 diff -Nur linux-2.4.30/include/asm-mips/au1xxx_dbdma.h linux-2.4.30-mips/include/asm-mips/au1xxx_dbdma.h
24556 --- linux-2.4.30/include/asm-mips/au1xxx_dbdma.h 2005-01-19 15:10:11.000000000 +0100
24557 +++ linux-2.4.30-mips/include/asm-mips/au1xxx_dbdma.h 2005-01-30 09:01:28.000000000 +0100
24558 @@ -43,7 +43,7 @@
24559 #define DDMA_GLOBAL_BASE 0xb4003000
24560 #define DDMA_CHANNEL_BASE 0xb4002000
24561
24562 -typedef struct dbdma_global {
24563 +typedef volatile struct dbdma_global {
24564 u32 ddma_config;
24565 u32 ddma_intstat;
24566 u32 ddma_throttle;
24567 @@ -60,7 +60,7 @@
24568
24569 /* The structure of a DMA Channel.
24570 */
24571 -typedef struct au1xxx_dma_channel {
24572 +typedef volatile struct au1xxx_dma_channel {
24573 u32 ddma_cfg; /* See below */
24574 u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */
24575 u32 ddma_statptr; /* word aligned pointer to status word */
24576 @@ -96,7 +96,7 @@
24577 /* "Standard" DDMA Descriptor.
24578 * Must be 32-byte aligned.
24579 */
24580 -typedef struct au1xxx_ddma_desc {
24581 +typedef volatile struct au1xxx_ddma_desc {
24582 u32 dscr_cmd0; /* See below */
24583 u32 dscr_cmd1; /* See below */
24584 u32 dscr_source0; /* source phys address */
24585 @@ -105,6 +105,12 @@
24586 u32 dscr_dest1; /* See below */
24587 u32 dscr_stat; /* completion status */
24588 u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */
24589 + /* First 32bytes are HW specific!!!
24590 + Lets have some SW data following.. make sure its 32bytes
24591 + */
24592 + u32 sw_status;
24593 + u32 sw_context;
24594 + u32 sw_reserved[6];
24595 } au1x_ddma_desc_t;
24596
24597 #define DSCR_CMD0_V (1 << 31) /* Descriptor valid */
24598 @@ -123,6 +129,8 @@
24599 #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */
24600 #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */
24601
24602 +#define SW_STATUS_INUSE (1<<0)
24603 +
24604 /* Command 0 device IDs.
24605 */
24606 #ifdef CONFIG_SOC_AU1550
24607 @@ -169,8 +177,8 @@
24608 #define DSCR_CMD0_SDMS_RX0 9
24609 #define DSCR_CMD0_SDMS_TX1 10
24610 #define DSCR_CMD0_SDMS_RX1 11
24611 -#define DSCR_CMD0_AES_TX 12
24612 -#define DSCR_CMD0_AES_RX 13
24613 +#define DSCR_CMD0_AES_TX 13
24614 +#define DSCR_CMD0_AES_RX 12
24615 #define DSCR_CMD0_PSC0_TX 14
24616 #define DSCR_CMD0_PSC0_RX 15
24617 #define DSCR_CMD0_PSC1_TX 16
24618 @@ -189,6 +197,10 @@
24619 #define DSCR_CMD0_THROTTLE 30
24620 #define DSCR_CMD0_ALWAYS 31
24621 #define DSCR_NDEV_IDS 32
24622 +/* THis macro is used to find/create custom device types */
24623 +#define DSCR_DEV2CUSTOM_ID(x,d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF))
24624 +#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF)
24625 +
24626
24627 #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25)
24628 #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20)
24629 @@ -277,6 +289,43 @@
24630 */
24631 #define NUM_DBDMA_CHANS 16
24632
24633 +/*
24634 + * Ddma API definitions
24635 + * FIXME: may not fit to this header file
24636 + */
24637 +typedef struct dbdma_device_table {
24638 + u32 dev_id;
24639 + u32 dev_flags;
24640 + u32 dev_tsize;
24641 + u32 dev_devwidth;
24642 + u32 dev_physaddr; /* If FIFO */
24643 + u32 dev_intlevel;
24644 + u32 dev_intpolarity;
24645 +} dbdev_tab_t;
24646 +
24647 +
24648 +typedef struct dbdma_chan_config {
24649 + spinlock_t lock;
24650 +
24651 + u32 chan_flags;
24652 + u32 chan_index;
24653 + dbdev_tab_t *chan_src;
24654 + dbdev_tab_t *chan_dest;
24655 + au1x_dma_chan_t *chan_ptr;
24656 + au1x_ddma_desc_t *chan_desc_base;
24657 + au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr;
24658 + void *chan_callparam;
24659 + void (*chan_callback)(int, void *, struct pt_regs *);
24660 +} chan_tab_t;
24661 +
24662 +#define DEV_FLAGS_INUSE (1 << 0)
24663 +#define DEV_FLAGS_ANYUSE (1 << 1)
24664 +#define DEV_FLAGS_OUT (1 << 2)
24665 +#define DEV_FLAGS_IN (1 << 3)
24666 +#define DEV_FLAGS_BURSTABLE (1 << 4)
24667 +#define DEV_FLAGS_SYNC (1 << 5)
24668 +/* end Ddma API definitions */
24669 +
24670 /* External functions for drivers to use.
24671 */
24672 /* Use this to allocate a dbdma channel. The device ids are one of the
24673 @@ -299,8 +348,8 @@
24674
24675 /* Put buffers on source/destination descriptors.
24676 */
24677 -u32 au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes);
24678 -u32 au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes);
24679 +u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags);
24680 +u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags);
24681
24682 /* Get a buffer from the destination descriptor.
24683 */
24684 @@ -314,5 +363,25 @@
24685 void au1xxx_dbdma_chan_free(u32 chanid);
24686 void au1xxx_dbdma_dump(u32 chanid);
24687
24688 +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr );
24689 +
24690 +u32 au1xxx_ddma_add_device( dbdev_tab_t *dev );
24691 +
24692 +/*
24693 + Some compatibilty macros --
24694 + Needed to make changes to API without breaking existing drivers
24695 +*/
24696 +#define au1xxx_dbdma_put_source(chanid,buf,nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE)
24697 +#define au1xxx_dbdma_put_source_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags)
24698 +
24699 +#define au1xxx_dbdma_put_dest(chanid,buf,nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE)
24700 +#define au1xxx_dbdma_put_dest_flags(chanid,buf,nbytes,flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags)
24701 +
24702 +/*
24703 + * Flags for the put_source/put_dest functions.
24704 + */
24705 +#define DDMA_FLAGS_IE (1<<0)
24706 +#define DDMA_FLAGS_NOIE (1<<1)
24707 +
24708 #endif /* _LANGUAGE_ASSEMBLY */
24709 #endif /* _AU1000_DBDMA_H_ */
24710 diff -Nur linux-2.4.30/include/asm-mips/au1xxx_gpio.h linux-2.4.30-mips/include/asm-mips/au1xxx_gpio.h
24711 --- linux-2.4.30/include/asm-mips/au1xxx_gpio.h 1970-01-01 01:00:00.000000000 +0100
24712 +++ linux-2.4.30-mips/include/asm-mips/au1xxx_gpio.h 2005-01-30 09:01:28.000000000 +0100
24713 @@ -0,0 +1,22 @@
24714 +
24715 +
24716 +#ifndef __AU1XXX_GPIO_H
24717 +#define __AU1XXX_GPIO_H
24718 +
24719 +void au1xxx_gpio1_set_inputs(void);
24720 +void au1xxx_gpio_tristate(int signal);
24721 +void au1xxx_gpio_write(int signal, int value);
24722 +int au1xxx_gpio_read(int signal);
24723 +
24724 +typedef volatile struct
24725 +{
24726 + u32 dir;
24727 + u32 reserved;
24728 + u32 output;
24729 + u32 pinstate;
24730 + u32 inten;
24731 + u32 enable;
24732 +
24733 +} AU1X00_GPIO2;
24734 +
24735 +#endif //__AU1XXX_GPIO_H
24736 diff -Nur linux-2.4.30/include/asm-mips/au1xxx_psc.h linux-2.4.30-mips/include/asm-mips/au1xxx_psc.h
24737 --- linux-2.4.30/include/asm-mips/au1xxx_psc.h 2005-01-19 15:10:11.000000000 +0100
24738 +++ linux-2.4.30-mips/include/asm-mips/au1xxx_psc.h 2005-01-30 09:01:28.000000000 +0100
24739 @@ -41,6 +41,11 @@
24740 #define PSC3_BASE_ADDR 0xb0d00000
24741 #endif
24742
24743 +#ifdef CONFIG_SOC_AU1200
24744 +#define PSC0_BASE_ADDR 0xb1a00000
24745 +#define PSC1_BASE_ADDR 0xb1b00000
24746 +#endif
24747 +
24748 /* The PSC select and control registers are common to
24749 * all protocols.
24750 */
24751 @@ -226,6 +231,8 @@
24752 #define PSC_I2SCFG_DD_DISABLE (1 << 27)
24753 #define PSC_I2SCFG_DE_ENABLE (1 << 26)
24754 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
24755 +#define PSC_I2SCFG_WS(n) ((n&0xFF)<<16)
24756 +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
24757 #define PSC_I2SCFG_WI (1 << 15)
24758
24759 #define PSC_I2SCFG_DIV_MASK (3 << 13)
24760 diff -Nur linux-2.4.30/include/asm-mips/bootinfo.h linux-2.4.30-mips/include/asm-mips/bootinfo.h
24761 --- linux-2.4.30/include/asm-mips/bootinfo.h 2004-02-18 14:36:32.000000000 +0100
24762 +++ linux-2.4.30-mips/include/asm-mips/bootinfo.h 2005-01-30 09:01:28.000000000 +0100
24763 @@ -180,6 +180,9 @@
24764 #define MACH_MTX1 7 /* 4G MTX-1 Au1500-based board */
24765 #define MACH_CSB250 8 /* Cogent Au1500 */
24766 #define MACH_PB1550 9 /* Au1550-based eval board */
24767 +#define MACH_PB1200 10 /* Au1200-based eval board */
24768 +#define MACH_DB1550 11 /* Au1550-based eval board */
24769 +#define MACH_DB1200 12 /* Au1200-based eval board */
24770
24771 /*
24772 * Valid machtype for group NEC_VR41XX
24773 diff -Nur linux-2.4.30/include/asm-mips/db1200.h linux-2.4.30-mips/include/asm-mips/db1200.h
24774 --- linux-2.4.30/include/asm-mips/db1200.h 1970-01-01 01:00:00.000000000 +0100
24775 +++ linux-2.4.30-mips/include/asm-mips/db1200.h 2005-01-30 09:02:45.000000000 +0100
24776 @@ -0,0 +1,214 @@
24777 +/*
24778 + * AMD Alchemy DB1200 Referrence Board
24779 + * Board Registers defines.
24780 + *
24781 + * ########################################################################
24782 + *
24783 + * This program is free software; you can distribute it and/or modify it
24784 + * under the terms of the GNU General Public License (Version 2) as
24785 + * published by the Free Software Foundation.
24786 + *
24787 + * This program is distributed in the hope it will be useful, but WITHOUT
24788 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
24789 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24790 + * for more details.
24791 + *
24792 + * You should have received a copy of the GNU General Public License along
24793 + * with this program; if not, write to the Free Software Foundation, Inc.,
24794 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24795 + *
24796 + * ########################################################################
24797 + *
24798 + *
24799 + */
24800 +#ifndef __ASM_DB1200_H
24801 +#define __ASM_DB1200_H
24802 +
24803 +#include <linux/types.h>
24804 +
24805 +// This is defined in au1000.h with bogus value
24806 +#undef AU1X00_EXTERNAL_INT
24807 +
24808 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
24809 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
24810 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
24811 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
24812 +
24813 +/* SPI and SMB are muxed on the Pb1200 board.
24814 + Refer to board documentation.
24815 + */
24816 +#define SPI_PSC_BASE PSC0_BASE_ADDR
24817 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
24818 +/* AC97 and I2S are muxed on the Pb1200 board.
24819 + Refer to board documentation.
24820 + */
24821 +#define AC97_PSC_BASE PSC1_BASE_ADDR
24822 +#define I2S_PSC_BASE PSC1_BASE_ADDR
24823 +
24824 +#define BCSR_KSEG1_ADDR 0xB9800000
24825 +
24826 +typedef volatile struct
24827 +{
24828 + /*00*/ u16 whoami;
24829 + u16 reserved0;
24830 + /*04*/ u16 status;
24831 + u16 reserved1;
24832 + /*08*/ u16 switches;
24833 + u16 reserved2;
24834 + /*0C*/ u16 resets;
24835 + u16 reserved3;
24836 +
24837 + /*10*/ u16 pcmcia;
24838 + u16 reserved4;
24839 + /*14*/ u16 board;
24840 + u16 reserved5;
24841 + /*18*/ u16 disk_leds;
24842 + u16 reserved6;
24843 + /*1C*/ u16 system;
24844 + u16 reserved7;
24845 +
24846 + /*20*/ u16 intclr;
24847 + u16 reserved8;
24848 + /*24*/ u16 intset;
24849 + u16 reserved9;
24850 + /*28*/ u16 intclr_mask;
24851 + u16 reserved10;
24852 + /*2C*/ u16 intset_mask;
24853 + u16 reserved11;
24854 +
24855 + /*30*/ u16 sig_status;
24856 + u16 reserved12;
24857 + /*34*/ u16 int_status;
24858 + u16 reserved13;
24859 + /*38*/ u16 reserved14;
24860 + u16 reserved15;
24861 + /*3C*/ u16 reserved16;
24862 + u16 reserved17;
24863 +
24864 +} BCSR;
24865 +
24866 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
24867 +
24868 +/*
24869 + * Register bit definitions for the BCSRs
24870 + */
24871 +#define BCSR_WHOAMI_DCID 0x000F
24872 +#define BCSR_WHOAMI_CPLD 0x00F0
24873 +#define BCSR_WHOAMI_BOARD 0x0F00
24874 +
24875 +#define BCSR_STATUS_PCMCIA0VS 0x0003
24876 +#define BCSR_STATUS_PCMCIA1VS 0x000C
24877 +#define BCSR_STATUS_SWAPBOOT 0x0040
24878 +#define BCSR_STATUS_FLASHBUSY 0x0100
24879 +#define BCSR_STATUS_IDECBLID 0x0200
24880 +#define BCSR_STATUS_SD0WP 0x0400
24881 +#define BCSR_STATUS_U0RXD 0x1000
24882 +#define BCSR_STATUS_U1RXD 0x2000
24883 +
24884 +#define BCSR_SWITCHES_OCTAL 0x00FF
24885 +#define BCSR_SWITCHES_DIP_1 0x0080
24886 +#define BCSR_SWITCHES_DIP_2 0x0040
24887 +#define BCSR_SWITCHES_DIP_3 0x0020
24888 +#define BCSR_SWITCHES_DIP_4 0x0010
24889 +#define BCSR_SWITCHES_DIP_5 0x0008
24890 +#define BCSR_SWITCHES_DIP_6 0x0004
24891 +#define BCSR_SWITCHES_DIP_7 0x0002
24892 +#define BCSR_SWITCHES_DIP_8 0x0001
24893 +#define BCSR_SWITCHES_ROTARY 0x0F00
24894 +
24895 +#define BCSR_RESETS_ETH 0x0001
24896 +#define BCSR_RESETS_CAMERA 0x0002
24897 +#define BCSR_RESETS_DC 0x0004
24898 +#define BCSR_RESETS_IDE 0x0008
24899 +#define BCSR_RESETS_TV 0x0010
24900 +/* not resets but in the same register */
24901 +#define BCSR_RESETS_PWMR1mUX 0x0800
24902 +#define BCSR_RESETS_PCS0MUX 0x1000
24903 +#define BCSR_RESETS_PCS1MUX 0x2000
24904 +#define BCSR_RESETS_SPISEL 0x4000
24905 +
24906 +#define BCSR_PCMCIA_PC0VPP 0x0003
24907 +#define BCSR_PCMCIA_PC0VCC 0x000C
24908 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
24909 +#define BCSR_PCMCIA_PC0RST 0x0080
24910 +#define BCSR_PCMCIA_PC1VPP 0x0300
24911 +#define BCSR_PCMCIA_PC1VCC 0x0C00
24912 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
24913 +#define BCSR_PCMCIA_PC1RST 0x8000
24914 +
24915 +#define BCSR_BOARD_LCDVEE 0x0001
24916 +#define BCSR_BOARD_LCDVDD 0x0002
24917 +#define BCSR_BOARD_LCDBL 0x0004
24918 +#define BCSR_BOARD_CAMSNAP 0x0010
24919 +#define BCSR_BOARD_CAMPWR 0x0020
24920 +#define BCSR_BOARD_SD0PWR 0x0040
24921 +
24922 +#define BCSR_LEDS_DECIMALS 0x0003
24923 +#define BCSR_LEDS_LED0 0x0100
24924 +#define BCSR_LEDS_LED1 0x0200
24925 +#define BCSR_LEDS_LED2 0x0400
24926 +#define BCSR_LEDS_LED3 0x0800
24927 +
24928 +#define BCSR_SYSTEM_POWEROFF 0x4000
24929 +#define BCSR_SYSTEM_RESET 0x8000
24930 +
24931 +/* Bit positions for the different interrupt sources */
24932 +#define BCSR_INT_IDE 0x0001
24933 +#define BCSR_INT_ETH 0x0002
24934 +#define BCSR_INT_PC0 0x0004
24935 +#define BCSR_INT_PC0STSCHG 0x0008
24936 +#define BCSR_INT_PC1 0x0010
24937 +#define BCSR_INT_PC1STSCHG 0x0020
24938 +#define BCSR_INT_DC 0x0040
24939 +#define BCSR_INT_FLASHBUSY 0x0080
24940 +#define BCSR_INT_PC0INSERT 0x0100
24941 +#define BCSR_INT_PC0EJECT 0x0200
24942 +#define BCSR_INT_PC1INSERT 0x0400
24943 +#define BCSR_INT_PC1EJECT 0x0800
24944 +#define BCSR_INT_SD0INSERT 0x1000
24945 +#define BCSR_INT_SD0EJECT 0x2000
24946 +
24947 +#define AU1XXX_SMC91111_PHYS_ADDR (0x19000300)
24948 +#define AU1XXX_SMC91111_IRQ DB1200_ETH_INT
24949 +
24950 +#define AU1XXX_ATA_PHYS_ADDR (0x18800000)
24951 +#define AU1XXX_ATA_PHYS_LEN (0x100)
24952 +#define AU1XXX_ATA_REG_OFFSET (5)
24953 +#define AU1XXX_ATA_INT DB1200_IDE_INT
24954 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
24955 +#define AU1XXX_ATA_RQSIZE 128
24956 +
24957 +#define NAND_PHYS_ADDR 0x20000000
24958 +
24959 +/*
24960 + * External Interrupts for Pb1200 as of 8/6/2004.
24961 + * Bit positions in the CPLD registers can be calculated by taking
24962 + * the interrupt define and subtracting the DB1200_INT_BEGIN value.
24963 + * *example: IDE bis pos is = 64 - 64
24964 + ETH bit pos is = 65 - 64
24965 + */
24966 +#define DB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
24967 +#define DB1200_IDE_INT (DB1200_INT_BEGIN + 0)
24968 +#define DB1200_ETH_INT (DB1200_INT_BEGIN + 1)
24969 +#define DB1200_PC0_INT (DB1200_INT_BEGIN + 2)
24970 +#define DB1200_PC0_STSCHG_INT (DB1200_INT_BEGIN + 3)
24971 +#define DB1200_PC1_INT (DB1200_INT_BEGIN + 4)
24972 +#define DB1200_PC1_STSCHG_INT (DB1200_INT_BEGIN + 5)
24973 +#define DB1200_DC_INT (DB1200_INT_BEGIN + 6)
24974 +#define DB1200_FLASHBUSY_INT (DB1200_INT_BEGIN + 7)
24975 +#define DB1200_PC0_INSERT_INT (DB1200_INT_BEGIN + 8)
24976 +#define DB1200_PC0_EJECT_INT (DB1200_INT_BEGIN + 9)
24977 +#define DB1200_PC1_INSERT_INT (DB1200_INT_BEGIN + 10)
24978 +#define DB1200_PC1_EJECT_INT (DB1200_INT_BEGIN + 11)
24979 +#define DB1200_SD0_INSERT_INT (DB1200_INT_BEGIN + 12)
24980 +#define DB1200_SD0_EJECT_INT (DB1200_INT_BEGIN + 13)
24981 +
24982 +#define DB1200_INT_END (DB1200_INT_BEGIN + 15)
24983 +
24984 +/* For drivers/pcmcia/au1000_db1x00.c */
24985 +#define BOARD_PC0_INT DB1200_PC0_INT
24986 +#define BOARD_PC1_INT DB1200_PC1_INT
24987 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
24988 +
24989 +#endif /* __ASM_DB1200_H */
24990 +
24991 diff -Nur linux-2.4.30/include/asm-mips/db1x00.h linux-2.4.30-mips/include/asm-mips/db1x00.h
24992 --- linux-2.4.30/include/asm-mips/db1x00.h 2005-01-19 15:10:11.000000000 +0100
24993 +++ linux-2.4.30-mips/include/asm-mips/db1x00.h 2005-01-30 09:06:19.000000000 +0100
24994 @@ -1,5 +1,5 @@
24995 /*
24996 - * AMD Alchemy DB1x00 Reference Boards
24997 + * AMD Alchemy DB1x00 Reference Boards (BUT NOT DB1200)
24998 *
24999 * Copyright 2001 MontaVista Software Inc.
25000 * Author: MontaVista Software, Inc.
25001 @@ -36,9 +36,18 @@
25002 #define AC97_PSC_BASE PSC1_BASE_ADDR
25003 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
25004 #define I2S_PSC_BASE PSC3_BASE_ADDR
25005 +#define NAND_CS 1
25006 +/* for drivers/pcmcia/au1000_db1x00.c */
25007 +#define BOARD_PC0_INT AU1000_GPIO_3
25008 +#define BOARD_PC1_INT AU1000_GPIO_5
25009 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
25010
25011 #else
25012 #define BCSR_KSEG1_ADDR 0xAE000000
25013 +/* for drivers/pcmcia/au1000_db1x00.c */
25014 +#define BOARD_PC0_INT AU1000_GPIO_2
25015 +#define BOARD_PC1_INT AU1000_GPIO_5
25016 +#define BOARD_CARD_INSERTED(SOCKET) !(bcsr->status & (1<<(4+SOCKET)))
25017 #endif
25018
25019 /*
25020 @@ -66,6 +75,7 @@
25021
25022 } BCSR;
25023
25024 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
25025
25026 /*
25027 * Register/mask bit definitions for the BCSRs
25028 @@ -130,14 +140,6 @@
25029
25030 #define BCSR_SWRESET_RESET 0x0080
25031
25032 -/* PCMCIA Db1x00 specific defines */
25033 -#define PCMCIA_MAX_SOCK 1
25034 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
25035 -
25036 -/* VPP/VCC */
25037 -#define SET_VCC_VPP(VCC, VPP, SLOT)\
25038 - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
25039 -
25040 /* MTD CONFIG OPTIONS */
25041 #if defined(CONFIG_MTD_DB1X00_BOOT) && defined(CONFIG_MTD_DB1X00_USER)
25042 #define DB1X00_BOTH_BANKS
25043 @@ -147,48 +149,15 @@
25044 #define DB1X00_USER_ONLY
25045 #endif
25046
25047 -/* SD controller macros */
25048 -/*
25049 - * Detect card.
25050 - */
25051 -#define mmc_card_inserted(_n_, _res_) \
25052 - do { \
25053 - BCSR * const bcsr = (BCSR *)0xAE000000; \
25054 - unsigned long mmc_wp, board_specific; \
25055 - if ((_n_)) { \
25056 - mmc_wp = BCSR_BOARD_SD1_WP; \
25057 - } else { \
25058 - mmc_wp = BCSR_BOARD_SD0_WP; \
25059 - } \
25060 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
25061 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
25062 - *(int *)(_res_) = 1; \
25063 - } else { \
25064 - *(int *)(_res_) = 0; \
25065 - } \
25066 - } while (0)
25067 -
25068 +#if defined(CONFIG_BLK_DEV_IDE_AU1XXX) && defined(CONFIG_MIPS_DB1550)
25069 /*
25070 - * Apply power to card slot(s).
25071 + * Daughter card information.
25072 */
25073 -#define mmc_power_on(_n_) \
25074 - do { \
25075 - BCSR * const bcsr = (BCSR *)0xAE000000; \
25076 - unsigned long mmc_pwr, mmc_wp, board_specific; \
25077 - if ((_n_)) { \
25078 - mmc_pwr = BCSR_BOARD_SD1_PWR; \
25079 - mmc_wp = BCSR_BOARD_SD1_WP; \
25080 - } else { \
25081 - mmc_pwr = BCSR_BOARD_SD0_PWR; \
25082 - mmc_wp = BCSR_BOARD_SD0_WP; \
25083 - } \
25084 - board_specific = au_readl((unsigned long)(&bcsr->specific)); \
25085 - if (!(board_specific & mmc_wp)) {/* low means card present */ \
25086 - board_specific |= mmc_pwr; \
25087 - au_writel(board_specific, (int)(&bcsr->specific)); \
25088 - au_sync(); \
25089 - } \
25090 - } while (0)
25091 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_8)
25092 +/* DC_IDE */
25093 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
25094 +#define AU1XXX_ATA_REG_OFFSET (5)
25095 +#endif /* CONFIG_MIPS_DB1550 */
25096
25097 #endif /* __ASM_DB1X00_H */
25098
25099 diff -Nur linux-2.4.30/include/asm-mips/ficmmp.h linux-2.4.30-mips/include/asm-mips/ficmmp.h
25100 --- linux-2.4.30/include/asm-mips/ficmmp.h 1970-01-01 01:00:00.000000000 +0100
25101 +++ linux-2.4.30-mips/include/asm-mips/ficmmp.h 2005-01-30 09:01:28.000000000 +0100
25102 @@ -0,0 +1,156 @@
25103 +/*
25104 + * FIC MMP
25105 + *
25106 + * ########################################################################
25107 + *
25108 + * This program is free software; you can distribute it and/or modify it
25109 + * under the terms of the GNU General Public License (Version 2) as
25110 + * published by the Free Software Foundation.
25111 + *
25112 + * This program is distributed in the hope it will be useful, but WITHOUT
25113 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
25114 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25115 + * for more details.
25116 + *
25117 + * You should have received a copy of the GNU General Public License along
25118 + * with this program; if not, write to the Free Software Foundation, Inc.,
25119 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
25120 + *
25121 + * ########################################################################
25122 + *
25123 + *
25124 + */
25125 +#ifndef __ASM_FICMMP_H
25126 +#define __ASM_FICMMP_H
25127 +
25128 +#include <linux/types.h>
25129 +#include <asm/au1000.h>
25130 +#include <asm/au1xxx_gpio.h>
25131 +
25132 +// This is defined in au1000.h with bogus value
25133 +#undef AU1X00_EXTERNAL_INT
25134 +
25135 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25136 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25137 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
25138 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
25139 +/* SPI and SMB are muxed on the Pb1200 board.
25140 + Refer to board documentation.
25141 + */
25142 +#define SPI_PSC_BASE PSC0_BASE_ADDR
25143 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
25144 +/* AC97 and I2S are muxed on the Pb1200 board.
25145 + Refer to board documentation.
25146 + */
25147 +#define AC97_PSC_BASE PSC1_BASE_ADDR
25148 +#define I2S_PSC_BASE PSC1_BASE_ADDR
25149 +
25150 +
25151 +/*
25152 + * SMSC LAN91C111
25153 + */
25154 +#define AU1XXX_SMC91111_PHYS_ADDR (0xAC000300)
25155 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_5
25156 +
25157 +/* DC_IDE and DC_ETHERNET */
25158 +#define FICMMP_IDE_INT AU1000_GPIO_4
25159 +
25160 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
25161 +#define AU1XXX_ATA_REG_OFFSET (5)
25162 +/*
25163 +#define AU1XXX_ATA_BASE (0x0C800000)
25164 +#define AU1XXX_ATA_END (0x0CFFFFFF)
25165 +#define AU1XXX_ATA_MEM_SIZE (AU1XXX_ATA_END - AU1XXX_ATA_BASE +1)
25166 +
25167 +#define AU1XXX_ATA_REG_OFFSET (5)
25168 +*/
25169 +/* VPP/VCC */
25170 +#define SET_VCC_VPP(VCC, VPP, SLOT)\
25171 + ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8))
25172 +
25173 +
25174 +#define FICMMP_CONFIG_BASE 0xAD000000
25175 +#define FICMMP_CONFIG_ENABLE 13
25176 +
25177 +#define FICMMP_CONFIG_I2SFREQ(N) (N<<0)
25178 +#define FICMMP_CONFIG_I2SXTAL0 (1<<0)
25179 +#define FICMMP_CONFIG_I2SXTAL1 (1<<1)
25180 +#define FICMMP_CONFIG_I2SXTAL2 (1<<2)
25181 +#define FICMMP_CONFIG_I2SXTAL3 (1<<3)
25182 +#define FICMMP_CONFIG_ADV1 (1<<4)
25183 +#define FICMMP_CONFIG_IDERST (1<<5)
25184 +#define FICMMP_CONFIG_LCMEN (1<<6)
25185 +#define FICMMP_CONFIG_CAMPWDN (1<<7)
25186 +#define FICMMP_CONFIG_USBPWREN (1<<8)
25187 +#define FICMMP_CONFIG_LCMPWREN (1<<9)
25188 +#define FICMMP_CONFIG_TVOUTPWREN (1<<10)
25189 +#define FICMMP_CONFIG_RS232PWREN (1<<11)
25190 +#define FICMMP_CONFIG_LCMDATAOUT (1<<12)
25191 +#define FICMMP_CONFIG_TVODATAOUT (1<<13)
25192 +#define FICMMP_CONFIG_ADV3 (1<<14)
25193 +#define FICMMP_CONFIG_ADV4 (1<<15)
25194 +
25195 +#define I2S_FREQ_8_192 (0x0)
25196 +#define I2S_FREQ_11_2896 (0x1)
25197 +#define I2S_FREQ_12_288 (0x2)
25198 +#define I2S_FREQ_24_576 (0x3)
25199 +//#define I2S_FREQ_12_288 (0x4)
25200 +#define I2S_FREQ_16_9344 (0x5)
25201 +#define I2S_FREQ_18_432 (0x6)
25202 +#define I2S_FREQ_36_864 (0x7)
25203 +#define I2S_FREQ_16_384 (0x8)
25204 +#define I2S_FREQ_22_5792 (0x9)
25205 +//#define I2S_FREQ_24_576 (0x10)
25206 +#define I2S_FREQ_49_152 (0x11)
25207 +//#define I2S_FREQ_24_576 (0x12)
25208 +#define I2S_FREQ_33_8688 (0x13)
25209 +//#define I2S_FREQ_36_864 (0x14)
25210 +#define I2S_FREQ_73_728 (0x15)
25211 +
25212 +#define FICMMP_IDE_PWR 9
25213 +#define FICMMP_FOCUS_RST 2
25214 +
25215 +static __inline void ficmmp_config_set(u16 bits)
25216 +{
25217 + extern u16 ficmmp_config;
25218 + //printk("set_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config | bits);
25219 + ficmmp_config |= bits;
25220 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
25221 +}
25222 +
25223 +static __inline void ficmmp_config_clear(u16 bits)
25224 +{
25225 + extern u16 ficmmp_config;
25226 +// printk("clear_config: %X, Old: %X, New: %X\n", bits, ficmmp_config, ficmmp_config & ~bits);
25227 + ficmmp_config &= ~bits;
25228 + *((u16*)FICMMP_CONFIG_BASE) = ficmmp_config;
25229 +}
25230 +
25231 +static __inline void ficmmp_config_init(void)
25232 +{
25233 + au1xxx_gpio_write(FICMMP_CONFIG_ENABLE, 0); //Enable configuration latch
25234 + ficmmp_config_set(FICMMP_CONFIG_LCMDATAOUT | FICMMP_CONFIG_TVODATAOUT | FICMMP_CONFIG_IDERST); //Disable display data buffers
25235 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(I2S_FREQ_36_864));
25236 +}
25237 +
25238 +static __inline u32 ficmmp_set_i2s_sample_rate(u32 rate)
25239 +{
25240 + u32 freq;
25241 +
25242 + switch(rate)
25243 + {
25244 + case 88200:
25245 + case 44100:
25246 + case 8018: freq = I2S_FREQ_11_2896; break;
25247 + case 48000:
25248 + case 32000: //freq = I2S_FREQ_18_432; break;
25249 + case 8000: freq = I2S_FREQ_12_288; break;
25250 + default: freq = I2S_FREQ_12_288; rate = 8000;
25251 + }
25252 + ficmmp_config_clear(FICMMP_CONFIG_I2SFREQ(0xF));
25253 + ficmmp_config_set(FICMMP_CONFIG_I2SFREQ(freq));
25254 + return rate;
25255 +}
25256 +
25257 +#endif /* __ASM_FICMMP_H */
25258 +
25259 diff -Nur linux-2.4.30/include/asm-mips/hazards.h linux-2.4.30-mips/include/asm-mips/hazards.h
25260 --- linux-2.4.30/include/asm-mips/hazards.h 2004-02-18 14:36:32.000000000 +0100
25261 +++ linux-2.4.30-mips/include/asm-mips/hazards.h 2004-11-25 23:18:38.000000000 +0100
25262 @@ -3,7 +3,7 @@
25263 * License. See the file "COPYING" in the main directory of this archive
25264 * for more details.
25265 *
25266 - * Copyright (C) 2003 Ralf Baechle
25267 + * Copyright (C) 2003, 2004 Ralf Baechle
25268 */
25269 #ifndef _ASM_HAZARDS_H
25270 #define _ASM_HAZARDS_H
25271 @@ -12,38 +12,185 @@
25272
25273 #ifdef __ASSEMBLY__
25274
25275 + .macro _ssnop
25276 + sll $0, $0, 1
25277 + .endm
25278 +
25279 /*
25280 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
25281 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
25282 * for data translations should not occur for 3 cpu cycles.
25283 */
25284 #ifdef CONFIG_CPU_RM9000
25285 -#define rm9000_tlb_hazard \
25286 +
25287 +#define mtc0_tlbw_hazard \
25288 + .set push; \
25289 + .set mips32; \
25290 + _ssnop; _ssnop; _ssnop; _ssnop; \
25291 + .set pop
25292 +
25293 +#define tlbw_eret_hazard \
25294 .set push; \
25295 .set mips32; \
25296 - ssnop; ssnop; ssnop; ssnop; \
25297 + _ssnop; _ssnop; _ssnop; _ssnop; \
25298 .set pop
25299 +
25300 #else
25301 -#define rm9000_tlb_hazard
25302 +
25303 +/*
25304 + * The taken branch will result in a two cycle penalty for the two killed
25305 + * instructions on R4000 / R4400. Other processors only have a single cycle
25306 + * hazard so this is nice trick to have an optimal code for a range of
25307 + * processors.
25308 + */
25309 +#define mtc0_tlbw_hazard \
25310 + b . + 8
25311 +#define tlbw_eret_hazard
25312 #endif
25313
25314 +/*
25315 + * mtc0->mfc0 hazard
25316 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
25317 + * It is a MIPS32R2 processor so ehb will clear the hazard.
25318 + */
25319 +
25320 +#ifdef CONFIG_CPU_MIPSR2
25321 +/*
25322 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
25323 + */
25324 + .macro ehb
25325 + sll $0, $0, 3
25326 + .endm
25327 +
25328 +#define irq_enable_hazard \
25329 + ehb # irq_enable_hazard
25330 +
25331 +#define irq_disable_hazard \
25332 + ehb # irq_disable_hazard
25333 +
25334 #else
25335
25336 +#define irq_enable_hazard
25337 +#define irq_disable_hazard
25338 +
25339 +#endif
25340 +
25341 +#else /* __ASSEMBLY__ */
25342 +
25343 /*
25344 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
25345 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
25346 * for data translations should not occur for 3 cpu cycles.
25347 */
25348 #ifdef CONFIG_CPU_RM9000
25349 -#define rm9000_tlb_hazard() \
25350 +
25351 +#define mtc0_tlbw_hazard() \
25352 __asm__ __volatile__( \
25353 ".set\tmips32\n\t" \
25354 - "ssnop; ssnop; ssnop; ssnop\n\t" \
25355 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
25356 + ".set\tmips0")
25357 +
25358 +#define tlbw_use_hazard() \
25359 + __asm__ __volatile__( \
25360 + ".set\tmips32\n\t" \
25361 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
25362 ".set\tmips0")
25363 #else
25364 -#define rm9000_tlb_hazard() do { } while (0)
25365 +
25366 +/*
25367 + * Overkill warning ...
25368 + */
25369 +#define mtc0_tlbw_hazard() \
25370 + __asm__ __volatile__( \
25371 + ".set noreorder\n\t" \
25372 + "nop; nop; nop; nop; nop; nop;\n\t" \
25373 + ".set reorder\n\t")
25374 +
25375 +#define tlbw_use_hazard() \
25376 + __asm__ __volatile__( \
25377 + ".set noreorder\n\t" \
25378 + "nop; nop; nop; nop; nop; nop;\n\t" \
25379 + ".set reorder\n\t")
25380 +
25381 #endif
25382
25383 +/*
25384 + * mtc0->mfc0 hazard
25385 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
25386 + * It is a MIPS32R2 processor so ehb will clear the hazard.
25387 + */
25388 +
25389 +#ifdef CONFIG_CPU_MIPSR2
25390 +/*
25391 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
25392 + */
25393 +__asm__(
25394 + " .macro ehb \n\t"
25395 + " sll $0, $0, 3 \n\t"
25396 + " .endm \n\t"
25397 + " \n\t"
25398 + " .macro\tirq_enable_hazard \n\t"
25399 + " ehb \n\t"
25400 + " .endm \n\t"
25401 + " \n\t"
25402 + " .macro\tirq_disable_hazard \n\t"
25403 + " ehb \n\t"
25404 + " .endm");
25405 +
25406 +#define irq_enable_hazard() \
25407 + __asm__ __volatile__( \
25408 + "ehb\t\t\t\t# irq_enable_hazard")
25409 +
25410 +#define irq_disable_hazard() \
25411 + __asm__ __volatile__( \
25412 + "ehb\t\t\t\t# irq_disable_hazard")
25413 +
25414 +#elif defined(CONFIG_CPU_R10000)
25415 +
25416 +/*
25417 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
25418 + */
25419 +
25420 +__asm__(
25421 + " .macro\tirq_enable_hazard \n\t"
25422 + " .endm \n\t"
25423 + " \n\t"
25424 + " .macro\tirq_disable_hazard \n\t"
25425 + " .endm");
25426 +
25427 +#define irq_enable_hazard() do { } while (0)
25428 +#define irq_disable_hazard() do { } while (0)
25429 +
25430 +#else
25431 +
25432 +/*
25433 + * Default for classic MIPS processors. Assume worst case hazards but don't
25434 + * care about the irq_enable_hazard - sooner or later the hardware will
25435 + * enable it and we don't care when exactly.
25436 + */
25437 +
25438 +__asm__(
25439 + " .macro _ssnop \n\t"
25440 + " sll $0, $2, 1 \n\t"
25441 + " .endm \n\t"
25442 + " \n\t"
25443 + " # \n\t"
25444 + " # There is a hazard but we do not care \n\t"
25445 + " # \n\t"
25446 + " .macro\tirq_enable_hazard \n\t"
25447 + " .endm \n\t"
25448 + " \n\t"
25449 + " .macro\tirq_disable_hazard \n\t"
25450 + " _ssnop; _ssnop; _ssnop \n\t"
25451 + " .endm");
25452 +
25453 +#define irq_enable_hazard() do { } while (0)
25454 +#define irq_disable_hazard() \
25455 + __asm__ __volatile__( \
25456 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
25457 +
25458 #endif
25459
25460 +#endif /* __ASSEMBLY__ */
25461 +
25462 #endif /* _ASM_HAZARDS_H */
25463 diff -Nur linux-2.4.30/include/asm-mips/mipsregs.h linux-2.4.30-mips/include/asm-mips/mipsregs.h
25464 --- linux-2.4.30/include/asm-mips/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
25465 +++ linux-2.4.30-mips/include/asm-mips/mipsregs.h 2005-02-06 22:24:22.000000000 +0100
25466 @@ -757,10 +757,18 @@
25467 #define read_c0_config1() __read_32bit_c0_register($16, 1)
25468 #define read_c0_config2() __read_32bit_c0_register($16, 2)
25469 #define read_c0_config3() __read_32bit_c0_register($16, 3)
25470 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
25471 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
25472 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
25473 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
25474 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
25475 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
25476 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
25477 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
25478 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
25479 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
25480 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
25481 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
25482
25483 /*
25484 * The WatchLo register. There may be upto 8 of them.
25485 @@ -874,42 +882,34 @@
25486 */
25487 static inline void tlb_probe(void)
25488 {
25489 - rm9000_tlb_hazard();
25490 __asm__ __volatile__(
25491 ".set noreorder\n\t"
25492 "tlbp\n\t"
25493 ".set reorder");
25494 - rm9000_tlb_hazard();
25495 }
25496
25497 static inline void tlb_read(void)
25498 {
25499 - rm9000_tlb_hazard();
25500 __asm__ __volatile__(
25501 ".set noreorder\n\t"
25502 "tlbr\n\t"
25503 ".set reorder");
25504 - rm9000_tlb_hazard();
25505 }
25506
25507 static inline void tlb_write_indexed(void)
25508 {
25509 - rm9000_tlb_hazard();
25510 __asm__ __volatile__(
25511 ".set noreorder\n\t"
25512 "tlbwi\n\t"
25513 ".set reorder");
25514 - rm9000_tlb_hazard();
25515 }
25516
25517 static inline void tlb_write_random(void)
25518 {
25519 - rm9000_tlb_hazard();
25520 __asm__ __volatile__(
25521 ".set noreorder\n\t"
25522 "tlbwr\n\t"
25523 ".set reorder");
25524 - rm9000_tlb_hazard();
25525 }
25526
25527 /*
25528 diff -Nur linux-2.4.30/include/asm-mips/mmu_context.h linux-2.4.30-mips/include/asm-mips/mmu_context.h
25529 --- linux-2.4.30/include/asm-mips/mmu_context.h 2005-01-19 15:10:12.000000000 +0100
25530 +++ linux-2.4.30-mips/include/asm-mips/mmu_context.h 2004-11-22 14:38:29.000000000 +0100
25531 @@ -27,7 +27,7 @@
25532 #define TLBMISS_HANDLER_SETUP_PGD(pgd) \
25533 pgd_current[smp_processor_id()] = (unsigned long)(pgd)
25534 #define TLBMISS_HANDLER_SETUP() \
25535 - write_c0_context((unsigned long) smp_processor_id() << (23 + 3)); \
25536 + write_c0_context((unsigned long) smp_processor_id() << 23); \
25537 TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir)
25538 extern unsigned long pgd_current[];
25539
25540 diff -Nur linux-2.4.30/include/asm-mips/pb1100.h linux-2.4.30-mips/include/asm-mips/pb1100.h
25541 --- linux-2.4.30/include/asm-mips/pb1100.h 2003-08-25 13:44:44.000000000 +0200
25542 +++ linux-2.4.30-mips/include/asm-mips/pb1100.h 2005-01-30 09:10:29.000000000 +0100
25543 @@ -1,5 +1,5 @@
25544 /*
25545 - * Alchemy Semi PB1100 Referrence Board
25546 + * AMD Alchemy PB1100 Reference Boards
25547 *
25548 * Copyright 2001 MontaVista Software Inc.
25549 * Author: MontaVista Software, Inc.
25550 @@ -27,55 +27,108 @@
25551 #ifndef __ASM_PB1100_H
25552 #define __ASM_PB1100_H
25553
25554 -#define PB1100_IDENT 0xAE000000
25555 -#define BOARD_STATUS_REG 0xAE000004
25556 - #define PB1100_ROM_SEL (1<<15)
25557 - #define PB1100_ROM_SIZ (1<<14)
25558 - #define PB1100_SWAP_BOOT (1<<13)
25559 - #define PB1100_FLASH_WP (1<<12)
25560 - #define PB1100_ROM_H_STS (1<<11)
25561 - #define PB1100_ROM_L_STS (1<<10)
25562 - #define PB1100_FLASH_H_STS (1<<9)
25563 - #define PB1100_FLASH_L_STS (1<<8)
25564 - #define PB1100_SRAM_SIZ (1<<7)
25565 - #define PB1100_TSC_BUSY (1<<6)
25566 - #define PB1100_PCMCIA_VS_MASK (3<<4)
25567 - #define PB1100_RS232_CD (1<<3)
25568 - #define PB1100_RS232_CTS (1<<2)
25569 - #define PB1100_RS232_DSR (1<<1)
25570 - #define PB1100_RS232_RI (1<<0)
25571 -
25572 -#define PB1100_IRDA_RS232 0xAE00000C
25573 - #define PB1100_IRDA_FULL (0<<14) /* full power */
25574 - #define PB1100_IRDA_SHUTDOWN (1<<14)
25575 - #define PB1100_IRDA_TT (2<<14) /* 2/3 power */
25576 - #define PB1100_IRDA_OT (3<<14) /* 1/3 power */
25577 - #define PB1100_IRDA_FIR (1<<13)
25578 -
25579 -#define PCMCIA_BOARD_REG 0xAE000010
25580 - #define PB1100_SD_WP1_RO (1<<15) /* read only */
25581 - #define PB1100_SD_WP0_RO (1<<14) /* read only */
25582 - #define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */
25583 - #define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */
25584 - #define PB1100_SEL_SD_CONN1 (1<<9)
25585 - #define PB1100_SEL_SD_CONN0 (1<<8)
25586 - #define PC_DEASSERT_RST (1<<7)
25587 - #define PC_DRV_EN (1<<4)
25588 -
25589 -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */
25590 -
25591 -#define PB1100_RST_VDDI 0xAE00001C
25592 - #define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */
25593 - #define PB1100_VDDI_MASK (0x1F)
25594 +#define BCSR_KSEG1_ADDR 0xAE000000
25595 +
25596 +/*
25597 + * Overlay data structure of the Pb1100 board registers.
25598 + * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx
25599 + */
25600 +typedef volatile struct
25601 +{
25602 + /*00*/ unsigned short whoami;
25603 + unsigned short reserved0;
25604 + /*04*/ unsigned short status;
25605 + unsigned short reserved1;
25606 + /*08*/ unsigned short switches;
25607 + unsigned short reserved2;
25608 + /*0C*/ unsigned short resets;
25609 + unsigned short reserved3;
25610 + /*10*/ unsigned short pcmcia;
25611 + unsigned short reserved4;
25612 + /*14*/ unsigned short graphics;
25613 + unsigned short reserved5;
25614 + /*18*/ unsigned short leds;
25615 + unsigned short reserved6;
25616 + /*1C*/ unsigned short swreset;
25617 + unsigned short reserved7;
25618 +
25619 +} BCSR;
25620
25621 -#define PB1100_LEDS 0xAE000018
25622
25623 -/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED.
25624 - * 7:0 is the LED Display's decimal points.
25625 +/*
25626 + * Register/mask bit definitions for the BCSRs
25627 */
25628 -#define PB1100_HEX_LED 0xAE000018
25629 +#define BCSR_WHOAMI_DCID 0x000F
25630 +#define BCSR_WHOAMI_CPLD 0x00F0
25631 +#define BCSR_WHOAMI_BOARD 0x0F00
25632 +
25633 +#define BCSR_STATUS_RS232_RI 0x0001
25634 +#define BCSR_STATUS_RS232_DSR 0x0002
25635 +#define BCSR_STATUS_RS232_CTS 0x0004
25636 +#define BCSR_STATUS_RS232_CD 0x0008
25637 +#define BCSR_STATUS_PCMCIA_VS_MASK 0x0030
25638 +#define BCSR_STATUS_TSC_BUSY 0x0040
25639 +#define BCSR_STATUS_SRAM_SIZ 0x0080
25640 +#define BCSR_STATUS_FLASH_L_STS 0x0100
25641 +#define BCSR_STATUS_FLASH_H_STS 0x0200
25642 +#define BCSR_STATUS_ROM_H_STS 0x0400
25643 +#define BCSR_STATUS_ROM_L_STS 0x0800
25644 +#define BCSR_STATUS_FLASH_WP 0x1000
25645 +#define BCSR_STATUS_SWAP_BOOT 0x2000
25646 +#define BCSR_STATUS_ROM_SIZ 0x4000
25647 +#define BCSR_STATUS_ROM_SEL 0x8000
25648 +
25649 +#define BCSR_SWITCHES_DIP 0x00FF
25650 +#define BCSR_SWITCHES_DIP_1 0x0080
25651 +#define BCSR_SWITCHES_DIP_2 0x0040
25652 +#define BCSR_SWITCHES_DIP_3 0x0020
25653 +#define BCSR_SWITCHES_DIP_4 0x0010
25654 +#define BCSR_SWITCHES_DIP_5 0x0008
25655 +#define BCSR_SWITCHES_DIP_6 0x0004
25656 +#define BCSR_SWITCHES_DIP_7 0x0002
25657 +#define BCSR_SWITCHES_DIP_8 0x0001
25658 +#define BCSR_SWITCHES_ROTARY 0x0F00
25659 +#define BCSR_SWITCHES_SDO_CL 0x8000
25660 +
25661 +#define BCSR_RESETS_PHY0 0x0001
25662 +#define BCSR_RESETS_PHY1 0x0002
25663 +#define BCSR_RESETS_DC 0x0004
25664 +#define BCSR_RESETS_RS232_RTS 0x0100
25665 +#define BCSR_RESETS_RS232_DTR 0x0200
25666 +#define BCSR_RESETS_FIR_SEL 0x2000
25667 +#define BCSR_RESETS_IRDA_MODE_MASK 0xC000
25668 +#define BCSR_RESETS_IRDA_MODE_FULL 0x0000
25669 +#define BCSR_RESETS_IRDA_MODE_OFF 0x4000
25670 +#define BCSR_RESETS_IRDA_MODE_2_3 0x8000
25671 +#define BCSR_RESETS_IRDA_MODE_1_3 0xC000
25672 +
25673 +#define BCSR_PCMCIA_PC0VPP 0x0003
25674 +#define BCSR_PCMCIA_PC0VCC 0x000C
25675 +#define BCSR_PCMCIA_PC0_DR_VEN 0x0010
25676 +#define BCSR_PCMCIA_PC0RST 0x0080
25677 +#define BCSR_PCMCIA_SEL_SD_CON0 0x0100
25678 +#define BCSR_PCMCIA_SEL_SD_CON1 0x0200
25679 +#define BCSR_PCMCIA_SD0_PWR 0x0400
25680 +#define BCSR_PCMCIA_SD1_PWR 0x0800
25681 +#define BCSR_PCMCIA_SD0_WP 0x4000
25682 +#define BCSR_PCMCIA_SD1_WP 0x8000
25683 +
25684 +#define PB1100_G_CONTROL 0xAE000014
25685 +#define BCSR_GRAPHICS_GPX_SMPASS 0x0010
25686 +#define BCSR_GRAPHICS_GPX_BIG_ENDIAN 0x0020
25687 +#define BCSR_GRAPHICS_GPX_RST 0x0040
25688 +
25689 +#define BCSR_LEDS_DECIMALS 0x00FF
25690 +#define BCSR_LEDS_LED0 0x0100
25691 +#define BCSR_LEDS_LED1 0x0200
25692 +#define BCSR_LEDS_LED2 0x0400
25693 +#define BCSR_LEDS_LED3 0x0800
25694 +
25695 +#define BCSR_SWRESET_RESET 0x0080
25696 +#define BCSR_VDDI_VDI 0x001F
25697
25698 -/* PCMCIA PB1100 specific defines */
25699 +
25700 + /* PCMCIA Pb1x00 specific defines */
25701 #define PCMCIA_MAX_SOCK 0
25702 #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1)
25703
25704 @@ -83,3 +136,4 @@
25705 #define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0))
25706
25707 #endif /* __ASM_PB1100_H */
25708 +
25709 diff -Nur linux-2.4.30/include/asm-mips/pb1200.h linux-2.4.30-mips/include/asm-mips/pb1200.h
25710 --- linux-2.4.30/include/asm-mips/pb1200.h 1970-01-01 01:00:00.000000000 +0100
25711 +++ linux-2.4.30-mips/include/asm-mips/pb1200.h 2005-01-30 09:01:28.000000000 +0100
25712 @@ -0,0 +1,244 @@
25713 +/*
25714 + * AMD Alchemy PB1200 Referrence Board
25715 + * Board Registers defines.
25716 + *
25717 + * ########################################################################
25718 + *
25719 + * This program is free software; you can distribute it and/or modify it
25720 + * under the terms of the GNU General Public License (Version 2) as
25721 + * published by the Free Software Foundation.
25722 + *
25723 + * This program is distributed in the hope it will be useful, but WITHOUT
25724 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
25725 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
25726 + * for more details.
25727 + *
25728 + * You should have received a copy of the GNU General Public License along
25729 + * with this program; if not, write to the Free Software Foundation, Inc.,
25730 + * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
25731 + *
25732 + * ########################################################################
25733 + *
25734 + *
25735 + */
25736 +#ifndef __ASM_PB1200_H
25737 +#define __ASM_PB1200_H
25738 +
25739 +#include <linux/types.h>
25740 +
25741 +// This is defined in au1000.h with bogus value
25742 +#undef AU1X00_EXTERNAL_INT
25743 +
25744 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25745 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25746 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX
25747 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX
25748 +
25749 +/* SPI and SMB are muxed on the Pb1200 board.
25750 + Refer to board documentation.
25751 + */
25752 +#define SPI_PSC_BASE PSC0_BASE_ADDR
25753 +#define SMBUS_PSC_BASE PSC0_BASE_ADDR
25754 +/* AC97 and I2S are muxed on the Pb1200 board.
25755 + Refer to board documentation.
25756 + */
25757 +#define AC97_PSC_BASE PSC1_BASE_ADDR
25758 +#define I2S_PSC_BASE PSC1_BASE_ADDR
25759 +
25760 +#define BCSR_KSEG1_ADDR 0xAD800000
25761 +
25762 +typedef volatile struct
25763 +{
25764 + /*00*/ u16 whoami;
25765 + u16 reserved0;
25766 + /*04*/ u16 status;
25767 + u16 reserved1;
25768 + /*08*/ u16 switches;
25769 + u16 reserved2;
25770 + /*0C*/ u16 resets;
25771 + u16 reserved3;
25772 +
25773 + /*10*/ u16 pcmcia;
25774 + u16 reserved4;
25775 + /*14*/ u16 board;
25776 + u16 reserved5;
25777 + /*18*/ u16 disk_leds;
25778 + u16 reserved6;
25779 + /*1C*/ u16 system;
25780 + u16 reserved7;
25781 +
25782 + /*20*/ u16 intclr;
25783 + u16 reserved8;
25784 + /*24*/ u16 intset;
25785 + u16 reserved9;
25786 + /*28*/ u16 intclr_mask;
25787 + u16 reserved10;
25788 + /*2C*/ u16 intset_mask;
25789 + u16 reserved11;
25790 +
25791 + /*30*/ u16 sig_status;
25792 + u16 reserved12;
25793 + /*34*/ u16 int_status;
25794 + u16 reserved13;
25795 + /*38*/ u16 reserved14;
25796 + u16 reserved15;
25797 + /*3C*/ u16 reserved16;
25798 + u16 reserved17;
25799 +
25800 +} BCSR;
25801 +
25802 +static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
25803 +
25804 +/*
25805 + * Register bit definitions for the BCSRs
25806 + */
25807 +#define BCSR_WHOAMI_DCID 0x000F
25808 +#define BCSR_WHOAMI_CPLD 0x00F0
25809 +#define BCSR_WHOAMI_BOARD 0x0F00
25810 +
25811 +#define BCSR_STATUS_PCMCIA0VS 0x0003
25812 +#define BCSR_STATUS_PCMCIA1VS 0x000C
25813 +#define BCSR_STATUS_SWAPBOOT 0x0040
25814 +#define BCSR_STATUS_FLASHBUSY 0x0100
25815 +#define BCSR_STATUS_IDECBLID 0x0200
25816 +#define BCSR_STATUS_SD0WP 0x0400
25817 +#define BCSR_STATUS_SD1WP 0x0800
25818 +#define BCSR_STATUS_U0RXD 0x1000
25819 +#define BCSR_STATUS_U1RXD 0x2000
25820 +
25821 +#define BCSR_SWITCHES_OCTAL 0x00FF
25822 +#define BCSR_SWITCHES_DIP_1 0x0080
25823 +#define BCSR_SWITCHES_DIP_2 0x0040
25824 +#define BCSR_SWITCHES_DIP_3 0x0020
25825 +#define BCSR_SWITCHES_DIP_4 0x0010
25826 +#define BCSR_SWITCHES_DIP_5 0x0008
25827 +#define BCSR_SWITCHES_DIP_6 0x0004
25828 +#define BCSR_SWITCHES_DIP_7 0x0002
25829 +#define BCSR_SWITCHES_DIP_8 0x0001
25830 +#define BCSR_SWITCHES_ROTARY 0x0F00
25831 +
25832 +#define BCSR_RESETS_ETH 0x0001
25833 +#define BCSR_RESETS_CAMERA 0x0002
25834 +#define BCSR_RESETS_DC 0x0004
25835 +#define BCSR_RESETS_IDE 0x0008
25836 +/* not resets but in the same register */
25837 +#define BCSR_RESETS_WSCFSM 0x0800
25838 +#define BCSR_RESETS_PCS0MUX 0x1000
25839 +#define BCSR_RESETS_PCS1MUX 0x2000
25840 +#define BCSR_RESETS_SPISEL 0x4000
25841 +#define BCSR_RESETS_SD1MUX 0x8000
25842 +
25843 +#define BCSR_PCMCIA_PC0VPP 0x0003
25844 +#define BCSR_PCMCIA_PC0VCC 0x000C
25845 +#define BCSR_PCMCIA_PC0DRVEN 0x0010
25846 +#define BCSR_PCMCIA_PC0RST 0x0080
25847 +#define BCSR_PCMCIA_PC1VPP 0x0300
25848 +#define BCSR_PCMCIA_PC1VCC 0x0C00
25849 +#define BCSR_PCMCIA_PC1DRVEN 0x1000
25850 +#define BCSR_PCMCIA_PC1RST 0x8000
25851 +
25852 +#define BCSR_BOARD_LCDVEE 0x0001
25853 +#define BCSR_BOARD_LCDVDD 0x0002
25854 +#define BCSR_BOARD_LCDBL 0x0004
25855 +#define BCSR_BOARD_CAMSNAP 0x0010
25856 +#define BCSR_BOARD_CAMPWR 0x0020
25857 +#define BCSR_BOARD_SD0PWR 0x0040
25858 +#define BCSR_BOARD_SD1PWR 0x0080
25859 +
25860 +#define BCSR_LEDS_DECIMALS 0x00FF
25861 +#define BCSR_LEDS_LED0 0x0100
25862 +#define BCSR_LEDS_LED1 0x0200
25863 +#define BCSR_LEDS_LED2 0x0400
25864 +#define BCSR_LEDS_LED3 0x0800
25865 +
25866 +#define BCSR_SYSTEM_VDDI 0x001F
25867 +#define BCSR_SYSTEM_POWEROFF 0x4000
25868 +#define BCSR_SYSTEM_RESET 0x8000
25869 +
25870 +/* Bit positions for the different interrupt sources */
25871 +#define BCSR_INT_IDE 0x0001
25872 +#define BCSR_INT_ETH 0x0002
25873 +#define BCSR_INT_PC0 0x0004
25874 +#define BCSR_INT_PC0STSCHG 0x0008
25875 +#define BCSR_INT_PC1 0x0010
25876 +#define BCSR_INT_PC1STSCHG 0x0020
25877 +#define BCSR_INT_DC 0x0040
25878 +#define BCSR_INT_FLASHBUSY 0x0080
25879 +#define BCSR_INT_PC0INSERT 0x0100
25880 +#define BCSR_INT_PC0EJECT 0x0200
25881 +#define BCSR_INT_PC1INSERT 0x0400
25882 +#define BCSR_INT_PC1EJECT 0x0800
25883 +#define BCSR_INT_SD0INSERT 0x1000
25884 +#define BCSR_INT_SD0EJECT 0x2000
25885 +#define BCSR_INT_SD1INSERT 0x4000
25886 +#define BCSR_INT_SD1EJECT 0x8000
25887 +
25888 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0D000300)
25889 +#define AU1XXX_SMC91111_IRQ PB1200_ETH_INT
25890 +
25891 +#define AU1XXX_ATA_PHYS_ADDR (0x0C800000)
25892 +#define AU1XXX_ATA_PHYS_LEN (0x100)
25893 +#define AU1XXX_ATA_REG_OFFSET (5)
25894 +#define AU1XXX_ATA_INT PB1200_IDE_INT
25895 +#define AU1XXX_ATA_DDMA_REQ DSCR_CMD0_DMA_REQ1;
25896 +#define AU1XXX_ATA_RQSIZE 128
25897 +
25898 +#define NAND_PHYS_ADDR 0x1C000000
25899 +
25900 +/* Timing values as described in databook, * ns value stripped of
25901 + * lower 2 bits.
25902 + * These defines are here rather than an SOC1200 generic file because
25903 + * the parts chosen on another board may be different and may require
25904 + * different timings.
25905 + */
25906 +#define NAND_T_H (18 >> 2)
25907 +#define NAND_T_PUL (30 >> 2)
25908 +#define NAND_T_SU (30 >> 2)
25909 +#define NAND_T_WH (30 >> 2)
25910 +
25911 +/* Bitfield shift amounts */
25912 +#define NAND_T_H_SHIFT 0
25913 +#define NAND_T_PUL_SHIFT 4
25914 +#define NAND_T_SU_SHIFT 8
25915 +#define NAND_T_WH_SHIFT 12
25916 +
25917 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
25918 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
25919 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
25920 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
25921 +
25922 +
25923 +/*
25924 + * External Interrupts for Pb1200 as of 8/6/2004.
25925 + * Bit positions in the CPLD registers can be calculated by taking
25926 + * the interrupt define and subtracting the PB1200_INT_BEGIN value.
25927 + * *example: IDE bis pos is = 64 - 64
25928 + ETH bit pos is = 65 - 64
25929 + */
25930 +#define PB1200_INT_BEGIN (AU1000_LAST_INTC1_INT + 1)
25931 +#define PB1200_IDE_INT (PB1200_INT_BEGIN + 0)
25932 +#define PB1200_ETH_INT (PB1200_INT_BEGIN + 1)
25933 +#define PB1200_PC0_INT (PB1200_INT_BEGIN + 2)
25934 +#define PB1200_PC0_STSCHG_INT (PB1200_INT_BEGIN + 3)
25935 +#define PB1200_PC1_INT (PB1200_INT_BEGIN + 4)
25936 +#define PB1200_PC1_STSCHG_INT (PB1200_INT_BEGIN + 5)
25937 +#define PB1200_DC_INT (PB1200_INT_BEGIN + 6)
25938 +#define PB1200_FLASHBUSY_INT (PB1200_INT_BEGIN + 7)
25939 +#define PB1200_PC0_INSERT_INT (PB1200_INT_BEGIN + 8)
25940 +#define PB1200_PC0_EJECT_INT (PB1200_INT_BEGIN + 9)
25941 +#define PB1200_PC1_INSERT_INT (PB1200_INT_BEGIN + 10)
25942 +#define PB1200_PC1_EJECT_INT (PB1200_INT_BEGIN + 11)
25943 +#define PB1200_SD0_INSERT_INT (PB1200_INT_BEGIN + 12)
25944 +#define PB1200_SD0_EJECT_INT (PB1200_INT_BEGIN + 13)
25945 +#define PB1200_SD1_INSERT_INT (PB1200_INT_BEGIN + 14)
25946 +#define PB1200_SD1_EJECT_INT (PB1200_INT_BEGIN + 15)
25947 +
25948 +#define PB1200_INT_END (PB1200_INT_BEGIN + 15)
25949 +
25950 +/* For drivers/pcmcia/au1000_db1x00.c */
25951 +#define BOARD_PC0_INT PB1200_PC0_INT
25952 +#define BOARD_PC1_INT PB1200_PC1_INT
25953 +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET)))
25954 +
25955 +#endif /* __ASM_PB1200_H */
25956 +
25957 diff -Nur linux-2.4.30/include/asm-mips/pb1550.h linux-2.4.30-mips/include/asm-mips/pb1550.h
25958 --- linux-2.4.30/include/asm-mips/pb1550.h 2005-01-19 15:10:12.000000000 +0100
25959 +++ linux-2.4.30-mips/include/asm-mips/pb1550.h 2005-01-30 09:01:28.000000000 +0100
25960 @@ -30,13 +30,11 @@
25961
25962 #define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
25963 #define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
25964 -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
25965 -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
25966 -
25967 #define SPI_PSC_BASE PSC0_BASE_ADDR
25968 #define AC97_PSC_BASE PSC1_BASE_ADDR
25969 #define SMBUS_PSC_BASE PSC2_BASE_ADDR
25970 #define I2S_PSC_BASE PSC3_BASE_ADDR
25971 +#define NAND_CS 1
25972
25973 #define BCSR_PHYS_ADDR 0xAF000000
25974
25975 @@ -160,9 +158,23 @@
25976 #define NAND_T_SU_SHIFT 8
25977 #define NAND_T_WH_SHIFT 12
25978
25979 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
25980 - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
25981 - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
25982 - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
25983 +#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \
25984 + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \
25985 + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \
25986 + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)
25987 +
25988 +/*
25989 + * Daughter card information.
25990 + */
25991 +#define DAUGHTER_CARD_BASE (0xAC000000)
25992 +#define DAUGHTER_CARD_MEM_SIZE (0xADFFFFFF - DAUGHTER_CARD_BASE + 1)
25993 +#define DAUGHTER_CARD_IRQ (AU1000_GPIO_3)
25994 +
25995 +/* DC_IDE and DC_ETHERNET */
25996 +#define AU1XXX_ATA_PHYS_ADDR (0x0C000000)
25997 +#define AU1XXX_ATA_REG_OFFSET (5)
25998 +
25999 +#define AU1XXX_SMC91111_PHYS_ADDR (0x0C000300)
26000 +#define AU1XXX_SMC91111_IRQ AU1000_GPIO_3
26001
26002 #endif /* __ASM_PB1550_H */
26003 diff -Nur linux-2.4.30/include/asm-mips/tx4927/tx4927.h linux-2.4.30-mips/include/asm-mips/tx4927/tx4927.h
26004 --- linux-2.4.30/include/asm-mips/tx4927/tx4927.h 2003-08-25 13:44:44.000000000 +0200
26005 +++ linux-2.4.30-mips/include/asm-mips/tx4927/tx4927.h 2004-11-22 19:02:10.000000000 +0100
26006 @@ -88,8 +88,8 @@
26007
26008
26009 /* TX4927 Configuration registers (64-bit registers) */
26010 -#define TX4927_CONFIG_BASE 0xe300
26011 -#define TX4927_CONFIG_CCFG 0xe300
26012 +#define TX4927_CONFIG_BASE 0xe000
26013 +#define TX4927_CONFIG_CCFG 0xe000
26014 #define TX4927_CONFIG_CCFG_RESERVED_42_63 BM_63_42
26015 #define TX4927_CONFIG_CCFG_WDRST BM_41_41
26016 #define TX4927_CONFIG_CCFG_WDREXEN BM_40_40
26017 @@ -124,14 +124,14 @@
26018 #define TX4927_CONFIG_CCFG_ENDIAN BM_02_02
26019 #define TX4927_CONFIG_CCFG_ARMODE BM_01_01
26020 #define TX4927_CONFIG_CCFG_ACEHOLD BM_00_00
26021 -#define TX4927_CONFIG_REVID 0xe308
26022 +#define TX4927_CONFIG_REVID 0xe008
26023 #define TX4927_CONFIG_REVID_RESERVED_32_63 BM_32_63
26024 #define TX4927_CONFIG_REVID_PCODE BM_16_31
26025 #define TX4927_CONFIG_REVID_MJERREV BM_12_15
26026 #define TX4927_CONFIG_REVID_MINEREV BM_08_11
26027 #define TX4927_CONFIG_REVID_MJREV BM_04_07
26028 #define TX4927_CONFIG_REVID_MINREV BM_00_03
26029 -#define TX4927_CONFIG_PCFG 0xe310
26030 +#define TX4927_CONFIG_PCFG 0xe010
26031 #define TX4927_CONFIG_PCFG_RESERVED_57_63 BM_57_63
26032 #define TX4927_CONFIG_PCFG_DRVDATA BM_56_56
26033 #define TX4927_CONFIG_PCFG_DRVCB BM_55_55
26034 @@ -197,10 +197,10 @@
26035 #define TX4927_CONFIG_PCFG_DMASEL0_SIO1 BM_00_00
26036 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC0 BM_01_01
26037 #define TX4927_CONFIG_PCFG_DMASEL0_ACLC2 BM_00_01
26038 -#define TX4927_CONFIG_TOEA 0xe318
26039 +#define TX4927_CONFIG_TOEA 0xe018
26040 #define TX4927_CONFIG_TOEA_RESERVED_36_63 BM_36_63
26041 #define TX4927_CONFIG_TOEA_TOEA BM_00_35
26042 -#define TX4927_CONFIG_CLKCTR 0xe320
26043 +#define TX4927_CONFIG_CLKCTR 0xe020
26044 #define TX4927_CONFIG_CLKCTR_RESERVED_26_63 BM_26_63
26045 #define TX4927_CONFIG_CLKCTR_ACLCKD BM_25_25
26046 #define TX4927_CONFIG_CLKCTR_PIOCKD BM_24_24
26047 @@ -223,7 +223,7 @@
26048 #define TX4927_CONFIG_CLKCTR_TM2RST BM_02_02
26049 #define TX4927_CONFIG_CLKCTR_SIO0RST BM_01_01
26050 #define TX4927_CONFIG_CLKCTR_SIO1RST BM_00_00
26051 -#define TX4927_CONFIG_GARBC 0xe330
26052 +#define TX4927_CONFIG_GARBC 0xe030
26053 #define TX4927_CONFIG_GARBC_RESERVED_10_63 BM_10_63
26054 #define TX4927_CONFIG_GARBC_SET_09 BM_09_09
26055 #define TX4927_CONFIG_GARBC_ARBMD BM_08_08
26056 @@ -243,7 +243,7 @@
26057 #define TX4927_CONFIG_GARBC_PRIORITY_H3_PDMAC BM_00_00
26058 #define TX4927_CONFIG_GARBC_PRIORITY_H3_DMAC BM_01_01
26059 #define TX4927_CONFIG_GARBC_PRIORITY_H3_BAD_VALUE BM_00_01
26060 -#define TX4927_CONFIG_RAMP 0xe348
26061 +#define TX4927_CONFIG_RAMP 0xe048
26062 #define TX4927_CONFIG_RAMP_RESERVED_20_63 BM_20_63
26063 #define TX4927_CONFIG_RAMP_RAMP BM_00_19
26064 #define TX4927_CONFIG_LIMIT 0xefff
26065 @@ -456,7 +456,7 @@
26066 #define TX4927_ACLC_ACINTSTS 0xf710
26067 #define TX4927_ACLC_ACINTMSTS 0xf714
26068 #define TX4927_ACLC_ACINTEN 0xf718
26069 -#define TX4927_ACLC_ACINTDIS 0xfR71c
26070 +#define TX4927_ACLC_ACINTDIS 0xf71c
26071 #define TX4927_ACLC_ACSEMAPH 0xf720
26072 #define TX4927_ACLC_ACGPIDAT 0xf740
26073 #define TX4927_ACLC_ACGPODAT 0xf744
26074 diff -Nur linux-2.4.30/include/asm-mips/unistd.h linux-2.4.30-mips/include/asm-mips/unistd.h
26075 --- linux-2.4.30/include/asm-mips/unistd.h 2005-01-19 15:10:12.000000000 +0100
26076 +++ linux-2.4.30-mips/include/asm-mips/unistd.h 2004-11-24 21:30:06.000000000 +0100
26077 @@ -760,7 +760,7 @@
26078 if (__a3 == 0) \
26079 return (type) __v0; \
26080 errno = __v0; \
26081 - return -1; \
26082 + return (type)-1; \
26083 }
26084
26085 /*
26086 @@ -788,7 +788,7 @@
26087 if (__a3 == 0) \
26088 return (type) __v0; \
26089 errno = __v0; \
26090 - return -1; \
26091 + return (type)-1; \
26092 }
26093
26094 #define _syscall2(type,name,atype,a,btype,b) \
26095 @@ -813,7 +813,7 @@
26096 if (__a3 == 0) \
26097 return (type) __v0; \
26098 errno = __v0; \
26099 - return -1; \
26100 + return (type)-1; \
26101 }
26102
26103 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
26104 @@ -839,7 +839,7 @@
26105 if (__a3 == 0) \
26106 return (type) __v0; \
26107 errno = __v0; \
26108 - return -1; \
26109 + return (type)-1; \
26110 }
26111
26112 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
26113 @@ -865,7 +865,7 @@
26114 if (__a3 == 0) \
26115 return (type) __v0; \
26116 errno = __v0; \
26117 - return -1; \
26118 + return (type)-1; \
26119 }
26120
26121 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
26122 @@ -902,7 +902,7 @@
26123 if (__a3 == 0) \
26124 return (type) __v0; \
26125 errno = __v0; \
26126 - return -1; \
26127 + return (type)-1; \
26128 }
26129
26130 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
26131 @@ -935,7 +935,7 @@
26132 if (__a3 == 0) \
26133 return (type) __v0; \
26134 errno = __v0; \
26135 - return -1; \
26136 + return (type)-1; \
26137 }
26138
26139 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
26140 @@ -966,7 +966,7 @@
26141 if (__a3 == 0) \
26142 return (type) __v0; \
26143 errno = __v0; \
26144 - return -1; \
26145 + return (type)-1; \
26146 }
26147
26148 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
26149 @@ -995,7 +995,7 @@
26150 if (__a3 == 0) \
26151 return (type) __v0; \
26152 errno = __v0; \
26153 - return -1; \
26154 + return (type)-1; \
26155 }
26156
26157 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
26158 diff -Nur linux-2.4.30/include/asm-mips64/hazards.h linux-2.4.30-mips/include/asm-mips64/hazards.h
26159 --- linux-2.4.30/include/asm-mips64/hazards.h 2004-02-18 14:36:32.000000000 +0100
26160 +++ linux-2.4.30-mips/include/asm-mips64/hazards.h 2004-11-25 23:18:38.000000000 +0100
26161 @@ -3,7 +3,7 @@
26162 * License. See the file "COPYING" in the main directory of this archive
26163 * for more details.
26164 *
26165 - * Copyright (C) 2003 Ralf Baechle
26166 + * Copyright (C) 2003, 2004 Ralf Baechle
26167 */
26168 #ifndef _ASM_HAZARDS_H
26169 #define _ASM_HAZARDS_H
26170 @@ -12,37 +12,185 @@
26171
26172 #ifdef __ASSEMBLY__
26173
26174 + .macro _ssnop
26175 + sll $0, $0, 1
26176 + .endm
26177 +
26178 /*
26179 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
26180 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
26181 * for data translations should not occur for 3 cpu cycles.
26182 */
26183 #ifdef CONFIG_CPU_RM9000
26184 -#define rm9000_tlb_hazard \
26185 +
26186 +#define mtc0_tlbw_hazard \
26187 + .set push; \
26188 + .set mips32; \
26189 + _ssnop; _ssnop; _ssnop; _ssnop; \
26190 + .set pop
26191 +
26192 +#define tlbw_eret_hazard \
26193 + .set push; \
26194 .set mips32; \
26195 - ssnop; ssnop; ssnop; ssnop; \
26196 - .set mips0
26197 + _ssnop; _ssnop; _ssnop; _ssnop; \
26198 + .set pop
26199 +
26200 #else
26201 -#define rm9000_tlb_hazard
26202 +
26203 +/*
26204 + * The taken branch will result in a two cycle penalty for the two killed
26205 + * instructions on R4000 / R4400. Other processors only have a single cycle
26206 + * hazard so this is nice trick to have an optimal code for a range of
26207 + * processors.
26208 + */
26209 +#define mtc0_tlbw_hazard \
26210 + b . + 8
26211 +#define tlbw_eret_hazard
26212 #endif
26213
26214 +/*
26215 + * mtc0->mfc0 hazard
26216 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
26217 + * It is a MIPS32R2 processor so ehb will clear the hazard.
26218 + */
26219 +
26220 +#ifdef CONFIG_CPU_MIPSR2
26221 +/*
26222 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
26223 + */
26224 + .macro ehb
26225 + sll $0, $0, 3
26226 + .endm
26227 +
26228 +#define irq_enable_hazard \
26229 + ehb # irq_enable_hazard
26230 +
26231 +#define irq_disable_hazard \
26232 + ehb # irq_disable_hazard
26233 +
26234 #else
26235
26236 +#define irq_enable_hazard
26237 +#define irq_disable_hazard
26238 +
26239 +#endif
26240 +
26241 +#else /* __ASSEMBLY__ */
26242 +
26243 /*
26244 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
26245 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
26246 * for data translations should not occur for 3 cpu cycles.
26247 */
26248 #ifdef CONFIG_CPU_RM9000
26249 -#define rm9000_tlb_hazard() \
26250 +
26251 +#define mtc0_tlbw_hazard() \
26252 + __asm__ __volatile__( \
26253 + ".set\tmips32\n\t" \
26254 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
26255 + ".set\tmips0")
26256 +
26257 +#define tlbw_use_hazard() \
26258 __asm__ __volatile__( \
26259 ".set\tmips32\n\t" \
26260 - "ssnop; ssnop; ssnop; ssnop\n\t" \
26261 + "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
26262 ".set\tmips0")
26263 #else
26264 -#define rm9000_tlb_hazard() do { } while (0)
26265 +
26266 +/*
26267 + * Overkill warning ...
26268 + */
26269 +#define mtc0_tlbw_hazard() \
26270 + __asm__ __volatile__( \
26271 + ".set noreorder\n\t" \
26272 + "nop; nop; nop; nop; nop; nop;\n\t" \
26273 + ".set reorder\n\t")
26274 +
26275 +#define tlbw_use_hazard() \
26276 + __asm__ __volatile__( \
26277 + ".set noreorder\n\t" \
26278 + "nop; nop; nop; nop; nop; nop;\n\t" \
26279 + ".set reorder\n\t")
26280 +
26281 #endif
26282
26283 +/*
26284 + * mtc0->mfc0 hazard
26285 + * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
26286 + * It is a MIPS32R2 processor so ehb will clear the hazard.
26287 + */
26288 +
26289 +#ifdef CONFIG_CPU_MIPSR2
26290 +/*
26291 + * Use a macro for ehb unless explicit support for MIPSR2 is enabled
26292 + */
26293 +__asm__(
26294 + " .macro ehb \n\t"
26295 + " sll $0, $0, 3 \n\t"
26296 + " .endm \n\t"
26297 + " \n\t"
26298 + " .macro\tirq_enable_hazard \n\t"
26299 + " ehb \n\t"
26300 + " .endm \n\t"
26301 + " \n\t"
26302 + " .macro\tirq_disable_hazard \n\t"
26303 + " ehb \n\t"
26304 + " .endm");
26305 +
26306 +#define irq_enable_hazard() \
26307 + __asm__ __volatile__( \
26308 + "ehb\t\t\t\t# irq_enable_hazard")
26309 +
26310 +#define irq_disable_hazard() \
26311 + __asm__ __volatile__( \
26312 + "ehb\t\t\t\t# irq_disable_hazard")
26313 +
26314 +#elif defined(CONFIG_CPU_R10000)
26315 +
26316 +/*
26317 + * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
26318 + */
26319 +
26320 +__asm__(
26321 + " .macro\tirq_enable_hazard \n\t"
26322 + " .endm \n\t"
26323 + " \n\t"
26324 + " .macro\tirq_disable_hazard \n\t"
26325 + " .endm");
26326 +
26327 +#define irq_enable_hazard() do { } while (0)
26328 +#define irq_disable_hazard() do { } while (0)
26329 +
26330 +#else
26331 +
26332 +/*
26333 + * Default for classic MIPS processors. Assume worst case hazards but don't
26334 + * care about the irq_enable_hazard - sooner or later the hardware will
26335 + * enable it and we don't care when exactly.
26336 + */
26337 +
26338 +__asm__(
26339 + " .macro _ssnop \n\t"
26340 + " sll $0, $2, 1 \n\t"
26341 + " .endm \n\t"
26342 + " \n\t"
26343 + " # \n\t"
26344 + " # There is a hazard but we do not care \n\t"
26345 + " # \n\t"
26346 + " .macro\tirq_enable_hazard \n\t"
26347 + " .endm \n\t"
26348 + " \n\t"
26349 + " .macro\tirq_disable_hazard \n\t"
26350 + " _ssnop; _ssnop; _ssnop \n\t"
26351 + " .endm");
26352 +
26353 +#define irq_enable_hazard() do { } while (0)
26354 +#define irq_disable_hazard() \
26355 + __asm__ __volatile__( \
26356 + "_ssnop; _ssnop; _ssnop;\t\t# irq_disable_hazard")
26357 +
26358 #endif
26359
26360 +#endif /* __ASSEMBLY__ */
26361 +
26362 #endif /* _ASM_HAZARDS_H */
26363 diff -Nur linux-2.4.30/include/asm-mips64/mipsregs.h linux-2.4.30-mips/include/asm-mips64/mipsregs.h
26364 --- linux-2.4.30/include/asm-mips64/mipsregs.h 2005-01-19 15:10:12.000000000 +0100
26365 +++ linux-2.4.30-mips/include/asm-mips64/mipsregs.h 2005-02-06 22:24:22.000000000 +0100
26366 @@ -757,10 +757,18 @@
26367 #define read_c0_config1() __read_32bit_c0_register($16, 1)
26368 #define read_c0_config2() __read_32bit_c0_register($16, 2)
26369 #define read_c0_config3() __read_32bit_c0_register($16, 3)
26370 +#define read_c0_config4() __read_32bit_c0_register($16, 4)
26371 +#define read_c0_config5() __read_32bit_c0_register($16, 5)
26372 +#define read_c0_config6() __read_32bit_c0_register($16, 6)
26373 +#define read_c0_config7() __read_32bit_c0_register($16, 7)
26374 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
26375 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
26376 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
26377 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
26378 +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
26379 +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
26380 +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
26381 +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
26382
26383 /*
26384 * The WatchLo register. There may be upto 8 of them.
26385 @@ -856,42 +864,34 @@
26386 */
26387 static inline void tlb_probe(void)
26388 {
26389 - rm9000_tlb_hazard();
26390 __asm__ __volatile__(
26391 ".set noreorder\n\t"
26392 "tlbp\n\t"
26393 ".set reorder");
26394 - rm9000_tlb_hazard();
26395 }
26396
26397 static inline void tlb_read(void)
26398 {
26399 - rm9000_tlb_hazard();
26400 __asm__ __volatile__(
26401 ".set noreorder\n\t"
26402 "tlbr\n\t"
26403 ".set reorder");
26404 - rm9000_tlb_hazard();
26405 }
26406
26407 static inline void tlb_write_indexed(void)
26408 {
26409 - rm9000_tlb_hazard();
26410 __asm__ __volatile__(
26411 ".set noreorder\n\t"
26412 "tlbwi\n\t"
26413 ".set reorder");
26414 - rm9000_tlb_hazard();
26415 }
26416
26417 static inline void tlb_write_random(void)
26418 {
26419 - rm9000_tlb_hazard();
26420 __asm__ __volatile__(
26421 ".set noreorder\n\t"
26422 "tlbwr\n\t"
26423 ".set reorder");
26424 - rm9000_tlb_hazard();
26425 }
26426
26427 /*
26428 diff -Nur linux-2.4.30/include/asm-mips64/unistd.h linux-2.4.30-mips/include/asm-mips64/unistd.h
26429 --- linux-2.4.30/include/asm-mips64/unistd.h 2005-01-19 15:10:12.000000000 +0100
26430 +++ linux-2.4.30-mips/include/asm-mips64/unistd.h 2004-11-24 21:30:06.000000000 +0100
26431 @@ -760,7 +760,7 @@
26432 if (__a3 == 0) \
26433 return (type) __v0; \
26434 errno = __v0; \
26435 - return -1; \
26436 + return (type)-1; \
26437 }
26438
26439 /*
26440 @@ -788,7 +788,7 @@
26441 if (__a3 == 0) \
26442 return (type) __v0; \
26443 errno = __v0; \
26444 - return -1; \
26445 + return (type)-1; \
26446 }
26447
26448 #define _syscall2(type,name,atype,a,btype,b) \
26449 @@ -813,7 +813,7 @@
26450 if (__a3 == 0) \
26451 return (type) __v0; \
26452 errno = __v0; \
26453 - return -1; \
26454 + return (type)-1; \
26455 }
26456
26457 #define _syscall3(type,name,atype,a,btype,b,ctype,c) \
26458 @@ -839,7 +839,7 @@
26459 if (__a3 == 0) \
26460 return (type) __v0; \
26461 errno = __v0; \
26462 - return -1; \
26463 + return (type)-1; \
26464 }
26465
26466 #define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
26467 @@ -865,7 +865,7 @@
26468 if (__a3 == 0) \
26469 return (type) __v0; \
26470 errno = __v0; \
26471 - return -1; \
26472 + return (type)-1; \
26473 }
26474
26475 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
26476 @@ -902,7 +902,7 @@
26477 if (__a3 == 0) \
26478 return (type) __v0; \
26479 errno = __v0; \
26480 - return -1; \
26481 + return (type)-1; \
26482 }
26483
26484 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
26485 @@ -935,7 +935,7 @@
26486 if (__a3 == 0) \
26487 return (type) __v0; \
26488 errno = __v0; \
26489 - return -1; \
26490 + return (type)-1; \
26491 }
26492
26493 #endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
26494 @@ -966,7 +966,7 @@
26495 if (__a3 == 0) \
26496 return (type) __v0; \
26497 errno = __v0; \
26498 - return -1; \
26499 + return (type)-1; \
26500 }
26501
26502 #define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
26503 @@ -995,7 +995,7 @@
26504 if (__a3 == 0) \
26505 return (type) __v0; \
26506 errno = __v0; \
26507 - return -1; \
26508 + return (type)-1; \
26509 }
26510
26511 #endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
26512 diff -Nur linux-2.4.30/include/asm-ppc/param.h linux-2.4.30-mips/include/asm-ppc/param.h
26513 --- linux-2.4.30/include/asm-ppc/param.h 2003-06-13 16:51:38.000000000 +0200
26514 +++ linux-2.4.30-mips/include/asm-ppc/param.h 2003-07-05 05:23:46.000000000 +0200
26515 @@ -3,6 +3,9 @@
26516
26517 #ifndef HZ
26518 #define HZ 100
26519 +#ifdef __KERNEL__
26520 +#define hz_to_std(a) (a)
26521 +#endif
26522 #endif
26523
26524 #define EXEC_PAGESIZE 4096
26525 diff -Nur linux-2.4.30/include/asm-s390/param.h linux-2.4.30-mips/include/asm-s390/param.h
26526 --- linux-2.4.30/include/asm-s390/param.h 2001-02-13 23:13:44.000000000 +0100
26527 +++ linux-2.4.30-mips/include/asm-s390/param.h 2001-03-09 21:34:48.000000000 +0100
26528 @@ -11,6 +11,9 @@
26529
26530 #ifndef HZ
26531 #define HZ 100
26532 +#ifdef __KERNEL__
26533 +#define hz_to_std(a) (a)
26534 +#endif
26535 #endif
26536
26537 #define EXEC_PAGESIZE 4096
26538 diff -Nur linux-2.4.30/include/asm-sh/param.h linux-2.4.30-mips/include/asm-sh/param.h
26539 --- linux-2.4.30/include/asm-sh/param.h 2001-01-04 22:19:13.000000000 +0100
26540 +++ linux-2.4.30-mips/include/asm-sh/param.h 2001-01-11 05:02:45.000000000 +0100
26541 @@ -3,6 +3,9 @@
26542
26543 #ifndef HZ
26544 #define HZ 100
26545 +#ifdef __KERNEL__
26546 +#define hz_to_std(a) (a)
26547 +#endif
26548 #endif
26549
26550 #define EXEC_PAGESIZE 4096
26551 diff -Nur linux-2.4.30/include/asm-sparc/param.h linux-2.4.30-mips/include/asm-sparc/param.h
26552 --- linux-2.4.30/include/asm-sparc/param.h 2000-10-30 23:34:12.000000000 +0100
26553 +++ linux-2.4.30-mips/include/asm-sparc/param.h 2000-11-23 03:00:56.000000000 +0100
26554 @@ -4,6 +4,9 @@
26555
26556 #ifndef HZ
26557 #define HZ 100
26558 +#ifdef __KERNEL__
26559 +#define hz_to_std(a) (a)
26560 +#endif
26561 #endif
26562
26563 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
26564 diff -Nur linux-2.4.30/include/asm-sparc64/param.h linux-2.4.30-mips/include/asm-sparc64/param.h
26565 --- linux-2.4.30/include/asm-sparc64/param.h 2000-10-30 23:34:12.000000000 +0100
26566 +++ linux-2.4.30-mips/include/asm-sparc64/param.h 2000-11-23 03:00:56.000000000 +0100
26567 @@ -4,6 +4,9 @@
26568
26569 #ifndef HZ
26570 #define HZ 100
26571 +#ifdef __KERNEL__
26572 +#define hz_to_std(a) (a)
26573 +#endif
26574 #endif
26575
26576 #define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */
26577 diff -Nur linux-2.4.30/include/linux/i2c-algo-au1550.h linux-2.4.30-mips/include/linux/i2c-algo-au1550.h
26578 --- linux-2.4.30/include/linux/i2c-algo-au1550.h 1970-01-01 01:00:00.000000000 +0100
26579 +++ linux-2.4.30-mips/include/linux/i2c-algo-au1550.h 2004-07-07 02:38:02.000000000 +0200
26580 @@ -0,0 +1,31 @@
26581 +/*
26582 + * Copyright (C) 2004 Embedded Edge, LLC <dan@embeddededge.com>
26583 + *
26584 + * This program is free software; you can redistribute it and/or modify
26585 + * it under the terms of the GNU General Public License as published by
26586 + * the Free Software Foundation; either version 2 of the License, or
26587 + * (at your option) any later version.
26588 + *
26589 + * This program is distributed in the hope that it will be useful,
26590 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
26591 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26592 + * GNU General Public License for more details.
26593 + *
26594 + * You should have received a copy of the GNU General Public License
26595 + * along with this program; if not, write to the Free Software
26596 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26597 + */
26598 +
26599 +#ifndef I2C_ALGO_AU1550_H
26600 +#define I2C_ALGO_AU1550_H 1
26601 +
26602 +struct i2c_algo_au1550_data {
26603 + u32 psc_base;
26604 + int xfer_timeout;
26605 + int ack_timeout;
26606 +};
26607 +
26608 +int i2c_au1550_add_bus(struct i2c_adapter *);
26609 +int i2c_au1550_del_bus(struct i2c_adapter *);
26610 +
26611 +#endif /* I2C_ALGO_AU1550_H */
26612 diff -Nur linux-2.4.30/include/linux/i2c-id.h linux-2.4.30-mips/include/linux/i2c-id.h
26613 --- linux-2.4.30/include/linux/i2c-id.h 2004-02-18 14:36:32.000000000 +0100
26614 +++ linux-2.4.30-mips/include/linux/i2c-id.h 2004-07-07 02:38:02.000000000 +0200
26615 @@ -156,6 +156,8 @@
26616
26617 #define I2C_ALGO_SGI 0x130000 /* SGI algorithm */
26618
26619 +#define I2C_ALGO_AU1550 0x140000 /* Alchemy Au1550 PSC */
26620 +
26621 #define I2C_ALGO_EXP 0x800000 /* experimental */
26622
26623 #define I2C_ALGO_MASK 0xff0000 /* Mask for algorithms */
26624 @@ -204,6 +206,9 @@
26625 #define I2C_HW_SGI_VINO 0x00
26626 #define I2C_HW_SGI_MACE 0x01
26627
26628 +/* --- Au1550 PSC adapters */
26629 +#define I2C_HW_AU1550_PSC 0x00
26630 +
26631 /* --- SMBus only adapters */
26632 #define I2C_HW_SMBUS_PIIX4 0x00
26633 #define I2C_HW_SMBUS_ALI15X3 0x01
26634 diff -Nur linux-2.4.30/include/linux/sched.h linux-2.4.30-mips/include/linux/sched.h
26635 --- linux-2.4.30/include/linux/sched.h 2005-01-19 15:10:12.000000000 +0100
26636 +++ linux-2.4.30-mips/include/linux/sched.h 2004-11-29 18:47:18.000000000 +0100
26637 @@ -617,6 +617,10 @@
26638 extern int in_group_p(gid_t);
26639 extern int in_egroup_p(gid_t);
26640
26641 +extern ATTRIB_NORET void cpu_idle(void);
26642 +
26643 +extern void release_task(struct task_struct * p);
26644 +
26645 extern void proc_caches_init(void);
26646 extern void flush_signals(struct task_struct *);
26647 extern void flush_signal_handlers(struct task_struct *);
26648 diff -Nur linux-2.4.30/include/linux/serial.h linux-2.4.30-mips/include/linux/serial.h
26649 --- linux-2.4.30/include/linux/serial.h 2002-08-03 02:39:45.000000000 +0200
26650 +++ linux-2.4.30-mips/include/linux/serial.h 2004-07-31 02:17:57.000000000 +0200
26651 @@ -75,7 +75,8 @@
26652 #define PORT_16654 11
26653 #define PORT_16850 12
26654 #define PORT_RSA 13 /* RSA-DV II/S card */
26655 -#define PORT_MAX 13
26656 +#define PORT_SB1250 14
26657 +#define PORT_MAX 14
26658
26659 #define SERIAL_IO_PORT 0
26660 #define SERIAL_IO_HUB6 1
26661 diff -Nur linux-2.4.30/include/linux/swap.h linux-2.4.30-mips/include/linux/swap.h
26662 --- linux-2.4.30/include/linux/swap.h 2005-01-19 15:10:12.000000000 +0100
26663 +++ linux-2.4.30-mips/include/linux/swap.h 2004-11-29 18:47:18.000000000 +0100
26664 @@ -1,6 +1,12 @@
26665 #ifndef _LINUX_SWAP_H
26666 #define _LINUX_SWAP_H
26667
26668 +#include <linux/config.h>
26669 +
26670 +#define MAX_SWAPFILES 32
26671 +
26672 +#ifdef __KERNEL__
26673 +
26674 #include <linux/spinlock.h>
26675 #include <asm/page.h>
26676
26677 @@ -8,8 +14,6 @@
26678 #define SWAP_FLAG_PRIO_MASK 0x7fff
26679 #define SWAP_FLAG_PRIO_SHIFT 0
26680
26681 -#define MAX_SWAPFILES 32
26682 -
26683 /*
26684 * Magic header for a swap area. The first part of the union is
26685 * what the swap magic looks like for the old (limited to 128MB)
26686 @@ -39,8 +43,6 @@
26687 } info;
26688 };
26689
26690 -#ifdef __KERNEL__
26691 -
26692 /*
26693 * Max bad pages in the new format..
26694 */
26695 diff -Nur linux-2.4.30/include/video/newport.h linux-2.4.30-mips/include/video/newport.h
26696 --- linux-2.4.30/include/video/newport.h 2001-04-12 21:20:31.000000000 +0200
26697 +++ linux-2.4.30-mips/include/video/newport.h 2004-09-23 15:32:29.000000000 +0200
26698 @@ -291,8 +291,6 @@
26699 unsigned int _unused2[0x1ef];
26700 struct newport_cregs cgo;
26701 };
26702 -extern struct newport_regs *npregs;
26703 -
26704
26705 typedef struct {
26706 unsigned int drawmode1;
26707 @@ -450,38 +448,26 @@
26708
26709 /* Miscellaneous NEWPORT routines. */
26710 #define BUSY_TIMEOUT 100000
26711 -static __inline__ int newport_wait(void)
26712 +static __inline__ int newport_wait(struct newport_regs *regs)
26713 {
26714 - int i = 0;
26715 + int t = BUSY_TIMEOUT;
26716
26717 - while(i < BUSY_TIMEOUT)
26718 - if(!(npregs->cset.status & NPORT_STAT_GBUSY))
26719 + while (t--)
26720 + if (!(regs->cset.status & NPORT_STAT_GBUSY))
26721 break;
26722 - if(i == BUSY_TIMEOUT)
26723 - return 1;
26724 - return 0;
26725 + return !t;
26726 }
26727
26728 -static __inline__ int newport_bfwait(void)
26729 +static __inline__ int newport_bfwait(struct newport_regs *regs)
26730 {
26731 - int i = 0;
26732 + int t = BUSY_TIMEOUT;
26733
26734 - while(i < BUSY_TIMEOUT)
26735 - if(!(npregs->cset.status & NPORT_STAT_BBUSY))
26736 + while (t--)
26737 + if(!(regs->cset.status & NPORT_STAT_BBUSY))
26738 break;
26739 - if(i == BUSY_TIMEOUT)
26740 - return 1;
26741 - return 0;
26742 + return !t;
26743 }
26744
26745 -/* newport.c and cons_newport.c routines */
26746 -extern struct graphics_ops *newport_probe (int, const char **);
26747 -
26748 -void newport_save (void *);
26749 -void newport_restore (void *);
26750 -void newport_reset (void);
26751 -int newport_ioctl (int card, int cmd, unsigned long arg);
26752 -
26753 /*
26754 * DCBMODE register defines:
26755 */
26756 @@ -564,7 +550,7 @@
26757 {
26758 rex->set.dcbmode = DCB_XMAP0 | XM9_CRS_FIFO_AVAIL |
26759 DCB_DATAWIDTH_1 | R_DCB_XMAP9_PROTOCOL;
26760 - newport_bfwait ();
26761 + newport_bfwait (rex);
26762
26763 while ((rex->set.dcbdata0.bybytes.b3 & 3) != XM9_FIFO_EMPTY)
26764 ;
26765 diff -Nur linux-2.4.30/init/main.c linux-2.4.30-mips/init/main.c
26766 --- linux-2.4.30/init/main.c 2004-11-17 12:54:22.000000000 +0100
26767 +++ linux-2.4.30-mips/init/main.c 2004-11-19 01:28:52.000000000 +0100
26768 @@ -296,7 +296,6 @@
26769
26770
26771 extern void setup_arch(char **);
26772 -extern void cpu_idle(void);
26773
26774 unsigned long wait_init_idle;
26775
26776 diff -Nur linux-2.4.30/kernel/exit.c linux-2.4.30-mips/kernel/exit.c
26777 --- linux-2.4.30/kernel/exit.c 2002-11-29 00:53:15.000000000 +0100
26778 +++ linux-2.4.30-mips/kernel/exit.c 2003-01-11 18:53:18.000000000 +0100
26779 @@ -26,7 +26,7 @@
26780
26781 int getrusage(struct task_struct *, int, struct rusage *);
26782
26783 -static void release_task(struct task_struct * p)
26784 +void release_task(struct task_struct * p)
26785 {
26786 if (p != current) {
26787 #ifdef CONFIG_SMP
26788 diff -Nur linux-2.4.30/kernel/signal.c linux-2.4.30-mips/kernel/signal.c
26789 --- linux-2.4.30/kernel/signal.c 2004-02-18 14:36:32.000000000 +0100
26790 +++ linux-2.4.30-mips/kernel/signal.c 2004-01-20 16:10:34.000000000 +0100
26791 @@ -14,6 +14,7 @@
26792 #include <linux/init.h>
26793 #include <linux/sched.h>
26794
26795 +#include <asm/param.h>
26796 #include <asm/uaccess.h>
26797
26798 /*
26799 @@ -28,6 +29,14 @@
26800 #define SIG_SLAB_DEBUG 0
26801 #endif
26802
26803 +#define DEBUG_SIG 0
26804 +
26805 +#if DEBUG_SIG
26806 +#define SIG_SLAB_DEBUG (SLAB_DEBUG_FREE | SLAB_RED_ZONE /* | SLAB_POISON */)
26807 +#else
26808 +#define SIG_SLAB_DEBUG 0
26809 +#endif
26810 +
26811 static kmem_cache_t *sigqueue_cachep;
26812
26813 atomic_t nr_queued_signals;
26814 @@ -270,6 +279,11 @@
26815 signal_pending(current));
26816 #endif
26817
26818 +#if DEBUG_SIG
26819 +printk("SIG dequeue (%s:%d): %d ", current->comm, current->pid,
26820 + signal_pending(current));
26821 +#endif
26822 +
26823 sig = next_signal(current, mask);
26824 if (sig) {
26825 if (current->notifier) {
26826 @@ -293,6 +307,10 @@
26827 printk(" %d -> %d\n", signal_pending(current), sig);
26828 #endif
26829
26830 +#if DEBUG_SIG
26831 +printk(" %d -> %d\n", signal_pending(current), sig);
26832 +#endif
26833 +
26834 return sig;
26835 }
26836
26837 @@ -540,6 +558,11 @@
26838 printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
26839 #endif
26840
26841 +
26842 +#if DEBUG_SIG
26843 +printk("SIG queue (%s:%d): %d ", t->comm, t->pid, sig);
26844 +#endif
26845 +
26846 ret = -EINVAL;
26847 if (sig < 0 || sig > _NSIG)
26848 goto out_nolock;
26849 @@ -778,8 +801,8 @@
26850 info.si_uid = tsk->uid;
26851
26852 /* FIXME: find out whether or not this is supposed to be c*time. */
26853 - info.si_utime = tsk->times.tms_utime;
26854 - info.si_stime = tsk->times.tms_stime;
26855 + info.si_utime = hz_to_std(tsk->times.tms_utime);
26856 + info.si_stime = hz_to_std(tsk->times.tms_stime);
26857
26858 status = tsk->exit_code & 0x7f;
26859 why = SI_KERNEL; /* shouldn't happen */
26860 diff -Nur linux-2.4.30/kernel/sys.c linux-2.4.30-mips/kernel/sys.c
26861 --- linux-2.4.30/kernel/sys.c 2003-11-28 19:26:21.000000000 +0100
26862 +++ linux-2.4.30-mips/kernel/sys.c 2003-11-17 02:07:47.000000000 +0100
26863 @@ -801,16 +801,23 @@
26864
26865 asmlinkage long sys_times(struct tms * tbuf)
26866 {
26867 + struct tms temp;
26868 +
26869 /*
26870 * In the SMP world we might just be unlucky and have one of
26871 * the times increment as we use it. Since the value is an
26872 * atomically safe type this is just fine. Conceptually its
26873 * as if the syscall took an instant longer to occur.
26874 */
26875 - if (tbuf)
26876 - if (copy_to_user(tbuf, &current->times, sizeof(struct tms)))
26877 + if (tbuf) {
26878 + temp.tms_utime = hz_to_std(current->times.tms_utime);
26879 + temp.tms_stime = hz_to_std(current->times.tms_stime);
26880 + temp.tms_cutime = hz_to_std(current->times.tms_cutime);
26881 + temp.tms_cstime = hz_to_std(current->times.tms_cstime);
26882 + if (copy_to_user(tbuf, &temp, sizeof(struct tms)))
26883 return -EFAULT;
26884 - return jiffies;
26885 + }
26886 + return hz_to_std(jiffies);
26887 }
26888
26889 /*
26890 diff -Nur linux-2.4.30/lib/Makefile linux-2.4.30-mips/lib/Makefile
26891 --- linux-2.4.30/lib/Makefile 2004-04-14 15:05:40.000000000 +0200
26892 +++ linux-2.4.30-mips/lib/Makefile 2004-04-16 05:14:21.000000000 +0200
26893 @@ -27,6 +27,7 @@
26894 subdir-$(CONFIG_ZLIB_INFLATE) += zlib_inflate
26895 subdir-$(CONFIG_ZLIB_DEFLATE) += zlib_deflate
26896
26897 +-include $(TOPDIR)/arch/$(ARCH)/Makefile.lib
26898 include $(TOPDIR)/drivers/net/Makefile.lib
26899 include $(TOPDIR)/drivers/usb/Makefile.lib
26900 include $(TOPDIR)/drivers/bluetooth/Makefile.lib
Personal OpenWRT clone
This page took 1.175514 seconds and 5 git commands to generate.