cns3xxx: fix missing and incomplete cache flushes on DMA cache sync for cpu - fixes...
[openwrt.git] / target / linux / brcm47xx / patches-2.6.37 / 014-MIPS-BCM47xx-Setup-and-register-serial-early.patch
1 From 9be402f069cc259ad5795b77567d66c4e7f6bef6 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sun, 18 Jul 2010 14:59:24 +0200
4 Subject: [PATCH 4/6] MIPS: BCM47xx: Setup and register serial early
5
6 Swap the first and second serial if console=ttyS1 was set.
7 Set it up and register it for early serial support.
8
9 This patch has been in OpenWRT for a long time.
10
11 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
12 ---
13 arch/mips/bcm47xx/setup.c | 39 ++++++++++++++++++++++++++++++++++++++-
14 1 files changed, 38 insertions(+), 1 deletions(-)
15
16 --- a/arch/mips/bcm47xx/setup.c
17 +++ b/arch/mips/bcm47xx/setup.c
18 @@ -28,6 +28,8 @@
19 #include <linux/types.h>
20 #include <linux/ssb/ssb.h>
21 #include <linux/ssb/ssb_embedded.h>
22 +#include <linux/serial.h>
23 +#include <linux/serial_8250.h>
24 #include <asm/bootinfo.h>
25 #include <asm/reboot.h>
26 #include <asm/time.h>
27 @@ -166,6 +168,31 @@ static int bcm47xx_get_invariants(struct
28 return 0;
29 }
30
31 +#ifdef CONFIG_SERIAL_8250
32 +static void __init bcm47xx_early_serial_setup(struct ssb_mipscore *mcore)
33 +{
34 + int i;
35 +
36 + for (i = 0; i < mcore->nr_serial_ports; i++) {
37 + struct ssb_serial_port *port = &(mcore->serial_ports[i]);
38 + struct uart_port s;
39 +
40 + memset(&s, 0, sizeof(s));
41 + s.line = i;
42 + s.mapbase = (unsigned int) port->regs;
43 + s.membase = port->regs;
44 + s.irq = port->irq + 2;
45 + s.uartclk = port->baud_base;
46 + s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
47 + s.iotype = SERIAL_IO_MEM;
48 + s.regshift = port->reg_shift;
49 +
50 + early_serial_setup(&s);
51 + }
52 + printk(KERN_DEBUG "Serial init done.\n");
53 +}
54 +#endif
55 +
56 void __init plat_mem_setup(void)
57 {
58 int err;
59 @@ -191,6 +218,10 @@ void __init plat_mem_setup(void)
60 }
61 }
62
63 +#ifdef CONFIG_SERIAL_8250
64 + bcm47xx_early_serial_setup(mcore);
65 +#endif
66 +
67 _machine_restart = bcm47xx_machine_restart;
68 _machine_halt = bcm47xx_machine_halt;
69 pm_power_off = bcm47xx_machine_halt;
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