target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c

   1 /*
   2  *  NAND flash driver for the MikroTik RouterBOARD 750
   3  *
   4  *  Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/mtd/nand.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/io.h>
  18 #include <linux/slab.h>
  19
  20 #include <asm/mach-ath79/ar71xx_regs.h>
  21 #include <asm/mach-ath79/ath79.h>
  22 #include <asm/mach-ath79/mach-rb750.h>
  23
  24 #define DRV_NAME        "rb750-nand"
  25 #define DRV_VERSION     "0.1.0"
  26 #define DRV_DESC        "NAND flash driver for the RouterBOARD 750"
  27
  28 #define RB750_NAND_IO0          BIT(RB750_GPIO_NAND_IO0)
  29 #define RB750_NAND_ALE          BIT(RB750_GPIO_NAND_ALE)
  30 #define RB750_NAND_CLE          BIT(RB750_GPIO_NAND_CLE)
  31 #define RB750_NAND_NRE          BIT(RB750_GPIO_NAND_NRE)
  32 #define RB750_NAND_NWE          BIT(RB750_GPIO_NAND_NWE)
  33 #define RB750_NAND_RDY          BIT(RB750_GPIO_NAND_RDY)
  34 #define RB750_NAND_NCE          BIT(RB750_GPIO_NAND_NCE)
  35
  36 #define RB750_NAND_DATA_SHIFT   1
  37 #define RB750_NAND_DATA_BITS    (0xff << RB750_NAND_DATA_SHIFT)
  38 #define RB750_NAND_INPUT_BITS   (RB750_NAND_DATA_BITS | RB750_NAND_RDY)
  39 #define RB750_NAND_OUTPUT_BITS  (RB750_NAND_ALE | RB750_NAND_CLE | \
  40                                  RB750_NAND_NRE | RB750_NAND_NWE | \
  41                                  RB750_NAND_NCE)
  42
  43 struct rb750_nand_info {
  44         struct nand_chip        chip;
  45         struct mtd_info         mtd;
  46 };
  47
  48 /*
  49  * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader
  50  * will not be able to find the kernel that we load.
  51  */
  52 static struct nand_ecclayout rb750_nand_ecclayout = {
  53         .eccbytes       = 6,
  54         .eccpos         = { 8, 9, 10, 13, 14, 15 },
  55         .oobavail       = 9,
  56         .oobfree        = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
  57 };
  58
  59 static struct mtd_partition rb750_nand_partitions[] = {
  60         {
  61                 .name   = "booter",
  62                 .offset = 0,
  63                 .size   = (256 * 1024),
  64                 .mask_flags = MTD_WRITEABLE,
  65         }, {
  66                 .name   = "kernel",
  67                 .offset = (256 * 1024),
  68                 .size   = (4 * 1024 * 1024) - (256 * 1024),
  69         }, {
  70                 .name   = "rootfs",
  71                 .offset = MTDPART_OFS_NXTBLK,
  72                 .size   = MTDPART_SIZ_FULL,
  73         },
  74 };
  75
  76 static void rb750_nand_write(const u8 *buf, unsigned len)
  77 {
  78         void __iomem *base = ath79_gpio_base;
  79         u32 out;
  80         u32 t;
  81         unsigned i;
  82
  83         /* set data lines to output mode */
  84         t = __raw_readl(base + AR71XX_GPIO_REG_OE);
  85         __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
  86
  87         out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
  88         out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE);
  89         for (i = 0; i != len; i++) {
  90                 u32 data;
  91
  92                 data = buf[i];
  93                 data <<= RB750_NAND_DATA_SHIFT;
  94                 data |= out;
  95                 __raw_writel(data, base + AR71XX_GPIO_REG_OUT);
  96
  97                 __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT);
  98                 /* flush write */
  99                 __raw_readl(base + AR71XX_GPIO_REG_OUT);
 100         }
 101
 102         /* set data lines to input mode */
 103         t = __raw_readl(base + AR71XX_GPIO_REG_OE);
 104         __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE);
 105         /* flush write */
 106         __raw_readl(base + AR71XX_GPIO_REG_OE);
 107 }
 108
 109 static int rb750_nand_read_verify(u8 *read_buf, unsigned len,
 110                                   const u8 *verify_buf)
 111 {
 112         void __iomem *base = ath79_gpio_base;
 113         unsigned i;
 114
 115         for (i = 0; i < len; i++) {
 116                 u8 data;
 117
 118                 /* activate RE line */
 119                 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR);
 120                 /* flush write */
 121                 __raw_readl(base + AR71XX_GPIO_REG_CLEAR);
 122
 123                 /* read input lines */
 124                 data = __raw_readl(base + AR71XX_GPIO_REG_IN) >>
 125                        RB750_NAND_DATA_SHIFT;
 126
 127                 /* deactivate RE line */
 128                 __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET);
 129
 130                 if (read_buf)
 131                         read_buf[i] = data;
 132                 else if (verify_buf && verify_buf[i] != data)
 133                         return -EFAULT;
 134         }
 135
 136         return 0;
 137 }
 138
 139 static void rb750_nand_select_chip(struct mtd_info *mtd, int chip)
 140 {
 141         void __iomem *base = ath79_gpio_base;
 142         u32 func;
 143         u32 t;
 144
 145         func = __raw_readl(base + AR71XX_GPIO_REG_FUNC);
 146         if (chip >= 0) {
 147                 /* disable latch */
 148                 rb750_latch_change(RB750_LVC573_LE, 0);
 149
 150                 rb750_nand_pins_enable();
 151
 152                 /* set input mode for data lines */
 153                 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
 154                 __raw_writel(t & ~RB750_NAND_INPUT_BITS,
 155                              base + AR71XX_GPIO_REG_OE);
 156
 157                 /* deactivate RE and WE lines */
 158                 __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE,
 159                              base + AR71XX_GPIO_REG_SET);
 160                 /* flush write */
 161                 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
 162
 163                 /* activate CE line */
 164                 __raw_writel(RB750_NAND_NCE, base + AR71XX_GPIO_REG_CLEAR);
 165         } else {
 166                 /* deactivate CE line */
 167                 __raw_writel(RB750_NAND_NCE, base + AR71XX_GPIO_REG_SET);
 168                 /* flush write */
 169                 (void) __raw_readl(base + AR71XX_GPIO_REG_SET);
 170
 171                 t = __raw_readl(base + AR71XX_GPIO_REG_OE);
 172                 __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY,
 173                              base + AR71XX_GPIO_REG_OE);
 174
 175                 rb750_nand_pins_disable();
 176
 177                 /* enable latch */
 178                 rb750_latch_change(0, RB750_LVC573_LE);
 179         }
 180 }
 181
 182 static int rb750_nand_dev_ready(struct mtd_info *mtd)
 183 {
 184         void __iomem *base = ath79_gpio_base;
 185
 186         return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY);
 187 }
 188
 189 static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 190                                 unsigned int ctrl)
 191 {
 192         if (ctrl & NAND_CTRL_CHANGE) {
 193                 void __iomem *base = ath79_gpio_base;
 194                 u32 t;
 195
 196                 t = __raw_readl(base + AR71XX_GPIO_REG_OUT);
 197
 198                 t &= ~(RB750_NAND_CLE | RB750_NAND_ALE);
 199                 t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0;
 200                 t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0;
 201
 202                 __raw_writel(t, base + AR71XX_GPIO_REG_OUT);
 203                 /* flush write */
 204                 __raw_readl(base + AR71XX_GPIO_REG_OUT);
 205         }
 206
 207         if (cmd != NAND_CMD_NONE) {
 208                 u8 t = cmd;
 209                 rb750_nand_write(&t, 1);
 210         }
 211 }
 212
 213 static u8 rb750_nand_read_byte(struct mtd_info *mtd)
 214 {
 215         u8 data = 0;
 216         rb750_nand_read_verify(&data, 1, NULL);
 217         return data;
 218 }
 219
 220 static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len)
 221 {
 222         rb750_nand_read_verify(buf, len, NULL);
 223 }
 224
 225 static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
 226 {
 227         rb750_nand_write(buf, len);
 228 }
 229
 230 static int rb750_nand_verify_buf(struct mtd_info *mtd, const u8 *buf, int len)
 231 {
 232         return rb750_nand_read_verify(NULL, len, buf);
 233 }
 234
 235 static void __init rb750_nand_gpio_init(void)
 236 {
 237         void __iomem *base = ath79_gpio_base;
 238         u32 out;
 239         u32 t;
 240
 241         out = __raw_readl(base + AR71XX_GPIO_REG_OUT);
 242
 243         /* setup output levels */
 244         __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE,
 245                      base + AR71XX_GPIO_REG_SET);
 246
 247         __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE,
 248                      base + AR71XX_GPIO_REG_CLEAR);
 249
 250         /* setup input lines */
 251         t = __raw_readl(base + AR71XX_GPIO_REG_OE);
 252         __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE);
 253
 254         /* setup output lines */
 255         t = __raw_readl(base + AR71XX_GPIO_REG_OE);
 256         __raw_writel(t | RB750_NAND_OUTPUT_BITS, base + AR71XX_GPIO_REG_OE);
 257
 258         rb750_latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0);
 259 }
 260
 261 static int __devinit rb750_nand_probe(struct platform_device *pdev)
 262 {
 263         struct rb750_nand_info  *info;
 264         int ret;
 265
 266         printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
 267
 268         rb750_nand_gpio_init();
 269
 270         info = kzalloc(sizeof(*info), GFP_KERNEL);
 271         if (!info)
 272                 return -ENOMEM;
 273
 274         info->chip.priv = &info;
 275         info->mtd.priv  = &info->chip;
 276         info->mtd.owner = THIS_MODULE;
 277
 278         info->chip.select_chip  = rb750_nand_select_chip;
 279         info->chip.cmd_ctrl     = rb750_nand_cmd_ctrl;
 280         info->chip.dev_ready    = rb750_nand_dev_ready;
 281         info->chip.read_byte    = rb750_nand_read_byte;
 282         info->chip.write_buf    = rb750_nand_write_buf;
 283         info->chip.read_buf     = rb750_nand_read_buf;
 284         info->chip.verify_buf   = rb750_nand_verify_buf;
 285
 286         info->chip.chip_delay   = 25;
 287         info->chip.ecc.mode     = NAND_ECC_SOFT;
 288         info->chip.options      |= NAND_NO_AUTOINCR;
 289
 290         platform_set_drvdata(pdev, info);
 291
 292         ret = nand_scan_ident(&info->mtd, 1, NULL);
 293         if (ret) {
 294                 ret = -ENXIO;
 295                 goto err_free_info;
 296         }
 297
 298         if (info->mtd.writesize == 512)
 299                 info->chip.ecc.layout = &rb750_nand_ecclayout;
 300
 301         ret = nand_scan_tail(&info->mtd);
 302         if (ret) {
 303                 return -ENXIO;
 304                 goto err_set_drvdata;
 305         }
 306
 307         ret = mtd_device_register(&info->mtd, rb750_nand_partitions,
 308                                  ARRAY_SIZE(rb750_nand_partitions));
 309         if (ret)
 310                 goto err_release_nand;
 311
 312         return 0;
 313
 314 err_release_nand:
 315         nand_release(&info->mtd);
 316 err_set_drvdata:
 317         platform_set_drvdata(pdev, NULL);
 318 err_free_info:
 319         kfree(info);
 320         return ret;
 321 }
 322
 323 static int __devexit rb750_nand_remove(struct platform_device *pdev)
 324 {
 325         struct rb750_nand_info *info = platform_get_drvdata(pdev);
 326
 327         nand_release(&info->mtd);
 328         platform_set_drvdata(pdev, NULL);
 329         kfree(info);
 330
 331         return 0;
 332 }
 333
 334 static struct platform_driver rb750_nand_driver = {
 335         .probe  = rb750_nand_probe,
 336         .remove = __devexit_p(rb750_nand_remove),
 337         .driver = {
 338                 .name   = DRV_NAME,
 339                 .owner  = THIS_MODULE,
 340         },
 341 };
 342
 343 static int __init rb750_nand_init(void)
 344 {
 345         return platform_driver_register(&rb750_nand_driver);
 346 }
 347
 348 static void __exit rb750_nand_exit(void)
 349 {
 350         platform_driver_unregister(&rb750_nand_driver);
 351 }
 352
 353 module_init(rb750_nand_init);
 354 module_exit(rb750_nand_exit);
 355
 356 MODULE_DESCRIPTION(DRV_DESC);
 357 MODULE_VERSION(DRV_VERSION);
 358 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
 359 MODULE_LICENSE("GPL v2");